#define一覧 Excel2010

Excel2010

No. 名称 値 ファイル名 説明
1
 __asmcall__asmcall __attribute__ (( regparm(0) )) compiler.h 　
2
 __BYTE_ORDER__BYTE_ORDER __LITTLE_ENDIAN endian.h 　
3
 PRODUCT_NAMEPRODUCT_NAME "" general.h 　
4
 PRODUCT_SHORT_NAMEPRODUCT_SHORT_NAME "gPXE" general.h 　
5
 BANNER_TIMEOUTBANNER_TIMEOUT 20 general.h Tenths of a second for which the shell
6
 COM1COM1 0x3f8 serial.h 　
7
 COM2COM2 0x2f8 serial.h 　
8
 COM3COM3 0x3e8 serial.h 　
9
 COM4COM4 0x2e8 serial.h 　
10
 COMCONSOLECOMCONSOLE COM1 serial.h I/O port address
11
 COMSPEEDCOMSPEED 115200 serial.h Baud rate
12
 COMDATACOMDATA 8 serial.h Data bits
13
 COMPARITYCOMPARITY 0 serial.h Parity: 0=None, 1=Odd, 2=Even
14
 COMSTOPCOMSTOP 1 serial.h Stop bits
15
 CHAR_256CHAR_256 0 btext.c 　
16
 cmapszcmapsz (16*256) btext.c 　
17
 cmapszcmapsz (16*96) btext.c 　
18
 BUILD_SERIAL_STRBUILD_SERIAL_STR " #" XSTR(BUILD_SERIAL_NUM) config.c 　
19
 BUILD_SERIAL_STRBUILD_SERIAL_STR "" config.c 　
20
 BUILD_ID_STRBUILD_ID_STR " " BUILD_ID config.c 　
21
 BUILD_ID_STRBUILD_ID_STR "" config.c 　
22
 BUILD_STRINGBUILD_STRING " [build" BUILD_ID_STR BUILD_SERIAL_STR "]" config.c 　
23
 BUILD_STRINGBUILD_STRING "" config.c 　
24
 GUARD_SYMBOLGUARD_SYMBOL ( ( 'M' << 24 ) | ( 'I' << 16 ) | ( 'N' << 8 ) | 'E' ) debug.c 　
25
 NUM_AUTO_COLOURSNUM_AUTO_COLOURS 6 debug.c 　
26
 GETKEY_TIMEOUTGETKEY_TIMEOUT ( TICKS_PER_SEC / 4 ) getkey.c 　
27
 IS_VADEMIS_VADEM 0x0001 i82365.c 　
28
 IS_CIRRUSIS_CIRRUS 0x0002 i82365.c 　
29
 IS_TIIS_TI 0x0004 i82365.c 　
30
 IS_O2MICROIS_O2MICRO 0x0008 i82365.c 　
31
 IS_VIAIS_VIA 0x0010 i82365.c 　
32
 IS_TOPICIS_TOPIC 0x0020 i82365.c 　
33
 IS_RICOHIS_RICOH 0x0040 i82365.c 　
34
 IS_UNKNOWNIS_UNKNOWN 0x0400 i82365.c 　
35
 IS_VG_PWRIS_VG_PWR 0x0800 i82365.c 　
36
 IS_DF_PWRIS_DF_PWR 0x1000 i82365.c 　
37
 IS_PCIIS_PCI 0x2000 i82365.c 　
38
 IS_ALIVEIS_ALIVE 0x8000 i82365.c 　
39
 NORMALNORMAL "\033[0m" main.c 　
40
 BOLDBOLD "\033[1m" main.c 　
41
 CYANCYAN "\033[36m" main.c 　
42
 MIN_MEMBLOCK_SIZEMIN_MEMBLOCK_SIZE ( ( size_t ) ( 1 << ( fls ( sizeof ( struct memory_block ) - 1 ) ) ) ) malloc.c 　
43
 NOWHERENOWHERE ( ( void * ) ~( ( intptr_t ) 0 ) ) malloc.c 　
44
 HEAP_SIZEHEAP_SIZE ( 128 * 1024 ) malloc.c 　
45
 CODE_STATUSCODE_STATUS "alpha" pcmcia.c 　
46
 CODE_VERSIONCODE_VERSION "0.1.3" pcmcia.c 　
47
 NUM_DRIVERSNUM_DRIVERS (sizeof(driver)/(sizeof(struct driver_interact_t))) pcmcia.c 　
48
 SHIFTSHIFT 1 pc_kbd.c 　
49
 CONTROLCONTROL 2 pc_kbd.c 　
50
 CAPSCAPS 4 pc_kbd.c 　
51
 LACP_DEBUGLACP_DEBUG 0 proto_eth_slow.c 　
52
 SLOW_DST_MACSLOW_DST_MAC "\x01\x80\xc2\x00\x00\x02" proto_eth_slow.c 　
53
 SLOW_SUBTYPE_LACPSLOW_SUBTYPE_LACP 1 proto_eth_slow.c 　
54
 SLOW_SUBTYPE_MARKERSLOW_SUBTYPE_MARKER 2 proto_eth_slow.c 　
55
 LACP_CMP_LENLACP_CMP_LEN (2 + 6 + 2 + 2 + 2) proto_eth_slow.c 　
56
 LACP_CP_LENLACP_CP_LEN (2 + 6 + 2 + 2 + 2 + 1) proto_eth_slow.c 　
57
 FAST_PERIODIC_TIMEFAST_PERIODIC_TIME (1*TICKS_PER_SEC) proto_eth_slow.c 　
58
 SLOW_PERIODIC_TIMESLOW_PERIODIC_TIME (30*TICKS_PER_SEC) proto_eth_slow.c 　
59
 SHORT_TIMEOUT_TIMESHORT_TIMEOUT_TIME (3*FAST_PERIODIC_TIME) proto_eth_slow.c 　
60
 LONG_TIMEOUT_TIMELONG_TIMEOUT_TIME (3*SLOW_PERIODIC_TIME) proto_eth_slow.c 　
61
 CHURN_DETECTION_TIMECHURN_DETECTION_TIME (60*TICKS_PER_SEC) proto_eth_slow.c 　
62
 AGGREGATE_WAIT_TIMEAGGREGATE_WAIT_TIME (2*TICKS_PER_SEC) proto_eth_slow.c 　
63
 LACP_ACTIVITYLACP_ACTIVITY (1 << 0) proto_eth_slow.c 　
64
 LACP_TIMEOUTLACP_TIMEOUT (1 << 1) proto_eth_slow.c 　
65
 LACP_AGGREGATIONLACP_AGGREGATION (1 << 2) proto_eth_slow.c 　
66
 LACP_SYNCHRONIZATIONLACP_SYNCHRONIZATION (1 << 3) proto_eth_slow.c 　
67
 LACP_COLLECTINGLACP_COLLECTING (1 << 4) proto_eth_slow.c 　
68
 LACP_DISTRIBUTINGLACP_DISTRIBUTING (1 << 5) proto_eth_slow.c 　
69
 LACP_DEFAULTEDLACP_DEFAULTED (1 << 6) proto_eth_slow.c 　
70
 LACP_EXPIREDLACP_EXPIRED (1 << 7) proto_eth_slow.c 　
71
 UNSELECTEDUNSELECTED 0 proto_eth_slow.c 　
72
 STANDBYSTANDBY 1 proto_eth_slow.c 　
73
 SELECTEDSELECTED 2 proto_eth_slow.c 　
74
 LACP_NTT_MASKLACP_NTT_MASK (LACP_ACTIVITY | LACP_TIMEOUT | \ LACP_SYNCHRONIZATION | LACP_AGGREGATION) proto_eth_slow.c 　
75
 COMCONSOLECOMCONSOLE 0x3f8 serial.c 　
76
 COMSPEEDCOMSPEED 9600 serial.c 　
77
 COMDATACOMDATA 8 serial.c 　
78
 COMPARITYCOMPARITY 0 serial.c 　
79
 COMSTOPCOMSTOP 1 serial.c 　
80
 UART_BASEUART_BASE ( COMCONSOLE ) serial.c 　
81
 UART_BAUDUART_BAUD ( COMSPEED ) serial.c 　
82
 COMBRDCOMBRD (115200/UART_BAUD) serial.c 　
83
 UART_LCSUART_LCS ( ( ( (COMDATA) - 5 ) << 0 ) | \ ( ( (COMPARITY) ) << 3 ) | \ ( ( (COMSTOP) - 1 ) << 2 ) ) serial.c 　
84
 UART_RBRUART_RBR 0x00 serial.c 　
85
 UART_TBRUART_TBR 0x00 serial.c 　
86
 UART_IERUART_IER 0x01 serial.c 　
87
 UART_IIRUART_IIR 0x02 serial.c 　
88
 UART_FCRUART_FCR 0x02 serial.c 　
89
 UART_LCRUART_LCR 0x03 serial.c 　
90
 UART_MCRUART_MCR 0x04 serial.c 　
91
 UART_DLLUART_DLL 0x00 serial.c 　
92
 UART_DLMUART_DLM 0x01 serial.c 　
93
 UART_LSRUART_LSR 0x05 serial.c 　
94
 UART_LSR_TEMPTUART_LSR_TEMPT 0x40 serial.c Transmitter empty
95
 UART_LSR_THREUART_LSR_THRE 0x20 serial.c Transmit-hold-register empty
96
 UART_LSR_BIUART_LSR_BI 0x10 serial.c Break interrupt indicator
97
 UART_LSR_FEUART_LSR_FE 0x08 serial.c Frame error indicator
98
 UART_LSR_PEUART_LSR_PE 0x04 serial.c Parity error indicator
99
 UART_LSR_OEUART_LSR_OE 0x02 serial.c Overrun error indicator
100
 UART_LSR_DRUART_LSR_DR 0x01 serial.c Receiver data ready
101
 UART_MSRUART_MSR 0x06 serial.c 　
102
 UART_SCRUART_SCR 0x07 serial.c 　
103
 settings_rootsettings_root generic_settings_root.settings settings.c 　
104
 CHAR_LENCHAR_LEN 0 vsprintf.c *< "hh" length modifier
105
 SHORT_LENSHORT_LEN 1 vsprintf.c *< "h" length modifier
106
 INT_LENINT_LEN 2 vsprintf.c *< no length modifier
107
 LONG_LENLONG_LEN 3 vsprintf.c *< "l" length modifier
108
 LONGLONG_LENLONGLONG_LEN 4 vsprintf.c *< "ll" length modifier
109
 SIZE_T_LENSIZE_T_LEN 5 vsprintf.c *< "z" length modifier
110
 LCASELCASE 0x20 vsprintf.c 　
111
 ALT_FORMALT_FORM 0x02 vsprintf.c 　
112
 AES_BLOCKSIZEAES_BLOCKSIZE 16 axtls_aes.c 　
113
 mtmt 0x80808080 aes.c 　
114
 mlml 0x7f7f7f7f aes.c 　
115
 mhmh 0xfefefefe aes.c 　
116
 mmmm 0x1b1b1b1b aes.c 　
117
 BIGINT_M_OFFSETBIGINT_M_OFFSET 0 bigint_impl.h *< Normal modulo offset.
118
 BIGINT_P_OFFSETBIGINT_P_OFFSET 1 bigint_impl.h *< p modulo offset.
119
 BIGINT_Q_OFFSETBIGINT_Q_OFFSET 2 bigint_impl.h *< q module offset.
120
 BIGINT_NUM_MODSBIGINT_NUM_MODS 3 bigint_impl.h *< The number of modulus constants used.
121
 BIGINT_NUM_MODSBIGINT_NUM_MODS 1 bigint_impl.h 　
122
 COMP_RADIXCOMP_RADIX 4294967296i64 bigint_impl.h 　
123
 COMP_BIG_MSBCOMP_BIG_MSB 0x8000000000000000i64 bigint_impl.h 　
124
 COMP_RADIXCOMP_RADIX 4294967296ULL bigint_impl.h *< Max component + 1
125
 COMP_BIG_MSBCOMP_BIG_MSB 0x8000000000000000ULL bigint_impl.h *< (Max dbl comp + 1)/ 2
126
 COMP_BIT_SIZECOMP_BIT_SIZE 32 bigint_impl.h *< Number of bits in a component.
127
 COMP_BYTE_SIZECOMP_BYTE_SIZE 4 bigint_impl.h *< Number of bytes in a component.
128
 COMP_NUM_NIBBLESCOMP_NUM_NIBBLES 8 bigint_impl.h *< Used For diagnostics only.
129
 PERMANENTPERMANENT 0x7FFF55AA bigint_impl.h *< A magic number for permanents.
130
 V1V1 v->comps[v->size-1] bigint_impl.h *< v1 for division
131
 V2V2 v->comps[v->size-2] bigint_impl.h *< v2 for division
132
 CONFIG_SSL_CERT_VERIFICATIONCONFIG_SSL_CERT_VERIFICATION 1 os_port.h 　
133
 CONFIG_SSL_MAX_CERTSCONFIG_SSL_MAX_CERTS 1 os_port.h 　
134
 CONFIG_X509_MAX_CA_CERTSCONFIG_X509_MAX_CA_CERTS 1 os_port.h 　
135
 CONFIG_SSL_EXPIRY_TIMECONFIG_SSL_EXPIRY_TIME 24 os_port.h 　
136
 CONFIG_SSL_ENABLE_CLIENTCONFIG_SSL_ENABLE_CLIENT 1 os_port.h 　
137
 CONFIG_BIGINT_CLASSICALCONFIG_BIGINT_CLASSICAL 1 os_port.h 　
138
 SELECT_SLAVESELECT_SLAVE 0 spi_bit.c 　
139
 DESELECT_SLAVEDESELECT_SLAVE SPI_MODE_SSPOL spi_bit.c 　
140
 SCSI_MAX_DUMMY_READ_CAPSCSI_MAX_DUMMY_READ_CAP 10 scsi.c 　
141
 ISA_EXTRA_PROBE_ADDR_COUNTISA_EXTRA_PROBE_ADDR_COUNT ( sizeof ( isa_extra_probe_addrs ) / sizeof ( isa_extra_probe_addrs[0] ) ) isa.c 　
142
 ISAPNP_CARD_ID_FMTISAPNP_CARD_ID_FMT "ID %04x:%04x (\"%s\") serial %x" isapnp.c 　
143
 ISAPNP_DEV_ID_FMTISAPNP_DEV_ID_FMT "ID %04x:%04x (\"%s\")" isapnp.c 　
144
 LINDA_SEND_BUF_TOGGLELINDA_SEND_BUF_TOGGLE 0x80 linda.c 　
145
 LINDA_EPB_ALL_CHANNELSLINDA_EPB_ALL_CHANNELS 31 linda.c 　
146
 LINDA_SERDES_PARAM_ENDLINDA_SERDES_PARAM_END { 0, 0, 0 } linda.c 　
147
 ARBEL_NUM_PORTSARBEL_NUM_PORTS 2 arbel.h 　
148
 ARBEL_PORT_BASEARBEL_PORT_BASE 1 arbel.h 　
149
 ARBEL_PCI_CONFIG_BARARBEL_PCI_CONFIG_BAR PCI_BASE_ADDRESS_0 arbel.h 　
150
 ARBEL_PCI_CONFIG_BAR_SIZEARBEL_PCI_CONFIG_BAR_SIZE 0x100000 arbel.h 　
151
 ARBEL_PCI_UAR_BARARBEL_PCI_UAR_BAR PCI_BASE_ADDRESS_2 arbel.h 　
152
 ARBEL_PCI_UAR_IDXARBEL_PCI_UAR_IDX 1 arbel.h 　
153
 ARBEL_PCI_UAR_SIZEARBEL_PCI_UAR_SIZE 0x1000 arbel.h 　
154
 ARBEL_UAR_RES_NONEARBEL_UAR_RES_NONE 0x00 arbel.h 　
155
 ARBEL_UAR_RES_CQ_CIARBEL_UAR_RES_CQ_CI 0x01 arbel.h 　
156
 ARBEL_UAR_RES_CQ_ARMARBEL_UAR_RES_CQ_ARM 0x02 arbel.h 　
157
 ARBEL_UAR_RES_SQARBEL_UAR_RES_SQ 0x03 arbel.h 　
158
 ARBEL_UAR_RES_RQARBEL_UAR_RES_RQ 0x04 arbel.h 　
159
 ARBEL_UAR_RES_GROUP_SEPARBEL_UAR_RES_GROUP_SEP 0x07 arbel.h 　
160
 ARBEL_OPCODE_SENDARBEL_OPCODE_SEND 0x0a arbel.h 　
161
 ARBEL_OPCODE_RECV_ERRORARBEL_OPCODE_RECV_ERROR 0xfe arbel.h 　
162
 ARBEL_OPCODE_SEND_ERRORARBEL_OPCODE_SEND_ERROR 0xff arbel.h 　
163
 ARBEL_HCR_QUERY_DEV_LIMARBEL_HCR_QUERY_DEV_LIM 0x0003 arbel.h 　
164
 ARBEL_HCR_QUERY_FWARBEL_HCR_QUERY_FW 0x0004 arbel.h 　
165
 ARBEL_HCR_INIT_HCAARBEL_HCR_INIT_HCA 0x0007 arbel.h 　
166
 ARBEL_HCR_CLOSE_HCAARBEL_HCR_CLOSE_HCA 0x0008 arbel.h 　
167
 ARBEL_HCR_INIT_IBARBEL_HCR_INIT_IB 0x0009 arbel.h 　
168
 ARBEL_HCR_CLOSE_IBARBEL_HCR_CLOSE_IB 0x000a arbel.h 　
169
 ARBEL_HCR_SW2HW_MPTARBEL_HCR_SW2HW_MPT 0x000d arbel.h 　
170
 ARBEL_HCR_MAP_EQARBEL_HCR_MAP_EQ 0x0012 arbel.h 　
171
 ARBEL_HCR_SW2HW_EQARBEL_HCR_SW2HW_EQ 0x0013 arbel.h 　
172
 ARBEL_HCR_HW2SW_EQARBEL_HCR_HW2SW_EQ 0x0014 arbel.h 　
173
 ARBEL_HCR_SW2HW_CQARBEL_HCR_SW2HW_CQ 0x0016 arbel.h 　
174
 ARBEL_HCR_HW2SW_CQARBEL_HCR_HW2SW_CQ 0x0017 arbel.h 　
175
 ARBEL_HCR_RST2INIT_QPEEARBEL_HCR_RST2INIT_QPEE 0x0019 arbel.h 　
176
 ARBEL_HCR_INIT2RTR_QPEEARBEL_HCR_INIT2RTR_QPEE 0x001a arbel.h 　
177
 ARBEL_HCR_RTR2RTS_QPEEARBEL_HCR_RTR2RTS_QPEE 0x001b arbel.h 　
178
 ARBEL_HCR_RTS2RTS_QPEEARBEL_HCR_RTS2RTS_QPEE 0x001c arbel.h 　
179
 ARBEL_HCR_2RST_QPEEARBEL_HCR_2RST_QPEE 0x0021 arbel.h 　
180
 ARBEL_HCR_MAD_IFCARBEL_HCR_MAD_IFC 0x0024 arbel.h 　
181
 ARBEL_HCR_READ_MGMARBEL_HCR_READ_MGM 0x0025 arbel.h 　
182
 ARBEL_HCR_WRITE_MGMARBEL_HCR_WRITE_MGM 0x0026 arbel.h 　
183
 ARBEL_HCR_MGID_HASHARBEL_HCR_MGID_HASH 0x0027 arbel.h 　
184
 ARBEL_HCR_RUN_FWARBEL_HCR_RUN_FW 0x0ff6 arbel.h 　
185
 ARBEL_HCR_DISABLE_LAMARBEL_HCR_DISABLE_LAM 0x0ff7 arbel.h 　
186
 ARBEL_HCR_ENABLE_LAMARBEL_HCR_ENABLE_LAM 0x0ff8 arbel.h 　
187
 ARBEL_HCR_UNMAP_ICMARBEL_HCR_UNMAP_ICM 0x0ff9 arbel.h 　
188
 ARBEL_HCR_MAP_ICMARBEL_HCR_MAP_ICM 0x0ffa arbel.h 　
189
 ARBEL_HCR_UNMAP_ICM_AUXARBEL_HCR_UNMAP_ICM_AUX 0x0ffb arbel.h 　
190
 ARBEL_HCR_MAP_ICM_AUXARBEL_HCR_MAP_ICM_AUX 0x0ffc arbel.h 　
191
 ARBEL_HCR_SET_ICM_SIZEARBEL_HCR_SET_ICM_SIZE 0x0ffd arbel.h 　
192
 ARBEL_HCR_UNMAP_FAARBEL_HCR_UNMAP_FA 0x0ffe arbel.h 　
193
 ARBEL_HCR_MAP_FAARBEL_HCR_MAP_FA 0x0fff arbel.h 　
194
 ARBEL_ST_UDARBEL_ST_UD 0x03 arbel.h 　
195
 ARBEL_MTU_2048ARBEL_MTU_2048 0x04 arbel.h 　
196
 ARBEL_NO_EQARBEL_NO_EQ 64 arbel.h 　
197
 ARBEL_INVALID_LKEYARBEL_INVALID_LKEY 0x00000100UL arbel.h 　
198
 ARBEL_PAGE_SIZEARBEL_PAGE_SIZE 4096 arbel.h 　
199
 ARBEL_DB_POST_SND_OFFSETARBEL_DB_POST_SND_OFFSET 0x10 arbel.h 　
200
 ARBEL_QPEE_OPT_PARAM_QKEYARBEL_QPEE_OPT_PARAM_QKEY 0x00000020UL arbel.h 　
201
 ARBEL_MAP_EQARBEL_MAP_EQ ( 0UL << 31 ) arbel.h 　
202
 ARBEL_UNMAP_EQARBEL_UNMAP_EQ ( 1UL << 31 ) arbel.h 　
203
 ARBEL_EV_PORT_STATE_CHANGEARBEL_EV_PORT_STATE_CHANGE 0x09 arbel.h 　
204
 ARBEL_MAX_GATHERARBEL_MAX_GATHER 1 arbel.h 　
205
 ARBEL_MAX_SCATTERARBEL_MAX_SCATTER 1 arbel.h 　
206
 ARBEL_SEND_WQE_ALIGNARBEL_SEND_WQE_ALIGN 128 arbel.h 　
207
 ARBEL_RECV_WQE_ALIGNARBEL_RECV_WQE_ALIGN 64 arbel.h 　
208
 ARBEL_MAX_QPSARBEL_MAX_QPS 8 arbel.h 　
209
 ARBEL_QPN_BASEARBEL_QPN_BASE 0x550000 arbel.h 　
210
 ARBEL_MAX_CQSARBEL_MAX_CQS 8 arbel.h 　
211
 ARBEL_MAX_EQSARBEL_MAX_EQS 64 arbel.h 　
212
 ARBEL_NUM_EQESARBEL_NUM_EQES 4 arbel.h 　
213
 ARBEL_GLOBAL_PDARBEL_GLOBAL_PD 0x123456 arbel.h 　
214
 ARBEL_MKEY_PREFIXARBEL_MKEY_PREFIX 0x77000000UL arbel.h 　
215
 ARBEL_HCR_BASEARBEL_HCR_BASE 0x80680 arbel.h 　
216
 ARBEL_HCR_MAX_WAIT_MSARBEL_HCR_MAX_WAIT_MS 2000 arbel.h 　
217
 ARBEL_MBOX_ALIGNARBEL_MBOX_ALIGN 4096 arbel.h 　
218
 ARBEL_MBOX_SIZEARBEL_MBOX_SIZE 512 arbel.h 　
219
 ARBEL_HCR_IN_MBOXARBEL_HCR_IN_MBOX 0x00001000UL arbel.h 　
220
 ARBEL_HCR_OUT_MBOXARBEL_HCR_OUT_MBOX 0x00002000UL arbel.h 　
221
 ARBEL_MAX_DOORBELL_RECORDSARBEL_MAX_DOORBELL_RECORDS 512 arbel.h 　
222
 ARBEL_GROUP_SEPARATOR_DOORBELLARBEL_GROUP_SEPARATOR_DOORBELL ( ARBEL_MAX_CQS + ARBEL_MAX_QPS ) arbel.h 　
223
 HERMON_MAX_PORTSHERMON_MAX_PORTS 2 hermon.h 　
224
 HERMON_PORT_BASEHERMON_PORT_BASE 1 hermon.h 　
225
 HERMON_PCI_CONFIG_BARHERMON_PCI_CONFIG_BAR PCI_BASE_ADDRESS_0 hermon.h 　
226
 HERMON_PCI_CONFIG_BAR_SIZEHERMON_PCI_CONFIG_BAR_SIZE 0x100000 hermon.h 　
227
 HERMON_PCI_UAR_BARHERMON_PCI_UAR_BAR PCI_BASE_ADDRESS_2 hermon.h 　
228
 HERMON_RESET_OFFSETHERMON_RESET_OFFSET 0x0f0010 hermon.h 　
229
 HERMON_RESET_MAGICHERMON_RESET_MAGIC 0x01000000UL hermon.h 　
230
 HERMON_RESET_WAIT_TIME_MSHERMON_RESET_WAIT_TIME_MS 1000 hermon.h 　
231
 HERMON_OPCODE_NOPHERMON_OPCODE_NOP 0x00 hermon.h 　
232
 HERMON_OPCODE_SENDHERMON_OPCODE_SEND 0x0a hermon.h 　
233
 HERMON_OPCODE_RECV_ERRORHERMON_OPCODE_RECV_ERROR 0xfe hermon.h 　
234
 HERMON_OPCODE_SEND_ERRORHERMON_OPCODE_SEND_ERROR 0xff hermon.h 　
235
 HERMON_HCR_QUERY_DEV_CAPHERMON_HCR_QUERY_DEV_CAP 0x0003 hermon.h 　
236
 HERMON_HCR_QUERY_FWHERMON_HCR_QUERY_FW 0x0004 hermon.h 　
237
 HERMON_HCR_INIT_HCAHERMON_HCR_INIT_HCA 0x0007 hermon.h 　
238
 HERMON_HCR_CLOSE_HCAHERMON_HCR_CLOSE_HCA 0x0008 hermon.h 　
239
 HERMON_HCR_INIT_PORTHERMON_HCR_INIT_PORT 0x0009 hermon.h 　
240
 HERMON_HCR_CLOSE_PORTHERMON_HCR_CLOSE_PORT 0x000a hermon.h 　
241
 HERMON_HCR_SW2HW_MPTHERMON_HCR_SW2HW_MPT 0x000d hermon.h 　
242
 HERMON_HCR_WRITE_MTTHERMON_HCR_WRITE_MTT 0x0011 hermon.h 　
243
 HERMON_HCR_MAP_EQHERMON_HCR_MAP_EQ 0x0012 hermon.h 　
244
 HERMON_HCR_SW2HW_EQHERMON_HCR_SW2HW_EQ 0x0013 hermon.h 　
245
 HERMON_HCR_HW2SW_EQHERMON_HCR_HW2SW_EQ 0x0014 hermon.h 　
246
 HERMON_HCR_QUERY_EQHERMON_HCR_QUERY_EQ 0x0015 hermon.h 　
247
 HERMON_HCR_SW2HW_CQHERMON_HCR_SW2HW_CQ 0x0016 hermon.h 　
248
 HERMON_HCR_HW2SW_CQHERMON_HCR_HW2SW_CQ 0x0017 hermon.h 　
249
 HERMON_HCR_RST2INIT_QPHERMON_HCR_RST2INIT_QP 0x0019 hermon.h 　
250
 HERMON_HCR_INIT2RTR_QPHERMON_HCR_INIT2RTR_QP 0x001a hermon.h 　
251
 HERMON_HCR_RTR2RTS_QPHERMON_HCR_RTR2RTS_QP 0x001b hermon.h 　
252
 HERMON_HCR_RTS2RTS_QPHERMON_HCR_RTS2RTS_QP 0x001c hermon.h 　
253
 HERMON_HCR_2RST_QPHERMON_HCR_2RST_QP 0x0021 hermon.h 　
254
 HERMON_HCR_QUERY_QPHERMON_HCR_QUERY_QP 0x0022 hermon.h 　
255
 HERMON_HCR_CONF_SPECIAL_QPHERMON_HCR_CONF_SPECIAL_QP 0x0023 hermon.h 　
256
 HERMON_HCR_MAD_IFCHERMON_HCR_MAD_IFC 0x0024 hermon.h 　
257
 HERMON_HCR_READ_MCGHERMON_HCR_READ_MCG 0x0025 hermon.h 　
258
 HERMON_HCR_WRITE_MCGHERMON_HCR_WRITE_MCG 0x0026 hermon.h 　
259
 HERMON_HCR_MGID_HASHHERMON_HCR_MGID_HASH 0x0027 hermon.h 　
260
 HERMON_HCR_SENSE_PORTHERMON_HCR_SENSE_PORT 0x004d hermon.h 　
261
 HERMON_HCR_RUN_FWHERMON_HCR_RUN_FW 0x0ff6 hermon.h 　
262
 HERMON_HCR_DISABLE_LAMHERMON_HCR_DISABLE_LAM 0x0ff7 hermon.h 　
263
 HERMON_HCR_ENABLE_LAMHERMON_HCR_ENABLE_LAM 0x0ff8 hermon.h 　
264
 HERMON_HCR_UNMAP_ICMHERMON_HCR_UNMAP_ICM 0x0ff9 hermon.h 　
265
 HERMON_HCR_MAP_ICMHERMON_HCR_MAP_ICM 0x0ffa hermon.h 　
266
 HERMON_HCR_UNMAP_ICM_AUXHERMON_HCR_UNMAP_ICM_AUX 0x0ffb hermon.h 　
267
 HERMON_HCR_MAP_ICM_AUXHERMON_HCR_MAP_ICM_AUX 0x0ffc hermon.h 　
268
 HERMON_HCR_SET_ICM_SIZEHERMON_HCR_SET_ICM_SIZE 0x0ffd hermon.h 　
269
 HERMON_HCR_UNMAP_FAHERMON_HCR_UNMAP_FA 0x0ffe hermon.h 　
270
 HERMON_HCR_MAP_FAHERMON_HCR_MAP_FA 0x0fff hermon.h 　
271
 HERMON_ST_RCHERMON_ST_RC 0x00 hermon.h 　
272
 HERMON_ST_UDHERMON_ST_UD 0x03 hermon.h 　
273
 HERMON_ST_MLXHERMON_ST_MLX 0x07 hermon.h 　
274
 HERMON_MTU_2048HERMON_MTU_2048 0x04 hermon.h 　
275
 HERMON_INVALID_LKEYHERMON_INVALID_LKEY 0x00000100UL hermon.h 　
276
 HERMON_PAGE_SIZEHERMON_PAGE_SIZE 4096 hermon.h 　
277
 HERMON_DB_POST_SND_OFFSETHERMON_DB_POST_SND_OFFSET 0x14 hermon.h 　
278
 HERMON_QP_OPT_PARAM_PM_STATEHERMON_QP_OPT_PARAM_PM_STATE 0x00000400UL hermon.h 　
279
 HERMON_QP_OPT_PARAM_QKEYHERMON_QP_OPT_PARAM_QKEY 0x00000020UL hermon.h 　
280
 HERMON_QP_OPT_PARAM_ALT_PATHHERMON_QP_OPT_PARAM_ALT_PATH 0x00000001UL hermon.h 　
281
 HERMON_MAP_EQHERMON_MAP_EQ ( 0UL << 31 ) hermon.h 　
282
 HERMON_UNMAP_EQHERMON_UNMAP_EQ ( 1UL << 31 ) hermon.h 　
283
 HERMON_EV_PORT_STATE_CHANGEHERMON_EV_PORT_STATE_CHANGE 0x09 hermon.h 　
284
 HERMON_SCHED_QP0HERMON_SCHED_QP0 0x3f hermon.h 　
285
 HERMON_SCHED_DEFAULTHERMON_SCHED_DEFAULT 0x83 hermon.h 　
286
 HERMON_PM_STATE_ARMEDHERMON_PM_STATE_ARMED 0x00 hermon.h 　
287
 HERMON_PM_STATE_REARMHERMON_PM_STATE_REARM 0x01 hermon.h 　
288
 HERMON_PM_STATE_MIGRATEDHERMON_PM_STATE_MIGRATED 0x03 hermon.h 　
289
 HERMON_RETRY_MAXHERMON_RETRY_MAX 0x07 hermon.h 　
290
 HERMON_PORT_TYPE_IBHERMON_PORT_TYPE_IB 1 hermon.h 　
291
 HERMON_MAX_GATHERHERMON_MAX_GATHER 2 hermon.h 　
292
 HERMON_MAX_SCATTERHERMON_MAX_SCATTER 1 hermon.h 　
293
 HERMON_CMPT_MAX_ENTRIESHERMON_CMPT_MAX_ENTRIES ( 1 << 24 ) hermon.h 　
294
 HERMON_UAR_NON_EQ_PAGEHERMON_UAR_NON_EQ_PAGE 128 hermon.h 　
295
 HERMON_MAX_MTTSHERMON_MAX_MTTS 64 hermon.h 　
296
 HERMON_SEND_WQE_ALIGNHERMON_SEND_WQE_ALIGN 128 hermon.h 　
297
 HERMON_RECV_WQE_ALIGNHERMON_RECV_WQE_ALIGN 16 hermon.h 　
298
 HERMON_NUM_SPECIAL_QPSHERMON_NUM_SPECIAL_QPS 8 hermon.h 　
299
 HERMON_RSVD_SPECIAL_QPSHERMON_RSVD_SPECIAL_QPS ( ( HERMON_NUM_SPECIAL_QPS << 1 ) - 1 ) hermon.h 　
300
 HERMON_MAX_QPSHERMON_MAX_QPS 8 hermon.h 　
301
 HERMON_QPN_RANDOM_MASKHERMON_QPN_RANDOM_MASK 0xfff000 hermon.h 　
302
 HERMON_MAX_CQSHERMON_MAX_CQS 8 hermon.h 　
303
 HERMON_MAX_EQSHERMON_MAX_EQS 8 hermon.h 　
304
 HERMON_NUM_EQESHERMON_NUM_EQES 4 hermon.h 　
305
 HERMON_GLOBAL_PDHERMON_GLOBAL_PD 0x123456 hermon.h 　
306
 HERMON_MKEY_PREFIXHERMON_MKEY_PREFIX 0x77000000UL hermon.h 　
307
 HERMON_HCR_BASEHERMON_HCR_BASE 0x80680 hermon.h 　
308
 HERMON_HCR_MAX_WAIT_MSHERMON_HCR_MAX_WAIT_MS 2000 hermon.h 　
309
 HERMON_MBOX_ALIGNHERMON_MBOX_ALIGN 4096 hermon.h 　
310
 HERMON_MBOX_SIZEHERMON_MBOX_SIZE 512 hermon.h 　
311
 HERMON_HCR_IN_MBOXHERMON_HCR_IN_MBOX 0x00001000UL hermon.h 　
312
 HERMON_HCR_OUT_MBOXHERMON_HCR_OUT_MBOX 0x00002000UL hermon.h 　
313
 LINDA_SENDBUFAVAIL_ALIGNLINDA_SENDBUFAVAIL_ALIGN 64 linda.h 　
314
 LINDA_BAR0_SIZELINDA_BAR0_SIZE 0x400000 linda.h 　
315
 LINDA_GPIO_SCLLINDA_GPIO_SCL 0 linda.h 　
316
 LINDA_GPIO_SDALINDA_GPIO_SDA 1 linda.h 　
317
 LINDA_EEPROM_GUID_OFFSETLINDA_EEPROM_GUID_OFFSET 3 linda.h 　
318
 LINDA_EEPROM_GUID_SIZELINDA_EEPROM_GUID_SIZE 8 linda.h 　
319
 LINDA_EEPROM_SERIAL_OFFSETLINDA_EEPROM_SERIAL_OFFSET 12 linda.h 　
320
 LINDA_EEPROM_SERIAL_SIZELINDA_EEPROM_SERIAL_SIZE 12 linda.h 　
321
 LINDA_MAX_SEND_BUFSLINDA_MAX_SEND_BUFS 32 linda.h 　
322
 LINDA_SEND_BUF_SIZELINDA_SEND_BUF_SIZE 4096 linda.h 　
323
 LINDA_NUM_CONTEXTSLINDA_NUM_CONTEXTS 5 linda.h 　
324
 LINDA_EAGER_ARRAY_SIZE_5CTX_0LINDA_EAGER_ARRAY_SIZE_5CTX_0 2048 linda.h 　
325
 LINDA_EAGER_ARRAY_SIZE_5CTX_OTHLINDA_EAGER_ARRAY_SIZE_5CTX_OTH 4096 linda.h 　
326
 LINDA_EAGER_ARRAY_SIZE_9CTX_0LINDA_EAGER_ARRAY_SIZE_9CTX_0 2048 linda.h 　
327
 LINDA_EAGER_ARRAY_SIZE_9CTX_OTHLINDA_EAGER_ARRAY_SIZE_9CTX_OTH 2048 linda.h 　
328
 LINDA_EAGER_ARRAY_SIZE_17CTX_0LINDA_EAGER_ARRAY_SIZE_17CTX_0 2048 linda.h 　
329
 LINDA_EAGER_ARRAY_SIZE_17CTX_OTLINDA_EAGER_ARRAY_SIZE_17CTX_OT 1024 linda.h 　
330
 LINDA_EAGER_BUFFER_ALIGNLINDA_EAGER_BUFFER_ALIGN 2048 linda.h 　
331
 LINDA_RECV_HEADER_COUNTLINDA_RECV_HEADER_COUNT 8 linda.h 　
332
 LINDA_RECV_HEADER_SIZELINDA_RECV_HEADER_SIZE 96 linda.h 　
333
 LINDA_RECV_HEADERS_SIZELINDA_RECV_HEADERS_SIZE ( LINDA_RECV_HEADER_SIZE * LINDA_RECV_HEADER_COUNT ) linda.h 　
334
 LINDA_RECV_HEADERS_ALIGNLINDA_RECV_HEADERS_ALIGN 64 linda.h 　
335
 LINDA_RECV_PAYLOAD_SIZELINDA_RECV_PAYLOAD_SIZE 2048 linda.h 　
336
 LINDA_QP_IDETHLINDA_QP_IDETH 0xdead0 linda.h 　
337
 LINDA_EPB_REQUEST_MAX_WAIT_USLINDA_EPB_REQUEST_MAX_WAIT_US 500 linda.h 　
338
 LINDA_EPB_XACT_MAX_WAIT_USLINDA_EPB_XACT_MAX_WAIT_US 500 linda.h 　
339
 LINDA_EPB_CS_SERDESLINDA_EPB_CS_SERDES 1 linda.h 　
340
 LINDA_EPB_CS_UCLINDA_EPB_CS_UC 2 linda.h 　
341
 LINDA_EPB_WRITELINDA_EPB_WRITE 0 linda.h 　
342
 LINDA_EPB_READLINDA_EPB_READ 1 linda.h 　
343
 LINDA_EPB_UC_CHANNELLINDA_EPB_UC_CHANNEL 6 linda.h 　
344
 LINDA_EPB_UC_CTLLINDA_EPB_UC_CTL LINDA_EPB_UC_LOC ( 0 ) linda.h 　
345
 LINDA_EPB_UC_CTL_WRITELINDA_EPB_UC_CTL_WRITE 1 linda.h 　
346
 LINDA_EPB_UC_CTL_READLINDA_EPB_UC_CTL_READ 2 linda.h 　
347
 LINDA_EPB_UC_ADDR_LOLINDA_EPB_UC_ADDR_LO LINDA_EPB_UC_LOC ( 2 ) linda.h 　
348
 LINDA_EPB_UC_ADDR_HILINDA_EPB_UC_ADDR_HI LINDA_EPB_UC_LOC ( 3 ) linda.h 　
349
 LINDA_EPB_UC_DATALINDA_EPB_UC_DATA LINDA_EPB_UC_LOC ( 4 ) linda.h 　
350
 LINDA_EPB_UC_CHUNK_SIZELINDA_EPB_UC_CHUNK_SIZE 64 linda.h 　
351
 LINDA_TRIM_DONE_MAX_WAIT_MSLINDA_TRIM_DONE_MAX_WAIT_MS 1000 linda.h 　
352
 QIB_7220_Revision_offsetQIB_7220_Revision_offset 0x00000000UL qib_7220_regs.h 　
353
 QIB_7220_Control_offsetQIB_7220_Control_offset 0x00000008UL qib_7220_regs.h 　
354
 QIB_7220_PageAlign_offsetQIB_7220_PageAlign_offset 0x00000010UL qib_7220_regs.h 　
355
 QIB_7220_PortCnt_offsetQIB_7220_PortCnt_offset 0x00000018UL qib_7220_regs.h 　
356
 QIB_7220_DbgPortSel_offsetQIB_7220_DbgPortSel_offset 0x00000020UL qib_7220_regs.h 　
357
 QIB_7220_DebugSigsIntSel_offsetQIB_7220_DebugSigsIntSel_offset 0x00000028UL qib_7220_regs.h 　
358
 QIB_7220_SendRegBase_offsetQIB_7220_SendRegBase_offset 0x00000030UL qib_7220_regs.h 　
359
 QIB_7220_UserRegBase_offsetQIB_7220_UserRegBase_offset 0x00000038UL qib_7220_regs.h 　
360
 QIB_7220_CntrRegBase_offsetQIB_7220_CntrRegBase_offset 0x00000040UL qib_7220_regs.h 　
361
 QIB_7220_Scratch_offsetQIB_7220_Scratch_offset 0x00000048UL qib_7220_regs.h 　
362
 QIB_7220_REG_000050_offsetQIB_7220_REG_000050_offset 0x00000050UL qib_7220_regs.h 　
363
 QIB_7220_IntBlocked_offsetQIB_7220_IntBlocked_offset 0x00000060UL qib_7220_regs.h 　
364
 QIB_7220_IntMask_offsetQIB_7220_IntMask_offset 0x00000068UL qib_7220_regs.h 　
365
 QIB_7220_IntStatus_offsetQIB_7220_IntStatus_offset 0x00000070UL qib_7220_regs.h 　
366
 QIB_7220_IntClear_offsetQIB_7220_IntClear_offset 0x00000078UL qib_7220_regs.h 　
367
 QIB_7220_ErrMask_offsetQIB_7220_ErrMask_offset 0x00000080UL qib_7220_regs.h 　
368
 QIB_7220_ErrStatus_offsetQIB_7220_ErrStatus_offset 0x00000088UL qib_7220_regs.h 　
369
 QIB_7220_ErrClear_offsetQIB_7220_ErrClear_offset 0x00000090UL qib_7220_regs.h 　
370
 QIB_7220_HwErrMask_offsetQIB_7220_HwErrMask_offset 0x00000098UL qib_7220_regs.h 　
371
 QIB_7220_HwErrStatus_offsetQIB_7220_HwErrStatus_offset 0x000000a0UL qib_7220_regs.h 　
372
 QIB_7220_HwErrClear_offsetQIB_7220_HwErrClear_offset 0x000000a8UL qib_7220_regs.h 　
373
 QIB_7220_HwDiagCtrl_offsetQIB_7220_HwDiagCtrl_offset 0x000000b0UL qib_7220_regs.h 　
374
 QIB_7220_REG_0000B8_offsetQIB_7220_REG_0000B8_offset 0x000000b8UL qib_7220_regs.h 　
375
 QIB_7220_IBCStatus_offsetQIB_7220_IBCStatus_offset 0x000000c0UL qib_7220_regs.h 　
376
 QIB_7220_IBCCtrl_offsetQIB_7220_IBCCtrl_offset 0x000000c8UL qib_7220_regs.h 　
377
 QIB_7220_EXTStatus_offsetQIB_7220_EXTStatus_offset 0x000000d0UL qib_7220_regs.h 　
378
 QIB_7220_EXTCtrl_offsetQIB_7220_EXTCtrl_offset 0x000000d8UL qib_7220_regs.h 　
379
 QIB_7220_GPIOOut_offsetQIB_7220_GPIOOut_offset 0x000000e0UL qib_7220_regs.h 　
380
 QIB_7220_GPIOMask_offsetQIB_7220_GPIOMask_offset 0x000000e8UL qib_7220_regs.h 　
381
 QIB_7220_GPIOStatus_offsetQIB_7220_GPIOStatus_offset 0x000000f0UL qib_7220_regs.h 　
382
 QIB_7220_GPIOClear_offsetQIB_7220_GPIOClear_offset 0x000000f8UL qib_7220_regs.h 　
383
 QIB_7220_RcvCtrl_offsetQIB_7220_RcvCtrl_offset 0x00000100UL qib_7220_regs.h 　
384
 QIB_7220_RcvBTHQP_offsetQIB_7220_RcvBTHQP_offset 0x00000108UL qib_7220_regs.h 　
385
 QIB_7220_RcvHdrSize_offsetQIB_7220_RcvHdrSize_offset 0x00000110UL qib_7220_regs.h 　
386
 QIB_7220_RcvHdrCnt_offsetQIB_7220_RcvHdrCnt_offset 0x00000118UL qib_7220_regs.h 　
387
 QIB_7220_RcvHdrEntSize_offsetQIB_7220_RcvHdrEntSize_offset 0x00000120UL qib_7220_regs.h 　
388
 QIB_7220_RcvTIDBase_offsetQIB_7220_RcvTIDBase_offset 0x00000128UL qib_7220_regs.h 　
389
 QIB_7220_RcvTIDCnt_offsetQIB_7220_RcvTIDCnt_offset 0x00000130UL qib_7220_regs.h 　
390
 QIB_7220_RcvEgrBase_offsetQIB_7220_RcvEgrBase_offset 0x00000138UL qib_7220_regs.h 　
391
 QIB_7220_RcvEgrCnt_offsetQIB_7220_RcvEgrCnt_offset 0x00000140UL qib_7220_regs.h 　
392
 QIB_7220_RcvBufBase_offsetQIB_7220_RcvBufBase_offset 0x00000148UL qib_7220_regs.h 　
393
 QIB_7220_RcvBufSize_offsetQIB_7220_RcvBufSize_offset 0x00000150UL qib_7220_regs.h 　
394
 QIB_7220_RxIntMemBase_offsetQIB_7220_RxIntMemBase_offset 0x00000158UL qib_7220_regs.h 　
395
 QIB_7220_RxIntMemSize_offsetQIB_7220_RxIntMemSize_offset 0x00000160UL qib_7220_regs.h 　
396
 QIB_7220_RcvPartitionKey_offsetQIB_7220_RcvPartitionKey_offset 0x00000168UL qib_7220_regs.h 　
397
 QIB_7220_RcvQPMulticastPort_offQIB_7220_RcvQPMulticastPort_off 0x00000170UL qib_7220_regs.h 　
398
 QIB_7220_RcvPktLEDCnt_offsetQIB_7220_RcvPktLEDCnt_offset 0x00000178UL qib_7220_regs.h 　
399
 QIB_7220_IBCDDRCtrl_offsetQIB_7220_IBCDDRCtrl_offset 0x00000180UL qib_7220_regs.h 　
400
 QIB_7220_HRTBT_GUID_offsetQIB_7220_HRTBT_GUID_offset 0x00000188UL qib_7220_regs.h 　
401
 QIB_7220_IB_SDTEST_IF_TX_offsetQIB_7220_IB_SDTEST_IF_TX_offset 0x00000190UL qib_7220_regs.h 　
402
 QIB_7220_IB_SDTEST_IF_RX_offsetQIB_7220_IB_SDTEST_IF_RX_offset 0x00000198UL qib_7220_regs.h 　
403
 QIB_7220_IBCDDRCtrl2_offsetQIB_7220_IBCDDRCtrl2_offset 0x000001a0UL qib_7220_regs.h 　
404
 QIB_7220_IBCDDRStatus_offsetQIB_7220_IBCDDRStatus_offset 0x000001a8UL qib_7220_regs.h 　
405
 QIB_7220_JIntReload_offsetQIB_7220_JIntReload_offset 0x000001b0UL qib_7220_regs.h 　
406
 QIB_7220_IBNCModeCtrl_offsetQIB_7220_IBNCModeCtrl_offset 0x000001b8UL qib_7220_regs.h 　
407
 QIB_7220_SendCtrl_offsetQIB_7220_SendCtrl_offset 0x000001c0UL qib_7220_regs.h 　
408
 QIB_7220_SendBufBase_offsetQIB_7220_SendBufBase_offset 0x000001c8UL qib_7220_regs.h 　
409
 QIB_7220_SendBufSize_offsetQIB_7220_SendBufSize_offset 0x000001d0UL qib_7220_regs.h 　
410
 QIB_7220_SendBufCnt_offsetQIB_7220_SendBufCnt_offset 0x000001d8UL qib_7220_regs.h 　
411
 QIB_7220_SendBufAvailAddr_offseQIB_7220_SendBufAvailAddr_offse 0x000001e0UL qib_7220_regs.h 　
412
 QIB_7220_TxIntMemBase_offsetQIB_7220_TxIntMemBase_offset 0x000001e8UL qib_7220_regs.h 　
413
 QIB_7220_TxIntMemSize_offsetQIB_7220_TxIntMemSize_offset 0x000001f0UL qib_7220_regs.h 　
414
 QIB_7220_SendDmaBase_offsetQIB_7220_SendDmaBase_offset 0x000001f8UL qib_7220_regs.h 　
415
 QIB_7220_SendDmaLenGen_offsetQIB_7220_SendDmaLenGen_offset 0x00000200UL qib_7220_regs.h 　
416
 QIB_7220_SendDmaTail_offsetQIB_7220_SendDmaTail_offset 0x00000208UL qib_7220_regs.h 　
417
 QIB_7220_SendDmaHead_offsetQIB_7220_SendDmaHead_offset 0x00000210UL qib_7220_regs.h 　
418
 QIB_7220_SendDmaHeadAddr_offsetQIB_7220_SendDmaHeadAddr_offset 0x00000218UL qib_7220_regs.h 　
419
 QIB_7220_SendDmaBufMask0_offsetQIB_7220_SendDmaBufMask0_offset 0x00000220UL qib_7220_regs.h 　
420
 QIB_7220_SendDmaStatus_offsetQIB_7220_SendDmaStatus_offset 0x00000238UL qib_7220_regs.h 　
421
 QIB_7220_SendBufErr0_offsetQIB_7220_SendBufErr0_offset 0x00000240UL qib_7220_regs.h 　
422
 QIB_7220_REG_000258_offsetQIB_7220_REG_000258_offset 0x00000258UL qib_7220_regs.h 　
423
 QIB_7220_AvailUpdCount_offsetQIB_7220_AvailUpdCount_offset 0x00000268UL qib_7220_regs.h 　
424
 QIB_7220_RcvHdrAddr0_offsetQIB_7220_RcvHdrAddr0_offset 0x00000270UL qib_7220_regs.h 　
425
 QIB_7220_REG_0002F8_offsetQIB_7220_REG_0002F8_offset 0x000002f8UL qib_7220_regs.h 　
426
 QIB_7220_RcvHdrTailAddr0_offsetQIB_7220_RcvHdrTailAddr0_offset 0x00000300UL qib_7220_regs.h 　
427
 QIB_7220_REG_000388_offsetQIB_7220_REG_000388_offset 0x00000388UL qib_7220_regs.h 　
428
 QIB_7220_ibsd_epb_access_ctrl_oQIB_7220_ibsd_epb_access_ctrl_o 0x000003c0UL qib_7220_regs.h 　
429
 QIB_7220_ibsd_epb_transaction_rQIB_7220_ibsd_epb_transaction_r 0x000003c8UL qib_7220_regs.h 　
430
 QIB_7220_REG_0003D0_offsetQIB_7220_REG_0003D0_offset 0x000003d0UL qib_7220_regs.h 　
431
 QIB_7220_XGXSCfg_offsetQIB_7220_XGXSCfg_offset 0x000003d8UL qib_7220_regs.h 　
432
 QIB_7220_IBSerDesCtrl_offsetQIB_7220_IBSerDesCtrl_offset 0x000003e0UL qib_7220_regs.h 　
433
 QIB_7220_EEPCtlStat_offsetQIB_7220_EEPCtlStat_offset 0x000003e8UL qib_7220_regs.h 　
434
 QIB_7220_EEPAddrCmd_offsetQIB_7220_EEPAddrCmd_offset 0x000003f0UL qib_7220_regs.h 　
435
 QIB_7220_EEPData_offsetQIB_7220_EEPData_offset 0x000003f8UL qib_7220_regs.h 　
436
 QIB_7220_pciesd_epb_access_ctrlQIB_7220_pciesd_epb_access_ctrl 0x00000400UL qib_7220_regs.h 　
437
 QIB_7220_pciesd_epb_transactionQIB_7220_pciesd_epb_transaction 0x00000408UL qib_7220_regs.h 　
438
 QIB_7220_efuse_control_reg_offsQIB_7220_efuse_control_reg_offs 0x00000410UL qib_7220_regs.h 　
439
 QIB_7220_efuse_rddata0_reg_offsQIB_7220_efuse_rddata0_reg_offs 0x00000418UL qib_7220_regs.h 　
440
 QIB_7220_procmon_register_offseQIB_7220_procmon_register_offse 0x00000438UL qib_7220_regs.h 　
441
 QIB_7220_PcieRbufTestReg0_offseQIB_7220_PcieRbufTestReg0_offse 0x00000440UL qib_7220_regs.h 　
442
 QIB_7220_PcieRBufTestReg1_offseQIB_7220_PcieRBufTestReg1_offse 0x00000448UL qib_7220_regs.h 　
443
 QIB_7220_SPC_JTAG_ACCESS_REG_ofQIB_7220_SPC_JTAG_ACCESS_REG_of 0x00000460UL qib_7220_regs.h 　
444
 QIB_7220_LAControlReg_offsetQIB_7220_LAControlReg_offset 0x00000468UL qib_7220_regs.h 　
445
 QIB_7220_GPIODebugSelReg_offsetQIB_7220_GPIODebugSelReg_offset 0x00000470UL qib_7220_regs.h 　
446
 QIB_7220_DebugPortValueReg_offsQIB_7220_DebugPortValueReg_offs 0x00000478UL qib_7220_regs.h 　
447
 QIB_7220_SendDmaBufUsed0_offsetQIB_7220_SendDmaBufUsed0_offset 0x00000480UL qib_7220_regs.h 　
448
 QIB_7220_SendDmaReqTagUsed_offsQIB_7220_SendDmaReqTagUsed_offs 0x00000498UL qib_7220_regs.h 　
449
 QIB_7220_efuse_pgm_data0_offsetQIB_7220_efuse_pgm_data0_offset 0x000004a0UL qib_7220_regs.h 　
450
 QIB_7220_MEM_0004B0_offsetQIB_7220_MEM_0004B0_offset 0x000004b0UL qib_7220_regs.h 　
451
 QIB_7220_SerDes_DDSRXEQ0_offsetQIB_7220_SerDes_DDSRXEQ0_offset 0x00000500UL qib_7220_regs.h 　
452
 QIB_7220_MEM_0005F0_offsetQIB_7220_MEM_0005F0_offset 0x000005f0UL qib_7220_regs.h 　
453
 QIB_7220_LAMemory_offsetQIB_7220_LAMemory_offset 0x00000600UL qib_7220_regs.h 　
454
 QIB_7220_MEM_0007F0_offsetQIB_7220_MEM_0007F0_offset 0x000007f0UL qib_7220_regs.h 　
455
 QIB_7220_SendBufAvail0_offsetQIB_7220_SendBufAvail0_offset 0x00001000UL qib_7220_regs.h 　
456
 QIB_7220_MEM_001028_offsetQIB_7220_MEM_001028_offset 0x00001028UL qib_7220_regs.h 　
457
 QIB_7220_LBIntCnt_offsetQIB_7220_LBIntCnt_offset 0x00013000UL qib_7220_regs.h 　
458
 QIB_7220_LBFlowStallCnt_offsetQIB_7220_LBFlowStallCnt_offset 0x00013008UL qib_7220_regs.h 　
459
 QIB_7220_TxSDmaDescCnt_offsetQIB_7220_TxSDmaDescCnt_offset 0x00013010UL qib_7220_regs.h 　
460
 QIB_7220_TxUnsupVLErrCnt_offsetQIB_7220_TxUnsupVLErrCnt_offset 0x00013018UL qib_7220_regs.h 　
461
 QIB_7220_TxDataPktCnt_offsetQIB_7220_TxDataPktCnt_offset 0x00013020UL qib_7220_regs.h 　
462
 QIB_7220_TxFlowPktCnt_offsetQIB_7220_TxFlowPktCnt_offset 0x00013028UL qib_7220_regs.h 　
463
 QIB_7220_TxDwordCnt_offsetQIB_7220_TxDwordCnt_offset 0x00013030UL qib_7220_regs.h 　
464
 QIB_7220_TxLenErrCnt_offsetQIB_7220_TxLenErrCnt_offset 0x00013038UL qib_7220_regs.h 　
465
 QIB_7220_TxMaxMinLenErrCnt_offsQIB_7220_TxMaxMinLenErrCnt_offs 0x00013040UL qib_7220_regs.h 　
466
 QIB_7220_TxUnderrunCnt_offsetQIB_7220_TxUnderrunCnt_offset 0x00013048UL qib_7220_regs.h 　
467
 QIB_7220_TxFlowStallCnt_offsetQIB_7220_TxFlowStallCnt_offset 0x00013050UL qib_7220_regs.h 　
468
 QIB_7220_TxDroppedPktCnt_offsetQIB_7220_TxDroppedPktCnt_offset 0x00013058UL qib_7220_regs.h 　
469
 QIB_7220_RxDroppedPktCnt_offsetQIB_7220_RxDroppedPktCnt_offset 0x00013060UL qib_7220_regs.h 　
470
 QIB_7220_RxDataPktCnt_offsetQIB_7220_RxDataPktCnt_offset 0x00013068UL qib_7220_regs.h 　
471
 QIB_7220_RxFlowPktCnt_offsetQIB_7220_RxFlowPktCnt_offset 0x00013070UL qib_7220_regs.h 　
472
 QIB_7220_RxDwordCnt_offsetQIB_7220_RxDwordCnt_offset 0x00013078UL qib_7220_regs.h 　
473
 QIB_7220_RxLenErrCnt_offsetQIB_7220_RxLenErrCnt_offset 0x00013080UL qib_7220_regs.h 　
474
 QIB_7220_RxMaxMinLenErrCnt_offsQIB_7220_RxMaxMinLenErrCnt_offs 0x00013088UL qib_7220_regs.h 　
475
 QIB_7220_RxICRCErrCnt_offsetQIB_7220_RxICRCErrCnt_offset 0x00013090UL qib_7220_regs.h 　
476
 QIB_7220_RxVCRCErrCnt_offsetQIB_7220_RxVCRCErrCnt_offset 0x00013098UL qib_7220_regs.h 　
477
 QIB_7220_RxFlowCtrlViolCnt_offsQIB_7220_RxFlowCtrlViolCnt_offs 0x000130a0UL qib_7220_regs.h 　
478
 QIB_7220_RxVersionErrCnt_offsetQIB_7220_RxVersionErrCnt_offset 0x000130a8UL qib_7220_regs.h 　
479
 QIB_7220_RxLinkMalformCnt_offseQIB_7220_RxLinkMalformCnt_offse 0x000130b0UL qib_7220_regs.h 　
480
 QIB_7220_RxEBPCnt_offsetQIB_7220_RxEBPCnt_offset 0x000130b8UL qib_7220_regs.h 　
481
 QIB_7220_RxLPCRCErrCnt_offsetQIB_7220_RxLPCRCErrCnt_offset 0x000130c0UL qib_7220_regs.h 　
482
 QIB_7220_RxBufOvflCnt_offsetQIB_7220_RxBufOvflCnt_offset 0x000130c8UL qib_7220_regs.h 　
483
 QIB_7220_RxTIDFullErrCnt_offsetQIB_7220_RxTIDFullErrCnt_offset 0x000130d0UL qib_7220_regs.h 　
484
 QIB_7220_RxTIDValidErrCnt_offseQIB_7220_RxTIDValidErrCnt_offse 0x000130d8UL qib_7220_regs.h 　
485
 QIB_7220_RxPKeyMismatchCnt_offsQIB_7220_RxPKeyMismatchCnt_offs 0x000130e0UL qib_7220_regs.h 　
486
 QIB_7220_RxP0HdrEgrOvflCnt_offsQIB_7220_RxP0HdrEgrOvflCnt_offs 0x000130e8UL qib_7220_regs.h 　
487
 QIB_7220_IBStatusChangeCnt_offsQIB_7220_IBStatusChangeCnt_offs 0x00013170UL qib_7220_regs.h 　
488
 QIB_7220_IBLinkErrRecoveryCnt_oQIB_7220_IBLinkErrRecoveryCnt_o 0x00013178UL qib_7220_regs.h 　
489
 QIB_7220_IBLinkDownedCnt_offsetQIB_7220_IBLinkDownedCnt_offset 0x00013180UL qib_7220_regs.h 　
490
 QIB_7220_IBSymbolErrCnt_offsetQIB_7220_IBSymbolErrCnt_offset 0x00013188UL qib_7220_regs.h 　
491
 QIB_7220_RxVL15DroppedPktCnt_ofQIB_7220_RxVL15DroppedPktCnt_of 0x00013190UL qib_7220_regs.h 　
492
 QIB_7220_RxOtherLocalPhyErrCnt_QIB_7220_RxOtherLocalPhyErrCnt_ 0x00013198UL qib_7220_regs.h 　
493
 QIB_7220_PcieRetryBufDiagQwordCQIB_7220_PcieRetryBufDiagQwordC 0x000131a0UL qib_7220_regs.h 　
494
 QIB_7220_ExcessBufferOvflCnt_ofQIB_7220_ExcessBufferOvflCnt_of 0x000131a8UL qib_7220_regs.h 　
495
 QIB_7220_LocalLinkIntegrityErrCQIB_7220_LocalLinkIntegrityErrC 0x000131b0UL qib_7220_regs.h 　
496
 QIB_7220_RxVlErrCnt_offsetQIB_7220_RxVlErrCnt_offset 0x000131b8UL qib_7220_regs.h 　
497
 QIB_7220_RxDlidFltrCnt_offsetQIB_7220_RxDlidFltrCnt_offset 0x000131c0UL qib_7220_regs.h 　
498
 QIB_7220_CNT_0131C8_offsetQIB_7220_CNT_0131C8_offset 0x000131c8UL qib_7220_regs.h 　
499
 QIB_7220_PSStat_offsetQIB_7220_PSStat_offset 0x00013200UL qib_7220_regs.h 　
500
 QIB_7220_PSStart_offsetQIB_7220_PSStart_offset 0x00013208UL qib_7220_regs.h 　
501
 QIB_7220_PSInterval_offsetQIB_7220_PSInterval_offset 0x00013210UL qib_7220_regs.h 　
502
 QIB_7220_PSRcvDataCount_offsetQIB_7220_PSRcvDataCount_offset 0x00013218UL qib_7220_regs.h 　
503
 QIB_7220_PSRcvPktsCount_offsetQIB_7220_PSRcvPktsCount_offset 0x00013220UL qib_7220_regs.h 　
504
 QIB_7220_PSXmitDataCount_offsetQIB_7220_PSXmitDataCount_offset 0x00013228UL qib_7220_regs.h 　
505
 QIB_7220_PSXmitPktsCount_offsetQIB_7220_PSXmitPktsCount_offset 0x00013230UL qib_7220_regs.h 　
506
 QIB_7220_PSXmitWaitCount_offsetQIB_7220_PSXmitWaitCount_offset 0x00013238UL qib_7220_regs.h 　
507
 QIB_7220_CNT_013240_offsetQIB_7220_CNT_013240_offset 0x00013240UL qib_7220_regs.h 　
508
 QIB_7220_RcvEgrArray_offsetQIB_7220_RcvEgrArray_offset 0x00014000UL qib_7220_regs.h 　
509
 QIB_7220_MEM_038000_offsetQIB_7220_MEM_038000_offset 0x00038000UL qib_7220_regs.h 　
510
 QIB_7220_RcvTIDArray0_offsetQIB_7220_RcvTIDArray0_offset 0x00053000UL qib_7220_regs.h 　
511
 QIB_7220_PIOLaunchFIFO_offsetQIB_7220_PIOLaunchFIFO_offset 0x00064000UL qib_7220_regs.h 　
512
 QIB_7220_MEM_064480_offsetQIB_7220_MEM_064480_offset 0x00064480UL qib_7220_regs.h 　
513
 QIB_7220_SendPIOpbcCache_offsetQIB_7220_SendPIOpbcCache_offset 0x00064800UL qib_7220_regs.h 　
514
 QIB_7220_MEM_064C80_offsetQIB_7220_MEM_064C80_offset 0x00064c80UL qib_7220_regs.h 　
515
 QIB_7220_PreLaunchFIFO_offsetQIB_7220_PreLaunchFIFO_offset 0x00065000UL qib_7220_regs.h 　
516
 QIB_7220_MEM_065080_offsetQIB_7220_MEM_065080_offset 0x00065080UL qib_7220_regs.h 　
517
 QIB_7220_ScoreBoard_offsetQIB_7220_ScoreBoard_offset 0x00065400UL qib_7220_regs.h 　
518
 QIB_7220_MEM_065440_offsetQIB_7220_MEM_065440_offset 0x00065440UL qib_7220_regs.h 　
519
 QIB_7220_DescriptorFIFO_offsetQIB_7220_DescriptorFIFO_offset 0x00065800UL qib_7220_regs.h 　
520
 QIB_7220_MEM_065880_offsetQIB_7220_MEM_065880_offset 0x00065880UL qib_7220_regs.h 　
521
 QIB_7220_RcvBuf1_offsetQIB_7220_RcvBuf1_offset 0x00072000UL qib_7220_regs.h 　
522
 QIB_7220_MEM_074800_offsetQIB_7220_MEM_074800_offset 0x00074800UL qib_7220_regs.h 　
523
 QIB_7220_RcvBuf2_offsetQIB_7220_RcvBuf2_offset 0x00075000UL qib_7220_regs.h 　
524
 QIB_7220_MEM_076400_offsetQIB_7220_MEM_076400_offset 0x00076400UL qib_7220_regs.h 　
525
 QIB_7220_RcvFlags_offsetQIB_7220_RcvFlags_offset 0x00077000UL qib_7220_regs.h 　
526
 QIB_7220_MEM_078400_offsetQIB_7220_MEM_078400_offset 0x00078400UL qib_7220_regs.h 　
527
 QIB_7220_RcvLookupBuf1_offsetQIB_7220_RcvLookupBuf1_offset 0x00079000UL qib_7220_regs.h 　
528
 QIB_7220_MEM_07A400_offsetQIB_7220_MEM_07A400_offset 0x0007a400UL qib_7220_regs.h 　
529
 QIB_7220_RcvDMADatBuf_offsetQIB_7220_RcvDMADatBuf_offset 0x0007b000UL qib_7220_regs.h 　
530
 QIB_7220_RcvDMAHdrBuf_offsetQIB_7220_RcvDMAHdrBuf_offset 0x0007b800UL qib_7220_regs.h 　
531
 QIB_7220_MiscRXEIntMem_offsetQIB_7220_MiscRXEIntMem_offset 0x0007c000UL qib_7220_regs.h 　
532
 QIB_7220_MEM_07D400_offsetQIB_7220_MEM_07D400_offset 0x0007d400UL qib_7220_regs.h 　
533
 QIB_7220_PCIERcvBuf_offsetQIB_7220_PCIERcvBuf_offset 0x00080000UL qib_7220_regs.h 　
534
 QIB_7220_PCIERetryBuf_offsetQIB_7220_PCIERetryBuf_offset 0x00084000UL qib_7220_regs.h 　
535
 QIB_7220_PCIERcvBufRdToWrAddr_oQIB_7220_PCIERcvBufRdToWrAddr_o 0x00088000UL qib_7220_regs.h 　
536
 QIB_7220_PCIECplBuf_offsetQIB_7220_PCIECplBuf_offset 0x00090000UL qib_7220_regs.h 　
537
 QIB_7220_IBSerDesMappTable_offsQIB_7220_IBSerDesMappTable_offs 0x00094000UL qib_7220_regs.h 　
538
 QIB_7220_MEM_095000_offsetQIB_7220_MEM_095000_offset 0x00095000UL qib_7220_regs.h 　
539
 QIB_7220_SendBuf0_MA_offsetQIB_7220_SendBuf0_MA_offset 0x00100000UL qib_7220_regs.h 　
540
 QIB_7220_MEM_1A0000_offsetQIB_7220_MEM_1A0000_offset 0x001a0000UL qib_7220_regs.h 　
541
 QIB_7220_RcvHdrTail0_offsetQIB_7220_RcvHdrTail0_offset 0x00200000UL qib_7220_regs.h 　
542
 QIB_7220_RcvHdrHead0_offsetQIB_7220_RcvHdrHead0_offset 0x00200008UL qib_7220_regs.h 　
543
 QIB_7220_RcvEgrIndexTail0_offseQIB_7220_RcvEgrIndexTail0_offse 0x00200010UL qib_7220_regs.h 　
544
 QIB_7220_RcvEgrIndexHead0_offseQIB_7220_RcvEgrIndexHead0_offse 0x00200018UL qib_7220_regs.h 　
545
 QIB_7220_MEM_200020_offsetQIB_7220_MEM_200020_offset 0x00200020UL qib_7220_regs.h 　
546
 QIB_7220_RcvHdrTail1_offsetQIB_7220_RcvHdrTail1_offset 0x00210000UL qib_7220_regs.h 　
547
 QIB_7220_RcvHdrHead1_offsetQIB_7220_RcvHdrHead1_offset 0x00210008UL qib_7220_regs.h 　
548
 QIB_7220_RcvEgrIndexTail1_offseQIB_7220_RcvEgrIndexTail1_offse 0x00210010UL qib_7220_regs.h 　
549
 QIB_7220_RcvEgrIndexHead1_offseQIB_7220_RcvEgrIndexHead1_offse 0x00210018UL qib_7220_regs.h 　
550
 QIB_7220_MEM_210020_offsetQIB_7220_MEM_210020_offset 0x00210020UL qib_7220_regs.h 　
551
 QIB_7220_RcvHdrTail2_offsetQIB_7220_RcvHdrTail2_offset 0x00220000UL qib_7220_regs.h 　
552
 QIB_7220_RcvHdrHead2_offsetQIB_7220_RcvHdrHead2_offset 0x00220008UL qib_7220_regs.h 　
553
 QIB_7220_RcvEgrIndexTail2_offseQIB_7220_RcvEgrIndexTail2_offse 0x00220010UL qib_7220_regs.h 　
554
 QIB_7220_RcvEgrIndexHead2_offseQIB_7220_RcvEgrIndexHead2_offse 0x00220018UL qib_7220_regs.h 　
555
 QIB_7220_MEM_220020_offsetQIB_7220_MEM_220020_offset 0x00220020UL qib_7220_regs.h 　
556
 QIB_7220_RcvHdrTail3_offsetQIB_7220_RcvHdrTail3_offset 0x00230000UL qib_7220_regs.h 　
557
 QIB_7220_RcvHdrHead3_offsetQIB_7220_RcvHdrHead3_offset 0x00230008UL qib_7220_regs.h 　
558
 QIB_7220_RcvEgrIndexTail3_offseQIB_7220_RcvEgrIndexTail3_offse 0x00230010UL qib_7220_regs.h 　
559
 QIB_7220_RcvEgrIndexHead3_offseQIB_7220_RcvEgrIndexHead3_offse 0x00230018UL qib_7220_regs.h 　
560
 QIB_7220_MEM_230020_offsetQIB_7220_MEM_230020_offset 0x00230020UL qib_7220_regs.h 　
561
 QIB_7220_RcvHdrTail4_offsetQIB_7220_RcvHdrTail4_offset 0x00240000UL qib_7220_regs.h 　
562
 QIB_7220_RcvHdrHead4_offsetQIB_7220_RcvHdrHead4_offset 0x00240008UL qib_7220_regs.h 　
563
 QIB_7220_RcvEgrIndexTail4_offseQIB_7220_RcvEgrIndexTail4_offse 0x00240010UL qib_7220_regs.h 　
564
 QIB_7220_RcvEgrIndexHead4_offseQIB_7220_RcvEgrIndexHead4_offse 0x00240018UL qib_7220_regs.h 　
565
 QIB_7220_MEM_240020_offsetQIB_7220_MEM_240020_offset 0x00240020UL qib_7220_regs.h 　
566
 QIB_7220_RcvHdrTail5_offsetQIB_7220_RcvHdrTail5_offset 0x00250000UL qib_7220_regs.h 　
567
 QIB_7220_RcvHdrHead5_offsetQIB_7220_RcvHdrHead5_offset 0x00250008UL qib_7220_regs.h 　
568
 QIB_7220_RcvEgrIndexTail5_offseQIB_7220_RcvEgrIndexTail5_offse 0x00250010UL qib_7220_regs.h 　
569
 QIB_7220_RcvEgrIndexHead5_offseQIB_7220_RcvEgrIndexHead5_offse 0x00250018UL qib_7220_regs.h 　
570
 QIB_7220_MEM_250020_offsetQIB_7220_MEM_250020_offset 0x00250020UL qib_7220_regs.h 　
571
 QIB_7220_RcvHdrTail6_offsetQIB_7220_RcvHdrTail6_offset 0x00260000UL qib_7220_regs.h 　
572
 QIB_7220_RcvHdrHead6_offsetQIB_7220_RcvHdrHead6_offset 0x00260008UL qib_7220_regs.h 　
573
 QIB_7220_RcvEgrIndexTail6_offseQIB_7220_RcvEgrIndexTail6_offse 0x00260010UL qib_7220_regs.h 　
574
 QIB_7220_RcvEgrIndexHead6_offseQIB_7220_RcvEgrIndexHead6_offse 0x00260018UL qib_7220_regs.h 　
575
 QIB_7220_MEM_260020_offsetQIB_7220_MEM_260020_offset 0x00260020UL qib_7220_regs.h 　
576
 QIB_7220_RcvHdrTail7_offsetQIB_7220_RcvHdrTail7_offset 0x00270000UL qib_7220_regs.h 　
577
 QIB_7220_RcvHdrHead7_offsetQIB_7220_RcvHdrHead7_offset 0x00270008UL qib_7220_regs.h 　
578
 QIB_7220_RcvEgrIndexTail7_offseQIB_7220_RcvEgrIndexTail7_offse 0x00270010UL qib_7220_regs.h 　
579
 QIB_7220_RcvEgrIndexHead7_offseQIB_7220_RcvEgrIndexHead7_offse 0x00270018UL qib_7220_regs.h 　
580
 QIB_7220_MEM_270020_offsetQIB_7220_MEM_270020_offset 0x00270020UL qib_7220_regs.h 　
581
 QIB_7220_RcvHdrTail8_offsetQIB_7220_RcvHdrTail8_offset 0x00280000UL qib_7220_regs.h 　
582
 QIB_7220_RcvHdrHead8_offsetQIB_7220_RcvHdrHead8_offset 0x00280008UL qib_7220_regs.h 　
583
 QIB_7220_RcvEgrIndexTail8_offseQIB_7220_RcvEgrIndexTail8_offse 0x00280010UL qib_7220_regs.h 　
584
 QIB_7220_RcvEgrIndexHead8_offseQIB_7220_RcvEgrIndexHead8_offse 0x00280018UL qib_7220_regs.h 　
585
 QIB_7220_MEM_280020_offsetQIB_7220_MEM_280020_offset 0x00280020UL qib_7220_regs.h 　
586
 QIB_7220_RcvHdrTail9_offsetQIB_7220_RcvHdrTail9_offset 0x00290000UL qib_7220_regs.h 　
587
 QIB_7220_RcvHdrHead9_offsetQIB_7220_RcvHdrHead9_offset 0x00290008UL qib_7220_regs.h 　
588
 QIB_7220_RcvEgrIndexTail9_offseQIB_7220_RcvEgrIndexTail9_offse 0x00290010UL qib_7220_regs.h 　
589
 QIB_7220_RcvEgrIndexHead9_offseQIB_7220_RcvEgrIndexHead9_offse 0x00290018UL qib_7220_regs.h 　
590
 QIB_7220_MEM_290020_offsetQIB_7220_MEM_290020_offset 0x00290020UL qib_7220_regs.h 　
591
 QIB_7220_RcvHdrTail10_offsetQIB_7220_RcvHdrTail10_offset 0x002a0000UL qib_7220_regs.h 　
592
 QIB_7220_RcvHdrHead10_offsetQIB_7220_RcvHdrHead10_offset 0x002a0008UL qib_7220_regs.h 　
593
 QIB_7220_RcvEgrIndexTail10_offsQIB_7220_RcvEgrIndexTail10_offs 0x002a0010UL qib_7220_regs.h 　
594
 QIB_7220_RcvEgrIndexHead10_offsQIB_7220_RcvEgrIndexHead10_offs 0x002a0018UL qib_7220_regs.h 　
595
 QIB_7220_MEM_2A0020_offsetQIB_7220_MEM_2A0020_offset 0x002a0020UL qib_7220_regs.h 　
596
 QIB_7220_RcvHdrTail11_offsetQIB_7220_RcvHdrTail11_offset 0x002b0000UL qib_7220_regs.h 　
597
 QIB_7220_RcvHdrHead11_offsetQIB_7220_RcvHdrHead11_offset 0x002b0008UL qib_7220_regs.h 　
598
 QIB_7220_RcvEgrIndexTail11_offsQIB_7220_RcvEgrIndexTail11_offs 0x002b0010UL qib_7220_regs.h 　
599
 QIB_7220_RcvEgrIndexHead11_offsQIB_7220_RcvEgrIndexHead11_offs 0x002b0018UL qib_7220_regs.h 　
600
 QIB_7220_MEM_2B0020_offsetQIB_7220_MEM_2B0020_offset 0x002b0020UL qib_7220_regs.h 　
601
 QIB_7220_RcvHdrTail12_offsetQIB_7220_RcvHdrTail12_offset 0x002c0000UL qib_7220_regs.h 　
602
 QIB_7220_RcvHdrHead12_offsetQIB_7220_RcvHdrHead12_offset 0x002c0008UL qib_7220_regs.h 　
603
 QIB_7220_RcvEgrIndexTail12_offsQIB_7220_RcvEgrIndexTail12_offs 0x002c0010UL qib_7220_regs.h 　
604
 QIB_7220_RcvEgrIndexHead12_offsQIB_7220_RcvEgrIndexHead12_offs 0x002c0018UL qib_7220_regs.h 　
605
 QIB_7220_MEM_2C0020_offsetQIB_7220_MEM_2C0020_offset 0x002c0020UL qib_7220_regs.h 　
606
 QIB_7220_RcvHdrTail13_offsetQIB_7220_RcvHdrTail13_offset 0x002d0000UL qib_7220_regs.h 　
607
 QIB_7220_RcvHdrHead13_offsetQIB_7220_RcvHdrHead13_offset 0x002d0008UL qib_7220_regs.h 　
608
 QIB_7220_RcvEgrIndexTail13_offsQIB_7220_RcvEgrIndexTail13_offs 0x002d0010UL qib_7220_regs.h 　
609
 QIB_7220_RcvEgrIndexHead13_offsQIB_7220_RcvEgrIndexHead13_offs 0x002d0018UL qib_7220_regs.h 　
610
 QIB_7220_MEM_2D0020_offsetQIB_7220_MEM_2D0020_offset 0x002d0020UL qib_7220_regs.h 　
611
 QIB_7220_RcvHdrTail14_offsetQIB_7220_RcvHdrTail14_offset 0x002e0000UL qib_7220_regs.h 　
612
 QIB_7220_RcvHdrHead14_offsetQIB_7220_RcvHdrHead14_offset 0x002e0008UL qib_7220_regs.h 　
613
 QIB_7220_RcvEgrIndexTail14_offsQIB_7220_RcvEgrIndexTail14_offs 0x002e0010UL qib_7220_regs.h 　
614
 QIB_7220_RcvEgrIndexHead14_offsQIB_7220_RcvEgrIndexHead14_offs 0x002e0018UL qib_7220_regs.h 　
615
 QIB_7220_MEM_2E0020_offsetQIB_7220_MEM_2E0020_offset 0x002e0020UL qib_7220_regs.h 　
616
 QIB_7220_RcvHdrTail15_offsetQIB_7220_RcvHdrTail15_offset 0x002f0000UL qib_7220_regs.h 　
617
 QIB_7220_RcvHdrHead15_offsetQIB_7220_RcvHdrHead15_offset 0x002f0008UL qib_7220_regs.h 　
618
 QIB_7220_RcvEgrIndexTail15_offsQIB_7220_RcvEgrIndexTail15_offs 0x002f0010UL qib_7220_regs.h 　
619
 QIB_7220_RcvEgrIndexHead15_offsQIB_7220_RcvEgrIndexHead15_offs 0x002f0018UL qib_7220_regs.h 　
620
 QIB_7220_MEM_2F0020_offsetQIB_7220_MEM_2F0020_offset 0x002f0020UL qib_7220_regs.h 　
621
 QIB_7220_RcvHdrTail16_offsetQIB_7220_RcvHdrTail16_offset 0x00300000UL qib_7220_regs.h 　
622
 QIB_7220_RcvHdrHead16_offsetQIB_7220_RcvHdrHead16_offset 0x00300008UL qib_7220_regs.h 　
623
 QIB_7220_RcvEgrIndexTail16_offsQIB_7220_RcvEgrIndexTail16_offs 0x00300010UL qib_7220_regs.h 　
624
 QIB_7220_RcvEgrIndexHead16_offsQIB_7220_RcvEgrIndexHead16_offs 0x00300018UL qib_7220_regs.h 　
625
 QIB_7220_MEM_300020_offsetQIB_7220_MEM_300020_offset 0x00300020UL qib_7220_regs.h 　
626
 HZHZ 100 3c515.c 　
627
 CORKSCREWCORKSCREW 1 3c515.c 　
628
 AUTOMEDIAAUTOMEDIA 1 3c515.c 　
629
 TX_RING_SIZETX_RING_SIZE 16 3c515.c 　
630
 RX_RING_SIZERX_RING_SIZE 16 3c515.c 　
631
 PKT_BUF_SZPKT_BUF_SZ 1536 3c515.c Size of each temporary Rx buffer.
632
 DRIVER_DEBUGDRIVER_DEBUG 1 3c515.c 　
633
 CORKSCREW_IDCORKSCREW_ID 10 3c515.c 　
634
 EL3_CMDEL3_CMD 0x0e 3c515.c 　
635
 EL3_STATUSEL3_STATUS 0x0e 3c515.c 　
636
 RX_BYTES_MASKRX_BYTES_MASK (unsigned short) (0x07ff) 3c515.c 　
637
 NUM_TX_SLOTSNUM_TX_SLOTS 2 amd8111e.c 　
638
 NUM_RX_SLOTSNUM_RX_SLOTS 4 amd8111e.c 　
639
 TX_SLOTS_MASKTX_SLOTS_MASK 1 amd8111e.c 　
640
 RX_SLOTS_MASKRX_SLOTS_MASK 3 amd8111e.c 　
641
 TX_BUF_LENTX_BUF_LEN 1536 amd8111e.c 　
642
 RX_BUF_LENRX_BUF_LEN 1536 amd8111e.c 　
643
 TX_PKT_LEN_MAXTX_PKT_LEN_MAX (ETH_FRAME_LEN - ETH_HLEN) amd8111e.c 　
644
 RX_PKT_LEN_MINRX_PKT_LEN_MIN 60 amd8111e.c 　
645
 RX_PKT_LEN_MAXRX_PKT_LEN_MAX ETH_FRAME_LEN amd8111e.c 　
646
 TX_TIMEOUTTX_TIMEOUT 3000 amd8111e.c 　
647
 TX_PROCESS_TIMETX_PROCESS_TIME 10 amd8111e.c 　
648
 TX_RETRYTX_RETRY (TX_TIMEOUT / TX_PROCESS_TIME) amd8111e.c 　
649
 PHY_RW_RETRYPHY_RW_RETRY 10 amd8111e.c 　
650
 TX_DESC_COUNTTX_DESC_COUNT 32 atl1e.c TX descriptors, minimum 32
651
 RX_MEM_SIZERX_MEM_SIZE 8192 atl1e.c RX area size, minimum 8kb
652
 MAX_FRAME_SIZEMAX_FRAME_SIZE 1500 atl1e.c Maximum MTU supported, minimum 1500
653
 PREAMBLE_LENPREAMBLE_LEN 7 atl1e.c 　
654
 RX_JUMBO_THRESHRX_JUMBO_THRESH ((MAX_FRAME_SIZE + ETH_HLEN + \ VLAN_HLEN + ETH_FCS_LEN + 7) >> 3) atl1e.c 　
655
 IMT_VALIMT_VAL 100 atl1e.c interrupt moderator timer, us
656
 ICT_VALICT_VAL 50000 atl1e.c interrupt clear timer, us
657
 SMB_TIMERSMB_TIMER 200000 atl1e.c 　
658
 RRD_THRESHRRD_THRESH 1 atl1e.c packets to queue before interrupt
659
 TPD_BURSTTPD_BURST 5 atl1e.c 　
660
 TPD_THRESHTPD_THRESH (TX_DESC_COUNT / 2) atl1e.c 　
661
 RX_COUNT_DOWNRX_COUNT_DOWN 4 atl1e.c 　
662
 TX_COUNT_DOWNTX_COUNT_DOWN (IMT_VAL * 4 / 3) atl1e.c 　
663
 DMAR_DLY_CNTDMAR_DLY_CNT 15 atl1e.c 　
664
 DMAW_DLY_CNTDMAW_DLY_CNT 4 atl1e.c 　
665
 PCI_DEVICE_ID_ATTANSIC_L1EPCI_DEVICE_ID_ATTANSIC_L1E 0x1026 atl1e.c 　
666
 EBUSYEBUSY 1 bnx2.c 　
667
 ENODEVENODEV 2 bnx2.c 　
668
 EINVALEINVAL 3 bnx2.c 　
669
 ENOMEMENOMEM 4 bnx2.c 　
670
 EIOEIO 5 bnx2.c 　
671
 ETHTOOL_ALL_FIBRE_SPEEDETHTOOL_ALL_FIBRE_SPEED (ADVERTISED_1000baseT_Full) bnx2.c 　
672
 ETHTOOL_ALL_COPPER_SPEEDETHTOOL_ALL_COPPER_SPEED (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | \ ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full | \ ADVERTISED_1 bnx2.c 　
673
 PHY_ALL_10_100_SPEEDPHY_ALL_10_100_SPEED (ADVERTISE_10HALF | ADVERTISE_10FULL | \ ADVERTISE_100HALF | ADVERTISE_100FULL | ADVERTISE_CSMA) bnx2.c 　
674
 PHY_ALL_1000_SPEEDPHY_ALL_1000_SPEED (ADVERTISE_1000HALF | ADVERTISE_1000FULL) bnx2.c 　
675
 TX_TIME_OUTTX_TIME_OUT 2*TICKS_PER_SEC davicom.c 　
676
 EEPROM_ADDRLENEEPROM_ADDRLEN 6 davicom.c 　
677
 EEPROM_SIZEEEPROM_SIZE 32 davicom.c 1 << EEPROM_ADDRLEN
678
 EE_WRITE_CMDEE_WRITE_CMD (5 << addr_len) davicom.c 　
679
 EE_READ_CMDEE_READ_CMD (6 << addr_len) davicom.c 　
680
 EE_ERASE_CMDEE_ERASE_CMD (7 << addr_len) davicom.c 　
681
 EE_SHIFT_CLKEE_SHIFT_CLK 0x02 davicom.c EEPROM shift clock.
682
 EE_CSEE_CS 0x01 davicom.c EEPROM chip select.
683
 EE_DATA_WRITEEE_DATA_WRITE 0x04 davicom.c EEPROM chip data in.
684
 EE_WRITE_0EE_WRITE_0 0x01 davicom.c 　
685
 EE_WRITE_1EE_WRITE_1 0x05 davicom.c 　
686
 EE_DATA_READEE_DATA_READ 0x08 davicom.c EEPROM chip data out.
687
 EE_ENBEE_ENB (0x4800 | EE_CS) davicom.c 　
688
 PHY_DATA_0PHY_DATA_0 0x0 davicom.c 　
689
 PHY_DATA_1PHY_DATA_1 0x20000 davicom.c 　
690
 MDCLKHMDCLKH 0x10000 davicom.c 　
691
 BUFLENBUFLEN 1536 davicom.c 　
692
 NTXDNTXD 2 davicom.c 　
693
 NRXDNRXD 4 davicom.c 　
694
 txdtxd davicom_bufs.txd davicom.c 　
695
 txbtxb davicom_bufs.txb davicom.c 　
696
 rxdrxd davicom_bufs.rxd davicom.c 　
697
 rxbrxb davicom_bufs.rxb davicom.c 　
698
 DEPCA_NICSRDEPCA_NICSR 0x00 depca.c Network interface CSR
699
 DEPCA_RBIDEPCA_RBI 0x02 depca.c RAM buffer index (2k buffer mode)
700
 DEPCA_DATADEPCA_DATA 0x04 depca.c LANCE registers' data port
701
 DEPCA_ADDRDEPCA_ADDR 0x06 depca.c LANCE registers' address port
702
 DEPCA_HBASEDEPCA_HBASE 0x08 depca.c EISA high memory base address reg.
703
 DEPCA_PROMDEPCA_PROM 0x0c depca.c Ethernet address ROM data port
704
 DEPCA_CNFGDEPCA_CNFG 0x0c depca.c EISA Configuration port
705
 DEPCA_RBSADEPCA_RBSA 0x0e depca.c RAM buffer starting address (2k buff.)
706
 CSR0CSR0 0 depca.c 　
707
 CSR1CSR1 1 depca.c 　
708
 CSR2CSR2 2 depca.c 　
709
 CSR3CSR3 3 depca.c 　
710
 TOTO 0x0100 depca.c Time Out for remote boot
711
 SHESHE 0x0080 depca.c SHadow memory Enable
712
 BSBS 0x0040 depca.c Bank Select
713
 BUFBUF 0x0020 depca.c BUFfer size (1->32k, 0->64k)
714
 RBERBE 0x0010 depca.c Remote Boot Enable (1->net boot)
715
 AACAAC 0x0008 depca.c Address ROM Address Counter (1->enable)
716
 _128KB_128KB 0x0008 depca.c 128kB Network RAM (1->enable)
717
 IMIM 0x0004 depca.c Interrupt Mask (1->mask)
718
 IENIEN 0x0002 depca.c Interrupt tristate ENable (1->enable)
719
 LEDLED 0x0001 depca.c LED control
720
 ERRERR 0x8000 depca.c Error summary
721
 BABLBABL 0x4000 depca.c Babble transmitter timeout error
722
 CERRCERR 0x2000 depca.c Collision Error
723
 MISSMISS 0x1000 depca.c Missed packet
724
 MERRMERR 0x0800 depca.c Memory Error
725
 RINTRINT 0x0400 depca.c Receiver Interrupt
726
 TINTTINT 0x0200 depca.c Transmit Interrupt
727
 IDONIDON 0x0100 depca.c Initialization Done
728
 INTRINTR 0x0080 depca.c Interrupt Flag
729
 INEAINEA 0x0040 depca.c Interrupt Enable
730
 RXONRXON 0x0020 depca.c Receiver on
731
 TXONTXON 0x0010 depca.c Transmitter on
732
 TDMDTDMD 0x0008 depca.c Transmit Demand
733
 STOPSTOP 0x0004 depca.c Stop
734
 STRTSTRT 0x0002 depca.c Start
735
 INITINIT 0x0001 depca.c Initialize
736
 INTMINTM 0xff00 depca.c Interrupt Mask
737
 INTEINTE 0xfff0 depca.c Interrupt Enable
738
 BSWPBSWP 0x0004 depca.c Byte SWaP
739
 ACONACON 0x0002 depca.c ALE control
740
 BCONBCON 0x0001 depca.c Byte CONtrol
741
 PROMPROM 0x8000 depca.c Promiscuous Mode
742
 EMBAEMBA 0x0080 depca.c Enable Modified Back-off Algorithm
743
 INTLINTL 0x0040 depca.c Internal Loopback
744
 DRTYDRTY 0x0020 depca.c Disable Retry
745
 COLLCOLL 0x0010 depca.c Force Collision
746
 DTCRDTCR 0x0008 depca.c Disable Transmit CRC
747
 LOOPLOOP 0x0004 depca.c Loopback
748
 DTXDTX 0x0002 depca.c Disable the Transmitter
749
 DRXDRX 0x0001 depca.c Disable the Receiver
750
 R_OWNR_OWN 0x80000000 depca.c Owner bit 0 = host, 1 = lance
751
 R_ERRR_ERR 0x4000 depca.c Error Summary
752
 R_FRAMR_FRAM 0x2000 depca.c Framing Error
753
 R_OFLOR_OFLO 0x1000 depca.c Overflow Error
754
 R_CRCR_CRC 0x0800 depca.c CRC Error
755
 R_BUFFR_BUFF 0x0400 depca.c Buffer Error
756
 R_STPR_STP 0x0200 depca.c Start of Packet
757
 R_ENPR_ENP 0x0100 depca.c End of Packet
758
 T_OWNT_OWN 0x80000000 depca.c Owner bit 0 = host, 1 = lance
759
 T_ERRT_ERR 0x4000 depca.c Error Summary
760
 T_ADD_FCST_ADD_FCS 0x2000 depca.c More the 1 retry needed to Xmit
761
 T_MORET_MORE 0x1000 depca.c >1 retry to transmit packet
762
 T_ONET_ONE 0x0800 depca.c 1 try needed to transmit the packet
763
 T_DEFT_DEF 0x0400 depca.c Deferred
764
 T_STPT_STP 0x02000000 depca.c Start of Packet
765
 T_ENPT_ENP 0x01000000 depca.c End of Packet
766
 T_FLAGST_FLAGS 0xff000000 depca.c TX Flags Field
767
 TMD3_BUFFTMD3_BUFF 0x8000 depca.c BUFFer error
768
 TMD3_UFLOTMD3_UFLO 0x4000 depca.c UnderFLOw error
769
 TMD3_RESTMD3_RES 0x2000 depca.c REServed
770
 TMD3_LCOLTMD3_LCOL 0x1000 depca.c Late COLlision
771
 TMD3_LCARTMD3_LCAR 0x0800 depca.c Loss of CARrier
772
 TMD3_RTRYTMD3_RTRY 0x0400 depca.c ReTRY error
773
 PROBE_LENGTHPROBE_LENGTH 32 depca.c 　
774
 NUM_RX_DESCNUM_RX_DESC 2 depca.c Number of RX descriptors
775
 NUM_TX_DESCNUM_TX_DESC 2 depca.c Number of TX descriptors
776
 RX_BUFF_SZRX_BUFF_SZ 1536 depca.c Buffer size for each Rx buffer
777
 TX_BUFF_SZTX_BUFF_SZ 1536 depca.c Buffer size for each Tx buffer
778
 DEPCA_MODELDEPCA_MODEL DEPCA depca.c 　
779
 DEPCA_RAM_BASEDEPCA_RAM_BASE 0xd0000 depca.c 　
780
 ALIGN4ALIGN4 ((u32)4 - 1) depca.c 1 longword align
781
 ALIGN8ALIGN8 ((u32)8 - 1) depca.c 2 longword (quadword) align
782
 ALIGNALIGN ALIGN8 depca.c Keep the LANCE happy...
783
 LA_MASKLA_MASK 0x0000ffff depca.c LANCE address mask for mapping network RAM
784
 PCI_DM9132_IDPCI_DM9132_ID 0x91321282 dmfe.c Davicom DM9132 ID
785
 PCI_DM9102_IDPCI_DM9102_ID 0x91021282 dmfe.c Davicom DM9102 ID
786
 PCI_DM9100_IDPCI_DM9100_ID 0x91001282 dmfe.c Davicom DM9100 ID
787
 PCI_DM9009_IDPCI_DM9009_ID 0x90091282 dmfe.c Davicom DM9009 ID
788
 DM9102_IO_SIZEDM9102_IO_SIZE 0x80 dmfe.c 　
789
 DM9102A_IO_SIZEDM9102A_IO_SIZE 0x100 dmfe.c 　
790
 TX_MAX_SEND_CNTTX_MAX_SEND_CNT 0x1 dmfe.c Maximum tx packet per time
791
 TX_DESC_CNTTX_DESC_CNT 0x10 dmfe.c Allocated Tx descriptors
792
 RX_DESC_CNTRX_DESC_CNT 0x20 dmfe.c Allocated Rx descriptors
793
 TX_FREE_DESC_CNTTX_FREE_DESC_CNT (TX_DESC_CNT - 2) dmfe.c Max TX packet count
794
 TX_WAKE_DESC_CNTTX_WAKE_DESC_CNT (TX_DESC_CNT - 3) dmfe.c TX wakeup count
795
 DESC_ALL_CNTDESC_ALL_CNT (TX_DESC_CNT + RX_DESC_CNT) dmfe.c 　
796
 TX_BUF_ALLOCTX_BUF_ALLOC 0x600 dmfe.c 　
797
 RX_ALLOC_SIZERX_ALLOC_SIZE 0x620 dmfe.c 　
798
 DM910X_RESETDM910X_RESET 1 dmfe.c 　
799
 CR0_DEFAULTCR0_DEFAULT 0x00E00000 dmfe.c TX & RX burst mode
800
 CR6_DEFAULTCR6_DEFAULT 0x00080000 dmfe.c HD
801
 CR7_DEFAULTCR7_DEFAULT 0x180c1 dmfe.c 　
802
 CR15_DEFAULTCR15_DEFAULT 0x06 dmfe.c TxJabber RxWatchdog
803
 TDES0_ERR_MASKTDES0_ERR_MASK 0x4302 dmfe.c TXJT, LC, EC, FUE
804
 MAX_PACKET_SIZEMAX_PACKET_SIZE 1514 dmfe.c 　
805
 DMFE_MAX_MULTICASTDMFE_MAX_MULTICAST 14 dmfe.c 　
806
 RX_COPY_SIZERX_COPY_SIZE 100 dmfe.c 　
807
 MAX_CHECK_PACKETMAX_CHECK_PACKET 0x8000 dmfe.c 　
808
 DM9801_NOISE_FLOORDM9801_NOISE_FLOOR 8 dmfe.c 　
809
 DM9802_NOISE_FLOORDM9802_NOISE_FLOOR 5 dmfe.c 　
810
 DMFE_10MHFDMFE_10MHF 0 dmfe.c 　
811
 DMFE_100MHFDMFE_100MHF 1 dmfe.c 　
812
 DMFE_10MFDDMFE_10MFD 4 dmfe.c 　
813
 DMFE_100MFDDMFE_100MFD 5 dmfe.c 　
814
 DMFE_AUTODMFE_AUTO 8 dmfe.c 　
815
 DMFE_1M_HPNADMFE_1M_HPNA 0x10 dmfe.c 　
816
 DMFE_TXTH_72DMFE_TXTH_72 0x400000 dmfe.c TX TH 72 byte
817
 DMFE_TXTH_96DMFE_TXTH_96 0x404000 dmfe.c TX TH 96 byte
818
 DMFE_TXTH_128DMFE_TXTH_128 0x0000 dmfe.c TX TH 128 byte
819
 DMFE_TXTH_256DMFE_TXTH_256 0x4000 dmfe.c TX TH 256 byte
820
 DMFE_TXTH_512DMFE_TXTH_512 0x8000 dmfe.c TX TH 512 byte
821
 DMFE_TXTH_1KDMFE_TXTH_1K 0xC000 dmfe.c TX TH 1K byte
822
 DMFE_TIMER_WUTDMFE_TIMER_WUT (jiffies + HZ * 1) dmfe.c timer wakeup time : 1 second
823
 DMFE_TX_TIMEOUTDMFE_TX_TIMEOUT ((3*HZ)/2) dmfe.c tx packet time-out time 1.5 s"
824
 DMFE_TX_KICKDMFE_TX_KICK (HZ/2) dmfe.c tx packet Kick-out time 0.5 s"
825
 CR9_SROM_READCR9_SROM_READ 0x4800 dmfe.c 　
826
 CR9_SRCSCR9_SRCS 0x1 dmfe.c 　
827
 CR9_SRCLKCR9_SRCLK 0x2 dmfe.c 　
828
 CR9_CRDOUTCR9_CRDOUT 0x8 dmfe.c 　
829
 SROM_DATA_0SROM_DATA_0 0x0 dmfe.c 　
830
 SROM_DATA_1SROM_DATA_1 0x4 dmfe.c 　
831
 PHY_DATA_1PHY_DATA_1 0x20000 dmfe.c 　
832
 PHY_DATA_0PHY_DATA_0 0x00000 dmfe.c 　
833
 MDCLKHMDCLKH 0x10000 dmfe.c 　
834
 PHY_POWER_DOWNPHY_POWER_DOWN 0x800 dmfe.c 　
835
 SROM_V41_CODESROM_V41_CODE 0x14 dmfe.c 　
836
 DEVICEDEVICE net_device dmfe.c 　
837
 txdtxd dmfe_bufs.txd dmfe.c 　
838
 txbtxb dmfe_bufs.txb dmfe.c 　
839
 rxdrxd dmfe_bufs.rxd dmfe.c 　
840
 rxbrxb dmfe_bufs.rxb dmfe.c 　
841
 board_foundboard_found 1 dmfe.c 　
842
 valid_linkvalid_link 0 dmfe.c 　
843
 LAN595LAN595 0 eepro.c 　
844
 LAN595TXLAN595TX 1 eepro.c 　
845
 LAN595FXLAN595FX 2 eepro.c 　
846
 LAN595FX_10ISALAN595FX_10ISA 3 eepro.c 　
847
 SLOW_DOWNSLOW_DOWN inb(0x80); eepro.c 　
848
 SA_ADDR0SA_ADDR0 0x00 eepro.c Etherexpress Pro/10
849
 SA_ADDR1SA_ADDR1 0xaa eepro.c 　
850
 SA_ADDR2SA_ADDR2 0x00 eepro.c 　
851
 ee_PnPee_PnP 0 eepro.c Plug 'n Play enable bit
852
 ee_Word1ee_Word1 1 eepro.c Word 1?
853
 ee_BusWidthee_BusWidth 2 eepro.c 8/16 bit
854
 ee_FlashAddree_FlashAddr 3 eepro.c Flash Address
855
 ee_FlashMaskee_FlashMask 0x7 eepro.c Mask
856
 ee_AutoIOee_AutoIO 6 eepro.c 　
857
 ee_reserved0ee_reserved0 7 eepro.c =0!
858
 ee_Flashee_Flash 8 eepro.c Flash there?
859
 ee_AutoNegee_AutoNeg 9 eepro.c Auto Negotiation enabled?
860
 ee_IO0ee_IO0 10 eepro.c IO Address LSB
861
 ee_IO0Maskee_IO0Mask 0x eepro.c ...
862
 ee_IO1ee_IO1 15 eepro.c IO MSB
863
 ee_IntSelee_IntSel 0 eepro.c Interrupt
864
 ee_IntMaskee_IntMask 0x7 eepro.c 　
865
 ee_LIee_LI 3 eepro.c Link Integrity 0= enabled
866
 ee_PCee_PC 4 eepro.c Polarity Correction 0= enabled
867
 ee_TPE_AUIee_TPE_AUI 5 eepro.c PortSelection 1=TPE
868
 ee_Jabberee_Jabber 6 eepro.c Jabber prevention 0= enabled
869
 ee_AutoPortee_AutoPort 7 eepro.c Auto Port Selection 1= Disabled
870
 ee_SMOUTee_SMOUT 8 eepro.c SMout Pin Control 0= Input
871
 ee_PROMee_PROM 9 eepro.c Flash EPROM / PROM 0=Flash
872
 ee_reserved1ee_reserved1 10 eepro.c .. 12 =0!
873
 ee_AltReadyee_AltReady 13 eepro.c Alternate Ready, 0=normal
874
 ee_reserved2ee_reserved2 14 eepro.c =0!
875
 ee_Duplexee_Duplex 15 eepro.c 　
876
 ee_IA5ee_IA5 0 eepro.c bit start for individual Addr Byte 5
877
 ee_IA4ee_IA4 8 eepro.c bit start for individual Addr Byte 5
878
 ee_IA3ee_IA3 0 eepro.c bit start for individual Addr Byte 5
879
 ee_IA2ee_IA2 8 eepro.c bit start for individual Addr Byte 5
880
 ee_IA1ee_IA1 0 eepro.c bit start for individual Addr Byte 5
881
 ee_IA0ee_IA0 8 eepro.c bit start for individual Addr Byte 5
882
 ee_BNC_TPEee_BNC_TPE 0 eepro.c 0=TPE
883
 ee_BootTypeee_BootType 1 eepro.c 00=None, 01=IPX, 10=ODI, 11=NDIS
884
 ee_BootTypeMaskee_BootTypeMask 0x3 eepro.c 　
885
 ee_NumConnee_NumConn 3 eepro.c Number of Connections 0= One or Two
886
 ee_FlashSockee_FlashSock 4 eepro.c Presence of Flash Socket 0= Present
887
 ee_PortTPEee_PortTPE 5 eepro.c 　
888
 ee_PortBNCee_PortBNC 6 eepro.c 　
889
 ee_PortAUIee_PortAUI 7 eepro.c 　
890
 ee_PowerMgtee_PowerMgt 10 eepro.c 0= disabled
891
 ee_CPee_CP 13 eepro.c Concurrent Processing
892
 ee_CPMaskee_CPMask 0x7 eepro.c 　
893
 ee_Steppingee_Stepping 0 eepro.c Stepping info
894
 ee_StepMaskee_StepMask 0x0F eepro.c 　
895
 ee_BoardIDee_BoardID 4 eepro.c Manucaturer Board ID, reserved
896
 ee_BoardMaskee_BoardMask 0x0FFF eepro.c 　
897
 ee_INT_TO_IRQee_INT_TO_IRQ 0 eepro.c int to IRQ Mapping = 0x1EB8 for Pro/10+
898
 ee_FX_INT2IRQee_FX_INT2IRQ 0x1EB8 eepro.c the _only_ mapping allowed for FX chips
899
 ee_SIZEee_SIZE 0x40 eepro.c total EEprom Size
900
 ee_Checksumee_Checksum 0xBABA eepro.c initial and final value for adding checksum
901
 ee_addr_vendoree_addr_vendor 0x10 eepro.c Word offset for EISA Vendor ID
902
 ee_addr_idee_addr_id 0x11 eepro.c Word offset for Card ID
903
 ee_addr_SNee_addr_SN 0x12 eepro.c Serial Number
904
 ee_addr_CRC_8ee_addr_CRC_8 0x14 eepro.c CRC over last thee Bytes
905
 ee_vendor_intel0ee_vendor_intel0 0x25 eepro.c Vendor ID Intel
906
 ee_vendor_intel1ee_vendor_intel1 0xD4 eepro.c 　
907
 ee_id_eepro10p0ee_id_eepro10p0 0x10 eepro.c ID for eepro/10+
908
 ee_id_eepro10p1ee_id_eepro10p1 0x31 eepro.c 　
909
 RAM_SIZERAM_SIZE 0x8000 eepro.c 　
910
 RCV_HEADERRCV_HEADER 8 eepro.c 　
911
 RCV_DEFAULT_RAMRCV_DEFAULT_RAM 0x6000 eepro.c 　
912
 RCV_RAMRCV_RAM rcv_ram eepro.c 　
913
 XMT_HEADERXMT_HEADER 8 eepro.c 　
914
 XMT_RAMXMT_RAM (RAM_SIZE - RCV_RAM) eepro.c 　
915
 XMT_STARTXMT_START ((rcv_start + RCV_RAM) % RAM_SIZE) eepro.c 　
916
 RCV_LOWER_LIMITRCV_LOWER_LIMIT (rcv_start >> 8) eepro.c 　
917
 RCV_UPPER_LIMITRCV_UPPER_LIMIT (((rcv_start + RCV_RAM) - 2) >> 8) eepro.c 　
918
 XMT_LOWER_LIMITXMT_LOWER_LIMIT (XMT_START >> 8) eepro.c 　
919
 XMT_UPPER_LIMITXMT_UPPER_LIMIT (((XMT_START + XMT_RAM) - 2) >> 8) eepro.c 　
920
 RCV_START_PRORCV_START_PRO 0x00 eepro.c 　
921
 RCV_START_10RCV_START_10 XMT_RAM eepro.c 　
922
 RCV_DONERCV_DONE 0x0008 eepro.c 　
923
 RX_OKRX_OK 0x2000 eepro.c 　
924
 RX_ERRORRX_ERROR 0x0d81 eepro.c 　
925
 TX_DONE_BITTX_DONE_BIT 0x0080 eepro.c 　
926
 CHAIN_BITCHAIN_BIT 0x8000 eepro.c 　
927
 XMT_STATUSXMT_STATUS 0x02 eepro.c 　
928
 XMT_CHAINXMT_CHAIN 0x04 eepro.c 　
929
 XMT_COUNTXMT_COUNT 0x06 eepro.c 　
930
 BANK0_SELECTBANK0_SELECT 0x00 eepro.c 　
931
 BANK1_SELECTBANK1_SELECT 0x40 eepro.c 　
932
 BANK2_SELECTBANK2_SELECT 0x80 eepro.c 　
933
 COMMAND_REGCOMMAND_REG 0x00 eepro.c Register 0
934
 MC_SETUPMC_SETUP 0x03 eepro.c 　
935
 XMT_CMDXMT_CMD 0x04 eepro.c 　
936
 DIAGNOSE_CMDDIAGNOSE_CMD 0x07 eepro.c 　
937
 RCV_ENABLE_CMDRCV_ENABLE_CMD 0x08 eepro.c 　
938
 RCV_DISABLE_CMDRCV_DISABLE_CMD 0x0a eepro.c 　
939
 STOP_RCV_CMDSTOP_RCV_CMD 0x0b eepro.c 　
940
 RESET_CMDRESET_CMD 0x0e eepro.c 　
941
 POWER_DOWN_CMDPOWER_DOWN_CMD 0x18 eepro.c 　
942
 RESUME_XMT_CMDRESUME_XMT_CMD 0x1c eepro.c 　
943
 SEL_RESET_CMDSEL_RESET_CMD 0x1e eepro.c 　
944
 STATUS_REGSTATUS_REG 0x01 eepro.c Register 1
945
 RX_INTRX_INT 0x02 eepro.c 　
946
 TX_INTTX_INT 0x04 eepro.c 　
947
 EXEC_STATUSEXEC_STATUS 0x30 eepro.c 　
948
 ID_REGID_REG 0x02 eepro.c Register 2
949
 R_ROBIN_BITSR_ROBIN_BITS 0xc0 eepro.c round robin counter
950
 ID_REG_MASKID_REG_MASK 0x2c eepro.c 　
951
 ID_REG_SIGID_REG_SIG 0x24 eepro.c 　
952
 AUTO_ENABLEAUTO_ENABLE 0x10 eepro.c 　
953
 INT_MASK_REGINT_MASK_REG 0x03 eepro.c Register 3
954
 RX_STOP_MASKRX_STOP_MASK 0x01 eepro.c 　
955
 RX_MASKRX_MASK 0x02 eepro.c 　
956
 TX_MASKTX_MASK 0x04 eepro.c 　
957
 EXEC_MASKEXEC_MASK 0x08 eepro.c 　
958
 ALL_MASKALL_MASK 0x0f eepro.c 　
959
 IO_32_BITIO_32_BIT 0x10 eepro.c 　
960
 RCV_BARRCV_BAR 0x04 eepro.c The following are word (16-bit) registers
961
 RCV_STOPRCV_STOP 0x06 eepro.c 　
962
 XMT_BAR_PROXMT_BAR_PRO 0x0a eepro.c 　
963
 XMT_BAR_10XMT_BAR_10 0x0b eepro.c 　
964
 HOST_ADDRESS_REGHOST_ADDRESS_REG 0x0c eepro.c 　
965
 IO_PORTIO_PORT 0x0e eepro.c 　
966
 IO_PORT_32_BITIO_PORT_32_BIT 0x0c eepro.c 　
967
 REG1REG1 0x01 eepro.c 　
968
 WORD_WIDTHWORD_WIDTH 0x02 eepro.c 　
969
 INT_ENABLEINT_ENABLE 0x80 eepro.c 　
970
 INT_NO_REGINT_NO_REG 0x02 eepro.c 　
971
 RCV_LOWER_LIMIT_REGRCV_LOWER_LIMIT_REG 0x08 eepro.c 　
972
 RCV_UPPER_LIMIT_REGRCV_UPPER_LIMIT_REG 0x09 eepro.c 　
973
 XMT_LOWER_LIMIT_REG_PROXMT_LOWER_LIMIT_REG_PRO 0x0a eepro.c 　
974
 XMT_UPPER_LIMIT_REG_PROXMT_UPPER_LIMIT_REG_PRO 0x0b eepro.c 　
975
 XMT_LOWER_LIMIT_REG_10XMT_LOWER_LIMIT_REG_10 0x0b eepro.c 　
976
 XMT_UPPER_LIMIT_REG_10XMT_UPPER_LIMIT_REG_10 0x0a eepro.c 　
977
 XMT_Chain_IntXMT_Chain_Int 0x20 eepro.c Interrupt at the end of the transmit chain
978
 XMT_Chain_ErrStopXMT_Chain_ErrStop 0x40 eepro.c Interrupt at the end of the chain even if there are errors
979
 RCV_Discard_BadFrameRCV_Discard_BadFrame 0x80 eepro.c Throw bad frames away, and continue to receive others
980
 REG2REG2 0x02 eepro.c 　
981
 PRMSC_ModePRMSC_Mode 0x01 eepro.c 　
982
 Multi_IAMulti_IA 0x20 eepro.c 　
983
 REG3REG3 0x03 eepro.c 　
984
 TPE_BITTPE_BIT 0x04 eepro.c 　
985
 BNC_BITBNC_BIT 0x20 eepro.c 　
986
 REG13REG13 0x0d eepro.c 　
987
 FDXFDX 0x00 eepro.c 　
988
 A_N_ENABLEA_N_ENABLE 0x02 eepro.c 　
989
 I_ADD_REG0I_ADD_REG0 0x04 eepro.c 　
990
 I_ADD_REG1I_ADD_REG1 0x05 eepro.c 　
991
 I_ADD_REG2I_ADD_REG2 0x06 eepro.c 　
992
 I_ADD_REG3I_ADD_REG3 0x07 eepro.c 　
993
 I_ADD_REG4I_ADD_REG4 0x08 eepro.c 　
994
 I_ADD_REG5I_ADD_REG5 0x09 eepro.c 　
995
 EEPROM_REG_PROEEPROM_REG_PRO 0x0a eepro.c 　
996
 EEPROM_REG_10EEPROM_REG_10 0x0b eepro.c 　
997
 EESKEESK 0x01 eepro.c 　
998
 EECSEECS 0x02 eepro.c 　
999
 EEDIEEDI 0x04 eepro.c 　
1000
 EEDOEEDO 0x08 eepro.c 　
1001
 EE_READ_CMDEE_READ_CMD (6 << 6) eepro.c 　
1002
 EE_SHIFT_CLKEE_SHIFT_CLK 0x01 eepro100.c EEPROM shift clock.
1003
 EE_CSEE_CS 0x02 eepro100.c EEPROM chip select.
1004
 EE_DATA_WRITEEE_DATA_WRITE 0x04 eepro100.c EEPROM chip data in.
1005
 EE_DATA_READEE_DATA_READ 0x08 eepro100.c EEPROM chip data out.
1006
 EE_WRITE_0EE_WRITE_0 0x4802 eepro100.c 　
1007
 EE_WRITE_1EE_WRITE_1 0x4806 eepro100.c 　
1008
 EE_ENBEE_ENB (0x4800 | EE_CS) eepro100.c 　
1009
 EE_READ_CMDEE_READ_CMD 6 eepro100.c 　
1010
 CU_STARTCU_START 0x0010 eepro100.c 　
1011
 CU_RESUMECU_RESUME 0x0020 eepro100.c 　
1012
 CU_STATSADDRCU_STATSADDR 0x0040 eepro100.c 　
1013
 CU_SHOWSTATSCU_SHOWSTATS 0x0050 eepro100.c Dump statistics counters.
1014
 CU_CMD_BASECU_CMD_BASE 0x0060 eepro100.c Base address to add to add CU commands.
1015
 CU_DUMPSTATSCU_DUMPSTATS 0x0070 eepro100.c Dump then reset stats counters.
1016
 RX_STARTRX_START 0x0001 eepro100.c 　
1017
 RX_RESUMERX_RESUME 0x0002 eepro100.c 　
1018
 RX_ABORTRX_ABORT 0x0004 eepro100.c 　
1019
 RX_ADDR_LOADRX_ADDR_LOAD 0x0006 eepro100.c 　
1020
 RX_RESUMENRRX_RESUMENR 0x0007 eepro100.c 　
1021
 INT_MASKINT_MASK 0x0100 eepro100.c 　
1022
 DRVR_INTDRVR_INT 0x0200 eepro100.c Driver generated interrupt.
1023
 RXFD_COUNTRXFD_COUNT 4 eepro100.c 　
1024
 rxfdsrxfds eepro100_bufs.rxfds eepro100.c 　
1025
 TX_RING_SIZETX_RING_SIZE 2 epic100.c use at least 2 buffers for TX
1026
 RX_RING_SIZERX_RING_SIZE 2 epic100.c 　
1027
 PKT_BUF_SZPKT_BUF_SZ 1536 epic100.c Size of each temporary Tx/Rx buffer.
1028
 EPIC_DEBUGEPIC_DEBUG 0 epic100.c debug level
1029
 TD_STDFLAGSTD_STDFLAGS TD_LASTDESC epic100.c 　
1030
 rx_ringrx_ring epic100_bufs.rx_ring epic100.c 　
1031
 tx_ringtx_ring epic100_bufs.tx_ring epic100.c 　
1032
 rx_packetrx_packet epic100_bufs.rx_packet epic100.c 　
1033
 tx_packettx_packet epic100_bufs.tx_packet epic100.c 　
1034
 EE_SHIFT_CLKEE_SHIFT_CLK 0x04 epic100.c EEPROM shift clock.
1035
 EE_CSEE_CS 0x02 epic100.c EEPROM chip select.
1036
 EE_DATA_WRITEEE_DATA_WRITE 0x08 epic100.c EEPROM chip data in.
1037
 EE_WRITE_0EE_WRITE_0 0x01 epic100.c 　
1038
 EE_WRITE_1EE_WRITE_1 0x09 epic100.c 　
1039
 EE_DATA_READEE_DATA_READ 0x10 epic100.c EEPROM chip data out.
1040
 EE_ENBEE_ENB (0x0001 | EE_CS) epic100.c 　
1041
 EE_WRITE_CMDEE_WRITE_CMD (5 << 6) epic100.c 　
1042
 EE_READ_CMDEE_READ_CMD (6 << 6) epic100.c 　
1043
 EE_ERASE_CMDEE_ERASE_CMD (7 << 6) epic100.c 　
1044
 MII_READOPMII_READOP 1 epic100.c 　
1045
 MII_WRITEOPMII_WRITEOP 2 epic100.c 　
1046
 FALCON_USE_IO_BARFALCON_USE_IO_BAR 0 etherfabric.c 　
1047
 HZHZ 100 etherfabric.c 　
1048
 EFAB_BYTEEFAB_BYTE 1 etherfabric.c 　
1049
 GMII_PSSRGMII_PSSR 0x11 etherfabric.c PHY-specific status register
1050
 LPA_EF_1000FULLLPA_EF_1000FULL 0x00020000 etherfabric.c 　
1051
 LPA_EF_1000HALFLPA_EF_1000HALF 0x00010000 etherfabric.c 　
1052
 LPA_EF_10000FULLLPA_EF_10000FULL 0x00040000 etherfabric.c 　
1053
 LPA_EF_10000HALFLPA_EF_10000HALF 0x00080000 etherfabric.c 　
1054
 LPA_100LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) etherfabric.c 　
1055
 LPA_EF_1000LPA_EF_1000 ( LPA_EF_1000FULL | LPA_EF_1000HALF ) etherfabric.c 　
1056
 LPA_EF_10000LPA_EF_10000 ( LPA_EF_10000FULL | LPA_EF_10000HALF ) etherfabric.c 　
1057
 LPA_EF_DUPLEXLPA_EF_DUPLEX ( LPA_10FULL | LPA_100FULL | LPA_EF_1000FULL | \ LPA_EF_10000FULL ) etherfabric.c 　
1058
 LPA_OTHERLPA_OTHER ~( LPA_10FULL | LPA_10HALF | LPA_100FULL | \ LPA_100HALF | LPA_EF_1000FULL | LPA_EF_1000HALF ) etherfabric.c 　
1059
 PSSR_LSTATUSPSSR_LSTATUS 0x0400 etherfabric.c Bit 10 - link status
1060
 MDIO_MMD_PMAPMDMDIO_MMD_PMAPMD (1) etherfabric.c 　
1061
 MDIO_MMD_WISMDIO_MMD_WIS (2) etherfabric.c 　
1062
 MDIO_MMD_PCSMDIO_MMD_PCS (3) etherfabric.c 　
1063
 MDIO_MMD_PHYXSMDIO_MMD_PHYXS (4) etherfabric.c 　
1064
 MDIO_MMD_DTEXSMDIO_MMD_DTEXS (5) etherfabric.c 　
1065
 MDIO_MMD_TCMDIO_MMD_TC (6) etherfabric.c 　
1066
 MDIO_MMD_ANMDIO_MMD_AN (7) etherfabric.c 　
1067
 MDIO_MMDREG_CTRL1MDIO_MMDREG_CTRL1 (0) etherfabric.c 　
1068
 MDIO_MMDREG_STAT1MDIO_MMDREG_STAT1 (1) etherfabric.c 　
1069
 MDIO_MMDREG_DEVS0MDIO_MMDREG_DEVS0 (5) etherfabric.c 　
1070
 MDIO_MMDREG_STAT2MDIO_MMDREG_STAT2 (8) etherfabric.c 　
1071
 MDIO_MMDREG_CTRL1_RESET_LBNMDIO_MMDREG_CTRL1_RESET_LBN (15) etherfabric.c 　
1072
 MDIO_MMDREG_CTRL1_RESET_WIDTHMDIO_MMDREG_CTRL1_RESET_WIDTH (1) etherfabric.c 　
1073
 MDIO_MMDREG_STAT1_FAULT_LBNMDIO_MMDREG_STAT1_FAULT_LBN (7) etherfabric.c 　
1074
 MDIO_MMDREG_STAT1_FAULT_WIDTHMDIO_MMDREG_STAT1_FAULT_WIDTH (1) etherfabric.c 　
1075
 MDIO_MMDREG_STAT1_LINK_LBNMDIO_MMDREG_STAT1_LINK_LBN (2) etherfabric.c 　
1076
 MDIO_MMDREG_STAT1_LINK_WIDTHMDIO_MMDREG_STAT1_LINK_WIDTH (1) etherfabric.c 　
1077
 MDIO_MMDREG_DEVS0_DTEXSMDIO_MMDREG_DEVS0_DTEXS DEV_PRESENT_BIT(MDIO_MMD_DTEXS) etherfabric.c 　
1078
 MDIO_MMDREG_DEVS0_PHYXSMDIO_MMDREG_DEVS0_PHYXS DEV_PRESENT_BIT(MDIO_MMD_PHYXS) etherfabric.c 　
1079
 MDIO_MMDREG_DEVS0_PCSMDIO_MMDREG_DEVS0_PCS DEV_PRESENT_BIT(MDIO_MMD_PCS) etherfabric.c 　
1080
 MDIO_MMDREG_DEVS0_WISMDIO_MMDREG_DEVS0_WIS DEV_PRESENT_BIT(MDIO_MMD_WIS) etherfabric.c 　
1081
 MDIO_MMDREG_DEVS0_PMAPMDMDIO_MMDREG_DEVS0_PMAPMD DEV_PRESENT_BIT(MDIO_MMD_PMAPMD) etherfabric.c 　
1082
 MDIO_MMDREG_DEVS0_ANMDIO_MMDREG_DEVS0_AN DEV_PRESENT_BIT(MDIO_MMD_AN) etherfabric.c 　
1083
 MDIO_MMDREG_STAT2_PRESENT_VALMDIO_MMDREG_STAT2_PRESENT_VAL (2) etherfabric.c 　
1084
 MDIO_MMDREG_STAT2_PRESENT_LBNMDIO_MMDREG_STAT2_PRESENT_LBN (14) etherfabric.c 　
1085
 MDIO_MMDREG_STAT2_PRESENT_WIDTHMDIO_MMDREG_STAT2_PRESENT_WIDTH (2) etherfabric.c 　
1086
 MDIO_PHYXS_LANE_STATEMDIO_PHYXS_LANE_STATE (0x18) etherfabric.c 　
1087
 MDIO_PHYXS_LANE_ALIGNED_LBNMDIO_PHYXS_LANE_ALIGNED_LBN (12) etherfabric.c 　
1088
 MDIO_PHYXS_LANE_SYNC0_LBNMDIO_PHYXS_LANE_SYNC0_LBN (0) etherfabric.c 　
1089
 MDIO_PHYXS_LANE_SYNC1_LBNMDIO_PHYXS_LANE_SYNC1_LBN (1) etherfabric.c 　
1090
 MDIO_PHYXS_LANE_SYNC2_LBNMDIO_PHYXS_LANE_SYNC2_LBN (2) etherfabric.c 　
1091
 MDIO_PHYXS_LANE_SYNC3_LBNMDIO_PHYXS_LANE_SYNC3_LBN (3) etherfabric.c 　
1092
 MDIO45_RESET_TRIESMDIO45_RESET_TRIES 100 etherfabric.c 　
1093
 MDIO45_RESET_SPINTIMEMDIO45_RESET_SPINTIME 10 etherfabric.c 　
1094
 FCN_IOM_IND_ADR_REGFCN_IOM_IND_ADR_REG 0x0 etherfabric.c 　
1095
 FCN_IOM_IND_DAT_REGFCN_IOM_IND_DAT_REG 0x4 etherfabric.c 　
1096
 FCN_ADR_REGION_REG_KERFCN_ADR_REGION_REG_KER 0x00 etherfabric.c 　
1097
 FCN_ADR_REGION0_LBNFCN_ADR_REGION0_LBN 0 etherfabric.c 　
1098
 FCN_ADR_REGION0_WIDTHFCN_ADR_REGION0_WIDTH 18 etherfabric.c 　
1099
 FCN_ADR_REGION1_LBNFCN_ADR_REGION1_LBN 32 etherfabric.c 　
1100
 FCN_ADR_REGION1_WIDTHFCN_ADR_REGION1_WIDTH 18 etherfabric.c 　
1101
 FCN_ADR_REGION2_LBNFCN_ADR_REGION2_LBN 64 etherfabric.c 　
1102
 FCN_ADR_REGION2_WIDTHFCN_ADR_REGION2_WIDTH 18 etherfabric.c 　
1103
 FCN_ADR_REGION3_LBNFCN_ADR_REGION3_LBN 96 etherfabric.c 　
1104
 FCN_ADR_REGION3_WIDTHFCN_ADR_REGION3_WIDTH 18 etherfabric.c 　
1105
 FCN_INT_EN_REG_KERFCN_INT_EN_REG_KER 0x0010 etherfabric.c 　
1106
 FCN_MEM_PERR_INT_EN_KER_LBNFCN_MEM_PERR_INT_EN_KER_LBN 5 etherfabric.c 　
1107
 FCN_MEM_PERR_INT_EN_KER_WIDTHFCN_MEM_PERR_INT_EN_KER_WIDTH 1 etherfabric.c 　
1108
 FCN_KER_INT_CHAR_LBNFCN_KER_INT_CHAR_LBN 4 etherfabric.c 　
1109
 FCN_KER_INT_CHAR_WIDTHFCN_KER_INT_CHAR_WIDTH 1 etherfabric.c 　
1110
 FCN_KER_INT_KER_LBNFCN_KER_INT_KER_LBN 3 etherfabric.c 　
1111
 FCN_KER_INT_KER_WIDTHFCN_KER_INT_KER_WIDTH 1 etherfabric.c 　
1112
 FCN_ILL_ADR_ERR_INT_EN_KER_LBNFCN_ILL_ADR_ERR_INT_EN_KER_LBN 2 etherfabric.c 　
1113
 FCN_ILL_ADR_ERR_INT_EN_KER_WIDTFCN_ILL_ADR_ERR_INT_EN_KER_WIDT 1 etherfabric.c 　
1114
 FCN_SRM_PERR_INT_EN_KER_LBNFCN_SRM_PERR_INT_EN_KER_LBN 1 etherfabric.c 　
1115
 FCN_SRM_PERR_INT_EN_KER_WIDTHFCN_SRM_PERR_INT_EN_KER_WIDTH 1 etherfabric.c 　
1116
 FCN_DRV_INT_EN_KER_LBNFCN_DRV_INT_EN_KER_LBN 0 etherfabric.c 　
1117
 FCN_DRV_INT_EN_KER_WIDTHFCN_DRV_INT_EN_KER_WIDTH 1 etherfabric.c 　
1118
 FCN_INT_ADR_REG_KERFCN_INT_ADR_REG_KER 0x0030 etherfabric.c 　
1119
 FCN_INT_ADR_KER_LBNFCN_INT_ADR_KER_LBN 0 etherfabric.c 　
1120
 FCN_INT_ADR_KER_WIDTHFCN_INT_ADR_KER_WIDTH EFAB_DMA_TYPE_WIDTH ( 64 ) etherfabric.c 　
1121
 INT_ISR0_B0INT_ISR0_B0 0x90 etherfabric.c 　
1122
 INT_ISR1_B0INT_ISR1_B0 0xA0 etherfabric.c 　
1123
 FCN_INT_ACK_KER_REG_A1FCN_INT_ACK_KER_REG_A1 0x0050 etherfabric.c 　
1124
 INT_ACK_DUMMY_DATA_LBNINT_ACK_DUMMY_DATA_LBN 0 etherfabric.c 　
1125
 INT_ACK_DUMMY_DATA_WIDTHINT_ACK_DUMMY_DATA_WIDTH 32 etherfabric.c 　
1126
 WORK_AROUND_BROKEN_PCI_READS_REWORK_AROUND_BROKEN_PCI_READS_RE 0x0070 etherfabric.c 　
1127
 FCN_HW_INIT_REG_KERFCN_HW_INIT_REG_KER 0x00c0 etherfabric.c 　
1128
 FCN_BCSR_TARGET_MASK_LBNFCN_BCSR_TARGET_MASK_LBN 101 etherfabric.c 　
1129
 FCN_BCSR_TARGET_MASK_WIDTHFCN_BCSR_TARGET_MASK_WIDTH 4 etherfabric.c 　
1130
 FCN_EE_SPI_HCMD_REGFCN_EE_SPI_HCMD_REG 0x0100 etherfabric.c 　
1131
 FCN_EE_SPI_HCMD_CMD_EN_LBNFCN_EE_SPI_HCMD_CMD_EN_LBN 31 etherfabric.c 　
1132
 FCN_EE_SPI_HCMD_CMD_EN_WIDTHFCN_EE_SPI_HCMD_CMD_EN_WIDTH 1 etherfabric.c 　
1133
 FCN_EE_WR_TIMER_ACTIVE_LBNFCN_EE_WR_TIMER_ACTIVE_LBN 28 etherfabric.c 　
1134
 FCN_EE_WR_TIMER_ACTIVE_WIDTHFCN_EE_WR_TIMER_ACTIVE_WIDTH 1 etherfabric.c 　
1135
 FCN_EE_SPI_HCMD_SF_SEL_LBNFCN_EE_SPI_HCMD_SF_SEL_LBN 24 etherfabric.c 　
1136
 FCN_EE_SPI_HCMD_SF_SEL_WIDTHFCN_EE_SPI_HCMD_SF_SEL_WIDTH 1 etherfabric.c 　
1137
 FCN_EE_SPI_EEPROMFCN_EE_SPI_EEPROM 0 etherfabric.c 　
1138
 FCN_EE_SPI_FLASHFCN_EE_SPI_FLASH 1 etherfabric.c 　
1139
 FCN_EE_SPI_HCMD_DABCNT_LBNFCN_EE_SPI_HCMD_DABCNT_LBN 16 etherfabric.c 　
1140
 FCN_EE_SPI_HCMD_DABCNT_WIDTHFCN_EE_SPI_HCMD_DABCNT_WIDTH 5 etherfabric.c 　
1141
 FCN_EE_SPI_HCMD_READ_LBNFCN_EE_SPI_HCMD_READ_LBN 15 etherfabric.c 　
1142
 FCN_EE_SPI_HCMD_READ_WIDTHFCN_EE_SPI_HCMD_READ_WIDTH 1 etherfabric.c 　
1143
 FCN_EE_SPI_READFCN_EE_SPI_READ 1 etherfabric.c 　
1144
 FCN_EE_SPI_WRITEFCN_EE_SPI_WRITE 0 etherfabric.c 　
1145
 FCN_EE_SPI_HCMD_DUBCNT_LBNFCN_EE_SPI_HCMD_DUBCNT_LBN 12 etherfabric.c 　
1146
 FCN_EE_SPI_HCMD_DUBCNT_WIDTHFCN_EE_SPI_HCMD_DUBCNT_WIDTH 2 etherfabric.c 　
1147
 FCN_EE_SPI_HCMD_ADBCNT_LBNFCN_EE_SPI_HCMD_ADBCNT_LBN 8 etherfabric.c 　
1148
 FCN_EE_SPI_HCMD_ADBCNT_WIDTHFCN_EE_SPI_HCMD_ADBCNT_WIDTH 2 etherfabric.c 　
1149
 FCN_EE_SPI_HCMD_ENC_LBNFCN_EE_SPI_HCMD_ENC_LBN 0 etherfabric.c 　
1150
 FCN_EE_SPI_HCMD_ENC_WIDTHFCN_EE_SPI_HCMD_ENC_WIDTH 8 etherfabric.c 　
1151
 FCN_EE_SPI_HADR_REGFCN_EE_SPI_HADR_REG 0x0110 etherfabric.c 　
1152
 FCN_EE_SPI_HADR_DUBYTE_LBNFCN_EE_SPI_HADR_DUBYTE_LBN 24 etherfabric.c 　
1153
 FCN_EE_SPI_HADR_DUBYTE_WIDTHFCN_EE_SPI_HADR_DUBYTE_WIDTH 8 etherfabric.c 　
1154
 FCN_EE_SPI_HADR_ADR_LBNFCN_EE_SPI_HADR_ADR_LBN 0 etherfabric.c 　
1155
 FCN_EE_SPI_HADR_ADR_WIDTHFCN_EE_SPI_HADR_ADR_WIDTH 24 etherfabric.c 　
1156
 FCN_EE_SPI_HDATA_REGFCN_EE_SPI_HDATA_REG 0x0120 etherfabric.c 　
1157
 FCN_EE_SPI_HDATA3_LBNFCN_EE_SPI_HDATA3_LBN 96 etherfabric.c 　
1158
 FCN_EE_SPI_HDATA3_WIDTHFCN_EE_SPI_HDATA3_WIDTH 32 etherfabric.c 　
1159
 FCN_EE_SPI_HDATA2_LBNFCN_EE_SPI_HDATA2_LBN 64 etherfabric.c 　
1160
 FCN_EE_SPI_HDATA2_WIDTHFCN_EE_SPI_HDATA2_WIDTH 32 etherfabric.c 　
1161
 FCN_EE_SPI_HDATA1_LBNFCN_EE_SPI_HDATA1_LBN 32 etherfabric.c 　
1162
 FCN_EE_SPI_HDATA1_WIDTHFCN_EE_SPI_HDATA1_WIDTH 32 etherfabric.c 　
1163
 FCN_EE_SPI_HDATA0_LBNFCN_EE_SPI_HDATA0_LBN 0 etherfabric.c 　
1164
 FCN_EE_SPI_HDATA0_WIDTHFCN_EE_SPI_HDATA0_WIDTH 32 etherfabric.c 　
1165
 FCN_EE_VPD_CFG_REGFCN_EE_VPD_CFG_REG 0x0140 etherfabric.c 　
1166
 FCN_EE_VPD_EN_LBNFCN_EE_VPD_EN_LBN 0 etherfabric.c 　
1167
 FCN_EE_VPD_EN_WIDTHFCN_EE_VPD_EN_WIDTH 1 etherfabric.c 　
1168
 FCN_EE_VPD_EN_AD9_MODE_LBNFCN_EE_VPD_EN_AD9_MODE_LBN 1 etherfabric.c 　
1169
 FCN_EE_VPD_EN_AD9_MODE_WIDTHFCN_EE_VPD_EN_AD9_MODE_WIDTH 1 etherfabric.c 　
1170
 FCN_EE_EE_CLOCK_DIV_LBNFCN_EE_EE_CLOCK_DIV_LBN 112 etherfabric.c 　
1171
 FCN_EE_EE_CLOCK_DIV_WIDTHFCN_EE_EE_CLOCK_DIV_WIDTH 7 etherfabric.c 　
1172
 FCN_EE_SF_CLOCK_DIV_LBNFCN_EE_SF_CLOCK_DIV_LBN 120 etherfabric.c 　
1173
 FCN_EE_SF_CLOCK_DIV_WIDTHFCN_EE_SF_CLOCK_DIV_WIDTH 7 etherfabric.c 　
1174
 FCN_NIC_STAT_REGFCN_NIC_STAT_REG 0x0200 etherfabric.c 　
1175
 FCN_ONCHIP_SRAM_LBNFCN_ONCHIP_SRAM_LBN 16 etherfabric.c 　
1176
 FCN_ONCHIP_SRAM_WIDTHFCN_ONCHIP_SRAM_WIDTH 1 etherfabric.c 　
1177
 FCN_SF_PRST_LBNFCN_SF_PRST_LBN 9 etherfabric.c 　
1178
 FCN_SF_PRST_WIDTHFCN_SF_PRST_WIDTH 1 etherfabric.c 　
1179
 FCN_EE_PRST_LBNFCN_EE_PRST_LBN 8 etherfabric.c 　
1180
 FCN_EE_PRST_WIDTHFCN_EE_PRST_WIDTH 1 etherfabric.c 　
1181
 FCN_EE_STRAP_LBNFCN_EE_STRAP_LBN 7 etherfabric.c 　
1182
 FCN_EE_STRAP_WIDTHFCN_EE_STRAP_WIDTH 1 etherfabric.c 　
1183
 FCN_PCI_PCIX_MODE_LBNFCN_PCI_PCIX_MODE_LBN 4 etherfabric.c 　
1184
 FCN_PCI_PCIX_MODE_WIDTHFCN_PCI_PCIX_MODE_WIDTH 3 etherfabric.c 　
1185
 FCN_PCI_PCIX_MODE_PCI33_DECODEFCN_PCI_PCIX_MODE_PCI33_DECODE 0 etherfabric.c 　
1186
 FCN_PCI_PCIX_MODE_PCI66_DECODEFCN_PCI_PCIX_MODE_PCI66_DECODE 1 etherfabric.c 　
1187
 FCN_PCI_PCIX_MODE_PCIX66_DECODEFCN_PCI_PCIX_MODE_PCIX66_DECODE 5 etherfabric.c 　
1188
 FCN_PCI_PCIX_MODE_PCIX100_DECODFCN_PCI_PCIX_MODE_PCIX100_DECOD 6 etherfabric.c 　
1189
 FCN_PCI_PCIX_MODE_PCIX133_DECODFCN_PCI_PCIX_MODE_PCIX133_DECOD 7 etherfabric.c 　
1190
 FCN_STRAP_ISCSI_EN_LBNFCN_STRAP_ISCSI_EN_LBN 3 etherfabric.c 　
1191
 FCN_STRAP_ISCSI_EN_WIDTHFCN_STRAP_ISCSI_EN_WIDTH 1 etherfabric.c 　
1192
 FCN_STRAP_PINS_LBNFCN_STRAP_PINS_LBN 0 etherfabric.c 　
1193
 FCN_STRAP_PINS_WIDTHFCN_STRAP_PINS_WIDTH 3 etherfabric.c 　
1194
 FCN_STRAP_10G_LBNFCN_STRAP_10G_LBN 2 etherfabric.c 　
1195
 FCN_STRAP_10G_WIDTHFCN_STRAP_10G_WIDTH 1 etherfabric.c 　
1196
 FCN_STRAP_DUAL_PORT_LBNFCN_STRAP_DUAL_PORT_LBN 1 etherfabric.c 　
1197
 FCN_STRAP_DUAL_PORT_WIDTHFCN_STRAP_DUAL_PORT_WIDTH 1 etherfabric.c 　
1198
 FCN_STRAP_PCIE_LBNFCN_STRAP_PCIE_LBN 0 etherfabric.c 　
1199
 FCN_STRAP_PCIE_WIDTHFCN_STRAP_PCIE_WIDTH 1 etherfabric.c 　
1200
 FALCON_REV_A0FALCON_REV_A0 0 etherfabric.c 　
1201
 FALCON_REV_A1FALCON_REV_A1 1 etherfabric.c 　
1202
 FALCON_REV_B0FALCON_REV_B0 2 etherfabric.c 　
1203
 FCN_GPIO_CTL_REG_KERFCN_GPIO_CTL_REG_KER 0x0210 etherfabric.c 　
1204
 FCN_GPIO_CTL_REG_KERFCN_GPIO_CTL_REG_KER 0x0210 etherfabric.c 　
1205
 FCN_GPIO3_OEN_LBNFCN_GPIO3_OEN_LBN 27 etherfabric.c 　
1206
 FCN_GPIO3_OEN_WIDTHFCN_GPIO3_OEN_WIDTH 1 etherfabric.c 　
1207
 FCN_GPIO2_OEN_LBNFCN_GPIO2_OEN_LBN 26 etherfabric.c 　
1208
 FCN_GPIO2_OEN_WIDTHFCN_GPIO2_OEN_WIDTH 1 etherfabric.c 　
1209
 FCN_GPIO1_OEN_LBNFCN_GPIO1_OEN_LBN 25 etherfabric.c 　
1210
 FCN_GPIO1_OEN_WIDTHFCN_GPIO1_OEN_WIDTH 1 etherfabric.c 　
1211
 FCN_GPIO0_OEN_LBNFCN_GPIO0_OEN_LBN 24 etherfabric.c 　
1212
 FCN_GPIO0_OEN_WIDTHFCN_GPIO0_OEN_WIDTH 1 etherfabric.c 　
1213
 FCN_GPIO3_OUT_LBNFCN_GPIO3_OUT_LBN 19 etherfabric.c 　
1214
 FCN_GPIO3_OUT_WIDTHFCN_GPIO3_OUT_WIDTH 1 etherfabric.c 　
1215
 FCN_GPIO2_OUT_LBNFCN_GPIO2_OUT_LBN 18 etherfabric.c 　
1216
 FCN_GPIO2_OUT_WIDTHFCN_GPIO2_OUT_WIDTH 1 etherfabric.c 　
1217
 FCN_GPIO1_OUT_LBNFCN_GPIO1_OUT_LBN 17 etherfabric.c 　
1218
 FCN_GPIO1_OUT_WIDTHFCN_GPIO1_OUT_WIDTH 1 etherfabric.c 　
1219
 FCN_GPIO0_OUT_LBNFCN_GPIO0_OUT_LBN 16 etherfabric.c 　
1220
 FCN_GPIO0_OUT_WIDTHFCN_GPIO0_OUT_WIDTH 1 etherfabric.c 　
1221
 FCN_GPIO3_IN_LBNFCN_GPIO3_IN_LBN 11 etherfabric.c 　
1222
 FCN_GPIO3_IN_WIDTHFCN_GPIO3_IN_WIDTH 1 etherfabric.c 　
1223
 FCN_GPIO2_IN_LBNFCN_GPIO2_IN_LBN 10 etherfabric.c 　
1224
 FCN_GPIO2_IN_WIDTHFCN_GPIO2_IN_WIDTH 1 etherfabric.c 　
1225
 FCN_GPIO1_IN_LBNFCN_GPIO1_IN_LBN 9 etherfabric.c 　
1226
 FCN_GPIO1_IN_WIDTHFCN_GPIO1_IN_WIDTH 1 etherfabric.c 　
1227
 FCN_GPIO0_IN_LBNFCN_GPIO0_IN_LBN 8 etherfabric.c 　
1228
 FCN_GPIO0_IN_WIDTHFCN_GPIO0_IN_WIDTH 1 etherfabric.c 　
1229
 FCN_FLASH_PRESENT_LBNFCN_FLASH_PRESENT_LBN 7 etherfabric.c 　
1230
 FCN_FLASH_PRESENT_WIDTHFCN_FLASH_PRESENT_WIDTH 1 etherfabric.c 　
1231
 FCN_EEPROM_PRESENT_LBNFCN_EEPROM_PRESENT_LBN 6 etherfabric.c 　
1232
 FCN_EEPROM_PRESENT_WIDTHFCN_EEPROM_PRESENT_WIDTH 1 etherfabric.c 　
1233
 FCN_BOOTED_USING_NVDEVICE_LBNFCN_BOOTED_USING_NVDEVICE_LBN 3 etherfabric.c 　
1234
 FCN_BOOTED_USING_NVDEVICE_WIDTHFCN_BOOTED_USING_NVDEVICE_WIDTH 1 etherfabric.c 　
1235
 FCN_NV_MAGIC_NUMBERFCN_NV_MAGIC_NUMBER 0xFA1C etherfabric.c 　
1236
 FCN_GLB_CTL_REG_KERFCN_GLB_CTL_REG_KER 0x0220 etherfabric.c 　
1237
 FCN_EXT_PHY_RST_CTL_LBNFCN_EXT_PHY_RST_CTL_LBN 63 etherfabric.c 　
1238
 FCN_EXT_PHY_RST_CTL_WIDTHFCN_EXT_PHY_RST_CTL_WIDTH 1 etherfabric.c 　
1239
 FCN_PCIE_SD_RST_CTL_LBNFCN_PCIE_SD_RST_CTL_LBN 61 etherfabric.c 　
1240
 FCN_PCIE_SD_RST_CTL_WIDTHFCN_PCIE_SD_RST_CTL_WIDTH 1 etherfabric.c 　
1241
 FCN_PCIE_STCK_RST_CTL_LBNFCN_PCIE_STCK_RST_CTL_LBN 59 etherfabric.c 　
1242
 FCN_PCIE_STCK_RST_CTL_WIDTHFCN_PCIE_STCK_RST_CTL_WIDTH 1 etherfabric.c 　
1243
 FCN_PCIE_NSTCK_RST_CTL_LBNFCN_PCIE_NSTCK_RST_CTL_LBN 58 etherfabric.c 　
1244
 FCN_PCIE_NSTCK_RST_CTL_WIDTHFCN_PCIE_NSTCK_RST_CTL_WIDTH 1 etherfabric.c 　
1245
 FCN_PCIE_CORE_RST_CTL_LBNFCN_PCIE_CORE_RST_CTL_LBN 57 etherfabric.c 　
1246
 FCN_PCIE_CORE_RST_CTL_WIDTHFCN_PCIE_CORE_RST_CTL_WIDTH 1 etherfabric.c 　
1247
 FCN_EE_RST_CTL_LBNFCN_EE_RST_CTL_LBN 49 etherfabric.c 　
1248
 FCN_EE_RST_CTL_WIDTHFCN_EE_RST_CTL_WIDTH 1 etherfabric.c 　
1249
 FCN_RST_EXT_PHY_LBNFCN_RST_EXT_PHY_LBN 31 etherfabric.c 　
1250
 FCN_RST_EXT_PHY_WIDTHFCN_RST_EXT_PHY_WIDTH 1 etherfabric.c 　
1251
 FCN_EXT_PHY_RST_DUR_LBNFCN_EXT_PHY_RST_DUR_LBN 1 etherfabric.c 　
1252
 FCN_EXT_PHY_RST_DUR_WIDTHFCN_EXT_PHY_RST_DUR_WIDTH 3 etherfabric.c 　
1253
 FCN_SWRST_LBNFCN_SWRST_LBN 0 etherfabric.c 　
1254
 FCN_SWRST_WIDTHFCN_SWRST_WIDTH 1 etherfabric.c 　
1255
 INCLUDE_IN_RESETINCLUDE_IN_RESET 0 etherfabric.c 　
1256
 EXCLUDE_FROM_RESETEXCLUDE_FROM_RESET 1 etherfabric.c 　
1257
 FCN_ALTERA_BUILD_REG_KERFCN_ALTERA_BUILD_REG_KER 0x0300 etherfabric.c 　
1258
 FCN_VER_MAJOR_LBNFCN_VER_MAJOR_LBN 24 etherfabric.c 　
1259
 FCN_VER_MAJOR_WIDTHFCN_VER_MAJOR_WIDTH 8 etherfabric.c 　
1260
 FCN_VER_MINOR_LBNFCN_VER_MINOR_LBN 16 etherfabric.c 　
1261
 FCN_VER_MINOR_WIDTHFCN_VER_MINOR_WIDTH 8 etherfabric.c 　
1262
 FCN_VER_BUILD_LBNFCN_VER_BUILD_LBN 0 etherfabric.c 　
1263
 FCN_VER_BUILD_WIDTHFCN_VER_BUILD_WIDTH 16 etherfabric.c 　
1264
 FCN_VER_ALL_LBNFCN_VER_ALL_LBN 0 etherfabric.c 　
1265
 FCN_VER_ALL_WIDTHFCN_VER_ALL_WIDTH 32 etherfabric.c 　
1266
 FCN_SPARE_REG_KERFCN_SPARE_REG_KER 0x310 etherfabric.c 　
1267
 FCN_MEM_PERR_EN_TX_DATA_LBNFCN_MEM_PERR_EN_TX_DATA_LBN 72 etherfabric.c 　
1268
 FCN_MEM_PERR_EN_TX_DATA_WIDTHFCN_MEM_PERR_EN_TX_DATA_WIDTH 2 etherfabric.c 　
1269
 FCN_TIMER_CMD_REG_KERFCN_TIMER_CMD_REG_KER 0x420 etherfabric.c 　
1270
 FCN_TIMER_MODE_LBNFCN_TIMER_MODE_LBN 12 etherfabric.c 　
1271
 FCN_TIMER_MODE_WIDTHFCN_TIMER_MODE_WIDTH 2 etherfabric.c 　
1272
 FCN_TIMER_MODE_DISFCN_TIMER_MODE_DIS 0 etherfabric.c 　
1273
 FCN_TIMER_MODE_INT_HLDOFFFCN_TIMER_MODE_INT_HLDOFF 1 etherfabric.c 　
1274
 FCN_TIMER_VAL_LBNFCN_TIMER_VAL_LBN 0 etherfabric.c 　
1275
 FCN_TIMER_VAL_WIDTHFCN_TIMER_VAL_WIDTH 12 etherfabric.c 　
1276
 FCN_RX_CFG_REG_KERFCN_RX_CFG_REG_KER 0x800 etherfabric.c 　
1277
 FCN_RX_XOFF_EN_LBNFCN_RX_XOFF_EN_LBN 0 etherfabric.c 　
1278
 FCN_RX_XOFF_EN_WIDTHFCN_RX_XOFF_EN_WIDTH 1 etherfabric.c 　
1279
 FCN_SRM_RX_DC_CFG_REG_KERFCN_SRM_RX_DC_CFG_REG_KER 0x610 etherfabric.c 　
1280
 FCN_SRM_RX_DC_BASE_ADR_LBNFCN_SRM_RX_DC_BASE_ADR_LBN 0 etherfabric.c 　
1281
 FCN_SRM_RX_DC_BASE_ADR_WIDTHFCN_SRM_RX_DC_BASE_ADR_WIDTH 21 etherfabric.c 　
1282
 FCN_SRM_TX_DC_CFG_REG_KERFCN_SRM_TX_DC_CFG_REG_KER 0x620 etherfabric.c 　
1283
 FCN_SRM_TX_DC_BASE_ADR_LBNFCN_SRM_TX_DC_BASE_ADR_LBN 0 etherfabric.c 　
1284
 FCN_SRM_TX_DC_BASE_ADR_WIDTHFCN_SRM_TX_DC_BASE_ADR_WIDTH 21 etherfabric.c 　
1285
 FCN_SRM_CFG_REG_KERFCN_SRM_CFG_REG_KER 0x630 etherfabric.c 　
1286
 FCN_SRAM_OOB_ADR_INTEN_LBNFCN_SRAM_OOB_ADR_INTEN_LBN 5 etherfabric.c 　
1287
 FCN_SRAM_OOB_ADR_INTEN_WIDTHFCN_SRAM_OOB_ADR_INTEN_WIDTH 1 etherfabric.c 　
1288
 FCN_SRAM_OOB_BUF_INTEN_LBNFCN_SRAM_OOB_BUF_INTEN_LBN 4 etherfabric.c 　
1289
 FCN_SRAM_OOB_BUF_INTEN_WIDTHFCN_SRAM_OOB_BUF_INTEN_WIDTH 1 etherfabric.c 　
1290
 FCN_SRAM_OOB_BT_INIT_EN_LBNFCN_SRAM_OOB_BT_INIT_EN_LBN 3 etherfabric.c 　
1291
 FCN_SRAM_OOB_BT_INIT_EN_WIDTHFCN_SRAM_OOB_BT_INIT_EN_WIDTH 1 etherfabric.c 　
1292
 FCN_SRM_NUM_BANK_LBNFCN_SRM_NUM_BANK_LBN 2 etherfabric.c 　
1293
 FCN_SRM_NUM_BANK_WIDTHFCN_SRM_NUM_BANK_WIDTH 1 etherfabric.c 　
1294
 FCN_SRM_BANK_SIZE_LBNFCN_SRM_BANK_SIZE_LBN 0 etherfabric.c 　
1295
 FCN_SRM_BANK_SIZE_WIDTHFCN_SRM_BANK_SIZE_WIDTH 2 etherfabric.c 　
1296
 FCN_SRM_NUM_BANKS_AND_BANK_SIZEFCN_SRM_NUM_BANKS_AND_BANK_SIZE 0 etherfabric.c 　
1297
 FCN_SRM_NUM_BANKS_AND_BANK_SIZEFCN_SRM_NUM_BANKS_AND_BANK_SIZE 3 etherfabric.c 　
1298
 FCN_RX_CFG_REG_KERFCN_RX_CFG_REG_KER 0x800 etherfabric.c 　
1299
 FCN_RX_INGR_EN_B0_LBNFCN_RX_INGR_EN_B0_LBN 47 etherfabric.c 　
1300
 FCN_RX_INGR_EN_B0_WIDTHFCN_RX_INGR_EN_B0_WIDTH 1 etherfabric.c 　
1301
 FCN_RX_USR_BUF_SIZE_B0_LBNFCN_RX_USR_BUF_SIZE_B0_LBN 19 etherfabric.c 　
1302
 FCN_RX_USR_BUF_SIZE_B0_WIDTHFCN_RX_USR_BUF_SIZE_B0_WIDTH 9 etherfabric.c 　
1303
 FCN_RX_XON_MAC_TH_B0_LBNFCN_RX_XON_MAC_TH_B0_LBN 10 etherfabric.c 　
1304
 FCN_RX_XON_MAC_TH_B0_WIDTHFCN_RX_XON_MAC_TH_B0_WIDTH 9 etherfabric.c 　
1305
 FCN_RX_XOFF_MAC_TH_B0_LBNFCN_RX_XOFF_MAC_TH_B0_LBN 1 etherfabric.c 　
1306
 FCN_RX_XOFF_MAC_TH_B0_WIDTHFCN_RX_XOFF_MAC_TH_B0_WIDTH 9 etherfabric.c 　
1307
 FCN_RX_XOFF_MAC_EN_B0_LBNFCN_RX_XOFF_MAC_EN_B0_LBN 0 etherfabric.c 　
1308
 FCN_RX_XOFF_MAC_EN_B0_WIDTHFCN_RX_XOFF_MAC_EN_B0_WIDTH 1 etherfabric.c 　
1309
 FCN_RX_USR_BUF_SIZE_A1_LBNFCN_RX_USR_BUF_SIZE_A1_LBN 11 etherfabric.c 　
1310
 FCN_RX_USR_BUF_SIZE_A1_WIDTHFCN_RX_USR_BUF_SIZE_A1_WIDTH 9 etherfabric.c 　
1311
 FCN_RX_XON_MAC_TH_A1_LBNFCN_RX_XON_MAC_TH_A1_LBN 6 etherfabric.c 　
1312
 FCN_RX_XON_MAC_TH_A1_WIDTHFCN_RX_XON_MAC_TH_A1_WIDTH 5 etherfabric.c 　
1313
 FCN_RX_XOFF_MAC_TH_A1_LBNFCN_RX_XOFF_MAC_TH_A1_LBN 1 etherfabric.c 　
1314
 FCN_RX_XOFF_MAC_TH_A1_WIDTHFCN_RX_XOFF_MAC_TH_A1_WIDTH 5 etherfabric.c 　
1315
 FCN_RX_XOFF_MAC_EN_A1_LBNFCN_RX_XOFF_MAC_EN_A1_LBN 0 etherfabric.c 　
1316
 FCN_RX_XOFF_MAC_EN_A1_WIDTHFCN_RX_XOFF_MAC_EN_A1_WIDTH 1 etherfabric.c 　
1317
 FCN_RX_USR_BUF_SIZE_A1_LBNFCN_RX_USR_BUF_SIZE_A1_LBN 11 etherfabric.c 　
1318
 FCN_RX_USR_BUF_SIZE_A1_WIDTHFCN_RX_USR_BUF_SIZE_A1_WIDTH 9 etherfabric.c 　
1319
 FCN_RX_XOFF_MAC_EN_A1_LBNFCN_RX_XOFF_MAC_EN_A1_LBN 0 etherfabric.c 　
1320
 FCN_RX_XOFF_MAC_EN_A1_WIDTHFCN_RX_XOFF_MAC_EN_A1_WIDTH 1 etherfabric.c 　
1321
 FCN_RX_FILTER_CTL_REG_KERFCN_RX_FILTER_CTL_REG_KER 0x810 etherfabric.c 　
1322
 FCN_UDP_FULL_SRCH_LIMIT_LBNFCN_UDP_FULL_SRCH_LIMIT_LBN 32 etherfabric.c 　
1323
 FCN_UDP_FULL_SRCH_LIMIT_WIDTHFCN_UDP_FULL_SRCH_LIMIT_WIDTH 8 etherfabric.c 　
1324
 FCN_NUM_KER_LBNFCN_NUM_KER_LBN 24 etherfabric.c 　
1325
 FCN_NUM_KER_WIDTHFCN_NUM_KER_WIDTH 2 etherfabric.c 　
1326
 FCN_UDP_WILD_SRCH_LIMIT_LBNFCN_UDP_WILD_SRCH_LIMIT_LBN 16 etherfabric.c 　
1327
 FCN_UDP_WILD_SRCH_LIMIT_WIDTHFCN_UDP_WILD_SRCH_LIMIT_WIDTH 8 etherfabric.c 　
1328
 FCN_TCP_WILD_SRCH_LIMIT_LBNFCN_TCP_WILD_SRCH_LIMIT_LBN 8 etherfabric.c 　
1329
 FCN_TCP_WILD_SRCH_LIMIT_WIDTHFCN_TCP_WILD_SRCH_LIMIT_WIDTH 8 etherfabric.c 　
1330
 FCN_TCP_FULL_SRCH_LIMIT_LBNFCN_TCP_FULL_SRCH_LIMIT_LBN 0 etherfabric.c 　
1331
 FCN_TCP_FULL_SRCH_LIMIT_WIDTHFCN_TCP_FULL_SRCH_LIMIT_WIDTH 8 etherfabric.c 　
1332
 FCN_RX_FLUSH_DESCQ_REG_KERFCN_RX_FLUSH_DESCQ_REG_KER 0x0820 etherfabric.c 　
1333
 FCN_RX_FLUSH_DESCQ_CMD_LBNFCN_RX_FLUSH_DESCQ_CMD_LBN 24 etherfabric.c 　
1334
 FCN_RX_FLUSH_DESCQ_CMD_WIDTHFCN_RX_FLUSH_DESCQ_CMD_WIDTH 1 etherfabric.c 　
1335
 FCN_RX_FLUSH_DESCQ_LBNFCN_RX_FLUSH_DESCQ_LBN 0 etherfabric.c 　
1336
 FCN_RX_FLUSH_DESCQ_WIDTHFCN_RX_FLUSH_DESCQ_WIDTH 12 etherfabric.c 　
1337
 FCN_RX_DESC_UPD_REG_KERFCN_RX_DESC_UPD_REG_KER 0x0830 etherfabric.c 　
1338
 FCN_RX_DESC_WPTR_LBNFCN_RX_DESC_WPTR_LBN 96 etherfabric.c 　
1339
 FCN_RX_DESC_WPTR_WIDTHFCN_RX_DESC_WPTR_WIDTH 12 etherfabric.c 　
1340
 FCN_RX_DESC_UPD_REG_KER_DWORDFCN_RX_DESC_UPD_REG_KER_DWORD ( FCN_RX_DESC_UPD_REG_KER + 12 ) etherfabric.c 　
1341
 FCN_RX_DESC_WPTR_DWORD_LBNFCN_RX_DESC_WPTR_DWORD_LBN 0 etherfabric.c 　
1342
 FCN_RX_DESC_WPTR_DWORD_WIDTHFCN_RX_DESC_WPTR_DWORD_WIDTH 12 etherfabric.c 　
1343
 FCN_RX_DC_CFG_REG_KERFCN_RX_DC_CFG_REG_KER 0x840 etherfabric.c 　
1344
 FCN_RX_DC_SIZE_LBNFCN_RX_DC_SIZE_LBN 0 etherfabric.c 　
1345
 FCN_RX_DC_SIZE_WIDTHFCN_RX_DC_SIZE_WIDTH 2 etherfabric.c 　
1346
 FCN_RX_SELF_RST_REG_KERFCN_RX_SELF_RST_REG_KER 0x890 etherfabric.c 　
1347
 FCN_RX_ISCSI_DIS_LBNFCN_RX_ISCSI_DIS_LBN 17 etherfabric.c 　
1348
 FCN_RX_ISCSI_DIS_WIDTHFCN_RX_ISCSI_DIS_WIDTH 1 etherfabric.c 　
1349
 FCN_RX_NODESC_WAIT_DIS_LBNFCN_RX_NODESC_WAIT_DIS_LBN 9 etherfabric.c 　
1350
 FCN_RX_NODESC_WAIT_DIS_WIDTHFCN_RX_NODESC_WAIT_DIS_WIDTH 1 etherfabric.c 　
1351
 FCN_RX_RECOVERY_EN_LBNFCN_RX_RECOVERY_EN_LBN 8 etherfabric.c 　
1352
 FCN_RX_RECOVERY_EN_WIDTHFCN_RX_RECOVERY_EN_WIDTH 1 etherfabric.c 　
1353
 FCN_TX_FLUSH_DESCQ_REG_KERFCN_TX_FLUSH_DESCQ_REG_KER 0x0a00 etherfabric.c 　
1354
 FCN_TX_FLUSH_DESCQ_CMD_LBNFCN_TX_FLUSH_DESCQ_CMD_LBN 12 etherfabric.c 　
1355
 FCN_TX_FLUSH_DESCQ_CMD_WIDTHFCN_TX_FLUSH_DESCQ_CMD_WIDTH 1 etherfabric.c 　
1356
 FCN_TX_FLUSH_DESCQ_LBNFCN_TX_FLUSH_DESCQ_LBN 0 etherfabric.c 　
1357
 FCN_TX_FLUSH_DESCQ_WIDTHFCN_TX_FLUSH_DESCQ_WIDTH 12 etherfabric.c 　
1358
 FCN_TX_CFG2_REG_KERFCN_TX_CFG2_REG_KER 0xa80 etherfabric.c 　
1359
 FCN_TX_DIS_NON_IP_EV_LBNFCN_TX_DIS_NON_IP_EV_LBN 17 etherfabric.c 　
1360
 FCN_TX_DIS_NON_IP_EV_WIDTHFCN_TX_DIS_NON_IP_EV_WIDTH 1 etherfabric.c 　
1361
 FCN_TX_DESC_UPD_REG_KERFCN_TX_DESC_UPD_REG_KER 0x0a10 etherfabric.c 　
1362
 FCN_TX_DESC_WPTR_LBNFCN_TX_DESC_WPTR_LBN 96 etherfabric.c 　
1363
 FCN_TX_DESC_WPTR_WIDTHFCN_TX_DESC_WPTR_WIDTH 12 etherfabric.c 　
1364
 FCN_TX_DESC_UPD_REG_KER_DWORDFCN_TX_DESC_UPD_REG_KER_DWORD ( FCN_TX_DESC_UPD_REG_KER + 12 ) etherfabric.c 　
1365
 FCN_TX_DESC_WPTR_DWORD_LBNFCN_TX_DESC_WPTR_DWORD_LBN 0 etherfabric.c 　
1366
 FCN_TX_DESC_WPTR_DWORD_WIDTHFCN_TX_DESC_WPTR_DWORD_WIDTH 12 etherfabric.c 　
1367
 FCN_TX_DC_CFG_REG_KERFCN_TX_DC_CFG_REG_KER 0xa20 etherfabric.c 　
1368
 FCN_TX_DC_SIZE_LBNFCN_TX_DC_SIZE_LBN 0 etherfabric.c 　
1369
 FCN_TX_DC_SIZE_WIDTHFCN_TX_DC_SIZE_WIDTH 2 etherfabric.c 　
1370
 FCN_MD_TXD_REG_KERFCN_MD_TXD_REG_KER 0xc00 etherfabric.c 　
1371
 FCN_MD_TXD_LBNFCN_MD_TXD_LBN 0 etherfabric.c 　
1372
 FCN_MD_TXD_WIDTHFCN_MD_TXD_WIDTH 16 etherfabric.c 　
1373
 FCN_MD_RXD_REG_KERFCN_MD_RXD_REG_KER 0xc10 etherfabric.c 　
1374
 FCN_MD_RXD_LBNFCN_MD_RXD_LBN 0 etherfabric.c 　
1375
 FCN_MD_RXD_WIDTHFCN_MD_RXD_WIDTH 16 etherfabric.c 　
1376
 FCN_MD_CS_REG_KERFCN_MD_CS_REG_KER 0xc20 etherfabric.c 　
1377
 FCN_MD_GC_LBNFCN_MD_GC_LBN 4 etherfabric.c 　
1378
 FCN_MD_GC_WIDTHFCN_MD_GC_WIDTH 1 etherfabric.c 　
1379
 FCN_MD_RIC_LBNFCN_MD_RIC_LBN 2 etherfabric.c 　
1380
 FCN_MD_RIC_WIDTHFCN_MD_RIC_WIDTH 1 etherfabric.c 　
1381
 FCN_MD_RDC_LBNFCN_MD_RDC_LBN 1 etherfabric.c 　
1382
 FCN_MD_RDC_WIDTHFCN_MD_RDC_WIDTH 1 etherfabric.c 　
1383
 FCN_MD_WRC_LBNFCN_MD_WRC_LBN 0 etherfabric.c 　
1384
 FCN_MD_WRC_WIDTHFCN_MD_WRC_WIDTH 1 etherfabric.c 　
1385
 FCN_MD_PHY_ADR_REG_KERFCN_MD_PHY_ADR_REG_KER 0xc30 etherfabric.c 　
1386
 FCN_MD_PHY_ADR_LBNFCN_MD_PHY_ADR_LBN 0 etherfabric.c 　
1387
 FCN_MD_PHY_ADR_WIDTHFCN_MD_PHY_ADR_WIDTH 16 etherfabric.c 　
1388
 FCN_MD_ID_REG_KERFCN_MD_ID_REG_KER 0xc40 etherfabric.c 　
1389
 FCN_MD_PRT_ADR_LBNFCN_MD_PRT_ADR_LBN 11 etherfabric.c 　
1390
 FCN_MD_PRT_ADR_WIDTHFCN_MD_PRT_ADR_WIDTH 5 etherfabric.c 　
1391
 FCN_MD_DEV_ADR_LBNFCN_MD_DEV_ADR_LBN 6 etherfabric.c 　
1392
 FCN_MD_DEV_ADR_WIDTHFCN_MD_DEV_ADR_WIDTH 5 etherfabric.c 　
1393
 FCN_MD_STAT_REG_KERFCN_MD_STAT_REG_KER 0xc50 etherfabric.c 　
1394
 FCN_MD_PINT_LBNFCN_MD_PINT_LBN 4 etherfabric.c 　
1395
 FCN_MD_PINT_WIDTHFCN_MD_PINT_WIDTH 1 etherfabric.c 　
1396
 FCN_MD_DONE_LBNFCN_MD_DONE_LBN 3 etherfabric.c 　
1397
 FCN_MD_DONE_WIDTHFCN_MD_DONE_WIDTH 1 etherfabric.c 　
1398
 FCN_MD_BSERR_LBNFCN_MD_BSERR_LBN 2 etherfabric.c 　
1399
 FCN_MD_BSERR_WIDTHFCN_MD_BSERR_WIDTH 1 etherfabric.c 　
1400
 FCN_MD_LNFL_LBNFCN_MD_LNFL_LBN 1 etherfabric.c 　
1401
 FCN_MD_LNFL_WIDTHFCN_MD_LNFL_WIDTH 1 etherfabric.c 　
1402
 FCN_MD_BSY_LBNFCN_MD_BSY_LBN 0 etherfabric.c 　
1403
 FCN_MD_BSY_WIDTHFCN_MD_BSY_WIDTH 1 etherfabric.c 　
1404
 FCN_MAC0_CTRL_REG_KERFCN_MAC0_CTRL_REG_KER 0xc80 etherfabric.c 　
1405
 FCN_MAC1_CTRL_REG_KERFCN_MAC1_CTRL_REG_KER 0xc90 etherfabric.c 　
1406
 FCN_MAC_XOFF_VAL_LBNFCN_MAC_XOFF_VAL_LBN 16 etherfabric.c 　
1407
 FCN_MAC_XOFF_VAL_WIDTHFCN_MAC_XOFF_VAL_WIDTH 16 etherfabric.c 　
1408
 FCN_MAC_BCAD_ACPT_LBNFCN_MAC_BCAD_ACPT_LBN 4 etherfabric.c 　
1409
 FCN_MAC_BCAD_ACPT_WIDTHFCN_MAC_BCAD_ACPT_WIDTH 1 etherfabric.c 　
1410
 FCN_MAC_UC_PROM_LBNFCN_MAC_UC_PROM_LBN 3 etherfabric.c 　
1411
 FCN_MAC_UC_PROM_WIDTHFCN_MAC_UC_PROM_WIDTH 1 etherfabric.c 　
1412
 FCN_MAC_LINK_STATUS_LBNFCN_MAC_LINK_STATUS_LBN 2 etherfabric.c 　
1413
 FCN_MAC_LINK_STATUS_WIDTHFCN_MAC_LINK_STATUS_WIDTH 1 etherfabric.c 　
1414
 FCN_MAC_SPEED_LBNFCN_MAC_SPEED_LBN 0 etherfabric.c 　
1415
 FCN_MAC_SPEED_WIDTHFCN_MAC_SPEED_WIDTH 2 etherfabric.c 　
1416
 XX_TXDRV_DEQ_DEFAULTXX_TXDRV_DEQ_DEFAULT 0xe etherfabric.c deq=.6
1417
 XX_TXDRV_DTX_DEFAULTXX_TXDRV_DTX_DEFAULT 0x5 etherfabric.c 1.25
1418
 XX_SD_CTL_DRV_DEFAULTXX_SD_CTL_DRV_DEFAULT 0 etherfabric.c 20mA
1419
 FALCON_GMAC_REGBANKFALCON_GMAC_REGBANK 0xe00 etherfabric.c 　
1420
 FALCON_GMAC_REGBANK_SIZEFALCON_GMAC_REGBANK_SIZE 0x200 etherfabric.c 　
1421
 FALCON_GMAC_REG_SIZEFALCON_GMAC_REG_SIZE 0x10 etherfabric.c 　
1422
 FALCON_XMAC_REGBANKFALCON_XMAC_REGBANK 0x1200 etherfabric.c 　
1423
 FALCON_XMAC_REGBANK_SIZEFALCON_XMAC_REGBANK_SIZE 0x200 etherfabric.c 　
1424
 FALCON_XMAC_REG_SIZEFALCON_XMAC_REG_SIZE 0x10 etherfabric.c 　
1425
 FCN_XM_ADR_LO_REG_MACFCN_XM_ADR_LO_REG_MAC 0x00 etherfabric.c 　
1426
 FCN_XM_ADR_3_LBNFCN_XM_ADR_3_LBN 24 etherfabric.c 　
1427
 FCN_XM_ADR_3_WIDTHFCN_XM_ADR_3_WIDTH 8 etherfabric.c 　
1428
 FCN_XM_ADR_2_LBNFCN_XM_ADR_2_LBN 16 etherfabric.c 　
1429
 FCN_XM_ADR_2_WIDTHFCN_XM_ADR_2_WIDTH 8 etherfabric.c 　
1430
 FCN_XM_ADR_1_LBNFCN_XM_ADR_1_LBN 8 etherfabric.c 　
1431
 FCN_XM_ADR_1_WIDTHFCN_XM_ADR_1_WIDTH 8 etherfabric.c 　
1432
 FCN_XM_ADR_0_LBNFCN_XM_ADR_0_LBN 0 etherfabric.c 　
1433
 FCN_XM_ADR_0_WIDTHFCN_XM_ADR_0_WIDTH 8 etherfabric.c 　
1434
 FCN_XM_ADR_HI_REG_MACFCN_XM_ADR_HI_REG_MAC 0x01 etherfabric.c 　
1435
 FCN_XM_ADR_5_LBNFCN_XM_ADR_5_LBN 8 etherfabric.c 　
1436
 FCN_XM_ADR_5_WIDTHFCN_XM_ADR_5_WIDTH 8 etherfabric.c 　
1437
 FCN_XM_ADR_4_LBNFCN_XM_ADR_4_LBN 0 etherfabric.c 　
1438
 FCN_XM_ADR_4_WIDTHFCN_XM_ADR_4_WIDTH 8 etherfabric.c 　
1439
 FCN_XM_GLB_CFG_REG_MACFCN_XM_GLB_CFG_REG_MAC 0x02 etherfabric.c 　
1440
 FCN_XM_RX_STAT_EN_LBNFCN_XM_RX_STAT_EN_LBN 11 etherfabric.c 　
1441
 FCN_XM_RX_STAT_EN_WIDTHFCN_XM_RX_STAT_EN_WIDTH 1 etherfabric.c 　
1442
 FCN_XM_TX_STAT_EN_LBNFCN_XM_TX_STAT_EN_LBN 10 etherfabric.c 　
1443
 FCN_XM_TX_STAT_EN_WIDTHFCN_XM_TX_STAT_EN_WIDTH 1 etherfabric.c 　
1444
 FCN_XM_RX_JUMBO_MODE_LBNFCN_XM_RX_JUMBO_MODE_LBN 6 etherfabric.c 　
1445
 FCN_XM_RX_JUMBO_MODE_WIDTHFCN_XM_RX_JUMBO_MODE_WIDTH 1 etherfabric.c 　
1446
 FCN_XM_CORE_RST_LBNFCN_XM_CORE_RST_LBN 0 etherfabric.c 　
1447
 FCN_XM_CORE_RST_WIDTHFCN_XM_CORE_RST_WIDTH 1 etherfabric.c 　
1448
 FCN_XM_TX_CFG_REG_MACFCN_XM_TX_CFG_REG_MAC 0x03 etherfabric.c 　
1449
 FCN_XM_IPG_LBNFCN_XM_IPG_LBN 16 etherfabric.c 　
1450
 FCN_XM_IPG_WIDTHFCN_XM_IPG_WIDTH 4 etherfabric.c 　
1451
 FCN_XM_FCNTL_LBNFCN_XM_FCNTL_LBN 10 etherfabric.c 　
1452
 FCN_XM_FCNTL_WIDTHFCN_XM_FCNTL_WIDTH 1 etherfabric.c 　
1453
 FCN_XM_TXCRC_LBNFCN_XM_TXCRC_LBN 8 etherfabric.c 　
1454
 FCN_XM_TXCRC_WIDTHFCN_XM_TXCRC_WIDTH 1 etherfabric.c 　
1455
 FCN_XM_AUTO_PAD_LBNFCN_XM_AUTO_PAD_LBN 5 etherfabric.c 　
1456
 FCN_XM_AUTO_PAD_WIDTHFCN_XM_AUTO_PAD_WIDTH 1 etherfabric.c 　
1457
 FCN_XM_TX_PRMBL_LBNFCN_XM_TX_PRMBL_LBN 2 etherfabric.c 　
1458
 FCN_XM_TX_PRMBL_WIDTHFCN_XM_TX_PRMBL_WIDTH 1 etherfabric.c 　
1459
 FCN_XM_TXEN_LBNFCN_XM_TXEN_LBN 1 etherfabric.c 　
1460
 FCN_XM_TXEN_WIDTHFCN_XM_TXEN_WIDTH 1 etherfabric.c 　
1461
 FCN_XM_RX_CFG_REG_MACFCN_XM_RX_CFG_REG_MAC 0x04 etherfabric.c 　
1462
 FCN_XM_PASS_CRC_ERR_LBNFCN_XM_PASS_CRC_ERR_LBN 25 etherfabric.c 　
1463
 FCN_XM_PASS_CRC_ERR_WIDTHFCN_XM_PASS_CRC_ERR_WIDTH 1 etherfabric.c 　
1464
 FCN_XM_AUTO_DEPAD_LBNFCN_XM_AUTO_DEPAD_LBN 8 etherfabric.c 　
1465
 FCN_XM_AUTO_DEPAD_WIDTHFCN_XM_AUTO_DEPAD_WIDTH 1 etherfabric.c 　
1466
 FCN_XM_RXEN_LBNFCN_XM_RXEN_LBN 1 etherfabric.c 　
1467
 FCN_XM_RXEN_WIDTHFCN_XM_RXEN_WIDTH 1 etherfabric.c 　
1468
 FCN_XM_MGT_INT_MSK_REG_MAC_B0FCN_XM_MGT_INT_MSK_REG_MAC_B0 0x5 etherfabric.c 　
1469
 FCN_XM_MSK_PRMBLE_ERR_LBNFCN_XM_MSK_PRMBLE_ERR_LBN 2 etherfabric.c 　
1470
 FCN_XM_MSK_PRMBLE_ERR_WIDTHFCN_XM_MSK_PRMBLE_ERR_WIDTH 1 etherfabric.c 　
1471
 FCN_XM_MSK_RMTFLT_LBNFCN_XM_MSK_RMTFLT_LBN 1 etherfabric.c 　
1472
 FCN_XM_MSK_RMTFLT_WIDTHFCN_XM_MSK_RMTFLT_WIDTH 1 etherfabric.c 　
1473
 FCN_XM_MSK_LCLFLT_LBNFCN_XM_MSK_LCLFLT_LBN 0 etherfabric.c 　
1474
 FCN_XM_MSK_LCLFLT_WIDTHFCN_XM_MSK_LCLFLT_WIDTH 1 etherfabric.c 　
1475
 FCN_XM_FC_REG_MACFCN_XM_FC_REG_MAC 0x7 etherfabric.c 　
1476
 FCN_XM_PAUSE_TIME_LBNFCN_XM_PAUSE_TIME_LBN 16 etherfabric.c 　
1477
 FCN_XM_PAUSE_TIME_WIDTHFCN_XM_PAUSE_TIME_WIDTH 16 etherfabric.c 　
1478
 FCN_XM_DIS_FCNTL_LBNFCN_XM_DIS_FCNTL_LBN 0 etherfabric.c 　
1479
 FCN_XM_DIS_FCNTL_WIDTHFCN_XM_DIS_FCNTL_WIDTH 1 etherfabric.c 　
1480
 FCN_XM_TX_PARAM_REG_MACFCN_XM_TX_PARAM_REG_MAC 0x0d etherfabric.c 　
1481
 FCN_XM_TX_JUMBO_MODE_LBNFCN_XM_TX_JUMBO_MODE_LBN 31 etherfabric.c 　
1482
 FCN_XM_TX_JUMBO_MODE_WIDTHFCN_XM_TX_JUMBO_MODE_WIDTH 1 etherfabric.c 　
1483
 FCN_XM_MAX_TX_FRM_SIZE_LBNFCN_XM_MAX_TX_FRM_SIZE_LBN 16 etherfabric.c 　
1484
 FCN_XM_MAX_TX_FRM_SIZE_WIDTHFCN_XM_MAX_TX_FRM_SIZE_WIDTH 14 etherfabric.c 　
1485
 FCN_XM_ACPT_ALL_MCAST_LBNFCN_XM_ACPT_ALL_MCAST_LBN 11 etherfabric.c 　
1486
 FCN_XM_ACPT_ALL_MCAST_WIDTHFCN_XM_ACPT_ALL_MCAST_WIDTH 1 etherfabric.c 　
1487
 FCN_XM_RX_PARAM_REG_MACFCN_XM_RX_PARAM_REG_MAC 0x0e etherfabric.c 　
1488
 FCN_XM_MAX_RX_FRM_SIZE_LBNFCN_XM_MAX_RX_FRM_SIZE_LBN 0 etherfabric.c 　
1489
 FCN_XM_MAX_RX_FRM_SIZE_WIDTHFCN_XM_MAX_RX_FRM_SIZE_WIDTH 14 etherfabric.c 　
1490
 FCN_XM_MGT_INT_REG_MAC_B0FCN_XM_MGT_INT_REG_MAC_B0 0x0f etherfabric.c 　
1491
 FCN_XM_PRMBLE_ERRFCN_XM_PRMBLE_ERR 2 etherfabric.c 　
1492
 FCN_XM_PRMBLE_WIDTHFCN_XM_PRMBLE_WIDTH 1 etherfabric.c 　
1493
 FCN_XM_RMTFLT_LBNFCN_XM_RMTFLT_LBN 1 etherfabric.c 　
1494
 FCN_XM_RMTFLT_WIDTHFCN_XM_RMTFLT_WIDTH 1 etherfabric.c 　
1495
 FCN_XM_LCLFLT_LBNFCN_XM_LCLFLT_LBN 0 etherfabric.c 　
1496
 FCN_XM_LCLFLT_WIDTHFCN_XM_LCLFLT_WIDTH 1 etherfabric.c 　
1497
 FCN_XX_ALIGN_DONE_LBNFCN_XX_ALIGN_DONE_LBN 20 etherfabric.c 　
1498
 FCN_XX_ALIGN_DONE_WIDTHFCN_XX_ALIGN_DONE_WIDTH 1 etherfabric.c 　
1499
 FCN_XX_CORE_STAT_REG_MACFCN_XX_CORE_STAT_REG_MAC 0x16 etherfabric.c 　
1500
 FCN_XX_SYNC_STAT_LBNFCN_XX_SYNC_STAT_LBN 16 etherfabric.c 　
1501
 FCN_XX_SYNC_STAT_WIDTHFCN_XX_SYNC_STAT_WIDTH 4 etherfabric.c 　
1502
 FCN_XX_SYNC_STAT_DECODE_SYNCEDFCN_XX_SYNC_STAT_DECODE_SYNCED 0xf etherfabric.c 　
1503
 FCN_XX_COMMA_DET_LBNFCN_XX_COMMA_DET_LBN 12 etherfabric.c 　
1504
 FCN_XX_COMMA_DET_WIDTHFCN_XX_COMMA_DET_WIDTH 4 etherfabric.c 　
1505
 FCN_XX_COMMA_DET_RESETFCN_XX_COMMA_DET_RESET 0xf etherfabric.c 　
1506
 FCN_XX_CHARERR_LBNFCN_XX_CHARERR_LBN 4 etherfabric.c 　
1507
 FCN_XX_CHARERR_WIDTHFCN_XX_CHARERR_WIDTH 4 etherfabric.c 　
1508
 FCN_XX_CHARERR_RESETFCN_XX_CHARERR_RESET 0xf etherfabric.c 　
1509
 FCN_XX_DISPERR_LBNFCN_XX_DISPERR_LBN 0 etherfabric.c 　
1510
 FCN_XX_DISPERR_WIDTHFCN_XX_DISPERR_WIDTH 4 etherfabric.c 　
1511
 FCN_XX_DISPERR_RESETFCN_XX_DISPERR_RESET 0xf etherfabric.c 　
1512
 FCN_XX_PWR_RST_REG_MACFCN_XX_PWR_RST_REG_MAC 0x10 etherfabric.c 　
1513
 FCN_XX_PWRDND_EN_LBNFCN_XX_PWRDND_EN_LBN 15 etherfabric.c 　
1514
 FCN_XX_PWRDND_EN_WIDTHFCN_XX_PWRDND_EN_WIDTH 1 etherfabric.c 　
1515
 FCN_XX_PWRDNC_EN_LBNFCN_XX_PWRDNC_EN_LBN 14 etherfabric.c 　
1516
 FCN_XX_PWRDNC_EN_WIDTHFCN_XX_PWRDNC_EN_WIDTH 1 etherfabric.c 　
1517
 FCN_XX_PWRDNB_EN_LBNFCN_XX_PWRDNB_EN_LBN 13 etherfabric.c 　
1518
 FCN_XX_PWRDNB_EN_WIDTHFCN_XX_PWRDNB_EN_WIDTH 1 etherfabric.c 　
1519
 FCN_XX_PWRDNA_EN_LBNFCN_XX_PWRDNA_EN_LBN 12 etherfabric.c 　
1520
 FCN_XX_PWRDNA_EN_WIDTHFCN_XX_PWRDNA_EN_WIDTH 1 etherfabric.c 　
1521
 FCN_XX_RSTPLLCD_EN_LBNFCN_XX_RSTPLLCD_EN_LBN 9 etherfabric.c 　
1522
 FCN_XX_RSTPLLCD_EN_WIDTHFCN_XX_RSTPLLCD_EN_WIDTH 1 etherfabric.c 　
1523
 FCN_XX_RSTPLLAB_EN_LBNFCN_XX_RSTPLLAB_EN_LBN 8 etherfabric.c 　
1524
 FCN_XX_RSTPLLAB_EN_WIDTHFCN_XX_RSTPLLAB_EN_WIDTH 1 etherfabric.c 　
1525
 FCN_XX_RESETD_EN_LBNFCN_XX_RESETD_EN_LBN 7 etherfabric.c 　
1526
 FCN_XX_RESETD_EN_WIDTHFCN_XX_RESETD_EN_WIDTH 1 etherfabric.c 　
1527
 FCN_XX_RESETC_EN_LBNFCN_XX_RESETC_EN_LBN 6 etherfabric.c 　
1528
 FCN_XX_RESETC_EN_WIDTHFCN_XX_RESETC_EN_WIDTH 1 etherfabric.c 　
1529
 FCN_XX_RESETB_EN_LBNFCN_XX_RESETB_EN_LBN 5 etherfabric.c 　
1530
 FCN_XX_RESETB_EN_WIDTHFCN_XX_RESETB_EN_WIDTH 1 etherfabric.c 　
1531
 FCN_XX_RESETA_EN_LBNFCN_XX_RESETA_EN_LBN 4 etherfabric.c 　
1532
 FCN_XX_RESETA_EN_WIDTHFCN_XX_RESETA_EN_WIDTH 1 etherfabric.c 　
1533
 FCN_XX_RSTXGXSRX_EN_LBNFCN_XX_RSTXGXSRX_EN_LBN 2 etherfabric.c 　
1534
 FCN_XX_RSTXGXSRX_EN_WIDTHFCN_XX_RSTXGXSRX_EN_WIDTH 1 etherfabric.c 　
1535
 FCN_XX_RSTXGXSTX_EN_LBNFCN_XX_RSTXGXSTX_EN_LBN 1 etherfabric.c 　
1536
 FCN_XX_RSTXGXSTX_EN_WIDTHFCN_XX_RSTXGXSTX_EN_WIDTH 1 etherfabric.c 　
1537
 FCN_XX_RST_XX_EN_LBNFCN_XX_RST_XX_EN_LBN 0 etherfabric.c 　
1538
 FCN_XX_RST_XX_EN_WIDTHFCN_XX_RST_XX_EN_WIDTH 1 etherfabric.c 　
1539
 FCN_XX_SD_CTL_REG_MACFCN_XX_SD_CTL_REG_MAC 0x11 etherfabric.c 　
1540
 FCN_XX_TERMADJ1_LBNFCN_XX_TERMADJ1_LBN 17 etherfabric.c 　
1541
 FCN_XX_TERMADJ1_WIDTHFCN_XX_TERMADJ1_WIDTH 1 etherfabric.c 　
1542
 FCN_XX_TERMADJ0_LBNFCN_XX_TERMADJ0_LBN 16 etherfabric.c 　
1543
 FCN_XX_TERMADJ0_WIDTHFCN_XX_TERMADJ0_WIDTH 1 etherfabric.c 　
1544
 FCN_XX_HIDRVD_LBNFCN_XX_HIDRVD_LBN 15 etherfabric.c 　
1545
 FCN_XX_HIDRVD_WIDTHFCN_XX_HIDRVD_WIDTH 1 etherfabric.c 　
1546
 FCN_XX_LODRVD_LBNFCN_XX_LODRVD_LBN 14 etherfabric.c 　
1547
 FCN_XX_LODRVD_WIDTHFCN_XX_LODRVD_WIDTH 1 etherfabric.c 　
1548
 FCN_XX_HIDRVC_LBNFCN_XX_HIDRVC_LBN 13 etherfabric.c 　
1549
 FCN_XX_HIDRVC_WIDTHFCN_XX_HIDRVC_WIDTH 1 etherfabric.c 　
1550
 FCN_XX_LODRVC_LBNFCN_XX_LODRVC_LBN 12 etherfabric.c 　
1551
 FCN_XX_LODRVC_WIDTHFCN_XX_LODRVC_WIDTH 1 etherfabric.c 　
1552
 FCN_XX_HIDRVB_LBNFCN_XX_HIDRVB_LBN 11 etherfabric.c 　
1553
 FCN_XX_HIDRVB_WIDTHFCN_XX_HIDRVB_WIDTH 1 etherfabric.c 　
1554
 FCN_XX_LODRVB_LBNFCN_XX_LODRVB_LBN 10 etherfabric.c 　
1555
 FCN_XX_LODRVB_WIDTHFCN_XX_LODRVB_WIDTH 1 etherfabric.c 　
1556
 FCN_XX_HIDRVA_LBNFCN_XX_HIDRVA_LBN 9 etherfabric.c 　
1557
 FCN_XX_HIDRVA_WIDTHFCN_XX_HIDRVA_WIDTH 1 etherfabric.c 　
1558
 FCN_XX_LODRVA_LBNFCN_XX_LODRVA_LBN 8 etherfabric.c 　
1559
 FCN_XX_LODRVA_WIDTHFCN_XX_LODRVA_WIDTH 1 etherfabric.c 　
1560
 FCN_XX_LPBKD_LBNFCN_XX_LPBKD_LBN 3 etherfabric.c 　
1561
 FCN_XX_LPBKD_WIDTHFCN_XX_LPBKD_WIDTH 1 etherfabric.c 　
1562
 FCN_XX_LPBKC_LBNFCN_XX_LPBKC_LBN 2 etherfabric.c 　
1563
 FCN_XX_LPBKC_WIDTHFCN_XX_LPBKC_WIDTH 1 etherfabric.c 　
1564
 FCN_XX_LPBKB_LBNFCN_XX_LPBKB_LBN 1 etherfabric.c 　
1565
 FCN_XX_LPBKB_WIDTHFCN_XX_LPBKB_WIDTH 1 etherfabric.c 　
1566
 FCN_XX_LPBKA_LBNFCN_XX_LPBKA_LBN 0 etherfabric.c 　
1567
 FCN_XX_LPBKA_WIDTHFCN_XX_LPBKA_WIDTH 1 etherfabric.c 　
1568
 FCN_XX_TXDRV_CTL_REG_MACFCN_XX_TXDRV_CTL_REG_MAC 0x12 etherfabric.c 　
1569
 FCN_XX_DEQD_LBNFCN_XX_DEQD_LBN 28 etherfabric.c 　
1570
 FCN_XX_DEQD_WIDTHFCN_XX_DEQD_WIDTH 4 etherfabric.c 　
1571
 FCN_XX_DEQC_LBNFCN_XX_DEQC_LBN 24 etherfabric.c 　
1572
 FCN_XX_DEQC_WIDTHFCN_XX_DEQC_WIDTH 4 etherfabric.c 　
1573
 FCN_XX_DEQB_LBNFCN_XX_DEQB_LBN 20 etherfabric.c 　
1574
 FCN_XX_DEQB_WIDTHFCN_XX_DEQB_WIDTH 4 etherfabric.c 　
1575
 FCN_XX_DEQA_LBNFCN_XX_DEQA_LBN 16 etherfabric.c 　
1576
 FCN_XX_DEQA_WIDTHFCN_XX_DEQA_WIDTH 4 etherfabric.c 　
1577
 FCN_XX_DTXD_LBNFCN_XX_DTXD_LBN 12 etherfabric.c 　
1578
 FCN_XX_DTXD_WIDTHFCN_XX_DTXD_WIDTH 4 etherfabric.c 　
1579
 FCN_XX_DTXC_LBNFCN_XX_DTXC_LBN 8 etherfabric.c 　
1580
 FCN_XX_DTXC_WIDTHFCN_XX_DTXC_WIDTH 4 etherfabric.c 　
1581
 FCN_XX_DTXB_LBNFCN_XX_DTXB_LBN 4 etherfabric.c 　
1582
 FCN_XX_DTXB_WIDTHFCN_XX_DTXB_WIDTH 4 etherfabric.c 　
1583
 FCN_XX_DTXA_LBNFCN_XX_DTXA_LBN 0 etherfabric.c 　
1584
 FCN_XX_DTXA_WIDTHFCN_XX_DTXA_WIDTH 4 etherfabric.c 　
1585
 FCN_RX_FILTER_TBL0FCN_RX_FILTER_TBL0 0xF00000 etherfabric.c 　
1586
 FCN_RX_DESC_PTR_TBL_KER_A1FCN_RX_DESC_PTR_TBL_KER_A1 0x11800 etherfabric.c 　
1587
 FCN_RX_DESC_PTR_TBL_KER_B0FCN_RX_DESC_PTR_TBL_KER_B0 0xF40000 etherfabric.c 　
1588
 FCN_RX_ISCSI_DDIG_EN_LBNFCN_RX_ISCSI_DDIG_EN_LBN 88 etherfabric.c 　
1589
 FCN_RX_ISCSI_DDIG_EN_WIDTHFCN_RX_ISCSI_DDIG_EN_WIDTH 1 etherfabric.c 　
1590
 FCN_RX_ISCSI_HDIG_EN_LBNFCN_RX_ISCSI_HDIG_EN_LBN 87 etherfabric.c 　
1591
 FCN_RX_ISCSI_HDIG_EN_WIDTHFCN_RX_ISCSI_HDIG_EN_WIDTH 1 etherfabric.c 　
1592
 FCN_RX_DESCQ_BUF_BASE_ID_LBNFCN_RX_DESCQ_BUF_BASE_ID_LBN 36 etherfabric.c 　
1593
 FCN_RX_DESCQ_BUF_BASE_ID_WIDTHFCN_RX_DESCQ_BUF_BASE_ID_WIDTH 20 etherfabric.c 　
1594
 FCN_RX_DESCQ_EVQ_ID_LBNFCN_RX_DESCQ_EVQ_ID_LBN 24 etherfabric.c 　
1595
 FCN_RX_DESCQ_EVQ_ID_WIDTHFCN_RX_DESCQ_EVQ_ID_WIDTH 12 etherfabric.c 　
1596
 FCN_RX_DESCQ_OWNER_ID_LBNFCN_RX_DESCQ_OWNER_ID_LBN 10 etherfabric.c 　
1597
 FCN_RX_DESCQ_OWNER_ID_WIDTHFCN_RX_DESCQ_OWNER_ID_WIDTH 14 etherfabric.c 　
1598
 FCN_RX_DESCQ_SIZE_LBNFCN_RX_DESCQ_SIZE_LBN 3 etherfabric.c 　
1599
 FCN_RX_DESCQ_SIZE_WIDTHFCN_RX_DESCQ_SIZE_WIDTH 2 etherfabric.c 　
1600
 FCN_RX_DESCQ_SIZE_4KFCN_RX_DESCQ_SIZE_4K 3 etherfabric.c 　
1601
 FCN_RX_DESCQ_SIZE_2KFCN_RX_DESCQ_SIZE_2K 2 etherfabric.c 　
1602
 FCN_RX_DESCQ_SIZE_1KFCN_RX_DESCQ_SIZE_1K 1 etherfabric.c 　
1603
 FCN_RX_DESCQ_SIZE_512FCN_RX_DESCQ_SIZE_512 0 etherfabric.c 　
1604
 FCN_RX_DESCQ_TYPE_LBNFCN_RX_DESCQ_TYPE_LBN 2 etherfabric.c 　
1605
 FCN_RX_DESCQ_TYPE_WIDTHFCN_RX_DESCQ_TYPE_WIDTH 1 etherfabric.c 　
1606
 FCN_RX_DESCQ_JUMBO_LBNFCN_RX_DESCQ_JUMBO_LBN 1 etherfabric.c 　
1607
 FCN_RX_DESCQ_JUMBO_WIDTHFCN_RX_DESCQ_JUMBO_WIDTH 1 etherfabric.c 　
1608
 FCN_RX_DESCQ_EN_LBNFCN_RX_DESCQ_EN_LBN 0 etherfabric.c 　
1609
 FCN_RX_DESCQ_EN_WIDTHFCN_RX_DESCQ_EN_WIDTH 1 etherfabric.c 　
1610
 FCN_TX_DESC_PTR_TBL_KER_A1FCN_TX_DESC_PTR_TBL_KER_A1 0x11900 etherfabric.c 　
1611
 FCN_TX_DESC_PTR_TBL_KER_B0FCN_TX_DESC_PTR_TBL_KER_B0 0xF50000 etherfabric.c 　
1612
 FCN_TX_NON_IP_DROP_DIS_B0_LBNFCN_TX_NON_IP_DROP_DIS_B0_LBN 91 etherfabric.c 　
1613
 FCN_TX_NON_IP_DROP_DIS_B0_WIDTHFCN_TX_NON_IP_DROP_DIS_B0_WIDTH 1 etherfabric.c 　
1614
 FCN_TX_DESCQ_EN_LBNFCN_TX_DESCQ_EN_LBN 88 etherfabric.c 　
1615
 FCN_TX_DESCQ_EN_WIDTHFCN_TX_DESCQ_EN_WIDTH 1 etherfabric.c 　
1616
 FCN_TX_ISCSI_DDIG_EN_LBNFCN_TX_ISCSI_DDIG_EN_LBN 87 etherfabric.c 　
1617
 FCN_TX_ISCSI_DDIG_EN_WIDTHFCN_TX_ISCSI_DDIG_EN_WIDTH 1 etherfabric.c 　
1618
 FCN_TX_ISCSI_HDIG_EN_LBNFCN_TX_ISCSI_HDIG_EN_LBN 86 etherfabric.c 　
1619
 FCN_TX_ISCSI_HDIG_EN_WIDTHFCN_TX_ISCSI_HDIG_EN_WIDTH 1 etherfabric.c 　
1620
 FCN_TX_DESCQ_BUF_BASE_ID_LBNFCN_TX_DESCQ_BUF_BASE_ID_LBN 36 etherfabric.c 　
1621
 FCN_TX_DESCQ_BUF_BASE_ID_WIDTHFCN_TX_DESCQ_BUF_BASE_ID_WIDTH 20 etherfabric.c 　
1622
 FCN_TX_DESCQ_EVQ_ID_LBNFCN_TX_DESCQ_EVQ_ID_LBN 24 etherfabric.c 　
1623
 FCN_TX_DESCQ_EVQ_ID_WIDTHFCN_TX_DESCQ_EVQ_ID_WIDTH 12 etherfabric.c 　
1624
 FCN_TX_DESCQ_OWNER_ID_LBNFCN_TX_DESCQ_OWNER_ID_LBN 10 etherfabric.c 　
1625
 FCN_TX_DESCQ_OWNER_ID_WIDTHFCN_TX_DESCQ_OWNER_ID_WIDTH 14 etherfabric.c 　
1626
 FCN_TX_DESCQ_SIZE_LBNFCN_TX_DESCQ_SIZE_LBN 3 etherfabric.c 　
1627
 FCN_TX_DESCQ_SIZE_WIDTHFCN_TX_DESCQ_SIZE_WIDTH 2 etherfabric.c 　
1628
 FCN_TX_DESCQ_SIZE_4KFCN_TX_DESCQ_SIZE_4K 3 etherfabric.c 　
1629
 FCN_TX_DESCQ_SIZE_2KFCN_TX_DESCQ_SIZE_2K 2 etherfabric.c 　
1630
 FCN_TX_DESCQ_SIZE_1KFCN_TX_DESCQ_SIZE_1K 1 etherfabric.c 　
1631
 FCN_TX_DESCQ_SIZE_512FCN_TX_DESCQ_SIZE_512 0 etherfabric.c 　
1632
 FCN_TX_DESCQ_TYPE_LBNFCN_TX_DESCQ_TYPE_LBN 1 etherfabric.c 　
1633
 FCN_TX_DESCQ_TYPE_WIDTHFCN_TX_DESCQ_TYPE_WIDTH 2 etherfabric.c 　
1634
 FCN_TX_DESCQ_FLUSH_LBNFCN_TX_DESCQ_FLUSH_LBN 0 etherfabric.c 　
1635
 FCN_TX_DESCQ_FLUSH_WIDTHFCN_TX_DESCQ_FLUSH_WIDTH 1 etherfabric.c 　
1636
 FCN_EVQ_PTR_TBL_KER_A1FCN_EVQ_PTR_TBL_KER_A1 0x11a00 etherfabric.c 　
1637
 FCN_EVQ_PTR_TBL_KER_B0FCN_EVQ_PTR_TBL_KER_B0 0xf60000 etherfabric.c 　
1638
 FCN_EVQ_EN_LBNFCN_EVQ_EN_LBN 23 etherfabric.c 　
1639
 FCN_EVQ_EN_WIDTHFCN_EVQ_EN_WIDTH 1 etherfabric.c 　
1640
 FCN_EVQ_SIZE_LBNFCN_EVQ_SIZE_LBN 20 etherfabric.c 　
1641
 FCN_EVQ_SIZE_WIDTHFCN_EVQ_SIZE_WIDTH 3 etherfabric.c 　
1642
 FCN_EVQ_SIZE_32KFCN_EVQ_SIZE_32K 6 etherfabric.c 　
1643
 FCN_EVQ_SIZE_16KFCN_EVQ_SIZE_16K 5 etherfabric.c 　
1644
 FCN_EVQ_SIZE_8KFCN_EVQ_SIZE_8K 4 etherfabric.c 　
1645
 FCN_EVQ_SIZE_4KFCN_EVQ_SIZE_4K 3 etherfabric.c 　
1646
 FCN_EVQ_SIZE_2KFCN_EVQ_SIZE_2K 2 etherfabric.c 　
1647
 FCN_EVQ_SIZE_1KFCN_EVQ_SIZE_1K 1 etherfabric.c 　
1648
 FCN_EVQ_SIZE_512FCN_EVQ_SIZE_512 0 etherfabric.c 　
1649
 FCN_EVQ_BUF_BASE_ID_LBNFCN_EVQ_BUF_BASE_ID_LBN 0 etherfabric.c 　
1650
 FCN_EVQ_BUF_BASE_ID_WIDTHFCN_EVQ_BUF_BASE_ID_WIDTH 20 etherfabric.c 　
1651
 FCN_RX_RSS_INDIR_TBL_B0FCN_RX_RSS_INDIR_TBL_B0 0xFB0000 etherfabric.c 　
1652
 FCN_EVQ_RPTR_REG_KER_A1FCN_EVQ_RPTR_REG_KER_A1 0x11b00 etherfabric.c 　
1653
 FCN_EVQ_RPTR_REG_KER_B0FCN_EVQ_RPTR_REG_KER_B0 0xfa0000 etherfabric.c 　
1654
 FCN_EVQ_RPTR_LBNFCN_EVQ_RPTR_LBN 0 etherfabric.c 　
1655
 FCN_EVQ_RPTR_WIDTHFCN_EVQ_RPTR_WIDTH 14 etherfabric.c 　
1656
 FCN_EVQ_RPTR_REG_KER_DWORD_A1FCN_EVQ_RPTR_REG_KER_DWORD_A1 ( FCN_EVQ_RPTR_REG_KER_A1 + 0 ) etherfabric.c 　
1657
 FCN_EVQ_RPTR_REG_KER_DWORD_B0FCN_EVQ_RPTR_REG_KER_DWORD_B0 ( FCN_EVQ_RPTR_REG_KER_B0 + 0 ) etherfabric.c 　
1658
 FCN_EVQ_RPTR_DWORD_LBNFCN_EVQ_RPTR_DWORD_LBN 0 etherfabric.c 　
1659
 FCN_EVQ_RPTR_DWORD_WIDTHFCN_EVQ_RPTR_DWORD_WIDTH 14 etherfabric.c 　
1660
 FCN_BUF_FULL_TBL_KER_A1FCN_BUF_FULL_TBL_KER_A1 0x18000 etherfabric.c 　
1661
 FCN_BUF_FULL_TBL_KER_B0FCN_BUF_FULL_TBL_KER_B0 0x800000 etherfabric.c 　
1662
 FCN_IP_DAT_BUF_SIZE_LBNFCN_IP_DAT_BUF_SIZE_LBN 50 etherfabric.c 　
1663
 FCN_IP_DAT_BUF_SIZE_WIDTHFCN_IP_DAT_BUF_SIZE_WIDTH 1 etherfabric.c 　
1664
 FCN_IP_DAT_BUF_SIZE_8KFCN_IP_DAT_BUF_SIZE_8K 1 etherfabric.c 　
1665
 FCN_IP_DAT_BUF_SIZE_4KFCN_IP_DAT_BUF_SIZE_4K 0 etherfabric.c 　
1666
 FCN_BUF_ADR_FBUF_LBNFCN_BUF_ADR_FBUF_LBN 14 etherfabric.c 　
1667
 FCN_BUF_ADR_FBUF_WIDTHFCN_BUF_ADR_FBUF_WIDTH 34 etherfabric.c 　
1668
 FCN_BUF_OWNER_ID_FBUF_LBNFCN_BUF_OWNER_ID_FBUF_LBN 0 etherfabric.c 　
1669
 FCN_BUF_OWNER_ID_FBUF_WIDTHFCN_BUF_OWNER_ID_FBUF_WIDTH 14 etherfabric.c 　
1670
 FCN_MAC_DATA_LBNFCN_MAC_DATA_LBN 0 etherfabric.c 　
1671
 FCN_MAC_DATA_WIDTHFCN_MAC_DATA_WIDTH 32 etherfabric.c 　
1672
 FCN_TX_KER_PORT_LBNFCN_TX_KER_PORT_LBN 63 etherfabric.c 　
1673
 FCN_TX_KER_PORT_WIDTHFCN_TX_KER_PORT_WIDTH 1 etherfabric.c 　
1674
 FCN_TX_KER_BYTE_CNT_LBNFCN_TX_KER_BYTE_CNT_LBN 48 etherfabric.c 　
1675
 FCN_TX_KER_BYTE_CNT_WIDTHFCN_TX_KER_BYTE_CNT_WIDTH 14 etherfabric.c 　
1676
 FCN_TX_KER_BUF_ADR_LBNFCN_TX_KER_BUF_ADR_LBN 0 etherfabric.c 　
1677
 FCN_TX_KER_BUF_ADR_WIDTHFCN_TX_KER_BUF_ADR_WIDTH EFAB_DMA_TYPE_WIDTH ( 46 ) etherfabric.c 　
1678
 FCN_RX_KER_BUF_SIZE_LBNFCN_RX_KER_BUF_SIZE_LBN 48 etherfabric.c 　
1679
 FCN_RX_KER_BUF_SIZE_WIDTHFCN_RX_KER_BUF_SIZE_WIDTH 14 etherfabric.c 　
1680
 FCN_RX_KER_BUF_ADR_LBNFCN_RX_KER_BUF_ADR_LBN 0 etherfabric.c 　
1681
 FCN_RX_KER_BUF_ADR_WIDTHFCN_RX_KER_BUF_ADR_WIDTH EFAB_DMA_TYPE_WIDTH ( 46 ) etherfabric.c 　
1682
 FCN_EV_CODE_LBNFCN_EV_CODE_LBN 60 etherfabric.c 　
1683
 FCN_EV_CODE_WIDTHFCN_EV_CODE_WIDTH 4 etherfabric.c 　
1684
 FCN_RX_IP_EV_DECODEFCN_RX_IP_EV_DECODE 0 etherfabric.c 　
1685
 FCN_TX_IP_EV_DECODEFCN_TX_IP_EV_DECODE 2 etherfabric.c 　
1686
 FCN_DRIVER_EV_DECODEFCN_DRIVER_EV_DECODE 5 etherfabric.c 　
1687
 FCN_RX_EV_PKT_OK_LBNFCN_RX_EV_PKT_OK_LBN 56 etherfabric.c 　
1688
 FCN_RX_EV_PKT_OK_WIDTHFCN_RX_EV_PKT_OK_WIDTH 1 etherfabric.c 　
1689
 FCN_RX_PORT_LBNFCN_RX_PORT_LBN 30 etherfabric.c 　
1690
 FCN_RX_PORT_WIDTHFCN_RX_PORT_WIDTH 1 etherfabric.c 　
1691
 FCN_RX_EV_BYTE_CNT_LBNFCN_RX_EV_BYTE_CNT_LBN 16 etherfabric.c 　
1692
 FCN_RX_EV_BYTE_CNT_WIDTHFCN_RX_EV_BYTE_CNT_WIDTH 14 etherfabric.c 　
1693
 FCN_RX_EV_DESC_PTR_LBNFCN_RX_EV_DESC_PTR_LBN 0 etherfabric.c 　
1694
 FCN_RX_EV_DESC_PTR_WIDTHFCN_RX_EV_DESC_PTR_WIDTH 12 etherfabric.c 　
1695
 FCN_TX_EV_DESC_PTR_LBNFCN_TX_EV_DESC_PTR_LBN 0 etherfabric.c 　
1696
 FCN_TX_EV_DESC_PTR_WIDTHFCN_TX_EV_DESC_PTR_WIDTH 12 etherfabric.c 　
1697
 FALCON_SPI_MAX_LENFALCON_SPI_MAX_LEN 16 etherfabric.c 　
1698
 GM_CFG1_REG_MACGM_CFG1_REG_MAC 0x00 etherfabric.c 　
1699
 GM_SW_RST_LBNGM_SW_RST_LBN 31 etherfabric.c 　
1700
 GM_SW_RST_WIDTHGM_SW_RST_WIDTH 1 etherfabric.c 　
1701
 GM_RX_FC_EN_LBNGM_RX_FC_EN_LBN 5 etherfabric.c 　
1702
 GM_RX_FC_EN_WIDTHGM_RX_FC_EN_WIDTH 1 etherfabric.c 　
1703
 GM_TX_FC_EN_LBNGM_TX_FC_EN_LBN 4 etherfabric.c 　
1704
 GM_TX_FC_EN_WIDTHGM_TX_FC_EN_WIDTH 1 etherfabric.c 　
1705
 GM_RX_EN_LBNGM_RX_EN_LBN 2 etherfabric.c 　
1706
 GM_RX_EN_WIDTHGM_RX_EN_WIDTH 1 etherfabric.c 　
1707
 GM_TX_EN_LBNGM_TX_EN_LBN 0 etherfabric.c 　
1708
 GM_TX_EN_WIDTHGM_TX_EN_WIDTH 1 etherfabric.c 　
1709
 GM_CFG2_REG_MACGM_CFG2_REG_MAC 0x01 etherfabric.c 　
1710
 GM_PAMBL_LEN_LBNGM_PAMBL_LEN_LBN 12 etherfabric.c 　
1711
 GM_PAMBL_LEN_WIDTHGM_PAMBL_LEN_WIDTH 4 etherfabric.c 　
1712
 GM_IF_MODE_LBNGM_IF_MODE_LBN 8 etherfabric.c 　
1713
 GM_IF_MODE_WIDTHGM_IF_MODE_WIDTH 2 etherfabric.c 　
1714
 GM_PAD_CRC_EN_LBNGM_PAD_CRC_EN_LBN 2 etherfabric.c 　
1715
 GM_PAD_CRC_EN_WIDTHGM_PAD_CRC_EN_WIDTH 1 etherfabric.c 　
1716
 GM_FD_LBNGM_FD_LBN 0 etherfabric.c 　
1717
 GM_FD_WIDTHGM_FD_WIDTH 1 etherfabric.c 　
1718
 GM_MAX_FLEN_REG_MACGM_MAX_FLEN_REG_MAC 0x04 etherfabric.c 　
1719
 GM_MAX_FLEN_LBNGM_MAX_FLEN_LBN 0 etherfabric.c 　
1720
 GM_MAX_FLEN_WIDTHGM_MAX_FLEN_WIDTH 16 etherfabric.c 　
1721
 GM_MII_MGMT_CFG_REG_MACGM_MII_MGMT_CFG_REG_MAC 0x08 etherfabric.c 　
1722
 GM_MGMT_CLK_SEL_LBNGM_MGMT_CLK_SEL_LBN 0 etherfabric.c 　
1723
 GM_MGMT_CLK_SEL_WIDTHGM_MGMT_CLK_SEL_WIDTH 3 etherfabric.c 　
1724
 GM_MII_MGMT_CMD_REG_MACGM_MII_MGMT_CMD_REG_MAC 0x09 etherfabric.c 　
1725
 GM_MGMT_SCAN_CYC_LBNGM_MGMT_SCAN_CYC_LBN 1 etherfabric.c 　
1726
 GM_MGMT_SCAN_CYC_WIDTHGM_MGMT_SCAN_CYC_WIDTH 1 etherfabric.c 　
1727
 GM_MGMT_RD_CYC_LBNGM_MGMT_RD_CYC_LBN 0 etherfabric.c 　
1728
 GM_MGMT_RD_CYC_WIDTHGM_MGMT_RD_CYC_WIDTH 1 etherfabric.c 　
1729
 GM_MII_MGMT_ADR_REG_MACGM_MII_MGMT_ADR_REG_MAC 0x0a etherfabric.c 　
1730
 GM_MGMT_PHY_ADDR_LBNGM_MGMT_PHY_ADDR_LBN 8 etherfabric.c 　
1731
 GM_MGMT_PHY_ADDR_WIDTHGM_MGMT_PHY_ADDR_WIDTH 5 etherfabric.c 　
1732
 GM_MGMT_REG_ADDR_LBNGM_MGMT_REG_ADDR_LBN 0 etherfabric.c 　
1733
 GM_MGMT_REG_ADDR_WIDTHGM_MGMT_REG_ADDR_WIDTH 5 etherfabric.c 　
1734
 GM_MII_MGMT_CTL_REG_MACGM_MII_MGMT_CTL_REG_MAC 0x0b etherfabric.c 　
1735
 GM_MGMT_CTL_LBNGM_MGMT_CTL_LBN 0 etherfabric.c 　
1736
 GM_MGMT_CTL_WIDTHGM_MGMT_CTL_WIDTH 16 etherfabric.c 　
1737
 GM_MII_MGMT_STAT_REG_MACGM_MII_MGMT_STAT_REG_MAC 0x0c etherfabric.c 　
1738
 GM_MGMT_STAT_LBNGM_MGMT_STAT_LBN 0 etherfabric.c 　
1739
 GM_MGMT_STAT_WIDTHGM_MGMT_STAT_WIDTH 16 etherfabric.c 　
1740
 GM_MII_MGMT_IND_REG_MACGM_MII_MGMT_IND_REG_MAC 0x0d etherfabric.c 　
1741
 GM_MGMT_BUSY_LBNGM_MGMT_BUSY_LBN 0 etherfabric.c 　
1742
 GM_MGMT_BUSY_WIDTHGM_MGMT_BUSY_WIDTH 1 etherfabric.c 　
1743
 GM_ADR1_REG_MACGM_ADR1_REG_MAC 0x10 etherfabric.c 　
1744
 GM_HWADDR_5_LBNGM_HWADDR_5_LBN 24 etherfabric.c 　
1745
 GM_HWADDR_5_WIDTHGM_HWADDR_5_WIDTH 8 etherfabric.c 　
1746
 GM_HWADDR_4_LBNGM_HWADDR_4_LBN 16 etherfabric.c 　
1747
 GM_HWADDR_4_WIDTHGM_HWADDR_4_WIDTH 8 etherfabric.c 　
1748
 GM_HWADDR_3_LBNGM_HWADDR_3_LBN 8 etherfabric.c 　
1749
 GM_HWADDR_3_WIDTHGM_HWADDR_3_WIDTH 8 etherfabric.c 　
1750
 GM_HWADDR_2_LBNGM_HWADDR_2_LBN 0 etherfabric.c 　
1751
 GM_HWADDR_2_WIDTHGM_HWADDR_2_WIDTH 8 etherfabric.c 　
1752
 GM_ADR2_REG_MACGM_ADR2_REG_MAC 0x11 etherfabric.c 　
1753
 GM_HWADDR_1_LBNGM_HWADDR_1_LBN 24 etherfabric.c 　
1754
 GM_HWADDR_1_WIDTHGM_HWADDR_1_WIDTH 8 etherfabric.c 　
1755
 GM_HWADDR_0_LBNGM_HWADDR_0_LBN 16 etherfabric.c 　
1756
 GM_HWADDR_0_WIDTHGM_HWADDR_0_WIDTH 8 etherfabric.c 　
1757
 GMF_CFG0_REG_MACGMF_CFG0_REG_MAC 0x12 etherfabric.c 　
1758
 GMF_FTFENREQ_LBNGMF_FTFENREQ_LBN 12 etherfabric.c 　
1759
 GMF_FTFENREQ_WIDTHGMF_FTFENREQ_WIDTH 1 etherfabric.c 　
1760
 GMF_STFENREQ_LBNGMF_STFENREQ_LBN 11 etherfabric.c 　
1761
 GMF_STFENREQ_WIDTHGMF_STFENREQ_WIDTH 1 etherfabric.c 　
1762
 GMF_FRFENREQ_LBNGMF_FRFENREQ_LBN 10 etherfabric.c 　
1763
 GMF_FRFENREQ_WIDTHGMF_FRFENREQ_WIDTH 1 etherfabric.c 　
1764
 GMF_SRFENREQ_LBNGMF_SRFENREQ_LBN 9 etherfabric.c 　
1765
 GMF_SRFENREQ_WIDTHGMF_SRFENREQ_WIDTH 1 etherfabric.c 　
1766
 GMF_WTMENREQ_LBNGMF_WTMENREQ_LBN 8 etherfabric.c 　
1767
 GMF_WTMENREQ_WIDTHGMF_WTMENREQ_WIDTH 1 etherfabric.c 　
1768
 GMF_CFG1_REG_MACGMF_CFG1_REG_MAC 0x13 etherfabric.c 　
1769
 GMF_CFGFRTH_LBNGMF_CFGFRTH_LBN 16 etherfabric.c 　
1770
 GMF_CFGFRTH_WIDTHGMF_CFGFRTH_WIDTH 5 etherfabric.c 　
1771
 GMF_CFGXOFFRTX_LBNGMF_CFGXOFFRTX_LBN 0 etherfabric.c 　
1772
 GMF_CFGXOFFRTX_WIDTHGMF_CFGXOFFRTX_WIDTH 16 etherfabric.c 　
1773
 GMF_CFG2_REG_MACGMF_CFG2_REG_MAC 0x14 etherfabric.c 　
1774
 GMF_CFGHWM_LBNGMF_CFGHWM_LBN 16 etherfabric.c 　
1775
 GMF_CFGHWM_WIDTHGMF_CFGHWM_WIDTH 6 etherfabric.c 　
1776
 GMF_CFGLWM_LBNGMF_CFGLWM_LBN 0 etherfabric.c 　
1777
 GMF_CFGLWM_WIDTHGMF_CFGLWM_WIDTH 6 etherfabric.c 　
1778
 GMF_CFG3_REG_MACGMF_CFG3_REG_MAC 0x15 etherfabric.c 　
1779
 GMF_CFGHWMFT_LBNGMF_CFGHWMFT_LBN 16 etherfabric.c 　
1780
 GMF_CFGHWMFT_WIDTHGMF_CFGHWMFT_WIDTH 6 etherfabric.c 　
1781
 GMF_CFGFTTH_LBNGMF_CFGFTTH_LBN 0 etherfabric.c 　
1782
 GMF_CFGFTTH_WIDTHGMF_CFGFTTH_WIDTH 6 etherfabric.c 　
1783
 GMF_CFG4_REG_MACGMF_CFG4_REG_MAC 0x16 etherfabric.c 　
1784
 GMF_HSTFLTRFRM_PAUSE_LBNGMF_HSTFLTRFRM_PAUSE_LBN 12 etherfabric.c 　
1785
 GMF_HSTFLTRFRM_PAUSE_WIDTHGMF_HSTFLTRFRM_PAUSE_WIDTH 12 etherfabric.c 　
1786
 GMF_CFG5_REG_MACGMF_CFG5_REG_MAC 0x17 etherfabric.c 　
1787
 GMF_CFGHDPLX_LBNGMF_CFGHDPLX_LBN 22 etherfabric.c 　
1788
 GMF_CFGHDPLX_WIDTHGMF_CFGHDPLX_WIDTH 1 etherfabric.c 　
1789
 GMF_CFGBYTMODE_LBNGMF_CFGBYTMODE_LBN 19 etherfabric.c 　
1790
 GMF_CFGBYTMODE_WIDTHGMF_CFGBYTMODE_WIDTH 1 etherfabric.c 　
1791
 GMF_HSTDRPLT64_LBNGMF_HSTDRPLT64_LBN 18 etherfabric.c 　
1792
 GMF_HSTDRPLT64_WIDTHGMF_HSTDRPLT64_WIDTH 1 etherfabric.c 　
1793
 GMF_HSTFLTRFRMDC_PAUSE_LBNGMF_HSTFLTRFRMDC_PAUSE_LBN 12 etherfabric.c 　
1794
 GMF_HSTFLTRFRMDC_PAUSE_WIDTHGMF_HSTFLTRFRMDC_PAUSE_WIDTH 1 etherfabric.c 　
1795
 XFP_REQUIRED_DEVSXFP_REQUIRED_DEVS ( MDIO_MMDREG_DEVS0_PCS | \ MDIO_MMDREG_DEVS0_PMAPMD | \ MDIO_MMDREG_DEVS0_PHYXS ) etherfabric.c 　
1796
 TXC_GLRGS_GLCMDTXC_GLRGS_GLCMD (0xc004) etherfabric.c 　
1797
 TXC_GLCMD_LMTSWRST_LBNTXC_GLCMD_LMTSWRST_LBN (14) etherfabric.c 　
1798
 TXC_ALRGS_ATXAMP0TXC_ALRGS_ATXAMP0 (0xc041) etherfabric.c 　
1799
 TXC_ALRGS_ATXAMP1TXC_ALRGS_ATXAMP1 (0xc042) etherfabric.c 　
1800
 TXC_ATXAMP_LANE02_LBNTXC_ATXAMP_LANE02_LBN (3) etherfabric.c 　
1801
 TXC_ATXAMP_LANE13_LBNTXC_ATXAMP_LANE13_LBN (11) etherfabric.c 　
1802
 TXC_ATXAMP_1280_mVTXC_ATXAMP_1280_mV (0) etherfabric.c 　
1803
 TXC_ATXAMP_1200_mVTXC_ATXAMP_1200_mV (8) etherfabric.c 　
1804
 TXC_ATXAMP_1120_mVTXC_ATXAMP_1120_mV (12) etherfabric.c 　
1805
 TXC_ATXAMP_1060_mVTXC_ATXAMP_1060_mV (14) etherfabric.c 　
1806
 TXC_ATXAMP_0820_mVTXC_ATXAMP_0820_mV (25) etherfabric.c 　
1807
 TXC_ATXAMP_0720_mVTXC_ATXAMP_0720_mV (26) etherfabric.c 　
1808
 TXC_ATXAMP_0580_mVTXC_ATXAMP_0580_mV (27) etherfabric.c 　
1809
 TXC_ATXAMP_0440_mVTXC_ATXAMP_0440_mV (28) etherfabric.c 　
1810
 TXC_ATXAMP_0820_BOTHTXC_ATXAMP_0820_BOTH ( (TXC_ATXAMP_0820_mV << TXC_ATXAMP_LANE02_LBN) | \ (TXC_ATXAMP_0820_mV << TXC_ATXAMP_LANE13_LBN) ) etherfabric.c 　
1811
 TXC_ATXAMP_DEFAULTTXC_ATXAMP_DEFAULT (0x6060) etherfabric.c From databook
1812
 TXC_ALRGS_ATXPRE0TXC_ALRGS_ATXPRE0 (0xc043) etherfabric.c 　
1813
 TXC_ALRGS_ATXPRE1TXC_ALRGS_ATXPRE1 (0xc044) etherfabric.c 　
1814
 TXC_ATXPRE_NONETXC_ATXPRE_NONE (0) etherfabric.c 　
1815
 TXC_ATXPRE_DEFAULTTXC_ATXPRE_DEFAULT (0x1010) etherfabric.c From databook
1816
 TXC_REQUIRED_DEVSTXC_REQUIRED_DEVS ( MDIO_MMDREG_DEVS0_PCS | \ MDIO_MMDREG_DEVS0_PMAPMD | \ MDIO_MMDREG_DEVS0_PHYXS ) etherfabric.c 　
1817
 TENXPRESS_REQUIRED_DEVSTENXPRESS_REQUIRED_DEVS ( MDIO_MMDREG_DEVS0_PMAPMD | \ MDIO_MMDREG_DEVS0_PCS | \ MDIO_MMDREG_DEVS0_PHYXS ) etherfabric.c 　
1818
 PCS_TEST_SELECT_REGPCS_TEST_SELECT_REG 0xd807 etherfabric.c PRM 10.5.8
1819
 CLK312_EN_LBNCLK312_EN_LBN 3 etherfabric.c 　
1820
 CLK312_EN_WIDTHCLK312_EN_WIDTH 1 etherfabric.c 　
1821
 PCS_CLOCK_CTRL_REGPCS_CLOCK_CTRL_REG 0xd801 etherfabric.c 　
1822
 PLL312_RST_N_LBNPLL312_RST_N_LBN 2 etherfabric.c 　
1823
 PMA_PMD_EXT_CTRL_REGPMA_PMD_EXT_CTRL_REG 49152 etherfabric.c 　
1824
 PMA_PMD_EXT_SSR_LBNPMA_PMD_EXT_SSR_LBN 15 etherfabric.c 　
1825
 PCS_BOOT_STATUS_REGPCS_BOOT_STATUS_REG 0xd000 etherfabric.c 　
1826
 PCS_BOOT_FATAL_ERR_LBNPCS_BOOT_FATAL_ERR_LBN 0 etherfabric.c 　
1827
 PCS_BOOT_PROGRESS_LBNPCS_BOOT_PROGRESS_LBN 1 etherfabric.c 　
1828
 PCS_BOOT_PROGRESS_WIDTHPCS_BOOT_PROGRESS_WIDTH 2 etherfabric.c 　
1829
 PCS_BOOT_COMPLETE_LBNPCS_BOOT_COMPLETE_LBN 3 etherfabric.c 　
1830
 PCS_SOFT_RST2_REGPCS_SOFT_RST2_REG 0xd806 etherfabric.c 　
1831
 SERDES_RST_N_LBNSERDES_RST_N_LBN 13 etherfabric.c 　
1832
 XGXS_RST_N_LBNXGXS_RST_N_LBN 12 etherfabric.c 　
1833
 PM8358_REQUIRED_DEVSPM8358_REQUIRED_DEVS (MDIO_MMDREG_DEVS0_DTEXS) etherfabric.c 　
1834
 PMC_MASTER_REGPMC_MASTER_REG (0xd000) etherfabric.c 　
1835
 PMC_MASTER_ANLG_CTRLPMC_MASTER_ANLG_CTRL (1<< 11) etherfabric.c 　
1836
 PMC_MCONF2_REGPMC_MCONF2_REG (0xd002) etherfabric.c 　
1837
 PMC_MCONF2_TEDGEPMC_MCONF2_TEDGE (1 << 2) etherfabric.c 　
1838
 PMC_MCONF2_REDGEPMC_MCONF2_REDGE (1 << 3) etherfabric.c 　
1839
 PMC_ANALOG_RX_CFG0PMC_ANALOG_RX_CFG0 (0xd025) etherfabric.c 　
1840
 PMC_ANALOG_RX_CFG1PMC_ANALOG_RX_CFG1 (0xd02d) etherfabric.c 　
1841
 PMC_ANALOG_RX_CFG2PMC_ANALOG_RX_CFG2 (0xd035) etherfabric.c 　
1842
 PMC_ANALOG_RX_CFG3PMC_ANALOG_RX_CFG3 (0xd03d) etherfabric.c 　
1843
 PMC_ANALOG_RX_TERMPMC_ANALOG_RX_TERM (1 << 15) etherfabric.c Bit 15 of RX CFG: 0 for 100 ohms float,
1844
 PMC_ANALOG_RX_EQ_MASKPMC_ANALOG_RX_EQ_MASK (3 << 8) etherfabric.c 　
1845
 PMC_ANALOG_RX_EQ_NONEPMC_ANALOG_RX_EQ_NONE (0 << 8) etherfabric.c 　
1846
 PMC_ANALOG_RX_EQ_HALFPMC_ANALOG_RX_EQ_HALF (1 << 8) etherfabric.c 　
1847
 PMC_ANALOG_RX_EQ_FULLPMC_ANALOG_RX_EQ_FULL (2 << 8) etherfabric.c 　
1848
 PMC_ANALOG_RX_EQ_RSVDPMC_ANALOG_RX_EQ_RSVD (3 << 8) etherfabric.c 　
1849
 MAX_TEMP_THRESHMAX_TEMP_THRESH 90 etherfabric.c 　
1850
 PCA9539PCA9539 0x74 etherfabric.c 　
1851
 P0_INP0_IN 0x00 etherfabric.c 　
1852
 P0_OUTP0_OUT 0x02 etherfabric.c 　
1853
 P0_CONFIGP0_CONFIG 0x06 etherfabric.c 　
1854
 P0_EN_1V0X_LBNP0_EN_1V0X_LBN 0 etherfabric.c 　
1855
 P0_EN_1V0X_WIDTHP0_EN_1V0X_WIDTH 1 etherfabric.c 　
1856
 P0_EN_1V2_LBNP0_EN_1V2_LBN 1 etherfabric.c 　
1857
 P0_EN_1V2_WIDTHP0_EN_1V2_WIDTH 1 etherfabric.c 　
1858
 P0_EN_2V5_LBNP0_EN_2V5_LBN 2 etherfabric.c 　
1859
 P0_EN_2V5_WIDTHP0_EN_2V5_WIDTH 1 etherfabric.c 　
1860
 P0_EN_3V3X_LBNP0_EN_3V3X_LBN 3 etherfabric.c 　
1861
 P0_EN_3V3X_WIDTHP0_EN_3V3X_WIDTH 1 etherfabric.c 　
1862
 P0_EN_5V_LBNP0_EN_5V_LBN 4 etherfabric.c 　
1863
 P0_EN_5V_WIDTHP0_EN_5V_WIDTH 1 etherfabric.c 　
1864
 P0_X_TRST_LBNP0_X_TRST_LBN 6 etherfabric.c 　
1865
 P0_X_TRST_WIDTHP0_X_TRST_WIDTH 1 etherfabric.c 　
1866
 P1_INP1_IN 0x01 etherfabric.c 　
1867
 P1_CONFIGP1_CONFIG 0x07 etherfabric.c 　
1868
 P1_AFE_PWD_LBNP1_AFE_PWD_LBN 0 etherfabric.c 　
1869
 P1_AFE_PWD_WIDTHP1_AFE_PWD_WIDTH 1 etherfabric.c 　
1870
 P1_DSP_PWD25_LBNP1_DSP_PWD25_LBN 1 etherfabric.c 　
1871
 P1_DSP_PWD25_WIDTHP1_DSP_PWD25_WIDTH 1 etherfabric.c 　
1872
 P1_SPARE_LBNP1_SPARE_LBN 4 etherfabric.c 　
1873
 P1_SPARE_WIDTHP1_SPARE_WIDTH 4 etherfabric.c 　
1874
 MAX6647MAX6647 0x4e etherfabric.c 　
1875
 RSLRSL 0x02 etherfabric.c 　
1876
 RLHNRLHN 0x05 etherfabric.c 　
1877
 WLHOWLHO 0x0b etherfabric.c 　
1878
 FALCON_MAC_ADDRESS_OFFSETFALCON_MAC_ADDRESS_OFFSET 0x310 etherfabric.c 　
1879
 SF_NV_CONFIG_BASESF_NV_CONFIG_BASE 0x300 etherfabric.c 　
1880
 SF_NV_CONFIG_EXTRASF_NV_CONFIG_EXTRA 0xA0 etherfabric.c 　
1881
 drv_versiondrv_version "v1.2" forcedeth.c 　
1882
 drv_datedrv_date "05-14-2005" forcedeth.c 　
1883
 ETH_DATA_LENETH_DATA_LEN 1500 forcedeth.c 　
1884
 PCI_DEVICE_ID_NVIDIA_NVENET_1PCI_DEVICE_ID_NVIDIA_NVENET_1 0x01c3 forcedeth.c 　
1885
 PCI_DEVICE_ID_NVIDIA_NVENET_2PCI_DEVICE_ID_NVIDIA_NVENET_2 0x0066 forcedeth.c 　
1886
 PCI_DEVICE_ID_NVIDIA_NVENET_4PCI_DEVICE_ID_NVIDIA_NVENET_4 0x0086 forcedeth.c 　
1887
 PCI_DEVICE_ID_NVIDIA_NVENET_5PCI_DEVICE_ID_NVIDIA_NVENET_5 0x008c forcedeth.c 　
1888
 PCI_DEVICE_ID_NVIDIA_NVENET_3PCI_DEVICE_ID_NVIDIA_NVENET_3 0x00d6 forcedeth.c 　
1889
 PCI_DEVICE_ID_NVIDIA_NVENET_7PCI_DEVICE_ID_NVIDIA_NVENET_7 0x00df forcedeth.c 　
1890
 PCI_DEVICE_ID_NVIDIA_NVENET_6PCI_DEVICE_ID_NVIDIA_NVENET_6 0x00e6 forcedeth.c 　
1891
 PCI_DEVICE_ID_NVIDIA_NVENET_8PCI_DEVICE_ID_NVIDIA_NVENET_8 0x0056 forcedeth.c 　
1892
 PCI_DEVICE_ID_NVIDIA_NVENET_9PCI_DEVICE_ID_NVIDIA_NVENET_9 0x0057 forcedeth.c 　
1893
 PCI_DEVICE_ID_NVIDIA_NVENET_10PCI_DEVICE_ID_NVIDIA_NVENET_10 0x0037 forcedeth.c 　
1894
 PCI_DEVICE_ID_NVIDIA_NVENET_11PCI_DEVICE_ID_NVIDIA_NVENET_11 0x0038 forcedeth.c 　
1895
 PCI_DEVICE_ID_NVIDIA_NVENET_15PCI_DEVICE_ID_NVIDIA_NVENET_15 0x0373 forcedeth.c 　
1896
 DEV_NEED_LASTPACKET1DEV_NEED_LASTPACKET1 0x0001 forcedeth.c set LASTPACKET1 in tx flags
1897
 DEV_IRQMASK_1DEV_IRQMASK_1 0x0002 forcedeth.c use NVREG_IRQMASK_WANTED_1 for irq mask
1898
 DEV_IRQMASK_2DEV_IRQMASK_2 0x0004 forcedeth.c use NVREG_IRQMASK_WANTED_2 for irq mask
1899
 DEV_NEED_TIMERIRQDEV_NEED_TIMERIRQ 0x0008 forcedeth.c set the timer irq flag in the irq mask
1900
 DEV_NEED_LINKTIMERDEV_NEED_LINKTIMER 0x0010 forcedeth.c poll link settings. Relies on the timer irq
1901
 FLAG_MASK_V1FLAG_MASK_V1 0xffff0000 forcedeth.c 　
1902
 FLAG_MASK_V2FLAG_MASK_V2 0xffffc000 forcedeth.c 　
1903
 LEN_MASK_V1LEN_MASK_V1 (0xffffffff ^ FLAG_MASK_V1) forcedeth.c 　
1904
 LEN_MASK_V2LEN_MASK_V2 (0xffffffff ^ FLAG_MASK_V2) forcedeth.c 　
1905
 NV_TX_LASTPACKETNV_TX_LASTPACKET (1<<16) forcedeth.c 　
1906
 NV_TX_RETRYERRORNV_TX_RETRYERROR (1<<19) forcedeth.c 　
1907
 NV_TX_LASTPACKET1NV_TX_LASTPACKET1 (1<<24) forcedeth.c 　
1908
 NV_TX_DEFERREDNV_TX_DEFERRED (1<<26) forcedeth.c 　
1909
 NV_TX_CARRIERLOSTNV_TX_CARRIERLOST (1<<27) forcedeth.c 　
1910
 NV_TX_LATECOLLISIONNV_TX_LATECOLLISION (1<<28) forcedeth.c 　
1911
 NV_TX_UNDERFLOWNV_TX_UNDERFLOW (1<<29) forcedeth.c 　
1912
 NV_TX_ERRORNV_TX_ERROR (1<<30) forcedeth.c 　
1913
 NV_TX_VALIDNV_TX_VALID (1<<31) forcedeth.c 　
1914
 NV_TX2_LASTPACKETNV_TX2_LASTPACKET (1<<29) forcedeth.c 　
1915
 NV_TX2_RETRYERRORNV_TX2_RETRYERROR (1<<18) forcedeth.c 　
1916
 NV_TX2_LASTPACKET1NV_TX2_LASTPACKET1 (1<<23) forcedeth.c 　
1917
 NV_TX2_DEFERREDNV_TX2_DEFERRED (1<<25) forcedeth.c 　
1918
 NV_TX2_CARRIERLOSTNV_TX2_CARRIERLOST (1<<26) forcedeth.c 　
1919
 NV_TX2_LATECOLLISIONNV_TX2_LATECOLLISION (1<<27) forcedeth.c 　
1920
 NV_TX2_UNDERFLOWNV_TX2_UNDERFLOW (1<<28) forcedeth.c 　
1921
 NV_TX2_ERRORNV_TX2_ERROR (1<<30) forcedeth.c 　
1922
 NV_TX2_VALIDNV_TX2_VALID (1<<31) forcedeth.c 　
1923
 NV_RX_DESCRIPTORVALIDNV_RX_DESCRIPTORVALID (1<<16) forcedeth.c 　
1924
 NV_RX_MISSEDFRAMENV_RX_MISSEDFRAME (1<<17) forcedeth.c 　
1925
 NV_RX_SUBSTRACT1NV_RX_SUBSTRACT1 (1<<18) forcedeth.c 　
1926
 NV_RX_ERROR1NV_RX_ERROR1 (1<<23) forcedeth.c 　
1927
 NV_RX_ERROR2NV_RX_ERROR2 (1<<24) forcedeth.c 　
1928
 NV_RX_ERROR3NV_RX_ERROR3 (1<<25) forcedeth.c 　
1929
 NV_RX_ERROR4NV_RX_ERROR4 (1<<26) forcedeth.c 　
1930
 NV_RX_CRCERRNV_RX_CRCERR (1<<27) forcedeth.c 　
1931
 NV_RX_OVERFLOWNV_RX_OVERFLOW (1<<28) forcedeth.c 　
1932
 NV_RX_FRAMINGERRNV_RX_FRAMINGERR (1<<29) forcedeth.c 　
1933
 NV_RX_ERRORNV_RX_ERROR (1<<30) forcedeth.c 　
1934
 NV_RX_AVAILNV_RX_AVAIL (1<<31) forcedeth.c 　
1935
 NV_RX2_CHECKSUMMASKNV_RX2_CHECKSUMMASK (0x1C000000) forcedeth.c 　
1936
 NV_RX2_CHECKSUMOK1NV_RX2_CHECKSUMOK1 (0x10000000) forcedeth.c 　
1937
 NV_RX2_CHECKSUMOK2NV_RX2_CHECKSUMOK2 (0x14000000) forcedeth.c 　
1938
 NV_RX2_CHECKSUMOK3NV_RX2_CHECKSUMOK3 (0x18000000) forcedeth.c 　
1939
 NV_RX2_DESCRIPTORVALIDNV_RX2_DESCRIPTORVALID (1<<29) forcedeth.c 　
1940
 NV_RX2_SUBSTRACT1NV_RX2_SUBSTRACT1 (1<<25) forcedeth.c 　
1941
 NV_RX2_ERROR1NV_RX2_ERROR1 (1<<18) forcedeth.c 　
1942
 NV_RX2_ERROR2NV_RX2_ERROR2 (1<<19) forcedeth.c 　
1943
 NV_RX2_ERROR3NV_RX2_ERROR3 (1<<20) forcedeth.c 　
1944
 NV_RX2_ERROR4NV_RX2_ERROR4 (1<<21) forcedeth.c 　
1945
 NV_RX2_CRCERRNV_RX2_CRCERR (1<<22) forcedeth.c 　
1946
 NV_RX2_OVERFLOWNV_RX2_OVERFLOW (1<<23) forcedeth.c 　
1947
 NV_RX2_FRAMINGERRNV_RX2_FRAMINGERR (1<<24) forcedeth.c 　
1948
 NV_RX2_ERRORNV_RX2_ERROR (1<<30) forcedeth.c 　
1949
 NV_RX2_AVAILNV_RX2_AVAIL (1<<31) forcedeth.c 　
1950
 NV_PCI_REGSZNV_PCI_REGSZ 0x270 forcedeth.c 　
1951
 NV_TXRX_RESET_DELAYNV_TXRX_RESET_DELAY 4 forcedeth.c 　
1952
 NV_TXSTOP_DELAY1NV_TXSTOP_DELAY1 10 forcedeth.c 　
1953
 NV_TXSTOP_DELAY1MAXNV_TXSTOP_DELAY1MAX 500000 forcedeth.c 　
1954
 NV_TXSTOP_DELAY2NV_TXSTOP_DELAY2 100 forcedeth.c 　
1955
 NV_RXSTOP_DELAY1NV_RXSTOP_DELAY1 10 forcedeth.c 　
1956
 NV_RXSTOP_DELAY1MAXNV_RXSTOP_DELAY1MAX 500000 forcedeth.c 　
1957
 NV_RXSTOP_DELAY2NV_RXSTOP_DELAY2 100 forcedeth.c 　
1958
 NV_SETUP5_DELAYNV_SETUP5_DELAY 5 forcedeth.c 　
1959
 NV_SETUP5_DELAYMAXNV_SETUP5_DELAYMAX 50000 forcedeth.c 　
1960
 NV_POWERUP_DELAYNV_POWERUP_DELAY 5 forcedeth.c 　
1961
 NV_POWERUP_DELAYMAXNV_POWERUP_DELAYMAX 5000 forcedeth.c 　
1962
 NV_MIIBUSY_DELAYNV_MIIBUSY_DELAY 50 forcedeth.c 　
1963
 NV_MIIPHY_DELAYNV_MIIPHY_DELAY 10 forcedeth.c 　
1964
 NV_MIIPHY_DELAYMAXNV_MIIPHY_DELAYMAX 10000 forcedeth.c 　
1965
 NV_WAKEUPPATTERNSNV_WAKEUPPATTERNS 5 forcedeth.c 　
1966
 NV_WAKEUPMASKENTRIESNV_WAKEUPMASKENTRIES 4 forcedeth.c 　
1967
 NV_WATCHDOG_TIMEONV_WATCHDOG_TIMEO (5*HZ) forcedeth.c 　
1968
 RX_RINGRX_RING 4 forcedeth.c 　
1969
 TX_RINGTX_RING 2 forcedeth.c 　
1970
 TX_LIMIT_STOPTX_LIMIT_STOP 63 forcedeth.c 　
1971
 TX_LIMIT_STARTTX_LIMIT_START 62 forcedeth.c 　
1972
 RX_NIC_BUFSIZERX_NIC_BUFSIZE (ETH_DATA_LEN + 64) forcedeth.c 　
1973
 RX_ALLOC_BUFSIZERX_ALLOC_BUFSIZE (ETH_DATA_LEN + 128) forcedeth.c 　
1974
 OOM_REFILLOOM_REFILL (1+HZ/20) forcedeth.c 　
1975
 POLL_WAITPOLL_WAIT (1+HZ/100) forcedeth.c 　
1976
 LINK_TIMEOUTLINK_TIMEOUT (3*HZ) forcedeth.c 　
1977
 DESC_VER_1DESC_VER_1 0x0 forcedeth.c 　
1978
 DESC_VER_2DESC_VER_2 (0x02100|NVREG_TXRXCTL_RXCHECK) forcedeth.c 　
1979
 PHY_OUI_MARVELLPHY_OUI_MARVELL 0x5043 forcedeth.c 　
1980
 PHY_OUI_CICADAPHY_OUI_CICADA 0x03f1 forcedeth.c 　
1981
 PHYID1_OUI_MASKPHYID1_OUI_MASK 0x03ff forcedeth.c 　
1982
 PHYID1_OUI_SHFTPHYID1_OUI_SHFT 6 forcedeth.c 　
1983
 PHYID2_OUI_MASKPHYID2_OUI_MASK 0xfc00 forcedeth.c 　
1984
 PHYID2_OUI_SHFTPHYID2_OUI_SHFT 10 forcedeth.c 　
1985
 PHY_INIT1PHY_INIT1 0x0f000 forcedeth.c 　
1986
 PHY_INIT2PHY_INIT2 0x0e00 forcedeth.c 　
1987
 PHY_INIT3PHY_INIT3 0x01000 forcedeth.c 　
1988
 PHY_INIT4PHY_INIT4 0x0200 forcedeth.c 　
1989
 PHY_INIT5PHY_INIT5 0x0004 forcedeth.c 　
1990
 PHY_INIT6PHY_INIT6 0x02000 forcedeth.c 　
1991
 PHY_GIGABITPHY_GIGABIT 0x0100 forcedeth.c 　
1992
 PHY_TIMEOUTPHY_TIMEOUT 0x1 forcedeth.c 　
1993
 PHY_ERRORPHY_ERROR 0x2 forcedeth.c 　
1994
 PHY_100PHY_100 0x1 forcedeth.c 　
1995
 PHY_1000PHY_1000 0x2 forcedeth.c 　
1996
 PHY_HALFPHY_HALF 0x100 forcedeth.c 　
1997
 MAC_ADDR_CORRECTMAC_ADDR_CORRECT 0x01 forcedeth.c 　
1998
 tx_ringtx_ring forcedeth_bufs.tx_ring forcedeth.c 　
1999
 rx_ringrx_ring forcedeth_bufs.rx_ring forcedeth.c 　
2000
 txbtxb forcedeth_bufs.txb forcedeth.c 　
2001
 rxbrxb forcedeth_bufs.rxb forcedeth.c 　
2002
 MII_READMII_READ (-1) forcedeth.c 　
2003
 IORESOURCE_MEMIORESOURCE_MEM 0x00000200 forcedeth.c 　
2004
 board_foundboard_found 1 forcedeth.c 　
2005
 valid_linkvalid_link 0 forcedeth.c 　
2006
 IPOIB_NUM_SEND_WQESIPOIB_NUM_SEND_WQES 2 ipoib.c 　
2007
 IPOIB_NUM_RECV_WQESIPOIB_NUM_RECV_WQES 4 ipoib.c 　
2008
 IPOIB_NUM_CQESIPOIB_NUM_CQES 8 ipoib.c 　
2009
 IPOIB_NUM_CACHED_PEERSIPOIB_NUM_CACHED_PEERS 4 ipoib.c 　
2010
 TX_RING_SIZETX_RING_SIZE 2 mtd80x.c 　
2011
 TX_QUEUE_LENTX_QUEUE_LEN 10 mtd80x.c Limit ring entries actually used.
2012
 RX_RING_SIZERX_RING_SIZE 4 mtd80x.c 　
2013
 HZHZ 100 mtd80x.c 　
2014
 TX_TIME_OUTTX_TIME_OUT (6*HZ) mtd80x.c 　
2015
 PKT_BUF_SZPKT_BUF_SZ 1536 mtd80x.c 　
2016
 MASK_MIIR_MII_READMASK_MIIR_MII_READ 0x00000000 mtd80x.c 　
2017
 MASK_MIIR_MII_WRITEMASK_MIIR_MII_WRITE 0x00000008 mtd80x.c 　
2018
 MASK_MIIR_MII_MDOMASK_MIIR_MII_MDO 0x00000004 mtd80x.c 　
2019
 MASK_MIIR_MII_MDIMASK_MIIR_MII_MDI 0x00000002 mtd80x.c 　
2020
 MASK_MIIR_MII_MDCMASK_MIIR_MII_MDC 0x00000001 mtd80x.c 　
2021
 OP_READOP_READ 0x6000 mtd80x.c ST:01+OP:10+PHYAD+REGAD+TA:Z0
2022
 OP_WRITEOP_WRITE 0x5002 mtd80x.c ST:01+OP:01+PHYAD+REGAD+TA:10
2023
 MysonPHYIDMysonPHYID 0xd0000302 mtd80x.c 　
2024
 MysonPHYID0MysonPHYID0 0x0302 mtd80x.c 　
2025
 StatusRegisterStatusRegister 18 mtd80x.c 　
2026
 SPEED100SPEED100 0x0400 mtd80x.c bit10
2027
 FULLMODEFULLMODE 0x0800 mtd80x.c bit11
2028
 SeeqPHYID0SeeqPHYID0 0x0016 mtd80x.c 　
2029
 MIIRegister18MIIRegister18 18 mtd80x.c 　
2030
 SPD_DET_100SPD_DET_100 0x80 mtd80x.c 　
2031
 DPLX_DET_FULLDPLX_DET_FULL 0x40 mtd80x.c 　
2032
 AhdocPHYID0AhdocPHYID0 0x0022 mtd80x.c 　
2033
 DiagnosticRegDiagnosticReg 18 mtd80x.c 　
2034
 DPLX_FULLDPLX_FULL 0x0800 mtd80x.c 　
2035
 Speed_100Speed_100 0x0400 mtd80x.c 　
2036
 MarvellPHYID0MarvellPHYID0 0x0141 mtd80x.c 　
2037
 LevelOnePHYID0LevelOnePHYID0 0x0013 mtd80x.c 　
2038
 MII1000BaseTControlRegMII1000BaseTControlReg 9 mtd80x.c 　
2039
 MII1000BaseTStatusRegMII1000BaseTStatusReg 10 mtd80x.c 　
2040
 SpecificRegSpecificReg 17 mtd80x.c 　
2041
 PHYAbletoPerform1000FullDuplexPHYAbletoPerform1000FullDuplex 0x0200 mtd80x.c 　
2042
 PHYAbletoPerform1000HalfDuplexPHYAbletoPerform1000HalfDuplex 0x0100 mtd80x.c 　
2043
 PHY1000AbilityMaskPHY1000AbilityMask 0x300 mtd80x.c 　
2044
 SpeedMaskSpeedMask 0x0c000 mtd80x.c 　
2045
 Speed_1000MSpeed_1000M 0x08000 mtd80x.c 　
2046
 Speed_100MSpeed_100M 0x4000 mtd80x.c 　
2047
 Speed_10MSpeed_10M 0 mtd80x.c 　
2048
 Full_DuplexFull_Duplex 0x2000 mtd80x.c 　
2049
 LXT1000_100MLXT1000_100M 0x08000 mtd80x.c 　
2050
 LXT1000_1000MLXT1000_1000M 0x0c000 mtd80x.c 　
2051
 LXT1000_FullLXT1000_Full 0x200 mtd80x.c 　
2052
 PS10PS10 0x00080000 mtd80x.c 　
2053
 FDFD 0x00100000 mtd80x.c 　
2054
 PS1000PS1000 0x00010000 mtd80x.c 　
2055
 LinkIsUpLinkIsUp 0x0004 mtd80x.c 　
2056
 LinkIsUp2LinkIsUp2 0x00040000 mtd80x.c 　
2057
 txbtxb mtd80x_bufs.txb mtd80x.c 　
2058
 rxbrxb mtd80x_bufs.rxb mtd80x.c 　
2059
 INCLUDE_NEINCLUDE_NE 1 ne.c 　
2060
 NE_SCANNE_SCAN 0x300,0x280,0x320,0x340,0x380 ne.c 　
2061
 ASIC_PIOASIC_PIO NE_DATA ne2k_isa.c 　
2062
 HZHZ 100 ns83820.c 　
2063
 USE_64BIT_ADDRUSE_64BIT_ADDR "+" ns83820.c 　
2064
 TRY_DACTRY_DAC 1 ns83820.c 　
2065
 TRY_DACTRY_DAC 0 ns83820.c 　
2066
 RX_BUF_SIZERX_BUF_SIZE 1500 ns83820.c 8192
2067
 NR_RX_DESCNR_RX_DESC 64 ns83820.c 　
2068
 NR_TX_DESCNR_TX_DESC 1 ns83820.c 　
2069
 REAL_RX_BUF_SIZEREAL_RX_BUF_SIZE (RX_BUF_SIZE + 14 + 6) ns83820.c rx/tx mac addr + type
2070
 MIN_TX_DESC_FREEMIN_TX_DESC_FREE 8 ns83820.c 　
2071
 CFGCSCFGCS 0x04 ns83820.c 　
2072
 CR_TXECR_TXE 0x00000001 ns83820.c 　
2073
 CR_TXDCR_TXD 0x00000002 ns83820.c 　
2074
 CR_RXECR_RXE 0x00000004 ns83820.c 　
2075
 CR_RXDCR_RXD 0x00000008 ns83820.c 　
2076
 CR_TXRCR_TXR 0x00000010 ns83820.c 　
2077
 CR_RXRCR_RXR 0x00000020 ns83820.c 　
2078
 CR_SWICR_SWI 0x00000080 ns83820.c 　
2079
 CR_RSTCR_RST 0x00000100 ns83820.c 　
2080
 PTSCR_EEBIST_FAILPTSCR_EEBIST_FAIL 0x00000001 ns83820.c 　
2081
 PTSCR_EEBIST_ENPTSCR_EEBIST_EN 0x00000002 ns83820.c 　
2082
 PTSCR_EELOAD_ENPTSCR_EELOAD_EN 0x00000004 ns83820.c 　
2083
 PTSCR_RBIST_FAILPTSCR_RBIST_FAIL 0x000001b8 ns83820.c 　
2084
 PTSCR_RBIST_DONEPTSCR_RBIST_DONE 0x00000200 ns83820.c 　
2085
 PTSCR_RBIST_ENPTSCR_RBIST_EN 0x00000400 ns83820.c 　
2086
 PTSCR_RBIST_RSTPTSCR_RBIST_RST 0x00002000 ns83820.c 　
2087
 MEAR_EEDIMEAR_EEDI 0x00000001 ns83820.c 　
2088
 MEAR_EEDOMEAR_EEDO 0x00000002 ns83820.c 　
2089
 MEAR_EECLKMEAR_EECLK 0x00000004 ns83820.c 　
2090
 MEAR_EESELMEAR_EESEL 0x00000008 ns83820.c 　
2091
 MEAR_MDIOMEAR_MDIO 0x00000010 ns83820.c 　
2092
 MEAR_MDDIRMEAR_MDDIR 0x00000020 ns83820.c 　
2093
 MEAR_MDCMEAR_MDC 0x00000040 ns83820.c 　
2094
 ISR_TXDESC3ISR_TXDESC3 0x40000000 ns83820.c 　
2095
 ISR_TXDESC2ISR_TXDESC2 0x20000000 ns83820.c 　
2096
 ISR_TXDESC1ISR_TXDESC1 0x10000000 ns83820.c 　
2097
 ISR_TXDESC0ISR_TXDESC0 0x08000000 ns83820.c 　
2098
 ISR_RXDESC3ISR_RXDESC3 0x04000000 ns83820.c 　
2099
 ISR_RXDESC2ISR_RXDESC2 0x02000000 ns83820.c 　
2100
 ISR_RXDESC1ISR_RXDESC1 0x01000000 ns83820.c 　
2101
 ISR_RXDESC0ISR_RXDESC0 0x00800000 ns83820.c 　
2102
 ISR_TXRCMPISR_TXRCMP 0x00400000 ns83820.c 　
2103
 ISR_RXRCMPISR_RXRCMP 0x00200000 ns83820.c 　
2104
 ISR_DPERRISR_DPERR 0x00100000 ns83820.c 　
2105
 ISR_SSERRISR_SSERR 0x00080000 ns83820.c 　
2106
 ISR_RMABTISR_RMABT 0x00040000 ns83820.c 　
2107
 ISR_RTABTISR_RTABT 0x00020000 ns83820.c 　
2108
 ISR_RXSOVRISR_RXSOVR 0x00010000 ns83820.c 　
2109
 ISR_HIBINTISR_HIBINT 0x00008000 ns83820.c 　
2110
 ISR_PHYISR_PHY 0x00004000 ns83820.c 　
2111
 ISR_PMEISR_PME 0x00002000 ns83820.c 　
2112
 ISR_SWIISR_SWI 0x00001000 ns83820.c 　
2113
 ISR_MIBISR_MIB 0x00000800 ns83820.c 　
2114
 ISR_TXURNISR_TXURN 0x00000400 ns83820.c 　
2115
 ISR_TXIDLEISR_TXIDLE 0x00000200 ns83820.c 　
2116
 ISR_TXERRISR_TXERR 0x00000100 ns83820.c 　
2117
 ISR_TXDESCISR_TXDESC 0x00000080 ns83820.c 　
2118
 ISR_TXOKISR_TXOK 0x00000040 ns83820.c 　
2119
 ISR_RXORNISR_RXORN 0x00000020 ns83820.c 　
2120
 ISR_RXIDLEISR_RXIDLE 0x00000010 ns83820.c 　
2121
 ISR_RXEARLYISR_RXEARLY 0x00000008 ns83820.c 　
2122
 ISR_RXERRISR_RXERR 0x00000004 ns83820.c 　
2123
 ISR_RXDESCISR_RXDESC 0x00000002 ns83820.c 　
2124
 ISR_RXOKISR_RXOK 0x00000001 ns83820.c 　
2125
 TXCFG_CSITXCFG_CSI 0x80000000 ns83820.c 　
2126
 TXCFG_HBITXCFG_HBI 0x40000000 ns83820.c 　
2127
 TXCFG_MLBTXCFG_MLB 0x20000000 ns83820.c 　
2128
 TXCFG_ATPTXCFG_ATP 0x10000000 ns83820.c 　
2129
 TXCFG_ECRETRYTXCFG_ECRETRY 0x00800000 ns83820.c 　
2130
 TXCFG_BRST_DISTXCFG_BRST_DIS 0x00080000 ns83820.c 　
2131
 TXCFG_MXDMA1024TXCFG_MXDMA1024 0x00000000 ns83820.c 　
2132
 TXCFG_MXDMA512TXCFG_MXDMA512 0x00700000 ns83820.c 　
2133
 TXCFG_MXDMA256TXCFG_MXDMA256 0x00600000 ns83820.c 　
2134
 TXCFG_MXDMA128TXCFG_MXDMA128 0x00500000 ns83820.c 　
2135
 TXCFG_MXDMA64TXCFG_MXDMA64 0x00400000 ns83820.c 　
2136
 TXCFG_MXDMA32TXCFG_MXDMA32 0x00300000 ns83820.c 　
2137
 TXCFG_MXDMA16TXCFG_MXDMA16 0x00200000 ns83820.c 　
2138
 TXCFG_MXDMA8TXCFG_MXDMA8 0x00100000 ns83820.c 　
2139
 CFG_LNKSTSCFG_LNKSTS 0x80000000 ns83820.c 　
2140
 CFG_SPDSTSCFG_SPDSTS 0x60000000 ns83820.c 　
2141
 CFG_SPDSTS1CFG_SPDSTS1 0x40000000 ns83820.c 　
2142
 CFG_SPDSTS0CFG_SPDSTS0 0x20000000 ns83820.c 　
2143
 CFG_DUPSTSCFG_DUPSTS 0x10000000 ns83820.c 　
2144
 CFG_TBI_ENCFG_TBI_EN 0x01000000 ns83820.c 　
2145
 CFG_MODE_1000CFG_MODE_1000 0x00400000 ns83820.c 　
2146
 CFG_AUTO_1000CFG_AUTO_1000 0x00200000 ns83820.c 　
2147
 CFG_PINT_CTLCFG_PINT_CTL 0x001c0000 ns83820.c 　
2148
 CFG_PINT_DUPSTSCFG_PINT_DUPSTS 0x00100000 ns83820.c 　
2149
 CFG_PINT_LNKSTSCFG_PINT_LNKSTS 0x00080000 ns83820.c 　
2150
 CFG_PINT_SPDSTSCFG_PINT_SPDSTS 0x00040000 ns83820.c 　
2151
 CFG_TMRTESTCFG_TMRTEST 0x00020000 ns83820.c 　
2152
 CFG_MRM_DISCFG_MRM_DIS 0x00010000 ns83820.c 　
2153
 CFG_MWI_DISCFG_MWI_DIS 0x00008000 ns83820.c 　
2154
 CFG_T64ADDRCFG_T64ADDR 0x00004000 ns83820.c 　
2155
 CFG_PCI64_DETCFG_PCI64_DET 0x00002000 ns83820.c 　
2156
 CFG_DATA64_ENCFG_DATA64_EN 0x00001000 ns83820.c 　
2157
 CFG_M64ADDRCFG_M64ADDR 0x00000800 ns83820.c 　
2158
 CFG_PHY_RSTCFG_PHY_RST 0x00000400 ns83820.c 　
2159
 CFG_PHY_DISCFG_PHY_DIS 0x00000200 ns83820.c 　
2160
 CFG_EXTSTS_ENCFG_EXTSTS_EN 0x00000100 ns83820.c 　
2161
 CFG_REQALGCFG_REQALG 0x00000080 ns83820.c 　
2162
 CFG_SBCFG_SB 0x00000040 ns83820.c 　
2163
 CFG_POWCFG_POW 0x00000020 ns83820.c 　
2164
 CFG_EXDCFG_EXD 0x00000010 ns83820.c 　
2165
 CFG_PESELCFG_PESEL 0x00000008 ns83820.c 　
2166
 CFG_BROM_DISCFG_BROM_DIS 0x00000004 ns83820.c 　
2167
 CFG_EXT_125CFG_EXT_125 0x00000002 ns83820.c 　
2168
 CFG_BEMCFG_BEM 0x00000001 ns83820.c 　
2169
 EXTSTS_UDPPKTEXTSTS_UDPPKT 0x00200000 ns83820.c 　
2170
 EXTSTS_TCPPKTEXTSTS_TCPPKT 0x00080000 ns83820.c 　
2171
 EXTSTS_IPPKTEXTSTS_IPPKT 0x00020000 ns83820.c 　
2172
 SPDSTS_POLARITYSPDSTS_POLARITY (CFG_SPDSTS1 | CFG_SPDSTS0 | CFG_DUPSTS | (lnksts ? CFG_LNKSTS : 0)) ns83820.c 　
2173
 MIBC_MIBSMIBC_MIBS 0x00000008 ns83820.c 　
2174
 MIBC_ACLRMIBC_ACLR 0x00000004 ns83820.c 　
2175
 MIBC_FRZMIBC_FRZ 0x00000002 ns83820.c 　
2176
 MIBC_WRNMIBC_WRN 0x00000001 ns83820.c 　
2177
 PCR_PSENPCR_PSEN (1 << 31) ns83820.c 　
2178
 PCR_PS_MCASTPCR_PS_MCAST (1 << 30) ns83820.c 　
2179
 PCR_PS_DAPCR_PS_DA (1 << 29) ns83820.c 　
2180
 PCR_STHI_8PCR_STHI_8 (3 << 23) ns83820.c 　
2181
 PCR_STLO_4PCR_STLO_4 (1 << 23) ns83820.c 　
2182
 PCR_FFHI_8KPCR_FFHI_8K (3 << 21) ns83820.c 　
2183
 PCR_FFLO_4KPCR_FFLO_4K (1 << 21) ns83820.c 　
2184
 PCR_PAUSE_CNTPCR_PAUSE_CNT 0xFFFE ns83820.c 　
2185
 RXCFG_AEPRXCFG_AEP 0x80000000 ns83820.c 　
2186
 RXCFG_ARPRXCFG_ARP 0x40000000 ns83820.c 　
2187
 RXCFG_STRIPCRCRXCFG_STRIPCRC 0x20000000 ns83820.c 　
2188
 RXCFG_RX_FDRXCFG_RX_FD 0x10000000 ns83820.c 　
2189
 RXCFG_ALPRXCFG_ALP 0x08000000 ns83820.c 　
2190
 RXCFG_AIRLRXCFG_AIRL 0x04000000 ns83820.c 　
2191
 RXCFG_MXDMA512RXCFG_MXDMA512 0x00700000 ns83820.c 　
2192
 RXCFG_DRTHRXCFG_DRTH 0x0000003e ns83820.c 　
2193
 RXCFG_DRTH0RXCFG_DRTH0 0x00000002 ns83820.c 　
2194
 RFCR_RFENRFCR_RFEN 0x80000000 ns83820.c 　
2195
 RFCR_AABRFCR_AAB 0x40000000 ns83820.c 　
2196
 RFCR_AAMRFCR_AAM 0x20000000 ns83820.c 　
2197
 RFCR_AAURFCR_AAU 0x10000000 ns83820.c 　
2198
 RFCR_APMRFCR_APM 0x08000000 ns83820.c 　
2199
 RFCR_APATRFCR_APAT 0x07800000 ns83820.c 　
2200
 RFCR_APAT3RFCR_APAT3 0x04000000 ns83820.c 　
2201
 RFCR_APAT2RFCR_APAT2 0x02000000 ns83820.c 　
2202
 RFCR_APAT1RFCR_APAT1 0x01000000 ns83820.c 　
2203
 RFCR_APAT0RFCR_APAT0 0x00800000 ns83820.c 　
2204
 RFCR_AARPRFCR_AARP 0x00400000 ns83820.c 　
2205
 RFCR_MHENRFCR_MHEN 0x00200000 ns83820.c 　
2206
 RFCR_UHENRFCR_UHEN 0x00100000 ns83820.c 　
2207
 RFCR_ULMRFCR_ULM 0x00080000 ns83820.c 　
2208
 VRCR_RUDPEVRCR_RUDPE 0x00000080 ns83820.c 　
2209
 VRCR_RTCPEVRCR_RTCPE 0x00000040 ns83820.c 　
2210
 VRCR_RIPEVRCR_RIPE 0x00000020 ns83820.c 　
2211
 VRCR_IPENVRCR_IPEN 0x00000010 ns83820.c 　
2212
 VRCR_DUTFVRCR_DUTF 0x00000008 ns83820.c 　
2213
 VRCR_DVTFVRCR_DVTF 0x00000004 ns83820.c 　
2214
 VRCR_VTRENVRCR_VTREN 0x00000002 ns83820.c 　
2215
 VRCR_VTDENVRCR_VTDEN 0x00000001 ns83820.c 　
2216
 VTCR_PPCHKVTCR_PPCHK 0x00000008 ns83820.c 　
2217
 VTCR_GCHKVTCR_GCHK 0x00000004 ns83820.c 　
2218
 VTCR_VPPTIVTCR_VPPTI 0x00000002 ns83820.c 　
2219
 VTCR_VGTIVTCR_VGTI 0x00000001 ns83820.c 　
2220
 CRCR 0x00 ns83820.c 　
2221
 CFGCFG 0x04 ns83820.c 　
2222
 MEARMEAR 0x08 ns83820.c 　
2223
 PTSCRPTSCR 0x0c ns83820.c 　
2224
 ISRISR 0x10 ns83820.c 　
2225
 IMRIMR 0x14 ns83820.c 　
2226
 IERIER 0x18 ns83820.c 　
2227
 IHRIHR 0x1c ns83820.c 　
2228
 TXDPTXDP 0x20 ns83820.c 　
2229
 TXDP_HITXDP_HI 0x24 ns83820.c 　
2230
 TXCFGTXCFG 0x28 ns83820.c 　
2231
 GPIORGPIOR 0x2c ns83820.c 　
2232
 RXDPRXDP 0x30 ns83820.c 　
2233
 RXDP_HIRXDP_HI 0x34 ns83820.c 　
2234
 RXCFGRXCFG 0x38 ns83820.c 　
2235
 PQCRPQCR 0x3c ns83820.c 　
2236
 WCSRWCSR 0x40 ns83820.c 　
2237
 PCRPCR 0x44 ns83820.c 　
2238
 RFCRRFCR 0x48 ns83820.c 　
2239
 RFDRRFDR 0x4c ns83820.c 　
2240
 SRRSRR 0x58 ns83820.c 　
2241
 VRCRVRCR 0xbc ns83820.c 　
2242
 VTCRVTCR 0xc0 ns83820.c 　
2243
 VDRVDR 0xc4 ns83820.c 　
2244
 CCSRCCSR 0xcc ns83820.c 　
2245
 TBICRTBICR 0xe0 ns83820.c 　
2246
 TBISRTBISR 0xe4 ns83820.c 　
2247
 TANARTANAR 0xe8 ns83820.c 　
2248
 TANLPARTANLPAR 0xec ns83820.c 　
2249
 TANERTANER 0xf0 ns83820.c 　
2250
 TESRTESR 0xf4 ns83820.c 　
2251
 TBICR_MR_AN_ENABLETBICR_MR_AN_ENABLE 0x00001000 ns83820.c 　
2252
 TBICR_MR_RESTART_ANTBICR_MR_RESTART_AN 0x00000200 ns83820.c 　
2253
 TBISR_MR_LINK_STATUSTBISR_MR_LINK_STATUS 0x00000020 ns83820.c 　
2254
 TBISR_MR_AN_COMPLETETBISR_MR_AN_COMPLETE 0x00000004 ns83820.c 　
2255
 TANAR_PS2TANAR_PS2 0x00000100 ns83820.c 　
2256
 TANAR_PS1TANAR_PS1 0x00000080 ns83820.c 　
2257
 TANAR_HALF_DUPTANAR_HALF_DUP 0x00000040 ns83820.c 　
2258
 TANAR_FULL_DUPTANAR_FULL_DUP 0x00000020 ns83820.c 　
2259
 GPIOR_GP5_OEGPIOR_GP5_OE 0x00000200 ns83820.c 　
2260
 GPIOR_GP4_OEGPIOR_GP4_OE 0x00000100 ns83820.c 　
2261
 GPIOR_GP3_OEGPIOR_GP3_OE 0x00000080 ns83820.c 　
2262
 GPIOR_GP2_OEGPIOR_GP2_OE 0x00000040 ns83820.c 　
2263
 GPIOR_GP1_OEGPIOR_GP1_OE 0x00000020 ns83820.c 　
2264
 GPIOR_GP3_OUTGPIOR_GP3_OUT 0x00000004 ns83820.c 　
2265
 GPIOR_GP1_OUTGPIOR_GP1_OUT 0x00000001 ns83820.c 　
2266
 LINK_AUTONEGOTIATELINK_AUTONEGOTIATE 0x01 ns83820.c 　
2267
 LINK_DOWNLINK_DOWN 0x02 ns83820.c 　
2268
 LINK_UPLINK_UP 0x04 ns83820.c 　
2269
 HW_ADDR_LENHW_ADDR_LEN 8 ns83820.c 　
2270
 HW_ADDR_LENHW_ADDR_LEN 4 ns83820.c 　
2271
 CMDSTS_OWNCMDSTS_OWN 0x80000000 ns83820.c 　
2272
 CMDSTS_MORECMDSTS_MORE 0x40000000 ns83820.c 　
2273
 CMDSTS_INTRCMDSTS_INTR 0x20000000 ns83820.c 　
2274
 CMDSTS_ERRCMDSTS_ERR 0x10000000 ns83820.c 　
2275
 CMDSTS_OKCMDSTS_OK 0x08000000 ns83820.c 　
2276
 CMDSTS_LEN_MASKCMDSTS_LEN_MASK 0x0000ffff ns83820.c 　
2277
 CMDSTS_DEST_MASKCMDSTS_DEST_MASK 0x01800000 ns83820.c 　
2278
 CMDSTS_DEST_SELFCMDSTS_DEST_SELF 0x00800000 ns83820.c 　
2279
 CMDSTS_DEST_MULTICMDSTS_DEST_MULTI 0x01000000 ns83820.c 　
2280
 DESC_SIZEDESC_SIZE 8 ns83820.c Should be cache line sized
2281
 tx_ringtx_ring ns83820_bufs.tx_ring ns83820.c 　
2282
 rx_ringrx_ring ns83820_bufs.rx_ring ns83820.c 　
2283
 txbtxb ns83820_bufs.txb ns83820.c 　
2284
 rxbrxb ns83820_bufs.rxb ns83820.c 　
2285
 board_foundboard_found 1 ns83820.c 　
2286
 valid_linkvalid_link 0 ns83820.c 　
2287
 ASIC_PIOASIC_PIO WD_IAR ns8390.c 　
2288
 eth_probeeth_probe wd_probe ns8390.c 　
2289
 drv_versiondrv_version "v1.3" pcnet32.c 　
2290
 drv_datedrv_date "03-29-2004" pcnet32.c 　
2291
 PCNET32_PORT_AUIPCNET32_PORT_AUI 0x00 pcnet32.c 　
2292
 PCNET32_PORT_10BTPCNET32_PORT_10BT 0x01 pcnet32.c 　
2293
 PCNET32_PORT_GPSIPCNET32_PORT_GPSI 0x02 pcnet32.c 　
2294
 PCNET32_PORT_MIIPCNET32_PORT_MII 0x03 pcnet32.c 　
2295
 PCNET32_PORT_PORTSELPCNET32_PORT_PORTSEL 0x03 pcnet32.c 　
2296
 PCNET32_PORT_ASELPCNET32_PORT_ASEL 0x04 pcnet32.c 　
2297
 PCNET32_PORT_100PCNET32_PORT_100 0x40 pcnet32.c 　
2298
 PCNET32_PORT_FDPCNET32_PORT_FD 0x80 pcnet32.c 　
2299
 PCNET32_DMA_MASKPCNET32_DMA_MASK 0xffffffff pcnet32.c 　
2300
 MAX_UNITSMAX_UNITS 8 pcnet32.c More are supported, limit only on options
2301
 PCNET32_LOG_TX_BUFFERSPCNET32_LOG_TX_BUFFERS 1 pcnet32.c 　
2302
 PCNET32_LOG_RX_BUFFERSPCNET32_LOG_RX_BUFFERS 2 pcnet32.c 　
2303
 TX_RING_SIZETX_RING_SIZE (1 << (PCNET32_LOG_TX_BUFFERS)) pcnet32.c 　
2304
 TX_RING_MOD_MASKTX_RING_MOD_MASK (TX_RING_SIZE - 1) pcnet32.c 　
2305
 TX_RING_LEN_BITSTX_RING_LEN_BITS 0x0000 pcnet32.c PCNET32_LOG_TX_BUFFERS) << 12)
2306
 RX_RING_SIZERX_RING_SIZE (1 << (PCNET32_LOG_RX_BUFFERS)) pcnet32.c 　
2307
 RX_RING_MOD_MASKRX_RING_MOD_MASK (RX_RING_SIZE - 1) pcnet32.c 　
2308
 RX_RING_LEN_BITSRX_RING_LEN_BITS ((PCNET32_LOG_RX_BUFFERS) << 4) pcnet32.c 　
2309
 PKT_BUF_SZPKT_BUF_SZ 1544 pcnet32.c 　
2310
 PCNET32_WIO_RDPPCNET32_WIO_RDP 0x10 pcnet32.c 　
2311
 PCNET32_WIO_RAPPCNET32_WIO_RAP 0x12 pcnet32.c 　
2312
 PCNET32_WIO_RESETPCNET32_WIO_RESET 0x14 pcnet32.c 　
2313
 PCNET32_WIO_BDPPCNET32_WIO_BDP 0x16 pcnet32.c 　
2314
 PCNET32_DWIO_RDPPCNET32_DWIO_RDP 0x10 pcnet32.c 　
2315
 PCNET32_DWIO_RAPPCNET32_DWIO_RAP 0x14 pcnet32.c 　
2316
 PCNET32_DWIO_RESETPCNET32_DWIO_RESET 0x18 pcnet32.c 　
2317
 PCNET32_DWIO_BDPPCNET32_DWIO_BDP 0x1C pcnet32.c 　
2318
 PCNET32_TOTAL_SIZEPCNET32_TOTAL_SIZE 0x20 pcnet32.c 　
2319
 MII_CNTMII_CNT 4 pcnet32.c 　
2320
 MAX_JOIN_INFO_COUNTMAX_JOIN_INFO_COUNT 2 prism2.c 　
2321
 WLAN_HOSTIFWLAN_HOSTIF WLAN_PLX prism2.c 　
2322
 BAP_TIMEOUTBAP_TIMEOUT ( 5000 ) prism2.c 　
2323
 PLX_LOCAL_CONFIG_REGISTER_BASEPLX_LOCAL_CONFIG_REGISTER_BASE ( PCI_BASE_ADDRESS_1 ) prism2.c 　
2324
 PLX_LOCAL_ADDRESS_SPACE_0_BASEPLX_LOCAL_ADDRESS_SPACE_0_BASE ( PCI_BASE_ADDRESS_2 ) prism2.c 　
2325
 PLX_LOCAL_ADDRESS_SPACE_1_BASEPLX_LOCAL_ADDRESS_SPACE_1_BASE ( PCI_BASE_ADDRESS_3 ) prism2.c 　
2326
 PLX_LOCAL_ADDRESS_SPACE_2_BASEPLX_LOCAL_ADDRESS_SPACE_2_BASE ( PCI_BASE_ADDRESS_4 ) prism2.c 　
2327
 PLX_LOCAL_ADDRESS_SPACE_3_BASEPLX_LOCAL_ADDRESS_SPACE_3_BASE ( PCI_BASE_ADDRESS_5 ) prism2.c 　
2328
 PRISM2_PLX_ATTR_MEM_BASEPRISM2_PLX_ATTR_MEM_BASE ( PLX_LOCAL_ADDRESS_SPACE_0_BASE ) prism2.c 　
2329
 PRISM2_PLX_IO_BASEPRISM2_PLX_IO_BASE ( PLX_LOCAL_ADDRESS_SPACE_1_BASE ) prism2.c 　
2330
 PRISM2_PCI_MEM_BASEPRISM2_PCI_MEM_BASE ( PCI_BASE_ADDRESS_0 ) prism2.c 　
2331
 CISTPL_VERS_1CISTPL_VERS_1 ( 0x15 ) prism2.c 　
2332
 CISTPL_ENDCISTPL_END ( 0xff ) prism2.c 　
2333
 CIS_STEPCIS_STEP ( 2 ) prism2.c 　
2334
 CISTPL_HEADER_LENCISTPL_HEADER_LEN ( 2 * CIS_STEP ) prism2.c 　
2335
 CISTPL_LEN_OFFCISTPL_LEN_OFF ( 1 * CIS_STEP ) prism2.c 　
2336
 CISTPL_VERS_1_STR_OFFCISTPL_VERS_1_STR_OFF ( 4 * CIS_STEP ) prism2.c 　
2337
 COR_OFFSETCOR_OFFSET ( 0x3e0 ) prism2.c COR attribute offset of Prism2 PC card
2338
 COR_VALUECOR_VALUE ( 0x41 ) prism2.c Enable PC card with irq in level trigger (but interrupts disabled)
2339
 WLAN_IEEE_OUI_LENWLAN_IEEE_OUI_LEN 3 prism2.c 　
2340
 WLAN_HOSTIFWLAN_HOSTIF WLAN_PCI prism2_pci.c 　
2341
 WLAN_HOSTIFWLAN_HOSTIF WLAN_PLX prism2_plx.c 　
2342
 R8168_CPCMD_QUIRK_MASKR8168_CPCMD_QUIRK_MASK (\ EnableBist | \ Mac_dbgo_oe | \ Force_half_dup | \ Force_rxflow_en | \ Force_txflow_en | \ Cxpl_dbg_sel | \ ASF | \ PktCntrDi r8169.c 　
2343
 R810X_CPCMD_QUIRK_MASKR810X_CPCMD_QUIRK_MASK (\ EnableBist | \ Mac_dbgo_oe | \ Force_half_dup | \ Force_half_dup | \ Force_txflow_en | \ Cxpl_dbg_sel | \ ASF | \ PktCntrDis r8169.c 　
2344
 TX_RING_SIZETX_RING_SIZE 4 rtl8139.c 　
2345
 TX_FIFO_THRESHTX_FIFO_THRESH 256 rtl8139.c In bytes, rounded down to 32 byte units.
2346
 RX_FIFO_THRESHRX_FIFO_THRESH 4 rtl8139.c Rx buffer level before first PCI xfer.
2347
 RX_DMA_BURSTRX_DMA_BURST 4 rtl8139.c Maximum PCI burst, '4' is 256 bytes
2348
 TX_DMA_BURSTTX_DMA_BURST 4 rtl8139.c Calculate as 16<<val.
2349
 TX_IPGTX_IPG 3 rtl8139.c This is the only valid value
2350
 RX_BUF_LEN_IDXRX_BUF_LEN_IDX 0 rtl8139.c 0, 1, 2 is allowed - 8,16,32K rx buffer
2351
 RX_BUF_LENRX_BUF_LEN ( (8192 << RX_BUF_LEN_IDX) ) rtl8139.c 　
2352
 RX_BUF_PADRX_BUF_PAD 4 rtl8139.c 　
2353
 EE_M1EE_M1 0x80 rtl8139.c Mode select bit 1
2354
 EE_M0EE_M0 0x40 rtl8139.c Mode select bit 0
2355
 EE_CSEE_CS 0x08 rtl8139.c EEPROM chip select
2356
 EE_SKEE_SK 0x04 rtl8139.c EEPROM shift clock
2357
 EE_DIEE_DI 0x02 rtl8139.c Data in
2358
 EE_DOEE_DO 0x01 rtl8139.c Data out
2359
 EE_MACEE_MAC 7 rtl8139.c 　
2360
 txdtxd sis900_bufs.txd sis900.c 　
2361
 rxdrxd sis900_bufs.rxd sis900.c 　
2362
 txbtxb sis900_bufs.txb sis900.c 　
2363
 rxbrxb sis900_bufs.rxb sis900.c 　
2364
 DRV_NAMEDRV_NAME "sky2" sky2.c 　
2365
 DRV_VERSIONDRV_VERSION "1.22" sky2.c 　
2366
 PFXPFX DRV_NAME " " sky2.c 　
2367
 RX_LE_SIZERX_LE_SIZE 128 sky2.c 　
2368
 RX_LE_BYTESRX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le)) sky2.c 　
2369
 RX_RING_ALIGNRX_RING_ALIGN 4096 sky2.c 　
2370
 RX_PENDINGRX_PENDING (RX_LE_SIZE/6 - 2) sky2.c 　
2371
 TX_RING_SIZETX_RING_SIZE 128 sky2.c 　
2372
 TX_PENDINGTX_PENDING (TX_RING_SIZE - 1) sky2.c 　
2373
 TX_RING_ALIGNTX_RING_ALIGN 4096 sky2.c 　
2374
 MAX_SKB_TX_LEMAX_SKB_TX_LE 4 sky2.c 　
2375
 STATUS_RING_SIZESTATUS_RING_SIZE 512 sky2.c 2 ports * (TX + RX)
2376
 STATUS_LE_BYTESSTATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le)) sky2.c 　
2377
 STATUS_RING_ALIGNSTATUS_RING_ALIGN 4096 sky2.c 　
2378
 PHY_RETRIESPHY_RETRIES 1000 sky2.c 　
2379
 SKY2_EEPROM_MAGICSKY2_EEPROM_MAGIC 0x9955aabb sky2.c 　
2380
 LINUX_OUT_MACROSLINUX_OUT_MACROS 1 smc9000.c 　
2381
 SMC9000_DEBUGSMC9000_DEBUG 0 smc9000.c 　
2382
 PRINTK2PRINTK2 printf smc9000.c 　
2383
 _outb_outb outb smc9000.c 　
2384
 _outw_outw outw smc9000.c 　
2385
 drv_versiondrv_version "v1.12" sundance.c 　
2386
 drv_datedrv_date "2004-03-21" sundance.c 　
2387
 HZHZ 100 sundance.c 　
2388
 TX_RING_SIZETX_RING_SIZE 2 sundance.c 　
2389
 TX_QUEUE_LENTX_QUEUE_LEN 10 sundance.c Limit ring entries actually used.
2390
 RX_RING_SIZERX_RING_SIZE 4 sundance.c 　
2391
 TX_TIME_OUTTX_TIME_OUT (4*HZ) sundance.c 　
2392
 PKT_BUF_SZPKT_BUF_SZ 1536 sundance.c 　
2393
 rxbrxb rx_tx_buf.rxb sundance.c 　
2394
 txbtxb rx_tx_buf.txb sundance.c 　
2395
 EEPROM_SIZEEEPROM_SIZE 128 sundance.c 　
2396
 PCI_IOTYPEPCI_IOTYPE (PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0) sundance.c 　
2397
 MII_CNTMII_CNT 4 sundance.c 　
2398
 EEPROM_SA_OFFSETEEPROM_SA_OFFSET 0x10 sundance.c 　
2399
 DEFAULT_INTRDEFAULT_INTR (IntrRxDMADone | IntrPCIErr | \ IntrDrvRqst | IntrTxDone | StatsMax | \ LinkChange) sundance.c 　
2400
 MDIO_EnbInMDIO_EnbIn (0) sundance.c 　
2401
 MDIO_WRITE0MDIO_WRITE0 (MDIO_EnbOutput) sundance.c 　
2402
 MDIO_WRITE1MDIO_WRITE1 (MDIO_Data | MDIO_EnbOutput) sundance.c 　
2403
 SUPPORT_COPPER_PHYSUPPORT_COPPER_PHY 1 tg3.c 　
2404
 SUPPORT_FIBER_PHYSUPPORT_FIBER_PHY 1 tg3.c 　
2405
 SUPPORT_LINK_REPORTSUPPORT_LINK_REPORT 1 tg3.c 　
2406
 SUPPORT_PARTNO_STRSUPPORT_PARTNO_STR 1 tg3.c 　
2407
 SUPPORT_PHY_STRSUPPORT_PHY_STR 1 tg3.c 　
2408
 TG3_RX_RING_SIZETG3_RX_RING_SIZE 512 tg3.c 　
2409
 TG3_DEF_RX_RING_PENDINGTG3_DEF_RX_RING_PENDING 20 tg3.c RX_RING_PENDING seems to be o.k. at 20 and 200
2410
 TG3_RX_RCB_RING_SIZETG3_RX_RCB_RING_SIZE 1024 tg3.c 　
2411
 TG3_TX_RING_SIZETG3_TX_RING_SIZE 512 tg3.c 　
2412
 TG3_DEF_TX_RING_PENDINGTG3_DEF_TX_RING_PENDING (TG3_TX_RING_SIZE - 1) tg3.c 　
2413
 TG3_RX_RING_BYTESTG3_RX_RING_BYTES (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RING_SIZE) tg3.c 　
2414
 TG3_RX_RCB_RING_BYTESTG3_RX_RCB_RING_BYTES (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RCB_RING_SIZE) tg3.c 　
2415
 TG3_TX_RING_BYTESTG3_TX_RING_BYTES (sizeof(struct tg3_tx_buffer_desc) * TG3_TX_RING_SIZE) tg3.c 　
2416
 RX_PKT_BUF_SZRX_PKT_BUF_SZ (1536 + 2 + 64) tg3.c 　
2417
 PHY_BUSY_LOOPSPHY_BUSY_LOOPS 5000 tg3.c 　
2418
 ANEG_OKANEG_OK 0 tg3.c 　
2419
 ANEG_DONEANEG_DONE 1 tg3.c 　
2420
 ANEG_TIMER_ENABANEG_TIMER_ENAB 2 tg3.c 　
2421
 ANEG_FAILEDANEG_FAILED -1 tg3.c 　
2422
 ANEG_STATE_SETTLE_TIMEANEG_STATE_SETTLE_TIME 10000 tg3.c 　
2423
 MAX_WAIT_CNTMAX_WAIT_CNT 1000 tg3.c 　
2424
 drv_versiondrv_version "v1.4" tlan.c 　
2425
 drv_datedrv_date "01-17-2004" tlan.c 　
2426
 HZHZ 100 tlan.c 　
2427
 TX_TIME_OUTTX_TIME_OUT (6*HZ) tlan.c 　
2428
 tx_ringtx_ring tlan_buffers.tx_ring tlan.c 　
2429
 txbtxb tlan_buffers.txb tlan.c 　
2430
 rx_ringrx_ring tlan_buffers.rx_ring tlan.c 　
2431
 rxbrxb tlan_buffers.rxb tlan.c 　
2432
 board_foundboard_found 1 tlan.c 　
2433
 valid_linkvalid_link 0 tlan.c 　
2434
 TX_TIME_OUTTX_TIME_OUT 2*TICKS_PER_SEC tulip.c 　
2435
 TULIP_IOTYPETULIP_IOTYPE PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0 tulip.c 　
2436
 TULIP_SIZETULIP_SIZE 0x80 tulip.c 　
2437
 FULL_DUPLEX_MAGICFULL_DUPLEX_MAGIC 0x6969 tulip.c 　
2438
 MEDIA_MASKMEDIA_MASK 31 tulip.c 　
2439
 EEPROM_ADDRLENEEPROM_ADDRLEN 6 tulip.c 　
2440
 EEPROM_SIZEEEPROM_SIZE 128 tulip.c 2 << EEPROM_ADDRLEN
2441
 EE_WRITE_CMDEE_WRITE_CMD (5 << addr_len) tulip.c 　
2442
 EE_READ_CMDEE_READ_CMD (6 << addr_len) tulip.c 　
2443
 EE_ERASE_CMDEE_ERASE_CMD (7 << addr_len) tulip.c 　
2444
 EE_SHIFT_CLKEE_SHIFT_CLK 0x02 tulip.c EEPROM shift clock.
2445
 EE_CSEE_CS 0x01 tulip.c EEPROM chip select.
2446
 EE_DATA_WRITEEE_DATA_WRITE 0x04 tulip.c EEPROM chip data in.
2447
 EE_WRITE_0EE_WRITE_0 0x01 tulip.c 　
2448
 EE_WRITE_1EE_WRITE_1 0x05 tulip.c 　
2449
 EE_DATA_READEE_DATA_READ 0x08 tulip.c EEPROM chip data out.
2450
 EE_ENBEE_ENB (0x4800 | EE_CS) tulip.c 　
2451
 BUFLENBUFLEN 1536 tulip.c 　
2452
 DESC_RING_WRAPDESC_RING_WRAP 0x02000000 tulip.c 　
2453
 TX_RING_SIZETX_RING_SIZE 2 tulip.c 　
2454
 RX_RING_SIZERX_RING_SIZE 4 tulip.c 　
2455
 tx_ringtx_ring tulip_bss.tx_ring tulip.c 　
2456
 txbtxb tulip_bss.txb tulip.c 　
2457
 rx_ringrx_ring tulip_bss.rx_ring tulip.c 　
2458
 rxbrxb tulip_bss.rxb tulip.c 　
2459
 MDIO_SHIFT_CLKMDIO_SHIFT_CLK 0x10000 tulip.c 　
2460
 MDIO_DATA_WRITE0MDIO_DATA_WRITE0 0x00000 tulip.c 　
2461
 MDIO_DATA_WRITE1MDIO_DATA_WRITE1 0x20000 tulip.c 　
2462
 MDIO_ENBMDIO_ENB 0x00000 tulip.c Ignore the 0x02000 databook setting.
2463
 MDIO_ENB_INMDIO_ENB_IN 0x40000 tulip.c 　
2464
 MDIO_DATA_READMDIO_DATA_READ 0x80000 tulip.c 　
2465
 W_MAX_TIMEOUTW_MAX_TIMEOUT 0x0FFFU via-rhine.c 　
2466
 RX_BUF_LEN_IDXRX_BUF_LEN_IDX 3 via-rhine.c 0==8K, 1==16K, 2==32K, 3==64K
2467
 RX_BUF_LENRX_BUF_LEN (8192 << RX_BUF_LEN_IDX) via-rhine.c 　
2468
 TX_BUF_SIZETX_BUF_SIZE 1536 via-rhine.c 　
2469
 RX_BUF_SIZERX_BUF_SIZE 1536 via-rhine.c 　
2470
 TX_FIFO_THRESHTX_FIFO_THRESH 256 via-rhine.c In bytes, rounded down to 32 byte units.
2471
 RX_FIFO_THRESHRX_FIFO_THRESH 4 via-rhine.c Rx buffer level before first PCI xfer.
2472
 RX_DMA_BURSTRX_DMA_BURST 4 via-rhine.c Maximum PCI burst, '4' is 256 bytes
2473
 TX_DMA_BURSTTX_DMA_BURST 4 via-rhine.c 　
2474
 TX_TIMEOUTTX_TIMEOUT ((2000*HZ)/1000) via-rhine.c 　
2475
 byPAR0byPAR0 ioaddr via-rhine.c 　
2476
 byRCRbyRCR ioaddr + 6 via-rhine.c 　
2477
 byTCRbyTCR ioaddr + 7 via-rhine.c 　
2478
 byCR0byCR0 ioaddr + 8 via-rhine.c 　
2479
 byCR1byCR1 ioaddr + 9 via-rhine.c 　
2480
 byISR0byISR0 ioaddr + 0x0c via-rhine.c 　
2481
 byISR1byISR1 ioaddr + 0x0d via-rhine.c 　
2482
 byIMR0byIMR0 ioaddr + 0x0e via-rhine.c 　
2483
 byIMR1byIMR1 ioaddr + 0x0f via-rhine.c 　
2484
 byMAR0byMAR0 ioaddr + 0x10 via-rhine.c 　
2485
 byMAR1byMAR1 ioaddr + 0x11 via-rhine.c 　
2486
 byMAR2byMAR2 ioaddr + 0x12 via-rhine.c 　
2487
 byMAR3byMAR3 ioaddr + 0x13 via-rhine.c 　
2488
 byMAR4byMAR4 ioaddr + 0x14 via-rhine.c 　
2489
 byMAR5byMAR5 ioaddr + 0x15 via-rhine.c 　
2490
 byMAR6byMAR6 ioaddr + 0x16 via-rhine.c 　
2491
 byMAR7byMAR7 ioaddr + 0x17 via-rhine.c 　
2492
 dwCurrentRxDescAddrdwCurrentRxDescAddr ioaddr + 0x18 via-rhine.c 　
2493
 dwCurrentTxDescAddrdwCurrentTxDescAddr ioaddr + 0x1c via-rhine.c 　
2494
 dwCurrentRDSE0dwCurrentRDSE0 ioaddr + 0x20 via-rhine.c 　
2495
 dwCurrentRDSE1dwCurrentRDSE1 ioaddr + 0x24 via-rhine.c 　
2496
 dwCurrentRDSE2dwCurrentRDSE2 ioaddr + 0x28 via-rhine.c 　
2497
 dwCurrentRDSE3dwCurrentRDSE3 ioaddr + 0x2c via-rhine.c 　
2498
 dwNextRDSE0dwNextRDSE0 ioaddr + 0x30 via-rhine.c 　
2499
 dwNextRDSE1dwNextRDSE1 ioaddr + 0x34 via-rhine.c 　
2500
 dwNextRDSE2dwNextRDSE2 ioaddr + 0x38 via-rhine.c 　
2501
 dwNextRDSE3dwNextRDSE3 ioaddr + 0x3c via-rhine.c 　
2502
 dwCurrentTDSE0dwCurrentTDSE0 ioaddr + 0x40 via-rhine.c 　
2503
 dwCurrentTDSE1dwCurrentTDSE1 ioaddr + 0x44 via-rhine.c 　
2504
 dwCurrentTDSE2dwCurrentTDSE2 ioaddr + 0x48 via-rhine.c 　
2505
 dwCurrentTDSE3dwCurrentTDSE3 ioaddr + 0x4c via-rhine.c 　
2506
 dwNextTDSE0dwNextTDSE0 ioaddr + 0x50 via-rhine.c 　
2507
 dwNextTDSE1dwNextTDSE1 ioaddr + 0x54 via-rhine.c 　
2508
 dwNextTDSE2dwNextTDSE2 ioaddr + 0x58 via-rhine.c 　
2509
 dwNextTDSE3dwNextTDSE3 ioaddr + 0x5c via-rhine.c 　
2510
 dwCurrRxDMAPtrdwCurrRxDMAPtr ioaddr + 0x60 via-rhine.c 　
2511
 dwCurrTxDMAPtrdwCurrTxDMAPtr ioaddr + 0x64 via-rhine.c 　
2512
 byMPHYbyMPHY ioaddr + 0x6c via-rhine.c 　
2513
 byMIISRbyMIISR ioaddr + 0x6d via-rhine.c 　
2514
 byBCR0byBCR0 ioaddr + 0x6e via-rhine.c 　
2515
 byBCR1byBCR1 ioaddr + 0x6f via-rhine.c 　
2516
 byMIICRbyMIICR ioaddr + 0x70 via-rhine.c 　
2517
 byMIIADbyMIIAD ioaddr + 0x71 via-rhine.c 　
2518
 wMIIDATAwMIIDATA ioaddr + 0x72 via-rhine.c 　
2519
 byEECSRbyEECSR ioaddr + 0x74 via-rhine.c 　
2520
 byTESTbyTEST ioaddr + 0x75 via-rhine.c 　
2521
 byGPIObyGPIO ioaddr + 0x76 via-rhine.c 　
2522
 byCFGAbyCFGA ioaddr + 0x78 via-rhine.c 　
2523
 byCFGBbyCFGB ioaddr + 0x79 via-rhine.c 　
2524
 byCFGCbyCFGC ioaddr + 0x7a via-rhine.c 　
2525
 byCFGDbyCFGD ioaddr + 0x7b via-rhine.c 　
2526
 wTallyCntMPAwTallyCntMPA ioaddr + 0x7c via-rhine.c 　
2527
 wTallyCntCRCwTallyCntCRC ioaddr + 0x7d via-rhine.c 　
2528
 bySTICKHWbySTICKHW ioaddr + 0x83 via-rhine.c 　
2529
 byWOLcrClrbyWOLcrClr ioaddr + 0xA4 via-rhine.c 　
2530
 byWOLcgClrbyWOLcgClr ioaddr + 0xA7 via-rhine.c 　
2531
 byPwrcsrClrbyPwrcsrClr ioaddr + 0xAC via-rhine.c 　
2532
 RCR_RRFT2RCR_RRFT2 0x80 via-rhine.c 　
2533
 RCR_RRFT1RCR_RRFT1 0x40 via-rhine.c 　
2534
 RCR_RRFT0RCR_RRFT0 0x20 via-rhine.c 　
2535
 RCR_PROMRCR_PROM 0x10 via-rhine.c 　
2536
 RCR_ABRCR_AB 0x08 via-rhine.c 　
2537
 RCR_AMRCR_AM 0x04 via-rhine.c 　
2538
 RCR_ARRCR_AR 0x02 via-rhine.c 　
2539
 RCR_SEPRCR_SEP 0x01 via-rhine.c 　
2540
 TCR_RTSFTCR_RTSF 0x80 via-rhine.c 　
2541
 TCR_RTFT1TCR_RTFT1 0x40 via-rhine.c 　
2542
 TCR_RTFT0TCR_RTFT0 0x20 via-rhine.c 　
2543
 TCR_OFSETTCR_OFSET 0x08 via-rhine.c 　
2544
 TCR_LB1TCR_LB1 0x04 via-rhine.c loopback[1]
2545
 TCR_LB0TCR_LB0 0x02 via-rhine.c loopback[0]
2546
 CR0_RDMDCR0_RDMD 0x40 via-rhine.c rx descriptor polling demand
2547
 CR0_TDMDCR0_TDMD 0x20 via-rhine.c tx descriptor polling demand
2548
 CR0_TXONCR0_TXON 0x10 via-rhine.c 　
2549
 CR0_RXONCR0_RXON 0x08 via-rhine.c 　
2550
 CR0_STOPCR0_STOP 0x04 via-rhine.c stop NIC, default = 1
2551
 CR0_STRTCR0_STRT 0x02 via-rhine.c start NIC
2552
 CR0_INITCR0_INIT 0x01 via-rhine.c start init process
2553
 CR1_SFRSTCR1_SFRST 0x80 via-rhine.c software reset
2554
 CR1_RDMD1CR1_RDMD1 0x40 via-rhine.c RDMD1
2555
 CR1_TDMD1CR1_TDMD1 0x20 via-rhine.c TDMD1
2556
 CR1_KEYPAGCR1_KEYPAG 0x10 via-rhine.c turn on par/key
2557
 CR1_DPOLLCR1_DPOLL 0x08 via-rhine.c disable rx/tx auto polling
2558
 CR1_FDXCR1_FDX 0x04 via-rhine.c full duplex mode
2559
 CR1_ETENCR1_ETEN 0x02 via-rhine.c early tx mode
2560
 CR1_ERENCR1_EREN 0x01 via-rhine.c early rx mode
2561
 CR_RDMDCR_RDMD 0x0040 via-rhine.c rx descriptor polling demand
2562
 CR_TDMDCR_TDMD 0x0020 via-rhine.c tx descriptor polling demand
2563
 CR_TXONCR_TXON 0x0010 via-rhine.c 　
2564
 CR_RXONCR_RXON 0x0008 via-rhine.c 　
2565
 CR_STOPCR_STOP 0x0004 via-rhine.c stop NIC, default = 1
2566
 CR_STRTCR_STRT 0x0002 via-rhine.c start NIC
2567
 CR_INITCR_INIT 0x0001 via-rhine.c start init process
2568
 CR_SFRSTCR_SFRST 0x8000 via-rhine.c software reset
2569
 CR_RDMD1CR_RDMD1 0x4000 via-rhine.c RDMD1
2570
 CR_TDMD1CR_TDMD1 0x2000 via-rhine.c TDMD1
2571
 CR_KEYPAGCR_KEYPAG 0x1000 via-rhine.c turn on par/key
2572
 CR_DPOLLCR_DPOLL 0x0800 via-rhine.c disable rx/tx auto polling
2573
 CR_FDXCR_FDX 0x0400 via-rhine.c full duplex mode
2574
 CR_ETENCR_ETEN 0x0200 via-rhine.c early tx mode
2575
 CR_ERENCR_EREN 0x0100 via-rhine.c early rx mode
2576
 IMR0_CNTMIMR0_CNTM 0x80 via-rhine.c 　
2577
 IMR0_BEMIMR0_BEM 0x40 via-rhine.c 　
2578
 IMR0_RUMIMR0_RUM 0x20 via-rhine.c 　
2579
 IMR0_TUMIMR0_TUM 0x10 via-rhine.c 　
2580
 IMR0_TXEMIMR0_TXEM 0x08 via-rhine.c 　
2581
 IMR0_RXEMIMR0_RXEM 0x04 via-rhine.c 　
2582
 IMR0_PTXMIMR0_PTXM 0x02 via-rhine.c 　
2583
 IMR0_PRXMIMR0_PRXM 0x01 via-rhine.c 　
2584
 IMRShadowIMRShadow 0x5AFF via-rhine.c 　
2585
 IMR1_INITMIMR1_INITM 0x80 via-rhine.c 　
2586
 IMR1_SRCMIMR1_SRCM 0x40 via-rhine.c 　
2587
 IMR1_NBFMIMR1_NBFM 0x10 via-rhine.c 　
2588
 IMR1_PRAIMIMR1_PRAIM 0x08 via-rhine.c 　
2589
 IMR1_RES0MIMR1_RES0M 0x04 via-rhine.c 　
2590
 IMR1_ETMIMR1_ETM 0x02 via-rhine.c 　
2591
 IMR1_ERMIMR1_ERM 0x01 via-rhine.c 　
2592
 ISR_INITIISR_INITI 0x8000 via-rhine.c 　
2593
 ISR_SRCIISR_SRCI 0x4000 via-rhine.c 　
2594
 ISR_ABTIISR_ABTI 0x2000 via-rhine.c 　
2595
 ISR_NORBFISR_NORBF 0x1000 via-rhine.c 　
2596
 ISR_PKTRAISR_PKTRA 0x0800 via-rhine.c 　
2597
 ISR_RES0ISR_RES0 0x0400 via-rhine.c 　
2598
 ISR_ETIISR_ETI 0x0200 via-rhine.c 　
2599
 ISR_ERIISR_ERI 0x0100 via-rhine.c 　
2600
 ISR_CNTISR_CNT 0x0080 via-rhine.c 　
2601
 ISR_BEISR_BE 0x0040 via-rhine.c 　
2602
 ISR_RUISR_RU 0x0020 via-rhine.c 　
2603
 ISR_TUISR_TU 0x0010 via-rhine.c 　
2604
 ISR_TXEISR_TXE 0x0008 via-rhine.c 　
2605
 ISR_RXEISR_RXE 0x0004 via-rhine.c 　
2606
 ISR_PTXISR_PTX 0x0002 via-rhine.c 　
2607
 ISR_PRXISR_PRX 0x0001 via-rhine.c 　
2608
 ISR0_CNTISR0_CNT 0x80 via-rhine.c 　
2609
 ISR0_BEISR0_BE 0x40 via-rhine.c 　
2610
 ISR0_RUISR0_RU 0x20 via-rhine.c 　
2611
 ISR0_TUISR0_TU 0x10 via-rhine.c 　
2612
 ISR0_TXEISR0_TXE 0x08 via-rhine.c 　
2613
 ISR0_RXEISR0_RXE 0x04 via-rhine.c 　
2614
 ISR0_PTXISR0_PTX 0x02 via-rhine.c 　
2615
 ISR0_PRXISR0_PRX 0x01 via-rhine.c 　
2616
 ISR1_INITIISR1_INITI 0x80 via-rhine.c 　
2617
 ISR1_SRCIISR1_SRCI 0x40 via-rhine.c 　
2618
 ISR1_NORBFISR1_NORBF 0x10 via-rhine.c 　
2619
 ISR1_PKTRAISR1_PKTRA 0x08 via-rhine.c 　
2620
 ISR1_ETIISR1_ETI 0x02 via-rhine.c 　
2621
 ISR1_ERIISR1_ERI 0x01 via-rhine.c 　
2622
 ISR_ABNORMALISR_ABNORMAL ISR_BE+ISR_RU+ISR_TU+ISR_CNT+ISR_NORBF+ISR_PKTRA via-rhine.c 　
2623
 MIISR_MIIERRMIISR_MIIERR 0x08 via-rhine.c 　
2624
 MIISR_MRERRMIISR_MRERR 0x04 via-rhine.c 　
2625
 MIISR_LNKFLMIISR_LNKFL 0x02 via-rhine.c 　
2626
 MIISR_SPEEDMIISR_SPEED 0x01 via-rhine.c 　
2627
 MIICR_MAUTOMIICR_MAUTO 0x80 via-rhine.c 　
2628
 MIICR_RCMDMIICR_RCMD 0x40 via-rhine.c 　
2629
 MIICR_WCMDMIICR_WCMD 0x20 via-rhine.c 　
2630
 MIICR_MDPMMIICR_MDPM 0x10 via-rhine.c 　
2631
 MIICR_MOUTMIICR_MOUT 0x08 via-rhine.c 　
2632
 MIICR_MDOMIICR_MDO 0x04 via-rhine.c 　
2633
 MIICR_MDIMIICR_MDI 0x02 via-rhine.c 　
2634
 MIICR_MDCMIICR_MDC 0x01 via-rhine.c 　
2635
 EECSR_EEPREECSR_EEPR 0x80 via-rhine.c eeprom programed status, 73h means programed
2636
 EECSR_EMBPEECSR_EMBP 0x40 via-rhine.c eeprom embeded programming
2637
 EECSR_AUTOLDEECSR_AUTOLD 0x20 via-rhine.c eeprom content reload
2638
 EECSR_DPMEECSR_DPM 0x10 via-rhine.c eeprom direct programming
2639
 EECSR_CSEECSR_CS 0x08 via-rhine.c eeprom CS pin
2640
 EECSR_SKEECSR_SK 0x04 via-rhine.c eeprom SK pin
2641
 EECSR_DIEECSR_DI 0x02 via-rhine.c eeprom DI pin
2642
 EECSR_DOEECSR_DO 0x01 via-rhine.c eeprom DO pin
2643
 BCR0_CRFT2BCR0_CRFT2 0x20 via-rhine.c 　
2644
 BCR0_CRFT1BCR0_CRFT1 0x10 via-rhine.c 　
2645
 BCR0_CRFT0BCR0_CRFT0 0x08 via-rhine.c 　
2646
 BCR0_DMAL2BCR0_DMAL2 0x04 via-rhine.c 　
2647
 BCR0_DMAL1BCR0_DMAL1 0x02 via-rhine.c 　
2648
 BCR0_DMAL0BCR0_DMAL0 0x01 via-rhine.c 　
2649
 BCR1_CTSFBCR1_CTSF 0x20 via-rhine.c 　
2650
 BCR1_CTFT1BCR1_CTFT1 0x10 via-rhine.c 　
2651
 BCR1_CTFT0BCR1_CTFT0 0x08 via-rhine.c 　
2652
 BCR1_POT2BCR1_POT2 0x04 via-rhine.c 　
2653
 BCR1_POT1BCR1_POT1 0x02 via-rhine.c 　
2654
 BCR1_POT0BCR1_POT0 0x01 via-rhine.c 　
2655
 CFGA_EELOADCFGA_EELOAD 0x80 via-rhine.c enable eeprom embeded and direct programming
2656
 CFGA_JUMPERCFGA_JUMPER 0x40 via-rhine.c 　
2657
 CFGA_MTGPIOCFGA_MTGPIO 0x08 via-rhine.c 　
2658
 CFGA_T10ENCFGA_T10EN 0x02 via-rhine.c 　
2659
 CFGA_AUTOCFGA_AUTO 0x01 via-rhine.c 　
2660
 CFGB_PDCFGB_PD 0x80 via-rhine.c 　
2661
 CFGB_POLENCFGB_POLEN 0x02 via-rhine.c 　
2662
 CFGB_LNKENCFGB_LNKEN 0x01 via-rhine.c 　
2663
 CFGC_M10TIOCFGC_M10TIO 0x80 via-rhine.c 　
2664
 CFGC_M10POLCFGC_M10POL 0x40 via-rhine.c 　
2665
 CFGC_PHY1CFGC_PHY1 0x20 via-rhine.c 　
2666
 CFGC_PHY0CFGC_PHY0 0x10 via-rhine.c 　
2667
 CFGC_BTSELCFGC_BTSEL 0x08 via-rhine.c 　
2668
 CFGC_BPS2CFGC_BPS2 0x04 via-rhine.c bootrom select[2]
2669
 CFGC_BPS1CFGC_BPS1 0x02 via-rhine.c bootrom select[1]
2670
 CFGC_BPS0CFGC_BPS0 0x01 via-rhine.c bootrom select[0]
2671
 CFGD_GPIOENCFGD_GPIOEN 0x80 via-rhine.c 　
2672
 CFGD_DIAGCFGD_DIAG 0x40 via-rhine.c 　
2673
 CFGD_MAGICCFGD_MAGIC 0x10 via-rhine.c 　
2674
 CFGD_RANDOMCFGD_RANDOM 0x08 via-rhine.c 　
2675
 CFGD_CFDXCFGD_CFDX 0x04 via-rhine.c 　
2676
 CFGD_CERENCFGD_CEREN 0x02 via-rhine.c 　
2677
 CFGD_CETENCFGD_CETEN 0x01 via-rhine.c 　
2678
 RSR_RERRRSR_RERR 0x00000001 via-rhine.c 　
2679
 RSR_CRCRSR_CRC 0x00000002 via-rhine.c 　
2680
 RSR_FAERSR_FAE 0x00000004 via-rhine.c 　
2681
 RSR_FOVRSR_FOV 0x00000008 via-rhine.c 　
2682
 RSR_LONGRSR_LONG 0x00000010 via-rhine.c 　
2683
 RSR_RUNTRSR_RUNT 0x00000020 via-rhine.c 　
2684
 RSR_SERRRSR_SERR 0x00000040 via-rhine.c 　
2685
 RSR_BUFFRSR_BUFF 0x00000080 via-rhine.c 　
2686
 RSR_EDPRSR_EDP 0x00000100 via-rhine.c 　
2687
 RSR_STPRSR_STP 0x00000200 via-rhine.c 　
2688
 RSR_CHNRSR_CHN 0x00000400 via-rhine.c 　
2689
 RSR_PHYRSR_PHY 0x00000800 via-rhine.c 　
2690
 RSR_BARRSR_BAR 0x00001000 via-rhine.c 　
2691
 RSR_MARRSR_MAR 0x00002000 via-rhine.c 　
2692
 RSR_RXOKRSR_RXOK 0x00008000 via-rhine.c 　
2693
 RSR_ABNORMALRSR_ABNORMAL RSR_RERR+RSR_LONG+RSR_RUNT via-rhine.c 　
2694
 TSR_NCR0TSR_NCR0 0x00000001 via-rhine.c 　
2695
 TSR_NCR1TSR_NCR1 0x00000002 via-rhine.c 　
2696
 TSR_NCR2TSR_NCR2 0x00000004 via-rhine.c 　
2697
 TSR_NCR3TSR_NCR3 0x00000008 via-rhine.c 　
2698
 TSR_COLSTSR_COLS 0x00000010 via-rhine.c 　
2699
 TSR_CDHTSR_CDH 0x00000080 via-rhine.c 　
2700
 TSR_ABTTSR_ABT 0x00000100 via-rhine.c 　
2701
 TSR_OWCTSR_OWC 0x00000200 via-rhine.c 　
2702
 TSR_CRSTSR_CRS 0x00000400 via-rhine.c 　
2703
 TSR_UDFTSR_UDF 0x00000800 via-rhine.c 　
2704
 TSR_TBUFFTSR_TBUFF 0x00001000 via-rhine.c 　
2705
 TSR_SERRTSR_SERR 0x00002000 via-rhine.c 　
2706
 TSR_JABTSR_JAB 0x00004000 via-rhine.c 　
2707
 TSR_TERRTSR_TERR 0x00008000 via-rhine.c 　
2708
 TSR_ABNORMALTSR_ABNORMAL TSR_TERR+TSR_OWC+TSR_ABT+TSR_JAB+TSR_CRS via-rhine.c 　
2709
 TSR_OWN_BITTSR_OWN_BIT 0x80000000 via-rhine.c 　
2710
 CB_DELAY_LOOP_WAITCB_DELAY_LOOP_WAIT 10 via-rhine.c 10ms
2711
 W_IMR_MASK_VALUEW_IMR_MASK_VALUE 0x1BFF via-rhine.c initial value of IMR
2712
 PKT_TYPE_DIRECTEDPKT_TYPE_DIRECTED 0x0001 via-rhine.c obsolete, directed address is always accepted
2713
 PKT_TYPE_MULTICASTPKT_TYPE_MULTICAST 0x0002 via-rhine.c 　
2714
 PKT_TYPE_ALL_MULTICASTPKT_TYPE_ALL_MULTICAST 0x0004 via-rhine.c 　
2715
 PKT_TYPE_BROADCASTPKT_TYPE_BROADCAST 0x0008 via-rhine.c 　
2716
 PKT_TYPE_PROMISCUOUSPKT_TYPE_PROMISCUOUS 0x0020 via-rhine.c 　
2717
 PKT_TYPE_LONGPKT_TYPE_LONG 0x2000 via-rhine.c 　
2718
 PKT_TYPE_RUNTPKT_TYPE_RUNT 0x4000 via-rhine.c 　
2719
 PKT_TYPE_ERRORPKT_TYPE_ERROR 0x8000 via-rhine.c accept error packets, e.g. CRC error
2720
 NIC_LB_NONENIC_LB_NONE 0x00 via-rhine.c 　
2721
 NIC_LB_INTERNALNIC_LB_INTERNAL 0x01 via-rhine.c 　
2722
 NIC_LB_PHYNIC_LB_PHY 0x02 via-rhine.c MII or Internal-10BaseT loopback
2723
 TX_RING_SIZETX_RING_SIZE 2 via-rhine.c 　
2724
 RX_RING_SIZERX_RING_SIZE 2 via-rhine.c 　
2725
 PKT_BUF_SZPKT_BUF_SZ 1536 via-rhine.c Size of each temporary Rx buffer.
2726
 PCI_REG_MODE3PCI_REG_MODE3 0x53 via-rhine.c 　
2727
 MODE3_MIIONMODE3_MIION 0x04 via-rhine.c in PCI_REG_MOD3 OF PCI space
2728
 rhine_TOTAL_SIZErhine_TOTAL_SIZE 0x80 via-rhine.c 　
2729
 NUM_TX_DESCNUM_TX_DESC 2 via-rhine.c Number of Tx descriptor registers.
2730
 DEFAULT_INTRDEFAULT_INTR (IntrRxDone | IntrRxErr | IntrRxEmpty| IntrRxOverflow | \ IntrRxDropped | IntrRxNoBuf) via-rhine.c 　
2731
 IOSYNCIOSYNC do { inb(nic->ioaddr + StationAddr); } while (0) via-rhine.c 　
2732
 PCI_D0PCI_D0 ((int) 0) via-velocity.c 　
2733
 PCI_D1PCI_D1 ((int) 1) via-velocity.c 　
2734
 PCI_D2PCI_D2 ((int) 2) via-velocity.c 　
2735
 PCI_D3hotPCI_D3hot ((int) 3) via-velocity.c 　
2736
 PCI_D3coldPCI_D3cold ((int) 4) via-velocity.c 　
2737
 PCI_POWER_ERRORPCI_POWER_ERROR ((int) -1) via-velocity.c 　
2738
 VLAN_ID_MINVLAN_ID_MIN 0 via-velocity.c 　
2739
 VLAN_ID_MAXVLAN_ID_MAX 4095 via-velocity.c 　
2740
 VLAN_ID_DEFVLAN_ID_DEF 0 via-velocity.c 　
2741
 RX_THRESH_MINRX_THRESH_MIN 0 via-velocity.c 　
2742
 RX_THRESH_MAXRX_THRESH_MAX 3 via-velocity.c 　
2743
 RX_THRESH_DEFRX_THRESH_DEF 0 via-velocity.c 　
2744
 DMA_LENGTH_MINDMA_LENGTH_MIN 0 via-velocity.c 　
2745
 DMA_LENGTH_MAXDMA_LENGTH_MAX 7 via-velocity.c 　
2746
 DMA_LENGTH_DEFDMA_LENGTH_DEF 0 via-velocity.c 　
2747
 TAGGING_DEFTAGGING_DEF 0 via-velocity.c 　
2748
 IP_ALIG_DEFIP_ALIG_DEF 0 via-velocity.c 　
2749
 TX_CSUM_DEFTX_CSUM_DEF 1 via-velocity.c 　
2750
 FLOW_CNTL_DEFFLOW_CNTL_DEF 1 via-velocity.c 　
2751
 FLOW_CNTL_MINFLOW_CNTL_MIN 1 via-velocity.c 　
2752
 FLOW_CNTL_MAXFLOW_CNTL_MAX 5 via-velocity.c 　
2753
 MED_LNK_DEFMED_LNK_DEF 0 via-velocity.c 　
2754
 MED_LNK_MINMED_LNK_MIN 0 via-velocity.c 　
2755
 MED_LNK_MAXMED_LNK_MAX 4 via-velocity.c 　
2756
 VAL_PKT_LEN_DEFVAL_PKT_LEN_DEF 0 via-velocity.c 　
2757
 WOL_OPT_DEFWOL_OPT_DEF 0 via-velocity.c 　
2758
 WOL_OPT_MINWOL_OPT_MIN 0 via-velocity.c 　
2759
 WOL_OPT_MAXWOL_OPT_MAX 7 via-velocity.c 　
2760
 INT_WORKS_DEFINT_WORKS_DEF 20 via-velocity.c 　
2761
 INT_WORKS_MININT_WORKS_MIN 10 via-velocity.c 　
2762
 INT_WORKS_MAXINT_WORKS_MAX 64 via-velocity.c 　
2763
 TX_TIMEOUTTX_TIMEOUT (1000); via-velocity.c 　
2764
 IORESOURCE_IOIORESOURCE_IO 0x00000100 via-velocity.c Resource type
2765
 IORESOURCE_PREFETCHIORESOURCE_PREFETCH 0x00001000 via-velocity.c No side effects
2766
 IORESOURCE_MEMIORESOURCE_MEM 0x00000200 via-velocity.c 　
2767
 BAR_0BAR_0 0 via-velocity.c 　
2768
 BAR_1BAR_1 1 via-velocity.c 　
2769
 BAR_5BAR_5 5 via-velocity.c 　
2770
 PCI_BASE_ADDRESS_SPACEPCI_BASE_ADDRESS_SPACE 0x01 via-velocity.c 0 = memory, 1 = I/O
2771
 PCI_BASE_ADDRESS_SPACE_IOPCI_BASE_ADDRESS_SPACE_IO 0x01 via-velocity.c 　
2772
 PCI_BASE_ADDRESS_SPACE_MEMORYPCI_BASE_ADDRESS_SPACE_MEMORY 0x00 via-velocity.c 　
2773
 PCI_BASE_ADDRESS_MEM_TYPE_MASKPCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06 via-velocity.c 　
2774
 PCI_BASE_ADDRESS_MEM_TYPE_32PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 via-velocity.c 32 bit address
2775
 PCI_BASE_ADDRESS_MEM_TYPE_1MPCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 via-velocity.c Below 1M [obsolete]
2776
 PCI_BASE_ADDRESS_MEM_TYPE_64PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 via-velocity.c 64 bit address
2777
 PCI_BASE_ADDRESS_MEM_PREFETCHPCI_BASE_ADDRESS_MEM_PREFETCH 0x08 via-velocity.c prefetchable?
2778
 PCI_REG_COMMANDPCI_REG_COMMAND 0x04 via-velocity.c 　
2779
 PCI_REG_MODE0PCI_REG_MODE0 0x60 via-velocity.c 　
2780
 PCI_REG_MODE1PCI_REG_MODE1 0x61 via-velocity.c 　
2781
 PCI_REG_MODE2PCI_REG_MODE2 0x62 via-velocity.c 　
2782
 PCI_REG_MODE3PCI_REG_MODE3 0x63 via-velocity.c 　
2783
 PCI_REG_DELAY_TIMERPCI_REG_DELAY_TIMER 0x64 via-velocity.c 　
2784
 MODE2_PCEROPTMODE2_PCEROPT 0x80 via-velocity.c take PCI bus ERror as a fatal and shutdown from software control
2785
 MODE2_TXQ16MODE2_TXQ16 0x40 via-velocity.c TX write-back Queue control. 0->32 entries available in Tx write-back queue, 1->16 entries
2786
 MODE2_TXPOSTMODE2_TXPOST 0x08 via-velocity.c (Not support in VT3119)
2787
 MODE2_AUTOOPTMODE2_AUTOOPT 0x04 via-velocity.c (VT3119 GHCI without such behavior)
2788
 MODE2_MODE10TMODE2_MODE10T 0x02 via-velocity.c used to control tx Threshold for 10M case
2789
 MODE2_TCPLSOPTMODE2_TCPLSOPT 0x01 via-velocity.c TCP large send field update disable, hardware will not update related fields, leave it to software.
2790
 MODE3_MIIONMODE3_MIION 0x04 via-velocity.c MII symbol codine error detect enable ??
2791
 COMMAND_BUSMCOMMAND_BUSM 0x04 via-velocity.c 　
2792
 COMMAND_WAITCOMMAND_WAIT 0x80 via-velocity.c 　
2793
 RX_BUF_NBRX_BUF_NB 6 virtio-net.c 　
2794
 TX_RING_SIZETX_RING_SIZE 2 w89c840.c 　
2795
 RX_RING_SIZERX_RING_SIZE 2 w89c840.c 　
2796
 TX_FIFO_SIZETX_FIFO_SIZE (2048) w89c840.c 　
2797
 TX_BUG_FIFO_LIMITTX_BUG_FIFO_LIMIT (TX_FIFO_SIZE-1514-16) w89c840.c 　
2798
 TX_TIMEOUTTX_TIMEOUT (10*1000) w89c840.c 　
2799
 PKT_BUF_SZPKT_BUF_SZ 1536 w89c840.c Size of each temporary Rx buffer.
2800
 W840_FLAGSW840_FLAGS (PCI_USES_IO | PCI_ADDR0 | PCI_USES_MASTER) w89c840.c 　
2801
 W840_FLAGSW840_FLAGS (PCI_USES_MEM | PCI_ADDR1 | PCI_USES_MASTER) w89c840.c 　
2802
 readbreadb inb w89c840.c 　
2803
 readwreadw inw w89c840.c 　
2804
 readlreadl inl w89c840.c 　
2805
 writebwriteb outb w89c840.c 　
2806
 writewwritew outw w89c840.c 　
2807
 writelwritel outl w89c840.c 　
2808
 PRIV_ALIGNPRIV_ALIGN 15 w89c840.c Required alignment mask
2809
 PRIV_ALIGN_BYTESPRIV_ALIGN_BYTES 32 w89c840.c 　
2810
 MDIO_WRITE0MDIO_WRITE0 (MDIO_EnbOutput) w89c840.c 　
2811
 MDIO_WRITE1MDIO_WRITE1 (MDIO_DataOut | MDIO_EnbOutput) w89c840.c 　
2812
 WD_DEFAULT_MEMWD_DEFAULT_MEM 0xCC000 wd.c 　
2813
 TX_INIT_RATETX_INIT_RATE 16 3c509.h 　
2814
 TX_INIT_MAX_RATETX_INIT_MAX_RATE 64 3c509.h 　
2815
 RX_INIT_LATENCYRX_INIT_LATENCY 64 3c509.h 　
2816
 RX_INIT_EARLY_THRESHRX_INIT_EARLY_THRESH 64 3c509.h 　
2817
 MIN_RX_EARLY_THRESHFMIN_RX_EARLY_THRESHF 16 3c509.h not less than ether_header
2818
 MIN_RX_EARLY_THRESHLMIN_RX_EARLY_THRESHL 4 3c509.h 　
2819
 EEPROMSIZEEEPROMSIZE 0x40 3c509.h 　
2820
 MAX_EEPROMBUSYMAX_EEPROMBUSY 1000 3c509.h 　
2821
 EP_ID_PORT_STARTEP_ID_PORT_START 0x110 3c509.h avoid 0x100 to avoid conflict with SB16
2822
 EP_ID_PORT_INCEP_ID_PORT_INC 0x10 3c509.h 　
2823
 EP_ID_PORT_ENDEP_ID_PORT_END 0x200 3c509.h 　
2824
 EP_TAG_MAXEP_TAG_MAX 0x7 3c509.h must be 2^n - 1
2825
 EEPROM_CMD_RDEEPROM_CMD_RD 0x0080 3c509.h Read: Address required (5 bits)
2826
 EEPROM_CMD_WREEPROM_CMD_WR 0x0040 3c509.h Write: Address required (5 bits)
2827
 EEPROM_CMD_ERASEEEPROM_CMD_ERASE 0x00c0 3c509.h Erase: Address required (5 bits)
2828
 EEPROM_CMD_EWENEEPROM_CMD_EWEN 0x0030 3c509.h Erase/Write Enable: No data required
2829
 EEPROM_BUSYEEPROM_BUSY (1<<15) 3c509.h 　
2830
 EEPROM_TST_MODEEEPROM_TST_MODE (1<<14) 3c509.h 　
2831
 EEPROM_NODE_ADDR_0EEPROM_NODE_ADDR_0 0x0 3c509.h Word
2832
 EEPROM_NODE_ADDR_1EEPROM_NODE_ADDR_1 0x1 3c509.h Word
2833
 EEPROM_NODE_ADDR_2EEPROM_NODE_ADDR_2 0x2 3c509.h Word
2834
 EEPROM_PROD_IDEEPROM_PROD_ID 0x3 3c509.h 0x9[0-f]50
2835
 EEPROM_MFG_IDEEPROM_MFG_ID 0x7 3c509.h 0x6d50
2836
 EEPROM_ADDR_CFGEEPROM_ADDR_CFG 0x8 3c509.h Base addr
2837
 EEPROM_RESOURCE_CFGEEPROM_RESOURCE_CFG 0x9 3c509.h IRQ. Bits 12-15
2838
 EP_COMMANDEP_COMMAND 0x0e 3c509.h Write. BASE+0x0e is always a
2839
 EP_STATUSEP_STATUS 0x0e 3c509.h Read. BASE+0x0e is always status
2840
 EP_WINDOWEP_WINDOW 0x0f 3c509.h Read. BASE+0x0f is always window
2841
 EP_W0_EEPROM_DATAEP_W0_EEPROM_DATA 0x0c 3c509.h 　
2842
 EP_W0_EEPROM_COMMANDEP_W0_EEPROM_COMMAND 0x0a 3c509.h 　
2843
 EP_W0_RESOURCE_CFGEP_W0_RESOURCE_CFG 0x08 3c509.h 　
2844
 EP_W0_ADDRESS_CFGEP_W0_ADDRESS_CFG 0x06 3c509.h 　
2845
 EP_W0_CONFIG_CTRLEP_W0_CONFIG_CTRL 0x04 3c509.h 　
2846
 EP_W0_PRODUCT_IDEP_W0_PRODUCT_ID 0x02 3c509.h 　
2847
 EP_W0_MFG_IDEP_W0_MFG_ID 0x00 3c509.h 　
2848
 EP_W1_TX_PIO_WR_2EP_W1_TX_PIO_WR_2 0x02 3c509.h 　
2849
 EP_W1_TX_PIO_WR_1EP_W1_TX_PIO_WR_1 0x00 3c509.h 　
2850
 EP_W1_FREE_TXEP_W1_FREE_TX 0x0c 3c509.h 　
2851
 EP_W1_TX_STATUSEP_W1_TX_STATUS 0x0b 3c509.h byte
2852
 EP_W1_TIMEREP_W1_TIMER 0x0a 3c509.h byte
2853
 EP_W1_RX_STATUSEP_W1_RX_STATUS 0x08 3c509.h 　
2854
 EP_W1_RX_PIO_RD_2EP_W1_RX_PIO_RD_2 0x02 3c509.h 　
2855
 EP_W1_RX_PIO_RD_1EP_W1_RX_PIO_RD_1 0x00 3c509.h 　
2856
 EP_W2_ADDR_5EP_W2_ADDR_5 0x05 3c509.h 　
2857
 EP_W2_ADDR_4EP_W2_ADDR_4 0x04 3c509.h 　
2858
 EP_W2_ADDR_3EP_W2_ADDR_3 0x03 3c509.h 　
2859
 EP_W2_ADDR_2EP_W2_ADDR_2 0x02 3c509.h 　
2860
 EP_W2_ADDR_1EP_W2_ADDR_1 0x01 3c509.h 　
2861
 EP_W2_ADDR_0EP_W2_ADDR_0 0x00 3c509.h 　
2862
 EP_W3_FREE_TXEP_W3_FREE_TX 0x0c 3c509.h 　
2863
 EP_W3_FREE_RXEP_W3_FREE_RX 0x0a 3c509.h 　
2864
 EP_W4_MEDIA_TYPEEP_W4_MEDIA_TYPE 0x0a 3c509.h 　
2865
 EP_W4_CTRLR_STATUSEP_W4_CTRLR_STATUS 0x08 3c509.h 　
2866
 EP_W4_NET_DIAGEP_W4_NET_DIAG 0x06 3c509.h 　
2867
 EP_W4_FIFO_DIAGEP_W4_FIFO_DIAG 0x04 3c509.h 　
2868
 EP_W4_HOST_DIAGEP_W4_HOST_DIAG 0x02 3c509.h 　
2869
 EP_W4_TX_DIAGEP_W4_TX_DIAG 0x00 3c509.h 　
2870
 EP_W5_READ_0_MASKEP_W5_READ_0_MASK 0x0c 3c509.h 　
2871
 EP_W5_INTR_MASKEP_W5_INTR_MASK 0x0a 3c509.h 　
2872
 EP_W5_RX_FILTEREP_W5_RX_FILTER 0x08 3c509.h 　
2873
 EP_W5_RX_EARLY_THRESHEP_W5_RX_EARLY_THRESH 0x06 3c509.h 　
2874
 EP_W5_TX_AVAIL_THRESHEP_W5_TX_AVAIL_THRESH 0x02 3c509.h 　
2875
 EP_W5_TX_START_THRESHEP_W5_TX_START_THRESH 0x00 3c509.h 　
2876
 TX_TOTAL_OKTX_TOTAL_OK 0x0c 3c509.h 　
2877
 RX_TOTAL_OKRX_TOTAL_OK 0x0a 3c509.h 　
2878
 TX_DEFERRALSTX_DEFERRALS 0x08 3c509.h 　
2879
 RX_FRAMES_OKRX_FRAMES_OK 0x07 3c509.h 　
2880
 TX_FRAMES_OKTX_FRAMES_OK 0x06 3c509.h 　
2881
 RX_OVERRUNSRX_OVERRUNS 0x05 3c509.h 　
2882
 TX_COLLISIONSTX_COLLISIONS 0x04 3c509.h 　
2883
 TX_AFTER_1_COLLISIONTX_AFTER_1_COLLISION 0x03 3c509.h 　
2884
 TX_AFTER_X_COLLISIONSTX_AFTER_X_COLLISIONS 0x02 3c509.h 　
2885
 TX_NO_SQETX_NO_SQE 0x01 3c509.h 　
2886
 TX_CD_LOSTTX_CD_LOST 0x00 3c509.h 　
2887
 GLOBAL_RESETGLOBAL_RESET (unsigned short) 0x0000 3c509.h Wait at least 1ms
2888
 WINDOW_SELECTWINDOW_SELECT (unsigned short) (0x1<<11) 3c509.h 　
2889
 START_TRANSCEIVERSTART_TRANSCEIVER (unsigned short) (0x2<<11) 3c509.h Read ADDR_CFG reg to
2890
 RX_DISABLERX_DISABLE (unsigned short) (0x3<<11) 3c509.h state disabled on
2891
 RX_ENABLERX_ENABLE (unsigned short) (0x4<<11) 3c509.h 　
2892
 RX_RESETRX_RESET (unsigned short) (0x5<<11) 3c509.h 　
2893
 RX_DISCARD_TOP_PACKRX_DISCARD_TOP_PACK (unsigned short) (0x8<<11) 3c509.h 　
2894
 TX_ENABLETX_ENABLE (unsigned short) (0x9<<11) 3c509.h 　
2895
 TX_DISABLETX_DISABLE (unsigned short) (0xa<<11) 3c509.h 　
2896
 TX_RESETTX_RESET (unsigned short) (0xb<<11) 3c509.h 　
2897
 REQ_INTRREQ_INTR (unsigned short) (0xc<<11) 3c509.h 　
2898
 SET_INTR_MASKSET_INTR_MASK (unsigned short) (0xe<<11) 3c509.h 　
2899
 SET_RD_0_MASKSET_RD_0_MASK (unsigned short) (0xf<<11) 3c509.h 　
2900
 SET_RX_FILTERSET_RX_FILTER (unsigned short) (0x10<<11) 3c509.h 　
2901
 FIL_INDIVIDUALFIL_INDIVIDUAL (unsigned short) (0x1) 3c509.h 　
2902
 FIL_GROUPFIL_GROUP (unsigned short) (0x2) 3c509.h 　
2903
 FIL_BRDCSTFIL_BRDCST (unsigned short) (0x4) 3c509.h 　
2904
 FIL_ALLFIL_ALL (unsigned short) (0x8) 3c509.h 　
2905
 SET_RX_EARLY_THRESHSET_RX_EARLY_THRESH (unsigned short) (0x11<<11) 3c509.h 　
2906
 SET_TX_AVAIL_THRESHSET_TX_AVAIL_THRESH (unsigned short) (0x12<<11) 3c509.h 　
2907
 SET_TX_START_THRESHSET_TX_START_THRESH (unsigned short) (0x13<<11) 3c509.h 　
2908
 STATS_ENABLESTATS_ENABLE (unsigned short) (0x15<<11) 3c509.h 　
2909
 STATS_DISABLESTATS_DISABLE (unsigned short) (0x16<<11) 3c509.h 　
2910
 STOP_TRANSCEIVERSTOP_TRANSCEIVER (unsigned short) (0x17<<11) 3c509.h 　
2911
 ACK_INTRACK_INTR (unsigned short) (0x6800) 3c509.h 　
2912
 C_INTR_LATCHC_INTR_LATCH (unsigned short) (ACK_INTR|0x1) 3c509.h 　
2913
 C_CARD_FAILUREC_CARD_FAILURE (unsigned short) (ACK_INTR|0x2) 3c509.h 　
2914
 C_TX_COMPLETEC_TX_COMPLETE (unsigned short) (ACK_INTR|0x4) 3c509.h 　
2915
 C_TX_AVAILC_TX_AVAIL (unsigned short) (ACK_INTR|0x8) 3c509.h 　
2916
 C_RX_COMPLETEC_RX_COMPLETE (unsigned short) (ACK_INTR|0x10) 3c509.h 　
2917
 C_RX_EARLYC_RX_EARLY (unsigned short) (ACK_INTR|0x20) 3c509.h 　
2918
 C_INT_RQDC_INT_RQD (unsigned short) (ACK_INTR|0x40) 3c509.h 　
2919
 C_UPD_STATSC_UPD_STATS (unsigned short) (ACK_INTR|0x80) 3c509.h 　
2920
 S_INTR_LATCHS_INTR_LATCH (unsigned short) (0x1) 3c509.h 　
2921
 S_CARD_FAILURES_CARD_FAILURE (unsigned short) (0x2) 3c509.h 　
2922
 S_TX_COMPLETES_TX_COMPLETE (unsigned short) (0x4) 3c509.h 　
2923
 S_TX_AVAILS_TX_AVAIL (unsigned short) (0x8) 3c509.h 　
2924
 S_RX_COMPLETES_RX_COMPLETE (unsigned short) (0x10) 3c509.h 　
2925
 S_RX_EARLYS_RX_EARLY (unsigned short) (0x20) 3c509.h 　
2926
 S_INT_RQDS_INT_RQD (unsigned short) (0x40) 3c509.h 　
2927
 S_UPD_STATSS_UPD_STATS (unsigned short) (0x80) 3c509.h 　
2928
 S_5_INTSS_5_INTS (S_CARD_FAILURE|S_TX_COMPLETE|\ S_TX_AVAIL|S_RX_COMPLETE|S_RX_EARLY) 3c509.h 　
2929
 S_COMMAND_IN_PROGRESSS_COMMAND_IN_PROGRESS (unsigned short) (0x1000) 3c509.h 　
2930
 ERR_RX_INCOMPLETEERR_RX_INCOMPLETE (unsigned short) (0x1<<15) 3c509.h 　
2931
 ERR_RXERR_RX (unsigned short) (0x1<<14) 3c509.h 　
2932
 ERR_RX_OVERRUNERR_RX_OVERRUN (unsigned short) (0x8<<11) 3c509.h 　
2933
 ERR_RX_RUN_PKTERR_RX_RUN_PKT (unsigned short) (0xb<<11) 3c509.h 　
2934
 ERR_RX_ALIGNERR_RX_ALIGN (unsigned short) (0xc<<11) 3c509.h 　
2935
 ERR_RX_CRCERR_RX_CRC (unsigned short) (0xd<<11) 3c509.h 　
2936
 ERR_RX_OVERSIZEERR_RX_OVERSIZE (unsigned short) (0x9<<11) 3c509.h 　
2937
 ERR_RX_DRIBBLEERR_RX_DRIBBLE (unsigned short) (0x2<<11) 3c509.h 　
2938
 TXS_COMPLETETXS_COMPLETE 0x80 3c509.h 　
2939
 TXS_SUCCES_INTR_REQTXS_SUCCES_INTR_REQ 0x40 3c509.h 　
2940
 TXS_JABBERTXS_JABBER 0x20 3c509.h 　
2941
 TXS_UNDERRUNTXS_UNDERRUN 0x10 3c509.h 　
2942
 TXS_MAX_COLLISIONTXS_MAX_COLLISION 0x8 3c509.h 　
2943
 TXS_STATUS_OVERFLOWTXS_STATUS_OVERFLOW 0x4 3c509.h 　
2944
 IS_AUIIS_AUI (1<<13) 3c509.h 　
2945
 IS_BNCIS_BNC (1<<12) 3c509.h 　
2946
 IS_UTPIS_UTP (1<<9) 3c509.h 　
2947
 ENABLE_DRQ_IRQENABLE_DRQ_IRQ 0x0001 3c509.h 　
2948
 W0_P4_CMD_RESET_ADAPTERW0_P4_CMD_RESET_ADAPTER 0x4 3c509.h 　
2949
 W0_P4_CMD_ENABLE_ADAPTERW0_P4_CMD_ENABLE_ADAPTER 0x1 3c509.h 　
2950
 ENABLE_UTPENABLE_UTP 0xc0 3c509.h 　
2951
 DISABLE_UTPDISABLE_UTP 0x0 3c509.h 　
2952
 RX_BYTES_MASKRX_BYTES_MASK (unsigned short) (0x07ff) 3c509.h 　
2953
 RX_ERRORRX_ERROR 0x4000 3c509.h 　
2954
 RX_INCOMPLETERX_INCOMPLETE 0x8000 3c509.h 　
2955
 MFG_IDMFG_ID 0x6d50 3c509.h in EEPROM and W0 ADDR_CONFIG
2956
 PROD_IDPROD_ID 0x9150 3c509.h 　
2957
 AUIAUI 0x1 3c509.h 　
2958
 BNCBNC 0x2 3c509.h 　
2959
 UTPUTP 0x4 3c509.h 　
2960
 RX_BYTES_MASKRX_BYTES_MASK (unsigned short) (0x07ff) 3c509.h 　
2961
 TX_INIT_RATETX_INIT_RATE 16 3c595.h 　
2962
 TX_INIT_MAX_RATETX_INIT_MAX_RATE 64 3c595.h 　
2963
 RX_INIT_LATENCYRX_INIT_LATENCY 64 3c595.h 　
2964
 RX_INIT_EARLY_THRESHRX_INIT_EARLY_THRESH 64 3c595.h 　
2965
 MIN_RX_EARLY_THRESHFMIN_RX_EARLY_THRESHF 16 3c595.h not less than ether_header
2966
 MIN_RX_EARLY_THRESHLMIN_RX_EARLY_THRESHL 4 3c595.h 　
2967
 EEPROMSIZEEEPROMSIZE 0x40 3c595.h 　
2968
 MAX_EEPROMBUSYMAX_EEPROMBUSY 1000 3c595.h 　
2969
 VX_LAST_TAGVX_LAST_TAG 0xd7 3c595.h 　
2970
 VX_MAX_BOARDSVX_MAX_BOARDS 16 3c595.h 　
2971
 VX_ID_PORTVX_ID_PORT 0x100 3c595.h 　
2972
 BASEBASE (eth_nic_base) 3c595.h 　
2973
 EEPROM_CMD_RDEEPROM_CMD_RD 0x0080 3c595.h Read: Address required (5 bits)
2974
 EEPROM_CMD_WREEPROM_CMD_WR 0x0040 3c595.h Write: Address required (5 bits)
2975
 EEPROM_CMD_ERASEEEPROM_CMD_ERASE 0x00c0 3c595.h Erase: Address required (5 bits)
2976
 EEPROM_CMD_EWENEEPROM_CMD_EWEN 0x0030 3c595.h Erase/Write Enable: No data required
2977
 EEPROM_BUSYEEPROM_BUSY (1<<15) 3c595.h 　
2978
 EEPROM_NODE_ADDR_0EEPROM_NODE_ADDR_0 0x0 3c595.h Word
2979
 EEPROM_NODE_ADDR_1EEPROM_NODE_ADDR_1 0x1 3c595.h Word
2980
 EEPROM_NODE_ADDR_2EEPROM_NODE_ADDR_2 0x2 3c595.h Word
2981
 EEPROM_PROD_IDEEPROM_PROD_ID 0x3 3c595.h 0x9[0-f]50
2982
 EEPROM_MFG_IDEEPROM_MFG_ID 0x7 3c595.h 0x6d50
2983
 EEPROM_ADDR_CFGEEPROM_ADDR_CFG 0x8 3c595.h Base addr
2984
 EEPROM_RESOURCE_CFGEEPROM_RESOURCE_CFG 0x9 3c595.h IRQ. Bits 12-15
2985
 EEPROM_OEM_ADDR_0EEPROM_OEM_ADDR_0 0xa 3c595.h Word
2986
 EEPROM_OEM_ADDR_1EEPROM_OEM_ADDR_1 0xb 3c595.h Word
2987
 EEPROM_OEM_ADDR_2EEPROM_OEM_ADDR_2 0xc 3c595.h Word
2988
 EEPROM_SOFT_INFO_2EEPROM_SOFT_INFO_2 0xf 3c595.h Software information 2
2989
 NO_RX_OVN_ANOMALYNO_RX_OVN_ANOMALY (1<<5) 3c595.h 　
2990
 VX_COMMANDVX_COMMAND 0x0e 3c595.h Write. BASE+0x0e is always a
2991
 VX_STATUSVX_STATUS 0x0e 3c595.h Read. BASE+0x0e is always status
2992
 VX_WINDOWVX_WINDOW 0x0f 3c595.h Read. BASE+0x0f is always window
2993
 VX_W0_EEPROM_DATAVX_W0_EEPROM_DATA 0x0c 3c595.h 　
2994
 VX_W0_EEPROM_COMMANDVX_W0_EEPROM_COMMAND 0x0a 3c595.h 　
2995
 VX_W0_RESOURCE_CFGVX_W0_RESOURCE_CFG 0x08 3c595.h 　
2996
 VX_W0_ADDRESS_CFGVX_W0_ADDRESS_CFG 0x06 3c595.h 　
2997
 VX_W0_CONFIG_CTRLVX_W0_CONFIG_CTRL 0x04 3c595.h 　
2998
 VX_W0_PRODUCT_IDVX_W0_PRODUCT_ID 0x02 3c595.h 　
2999
 VX_W0_MFG_IDVX_W0_MFG_ID 0x00 3c595.h 　
3000
 VX_W1_TX_PIO_WR_2VX_W1_TX_PIO_WR_2 0x02 3c595.h 　
3001
 VX_W1_TX_PIO_WR_1VX_W1_TX_PIO_WR_1 0x00 3c595.h 　
3002
 VX_W1_FREE_TXVX_W1_FREE_TX 0x0c 3c595.h 　
3003
 VX_W1_TX_STATUSVX_W1_TX_STATUS 0x0b 3c595.h byte
3004
 VX_W1_TIMERVX_W1_TIMER 0x0a 3c595.h byte
3005
 VX_W1_RX_STATUSVX_W1_RX_STATUS 0x08 3c595.h 　
3006
 VX_W1_RX_PIO_RD_2VX_W1_RX_PIO_RD_2 0x02 3c595.h 　
3007
 VX_W1_RX_PIO_RD_1VX_W1_RX_PIO_RD_1 0x00 3c595.h 　
3008
 VX_W2_ADDR_5VX_W2_ADDR_5 0x05 3c595.h 　
3009
 VX_W2_ADDR_4VX_W2_ADDR_4 0x04 3c595.h 　
3010
 VX_W2_ADDR_3VX_W2_ADDR_3 0x03 3c595.h 　
3011
 VX_W2_ADDR_2VX_W2_ADDR_2 0x02 3c595.h 　
3012
 VX_W2_ADDR_1VX_W2_ADDR_1 0x01 3c595.h 　
3013
 VX_W2_ADDR_0VX_W2_ADDR_0 0x00 3c595.h 　
3014
 VX_W3_INTERNAL_CFGVX_W3_INTERNAL_CFG 0x00 3c595.h 　
3015
 VX_W3_RESET_OPTVX_W3_RESET_OPT 0x08 3c595.h 　
3016
 VX_W3_FREE_TXVX_W3_FREE_TX 0x0c 3c595.h 　
3017
 VX_W3_FREE_RXVX_W3_FREE_RX 0x0a 3c595.h 　
3018
 VX_W4_MEDIA_TYPEVX_W4_MEDIA_TYPE 0x0a 3c595.h 　
3019
 VX_W4_CTRLR_STATUSVX_W4_CTRLR_STATUS 0x08 3c595.h 　
3020
 VX_W4_NET_DIAGVX_W4_NET_DIAG 0x06 3c595.h 　
3021
 VX_W4_FIFO_DIAGVX_W4_FIFO_DIAG 0x04 3c595.h 　
3022
 VX_W4_HOST_DIAGVX_W4_HOST_DIAG 0x02 3c595.h 　
3023
 VX_W4_TX_DIAGVX_W4_TX_DIAG 0x00 3c595.h 　
3024
 VX_W5_READ_0_MASKVX_W5_READ_0_MASK 0x0c 3c595.h 　
3025
 VX_W5_INTR_MASKVX_W5_INTR_MASK 0x0a 3c595.h 　
3026
 VX_W5_RX_FILTERVX_W5_RX_FILTER 0x08 3c595.h 　
3027
 VX_W5_RX_EARLY_THRESHVX_W5_RX_EARLY_THRESH 0x06 3c595.h 　
3028
 VX_W5_TX_AVAIL_THRESHVX_W5_TX_AVAIL_THRESH 0x02 3c595.h 　
3029
 VX_W5_TX_START_THRESHVX_W5_TX_START_THRESH 0x00 3c595.h 　
3030
 TX_TOTAL_OKTX_TOTAL_OK 0x0c 3c595.h 　
3031
 RX_TOTAL_OKRX_TOTAL_OK 0x0a 3c595.h 　
3032
 TX_DEFERRALSTX_DEFERRALS 0x08 3c595.h 　
3033
 RX_FRAMES_OKRX_FRAMES_OK 0x07 3c595.h 　
3034
 TX_FRAMES_OKTX_FRAMES_OK 0x06 3c595.h 　
3035
 RX_OVERRUNSRX_OVERRUNS 0x05 3c595.h 　
3036
 TX_COLLISIONSTX_COLLISIONS 0x04 3c595.h 　
3037
 TX_AFTER_1_COLLISIONTX_AFTER_1_COLLISION 0x03 3c595.h 　
3038
 TX_AFTER_X_COLLISIONSTX_AFTER_X_COLLISIONS 0x02 3c595.h 　
3039
 TX_NO_SQETX_NO_SQE 0x01 3c595.h 　
3040
 TX_CD_LOSTTX_CD_LOST 0x00 3c595.h 　
3041
 GLOBAL_RESETGLOBAL_RESET (unsigned short) 0x0000 3c595.h Wait at least 1ms
3042
 WINDOW_SELECTWINDOW_SELECT (unsigned short) (0x1<<11) 3c595.h 　
3043
 START_TRANSCEIVERSTART_TRANSCEIVER (unsigned short) (0x2<<11) 3c595.h Read ADDR_CFG reg to
3044
 RX_DISABLERX_DISABLE (unsigned short) (0x3<<11) 3c595.h state disabled on
3045
 RX_ENABLERX_ENABLE (unsigned short) (0x4<<11) 3c595.h 　
3046
 RX_RESETRX_RESET (unsigned short) (0x5<<11) 3c595.h 　
3047
 RX_DISCARD_TOP_PACKRX_DISCARD_TOP_PACK (unsigned short) (0x8<<11) 3c595.h 　
3048
 TX_ENABLETX_ENABLE (unsigned short) (0x9<<11) 3c595.h 　
3049
 TX_DISABLETX_DISABLE (unsigned short) (0xa<<11) 3c595.h 　
3050
 TX_RESETTX_RESET (unsigned short) (0xb<<11) 3c595.h 　
3051
 REQ_INTRREQ_INTR (unsigned short) (0xc<<11) 3c595.h 　
3052
 ACK_INTRACK_INTR (unsigned short) (0x6800) 3c595.h 　
3053
 C_INTR_LATCHC_INTR_LATCH (unsigned short) (ACK_INTR|0x1) 3c595.h 　
3054
 C_CARD_FAILUREC_CARD_FAILURE (unsigned short) (ACK_INTR|0x2) 3c595.h 　
3055
 C_TX_COMPLETEC_TX_COMPLETE (unsigned short) (ACK_INTR|0x4) 3c595.h 　
3056
 C_TX_AVAILC_TX_AVAIL (unsigned short) (ACK_INTR|0x8) 3c595.h 　
3057
 C_RX_COMPLETEC_RX_COMPLETE (unsigned short) (ACK_INTR|0x10) 3c595.h 　
3058
 C_RX_EARLYC_RX_EARLY (unsigned short) (ACK_INTR|0x20) 3c595.h 　
3059
 C_INT_RQDC_INT_RQD (unsigned short) (ACK_INTR|0x40) 3c595.h 　
3060
 C_UPD_STATSC_UPD_STATS (unsigned short) (ACK_INTR|0x80) 3c595.h 　
3061
 SET_INTR_MASKSET_INTR_MASK (unsigned short) (0xe<<11) 3c595.h 　
3062
 SET_RD_0_MASKSET_RD_0_MASK (unsigned short) (0xf<<11) 3c595.h 　
3063
 SET_RX_FILTERSET_RX_FILTER (unsigned short) (0x10<<11) 3c595.h 　
3064
 FIL_INDIVIDUALFIL_INDIVIDUAL (unsigned short) (0x1) 3c595.h 　
3065
 FIL_MULTICASTFIL_MULTICAST (unsigned short) (0x02) 3c595.h 　
3066
 FIL_BRDCSTFIL_BRDCST (unsigned short) (0x04) 3c595.h 　
3067
 FIL_PROMISCFIL_PROMISC (unsigned short) (0x08) 3c595.h 　
3068
 SET_RX_EARLY_THRESHSET_RX_EARLY_THRESH (unsigned short) (0x11<<11) 3c595.h 　
3069
 SET_TX_AVAIL_THRESHSET_TX_AVAIL_THRESH (unsigned short) (0x12<<11) 3c595.h 　
3070
 SET_TX_START_THRESHSET_TX_START_THRESH (unsigned short) (0x13<<11) 3c595.h 　
3071
 STATS_ENABLESTATS_ENABLE (unsigned short) (0x15<<11) 3c595.h 　
3072
 STATS_DISABLESTATS_DISABLE (unsigned short) (0x16<<11) 3c595.h 　
3073
 STOP_TRANSCEIVERSTOP_TRANSCEIVER (unsigned short) (0x17<<11) 3c595.h 　
3074
 S_INTR_LATCHS_INTR_LATCH (unsigned short) (0x1) 3c595.h 　
3075
 S_CARD_FAILURES_CARD_FAILURE (unsigned short) (0x2) 3c595.h 　
3076
 S_TX_COMPLETES_TX_COMPLETE (unsigned short) (0x4) 3c595.h 　
3077
 S_TX_AVAILS_TX_AVAIL (unsigned short) (0x8) 3c595.h 　
3078
 S_RX_COMPLETES_RX_COMPLETE (unsigned short) (0x10) 3c595.h 　
3079
 S_RX_EARLYS_RX_EARLY (unsigned short) (0x20) 3c595.h 　
3080
 S_INT_RQDS_INT_RQD (unsigned short) (0x40) 3c595.h 　
3081
 S_UPD_STATSS_UPD_STATS (unsigned short) (0x80) 3c595.h 　
3082
 S_COMMAND_IN_PROGRESSS_COMMAND_IN_PROGRESS (unsigned short) (0x1000) 3c595.h 　
3083
 VX_BUSY_WAITVX_BUSY_WAIT while (inw(BASE + VX_STATUS) & S_COMMAND_IN_PROGRESS) 3c595.h 　
3084
 ACF_CONNECTOR_BITSACF_CONNECTOR_BITS 14 3c595.h 　
3085
 ACF_CONNECTOR_UTPACF_CONNECTOR_UTP 0 3c595.h 　
3086
 ACF_CONNECTOR_AUIACF_CONNECTOR_AUI 1 3c595.h 　
3087
 ACF_CONNECTOR_BNCACF_CONNECTOR_BNC 3 3c595.h 　
3088
 INTERNAL_CONNECTOR_BITSINTERNAL_CONNECTOR_BITS 20 3c595.h 　
3089
 INTERNAL_CONNECTOR_MASKINTERNAL_CONNECTOR_MASK 0x01700000 3c595.h 　
3090
 ERR_INCOMPLETEERR_INCOMPLETE (unsigned short) (0x8000) 3c595.h 　
3091
 ERR_RXERR_RX (unsigned short) (0x4000) 3c595.h 　
3092
 ERR_MASKERR_MASK (unsigned short) (0x7800) 3c595.h 　
3093
 ERR_OVERRUNERR_OVERRUN (unsigned short) (0x4000) 3c595.h 　
3094
 ERR_RUNTERR_RUNT (unsigned short) (0x5800) 3c595.h 　
3095
 ERR_ALIGNMENTERR_ALIGNMENT (unsigned short) (0x6000) 3c595.h 　
3096
 ERR_CRCERR_CRC (unsigned short) (0x6800) 3c595.h 　
3097
 ERR_OVERSIZEERR_OVERSIZE (unsigned short) (0x4800) 3c595.h 　
3098
 ERR_DRIBBLEERR_DRIBBLE (unsigned short) (0x1000) 3c595.h 　
3099
 TXS_COMPLETETXS_COMPLETE 0x80 3c595.h 　
3100
 TXS_INTR_REQTXS_INTR_REQ 0x40 3c595.h 　
3101
 TXS_JABBERTXS_JABBER 0x20 3c595.h 　
3102
 TXS_UNDERRUNTXS_UNDERRUN 0x10 3c595.h 　
3103
 TXS_MAX_COLLISIONTXS_MAX_COLLISION 0x8 3c595.h 　
3104
 TXS_STATUS_OVERFLOWTXS_STATUS_OVERFLOW 0x4 3c595.h 　
3105
 RS_AUIRS_AUI (1<<5) 3c595.h 　
3106
 RS_BNCRS_BNC (1<<4) 3c595.h 　
3107
 RS_UTPRS_UTP (1<<3) 3c595.h 　
3108
 RS_T4RS_T4 (1<<0) 3c595.h 　
3109
 RS_TXRS_TX (1<<1) 3c595.h 　
3110
 RS_FXRS_FX (1<<2) 3c595.h 　
3111
 RS_MIIRS_MII (1<<6) 3c595.h 　
3112
 FIFOS_RX_RECEIVINGFIFOS_RX_RECEIVING (unsigned short) 0x8000 3c595.h 　
3113
 FIFOS_RX_UNDERRUNFIFOS_RX_UNDERRUN (unsigned short) 0x2000 3c595.h 　
3114
 FIFOS_RX_STATUS_OVERRUNFIFOS_RX_STATUS_OVERRUN (unsigned short) 0x1000 3c595.h 　
3115
 FIFOS_RX_OVERRUNFIFOS_RX_OVERRUN (unsigned short) 0x0800 3c595.h 　
3116
 FIFOS_TX_OVERRUNFIFOS_TX_OVERRUN (unsigned short) 0x0400 3c595.h 　
3117
 TAG_ADAPTERTAG_ADAPTER 0xd0 3c595.h 　
3118
 ACTIVATE_ADAPTER_TO_CONFIGACTIVATE_ADAPTER_TO_CONFIG 0xff 3c595.h 　
3119
 ENABLE_DRQ_IRQENABLE_DRQ_IRQ 0x0001 3c595.h 　
3120
 MFG_IDMFG_ID 0x506d 3c595.h `TCM'
3121
 PROD_IDPROD_ID 0x5090 3c595.h 　
3122
 JABBER_GUARD_ENABLEJABBER_GUARD_ENABLE 0x40 3c595.h 　
3123
 LINKBEAT_ENABLELINKBEAT_ENABLE 0x80 3c595.h 　
3124
 ENABLE_UTPENABLE_UTP (JABBER_GUARD_ENABLE | LINKBEAT_ENABLE) 3c595.h 　
3125
 DISABLE_UTPDISABLE_UTP 0x0 3c595.h 　
3126
 RX_BYTES_MASKRX_BYTES_MASK (unsigned short) (0x07ff) 3c595.h 　
3127
 RX_ERRORRX_ERROR 0x4000 3c595.h 　
3128
 RX_INCOMPLETERX_INCOMPLETE 0x8000 3c595.h 　
3129
 TX_INDICATETX_INDICATE 1<<15 3c595.h 　
3130
 VX_IOSIZEVX_IOSIZE 0x20 3c595.h 　
3131
 VX_CONNECTORSVX_CONNECTORS 8 3c595.h 　
3132
 XCVR_MAGICXCVR_MAGIC (0x5A00) 3c90x.h 　
3133
 INT_INTERRUPTLATCHINT_INTERRUPTLATCH (1<<0) 3c90x.h 　
3134
 INT_HOSTERRORINT_HOSTERROR (1<<1) 3c90x.h 　
3135
 INT_TXCOMPLETEINT_TXCOMPLETE (1<<2) 3c90x.h 　
3136
 INT_RXCOMPLETEINT_RXCOMPLETE (1<<4) 3c90x.h 　
3137
 INT_RXEARLYINT_RXEARLY (1<<5) 3c90x.h 　
3138
 INT_INTREQUESTEDINT_INTREQUESTED (1<<6) 3c90x.h 　
3139
 INT_UPDATESTATSINT_UPDATESTATS (1<<7) 3c90x.h 　
3140
 INT_LINKEVENTINT_LINKEVENT (1<<8) 3c90x.h 　
3141
 INT_DNCOMPLETEINT_DNCOMPLETE (1<<9) 3c90x.h 　
3142
 INT_UPCOMPLETEINT_UPCOMPLETE (1<<10) 3c90x.h 　
3143
 INT_CMDINPROGRESSINT_CMDINPROGRESS (1<<12) 3c90x.h 　
3144
 INT_WINDOWNUMBERINT_WINDOWNUMBER (7<<13) 3c90x.h 　
3145
 TX_RING_SIZETX_RING_SIZE 8 3c90x.h 　
3146
 RX_RING_SIZERX_RING_SIZE 8 3c90x.h 　
3147
 TX_RING_ALIGNTX_RING_ALIGN 16 3c90x.h 　
3148
 RX_RING_ALIGNRX_RING_ALIGN 16 3c90x.h 　
3149
 RX_BUF_SIZERX_BUF_SIZE 1536 3c90x.h 　
3150
 EEPROM_TIMEOUTEEPROM_TIMEOUT 1 * 1000 * 1000 3c90x.h 　
3151
 ASF_STATASF_STAT 0x00 amd8111e.h ASF status register
3152
 CHIPIDCHIPID 0x04 amd8111e.h Chip ID regsiter
3153
 MIB_DATAMIB_DATA 0x10 amd8111e.h MIB data register
3154
 MIB_ADDRMIB_ADDR 0x14 amd8111e.h MIB address register
3155
 STAT0STAT0 0x30 amd8111e.h Status0 register
3156
 INT0INT0 0x38 amd8111e.h Interrupt0 register
3157
 INTEN0INTEN0 0x40 amd8111e.h Interrupt0 enable register
3158
 CMD0CMD0 0x48 amd8111e.h Command0 register
3159
 CMD2CMD2 0x50 amd8111e.h Command2 register
3160
 CMD3CMD3 0x54 amd8111e.h Command3 resiter
3161
 CMD7CMD7 0x64 amd8111e.h Command7 register
3162
 CTRL1CTRL1 0x6C amd8111e.h Control1 register
3163
 CTRL2CTRL2 0x70 amd8111e.h Control2 register
3164
 XMT_RING_LIMITXMT_RING_LIMIT 0x7C amd8111e.h Transmit ring limit register
3165
 AUTOPOLL0AUTOPOLL0 0x88 amd8111e.h Auto-poll0 register
3166
 AUTOPOLL1AUTOPOLL1 0x8A amd8111e.h Auto-poll1 register
3167
 AUTOPOLL2AUTOPOLL2 0x8C amd8111e.h Auto-poll2 register
3168
 AUTOPOLL3AUTOPOLL3 0x8E amd8111e.h Auto-poll3 register
3169
 AUTOPOLL4AUTOPOLL4 0x90 amd8111e.h Auto-poll4 register
3170
 AUTOPOLL5AUTOPOLL5 0x92 amd8111e.h Auto-poll5 register
3171
 AP_VALUEAP_VALUE 0x98 amd8111e.h Auto-poll value register
3172
 DLY_INT_ADLY_INT_A 0xA8 amd8111e.h Group A delayed interrupt register
3173
 DLY_INT_BDLY_INT_B 0xAC amd8111e.h Group B delayed interrupt register
3174
 FLOW_CONTROLFLOW_CONTROL 0xC8 amd8111e.h Flow control register
3175
 PHY_ACCESSPHY_ACCESS 0xD0 amd8111e.h PHY access register
3176
 STVALSTVAL 0xD8 amd8111e.h Software timer value register
3177
 XMT_RING_BASE_ADDR0XMT_RING_BASE_ADDR0 0x100 amd8111e.h Transmit ring0 base addr register
3178
 XMT_RING_BASE_ADDR1XMT_RING_BASE_ADDR1 0x108 amd8111e.h Transmit ring1 base addr register
3179
 XMT_RING_BASE_ADDR2XMT_RING_BASE_ADDR2 0x110 amd8111e.h Transmit ring2 base addr register
3180
 XMT_RING_BASE_ADDR3XMT_RING_BASE_ADDR3 0x118 amd8111e.h Transmit ring2 base addr register
3181
 RCV_RING_BASE_ADDR0RCV_RING_BASE_ADDR0 0x120 amd8111e.h Transmit ring0 base addr register
3182
 PMAT0PMAT0 0x190 amd8111e.h OnNow pattern register0
3183
 PMAT1PMAT1 0x194 amd8111e.h OnNow pattern register1
3184
 XMT_RING_LEN0XMT_RING_LEN0 0x140 amd8111e.h Transmit Ring0 length register
3185
 XMT_RING_LEN1XMT_RING_LEN1 0x144 amd8111e.h Transmit Ring1 length register
3186
 XMT_RING_LEN2XMT_RING_LEN2 0x148 amd8111e.h Transmit Ring2 length register
3187
 XMT_RING_LEN3XMT_RING_LEN3 0x14C amd8111e.h Transmit Ring3 length register
3188
 RCV_RING_LEN0RCV_RING_LEN0 0x150 amd8111e.h Receive Ring0 length register
3189
 SRAM_SIZESRAM_SIZE 0x178 amd8111e.h SRAM size register
3190
 SRAM_BOUNDARYSRAM_BOUNDARY 0x17A amd8111e.h SRAM boundary register
3191
 PADRPADR 0x160 amd8111e.h Physical address register
3192
 IFS1IFS1 0x18C amd8111e.h Inter-frame spacing Part1 register
3193
 IFSIFS 0x18D amd8111e.h Inter-frame spacing register
3194
 IPGIPG 0x18E amd8111e.h Inter-frame gap register
3195
 LADRFLADRF 0x168 amd8111e.h Logical address filter register
3196
 PHY_SPEED_10PHY_SPEED_10 0x2 amd8111e.h 　
3197
 PHY_SPEED_100PHY_SPEED_100 0x3 amd8111e.h 　
3198
 rcv_miss_pktsrcv_miss_pkts 0x00 amd8111e.h 　
3199
 rcv_octetsrcv_octets 0x01 amd8111e.h 　
3200
 rcv_broadcast_pktsrcv_broadcast_pkts 0x02 amd8111e.h 　
3201
 rcv_multicast_pktsrcv_multicast_pkts 0x03 amd8111e.h 　
3202
 rcv_undersize_pktsrcv_undersize_pkts 0x04 amd8111e.h 　
3203
 rcv_oversize_pktsrcv_oversize_pkts 0x05 amd8111e.h 　
3204
 rcv_fragmentsrcv_fragments 0x06 amd8111e.h 　
3205
 rcv_jabbersrcv_jabbers 0x07 amd8111e.h 　
3206
 rcv_unicast_pktsrcv_unicast_pkts 0x08 amd8111e.h 　
3207
 rcv_alignment_errorsrcv_alignment_errors 0x09 amd8111e.h 　
3208
 rcv_fcs_errorsrcv_fcs_errors 0x0A amd8111e.h 　
3209
 rcv_good_octetsrcv_good_octets 0x0B amd8111e.h 　
3210
 rcv_mac_ctrlrcv_mac_ctrl 0x0C amd8111e.h 　
3211
 rcv_flow_ctrlrcv_flow_ctrl 0x0D amd8111e.h 　
3212
 rcv_pkts_64_octetsrcv_pkts_64_octets 0x0E amd8111e.h 　
3213
 rcv_pkts_65to127_octetsrcv_pkts_65to127_octets 0x0F amd8111e.h 　
3214
 rcv_pkts_128to255_octetsrcv_pkts_128to255_octets 0x10 amd8111e.h 　
3215
 rcv_pkts_256to511_octetsrcv_pkts_256to511_octets 0x11 amd8111e.h 　
3216
 rcv_pkts_512to1023_octetsrcv_pkts_512to1023_octets 0x12 amd8111e.h 　
3217
 rcv_pkts_1024to1518_octetsrcv_pkts_1024to1518_octets 0x13 amd8111e.h 　
3218
 rcv_unsupported_opcodercv_unsupported_opcode 0x14 amd8111e.h 　
3219
 rcv_symbol_errorsrcv_symbol_errors 0x15 amd8111e.h 　
3220
 rcv_drop_pkts_ring1rcv_drop_pkts_ring1 0x16 amd8111e.h 　
3221
 rcv_drop_pkts_ring2rcv_drop_pkts_ring2 0x17 amd8111e.h 　
3222
 rcv_drop_pkts_ring3rcv_drop_pkts_ring3 0x18 amd8111e.h 　
3223
 rcv_drop_pkts_ring4rcv_drop_pkts_ring4 0x19 amd8111e.h 　
3224
 rcv_jumbo_pktsrcv_jumbo_pkts 0x1A amd8111e.h 　
3225
 xmt_underrun_pktsxmt_underrun_pkts 0x20 amd8111e.h 　
3226
 xmt_octetsxmt_octets 0x21 amd8111e.h 　
3227
 xmt_packetsxmt_packets 0x22 amd8111e.h 　
3228
 xmt_broadcast_pktsxmt_broadcast_pkts 0x23 amd8111e.h 　
3229
 xmt_multicast_pktsxmt_multicast_pkts 0x24 amd8111e.h 　
3230
 xmt_collisionsxmt_collisions 0x25 amd8111e.h 　
3231
 xmt_unicast_pktsxmt_unicast_pkts 0x26 amd8111e.h 　
3232
 xmt_one_collisionxmt_one_collision 0x27 amd8111e.h 　
3233
 xmt_multiple_collisionxmt_multiple_collision 0x28 amd8111e.h 　
3234
 xmt_deferred_transmitxmt_deferred_transmit 0x29 amd8111e.h 　
3235
 xmt_late_collisionxmt_late_collision 0x2A amd8111e.h 　
3236
 xmt_excessive_deferxmt_excessive_defer 0x2B amd8111e.h 　
3237
 xmt_loss_carrierxmt_loss_carrier 0x2C amd8111e.h 　
3238
 xmt_excessive_collisionxmt_excessive_collision 0x2D amd8111e.h 　
3239
 xmt_back_pressurexmt_back_pressure 0x2E amd8111e.h 　
3240
 xmt_flow_ctrlxmt_flow_ctrl 0x2F amd8111e.h 　
3241
 xmt_pkts_64_octetsxmt_pkts_64_octets 0x30 amd8111e.h 　
3242
 xmt_pkts_65to127_octetsxmt_pkts_65to127_octets 0x31 amd8111e.h 　
3243
 xmt_pkts_128to255_octetsxmt_pkts_128to255_octets 0x32 amd8111e.h 　
3244
 xmt_pkts_256to511_octetsxmt_pkts_256to511_octets 0x33 amd8111e.h 　
3245
 xmt_pkts_512to1023_octetsxmt_pkts_512to1023_octets 0x34 amd8111e.h 　
3246
 xmt_pkts_1024to1518_octetxmt_pkts_1024to1518_octet 0x35 amd8111e.h 　
3247
 xmt_oversize_pktsxmt_oversize_pkts 0x36 amd8111e.h 　
3248
 xmt_jumbo_pktsxmt_jumbo_pkts 0x37 amd8111e.h 　
3249
 DEFAULT_IPGDEFAULT_IPG 0x60 amd8111e.h 　
3250
 IFS1_DELTAIFS1_DELTA 36 amd8111e.h 　
3251
 IPG_CONVERGE_JIFFIESIPG_CONVERGE_JIFFIES (HZ/2) amd8111e.h 　
3252
 IPG_STABLE_TIMEIPG_STABLE_TIME 5 amd8111e.h 　
3253
 MIN_IPGMIN_IPG 96 amd8111e.h 　
3254
 MAX_IPGMAX_IPG 255 amd8111e.h 　
3255
 IPG_STEPIPG_STEP 16 amd8111e.h 　
3256
 CSTATECSTATE 1 amd8111e.h 　
3257
 SSTATESSTATE 2 amd8111e.h 　
3258
 RESET_RX_FLAGSRESET_RX_FLAGS 0x0000 amd8111e.h 　
3259
 TT_MASKTT_MASK 0x000c amd8111e.h 　
3260
 TCC_MASKTCC_MASK 0x0003 amd8111e.h 　
3261
 AMD8111E_REG_DUMP_LENAMD8111E_REG_DUMP_LEN 13*sizeof(u32) amd8111e.h 　
3262
 CRC32CRC32 0xedb88320 amd8111e.h 　
3263
 INITCRCINITCRC 0xFFFFFFFF amd8111e.h 　
3264
 ETH_FCS_LENETH_FCS_LEN 4 atl1e.h 　
3265
 VLAN_HLENVLAN_HLEN 4 atl1e.h 　
3266
 NET_IP_ALIGNNET_IP_ALIGN 2 atl1e.h 　
3267
 SPEED_0SPEED_0 0xffff atl1e.h 　
3268
 SPEED_10SPEED_10 10 atl1e.h 　
3269
 SPEED_100SPEED_100 100 atl1e.h 　
3270
 SPEED_1000SPEED_1000 1000 atl1e.h 　
3271
 HALF_DUPLEXHALF_DUPLEX 1 atl1e.h 　
3272
 FULL_DUPLEXFULL_DUPLEX 2 atl1e.h 　
3273
 AT_ERR_EEPROMAT_ERR_EEPROM 1 atl1e.h 　
3274
 AT_ERR_PHYAT_ERR_PHY 2 atl1e.h 　
3275
 AT_ERR_CONFIGAT_ERR_CONFIG 3 atl1e.h 　
3276
 AT_ERR_PARAMAT_ERR_PARAM 4 atl1e.h 　
3277
 AT_ERR_MAC_TYPEAT_ERR_MAC_TYPE 5 atl1e.h 　
3278
 AT_ERR_PHY_TYPEAT_ERR_PHY_TYPE 6 atl1e.h 　
3279
 AT_ERR_PHY_SPEEDAT_ERR_PHY_SPEED 7 atl1e.h 　
3280
 AT_ERR_PHY_RESAT_ERR_PHY_RES 8 atl1e.h 　
3281
 AT_ERR_TIMEOUTAT_ERR_TIMEOUT 9 atl1e.h 　
3282
 AT_MAX_RECEIVE_QUEUEAT_MAX_RECEIVE_QUEUE 4 atl1e.h 　
3283
 AT_PAGE_NUM_PER_QUEUEAT_PAGE_NUM_PER_QUEUE 2 atl1e.h 　
3284
 AT_TWSI_EEPROM_TIMEOUTAT_TWSI_EEPROM_TIMEOUT 100 atl1e.h 　
3285
 AT_HW_MAX_IDLE_DELAYAT_HW_MAX_IDLE_DELAY 10 atl1e.h 　
3286
 AT_REGS_LENAT_REGS_LEN 75 atl1e.h 　
3287
 AT_EEPROM_LENAT_EEPROM_LEN 512 atl1e.h 　
3288
 TPD_BUFLEN_MASKTPD_BUFLEN_MASK 0x3FFF atl1e.h 　
3289
 TPD_BUFLEN_SHIFTTPD_BUFLEN_SHIFT 0 atl1e.h 　
3290
 TPD_EOP_MASKTPD_EOP_MASK 0x0001 atl1e.h 　
3291
 TPD_EOP_SHIFTTPD_EOP_SHIFT 0 atl1e.h 　
3292
 MAX_TX_BUF_LENMAX_TX_BUF_LEN 0x2000 atl1e.h 　
3293
 MAX_TX_BUF_SHIFTMAX_TX_BUF_SHIFT 13 atl1e.h 　
3294
 RRS_RX_CSUM_MASKRRS_RX_CSUM_MASK 0xFFFF atl1e.h 　
3295
 RRS_RX_CSUM_SHIFTRRS_RX_CSUM_SHIFT 0 atl1e.h 　
3296
 RRS_PKT_SIZE_MASKRRS_PKT_SIZE_MASK 0x3FFF atl1e.h 　
3297
 RRS_PKT_SIZE_SHIFTRRS_PKT_SIZE_SHIFT 16 atl1e.h 　
3298
 RRS_CPU_NUM_MASKRRS_CPU_NUM_MASK 0x0003 atl1e.h 　
3299
 RRS_CPU_NUM_SHIFTRRS_CPU_NUM_SHIFT 30 atl1e.h 　
3300
 RRS_IS_RSS_IPV4RRS_IS_RSS_IPV4 0x0001 atl1e.h 　
3301
 RRS_IS_RSS_IPV4_TCPRRS_IS_RSS_IPV4_TCP 0x0002 atl1e.h 　
3302
 RRS_IS_RSS_IPV6RRS_IS_RSS_IPV6 0x0004 atl1e.h 　
3303
 RRS_IS_RSS_IPV6_TCPRRS_IS_RSS_IPV6_TCP 0x0008 atl1e.h 　
3304
 RRS_IS_IPV6RRS_IS_IPV6 0x0010 atl1e.h 　
3305
 RRS_IS_IP_FRAGRRS_IS_IP_FRAG 0x0020 atl1e.h 　
3306
 RRS_IS_IP_DFRRS_IS_IP_DF 0x0040 atl1e.h 　
3307
 RRS_IS_802_3RRS_IS_802_3 0x0080 atl1e.h 　
3308
 RRS_IS_VLAN_TAGRRS_IS_VLAN_TAG 0x0100 atl1e.h 　
3309
 RRS_IS_ERR_FRAMERRS_IS_ERR_FRAME 0x0200 atl1e.h 　
3310
 RRS_IS_IPV4RRS_IS_IPV4 0x0400 atl1e.h 　
3311
 RRS_IS_UDPRRS_IS_UDP 0x0800 atl1e.h 　
3312
 RRS_IS_TCPRRS_IS_TCP 0x1000 atl1e.h 　
3313
 RRS_IS_BCASTRRS_IS_BCAST 0x2000 atl1e.h 　
3314
 RRS_IS_MCASTRRS_IS_MCAST 0x4000 atl1e.h 　
3315
 RRS_IS_PAUSERRS_IS_PAUSE 0x8000 atl1e.h 　
3316
 RRS_ERR_BAD_CRCRRS_ERR_BAD_CRC 0x0001 atl1e.h 　
3317
 RRS_ERR_CODERRS_ERR_CODE 0x0002 atl1e.h 　
3318
 RRS_ERR_DRIBBLERRS_ERR_DRIBBLE 0x0004 atl1e.h 　
3319
 RRS_ERR_RUNTRRS_ERR_RUNT 0x0008 atl1e.h 　
3320
 RRS_ERR_RX_OVERFLOWRRS_ERR_RX_OVERFLOW 0x0010 atl1e.h 　
3321
 RRS_ERR_TRUNCRRS_ERR_TRUNC 0x0020 atl1e.h 　
3322
 RRS_ERR_IP_CSUMRRS_ERR_IP_CSUM 0x0040 atl1e.h 　
3323
 RRS_ERR_L4_CSUMRRS_ERR_L4_CSUM 0x0080 atl1e.h 　
3324
 RRS_ERR_LENGTHRRS_ERR_LENGTH 0x0100 atl1e.h 　
3325
 RRS_ERR_DES_ADDRRRS_ERR_DES_ADDR 0x0200 atl1e.h 　
3326
 REG_PM_CTRLSTATREG_PM_CTRLSTAT 0x44 atl1e.h 　
3327
 REG_PCIE_CAP_LISTREG_PCIE_CAP_LIST 0x58 atl1e.h 　
3328
 REG_DEVICE_CAPREG_DEVICE_CAP 0x5C atl1e.h 　
3329
 DEVICE_CAP_MAX_PAYLOAD_MASKDEVICE_CAP_MAX_PAYLOAD_MASK 0x7 atl1e.h 　
3330
 DEVICE_CAP_MAX_PAYLOAD_SHIFTDEVICE_CAP_MAX_PAYLOAD_SHIFT 0 atl1e.h 　
3331
 REG_DEVICE_CTRLREG_DEVICE_CTRL 0x60 atl1e.h 　
3332
 DEVICE_CTRL_MAX_PAYLOAD_MASKDEVICE_CTRL_MAX_PAYLOAD_MASK 0x7 atl1e.h 　
3333
 DEVICE_CTRL_MAX_PAYLOAD_SHIFTDEVICE_CTRL_MAX_PAYLOAD_SHIFT 5 atl1e.h 　
3334
 DEVICE_CTRL_MAX_RREQ_SZ_MASKDEVICE_CTRL_MAX_RREQ_SZ_MASK 0x7 atl1e.h 　
3335
 DEVICE_CTRL_MAX_RREQ_SZ_SHIFTDEVICE_CTRL_MAX_RREQ_SZ_SHIFT 12 atl1e.h 　
3336
 REG_VPD_CAPREG_VPD_CAP 0x6C atl1e.h 　
3337
 VPD_CAP_ID_MASKVPD_CAP_ID_MASK 0xff atl1e.h 　
3338
 VPD_CAP_ID_SHIFTVPD_CAP_ID_SHIFT 0 atl1e.h 　
3339
 VPD_CAP_NEXT_PTR_MASKVPD_CAP_NEXT_PTR_MASK 0xFF atl1e.h 　
3340
 VPD_CAP_NEXT_PTR_SHIFTVPD_CAP_NEXT_PTR_SHIFT 8 atl1e.h 　
3341
 VPD_CAP_VPD_ADDR_MASKVPD_CAP_VPD_ADDR_MASK 0x7FFF atl1e.h 　
3342
 VPD_CAP_VPD_ADDR_SHIFTVPD_CAP_VPD_ADDR_SHIFT 16 atl1e.h 　
3343
 VPD_CAP_VPD_FLAGVPD_CAP_VPD_FLAG 0x80000000 atl1e.h 　
3344
 REG_VPD_DATAREG_VPD_DATA 0x70 atl1e.h 　
3345
 REG_SPI_FLASH_CTRLREG_SPI_FLASH_CTRL 0x200 atl1e.h 　
3346
 SPI_FLASH_CTRL_STS_NON_RDYSPI_FLASH_CTRL_STS_NON_RDY 0x1 atl1e.h 　
3347
 SPI_FLASH_CTRL_STS_WENSPI_FLASH_CTRL_STS_WEN 0x2 atl1e.h 　
3348
 SPI_FLASH_CTRL_STS_WPENSPI_FLASH_CTRL_STS_WPEN 0x80 atl1e.h 　
3349
 SPI_FLASH_CTRL_DEV_STS_MASKSPI_FLASH_CTRL_DEV_STS_MASK 0xFF atl1e.h 　
3350
 SPI_FLASH_CTRL_DEV_STS_SHIFTSPI_FLASH_CTRL_DEV_STS_SHIFT 0 atl1e.h 　
3351
 SPI_FLASH_CTRL_INS_MASKSPI_FLASH_CTRL_INS_MASK 0x7 atl1e.h 　
3352
 SPI_FLASH_CTRL_INS_SHIFTSPI_FLASH_CTRL_INS_SHIFT 8 atl1e.h 　
3353
 SPI_FLASH_CTRL_STARTSPI_FLASH_CTRL_START 0x800 atl1e.h 　
3354
 SPI_FLASH_CTRL_EN_VPDSPI_FLASH_CTRL_EN_VPD 0x2000 atl1e.h 　
3355
 SPI_FLASH_CTRL_LDSTARTSPI_FLASH_CTRL_LDSTART 0x8000 atl1e.h 　
3356
 SPI_FLASH_CTRL_CS_HI_MASKSPI_FLASH_CTRL_CS_HI_MASK 0x3 atl1e.h 　
3357
 SPI_FLASH_CTRL_CS_HI_SHIFTSPI_FLASH_CTRL_CS_HI_SHIFT 16 atl1e.h 　
3358
 SPI_FLASH_CTRL_CS_HOLD_MASKSPI_FLASH_CTRL_CS_HOLD_MASK 0x3 atl1e.h 　
3359
 SPI_FLASH_CTRL_CS_HOLD_SHIFTSPI_FLASH_CTRL_CS_HOLD_SHIFT 18 atl1e.h 　
3360
 SPI_FLASH_CTRL_CLK_LO_MASKSPI_FLASH_CTRL_CLK_LO_MASK 0x3 atl1e.h 　
3361
 SPI_FLASH_CTRL_CLK_LO_SHIFTSPI_FLASH_CTRL_CLK_LO_SHIFT 20 atl1e.h 　
3362
 SPI_FLASH_CTRL_CLK_HI_MASKSPI_FLASH_CTRL_CLK_HI_MASK 0x3 atl1e.h 　
3363
 SPI_FLASH_CTRL_CLK_HI_SHIFTSPI_FLASH_CTRL_CLK_HI_SHIFT 22 atl1e.h 　
3364
 SPI_FLASH_CTRL_CS_SETUP_MASKSPI_FLASH_CTRL_CS_SETUP_MASK 0x3 atl1e.h 　
3365
 SPI_FLASH_CTRL_CS_SETUP_SHIFTSPI_FLASH_CTRL_CS_SETUP_SHIFT 24 atl1e.h 　
3366
 SPI_FLASH_CTRL_EROM_PGSZ_MASKSPI_FLASH_CTRL_EROM_PGSZ_MASK 0x3 atl1e.h 　
3367
 SPI_FLASH_CTRL_EROM_PGSZ_SHIFTSPI_FLASH_CTRL_EROM_PGSZ_SHIFT 26 atl1e.h 　
3368
 SPI_FLASH_CTRL_WAIT_READYSPI_FLASH_CTRL_WAIT_READY 0x10000000 atl1e.h 　
3369
 REG_SPI_ADDRREG_SPI_ADDR 0x204 atl1e.h 　
3370
 REG_SPI_DATAREG_SPI_DATA 0x208 atl1e.h 　
3371
 REG_SPI_FLASH_CONFIGREG_SPI_FLASH_CONFIG 0x20C atl1e.h 　
3372
 SPI_FLASH_CONFIG_LD_ADDR_MASKSPI_FLASH_CONFIG_LD_ADDR_MASK 0xFFFFFF atl1e.h 　
3373
 SPI_FLASH_CONFIG_LD_ADDR_SHIFTSPI_FLASH_CONFIG_LD_ADDR_SHIFT 0 atl1e.h 　
3374
 SPI_FLASH_CONFIG_VPD_ADDR_MASKSPI_FLASH_CONFIG_VPD_ADDR_MASK 0x3 atl1e.h 　
3375
 SPI_FLASH_CONFIG_VPD_ADDR_SHIFTSPI_FLASH_CONFIG_VPD_ADDR_SHIFT 24 atl1e.h 　
3376
 SPI_FLASH_CONFIG_LD_EXISTSPI_FLASH_CONFIG_LD_EXIST 0x4000000 atl1e.h 　
3377
 REG_SPI_FLASH_OP_PROGRAMREG_SPI_FLASH_OP_PROGRAM 0x210 atl1e.h 　
3378
 REG_SPI_FLASH_OP_SC_ERASEREG_SPI_FLASH_OP_SC_ERASE 0x211 atl1e.h 　
3379
 REG_SPI_FLASH_OP_CHIP_ERASEREG_SPI_FLASH_OP_CHIP_ERASE 0x212 atl1e.h 　
3380
 REG_SPI_FLASH_OP_RDIDREG_SPI_FLASH_OP_RDID 0x213 atl1e.h 　
3381
 REG_SPI_FLASH_OP_WRENREG_SPI_FLASH_OP_WREN 0x214 atl1e.h 　
3382
 REG_SPI_FLASH_OP_RDSRREG_SPI_FLASH_OP_RDSR 0x215 atl1e.h 　
3383
 REG_SPI_FLASH_OP_WRSRREG_SPI_FLASH_OP_WRSR 0x216 atl1e.h 　
3384
 REG_SPI_FLASH_OP_READREG_SPI_FLASH_OP_READ 0x217 atl1e.h 　
3385
 REG_TWSI_CTRLREG_TWSI_CTRL 0x218 atl1e.h 　
3386
 TWSI_CTRL_LD_OFFSET_MASKTWSI_CTRL_LD_OFFSET_MASK 0xFF atl1e.h 　
3387
 TWSI_CTRL_LD_OFFSET_SHIFTTWSI_CTRL_LD_OFFSET_SHIFT 0 atl1e.h 　
3388
 TWSI_CTRL_LD_SLV_ADDR_MASKTWSI_CTRL_LD_SLV_ADDR_MASK 0x7 atl1e.h 　
3389
 TWSI_CTRL_LD_SLV_ADDR_SHIFTTWSI_CTRL_LD_SLV_ADDR_SHIFT 8 atl1e.h 　
3390
 TWSI_CTRL_SW_LDSTARTTWSI_CTRL_SW_LDSTART 0x800 atl1e.h 　
3391
 TWSI_CTRL_HW_LDSTARTTWSI_CTRL_HW_LDSTART 0x1000 atl1e.h 　
3392
 TWSI_CTRL_SMB_SLV_ADDR_MASKTWSI_CTRL_SMB_SLV_ADDR_MASK 0x0x7F atl1e.h 　
3393
 TWSI_CTRL_SMB_SLV_ADDR_SHIFTTWSI_CTRL_SMB_SLV_ADDR_SHIFT 15 atl1e.h 　
3394
 TWSI_CTRL_LD_EXISTTWSI_CTRL_LD_EXIST 0x400000 atl1e.h 　
3395
 TWSI_CTRL_READ_FREQ_SEL_MASKTWSI_CTRL_READ_FREQ_SEL_MASK 0x3 atl1e.h 　
3396
 TWSI_CTRL_READ_FREQ_SEL_SHIFTTWSI_CTRL_READ_FREQ_SEL_SHIFT 23 atl1e.h 　
3397
 TWSI_CTRL_FREQ_SEL_100KTWSI_CTRL_FREQ_SEL_100K 0 atl1e.h 　
3398
 TWSI_CTRL_FREQ_SEL_200KTWSI_CTRL_FREQ_SEL_200K 1 atl1e.h 　
3399
 TWSI_CTRL_FREQ_SEL_300KTWSI_CTRL_FREQ_SEL_300K 2 atl1e.h 　
3400
 TWSI_CTRL_FREQ_SEL_400KTWSI_CTRL_FREQ_SEL_400K 3 atl1e.h 　
3401
 TWSI_CTRL_WRITE_FREQ_SEL_MASKTWSI_CTRL_WRITE_FREQ_SEL_MASK 0x3 atl1e.h 　
3402
 TWSI_CTRL_WRITE_FREQ_SEL_SHIFTTWSI_CTRL_WRITE_FREQ_SEL_SHIFT 24 atl1e.h 　
3403
 REG_PCIE_DEV_MISC_CTRLREG_PCIE_DEV_MISC_CTRL 0x21C atl1e.h 　
3404
 PCIE_DEV_MISC_CTRL_EXT_PIPEPCIE_DEV_MISC_CTRL_EXT_PIPE 0x2 atl1e.h 　
3405
 PCIE_DEV_MISC_CTRL_RETRY_BUFDISPCIE_DEV_MISC_CTRL_RETRY_BUFDIS 0x1 atl1e.h 　
3406
 PCIE_DEV_MISC_CTRL_SPIROM_EXISTPCIE_DEV_MISC_CTRL_SPIROM_EXIST 0x4 atl1e.h 　
3407
 PCIE_DEV_MISC_CTRL_SERDES_ENDIAPCIE_DEV_MISC_CTRL_SERDES_ENDIA 0x8 atl1e.h 　
3408
 PCIE_DEV_MISC_CTRL_SERDES_SEL_DPCIE_DEV_MISC_CTRL_SERDES_SEL_D 0x10 atl1e.h 　
3409
 REG_PCIE_PHYMISCREG_PCIE_PHYMISC 0x1000 atl1e.h 　
3410
 PCIE_PHYMISC_FORCE_RCV_DETPCIE_PHYMISC_FORCE_RCV_DET 0x4 atl1e.h 　
3411
 REG_LTSSM_TEST_MODEREG_LTSSM_TEST_MODE 0x12FC atl1e.h 　
3412
 LTSSM_TEST_MODE_DEFLTSSM_TEST_MODE_DEF 0xE000 atl1e.h 　
3413
 REG_MASTER_CTRLREG_MASTER_CTRL 0x1400 atl1e.h 　
3414
 MASTER_CTRL_SOFT_RSTMASTER_CTRL_SOFT_RST 0x1 atl1e.h 　
3415
 MASTER_CTRL_MTIMER_ENMASTER_CTRL_MTIMER_EN 0x2 atl1e.h 　
3416
 MASTER_CTRL_ITIMER_ENMASTER_CTRL_ITIMER_EN 0x4 atl1e.h 　
3417
 MASTER_CTRL_MANUAL_INTMASTER_CTRL_MANUAL_INT 0x8 atl1e.h 　
3418
 MASTER_CTRL_ITIMER2_ENMASTER_CTRL_ITIMER2_EN 0x20 atl1e.h 　
3419
 MASTER_CTRL_INT_RDCLRMASTER_CTRL_INT_RDCLR 0x40 atl1e.h 　
3420
 MASTER_CTRL_LED_MODEMASTER_CTRL_LED_MODE 0x200 atl1e.h 　
3421
 MASTER_CTRL_REV_NUM_SHIFTMASTER_CTRL_REV_NUM_SHIFT 16 atl1e.h 　
3422
 MASTER_CTRL_REV_NUM_MASKMASTER_CTRL_REV_NUM_MASK 0xff atl1e.h 　
3423
 MASTER_CTRL_DEV_ID_SHIFTMASTER_CTRL_DEV_ID_SHIFT 24 atl1e.h 　
3424
 MASTER_CTRL_DEV_ID_MASKMASTER_CTRL_DEV_ID_MASK 0xff atl1e.h 　
3425
 REG_MANUAL_TIMER_INITREG_MANUAL_TIMER_INIT 0x1404 atl1e.h 　
3426
 REG_IRQ_MODU_TIMER_INITREG_IRQ_MODU_TIMER_INIT 0x1408 atl1e.h w
3427
 REG_IRQ_MODU_TIMER2_INITREG_IRQ_MODU_TIMER2_INIT 0x140A atl1e.h w
3428
 REG_GPHY_CTRLREG_GPHY_CTRL 0x140C atl1e.h 　
3429
 GPHY_CTRL_EXT_RESETGPHY_CTRL_EXT_RESET 1 atl1e.h 　
3430
 GPHY_CTRL_PIPE_MODGPHY_CTRL_PIPE_MOD 2 atl1e.h 　
3431
 GPHY_CTRL_TEST_MODE_MASKGPHY_CTRL_TEST_MODE_MASK 3 atl1e.h 　
3432
 GPHY_CTRL_TEST_MODE_SHIFTGPHY_CTRL_TEST_MODE_SHIFT 2 atl1e.h 　
3433
 GPHY_CTRL_BERT_STARTGPHY_CTRL_BERT_START 0x10 atl1e.h 　
3434
 GPHY_CTRL_GATE_25M_ENGPHY_CTRL_GATE_25M_EN 0x20 atl1e.h 　
3435
 GPHY_CTRL_LPW_EXITGPHY_CTRL_LPW_EXIT 0x40 atl1e.h 　
3436
 GPHY_CTRL_PHY_IDDQGPHY_CTRL_PHY_IDDQ 0x80 atl1e.h 　
3437
 GPHY_CTRL_PHY_IDDQ_DISGPHY_CTRL_PHY_IDDQ_DIS 0x100 atl1e.h 　
3438
 GPHY_CTRL_PCLK_SEL_DISGPHY_CTRL_PCLK_SEL_DIS 0x200 atl1e.h 　
3439
 GPHY_CTRL_HIB_ENGPHY_CTRL_HIB_EN 0x400 atl1e.h 　
3440
 GPHY_CTRL_HIB_PULSEGPHY_CTRL_HIB_PULSE 0x800 atl1e.h 　
3441
 GPHY_CTRL_SEL_ANA_RSTGPHY_CTRL_SEL_ANA_RST 0x1000 atl1e.h 　
3442
 GPHY_CTRL_PHY_PLL_ONGPHY_CTRL_PHY_PLL_ON 0x2000 atl1e.h 　
3443
 GPHY_CTRL_PWDOWN_HWGPHY_CTRL_PWDOWN_HW 0x4000 atl1e.h 　
3444
 GPHY_CTRL_DEFAULTGPHY_CTRL_DEFAULT (\ GPHY_CTRL_PHY_PLL_ON |\ GPHY_CTRL_SEL_ANA_RST |\ GPHY_CTRL_HIB_PULSE |\ GPHY_CTRL_HIB_EN) atl1e.h 　
3445
 GPHY_CTRL_PW_WOL_DISGPHY_CTRL_PW_WOL_DIS (\ GPHY_CTRL_PHY_PLL_ON |\ GPHY_CTRL_SEL_ANA_RST |\ GPHY_CTRL_HIB_PULSE |\ GPHY_CTRL_HIB_EN |\ GPHY_CTRL_PWDOWN_HW |\ GPHY_CTRL atl1e.h 　
3446
 REG_CMBDISDMA_TIMERREG_CMBDISDMA_TIMER 0x140E atl1e.h 　
3447
 REG_IDLE_STATUSREG_IDLE_STATUS 0x1410 atl1e.h 　
3448
 IDLE_STATUS_RXMACIDLE_STATUS_RXMAC 1 atl1e.h 1: RXMAC state machine is in non-IDLE state. 0: RXMAC is idling
3449
 IDLE_STATUS_TXMACIDLE_STATUS_TXMAC 2 atl1e.h 1: TXMAC state machine is in non-IDLE state. 0: TXMAC is idling
3450
 IDLE_STATUS_RXQIDLE_STATUS_RXQ 4 atl1e.h 1: RXQ state machine is in non-IDLE state. 0: RXQ is idling
3451
 IDLE_STATUS_TXQIDLE_STATUS_TXQ 8 atl1e.h 1: TXQ state machine is in non-IDLE state. 0: TXQ is idling
3452
 IDLE_STATUS_DMARIDLE_STATUS_DMAR 0x10 atl1e.h 1: DMAR state machine is in non-IDLE state. 0: DMAR is idling
3453
 IDLE_STATUS_DMAWIDLE_STATUS_DMAW 0x20 atl1e.h 1: DMAW state machine is in non-IDLE state. 0: DMAW is idling
3454
 IDLE_STATUS_SMBIDLE_STATUS_SMB 0x40 atl1e.h 1: SMB state machine is in non-IDLE state. 0: SMB is idling
3455
 IDLE_STATUS_CMBIDLE_STATUS_CMB 0x80 atl1e.h 1: CMB state machine is in non-IDLE state. 0: CMB is idling
3456
 REG_MDIO_CTRLREG_MDIO_CTRL 0x1414 atl1e.h 　
3457
 MDIO_DATA_MASKMDIO_DATA_MASK 0xffff atl1e.h On MDIO write, the 16-bit control data to write to PHY MII management register
3458
 MDIO_DATA_SHIFTMDIO_DATA_SHIFT 0 atl1e.h On MDIO read, the 16-bit status data that was read from the PHY MII management register
3459
 MDIO_REG_ADDR_MASKMDIO_REG_ADDR_MASK 0x1f atl1e.h MDIO register address
3460
 MDIO_REG_ADDR_SHIFTMDIO_REG_ADDR_SHIFT 16 atl1e.h 　
3461
 MDIO_RWMDIO_RW 0x200000 atl1e.h 1: read, 0: write
3462
 MDIO_SUP_PREAMBLEMDIO_SUP_PREAMBLE 0x400000 atl1e.h Suppress preamble
3463
 MDIO_STARTMDIO_START 0x800000 atl1e.h Write 1 to initiate the MDIO master. And this bit is self cleared after one cycle
3464
 MDIO_CLK_SEL_SHIFTMDIO_CLK_SEL_SHIFT 24 atl1e.h 　
3465
 MDIO_CLK_25_4MDIO_CLK_25_4 0 atl1e.h 　
3466
 MDIO_CLK_25_6MDIO_CLK_25_6 2 atl1e.h 　
3467
 MDIO_CLK_25_8MDIO_CLK_25_8 3 atl1e.h 　
3468
 MDIO_CLK_25_10MDIO_CLK_25_10 4 atl1e.h 　
3469
 MDIO_CLK_25_14MDIO_CLK_25_14 5 atl1e.h 　
3470
 MDIO_CLK_25_20MDIO_CLK_25_20 6 atl1e.h 　
3471
 MDIO_CLK_25_28MDIO_CLK_25_28 7 atl1e.h 　
3472
 MDIO_BUSYMDIO_BUSY 0x8000000 atl1e.h 　
3473
 MDIO_AP_ENMDIO_AP_EN 0x10000000 atl1e.h 　
3474
 MDIO_WAIT_TIMESMDIO_WAIT_TIMES 10 atl1e.h 　
3475
 REG_PHY_STATUSREG_PHY_STATUS 0x1418 atl1e.h 　
3476
 PHY_STATUS_100MPHY_STATUS_100M 0x20000 atl1e.h 　
3477
 PHY_STATUS_EMI_CAPHY_STATUS_EMI_CA 0x40000 atl1e.h 　
3478
 REG_BIST0_CTRLREG_BIST0_CTRL 0x141c atl1e.h 　
3479
 BIST0_NOWBIST0_NOW 0x1 atl1e.h 1: To trigger BIST0 logic. This bit stays high during the
3480
 BIST0_SRAM_FAILBIST0_SRAM_FAIL 0x2 atl1e.h 1: The SRAM failure is un-repairable because it has address
3481
 BIST0_FUSE_FLAGBIST0_FUSE_FLAG 0x4 atl1e.h 1: Indicating one cell has been fixed
3482
 REG_BIST1_CTRLREG_BIST1_CTRL 0x1420 atl1e.h 　
3483
 BIST1_NOWBIST1_NOW 0x1 atl1e.h 1: To trigger BIST0 logic. This bit stays high during the
3484
 BIST1_SRAM_FAILBIST1_SRAM_FAIL 0x2 atl1e.h 1: The SRAM failure is un-repairable because it has address
3485
 BIST1_FUSE_FLAGBIST1_FUSE_FLAG 0x4 atl1e.h 　
3486
 REG_SERDES_LOCKREG_SERDES_LOCK 0x1424 atl1e.h 　
3487
 SERDES_LOCK_DETECTSERDES_LOCK_DETECT 1 atl1e.h 1: SerDes lock detected . This signal comes from Analog SerDes
3488
 SERDES_LOCK_DETECT_ENSERDES_LOCK_DETECT_EN 2 atl1e.h 1: Enable SerDes Lock detect function
3489
 REG_MAC_CTRLREG_MAC_CTRL 0x1480 atl1e.h 　
3490
 MAC_CTRL_TX_ENMAC_CTRL_TX_EN 1 atl1e.h 1: Transmit Enable
3491
 MAC_CTRL_RX_ENMAC_CTRL_RX_EN 2 atl1e.h 1: Receive Enable
3492
 MAC_CTRL_TX_FLOWMAC_CTRL_TX_FLOW 4 atl1e.h 1: Transmit Flow Control Enable
3493
 MAC_CTRL_RX_FLOWMAC_CTRL_RX_FLOW 8 atl1e.h 1: Receive Flow Control Enable
3494
 MAC_CTRL_LOOPBACKMAC_CTRL_LOOPBACK 0x10 atl1e.h 1: Loop back at G/MII Interface
3495
 MAC_CTRL_DUPLXMAC_CTRL_DUPLX 0x20 atl1e.h 1: Full-duplex mode 0: Half-duplex mode
3496
 MAC_CTRL_ADD_CRCMAC_CTRL_ADD_CRC 0x40 atl1e.h 1: Instruct MAC to attach CRC on all egress Ethernet frames
3497
 MAC_CTRL_PADMAC_CTRL_PAD 0x80 atl1e.h 1: Instruct MAC to pad short frames to 60-bytes, and then attach CRC. This bit has higher priority over CRC_EN
3498
 MAC_CTRL_LENCHKMAC_CTRL_LENCHK 0x100 atl1e.h 1: Instruct MAC to check if length field matches the real packet length
3499
 MAC_CTRL_HUGE_ENMAC_CTRL_HUGE_EN 0x200 atl1e.h 1: receive Jumbo frame enable
3500
 MAC_CTRL_PRMLEN_SHIFTMAC_CTRL_PRMLEN_SHIFT 10 atl1e.h Preamble length
3501
 MAC_CTRL_PRMLEN_MASKMAC_CTRL_PRMLEN_MASK 0xf atl1e.h 　
3502
 MAC_CTRL_RMV_VLANMAC_CTRL_RMV_VLAN 0x4000 atl1e.h 1: to remove VLAN Tag automatically from all receive packets
3503
 MAC_CTRL_PROMIS_ENMAC_CTRL_PROMIS_EN 0x8000 atl1e.h 1: Promiscuous Mode Enable
3504
 MAC_CTRL_TX_PAUSEMAC_CTRL_TX_PAUSE 0x10000 atl1e.h 1: transmit test pause
3505
 MAC_CTRL_SCNTMAC_CTRL_SCNT 0x20000 atl1e.h 1: shortcut slot time counter
3506
 MAC_CTRL_SRST_TXMAC_CTRL_SRST_TX 0x40000 atl1e.h 1: synchronized reset Transmit MAC module
3507
 MAC_CTRL_TX_SIMURSTMAC_CTRL_TX_SIMURST 0x80000 atl1e.h 1: transmit simulation reset
3508
 MAC_CTRL_SPEED_SHIFTMAC_CTRL_SPEED_SHIFT 20 atl1e.h 10: gigabit 01:10M/100M
3509
 MAC_CTRL_SPEED_MASKMAC_CTRL_SPEED_MASK 0x300000 atl1e.h 　
3510
 MAC_CTRL_SPEED_1000MAC_CTRL_SPEED_1000 2 atl1e.h 　
3511
 MAC_CTRL_SPEED_10_100MAC_CTRL_SPEED_10_100 1 atl1e.h 　
3512
 MAC_CTRL_DBG_TX_BKPRESUREMAC_CTRL_DBG_TX_BKPRESURE 0x400000 atl1e.h 1: transmit maximum backoff (half-duplex test bit)
3513
 MAC_CTRL_TX_HUGEMAC_CTRL_TX_HUGE 0x800000 atl1e.h 1: transmit huge enable
3514
 MAC_CTRL_RX_CHKSUM_ENMAC_CTRL_RX_CHKSUM_EN 0x1000000 atl1e.h 1: RX checksum enable
3515
 MAC_CTRL_MC_ALL_ENMAC_CTRL_MC_ALL_EN 0x2000000 atl1e.h 1: upload all multicast frame without error to system
3516
 MAC_CTRL_BC_ENMAC_CTRL_BC_EN 0x4000000 atl1e.h 1: upload all broadcast frame without error to system
3517
 MAC_CTRL_DBGMAC_CTRL_DBG 0x8000000 atl1e.h 1: upload all received frame to system (Debug Mode)
3518
 REG_MAC_IPG_IFGREG_MAC_IPG_IFG 0x1484 atl1e.h 　
3519
 MAC_IPG_IFG_IPGT_SHIFTMAC_IPG_IFG_IPGT_SHIFT 0 atl1e.h Desired back to back inter-packet gap. The default is 96-bit time
3520
 MAC_IPG_IFG_IPGT_MASKMAC_IPG_IFG_IPGT_MASK 0x7f atl1e.h 　
3521
 MAC_IPG_IFG_MIFG_SHIFTMAC_IPG_IFG_MIFG_SHIFT 8 atl1e.h Minimum number of IFG to enforce in between RX frames
3522
 MAC_IPG_IFG_MIFG_MASKMAC_IPG_IFG_MIFG_MASK 0xff atl1e.h Frame gap below such IFP is dropped
3523
 MAC_IPG_IFG_IPGR1_SHIFTMAC_IPG_IFG_IPGR1_SHIFT 16 atl1e.h 64bit Carrier-Sense window
3524
 MAC_IPG_IFG_IPGR1_MASKMAC_IPG_IFG_IPGR1_MASK 0x7f atl1e.h 　
3525
 MAC_IPG_IFG_IPGR2_SHIFTMAC_IPG_IFG_IPGR2_SHIFT 24 atl1e.h 96-bit IPG window
3526
 MAC_IPG_IFG_IPGR2_MASKMAC_IPG_IFG_IPGR2_MASK 0x7f atl1e.h 　
3527
 REG_MAC_STA_ADDRREG_MAC_STA_ADDR 0x1488 atl1e.h 　
3528
 REG_RX_HASH_TABLEREG_RX_HASH_TABLE 0x1490 atl1e.h 　
3529
 REG_MAC_HALF_DUPLX_CTRLREG_MAC_HALF_DUPLX_CTRL 0x1498 atl1e.h 　
3530
 MAC_HALF_DUPLX_CTRL_LCOL_SHIFTMAC_HALF_DUPLX_CTRL_LCOL_SHIFT 0 atl1e.h Collision Window
3531
 MAC_HALF_DUPLX_CTRL_LCOL_MASKMAC_HALF_DUPLX_CTRL_LCOL_MASK 0x3ff atl1e.h 　
3532
 MAC_HALF_DUPLX_CTRL_RETRY_SHIFTMAC_HALF_DUPLX_CTRL_RETRY_SHIFT 12 atl1e.h Retransmission maximum, afterwards the packet will be discarded
3533
 MAC_HALF_DUPLX_CTRL_RETRY_MASKMAC_HALF_DUPLX_CTRL_RETRY_MASK 0xf atl1e.h 　
3534
 MAC_HALF_DUPLX_CTRL_EXC_DEF_ENMAC_HALF_DUPLX_CTRL_EXC_DEF_EN 0x10000 atl1e.h 1: Allow the transmission of a packet which has been excessively deferred
3535
 MAC_HALF_DUPLX_CTRL_NO_BACK_CMAC_HALF_DUPLX_CTRL_NO_BACK_C 0x20000 atl1e.h 1: No back-off on collision, immediately start the retransmission
3536
 MAC_HALF_DUPLX_CTRL_NO_BACK_PMAC_HALF_DUPLX_CTRL_NO_BACK_P 0x40000 atl1e.h 1: No back-off on backpressure, immediately start the transmission after back pressure
3537
 MAC_HALF_DUPLX_CTRL_ABEBEMAC_HALF_DUPLX_CTRL_ABEBE 0x80000 atl1e.h 1: Alternative Binary Exponential Back-off Enabled
3538
 MAC_HALF_DUPLX_CTRL_ABEBT_SHIFTMAC_HALF_DUPLX_CTRL_ABEBT_SHIFT 20 atl1e.h Maximum binary exponential number
3539
 MAC_HALF_DUPLX_CTRL_ABEBT_MASKMAC_HALF_DUPLX_CTRL_ABEBT_MASK 0xf atl1e.h 　
3540
 MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFMAC_HALF_DUPLX_CTRL_JAMIPG_SHIF 24 atl1e.h IPG to start JAM for collision based flow control in half-duplex
3541
 MAC_HALF_DUPLX_CTRL_JAMIPG_MASKMAC_HALF_DUPLX_CTRL_JAMIPG_MASK 0xf atl1e.h mode. In unit of 8-bit time
3542
 REG_MTUREG_MTU 0x149c atl1e.h 　
3543
 REG_WOL_CTRLREG_WOL_CTRL 0x14a0 atl1e.h 　
3544
 WOL_PATTERN_ENWOL_PATTERN_EN 0x00000001 atl1e.h 　
3545
 WOL_PATTERN_PME_ENWOL_PATTERN_PME_EN 0x00000002 atl1e.h 　
3546
 WOL_MAGIC_ENWOL_MAGIC_EN 0x00000004 atl1e.h 　
3547
 WOL_MAGIC_PME_ENWOL_MAGIC_PME_EN 0x00000008 atl1e.h 　
3548
 WOL_LINK_CHG_ENWOL_LINK_CHG_EN 0x00000010 atl1e.h 　
3549
 WOL_LINK_CHG_PME_ENWOL_LINK_CHG_PME_EN 0x00000020 atl1e.h 　
3550
 WOL_PATTERN_STWOL_PATTERN_ST 0x00000100 atl1e.h 　
3551
 WOL_MAGIC_STWOL_MAGIC_ST 0x00000200 atl1e.h 　
3552
 WOL_LINKCHG_STWOL_LINKCHG_ST 0x00000400 atl1e.h 　
3553
 WOL_CLK_SWITCH_ENWOL_CLK_SWITCH_EN 0x00008000 atl1e.h 　
3554
 WOL_PT0_ENWOL_PT0_EN 0x00010000 atl1e.h 　
3555
 WOL_PT1_ENWOL_PT1_EN 0x00020000 atl1e.h 　
3556
 WOL_PT2_ENWOL_PT2_EN 0x00040000 atl1e.h 　
3557
 WOL_PT3_ENWOL_PT3_EN 0x00080000 atl1e.h 　
3558
 WOL_PT4_ENWOL_PT4_EN 0x00100000 atl1e.h 　
3559
 WOL_PT5_ENWOL_PT5_EN 0x00200000 atl1e.h 　
3560
 WOL_PT6_ENWOL_PT6_EN 0x00400000 atl1e.h 　
3561
 REG_WOL_PATTERN_LENREG_WOL_PATTERN_LEN 0x14a4 atl1e.h 　
3562
 WOL_PT_LEN_MASKWOL_PT_LEN_MASK 0x7f atl1e.h 　
3563
 WOL_PT0_LEN_SHIFTWOL_PT0_LEN_SHIFT 0 atl1e.h 　
3564
 WOL_PT1_LEN_SHIFTWOL_PT1_LEN_SHIFT 8 atl1e.h 　
3565
 WOL_PT2_LEN_SHIFTWOL_PT2_LEN_SHIFT 16 atl1e.h 　
3566
 WOL_PT3_LEN_SHIFTWOL_PT3_LEN_SHIFT 24 atl1e.h 　
3567
 WOL_PT4_LEN_SHIFTWOL_PT4_LEN_SHIFT 0 atl1e.h 　
3568
 WOL_PT5_LEN_SHIFTWOL_PT5_LEN_SHIFT 8 atl1e.h 　
3569
 WOL_PT6_LEN_SHIFTWOL_PT6_LEN_SHIFT 16 atl1e.h 　
3570
 REG_SRAM_TRD_ADDRREG_SRAM_TRD_ADDR 0x1518 atl1e.h 　
3571
 REG_SRAM_TRD_LENREG_SRAM_TRD_LEN 0x151C atl1e.h 　
3572
 REG_SRAM_RXF_ADDRREG_SRAM_RXF_ADDR 0x1520 atl1e.h 　
3573
 REG_SRAM_RXF_LENREG_SRAM_RXF_LEN 0x1524 atl1e.h 　
3574
 REG_SRAM_TXF_ADDRREG_SRAM_TXF_ADDR 0x1528 atl1e.h 　
3575
 REG_SRAM_TXF_LENREG_SRAM_TXF_LEN 0x152C atl1e.h 　
3576
 REG_SRAM_TCPH_ADDRREG_SRAM_TCPH_ADDR 0x1530 atl1e.h 　
3577
 REG_SRAM_PKTH_ADDRREG_SRAM_PKTH_ADDR 0x1532 atl1e.h 　
3578
 REG_LOAD_PTRREG_LOAD_PTR 0x1534 atl1e.h Software sets this bit after the initialization of the head and tail
3579
 REG_RXF3_BASE_ADDR_HIREG_RXF3_BASE_ADDR_HI 0x153C atl1e.h 　
3580
 REG_DESC_BASE_ADDR_HIREG_DESC_BASE_ADDR_HI 0x1540 atl1e.h 　
3581
 REG_RXF0_BASE_ADDR_HIREG_RXF0_BASE_ADDR_HI 0x1540 atl1e.h share with DESC BASE ADDR HI
3582
 REG_HOST_RXF0_PAGE0_LOREG_HOST_RXF0_PAGE0_LO 0x1544 atl1e.h 　
3583
 REG_HOST_RXF0_PAGE1_LOREG_HOST_RXF0_PAGE1_LO 0x1548 atl1e.h 　
3584
 REG_TPD_BASE_ADDR_LOREG_TPD_BASE_ADDR_LO 0x154C atl1e.h 　
3585
 REG_RXF1_BASE_ADDR_HIREG_RXF1_BASE_ADDR_HI 0x1550 atl1e.h 　
3586
 REG_RXF2_BASE_ADDR_HIREG_RXF2_BASE_ADDR_HI 0x1554 atl1e.h 　
3587
 REG_HOST_RXFPAGE_SIZEREG_HOST_RXFPAGE_SIZE 0x1558 atl1e.h 　
3588
 REG_TPD_RING_SIZEREG_TPD_RING_SIZE 0x155C atl1e.h 　
3589
 REG_RSS_KEY0REG_RSS_KEY0 0x14B0 atl1e.h 　
3590
 REG_RSS_KEY1REG_RSS_KEY1 0x14B4 atl1e.h 　
3591
 REG_RSS_KEY2REG_RSS_KEY2 0x14B8 atl1e.h 　
3592
 REG_RSS_KEY3REG_RSS_KEY3 0x14BC atl1e.h 　
3593
 REG_RSS_KEY4REG_RSS_KEY4 0x14C0 atl1e.h 　
3594
 REG_RSS_KEY5REG_RSS_KEY5 0x14C4 atl1e.h 　
3595
 REG_RSS_KEY6REG_RSS_KEY6 0x14C8 atl1e.h 　
3596
 REG_RSS_KEY7REG_RSS_KEY7 0x14CC atl1e.h 　
3597
 REG_RSS_KEY8REG_RSS_KEY8 0x14D0 atl1e.h 　
3598
 REG_RSS_KEY9REG_RSS_KEY9 0x14D4 atl1e.h 　
3599
 REG_IDT_TABLE4REG_IDT_TABLE4 0x14E0 atl1e.h 　
3600
 REG_IDT_TABLE5REG_IDT_TABLE5 0x14E4 atl1e.h 　
3601
 REG_IDT_TABLE6REG_IDT_TABLE6 0x14E8 atl1e.h 　
3602
 REG_IDT_TABLE7REG_IDT_TABLE7 0x14EC atl1e.h 　
3603
 REG_IDT_TABLE0REG_IDT_TABLE0 0x1560 atl1e.h 　
3604
 REG_IDT_TABLE1REG_IDT_TABLE1 0x1564 atl1e.h 　
3605
 REG_IDT_TABLE2REG_IDT_TABLE2 0x1568 atl1e.h 　
3606
 REG_IDT_TABLE3REG_IDT_TABLE3 0x156C atl1e.h 　
3607
 REG_IDT_TABLEREG_IDT_TABLE REG_IDT_TABLE0 atl1e.h 　
3608
 REG_RSS_HASH_VALUEREG_RSS_HASH_VALUE 0x1570 atl1e.h 　
3609
 REG_RSS_HASH_FLAGREG_RSS_HASH_FLAG 0x1574 atl1e.h 　
3610
 REG_BASE_CPU_NUMBERREG_BASE_CPU_NUMBER 0x157C atl1e.h 　
3611
 REG_TXQ_CTRLREG_TXQ_CTRL 0x1580 atl1e.h 　
3612
 TXQ_CTRL_NUM_TPD_BURST_MASKTXQ_CTRL_NUM_TPD_BURST_MASK 0xF atl1e.h 　
3613
 TXQ_CTRL_NUM_TPD_BURST_SHIFTTXQ_CTRL_NUM_TPD_BURST_SHIFT 0 atl1e.h 　
3614
 TXQ_CTRL_ENTXQ_CTRL_EN 0x20 atl1e.h 1: Enable TXQ
3615
 TXQ_CTRL_ENH_MODETXQ_CTRL_ENH_MODE 0x40 atl1e.h Performance enhancement mode, in which up to two back-to-back DMA read commands might be dispatched.
3616
 TXQ_CTRL_TXF_BURST_NUM_SHIFTTXQ_CTRL_TXF_BURST_NUM_SHIFT 16 atl1e.h Number of data byte to read in a cache-aligned burst. Each SRAM entry is 8-byte in length.
3617
 TXQ_CTRL_TXF_BURST_NUM_MASKTXQ_CTRL_TXF_BURST_NUM_MASK 0xffff atl1e.h 　
3618
 REG_TX_EARLY_THREG_TX_EARLY_TH 0x1584 atl1e.h Jumbo frame threshold in QWORD unit. Packet greater than
3619
 TX_TX_EARLY_TH_MASKTX_TX_EARLY_TH_MASK 0x7ff atl1e.h 　
3620
 TX_TX_EARLY_TH_SHIFTTX_TX_EARLY_TH_SHIFT 0 atl1e.h 　
3621
 REG_RXQ_CTRLREG_RXQ_CTRL 0x15A0 atl1e.h 　
3622
 RXQ_CTRL_PBA_ALIGN_32RXQ_CTRL_PBA_ALIGN_32 0 atl1e.h rx-packet alignment
3623
 RXQ_CTRL_PBA_ALIGN_64RXQ_CTRL_PBA_ALIGN_64 1 atl1e.h 　
3624
 RXQ_CTRL_PBA_ALIGN_128RXQ_CTRL_PBA_ALIGN_128 2 atl1e.h 　
3625
 RXQ_CTRL_PBA_ALIGN_256RXQ_CTRL_PBA_ALIGN_256 3 atl1e.h 　
3626
 RXQ_CTRL_Q1_ENRXQ_CTRL_Q1_EN 0x10 atl1e.h 　
3627
 RXQ_CTRL_Q2_ENRXQ_CTRL_Q2_EN 0x20 atl1e.h 　
3628
 RXQ_CTRL_Q3_ENRXQ_CTRL_Q3_EN 0x40 atl1e.h 　
3629
 RXQ_CTRL_IPV6_XSUM_VERIFY_ENRXQ_CTRL_IPV6_XSUM_VERIFY_EN 0x80 atl1e.h 　
3630
 RXQ_CTRL_HASH_TLEN_SHIFTRXQ_CTRL_HASH_TLEN_SHIFT 8 atl1e.h 　
3631
 RXQ_CTRL_HASH_TLEN_MASKRXQ_CTRL_HASH_TLEN_MASK 0xFF atl1e.h 　
3632
 RXQ_CTRL_HASH_TYPE_IPV4RXQ_CTRL_HASH_TYPE_IPV4 0x10000 atl1e.h 　
3633
 RXQ_CTRL_HASH_TYPE_IPV4_TCPRXQ_CTRL_HASH_TYPE_IPV4_TCP 0x20000 atl1e.h 　
3634
 RXQ_CTRL_HASH_TYPE_IPV6RXQ_CTRL_HASH_TYPE_IPV6 0x40000 atl1e.h 　
3635
 RXQ_CTRL_HASH_TYPE_IPV6_TCPRXQ_CTRL_HASH_TYPE_IPV6_TCP 0x80000 atl1e.h 　
3636
 RXQ_CTRL_RSS_MODE_DISABLERXQ_CTRL_RSS_MODE_DISABLE 0 atl1e.h 　
3637
 RXQ_CTRL_RSS_MODE_SQSINTRXQ_CTRL_RSS_MODE_SQSINT 0x4000000 atl1e.h 　
3638
 RXQ_CTRL_RSS_MODE_MQUESINTRXQ_CTRL_RSS_MODE_MQUESINT 0x8000000 atl1e.h 　
3639
 RXQ_CTRL_RSS_MODE_MQUEMINTRXQ_CTRL_RSS_MODE_MQUEMINT 0xC000000 atl1e.h 　
3640
 RXQ_CTRL_NIP_QUEUE_SEL_TBLRXQ_CTRL_NIP_QUEUE_SEL_TBL 0x10000000 atl1e.h 　
3641
 RXQ_CTRL_HASH_ENABLERXQ_CTRL_HASH_ENABLE 0x20000000 atl1e.h 　
3642
 RXQ_CTRL_CUT_THRU_ENRXQ_CTRL_CUT_THRU_EN 0x40000000 atl1e.h 　
3643
 RXQ_CTRL_ENRXQ_CTRL_EN 0x80000000 atl1e.h 　
3644
 REG_RXQ_JMBOSZ_RRDTIMREG_RXQ_JMBOSZ_RRDTIM 0x15A4 atl1e.h 　
3645
 RXQ_JMBOSZ_TH_MASKRXQ_JMBOSZ_TH_MASK 0x7ff atl1e.h 　
3646
 RXQ_JMBOSZ_TH_SHIFTRXQ_JMBOSZ_TH_SHIFT 0 atl1e.h RRD retirement timer. Decrement by 1 after every 512ns passes
3647
 RXQ_JMBO_LKAH_MASKRXQ_JMBO_LKAH_MASK 0xf atl1e.h 　
3648
 RXQ_JMBO_LKAH_SHIFTRXQ_JMBO_LKAH_SHIFT 11 atl1e.h 　
3649
 REG_RXQ_RXF_PAUSE_THRESHREG_RXQ_RXF_PAUSE_THRESH 0x15A8 atl1e.h 　
3650
 RXQ_RXF_PAUSE_TH_HI_SHIFTRXQ_RXF_PAUSE_TH_HI_SHIFT 0 atl1e.h 　
3651
 RXQ_RXF_PAUSE_TH_HI_MASKRXQ_RXF_PAUSE_TH_HI_MASK 0xfff atl1e.h 　
3652
 RXQ_RXF_PAUSE_TH_LO_SHIFTRXQ_RXF_PAUSE_TH_LO_SHIFT 16 atl1e.h 　
3653
 RXQ_RXF_PAUSE_TH_LO_MASKRXQ_RXF_PAUSE_TH_LO_MASK 0xfff atl1e.h 　
3654
 REG_DMA_CTRLREG_DMA_CTRL 0x15C0 atl1e.h 　
3655
 DMA_CTRL_DMAR_IN_ORDERDMA_CTRL_DMAR_IN_ORDER 0x1 atl1e.h 　
3656
 DMA_CTRL_DMAR_ENH_ORDERDMA_CTRL_DMAR_ENH_ORDER 0x2 atl1e.h 　
3657
 DMA_CTRL_DMAR_OUT_ORDERDMA_CTRL_DMAR_OUT_ORDER 0x4 atl1e.h 　
3658
 DMA_CTRL_RCB_VALUEDMA_CTRL_RCB_VALUE 0x8 atl1e.h 　
3659
 DMA_CTRL_DMAR_BURST_LEN_SHIFTDMA_CTRL_DMAR_BURST_LEN_SHIFT 4 atl1e.h 　
3660
 DMA_CTRL_DMAR_BURST_LEN_MASKDMA_CTRL_DMAR_BURST_LEN_MASK 7 atl1e.h 　
3661
 DMA_CTRL_DMAW_BURST_LEN_SHIFTDMA_CTRL_DMAW_BURST_LEN_SHIFT 7 atl1e.h 　
3662
 DMA_CTRL_DMAW_BURST_LEN_MASKDMA_CTRL_DMAW_BURST_LEN_MASK 7 atl1e.h 　
3663
 DMA_CTRL_DMAR_REQ_PRIDMA_CTRL_DMAR_REQ_PRI 0x400 atl1e.h 　
3664
 DMA_CTRL_DMAR_DLY_CNT_MASKDMA_CTRL_DMAR_DLY_CNT_MASK 0x1F atl1e.h 　
3665
 DMA_CTRL_DMAR_DLY_CNT_SHIFTDMA_CTRL_DMAR_DLY_CNT_SHIFT 11 atl1e.h 　
3666
 DMA_CTRL_DMAW_DLY_CNT_MASKDMA_CTRL_DMAW_DLY_CNT_MASK 0xF atl1e.h 　
3667
 DMA_CTRL_DMAW_DLY_CNT_SHIFTDMA_CTRL_DMAW_DLY_CNT_SHIFT 16 atl1e.h 　
3668
 DMA_CTRL_TXCMB_ENDMA_CTRL_TXCMB_EN 0x100000 atl1e.h 　
3669
 DMA_CTRL_RXCMB_ENDMA_CTRL_RXCMB_EN 0x200000 atl1e.h 　
3670
 REG_SMB_STAT_TIMERREG_SMB_STAT_TIMER 0x15C4 atl1e.h 　
3671
 REG_TRIG_RRD_THRESHREG_TRIG_RRD_THRESH 0x15CA atl1e.h 　
3672
 REG_TRIG_TPD_THRESHREG_TRIG_TPD_THRESH 0x15C8 atl1e.h 　
3673
 REG_TRIG_TXTIMERREG_TRIG_TXTIMER 0x15CC atl1e.h 　
3674
 REG_TRIG_RXTIMERREG_TRIG_RXTIMER 0x15CE atl1e.h 　
3675
 REG_HOST_RXF1_PAGE0_LOREG_HOST_RXF1_PAGE0_LO 0x15D0 atl1e.h 　
3676
 REG_HOST_RXF1_PAGE1_LOREG_HOST_RXF1_PAGE1_LO 0x15D4 atl1e.h 　
3677
 REG_HOST_RXF2_PAGE0_LOREG_HOST_RXF2_PAGE0_LO 0x15D8 atl1e.h 　
3678
 REG_HOST_RXF2_PAGE1_LOREG_HOST_RXF2_PAGE1_LO 0x15DC atl1e.h 　
3679
 REG_HOST_RXF3_PAGE0_LOREG_HOST_RXF3_PAGE0_LO 0x15E0 atl1e.h 　
3680
 REG_HOST_RXF3_PAGE1_LOREG_HOST_RXF3_PAGE1_LO 0x15E4 atl1e.h 　
3681
 REG_MB_RXF1_RADDRREG_MB_RXF1_RADDR 0x15B4 atl1e.h 　
3682
 REG_MB_RXF2_RADDRREG_MB_RXF2_RADDR 0x15B8 atl1e.h 　
3683
 REG_MB_RXF3_RADDRREG_MB_RXF3_RADDR 0x15BC atl1e.h 　
3684
 REG_MB_TPD_PROD_IDXREG_MB_TPD_PROD_IDX 0x15F0 atl1e.h 　
3685
 REG_HOST_RXF0_PAGE0_VLDREG_HOST_RXF0_PAGE0_VLD 0x15F4 atl1e.h 　
3686
 HOST_RXF_VALIDHOST_RXF_VALID 1 atl1e.h 　
3687
 HOST_RXF_PAGENO_SHIFTHOST_RXF_PAGENO_SHIFT 1 atl1e.h 　
3688
 HOST_RXF_PAGENO_MASKHOST_RXF_PAGENO_MASK 0x7F atl1e.h 　
3689
 REG_HOST_RXF0_PAGE1_VLDREG_HOST_RXF0_PAGE1_VLD 0x15F5 atl1e.h 　
3690
 REG_HOST_RXF1_PAGE0_VLDREG_HOST_RXF1_PAGE0_VLD 0x15F6 atl1e.h 　
3691
 REG_HOST_RXF1_PAGE1_VLDREG_HOST_RXF1_PAGE1_VLD 0x15F7 atl1e.h 　
3692
 REG_HOST_RXF2_PAGE0_VLDREG_HOST_RXF2_PAGE0_VLD 0x15F8 atl1e.h 　
3693
 REG_HOST_RXF2_PAGE1_VLDREG_HOST_RXF2_PAGE1_VLD 0x15F9 atl1e.h 　
3694
 REG_HOST_RXF3_PAGE0_VLDREG_HOST_RXF3_PAGE0_VLD 0x15FA atl1e.h 　
3695
 REG_HOST_RXF3_PAGE1_VLDREG_HOST_RXF3_PAGE1_VLD 0x15FB atl1e.h 　
3696
 REG_ISRREG_ISR 0x1600 atl1e.h 　
3697
 ISR_SMBISR_SMB 1 atl1e.h 　
3698
 ISR_TIMERISR_TIMER 2 atl1e.h Interrupt when Timer is counted down to zero
3699
 ISR_MANUALISR_MANUAL 4 atl1e.h 　
3700
 ISR_HW_RXF_OVISR_HW_RXF_OV 8 atl1e.h RXF overflow interrupt
3701
 ISR_HOST_RXF0_OVISR_HOST_RXF0_OV 0x10 atl1e.h 　
3702
 ISR_HOST_RXF1_OVISR_HOST_RXF1_OV 0x20 atl1e.h 　
3703
 ISR_HOST_RXF2_OVISR_HOST_RXF2_OV 0x40 atl1e.h 　
3704
 ISR_HOST_RXF3_OVISR_HOST_RXF3_OV 0x80 atl1e.h 　
3705
 ISR_TXF_UNISR_TXF_UN 0x100 atl1e.h 　
3706
 ISR_RX0_PAGE_FULLISR_RX0_PAGE_FULL 0x200 atl1e.h 　
3707
 ISR_DMAR_TO_RSTISR_DMAR_TO_RST 0x400 atl1e.h 　
3708
 ISR_DMAW_TO_RSTISR_DMAW_TO_RST 0x800 atl1e.h 　
3709
 ISR_GPHYISR_GPHY 0x1000 atl1e.h 　
3710
 ISR_TX_CREDITISR_TX_CREDIT 0x2000 atl1e.h 　
3711
 ISR_GPHY_LPWISR_GPHY_LPW 0x4000 atl1e.h GPHY low power state interrupt
3712
 ISR_RX_PKTISR_RX_PKT 0x10000 atl1e.h One packet received, triggered by RFD
3713
 ISR_TX_PKTISR_TX_PKT 0x20000 atl1e.h One packet transmitted, triggered by TPD
3714
 ISR_TX_DMAISR_TX_DMA 0x40000 atl1e.h 　
3715
 ISR_RX_PKT_1ISR_RX_PKT_1 0x80000 atl1e.h 　
3716
 ISR_RX_PKT_2ISR_RX_PKT_2 0x100000 atl1e.h 　
3717
 ISR_RX_PKT_3ISR_RX_PKT_3 0x200000 atl1e.h 　
3718
 ISR_MAC_RXISR_MAC_RX 0x400000 atl1e.h 　
3719
 ISR_MAC_TXISR_MAC_TX 0x800000 atl1e.h 　
3720
 ISR_UR_DETECTEDISR_UR_DETECTED 0x1000000 atl1e.h 　
3721
 ISR_FERR_DETECTEDISR_FERR_DETECTED 0x2000000 atl1e.h 　
3722
 ISR_NFERR_DETECTEDISR_NFERR_DETECTED 0x4000000 atl1e.h 　
3723
 ISR_CERR_DETECTEDISR_CERR_DETECTED 0x8000000 atl1e.h 　
3724
 ISR_PHY_LINKDOWNISR_PHY_LINKDOWN 0x10000000 atl1e.h 　
3725
 ISR_DIS_INTISR_DIS_INT 0x80000000 atl1e.h 　
3726
 REG_IMRREG_IMR 0x1604 atl1e.h 　
3727
 IMR_NORMAL_MASKIMR_NORMAL_MASK (\ ISR_SMB |\ ISR_TXF_UN |\ ISR_HW_RXF_OV |\ ISR_HOST_RXF0_OV|\ ISR_MANUAL |\ ISR_GPHY |\ ISR_GPHY_L atl1e.h 　
3728
 ISR_TX_EVENTISR_TX_EVENT (ISR_TXF_UN | ISR_TX_PKT) atl1e.h 　
3729
 ISR_RX_EVENTISR_RX_EVENT (ISR_HOST_RXF0_OV | ISR_HW_RXF_OV | ISR_RX_PKT) atl1e.h 　
3730
 REG_MAC_RX_STATUS_BINREG_MAC_RX_STATUS_BIN 0x1700 atl1e.h 　
3731
 REG_MAC_RX_STATUS_ENDREG_MAC_RX_STATUS_END 0x175c atl1e.h 　
3732
 REG_MAC_TX_STATUS_BINREG_MAC_TX_STATUS_BIN 0x1760 atl1e.h 　
3733
 REG_MAC_TX_STATUS_ENDREG_MAC_TX_STATUS_END 0x17c0 atl1e.h 　
3734
 REG_HOST_RXF0_PAGEOFFREG_HOST_RXF0_PAGEOFF 0x1800 atl1e.h 　
3735
 REG_TPD_CONS_IDXREG_TPD_CONS_IDX 0x1804 atl1e.h 　
3736
 REG_HOST_RXF1_PAGEOFFREG_HOST_RXF1_PAGEOFF 0x1808 atl1e.h 　
3737
 REG_HOST_RXF2_PAGEOFFREG_HOST_RXF2_PAGEOFF 0x180C atl1e.h 　
3738
 REG_HOST_RXF3_PAGEOFFREG_HOST_RXF3_PAGEOFF 0x1810 atl1e.h 　
3739
 REG_HOST_RXF0_MB0_LOREG_HOST_RXF0_MB0_LO 0x1820 atl1e.h 　
3740
 REG_HOST_RXF0_MB1_LOREG_HOST_RXF0_MB1_LO 0x1824 atl1e.h 　
3741
 REG_HOST_RXF1_MB0_LOREG_HOST_RXF1_MB0_LO 0x1828 atl1e.h 　
3742
 REG_HOST_RXF1_MB1_LOREG_HOST_RXF1_MB1_LO 0x182C atl1e.h 　
3743
 REG_HOST_RXF2_MB0_LOREG_HOST_RXF2_MB0_LO 0x1830 atl1e.h 　
3744
 REG_HOST_RXF2_MB1_LOREG_HOST_RXF2_MB1_LO 0x1834 atl1e.h 　
3745
 REG_HOST_RXF3_MB0_LOREG_HOST_RXF3_MB0_LO 0x1838 atl1e.h 　
3746
 REG_HOST_RXF3_MB1_LOREG_HOST_RXF3_MB1_LO 0x183C atl1e.h 　
3747
 REG_HOST_TX_CMB_LOREG_HOST_TX_CMB_LO 0x1840 atl1e.h 　
3748
 REG_HOST_SMB_ADDR_LOREG_HOST_SMB_ADDR_LO 0x1844 atl1e.h 　
3749
 REG_DEBUG_DATA0REG_DEBUG_DATA0 0x1900 atl1e.h 　
3750
 REG_DEBUG_DATA1REG_DEBUG_DATA1 0x1904 atl1e.h 　
3751
 MII_BMCRMII_BMCR 0x00 atl1e.h 　
3752
 MII_BMSRMII_BMSR 0x01 atl1e.h 　
3753
 MII_PHYSID1MII_PHYSID1 0x02 atl1e.h 　
3754
 MII_PHYSID2MII_PHYSID2 0x03 atl1e.h 　
3755
 MII_ADVERTISEMII_ADVERTISE 0x04 atl1e.h 　
3756
 MII_LPAMII_LPA 0x05 atl1e.h 　
3757
 MII_EXPANSIONMII_EXPANSION 0x06 atl1e.h 　
3758
 MII_AT001_CRMII_AT001_CR 0x09 atl1e.h 　
3759
 MII_AT001_SRMII_AT001_SR 0x0A atl1e.h 　
3760
 MII_AT001_ESRMII_AT001_ESR 0x0F atl1e.h 　
3761
 MII_AT001_PSCRMII_AT001_PSCR 0x10 atl1e.h 　
3762
 MII_AT001_PSSRMII_AT001_PSSR 0x11 atl1e.h 　
3763
 MII_INT_CTRLMII_INT_CTRL 0x12 atl1e.h 　
3764
 MII_INT_STATUSMII_INT_STATUS 0x13 atl1e.h 　
3765
 MII_SMARTSPEEDMII_SMARTSPEED 0x14 atl1e.h 　
3766
 MII_RERRCOUNTERMII_RERRCOUNTER 0x15 atl1e.h 　
3767
 MII_SREVISIONMII_SREVISION 0x16 atl1e.h 　
3768
 MII_RESV1MII_RESV1 0x17 atl1e.h 　
3769
 MII_LBRERRORMII_LBRERROR 0x18 atl1e.h 　
3770
 MII_PHYADDRMII_PHYADDR 0x19 atl1e.h 　
3771
 MII_RESV2MII_RESV2 0x1a atl1e.h 　
3772
 MII_TPISTATUSMII_TPISTATUS 0x1b atl1e.h 　
3773
 MII_NCONFIGMII_NCONFIG 0x1c atl1e.h 　
3774
 MII_DBG_ADDRMII_DBG_ADDR 0x1D atl1e.h 　
3775
 MII_DBG_DATAMII_DBG_DATA 0x1E atl1e.h 　
3776
 MII_CR_SPEED_SELECT_MSBMII_CR_SPEED_SELECT_MSB 0x0040 atl1e.h bits 6,13: 10=1000, 01=100, 00=10
3777
 MII_CR_COLL_TEST_ENABLEMII_CR_COLL_TEST_ENABLE 0x0080 atl1e.h Collision test enable
3778
 MII_CR_FULL_DUPLEXMII_CR_FULL_DUPLEX 0x0100 atl1e.h FDX =1, half duplex =0
3779
 MII_CR_RESTART_AUTO_NEGMII_CR_RESTART_AUTO_NEG 0x0200 atl1e.h Restart auto negotiation
3780
 MII_CR_ISOLATEMII_CR_ISOLATE 0x0400 atl1e.h Isolate PHY from MII
3781
 MII_CR_POWER_DOWNMII_CR_POWER_DOWN 0x0800 atl1e.h Power down
3782
 MII_CR_AUTO_NEG_ENMII_CR_AUTO_NEG_EN 0x1000 atl1e.h Auto Neg Enable
3783
 MII_CR_SPEED_SELECT_LSBMII_CR_SPEED_SELECT_LSB 0x2000 atl1e.h bits 6,13: 10=1000, 01=100, 00=10
3784
 MII_CR_LOOPBACKMII_CR_LOOPBACK 0x4000 atl1e.h 0 = normal, 1 = loopback
3785
 MII_CR_RESETMII_CR_RESET 0x8000 atl1e.h 0 = normal, 1 = PHY reset
3786
 MII_CR_SPEED_MASKMII_CR_SPEED_MASK 0x2040 atl1e.h 　
3787
 MII_CR_SPEED_1000MII_CR_SPEED_1000 0x0040 atl1e.h 　
3788
 MII_CR_SPEED_100MII_CR_SPEED_100 0x2000 atl1e.h 　
3789
 MII_CR_SPEED_10MII_CR_SPEED_10 0x0000 atl1e.h 　
3790
 MII_SR_EXTENDED_CAPSMII_SR_EXTENDED_CAPS 0x0001 atl1e.h Extended register capabilities
3791
 MII_SR_JABBER_DETECTMII_SR_JABBER_DETECT 0x0002 atl1e.h Jabber Detected
3792
 MII_SR_LINK_STATUSMII_SR_LINK_STATUS 0x0004 atl1e.h Link Status 1 = link
3793
 MII_SR_AUTONEG_CAPSMII_SR_AUTONEG_CAPS 0x0008 atl1e.h Auto Neg Capable
3794
 MII_SR_REMOTE_FAULTMII_SR_REMOTE_FAULT 0x0010 atl1e.h Remote Fault Detect
3795
 MII_SR_AUTONEG_COMPLETEMII_SR_AUTONEG_COMPLETE 0x0020 atl1e.h Auto Neg Complete
3796
 MII_SR_PREAMBLE_SUPPRESSMII_SR_PREAMBLE_SUPPRESS 0x0040 atl1e.h Preamble may be suppressed
3797
 MII_SR_EXTENDED_STATUSMII_SR_EXTENDED_STATUS 0x0100 atl1e.h Ext. status info in Reg 0x0F
3798
 MII_SR_100T2_HD_CAPSMII_SR_100T2_HD_CAPS 0x0200 atl1e.h 100T2 Half Duplex Capable
3799
 MII_SR_100T2_FD_CAPSMII_SR_100T2_FD_CAPS 0x0400 atl1e.h 100T2 Full Duplex Capable
3800
 MII_SR_10T_HD_CAPSMII_SR_10T_HD_CAPS 0x0800 atl1e.h 10T Half Duplex Capable
3801
 MII_SR_10T_FD_CAPSMII_SR_10T_FD_CAPS 0x1000 atl1e.h 10T Full Duplex Capable
3802
 MII_SR_100X_HD_CAPSMII_SR_100X_HD_CAPS 0x2000 atl1e.h 100X Half Duplex Capable
3803
 MII_SR_100X_FD_CAPSMII_SR_100X_FD_CAPS 0x4000 atl1e.h 100X Full Duplex Capable
3804
 MII_SR_100T4_CAPSMII_SR_100T4_CAPS 0x8000 atl1e.h 100T4 Capable
3805
 MII_LPA_SLCTMII_LPA_SLCT 0x001f atl1e.h Same as advertise selector
3806
 MII_LPA_10HALFMII_LPA_10HALF 0x0020 atl1e.h Can do 10mbps half-duplex
3807
 MII_LPA_10FULLMII_LPA_10FULL 0x0040 atl1e.h Can do 10mbps full-duplex
3808
 MII_LPA_100HALFMII_LPA_100HALF 0x0080 atl1e.h Can do 100mbps half-duplex
3809
 MII_LPA_100FULLMII_LPA_100FULL 0x0100 atl1e.h Can do 100mbps full-duplex
3810
 MII_LPA_100BASE4MII_LPA_100BASE4 0x0200 atl1e.h 100BASE-T4
3811
 MII_LPA_PAUSEMII_LPA_PAUSE 0x0400 atl1e.h PAUSE
3812
 MII_LPA_ASYPAUSEMII_LPA_ASYPAUSE 0x0800 atl1e.h Asymmetrical PAUSE
3813
 MII_LPA_RFAULTMII_LPA_RFAULT 0x2000 atl1e.h Link partner faulted
3814
 MII_LPA_LPACKMII_LPA_LPACK 0x4000 atl1e.h Link partner acked us
3815
 MII_LPA_NPAGEMII_LPA_NPAGE 0x8000 atl1e.h Next page bit
3816
 MII_AR_SELECTOR_FIELDMII_AR_SELECTOR_FIELD 0x0001 atl1e.h indicates IEEE 802.3 CSMA/CD
3817
 MII_AR_10T_HD_CAPSMII_AR_10T_HD_CAPS 0x0020 atl1e.h 10T Half Duplex Capable
3818
 MII_AR_10T_FD_CAPSMII_AR_10T_FD_CAPS 0x0040 atl1e.h 10T Full Duplex Capable
3819
 MII_AR_100TX_HD_CAPSMII_AR_100TX_HD_CAPS 0x0080 atl1e.h 100TX Half Duplex Capable
3820
 MII_AR_100TX_FD_CAPSMII_AR_100TX_FD_CAPS 0x0100 atl1e.h 100TX Full Duplex Capable
3821
 MII_AR_100T4_CAPSMII_AR_100T4_CAPS 0x0200 atl1e.h 100T4 Capable
3822
 MII_AR_PAUSEMII_AR_PAUSE 0x0400 atl1e.h Pause operation desired
3823
 MII_AR_ASM_DIRMII_AR_ASM_DIR 0x0800 atl1e.h Asymmetric Pause Direction bit
3824
 MII_AR_REMOTE_FAULTMII_AR_REMOTE_FAULT 0x2000 atl1e.h Remote Fault detected
3825
 MII_AR_NEXT_PAGEMII_AR_NEXT_PAGE 0x8000 atl1e.h Next Page ability supported
3826
 MII_AR_SPEED_MASKMII_AR_SPEED_MASK 0x01E0 atl1e.h 　
3827
 MII_AR_DEFAULT_CAP_MASKMII_AR_DEFAULT_CAP_MASK 0x0DE0 atl1e.h 　
3828
 MII_AT001_CR_1000T_HD_CAPSMII_AT001_CR_1000T_HD_CAPS 0x0100 atl1e.h Advertise 1000T HD capability
3829
 MII_AT001_CR_1000T_FD_CAPSMII_AT001_CR_1000T_FD_CAPS 0x0200 atl1e.h Advertise 1000T FD capability
3830
 MII_AT001_CR_1000T_REPEATER_DTEMII_AT001_CR_1000T_REPEATER_DTE 0x0400 atl1e.h 1=Repeater/switch device port
3831
 MII_AT001_CR_1000T_MS_VALUEMII_AT001_CR_1000T_MS_VALUE 0x0800 atl1e.h 1=Configure PHY as Master
3832
 MII_AT001_CR_1000T_MS_ENABLEMII_AT001_CR_1000T_MS_ENABLE 0x1000 atl1e.h 1=Master/Slave manual config value
3833
 MII_AT001_CR_1000T_TEST_MODE_NOMII_AT001_CR_1000T_TEST_MODE_NO 0x0000 atl1e.h Normal Operation
3834
 MII_AT001_CR_1000T_TEST_MODE_1MII_AT001_CR_1000T_TEST_MODE_1 0x2000 atl1e.h Transmit Waveform test
3835
 MII_AT001_CR_1000T_TEST_MODE_2MII_AT001_CR_1000T_TEST_MODE_2 0x4000 atl1e.h Master Transmit Jitter test
3836
 MII_AT001_CR_1000T_TEST_MODE_3MII_AT001_CR_1000T_TEST_MODE_3 0x6000 atl1e.h Slave Transmit Jitter test
3837
 MII_AT001_CR_1000T_TEST_MODE_4MII_AT001_CR_1000T_TEST_MODE_4 0x8000 atl1e.h Transmitter Distortion test
3838
 MII_AT001_CR_1000T_SPEED_MASKMII_AT001_CR_1000T_SPEED_MASK 0x0300 atl1e.h 　
3839
 MII_AT001_CR_1000T_DEFAULT_CAP_MII_AT001_CR_1000T_DEFAULT_CAP_ 0x0300 atl1e.h 　
3840
 MII_AT001_SR_1000T_LP_HD_CAPSMII_AT001_SR_1000T_LP_HD_CAPS 0x0400 atl1e.h LP is 1000T HD capable
3841
 MII_AT001_SR_1000T_LP_FD_CAPSMII_AT001_SR_1000T_LP_FD_CAPS 0x0800 atl1e.h LP is 1000T FD capable
3842
 MII_AT001_SR_1000T_REMOTE_RX_STMII_AT001_SR_1000T_REMOTE_RX_ST 0x1000 atl1e.h Remote receiver OK
3843
 MII_AT001_SR_1000T_LOCAL_RX_STAMII_AT001_SR_1000T_LOCAL_RX_STA 0x2000 atl1e.h Local receiver OK
3844
 MII_AT001_SR_1000T_MS_CONFIG_REMII_AT001_SR_1000T_MS_CONFIG_RE 0x4000 atl1e.h 1=Local TX is Master, 0=Slave
3845
 MII_AT001_SR_1000T_MS_CONFIG_FAMII_AT001_SR_1000T_MS_CONFIG_FA 0x8000 atl1e.h Master/Slave config fault
3846
 MII_AT001_SR_1000T_REMOTE_RX_STMII_AT001_SR_1000T_REMOTE_RX_ST 12 atl1e.h 　
3847
 MII_AT001_SR_1000T_LOCAL_RX_STAMII_AT001_SR_1000T_LOCAL_RX_STA 13 atl1e.h 　
3848
 MII_AT001_ESR_1000T_HD_CAPSMII_AT001_ESR_1000T_HD_CAPS 0x1000 atl1e.h 1000T HD capable
3849
 MII_AT001_ESR_1000T_FD_CAPSMII_AT001_ESR_1000T_FD_CAPS 0x2000 atl1e.h 1000T FD capable
3850
 MII_AT001_ESR_1000X_HD_CAPSMII_AT001_ESR_1000X_HD_CAPS 0x4000 atl1e.h 1000X HD capable
3851
 MII_AT001_ESR_1000X_FD_CAPSMII_AT001_ESR_1000X_FD_CAPS 0x8000 atl1e.h 1000X FD capable
3852
 MII_AT001_PSCR_JABBER_DISABLEMII_AT001_PSCR_JABBER_DISABLE 0x0001 atl1e.h 1=Jabber Function disabled
3853
 MII_AT001_PSCR_POLARITY_REVERSAMII_AT001_PSCR_POLARITY_REVERSA 0x0002 atl1e.h 1=Polarity Reversal enabled
3854
 MII_AT001_PSCR_SQE_TESTMII_AT001_PSCR_SQE_TEST 0x0004 atl1e.h 1=SQE Test enabled
3855
 MII_AT001_PSCR_MAC_POWERDOWNMII_AT001_PSCR_MAC_POWERDOWN 0x0008 atl1e.h 　
3856
 MII_AT001_PSCR_CLK125_DISABLEMII_AT001_PSCR_CLK125_DISABLE 0x0010 atl1e.h 1=CLK125 low,
3857
 MII_AT001_PSCR_MDI_MANUAL_MODEMII_AT001_PSCR_MDI_MANUAL_MODE 0x0000 atl1e.h MDI Crossover Mode bits 6:5
3858
 MII_AT001_PSCR_MDIX_MANUAL_MODEMII_AT001_PSCR_MDIX_MANUAL_MODE 0x0020 atl1e.h Manual MDIX configuration
3859
 MII_AT001_PSCR_AUTO_X_1000TMII_AT001_PSCR_AUTO_X_1000T 0x0040 atl1e.h 1000BASE-T: Auto crossover,
3860
 MII_AT001_PSCR_AUTO_X_MODEMII_AT001_PSCR_AUTO_X_MODE 0x0060 atl1e.h Auto crossover enabled
3861
 MII_AT001_PSCR_10BT_EXT_DIST_ENMII_AT001_PSCR_10BT_EXT_DIST_EN 0x0080 atl1e.h 　
3862
 MII_AT001_PSCR_MII_5BIT_ENABLEMII_AT001_PSCR_MII_5BIT_ENABLE 0x0100 atl1e.h 　
3863
 MII_AT001_PSCR_SCRAMBLER_DISABLMII_AT001_PSCR_SCRAMBLER_DISABL 0x0200 atl1e.h 1=Scrambler disable
3864
 MII_AT001_PSCR_FORCE_LINK_GOODMII_AT001_PSCR_FORCE_LINK_GOOD 0x0400 atl1e.h 1=Force link good
3865
 MII_AT001_PSCR_ASSERT_CRS_ON_TXMII_AT001_PSCR_ASSERT_CRS_ON_TX 0x0800 atl1e.h 1=Assert CRS on Transmit
3866
 MII_AT001_PSCR_POLARITY_REVERSAMII_AT001_PSCR_POLARITY_REVERSA 1 atl1e.h 　
3867
 MII_AT001_PSCR_AUTO_X_MODE_SHIFMII_AT001_PSCR_AUTO_X_MODE_SHIF 5 atl1e.h 　
3868
 MII_AT001_PSCR_10BT_EXT_DIST_ENMII_AT001_PSCR_10BT_EXT_DIST_EN 7 atl1e.h 　
3869
 MII_AT001_PSSR_SPD_DPLX_RESOLVEMII_AT001_PSSR_SPD_DPLX_RESOLVE 0x0800 atl1e.h 1=Speed & Duplex resolved
3870
 MII_AT001_PSSR_DPLXMII_AT001_PSSR_DPLX 0x2000 atl1e.h 1=Duplex 0=Half Duplex
3871
 MII_AT001_PSSR_SPEEDMII_AT001_PSSR_SPEED 0xC000 atl1e.h Speed, bits 14:15
3872
 MII_AT001_PSSR_10MBSMII_AT001_PSSR_10MBS 0x0000 atl1e.h 00=10Mbs
3873
 MII_AT001_PSSR_100MBSMII_AT001_PSSR_100MBS 0x4000 atl1e.h 01=100Mbs
3874
 MII_AT001_PSSR_1000MBSMII_AT001_PSSR_1000MBS 0x8000 atl1e.h 10=1000Mbs
3875
 B44_DEVCTRLB44_DEVCTRL 0x0000UL b44.h Device Control
3876
 DEVCTRL_MPMDEVCTRL_MPM 0x00000040 b44.h MP PME Enable (B0 only)
3877
 DEVCTRL_PFEDEVCTRL_PFE 0x00000080 b44.h Pattern Filtering Enable
3878
 DEVCTRL_IPPDEVCTRL_IPP 0x00000400 b44.h Internal EPHY Present
3879
 DEVCTRL_EPRDEVCTRL_EPR 0x00008000 b44.h EPHY Reset
3880
 DEVCTRL_PMEDEVCTRL_PME 0x00001000 b44.h PHY Mode Enable
3881
 DEVCTRL_PMCEDEVCTRL_PMCE 0x00002000 b44.h PHY Mode Clocks Enable
3882
 DEVCTRL_PADDRDEVCTRL_PADDR 0x0007c000 b44.h PHY Address
3883
 DEVCTRL_PADDR_SHIFTDEVCTRL_PADDR_SHIFT 18 b44.h 　
3884
 B44_BIST_STATB44_BIST_STAT 0x000CUL b44.h Built-In Self-Test Status
3885
 B44_WKUP_LENB44_WKUP_LEN 0x0010UL b44.h Wakeup Length
3886
 WKUP_LEN_P0_MASKWKUP_LEN_P0_MASK 0x0000007f b44.h Pattern 0
3887
 WKUP_LEN_D0WKUP_LEN_D0 0x00000080 b44.h 　
3888
 WKUP_LEN_P1_MASKWKUP_LEN_P1_MASK 0x00007f00 b44.h Pattern 1
3889
 WKUP_LEN_P1_SHIFTWKUP_LEN_P1_SHIFT 8 b44.h 　
3890
 WKUP_LEN_D1WKUP_LEN_D1 0x00008000 b44.h 　
3891
 WKUP_LEN_P2_MASKWKUP_LEN_P2_MASK 0x007f0000 b44.h Pattern 2
3892
 WKUP_LEN_P2_SHIFTWKUP_LEN_P2_SHIFT 16 b44.h 　
3893
 WKUP_LEN_D2WKUP_LEN_D2 0x00000000 b44.h 　
3894
 WKUP_LEN_P3_MASKWKUP_LEN_P3_MASK 0x7f000000 b44.h Pattern 3
3895
 WKUP_LEN_P3_SHIFTWKUP_LEN_P3_SHIFT 24 b44.h 　
3896
 WKUP_LEN_D3WKUP_LEN_D3 0x80000000 b44.h 　
3897
 WKUP_LEN_DISABLEWKUP_LEN_DISABLE 0x80808080 b44.h 　
3898
 WKUP_LEN_ENABLE_TWOWKUP_LEN_ENABLE_TWO 0x80800000 b44.h 　
3899
 WKUP_LEN_ENABLE_THREEWKUP_LEN_ENABLE_THREE 0x80000000 b44.h 　
3900
 B44_ISTATB44_ISTAT 0x0020UL b44.h Interrupt Status
3901
 ISTAT_LSISTAT_LS 0x00000020 b44.h Link Change (B0 only)
3902
 ISTAT_PMEISTAT_PME 0x00000040 b44.h Power Management Event
3903
 ISTAT_TOISTAT_TO 0x00000080 b44.h General Purpose Timeout
3904
 ISTAT_DSCEISTAT_DSCE 0x00000400 b44.h Descriptor Error
3905
 ISTAT_DATAEISTAT_DATAE 0x00000800 b44.h Data Error
3906
 ISTAT_DPEISTAT_DPE 0x00001000 b44.h Descr. Protocol Error
3907
 ISTAT_RDUISTAT_RDU 0x00002000 b44.h Receive Descr. Underflow
3908
 ISTAT_RFOISTAT_RFO 0x00004000 b44.h Receive FIFO Overflow
3909
 ISTAT_TFUISTAT_TFU 0x00008000 b44.h Transmit FIFO Underflow
3910
 ISTAT_RXISTAT_RX 0x00010000 b44.h RX Interrupt
3911
 ISTAT_TXISTAT_TX 0x01000000 b44.h TX Interrupt
3912
 ISTAT_EMACISTAT_EMAC 0x04000000 b44.h EMAC Interrupt
3913
 ISTAT_MII_WRITEISTAT_MII_WRITE 0x08000000 b44.h MII Write Interrupt
3914
 ISTAT_MII_READISTAT_MII_READ 0x10000000 b44.h MII Read Interrupt
3915
 ISTAT_ERRORSISTAT_ERRORS (ISTAT_DSCE|ISTAT_DATAE|ISTAT_DPE|\ ISTAT_RDU|ISTAT_RFO|ISTAT_TFU) b44.h 　
3916
 B44_IMASKB44_IMASK 0x0024UL b44.h Interrupt Mask
3917
 IMASK_DEFIMASK_DEF (ISTAT_ERRORS | ISTAT_RX | ISTAT_TX) b44.h 　
3918
 IMASK_DISABLEIMASK_DISABLE 0 b44.h 　
3919
 B44_GPTIMERB44_GPTIMER 0x0028UL b44.h General Purpose Timer
3920
 B44_ADDR_LOB44_ADDR_LO 0x0088UL b44.h ENET Address Lo (B0 only)
3921
 B44_ADDR_HIB44_ADDR_HI 0x008CUL b44.h ENET Address Hi (B0 only)
3922
 B44_FILT_ADDRB44_FILT_ADDR 0x0090UL b44.h ENET Filter Address
3923
 B44_FILT_DATAB44_FILT_DATA 0x0094UL b44.h ENET Filter Data
3924
 B44_TXBURSTB44_TXBURST 0x00A0UL b44.h TX Max Burst Length
3925
 B44_RXBURSTB44_RXBURST 0x00A4UL b44.h RX Max Burst Length
3926
 B44_MAC_CTRLB44_MAC_CTRL 0x00A8UL b44.h MAC Control
3927
 MAC_CTRL_CRC32_ENABMAC_CTRL_CRC32_ENAB 0x00000001 b44.h CRC32 Generation Enable
3928
 MAC_CTRL_PHY_PDOWNMAC_CTRL_PHY_PDOWN 0x00000004 b44.h Onchip EPHY Powerdown
3929
 MAC_CTRL_PHY_EDETMAC_CTRL_PHY_EDET 0x00000008 b44.h Onchip EPHY Energy Detected
3930
 MAC_CTRL_PHY_LEDCTRLMAC_CTRL_PHY_LEDCTRL 0x000000e0 b44.h Onchip EPHY LED Control
3931
 MAC_CTRL_PHY_LEDCTRL_SHIFTMAC_CTRL_PHY_LEDCTRL_SHIFT 5 b44.h 　
3932
 B44_MAC_FLOWB44_MAC_FLOW 0x00ACUL b44.h MAC Flow Control
3933
 MAC_FLOW_RX_HI_WATERMAC_FLOW_RX_HI_WATER 0x000000ff b44.h Receive FIFO HI Water Mark
3934
 MAC_FLOW_PAUSE_ENABMAC_FLOW_PAUSE_ENAB 0x00008000 b44.h Enbl Pause Frm Generation
3935
 B44_RCV_LAZYB44_RCV_LAZY 0x0100UL b44.h Lazy Interrupt Control
3936
 RCV_LAZY_TO_MASKRCV_LAZY_TO_MASK 0x00ffffff b44.h Timeout
3937
 RCV_LAZY_FC_MASKRCV_LAZY_FC_MASK 0xff000000 b44.h Frame Count
3938
 RCV_LAZY_FC_SHIFTRCV_LAZY_FC_SHIFT 24 b44.h 　
3939
 B44_DMATX_CTRLB44_DMATX_CTRL 0x0200UL b44.h DMA TX Control
3940
 DMATX_CTRL_ENABLEDMATX_CTRL_ENABLE 0x00000001 b44.h Enable
3941
 DMATX_CTRL_SUSPENDDMATX_CTRL_SUSPEND 0x00000002 b44.h Suepend Request
3942
 DMATX_CTRL_LPBACKDMATX_CTRL_LPBACK 0x00000004 b44.h Loopback Enable
3943
 DMATX_CTRL_FAIRPRIORDMATX_CTRL_FAIRPRIOR 0x00000008 b44.h Fair Priority
3944
 DMATX_CTRL_FLUSHDMATX_CTRL_FLUSH 0x00000010 b44.h Flush Request
3945
 B44_DMATX_ADDRB44_DMATX_ADDR 0x0204UL b44.h DMA TX Descriptor Ring Addr
3946
 B44_DMATX_PTRB44_DMATX_PTR 0x0208UL b44.h DMA TX Last Posted Desc.
3947
 B44_DMATX_STATB44_DMATX_STAT 0x020CUL b44.h DMA TX Cur Actve Desc. + Sts
3948
 DMATX_STAT_CDMASKDMATX_STAT_CDMASK 0x00000fff b44.h Current Descriptor Mask
3949
 DMATX_STAT_SMASKDMATX_STAT_SMASK 0x0000f000 b44.h State Mask
3950
 DMATX_STAT_SDISABLEDDMATX_STAT_SDISABLED 0x00000000 b44.h State Disabled
3951
 DMATX_STAT_SACTIVEDMATX_STAT_SACTIVE 0x00001000 b44.h State Active
3952
 DMATX_STAT_SIDLEDMATX_STAT_SIDLE 0x00002000 b44.h State Idle Wait
3953
 DMATX_STAT_SSTOPPEDDMATX_STAT_SSTOPPED 0x00003000 b44.h State Stopped
3954
 DMATX_STAT_SSUSPDMATX_STAT_SSUSP 0x00004000 b44.h State Suspend Pending
3955
 DMATX_STAT_EMASKDMATX_STAT_EMASK 0x000f0000 b44.h Error Mask
3956
 DMATX_STAT_ENONEDMATX_STAT_ENONE 0x00000000 b44.h Error None
3957
 DMATX_STAT_EDPEDMATX_STAT_EDPE 0x00010000 b44.h Error Desc. Protocol Error
3958
 DMATX_STAT_EDFUDMATX_STAT_EDFU 0x00020000 b44.h Error Data FIFO Underrun
3959
 DMATX_STAT_EBEBRDMATX_STAT_EBEBR 0x00030000 b44.h Bus Error on Buffer Read
3960
 DMATX_STAT_EBEDADMATX_STAT_EBEDA 0x00040000 b44.h Bus Error on Desc. Access
3961
 DMATX_STAT_FLUSHEDDMATX_STAT_FLUSHED 0x00100000 b44.h Flushed
3962
 B44_DMARX_CTRLB44_DMARX_CTRL 0x0210UL b44.h DMA RX Control
3963
 DMARX_CTRL_ENABLEDMARX_CTRL_ENABLE 0x00000001 b44.h Enable
3964
 DMARX_CTRL_ROMASKDMARX_CTRL_ROMASK 0x000000fe b44.h Receive Offset Mask
3965
 DMARX_CTRL_ROSHIFTDMARX_CTRL_ROSHIFT 1 b44.h Receive Offset Shift
3966
 B44_DMARX_ADDRB44_DMARX_ADDR 0x0214UL b44.h DMA RX Descriptor Ring Addr
3967
 B44_DMARX_PTRB44_DMARX_PTR 0x0218UL b44.h DMA RX Last Posted Desc
3968
 B44_DMARX_STATB44_DMARX_STAT 0x021CUL b44.h Cur Active Desc. + Status
3969
 DMARX_STAT_CDMASKDMARX_STAT_CDMASK 0x00000fff b44.h Current Descriptor Mask
3970
 DMARX_STAT_SMASKDMARX_STAT_SMASK 0x0000f000 b44.h State Mask
3971
 DMARX_STAT_SDISABLEDDMARX_STAT_SDISABLED 0x00000000 b44.h State Disbaled
3972
 DMARX_STAT_SACTIVEDMARX_STAT_SACTIVE 0x00001000 b44.h State Active
3973
 DMARX_STAT_SIDLEDMARX_STAT_SIDLE 0x00002000 b44.h State Idle Wait
3974
 DMARX_STAT_SSTOPPEDDMARX_STAT_SSTOPPED 0x00003000 b44.h State Stopped
3975
 DMARX_STAT_EMASKDMARX_STAT_EMASK 0x000f0000 b44.h Error Mask
3976
 DMARX_STAT_ENONEDMARX_STAT_ENONE 0x00000000 b44.h Error None
3977
 DMARX_STAT_EDPEDMARX_STAT_EDPE 0x00010000 b44.h Error Desc. Protocol Error
3978
 DMARX_STAT_EDFODMARX_STAT_EDFO 0x00020000 b44.h Error Data FIFO Overflow
3979
 DMARX_STAT_EBEBWDMARX_STAT_EBEBW 0x00030000 b44.h Error on Buffer Write
3980
 DMARX_STAT_EBEDADMARX_STAT_EBEDA 0x00040000 b44.h Bus Error on Desc. Access
3981
 B44_DMAFIFO_ADB44_DMAFIFO_AD 0x0220UL b44.h DMA FIFO Diag Address
3982
 DMAFIFO_AD_OMASKDMAFIFO_AD_OMASK 0x0000ffff b44.h Offset Mask
3983
 DMAFIFO_AD_SMASKDMAFIFO_AD_SMASK 0x000f0000 b44.h Select Mask
3984
 DMAFIFO_AD_SXDDDMAFIFO_AD_SXDD 0x00000000 b44.h Select Transmit DMA Data
3985
 DMAFIFO_AD_SXDPDMAFIFO_AD_SXDP 0x00010000 b44.h Sel Transmit DMA Pointers
3986
 DMAFIFO_AD_SRDDDMAFIFO_AD_SRDD 0x00040000 b44.h Select Receive DMA Data
3987
 DMAFIFO_AD_SRDPDMAFIFO_AD_SRDP 0x00050000 b44.h Sel Receive DMA Pointers
3988
 DMAFIFO_AD_SXFDDMAFIFO_AD_SXFD 0x00080000 b44.h Select Transmit FIFO Data
3989
 DMAFIFO_AD_SXFPDMAFIFO_AD_SXFP 0x00090000 b44.h Sel Transmit FIFO Pointers
3990
 DMAFIFO_AD_SRFDDMAFIFO_AD_SRFD 0x000c0000 b44.h Select Receive FIFO Data
3991
 DMAFIFO_AD_SRFPDMAFIFO_AD_SRFP 0x000c0000 b44.h Sel Receive FIFO Pointers
3992
 B44_DMAFIFO_LOB44_DMAFIFO_LO 0x0224UL b44.h DMA FIFO Diag Low Data
3993
 B44_DMAFIFO_HIB44_DMAFIFO_HI 0x0228UL b44.h DMA FIFO Diag High Data
3994
 B44_RXCONFIGB44_RXCONFIG 0x0400UL b44.h EMAC RX Config
3995
 RXCONFIG_DBCASTRXCONFIG_DBCAST 0x00000001 b44.h Disable Broadcast
3996
 RXCONFIG_ALLMULTIRXCONFIG_ALLMULTI 0x00000002 b44.h Accept All Multicast
3997
 RXCONFIG_NORX_WHILE_TXRXCONFIG_NORX_WHILE_TX 0x00000004 b44.h Rcv Disble While TX
3998
 RXCONFIG_PROMISCRXCONFIG_PROMISC 0x00000008 b44.h Promiscuous Enable
3999
 RXCONFIG_LPBACKRXCONFIG_LPBACK 0x00000010 b44.h Loopback Enable
4000
 RXCONFIG_FLOWRXCONFIG_FLOW 0x00000020 b44.h Flow Control Enable
4001
 RXCONFIG_FLOW_ACCEPTRXCONFIG_FLOW_ACCEPT 0x00000040 b44.h Accept UFC Frame
4002
 RXCONFIG_RFILTRXCONFIG_RFILT 0x00000080 b44.h Reject Filter
4003
 B44_RXMAXLENB44_RXMAXLEN 0x0404UL b44.h EMAC RX Max Packet Length
4004
 B44_TXMAXLENB44_TXMAXLEN 0x0408UL b44.h EMAC TX Max Packet Length
4005
 B44_MDIO_CTRLB44_MDIO_CTRL 0x0410UL b44.h EMAC MDIO Control
4006
 MDIO_CTRL_MAXF_MASKMDIO_CTRL_MAXF_MASK 0x0000007f b44.h MDC Frequency
4007
 MDIO_CTRL_PREAMBLEMDIO_CTRL_PREAMBLE 0x00000080 b44.h MII Preamble Enable
4008
 B44_MDIO_DATAB44_MDIO_DATA 0x0414UL b44.h EMAC MDIO Data
4009
 MDIO_DATA_DATAMDIO_DATA_DATA 0x0000ffff b44.h R/W Data
4010
 MDIO_DATA_TA_MASKMDIO_DATA_TA_MASK 0x00030000 b44.h Turnaround Value
4011
 MDIO_DATA_TA_SHIFTMDIO_DATA_TA_SHIFT 16 b44.h 　
4012
 MDIO_TA_VALIDMDIO_TA_VALID 2 b44.h 　
4013
 MDIO_DATA_RA_MASKMDIO_DATA_RA_MASK 0x007c0000 b44.h Register Address
4014
 MDIO_DATA_RA_SHIFTMDIO_DATA_RA_SHIFT 18 b44.h 　
4015
 MDIO_DATA_PMD_MASKMDIO_DATA_PMD_MASK 0x0f800000 b44.h Physical Media Device
4016
 MDIO_DATA_PMD_SHIFTMDIO_DATA_PMD_SHIFT 23 b44.h 　
4017
 MDIO_DATA_OP_MASKMDIO_DATA_OP_MASK 0x30000000 b44.h Opcode
4018
 MDIO_DATA_OP_SHIFTMDIO_DATA_OP_SHIFT 28 b44.h 　
4019
 MDIO_OP_WRITEMDIO_OP_WRITE 1 b44.h 　
4020
 MDIO_OP_READMDIO_OP_READ 2 b44.h 　
4021
 MDIO_DATA_SB_MASKMDIO_DATA_SB_MASK 0xc0000000 b44.h Start Bits
4022
 MDIO_DATA_SB_SHIFTMDIO_DATA_SB_SHIFT 30 b44.h 　
4023
 MDIO_DATA_SB_STARTMDIO_DATA_SB_START 0x40000000 b44.h Start Of Frame
4024
 B44_EMAC_IMASKB44_EMAC_IMASK 0x0418UL b44.h EMAC Interrupt Mask
4025
 B44_EMAC_ISTATB44_EMAC_ISTAT 0x041CUL b44.h EMAC Interrupt Status
4026
 EMAC_INT_MIIEMAC_INT_MII 0x00000001 b44.h MII MDIO Interrupt
4027
 EMAC_INT_MIBEMAC_INT_MIB 0x00000002 b44.h MIB Interrupt
4028
 EMAC_INT_FLOWEMAC_INT_FLOW 0x00000003 b44.h Flow Control Interrupt
4029
 B44_CAM_DATA_LOB44_CAM_DATA_LO 0x0420UL b44.h EMAC CAM Data Low
4030
 B44_CAM_DATA_HIB44_CAM_DATA_HI 0x0424UL b44.h EMAC CAM Data High
4031
 CAM_DATA_HI_VALIDCAM_DATA_HI_VALID 0x00010000 b44.h Valid Bit
4032
 B44_CAM_CTRLB44_CAM_CTRL 0x0428UL b44.h EMAC CAM Control
4033
 CAM_CTRL_ENABLECAM_CTRL_ENABLE 0x00000001 b44.h CAM Enable
4034
 CAM_CTRL_MSELCAM_CTRL_MSEL 0x00000002 b44.h Mask Select
4035
 CAM_CTRL_READCAM_CTRL_READ 0x00000004 b44.h Read
4036
 CAM_CTRL_WRITECAM_CTRL_WRITE 0x00000008 b44.h Read
4037
 CAM_CTRL_INDEX_MASKCAM_CTRL_INDEX_MASK 0x003f0000 b44.h Index Mask
4038
 CAM_CTRL_INDEX_SHIFTCAM_CTRL_INDEX_SHIFT 16 b44.h 　
4039
 CAM_CTRL_BUSYCAM_CTRL_BUSY 0x80000000 b44.h CAM Busy
4040
 B44_ENET_CTRLB44_ENET_CTRL 0x042CUL b44.h EMAC ENET Control
4041
 ENET_CTRL_ENABLEENET_CTRL_ENABLE 0x00000001 b44.h EMAC Enable
4042
 ENET_CTRL_DISABLEENET_CTRL_DISABLE 0x00000002 b44.h EMAC Disable
4043
 ENET_CTRL_SRSTENET_CTRL_SRST 0x00000004 b44.h EMAC Soft Reset
4044
 ENET_CTRL_EPSELENET_CTRL_EPSEL 0x00000008 b44.h External PHY Select
4045
 B44_TX_CTRLB44_TX_CTRL 0x0430UL b44.h EMAC TX Control
4046
 TX_CTRL_DUPLEXTX_CTRL_DUPLEX 0x00000001 b44.h Full Duplex
4047
 TX_CTRL_FMODETX_CTRL_FMODE 0x00000002 b44.h Flow Mode
4048
 TX_CTRL_SBENABTX_CTRL_SBENAB 0x00000004 b44.h Single Backoff Enable
4049
 TX_CTRL_SMALL_SLOTTX_CTRL_SMALL_SLOT 0x00000008 b44.h Small Slottime
4050
 B44_TX_HIWMARKB44_TX_HIWMARK 0x0434UL b44.h EMAC TX High Watermark
4051
 TX_HIWMARK_DEFLTTX_HIWMARK_DEFLT 56 b44.h Default used in all drivers
4052
 B44_MIB_CTRLB44_MIB_CTRL 0x0438UL b44.h EMAC MIB Control
4053
 MIB_CTRL_CLR_ON_READMIB_CTRL_CLR_ON_READ 0x00000001 b44.h Autoclear on Read
4054
 B44_TX_GOOD_OB44_TX_GOOD_O 0x0500UL b44.h MIB TX Good Octets
4055
 B44_TX_GOOD_PB44_TX_GOOD_P 0x0504UL b44.h MIB TX Good Packets
4056
 B44_TX_OB44_TX_O 0x0508UL b44.h MIB TX Octets
4057
 B44_TX_PB44_TX_P 0x050CUL b44.h MIB TX Packets
4058
 B44_TX_BCASTB44_TX_BCAST 0x0510UL b44.h MIB TX Broadcast Packets
4059
 B44_TX_MCASTB44_TX_MCAST 0x0514UL b44.h MIB TX Multicast Packets
4060
 B44_TX_64B44_TX_64 0x0518UL b44.h MIB TX <= 64 byte Packets
4061
 B44_TX_65_127B44_TX_65_127 0x051CUL b44.h MIB TX 65 to 127 byte Pkts
4062
 B44_TX_128_255B44_TX_128_255 0x0520UL b44.h MIB TX 128 to 255 byte Pkts
4063
 B44_TX_256_511B44_TX_256_511 0x0524UL b44.h MIB TX 256 to 511 byte Pkts
4064
 B44_TX_512_1023B44_TX_512_1023 0x0528UL b44.h MIB TX 512 to 1023 byte Pkts
4065
 B44_TX_1024_MAXB44_TX_1024_MAX 0x052CUL b44.h MIB TX 1024 to max byte Pkts
4066
 B44_TX_JABBERB44_TX_JABBER 0x0530UL b44.h MIB TX Jabber Packets
4067
 B44_TX_OSIZEB44_TX_OSIZE 0x0534UL b44.h MIB TX Oversize Packets
4068
 B44_TX_FRAGB44_TX_FRAG 0x0538UL b44.h MIB TX Fragment Packets
4069
 B44_TX_URUNSB44_TX_URUNS 0x053CUL b44.h MIB TX Underruns
4070
 B44_TX_TCOLSB44_TX_TCOLS 0x0540UL b44.h MIB TX Total Collisions
4071
 B44_TX_SCOLSB44_TX_SCOLS 0x0544UL b44.h MIB TX Single Collisions
4072
 B44_TX_MCOLSB44_TX_MCOLS 0x0548UL b44.h MIB TX Multiple Collisions
4073
 B44_TX_ECOLSB44_TX_ECOLS 0x054CUL b44.h MIB TX Excessive Collisions
4074
 B44_TX_LCOLSB44_TX_LCOLS 0x0550UL b44.h MIB TX Late Collisions
4075
 B44_TX_DEFEREDB44_TX_DEFERED 0x0554UL b44.h MIB TX Defered Packets
4076
 B44_TX_CLOSTB44_TX_CLOST 0x0558UL b44.h MIB TX Carrier Lost
4077
 B44_TX_PAUSEB44_TX_PAUSE 0x055CUL b44.h MIB TX Pause Packets
4078
 B44_RX_GOOD_OB44_RX_GOOD_O 0x0580UL b44.h MIB RX Good Octets
4079
 B44_RX_GOOD_PB44_RX_GOOD_P 0x0584UL b44.h MIB RX Good Packets
4080
 B44_RX_OB44_RX_O 0x0588UL b44.h MIB RX Octets
4081
 B44_RX_PB44_RX_P 0x058CUL b44.h MIB RX Packets
4082
 B44_RX_BCASTB44_RX_BCAST 0x0590UL b44.h MIB RX Broadcast Packets
4083
 B44_RX_MCASTB44_RX_MCAST 0x0594UL b44.h MIB RX Multicast Packets
4084
 B44_RX_64B44_RX_64 0x0598UL b44.h MIB RX <= 64 byte Packets
4085
 B44_RX_65_127B44_RX_65_127 0x059CUL b44.h MIB RX 65 to 127 byte Pkts
4086
 B44_RX_128_255B44_RX_128_255 0x05A0UL b44.h MIB RX 128 to 255 byte Pkts
4087
 B44_RX_256_511B44_RX_256_511 0x05A4UL b44.h MIB RX 256 to 511 byte Pkts
4088
 B44_RX_512_1023B44_RX_512_1023 0x05A8UL b44.h MIB RX 512 to 1023 byte Pkts
4089
 B44_RX_1024_MAXB44_RX_1024_MAX 0x05ACUL b44.h MIB RX 1024 to max byte Pkts
4090
 B44_RX_JABBERB44_RX_JABBER 0x05B0UL b44.h MIB RX Jabber Packets
4091
 B44_RX_OSIZEB44_RX_OSIZE 0x05B4UL b44.h MIB RX Oversize Packets
4092
 B44_RX_FRAGB44_RX_FRAG 0x05B8UL b44.h MIB RX Fragment Packets
4093
 B44_RX_MISSB44_RX_MISS 0x05BCUL b44.h MIB RX Missed Packets
4094
 B44_RX_CRCAB44_RX_CRCA 0x05C0UL b44.h MIB RX CRC Align Errors
4095
 B44_RX_USIZEB44_RX_USIZE 0x05C4UL b44.h MIB RX Undersize Packets
4096
 B44_RX_CRCB44_RX_CRC 0x05C8UL b44.h MIB RX CRC Errors
4097
 B44_RX_ALIGNB44_RX_ALIGN 0x05CCUL b44.h MIB RX Align Errors
4098
 B44_RX_SYMB44_RX_SYM 0x05D0UL b44.h MIB RX Symbol Errors
4099
 B44_RX_PAUSEB44_RX_PAUSE 0x05D4UL b44.h MIB RX Pause Packets
4100
 B44_RX_NPAUSEB44_RX_NPAUSE 0x05D8UL b44.h MIB RX Non-Pause Packets
4101
 B44_SBIMSTATEB44_SBIMSTATE 0x0F90UL b44.h SB Initiator Agent State
4102
 SBIMSTATE_PCSBIMSTATE_PC 0x0000000f b44.h Pipe Count
4103
 SBIMSTATE_AP_MASKSBIMSTATE_AP_MASK 0x00000030 b44.h Arbitration Priority
4104
 SBIMSTATE_AP_BOTHSBIMSTATE_AP_BOTH 0x00000000 b44.h both timeslices and token
4105
 SBIMSTATE_AP_TSSBIMSTATE_AP_TS 0x00000010 b44.h Use timeslices only
4106
 SBIMSTATE_AP_TKSBIMSTATE_AP_TK 0x00000020 b44.h Use token only
4107
 SBIMSTATE_AP_RSVSBIMSTATE_AP_RSV 0x00000030 b44.h Reserved
4108
 SBIMSTATE_IBESBIMSTATE_IBE 0x00020000 b44.h In Band Error
4109
 SBIMSTATE_TOSBIMSTATE_TO 0x00040000 b44.h Timeout
4110
 SBIMSTATE_BADSBIMSTATE_BAD ( SBIMSTATE_IBE | SBIMSTATE_TO ) b44.h 　
4111
 B44_SBINTVECB44_SBINTVEC 0x0F94UL b44.h SB Interrupt Mask
4112
 SBINTVEC_PCISBINTVEC_PCI 0x00000001 b44.h Enable interrupts for PCI
4113
 SBINTVEC_ENET0SBINTVEC_ENET0 0x00000002 b44.h Enable ints for enet 0
4114
 SBINTVEC_ILINE20SBINTVEC_ILINE20 0x00000004 b44.h Enable ints for iline20
4115
 SBINTVEC_CODECSBINTVEC_CODEC 0x00000008 b44.h Enable ints for v90 codec
4116
 SBINTVEC_USBSBINTVEC_USB 0x00000010 b44.h Enable intts for usb
4117
 SBINTVEC_EXTIFSBINTVEC_EXTIF 0x00000020 b44.h Enable ints for ext i/f
4118
 SBINTVEC_ENET1SBINTVEC_ENET1 0x00000040 b44.h Enable ints for enet 1
4119
 B44_SBTMSLOWB44_SBTMSLOW 0x0F98UL b44.h SB Target State Low
4120
 SBTMSLOW_RESETSBTMSLOW_RESET 0x00000001 b44.h Reset
4121
 SBTMSLOW_REJECTSBTMSLOW_REJECT 0x00000002 b44.h Reject
4122
 SBTMSLOW_CLOCKSBTMSLOW_CLOCK 0x00010000 b44.h Clock Enable
4123
 SBTMSLOW_FGCSBTMSLOW_FGC 0x00020000 b44.h Force Gated Clocks On
4124
 SBTMSLOW_PESBTMSLOW_PE 0x40000000 b44.h Power Management Enable
4125
 SBTMSLOW_BESBTMSLOW_BE 0x80000000 b44.h BIST Enable
4126
 B44_SBTMSHIGHB44_SBTMSHIGH 0x0F9CUL b44.h SB Target State High
4127
 SBTMSHIGH_SERRSBTMSHIGH_SERR 0x00000001 b44.h S-error
4128
 SBTMSHIGH_INTSBTMSHIGH_INT 0x00000002 b44.h Interrupt
4129
 SBTMSHIGH_BUSYSBTMSHIGH_BUSY 0x00000004 b44.h Busy
4130
 SBTMSHIGH_GCRSBTMSHIGH_GCR 0x20000000 b44.h Gated Clock Request
4131
 SBTMSHIGH_BISTFSBTMSHIGH_BISTF 0x40000000 b44.h BIST Failed
4132
 SBTMSHIGH_BISTDSBTMSHIGH_BISTD 0x80000000 b44.h BIST Done
4133
 B44_SBIDHIGHB44_SBIDHIGH 0x0FFCUL b44.h SB Identification High
4134
 SBIDHIGH_RC_MASKSBIDHIGH_RC_MASK 0x0000000f b44.h Revision Code
4135
 SBIDHIGH_CC_MASKSBIDHIGH_CC_MASK 0x0000fff0 b44.h Core Code
4136
 SBIDHIGH_CC_SHIFTSBIDHIGH_CC_SHIFT 4 b44.h 　
4137
 SBIDHIGH_VC_MASKSBIDHIGH_VC_MASK 0xffff0000 b44.h Vendor Code
4138
 SBIDHIGH_VC_SHIFTSBIDHIGH_VC_SHIFT 16 b44.h 　
4139
 SSB_PMCSRSSB_PMCSR 0x44 b44.h 　
4140
 SSB_PESSB_PE 0x100 b44.h 　
4141
 SSB_BAR0_WINSSB_BAR0_WIN 0x80 b44.h 　
4142
 SSB_BAR1_WINSSB_BAR1_WIN 0x84 b44.h 　
4143
 SSB_SPROM_CONTROLSSB_SPROM_CONTROL 0x88 b44.h 　
4144
 SSB_BAR1_CONTROLSSB_BAR1_CONTROL 0x8c b44.h 　
4145
 SSB_CONTROLSSB_CONTROL 0x0000UL b44.h 　
4146
 SSB_ARBCONTROLSSB_ARBCONTROL 0x0010UL b44.h 　
4147
 SSB_ISTATSSB_ISTAT 0x0020UL b44.h 　
4148
 SSB_IMASKSSB_IMASK 0x0024UL b44.h 　
4149
 SSB_MBOXSSB_MBOX 0x0028UL b44.h 　
4150
 SSB_BCAST_ADDRSSB_BCAST_ADDR 0x0050UL b44.h 　
4151
 SSB_BCAST_DATASSB_BCAST_DATA 0x0054UL b44.h 　
4152
 SSB_PCI_TRANS_0SSB_PCI_TRANS_0 0x0100UL b44.h 　
4153
 SSB_PCI_TRANS_1SSB_PCI_TRANS_1 0x0104UL b44.h 　
4154
 SSB_PCI_TRANS_2SSB_PCI_TRANS_2 0x0108UL b44.h 　
4155
 SSB_SPROMSSB_SPROM 0x0800UL b44.h 　
4156
 SSB_PCI_MEMSSB_PCI_MEM 0x00000000 b44.h 　
4157
 SSB_PCI_IOSSB_PCI_IO 0x00000001 b44.h 　
4158
 SSB_PCI_CFG0SSB_PCI_CFG0 0x00000002 b44.h 　
4159
 SSB_PCI_CFG1SSB_PCI_CFG1 0x00000003 b44.h 　
4160
 SSB_PCI_PREFSSB_PCI_PREF 0x00000004 b44.h 　
4161
 SSB_PCI_BURSTSSB_PCI_BURST 0x00000008 b44.h 　
4162
 SSB_PCI_MASK0SSB_PCI_MASK0 0xfc000000 b44.h 　
4163
 SSB_PCI_MASK1SSB_PCI_MASK1 0xfc000000 b44.h 　
4164
 SSB_PCI_MASK2SSB_PCI_MASK2 0xc0000000 b44.h 　
4165
 B44_MII_AUXCTRLB44_MII_AUXCTRL 24 b44.h Auxiliary Control
4166
 MII_AUXCTRL_DUPLEXMII_AUXCTRL_DUPLEX 0x0001 b44.h Full Duplex
4167
 MII_AUXCTRL_SPEEDMII_AUXCTRL_SPEED 0x0002 b44.h 1=100Mbps, 0=10Mbps
4168
 MII_AUXCTRL_FORCEDMII_AUXCTRL_FORCED 0x0004 b44.h Forced 10/100
4169
 B44_MII_ALEDCTRLB44_MII_ALEDCTRL 26 b44.h Activity LED
4170
 MII_ALEDCTRL_ALLMSKMII_ALEDCTRL_ALLMSK 0x7fff b44.h 　
4171
 B44_MII_TLEDCTRLB44_MII_TLEDCTRL 27 b44.h Traffic Meter LED
4172
 MII_TLEDCTRL_ENABLEMII_TLEDCTRL_ENABLE 0x0040 b44.h 　
4173
 B44_DMA_ALIGNMENTB44_DMA_ALIGNMENT 4096 b44.h 　
4174
 B44_30BIT_DMA_MASKB44_30BIT_DMA_MASK 0x3fffffff b44.h 　
4175
 DESC_CTRL_LENDESC_CTRL_LEN 0x00001fff b44.h 　
4176
 DESC_CTRL_CMASKDESC_CTRL_CMASK 0x0ff00000 b44.h Core specific bits
4177
 DESC_CTRL_EOTDESC_CTRL_EOT 0x10000000 b44.h End of Table
4178
 DESC_CTRL_IOCDESC_CTRL_IOC 0x20000000 b44.h Interrupt On Completion
4179
 DESC_CTRL_EOFDESC_CTRL_EOF 0x40000000 b44.h End of Frame
4180
 DESC_CTRL_SOFDESC_CTRL_SOF 0x80000000 b44.h Start of Frame
4181
 RX_HEADER_LENRX_HEADER_LEN 28 b44.h 　
4182
 RX_FLAG_OFIFORX_FLAG_OFIFO 0x00000001 b44.h FIFO Overflow
4183
 RX_FLAG_CRCERRRX_FLAG_CRCERR 0x00000002 b44.h CRC Error
4184
 RX_FLAG_SERRRX_FLAG_SERR 0x00000004 b44.h Receive Symbol Error
4185
 RX_FLAG_ODDRX_FLAG_ODD 0x00000008 b44.h Frame has odd number of nibbles
4186
 RX_FLAG_LARGERX_FLAG_LARGE 0x00000010 b44.h Frame is > RX MAX Length
4187
 RX_FLAG_MCASTRX_FLAG_MCAST 0x00000020 b44.h Dest is Multicast Address
4188
 RX_FLAG_BCASTRX_FLAG_BCAST 0x00000040 b44.h Dest is Broadcast Address
4189
 RX_FLAG_MISSRX_FLAG_MISS 0x00000080 b44.h Received due to promisc mode
4190
 RX_FLAG_LASTRX_FLAG_LAST 0x00000800 b44.h Last buffer in frame
4191
 RX_FLAG_ERRORSRX_FLAG_ERRORS (RX_FLAG_ODD | RX_FLAG_SERR |\ RX_FLAG_CRCERR | RX_FLAG_OFIFO) b44.h 　
4192
 SB_PCI_DMASB_PCI_DMA 0x40000000 b44.h 　
4193
 BCM4400_PCI_CORE_ADDRBCM4400_PCI_CORE_ADDR 0x18002000 b44.h 　
4194
 B44_MIN_MTUB44_MIN_MTU 60 b44.h 　
4195
 B44_MAX_MTUB44_MAX_MTU 1500 b44.h 　
4196
 B44_RING_SIZEB44_RING_SIZE 8 b44.h 　
4197
 B44_RING_LASTB44_RING_LAST ( B44_RING_SIZE - 1 ) b44.h 　
4198
 B44_RX_RING_LEN_BYTESB44_RX_RING_LEN_BYTES ( sizeof bp->rx[0] * B44_RING_SIZE ) b44.h 　
4199
 B44_TX_RING_LEN_BYTESB44_TX_RING_LEN_BYTES ( sizeof bp->tx[0] * B44_RING_SIZE ) b44.h 　
4200
 RX_PKT_OFFSETRX_PKT_OFFSET 30 b44.h 　
4201
 RX_PKT_BUF_SZRX_PKT_BUF_SZ (1536 + RX_PKT_OFFSET + 64) b44.h 　
4202
 B44_FULL_RESETB44_FULL_RESET 1 b44.h 　
4203
 B44_FULL_RESET_SKIP_PHYB44_FULL_RESET_SKIP_PHY 2 b44.h 　
4204
 B44_PARTIAL_RESETB44_PARTIAL_RESET 3 b44.h 　
4205
 B44_CHIP_RESET_FULLB44_CHIP_RESET_FULL 4 b44.h 　
4206
 B44_CHIP_RESET_PARTIALB44_CHIP_RESET_PARTIAL 5 b44.h 　
4207
 SSB_CORE_DOWNSSB_CORE_DOWN ( SBTMSLOW_RESET | SBTMSLOW_REJECT ) b44.h 　
4208
 B44_REGS_SIZEB44_REGS_SIZE 8192 b44.h 　
4209
 L1_CACHE_BYTESL1_CACHE_BYTES 128 bnx2.h Rough approximaition of the cache line size
4210
 PCI_D0PCI_D0 ((pci_power_t) 0) bnx2.h 　
4211
 PCI_D1PCI_D1 ((pci_power_t) 1) bnx2.h 　
4212
 PCI_D2PCI_D2 ((pci_power_t) 2) bnx2.h 　
4213
 PCI_D3hotPCI_D3hot ((pci_power_t) 3) bnx2.h 　
4214
 PCI_D3coldPCI_D3cold ((pci_power_t) 4) bnx2.h 　
4215
 PCI_UNKNOWNPCI_UNKNOWN ((pci_power_t) 5) bnx2.h 　
4216
 PCI_POWER_ERRORPCI_POWER_ERROR ((pci_power_t) -1) bnx2.h 　
4217
 PCI_CAP_ID_PCIXPCI_CAP_ID_PCIX 0x07 bnx2.h PCI-X
4218
 PCI_X_CMDPCI_X_CMD 2 bnx2.h Modes & Features
4219
 PCI_X_CMD_EROPCI_X_CMD_ERO 0x0002 bnx2.h Enable Relaxed Ordering
4220
 ADVERTISED_10baseT_HalfADVERTISED_10baseT_Half (1 << 0) bnx2.h 　
4221
 ADVERTISED_10baseT_FullADVERTISED_10baseT_Full (1 << 1) bnx2.h 　
4222
 ADVERTISED_100baseT_HalfADVERTISED_100baseT_Half (1 << 2) bnx2.h 　
4223
 ADVERTISED_100baseT_FullADVERTISED_100baseT_Full (1 << 3) bnx2.h 　
4224
 ADVERTISED_1000baseT_HalfADVERTISED_1000baseT_Half (1 << 4) bnx2.h 　
4225
 ADVERTISED_1000baseT_FullADVERTISED_1000baseT_Full (1 << 5) bnx2.h 　
4226
 ADVERTISED_AutonegADVERTISED_Autoneg (1 << 6) bnx2.h 　
4227
 ADVERTISED_TPADVERTISED_TP (1 << 7) bnx2.h 　
4228
 ADVERTISED_AUIADVERTISED_AUI (1 << 8) bnx2.h 　
4229
 ADVERTISED_MIIADVERTISED_MII (1 << 9) bnx2.h 　
4230
 ADVERTISED_FIBREADVERTISED_FIBRE (1 << 10) bnx2.h 　
4231
 ADVERTISED_BNCADVERTISED_BNC (1 << 11) bnx2.h 　
4232
 DUPLEX_HALFDUPLEX_HALF 0x00 bnx2.h 　
4233
 DUPLEX_FULLDUPLEX_FULL 0x01 bnx2.h 　
4234
 DUPLEX_INVALIDDUPLEX_INVALID 0x02 bnx2.h 　
4235
 PORT_TPPORT_TP 0x00 bnx2.h 　
4236
 PORT_AUIPORT_AUI 0x01 bnx2.h 　
4237
 PORT_MIIPORT_MII 0x02 bnx2.h 　
4238
 PORT_FIBREPORT_FIBRE 0x03 bnx2.h 　
4239
 PORT_BNCPORT_BNC 0x04 bnx2.h 　
4240
 XCVR_INTERNALXCVR_INTERNAL 0x00 bnx2.h 　
4241
 XCVR_EXTERNALXCVR_EXTERNAL 0x01 bnx2.h 　
4242
 XCVR_DUMMY1XCVR_DUMMY1 0x02 bnx2.h 　
4243
 XCVR_DUMMY2XCVR_DUMMY2 0x03 bnx2.h 　
4244
 XCVR_DUMMY3XCVR_DUMMY3 0x04 bnx2.h 　
4245
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 bnx2.h 　
4246
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 bnx2.h 　
4247
 WAKE_PHYWAKE_PHY (1 << 0) bnx2.h 　
4248
 WAKE_UCASTWAKE_UCAST (1 << 1) bnx2.h 　
4249
 WAKE_MCASTWAKE_MCAST (1 << 2) bnx2.h 　
4250
 WAKE_BCASTWAKE_BCAST (1 << 3) bnx2.h 　
4251
 WAKE_ARPWAKE_ARP (1 << 4) bnx2.h 　
4252
 WAKE_MAGICWAKE_MAGIC (1 << 5) bnx2.h 　
4253
 WAKE_MAGICSECUREWAKE_MAGICSECURE (1 << 6) bnx2.h only meaningful if WAKE_MAGIC
4254
 SPEED_10SPEED_10 10 bnx2.h 　
4255
 SPEED_100SPEED_100 100 bnx2.h 　
4256
 SPEED_1000SPEED_1000 1000 bnx2.h 　
4257
 SPEED_2500SPEED_2500 2500 bnx2.h 　
4258
 SPEED_INVALIDSPEED_INVALID 0 bnx2.h XXX was 3
4259
 DUPLEX_HALFDUPLEX_HALF 0x00 bnx2.h 　
4260
 DUPLEX_FULLDUPLEX_FULL 0x01 bnx2.h 　
4261
 DUPLEX_INVALIDDUPLEX_INVALID 0x02 bnx2.h 　
4262
 PORT_TPPORT_TP 0x00 bnx2.h 　
4263
 PORT_AUIPORT_AUI 0x01 bnx2.h 　
4264
 PORT_MIIPORT_MII 0x02 bnx2.h 　
4265
 PORT_FIBREPORT_FIBRE 0x03 bnx2.h 　
4266
 PORT_BNCPORT_BNC 0x04 bnx2.h 　
4267
 XCVR_INTERNALXCVR_INTERNAL 0x00 bnx2.h 　
4268
 XCVR_EXTERNALXCVR_EXTERNAL 0x01 bnx2.h 　
4269
 XCVR_DUMMY1XCVR_DUMMY1 0x02 bnx2.h 　
4270
 XCVR_DUMMY2XCVR_DUMMY2 0x03 bnx2.h 　
4271
 XCVR_DUMMY3XCVR_DUMMY3 0x04 bnx2.h 　
4272
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 bnx2.h 　
4273
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 bnx2.h 　
4274
 WAKE_PHYWAKE_PHY (1 << 0) bnx2.h 　
4275
 WAKE_UCASTWAKE_UCAST (1 << 1) bnx2.h 　
4276
 WAKE_MCASTWAKE_MCAST (1 << 2) bnx2.h 　
4277
 WAKE_BCASTWAKE_BCAST (1 << 3) bnx2.h 　
4278
 WAKE_ARPWAKE_ARP (1 << 4) bnx2.h 　
4279
 WAKE_MAGICWAKE_MAGIC (1 << 5) bnx2.h 　
4280
 WAKE_MAGICSECUREWAKE_MAGICSECURE (1 << 6) bnx2.h only meaningful if WAKE_MAGIC
4281
 BNX2_L2CTX_TYPEBNX2_L2CTX_TYPE 0x00000000 bnx2.h 　
4282
 BNX2_L2CTX_TYPE_SIZE_L2BNX2_L2CTX_TYPE_SIZE_L2 ((0xc0/0x20)<<16) bnx2.h 　
4283
 BNX2_L2CTX_TYPE_TYPEBNX2_L2CTX_TYPE_TYPE (0xf<<28) bnx2.h 　
4284
 BNX2_L2CTX_TYPE_TYPE_EMPTYBNX2_L2CTX_TYPE_TYPE_EMPTY (0<<28) bnx2.h 　
4285
 BNX2_L2CTX_TYPE_TYPE_L2BNX2_L2CTX_TYPE_TYPE_L2 (1<<28) bnx2.h 　
4286
 BNX2_L2CTX_TX_HOST_BIDXBNX2_L2CTX_TX_HOST_BIDX 0x00000088 bnx2.h 　
4287
 BNX2_L2CTX_EST_NBDBNX2_L2CTX_EST_NBD 0x00000088 bnx2.h 　
4288
 BNX2_L2CTX_CMD_TYPEBNX2_L2CTX_CMD_TYPE 0x00000088 bnx2.h 　
4289
 BNX2_L2CTX_CMD_TYPE_TYPEBNX2_L2CTX_CMD_TYPE_TYPE (0xf<<24) bnx2.h 　
4290
 BNX2_L2CTX_CMD_TYPE_TYPE_L2BNX2_L2CTX_CMD_TYPE_TYPE_L2 (0<<24) bnx2.h 　
4291
 BNX2_L2CTX_CMD_TYPE_TYPE_TCPBNX2_L2CTX_CMD_TYPE_TYPE_TCP (1<<24) bnx2.h 　
4292
 BNX2_L2CTX_TX_HOST_BSEQBNX2_L2CTX_TX_HOST_BSEQ 0x00000090 bnx2.h 　
4293
 BNX2_L2CTX_TSCH_BSEQBNX2_L2CTX_TSCH_BSEQ 0x00000094 bnx2.h 　
4294
 BNX2_L2CTX_TBDR_BSEQBNX2_L2CTX_TBDR_BSEQ 0x00000098 bnx2.h 　
4295
 BNX2_L2CTX_TBDR_BOFFBNX2_L2CTX_TBDR_BOFF 0x0000009c bnx2.h 　
4296
 BNX2_L2CTX_TBDR_BIDXBNX2_L2CTX_TBDR_BIDX 0x0000009c bnx2.h 　
4297
 BNX2_L2CTX_TBDR_BHADDR_HIBNX2_L2CTX_TBDR_BHADDR_HI 0x000000a0 bnx2.h 　
4298
 BNX2_L2CTX_TBDR_BHADDR_LOBNX2_L2CTX_TBDR_BHADDR_LO 0x000000a4 bnx2.h 　
4299
 BNX2_L2CTX_TXP_BOFFBNX2_L2CTX_TXP_BOFF 0x000000a8 bnx2.h 　
4300
 BNX2_L2CTX_TXP_BIDXBNX2_L2CTX_TXP_BIDX 0x000000a8 bnx2.h 　
4301
 BNX2_L2CTX_TXP_BSEQBNX2_L2CTX_TXP_BSEQ 0x000000ac bnx2.h 　
4302
 BNX2_L2CTX_BD_PRE_READBNX2_L2CTX_BD_PRE_READ 0x00000000 bnx2.h 　
4303
 BNX2_L2CTX_CTX_SIZEBNX2_L2CTX_CTX_SIZE 0x00000000 bnx2.h 　
4304
 BNX2_L2CTX_CTX_TYPEBNX2_L2CTX_CTX_TYPE 0x00000000 bnx2.h 　
4305
 BNX2_L2CTX_CTX_TYPE_SIZE_L2BNX2_L2CTX_CTX_TYPE_SIZE_L2 ((0x20/20)<<16) bnx2.h 　
4306
 BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_ (0xf<<28) bnx2.h 　
4307
 BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_ (0<<28) bnx2.h 　
4308
 BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_ (1<<28) bnx2.h 　
4309
 BNX2_L2CTX_HOST_BDIDXBNX2_L2CTX_HOST_BDIDX 0x00000004 bnx2.h 　
4310
 BNX2_L2CTX_HOST_BSEQBNX2_L2CTX_HOST_BSEQ 0x00000008 bnx2.h 　
4311
 BNX2_L2CTX_NX_BSEQBNX2_L2CTX_NX_BSEQ 0x0000000c bnx2.h 　
4312
 BNX2_L2CTX_NX_BDHADDR_HIBNX2_L2CTX_NX_BDHADDR_HI 0x00000010 bnx2.h 　
4313
 BNX2_L2CTX_NX_BDHADDR_LOBNX2_L2CTX_NX_BDHADDR_LO 0x00000014 bnx2.h 　
4314
 BNX2_L2CTX_NX_BDIDXBNX2_L2CTX_NX_BDIDX 0x00000018 bnx2.h 　
4315
 BNX2_PCICFG_MISC_CONFIGBNX2_PCICFG_MISC_CONFIG 0x00000068 bnx2.h 　
4316
 BNX2_PCICFG_MISC_CONFIG_TARGET_BNX2_PCICFG_MISC_CONFIG_TARGET_ (1L<<2) bnx2.h 　
4317
 BNX2_PCICFG_MISC_CONFIG_TARGET_BNX2_PCICFG_MISC_CONFIG_TARGET_ (1L<<3) bnx2.h 　
4318
 BNX2_PCICFG_MISC_CONFIG_CLOCK_CBNX2_PCICFG_MISC_CONFIG_CLOCK_C (1L<<5) bnx2.h 　
4319
 BNX2_PCICFG_MISC_CONFIG_TARGET_BNX2_PCICFG_MISC_CONFIG_TARGET_ (1L<<6) bnx2.h 　
4320
 BNX2_PCICFG_MISC_CONFIG_REG_WINBNX2_PCICFG_MISC_CONFIG_REG_WIN (1L<<7) bnx2.h 　
4321
 BNX2_PCICFG_MISC_CONFIG_CORE_RSBNX2_PCICFG_MISC_CONFIG_CORE_RS (1L<<8) bnx2.h 　
4322
 BNX2_PCICFG_MISC_CONFIG_CORE_RSBNX2_PCICFG_MISC_CONFIG_CORE_RS (1L<<9) bnx2.h 　
4323
 BNX2_PCICFG_MISC_CONFIG_ASIC_MEBNX2_PCICFG_MISC_CONFIG_ASIC_ME (0xffL<<16) bnx2.h 　
4324
 BNX2_PCICFG_MISC_CONFIG_ASIC_BABNX2_PCICFG_MISC_CONFIG_ASIC_BA (0xfL<<24) bnx2.h 　
4325
 BNX2_PCICFG_MISC_CONFIG_ASIC_IDBNX2_PCICFG_MISC_CONFIG_ASIC_ID (0xfL<<28) bnx2.h 　
4326
 BNX2_PCICFG_MISC_STATUSBNX2_PCICFG_MISC_STATUS 0x0000006c bnx2.h 　
4327
 BNX2_PCICFG_MISC_STATUS_INTA_VABNX2_PCICFG_MISC_STATUS_INTA_VA (1L<<0) bnx2.h 　
4328
 BNX2_PCICFG_MISC_STATUS_32BIT_DBNX2_PCICFG_MISC_STATUS_32BIT_D (1L<<1) bnx2.h 　
4329
 BNX2_PCICFG_MISC_STATUS_M66ENBNX2_PCICFG_MISC_STATUS_M66EN (1L<<2) bnx2.h 　
4330
 BNX2_PCICFG_MISC_STATUS_PCIX_DEBNX2_PCICFG_MISC_STATUS_PCIX_DE (1L<<3) bnx2.h 　
4331
 BNX2_PCICFG_MISC_STATUS_PCIX_SPBNX2_PCICFG_MISC_STATUS_PCIX_SP (0x3L<<4) bnx2.h 　
4332
 BNX2_PCICFG_MISC_STATUS_PCIX_SPBNX2_PCICFG_MISC_STATUS_PCIX_SP (0L<<4) bnx2.h 　
4333
 BNX2_PCICFG_MISC_STATUS_PCIX_SPBNX2_PCICFG_MISC_STATUS_PCIX_SP (1L<<4) bnx2.h 　
4334
 BNX2_PCICFG_MISC_STATUS_PCIX_SPBNX2_PCICFG_MISC_STATUS_PCIX_SP (2L<<4) bnx2.h 　
4335
 BNX2_PCICFG_MISC_STATUS_PCIX_SPBNX2_PCICFG_MISC_STATUS_PCIX_SP (3L<<4) bnx2.h 　
4336
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B 0x00000070 bnx2.h 　
4337
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0xfL<<0) bnx2.h 　
4338
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0L<<0) bnx2.h 　
4339
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<0) bnx2.h 　
4340
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (2L<<0) bnx2.h 　
4341
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (3L<<0) bnx2.h 　
4342
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (4L<<0) bnx2.h 　
4343
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (5L<<0) bnx2.h 　
4344
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (6L<<0) bnx2.h 　
4345
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (7L<<0) bnx2.h 　
4346
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0xfL<<0) bnx2.h 　
4347
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<6) bnx2.h 　
4348
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<7) bnx2.h 　
4349
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0x7L<<8) bnx2.h 　
4350
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0L<<8) bnx2.h 　
4351
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<8) bnx2.h 　
4352
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (2L<<8) bnx2.h 　
4353
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (4L<<8) bnx2.h 　
4354
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<11) bnx2.h 　
4355
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0xfL<<12) bnx2.h 　
4356
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0L<<12) bnx2.h 　
4357
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<12) bnx2.h 　
4358
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (2L<<12) bnx2.h 　
4359
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (4L<<12) bnx2.h 　
4360
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (8L<<12) bnx2.h 　
4361
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<16) bnx2.h 　
4362
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<17) bnx2.h 　
4363
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<18) bnx2.h 　
4364
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<19) bnx2.h 　
4365
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0xfffL<<20) bnx2.h 　
4366
 BNX2_PCICFG_REG_WINDOW_ADDRESSBNX2_PCICFG_REG_WINDOW_ADDRESS 0x00000078 bnx2.h 　
4367
 BNX2_PCICFG_REG_WINDOWBNX2_PCICFG_REG_WINDOW 0x00000080 bnx2.h 　
4368
 BNX2_PCICFG_INT_ACK_CMDBNX2_PCICFG_INT_ACK_CMD 0x00000084 bnx2.h 　
4369
 BNX2_PCICFG_INT_ACK_CMD_INDEXBNX2_PCICFG_INT_ACK_CMD_INDEX (0xffffL<<0) bnx2.h 　
4370
 BNX2_PCICFG_INT_ACK_CMD_INDEX_VBNX2_PCICFG_INT_ACK_CMD_INDEX_V (1L<<16) bnx2.h 　
4371
 BNX2_PCICFG_INT_ACK_CMD_USE_INTBNX2_PCICFG_INT_ACK_CMD_USE_INT (1L<<17) bnx2.h 　
4372
 BNX2_PCICFG_INT_ACK_CMD_MASK_INBNX2_PCICFG_INT_ACK_CMD_MASK_IN (1L<<18) bnx2.h 　
4373
 BNX2_PCICFG_STATUS_BIT_SET_CMDBNX2_PCICFG_STATUS_BIT_SET_CMD 0x00000088 bnx2.h 　
4374
 BNX2_PCICFG_STATUS_BIT_CLEAR_CMBNX2_PCICFG_STATUS_BIT_CLEAR_CM 0x0000008c bnx2.h 　
4375
 BNX2_PCICFG_MAILBOX_QUEUE_ADDRBNX2_PCICFG_MAILBOX_QUEUE_ADDR 0x00000090 bnx2.h 　
4376
 BNX2_PCICFG_MAILBOX_QUEUE_DATABNX2_PCICFG_MAILBOX_QUEUE_DATA 0x00000094 bnx2.h 　
4377
 BNX2_PCI_GRC_WINDOW_ADDRBNX2_PCI_GRC_WINDOW_ADDR 0x00000400 bnx2.h 　
4378
 BNX2_PCI_GRC_WINDOW_ADDR_PCI_GRBNX2_PCI_GRC_WINDOW_ADDR_PCI_GR (0x3ffffL<<8) bnx2.h 　
4379
 BNX2_PCI_CONFIG_1BNX2_PCI_CONFIG_1 0x00000404 bnx2.h 　
4380
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (0x7L<<8) bnx2.h 　
4381
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (0L<<8) bnx2.h 　
4382
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (1L<<8) bnx2.h 　
4383
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (2L<<8) bnx2.h 　
4384
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (3L<<8) bnx2.h 　
4385
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (4L<<8) bnx2.h 　
4386
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (5L<<8) bnx2.h 　
4387
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (6L<<8) bnx2.h 　
4388
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (7L<<8) bnx2.h 　
4389
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (0x7L<<11) bnx2.h 　
4390
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (0L<<11) bnx2.h 　
4391
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (1L<<11) bnx2.h 　
4392
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (2L<<11) bnx2.h 　
4393
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (3L<<11) bnx2.h 　
4394
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (4L<<11) bnx2.h 　
4395
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (5L<<11) bnx2.h 　
4396
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (6L<<11) bnx2.h 　
4397
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (7L<<11) bnx2.h 　
4398
 BNX2_PCI_CONFIG_2BNX2_PCI_CONFIG_2 0x00000408 bnx2.h 　
4399
 BNX2_PCI_CONFIG_2_BAR1_SIZEBNX2_PCI_CONFIG_2_BAR1_SIZE (0xfL<<0) bnx2.h 　
4400
 BNX2_PCI_CONFIG_2_BAR1_SIZE_DISBNX2_PCI_CONFIG_2_BAR1_SIZE_DIS (0L<<0) bnx2.h 　
4401
 BNX2_PCI_CONFIG_2_BAR1_SIZE_64KBNX2_PCI_CONFIG_2_BAR1_SIZE_64K (1L<<0) bnx2.h 　
4402
 BNX2_PCI_CONFIG_2_BAR1_SIZE_128BNX2_PCI_CONFIG_2_BAR1_SIZE_128 (2L<<0) bnx2.h 　
4403
 BNX2_PCI_CONFIG_2_BAR1_SIZE_256BNX2_PCI_CONFIG_2_BAR1_SIZE_256 (3L<<0) bnx2.h 　
4404
 BNX2_PCI_CONFIG_2_BAR1_SIZE_512BNX2_PCI_CONFIG_2_BAR1_SIZE_512 (4L<<0) bnx2.h 　
4405
 BNX2_PCI_CONFIG_2_BAR1_SIZE_1MBNX2_PCI_CONFIG_2_BAR1_SIZE_1M (5L<<0) bnx2.h 　
4406
 BNX2_PCI_CONFIG_2_BAR1_SIZE_2MBNX2_PCI_CONFIG_2_BAR1_SIZE_2M (6L<<0) bnx2.h 　
4407
 BNX2_PCI_CONFIG_2_BAR1_SIZE_4MBNX2_PCI_CONFIG_2_BAR1_SIZE_4M (7L<<0) bnx2.h 　
4408
 BNX2_PCI_CONFIG_2_BAR1_SIZE_8MBNX2_PCI_CONFIG_2_BAR1_SIZE_8M (8L<<0) bnx2.h 　
4409
 BNX2_PCI_CONFIG_2_BAR1_SIZE_16MBNX2_PCI_CONFIG_2_BAR1_SIZE_16M (9L<<0) bnx2.h 　
4410
 BNX2_PCI_CONFIG_2_BAR1_SIZE_32MBNX2_PCI_CONFIG_2_BAR1_SIZE_32M (10L<<0) bnx2.h 　
4411
 BNX2_PCI_CONFIG_2_BAR1_SIZE_64MBNX2_PCI_CONFIG_2_BAR1_SIZE_64M (11L<<0) bnx2.h 　
4412
 BNX2_PCI_CONFIG_2_BAR1_SIZE_128BNX2_PCI_CONFIG_2_BAR1_SIZE_128 (12L<<0) bnx2.h 　
4413
 BNX2_PCI_CONFIG_2_BAR1_SIZE_256BNX2_PCI_CONFIG_2_BAR1_SIZE_256 (13L<<0) bnx2.h 　
4414
 BNX2_PCI_CONFIG_2_BAR1_SIZE_512BNX2_PCI_CONFIG_2_BAR1_SIZE_512 (14L<<0) bnx2.h 　
4415
 BNX2_PCI_CONFIG_2_BAR1_SIZE_1GBNX2_PCI_CONFIG_2_BAR1_SIZE_1G (15L<<0) bnx2.h 　
4416
 BNX2_PCI_CONFIG_2_BAR1_64ENABNX2_PCI_CONFIG_2_BAR1_64ENA (1L<<4) bnx2.h 　
4417
 BNX2_PCI_CONFIG_2_EXP_ROM_RETRYBNX2_PCI_CONFIG_2_EXP_ROM_RETRY (1L<<5) bnx2.h 　
4418
 BNX2_PCI_CONFIG_2_CFG_CYCLE_RETBNX2_PCI_CONFIG_2_CFG_CYCLE_RET (1L<<6) bnx2.h 　
4419
 BNX2_PCI_CONFIG_2_FIRST_CFG_DONBNX2_PCI_CONFIG_2_FIRST_CFG_DON (1L<<7) bnx2.h 　
4420
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZEBNX2_PCI_CONFIG_2_EXP_ROM_SIZE (0xffL<<8) bnx2.h 　
4421
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (0L<<8) bnx2.h 　
4422
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (1L<<8) bnx2.h 　
4423
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (2L<<8) bnx2.h 　
4424
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (3L<<8) bnx2.h 　
4425
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (4L<<8) bnx2.h 　
4426
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (5L<<8) bnx2.h 　
4427
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (6L<<8) bnx2.h 　
4428
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (7L<<8) bnx2.h 　
4429
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (8L<<8) bnx2.h 　
4430
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (9L<<8) bnx2.h 　
4431
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (10L<<8) bnx2.h 　
4432
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (11L<<8) bnx2.h 　
4433
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (12L<<8) bnx2.h 　
4434
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (13L<<8) bnx2.h 　
4435
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (14L<<8) bnx2.h 　
4436
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (15L<<8) bnx2.h 　
4437
 BNX2_PCI_CONFIG_2_MAX_SPLIT_LIMBNX2_PCI_CONFIG_2_MAX_SPLIT_LIM (0x1fL<<16) bnx2.h 　
4438
 BNX2_PCI_CONFIG_2_MAX_READ_LIMIBNX2_PCI_CONFIG_2_MAX_READ_LIMI (0x3L<<21) bnx2.h 　
4439
 BNX2_PCI_CONFIG_2_MAX_READ_LIMIBNX2_PCI_CONFIG_2_MAX_READ_LIMI (0L<<21) bnx2.h 　
4440
 BNX2_PCI_CONFIG_2_MAX_READ_LIMIBNX2_PCI_CONFIG_2_MAX_READ_LIMI (1L<<21) bnx2.h 　
4441
 BNX2_PCI_CONFIG_2_MAX_READ_LIMIBNX2_PCI_CONFIG_2_MAX_READ_LIMI (2L<<21) bnx2.h 　
4442
 BNX2_PCI_CONFIG_2_MAX_READ_LIMIBNX2_PCI_CONFIG_2_MAX_READ_LIMI (3L<<21) bnx2.h 　
4443
 BNX2_PCI_CONFIG_2_FORCE_32_BIT_BNX2_PCI_CONFIG_2_FORCE_32_BIT_ (1L<<23) bnx2.h 　
4444
 BNX2_PCI_CONFIG_2_FORCE_32_BIT_BNX2_PCI_CONFIG_2_FORCE_32_BIT_ (1L<<24) bnx2.h 　
4445
 BNX2_PCI_CONFIG_2_KEEP_REQ_ASSEBNX2_PCI_CONFIG_2_KEEP_REQ_ASSE (1L<<25) bnx2.h 　
4446
 BNX2_PCI_CONFIG_3BNX2_PCI_CONFIG_3 0x0000040c bnx2.h 　
4447
 BNX2_PCI_CONFIG_3_STICKY_BYTEBNX2_PCI_CONFIG_3_STICKY_BYTE (0xffL<<0) bnx2.h 　
4448
 BNX2_PCI_CONFIG_3_FORCE_PMEBNX2_PCI_CONFIG_3_FORCE_PME (1L<<24) bnx2.h 　
4449
 BNX2_PCI_CONFIG_3_PME_STATUSBNX2_PCI_CONFIG_3_PME_STATUS (1L<<25) bnx2.h 　
4450
 BNX2_PCI_CONFIG_3_PME_ENABLEBNX2_PCI_CONFIG_3_PME_ENABLE (1L<<26) bnx2.h 　
4451
 BNX2_PCI_CONFIG_3_PM_STATEBNX2_PCI_CONFIG_3_PM_STATE (0x3L<<27) bnx2.h 　
4452
 BNX2_PCI_CONFIG_3_VAUX_PRESETBNX2_PCI_CONFIG_3_VAUX_PRESET (1L<<30) bnx2.h 　
4453
 BNX2_PCI_CONFIG_3_PCI_POWERBNX2_PCI_CONFIG_3_PCI_POWER (1L<<31) bnx2.h 　
4454
 BNX2_PCI_PM_DATA_ABNX2_PCI_PM_DATA_A 0x00000410 bnx2.h 　
4455
 BNX2_PCI_PM_DATA_A_PM_DATA_0_PRBNX2_PCI_PM_DATA_A_PM_DATA_0_PR (0xffL<<0) bnx2.h 　
4456
 BNX2_PCI_PM_DATA_A_PM_DATA_1_PRBNX2_PCI_PM_DATA_A_PM_DATA_1_PR (0xffL<<8) bnx2.h 　
4457
 BNX2_PCI_PM_DATA_A_PM_DATA_2_PRBNX2_PCI_PM_DATA_A_PM_DATA_2_PR (0xffL<<16) bnx2.h 　
4458
 BNX2_PCI_PM_DATA_A_PM_DATA_3_PRBNX2_PCI_PM_DATA_A_PM_DATA_3_PR (0xffL<<24) bnx2.h 　
4459
 BNX2_PCI_PM_DATA_BBNX2_PCI_PM_DATA_B 0x00000414 bnx2.h 　
4460
 BNX2_PCI_PM_DATA_B_PM_DATA_4_PRBNX2_PCI_PM_DATA_B_PM_DATA_4_PR (0xffL<<0) bnx2.h 　
4461
 BNX2_PCI_PM_DATA_B_PM_DATA_5_PRBNX2_PCI_PM_DATA_B_PM_DATA_5_PR (0xffL<<8) bnx2.h 　
4462
 BNX2_PCI_PM_DATA_B_PM_DATA_6_PRBNX2_PCI_PM_DATA_B_PM_DATA_6_PR (0xffL<<16) bnx2.h 　
4463
 BNX2_PCI_PM_DATA_B_PM_DATA_7_PRBNX2_PCI_PM_DATA_B_PM_DATA_7_PR (0xffL<<24) bnx2.h 　
4464
 BNX2_PCI_SWAP_DIAG0BNX2_PCI_SWAP_DIAG0 0x00000418 bnx2.h 　
4465
 BNX2_PCI_SWAP_DIAG1BNX2_PCI_SWAP_DIAG1 0x0000041c bnx2.h 　
4466
 BNX2_PCI_EXP_ROM_ADDRBNX2_PCI_EXP_ROM_ADDR 0x00000420 bnx2.h 　
4467
 BNX2_PCI_EXP_ROM_ADDR_ADDRESSBNX2_PCI_EXP_ROM_ADDR_ADDRESS (0x3fffffL<<2) bnx2.h 　
4468
 BNX2_PCI_EXP_ROM_ADDR_REQBNX2_PCI_EXP_ROM_ADDR_REQ (1L<<31) bnx2.h 　
4469
 BNX2_PCI_EXP_ROM_DATABNX2_PCI_EXP_ROM_DATA 0x00000424 bnx2.h 　
4470
 BNX2_PCI_VPD_INTFBNX2_PCI_VPD_INTF 0x00000428 bnx2.h 　
4471
 BNX2_PCI_VPD_INTF_INTF_REQBNX2_PCI_VPD_INTF_INTF_REQ (1L<<0) bnx2.h 　
4472
 BNX2_PCI_VPD_ADDR_FLAGBNX2_PCI_VPD_ADDR_FLAG 0x0000042c bnx2.h 　
4473
 BNX2_PCI_VPD_ADDR_FLAG_ADDRESSBNX2_PCI_VPD_ADDR_FLAG_ADDRESS (0x1fff<<2) bnx2.h 　
4474
 BNX2_PCI_VPD_ADDR_FLAG_WRBNX2_PCI_VPD_ADDR_FLAG_WR (1<<15) bnx2.h 　
4475
 BNX2_PCI_VPD_DATABNX2_PCI_VPD_DATA 0x00000430 bnx2.h 　
4476
 BNX2_PCI_ID_VAL1BNX2_PCI_ID_VAL1 0x00000434 bnx2.h 　
4477
 BNX2_PCI_ID_VAL1_DEVICE_IDBNX2_PCI_ID_VAL1_DEVICE_ID (0xffffL<<0) bnx2.h 　
4478
 BNX2_PCI_ID_VAL1_VENDOR_IDBNX2_PCI_ID_VAL1_VENDOR_ID (0xffffL<<16) bnx2.h 　
4479
 BNX2_PCI_ID_VAL2BNX2_PCI_ID_VAL2 0x00000438 bnx2.h 　
4480
 BNX2_PCI_ID_VAL2_SUBSYSTEM_VENDBNX2_PCI_ID_VAL2_SUBSYSTEM_VEND (0xffffL<<0) bnx2.h 　
4481
 BNX2_PCI_ID_VAL2_SUBSYSTEM_IDBNX2_PCI_ID_VAL2_SUBSYSTEM_ID (0xffffL<<16) bnx2.h 　
4482
 BNX2_PCI_ID_VAL3BNX2_PCI_ID_VAL3 0x0000043c bnx2.h 　
4483
 BNX2_PCI_ID_VAL3_CLASS_CODEBNX2_PCI_ID_VAL3_CLASS_CODE (0xffffffL<<0) bnx2.h 　
4484
 BNX2_PCI_ID_VAL3_REVISION_IDBNX2_PCI_ID_VAL3_REVISION_ID (0xffL<<24) bnx2.h 　
4485
 BNX2_PCI_ID_VAL4BNX2_PCI_ID_VAL4 0x00000440 bnx2.h 　
4486
 BNX2_PCI_ID_VAL4_CAP_ENABNX2_PCI_ID_VAL4_CAP_ENA (0xfL<<0) bnx2.h 　
4487
 BNX2_PCI_ID_VAL4_CAP_ENA_0BNX2_PCI_ID_VAL4_CAP_ENA_0 (0L<<0) bnx2.h 　
4488
 BNX2_PCI_ID_VAL4_CAP_ENA_1BNX2_PCI_ID_VAL4_CAP_ENA_1 (1L<<0) bnx2.h 　
4489
 BNX2_PCI_ID_VAL4_CAP_ENA_2BNX2_PCI_ID_VAL4_CAP_ENA_2 (2L<<0) bnx2.h 　
4490
 BNX2_PCI_ID_VAL4_CAP_ENA_3BNX2_PCI_ID_VAL4_CAP_ENA_3 (3L<<0) bnx2.h 　
4491
 BNX2_PCI_ID_VAL4_CAP_ENA_4BNX2_PCI_ID_VAL4_CAP_ENA_4 (4L<<0) bnx2.h 　
4492
 BNX2_PCI_ID_VAL4_CAP_ENA_5BNX2_PCI_ID_VAL4_CAP_ENA_5 (5L<<0) bnx2.h 　
4493
 BNX2_PCI_ID_VAL4_CAP_ENA_6BNX2_PCI_ID_VAL4_CAP_ENA_6 (6L<<0) bnx2.h 　
4494
 BNX2_PCI_ID_VAL4_CAP_ENA_7BNX2_PCI_ID_VAL4_CAP_ENA_7 (7L<<0) bnx2.h 　
4495
 BNX2_PCI_ID_VAL4_CAP_ENA_8BNX2_PCI_ID_VAL4_CAP_ENA_8 (8L<<0) bnx2.h 　
4496
 BNX2_PCI_ID_VAL4_CAP_ENA_9BNX2_PCI_ID_VAL4_CAP_ENA_9 (9L<<0) bnx2.h 　
4497
 BNX2_PCI_ID_VAL4_CAP_ENA_10BNX2_PCI_ID_VAL4_CAP_ENA_10 (10L<<0) bnx2.h 　
4498
 BNX2_PCI_ID_VAL4_CAP_ENA_11BNX2_PCI_ID_VAL4_CAP_ENA_11 (11L<<0) bnx2.h 　
4499
 BNX2_PCI_ID_VAL4_CAP_ENA_12BNX2_PCI_ID_VAL4_CAP_ENA_12 (12L<<0) bnx2.h 　
4500
 BNX2_PCI_ID_VAL4_CAP_ENA_13BNX2_PCI_ID_VAL4_CAP_ENA_13 (13L<<0) bnx2.h 　
4501
 BNX2_PCI_ID_VAL4_CAP_ENA_14BNX2_PCI_ID_VAL4_CAP_ENA_14 (14L<<0) bnx2.h 　
4502
 BNX2_PCI_ID_VAL4_CAP_ENA_15BNX2_PCI_ID_VAL4_CAP_ENA_15 (15L<<0) bnx2.h 　
4503
 BNX2_PCI_ID_VAL4_PM_SCALE_PRGBNX2_PCI_ID_VAL4_PM_SCALE_PRG (0x3L<<6) bnx2.h 　
4504
 BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0 (0L<<6) bnx2.h 　
4505
 BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1 (1L<<6) bnx2.h 　
4506
 BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2 (2L<<6) bnx2.h 　
4507
 BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3 (3L<<6) bnx2.h 　
4508
 BNX2_PCI_ID_VAL4_MSI_LIMITBNX2_PCI_ID_VAL4_MSI_LIMIT (0x7L<<9) bnx2.h 　
4509
 BNX2_PCI_ID_VAL4_MSI_ADVERTIZEBNX2_PCI_ID_VAL4_MSI_ADVERTIZE (0x7L<<12) bnx2.h 　
4510
 BNX2_PCI_ID_VAL4_MSI_ENABLEBNX2_PCI_ID_VAL4_MSI_ENABLE (1L<<15) bnx2.h 　
4511
 BNX2_PCI_ID_VAL4_MAX_64_ADVERTIBNX2_PCI_ID_VAL4_MAX_64_ADVERTI (1L<<16) bnx2.h 　
4512
 BNX2_PCI_ID_VAL4_MAX_133_ADVERTBNX2_PCI_ID_VAL4_MAX_133_ADVERT (1L<<17) bnx2.h 　
4513
 BNX2_PCI_ID_VAL4_MAX_MEM_READ_SBNX2_PCI_ID_VAL4_MAX_MEM_READ_S (0x3L<<21) bnx2.h 　
4514
 BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZEBNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE (0x7L<<23) bnx2.h 　
4515
 BNX2_PCI_ID_VAL4_MAX_CUMULATIVEBNX2_PCI_ID_VAL4_MAX_CUMULATIVE (0x7L<<26) bnx2.h 　
4516
 BNX2_PCI_ID_VAL5BNX2_PCI_ID_VAL5 0x00000444 bnx2.h 　
4517
 BNX2_PCI_ID_VAL5_D1_SUPPORTBNX2_PCI_ID_VAL5_D1_SUPPORT (1L<<0) bnx2.h 　
4518
 BNX2_PCI_ID_VAL5_D2_SUPPORTBNX2_PCI_ID_VAL5_D2_SUPPORT (1L<<1) bnx2.h 　
4519
 BNX2_PCI_ID_VAL5_PME_IN_D0BNX2_PCI_ID_VAL5_PME_IN_D0 (1L<<2) bnx2.h 　
4520
 BNX2_PCI_ID_VAL5_PME_IN_D1BNX2_PCI_ID_VAL5_PME_IN_D1 (1L<<3) bnx2.h 　
4521
 BNX2_PCI_ID_VAL5_PME_IN_D2BNX2_PCI_ID_VAL5_PME_IN_D2 (1L<<4) bnx2.h 　
4522
 BNX2_PCI_ID_VAL5_PME_IN_D3_HOTBNX2_PCI_ID_VAL5_PME_IN_D3_HOT (1L<<5) bnx2.h 　
4523
 BNX2_PCI_PCIX_EXTENDED_STATUSBNX2_PCI_PCIX_EXTENDED_STATUS 0x00000448 bnx2.h 　
4524
 BNX2_PCI_PCIX_EXTENDED_STATUS_NBNX2_PCI_PCIX_EXTENDED_STATUS_N (1L<<8) bnx2.h 　
4525
 BNX2_PCI_PCIX_EXTENDED_STATUS_LBNX2_PCI_PCIX_EXTENDED_STATUS_L (1L<<9) bnx2.h 　
4526
 BNX2_PCI_PCIX_EXTENDED_STATUS_SBNX2_PCI_PCIX_EXTENDED_STATUS_S (0xfL<<16) bnx2.h 　
4527
 BNX2_PCI_PCIX_EXTENDED_STATUS_SBNX2_PCI_PCIX_EXTENDED_STATUS_S (0xffL<<24) bnx2.h 　
4528
 BNX2_PCI_ID_VAL6BNX2_PCI_ID_VAL6 0x0000044c bnx2.h 　
4529
 BNX2_PCI_ID_VAL6_MAX_LATBNX2_PCI_ID_VAL6_MAX_LAT (0xffL<<0) bnx2.h 　
4530
 BNX2_PCI_ID_VAL6_MIN_GNTBNX2_PCI_ID_VAL6_MIN_GNT (0xffL<<8) bnx2.h 　
4531
 BNX2_PCI_ID_VAL6_BISTBNX2_PCI_ID_VAL6_BIST (0xffL<<16) bnx2.h 　
4532
 BNX2_PCI_MSI_DATABNX2_PCI_MSI_DATA 0x00000450 bnx2.h 　
4533
 BNX2_PCI_MSI_DATA_PCI_MSI_DATABNX2_PCI_MSI_DATA_PCI_MSI_DATA (0xffffL<<0) bnx2.h 　
4534
 BNX2_PCI_MSI_ADDR_HBNX2_PCI_MSI_ADDR_H 0x00000454 bnx2.h 　
4535
 BNX2_PCI_MSI_ADDR_LBNX2_PCI_MSI_ADDR_L 0x00000458 bnx2.h 　
4536
 BNX2_MISC_COMMANDBNX2_MISC_COMMAND 0x00000800 bnx2.h 　
4537
 BNX2_MISC_COMMAND_ENABLE_ALLBNX2_MISC_COMMAND_ENABLE_ALL (1L<<0) bnx2.h 　
4538
 BNX2_MISC_COMMAND_DISABLE_ALLBNX2_MISC_COMMAND_DISABLE_ALL (1L<<1) bnx2.h 　
4539
 BNX2_MISC_COMMAND_CORE_RESETBNX2_MISC_COMMAND_CORE_RESET (1L<<4) bnx2.h 　
4540
 BNX2_MISC_COMMAND_HARD_RESETBNX2_MISC_COMMAND_HARD_RESET (1L<<5) bnx2.h 　
4541
 BNX2_MISC_COMMAND_PAR_ERRORBNX2_MISC_COMMAND_PAR_ERROR (1L<<8) bnx2.h 　
4542
 BNX2_MISC_COMMAND_PAR_ERR_RAMBNX2_MISC_COMMAND_PAR_ERR_RAM (0x7fL<<16) bnx2.h 　
4543
 BNX2_MISC_CFGBNX2_MISC_CFG 0x00000804 bnx2.h 　
4544
 BNX2_MISC_CFG_PCI_GRC_TMOUTBNX2_MISC_CFG_PCI_GRC_TMOUT (1L<<0) bnx2.h 　
4545
 BNX2_MISC_CFG_NVM_WR_ENBNX2_MISC_CFG_NVM_WR_EN (0x3L<<1) bnx2.h 　
4546
 BNX2_MISC_CFG_NVM_WR_EN_PROTECTBNX2_MISC_CFG_NVM_WR_EN_PROTECT (0L<<1) bnx2.h 　
4547
 BNX2_MISC_CFG_NVM_WR_EN_PCIBNX2_MISC_CFG_NVM_WR_EN_PCI (1L<<1) bnx2.h 　
4548
 BNX2_MISC_CFG_NVM_WR_EN_ALLOWBNX2_MISC_CFG_NVM_WR_EN_ALLOW (2L<<1) bnx2.h 　
4549
 BNX2_MISC_CFG_NVM_WR_EN_ALLOW2BNX2_MISC_CFG_NVM_WR_EN_ALLOW2 (3L<<1) bnx2.h 　
4550
 BNX2_MISC_CFG_BIST_ENBNX2_MISC_CFG_BIST_EN (1L<<3) bnx2.h 　
4551
 BNX2_MISC_CFG_CK25_OUT_ALT_SRCBNX2_MISC_CFG_CK25_OUT_ALT_SRC (1L<<4) bnx2.h 　
4552
 BNX2_MISC_CFG_BYPASS_BSCANBNX2_MISC_CFG_BYPASS_BSCAN (1L<<5) bnx2.h 　
4553
 BNX2_MISC_CFG_BYPASS_EJTAGBNX2_MISC_CFG_BYPASS_EJTAG (1L<<6) bnx2.h 　
4554
 BNX2_MISC_CFG_CLK_CTL_OVERRIDEBNX2_MISC_CFG_CLK_CTL_OVERRIDE (1L<<7) bnx2.h 　
4555
 BNX2_MISC_CFG_LEDMODEBNX2_MISC_CFG_LEDMODE (0x3L<<8) bnx2.h 　
4556
 BNX2_MISC_CFG_LEDMODE_MACBNX2_MISC_CFG_LEDMODE_MAC (0L<<8) bnx2.h 　
4557
 BNX2_MISC_CFG_LEDMODE_GPHY1BNX2_MISC_CFG_LEDMODE_GPHY1 (1L<<8) bnx2.h 　
4558
 BNX2_MISC_CFG_LEDMODE_GPHY2BNX2_MISC_CFG_LEDMODE_GPHY2 (2L<<8) bnx2.h 　
4559
 BNX2_MISC_IDBNX2_MISC_ID 0x00000808 bnx2.h 　
4560
 BNX2_MISC_ID_BOND_IDBNX2_MISC_ID_BOND_ID (0xfL<<0) bnx2.h 　
4561
 BNX2_MISC_ID_CHIP_METALBNX2_MISC_ID_CHIP_METAL (0xffL<<4) bnx2.h 　
4562
 BNX2_MISC_ID_CHIP_REVBNX2_MISC_ID_CHIP_REV (0xfL<<12) bnx2.h 　
4563
 BNX2_MISC_ID_CHIP_NUMBNX2_MISC_ID_CHIP_NUM (0xffffL<<16) bnx2.h 　
4564
 BNX2_MISC_ENABLE_STATUS_BITSBNX2_MISC_ENABLE_STATUS_BITS 0x0000080c bnx2.h 　
4565
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<0) bnx2.h 　
4566
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<1) bnx2.h 　
4567
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<2) bnx2.h 　
4568
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<3) bnx2.h 　
4569
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<4) bnx2.h 　
4570
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<5) bnx2.h 　
4571
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<6) bnx2.h 　
4572
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<7) bnx2.h 　
4573
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<8) bnx2.h 　
4574
 BNX2_MISC_ENABLE_STATUS_BITS_EMBNX2_MISC_ENABLE_STATUS_BITS_EM (1L<<9) bnx2.h 　
4575
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<10) bnx2.h 　
4576
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<11) bnx2.h 　
4577
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<12) bnx2.h 　
4578
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<13) bnx2.h 　
4579
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<14) bnx2.h 　
4580
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<15) bnx2.h 　
4581
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<16) bnx2.h 　
4582
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<17) bnx2.h 　
4583
 BNX2_MISC_ENABLE_STATUS_BITS_COBNX2_MISC_ENABLE_STATUS_BITS_CO (1L<<18) bnx2.h 　
4584
 BNX2_MISC_ENABLE_STATUS_BITS_HOBNX2_MISC_ENABLE_STATUS_BITS_HO (1L<<19) bnx2.h 　
4585
 BNX2_MISC_ENABLE_STATUS_BITS_MABNX2_MISC_ENABLE_STATUS_BITS_MA (1L<<20) bnx2.h 　
4586
 BNX2_MISC_ENABLE_STATUS_BITS_COBNX2_MISC_ENABLE_STATUS_BITS_CO (1L<<21) bnx2.h 　
4587
 BNX2_MISC_ENABLE_STATUS_BITS_CMBNX2_MISC_ENABLE_STATUS_BITS_CM (1L<<22) bnx2.h 　
4588
 BNX2_MISC_ENABLE_STATUS_BITS_CMBNX2_MISC_ENABLE_STATUS_BITS_CM (1L<<23) bnx2.h 　
4589
 BNX2_MISC_ENABLE_STATUS_BITS_MGBNX2_MISC_ENABLE_STATUS_BITS_MG (1L<<24) bnx2.h 　
4590
 BNX2_MISC_ENABLE_STATUS_BITS_TIBNX2_MISC_ENABLE_STATUS_BITS_TI (1L<<25) bnx2.h 　
4591
 BNX2_MISC_ENABLE_STATUS_BITS_DMBNX2_MISC_ENABLE_STATUS_BITS_DM (1L<<26) bnx2.h 　
4592
 BNX2_MISC_ENABLE_STATUS_BITS_UMBNX2_MISC_ENABLE_STATUS_BITS_UM (1L<<27) bnx2.h 　
4593
 BNX2_MISC_ENABLE_SET_BITSBNX2_MISC_ENABLE_SET_BITS 0x00000810 bnx2.h 　
4594
 BNX2_MISC_ENABLE_SET_BITS_TX_SCBNX2_MISC_ENABLE_SET_BITS_TX_SC (1L<<0) bnx2.h 　
4595
 BNX2_MISC_ENABLE_SET_BITS_TX_BDBNX2_MISC_ENABLE_SET_BITS_TX_BD (1L<<1) bnx2.h 　
4596
 BNX2_MISC_ENABLE_SET_BITS_TX_BDBNX2_MISC_ENABLE_SET_BITS_TX_BD (1L<<2) bnx2.h 　
4597
 BNX2_MISC_ENABLE_SET_BITS_TX_PRBNX2_MISC_ENABLE_SET_BITS_TX_PR (1L<<3) bnx2.h 　
4598
 BNX2_MISC_ENABLE_SET_BITS_TX_DMBNX2_MISC_ENABLE_SET_BITS_TX_DM (1L<<4) bnx2.h 　
4599
 BNX2_MISC_ENABLE_SET_BITS_TX_PABNX2_MISC_ENABLE_SET_BITS_TX_PA (1L<<5) bnx2.h 　
4600
 BNX2_MISC_ENABLE_SET_BITS_TX_PABNX2_MISC_ENABLE_SET_BITS_TX_PA (1L<<6) bnx2.h 　
4601
 BNX2_MISC_ENABLE_SET_BITS_TX_HEBNX2_MISC_ENABLE_SET_BITS_TX_HE (1L<<7) bnx2.h 　
4602
 BNX2_MISC_ENABLE_SET_BITS_TX_ASBNX2_MISC_ENABLE_SET_BITS_TX_AS (1L<<8) bnx2.h 　
4603
 BNX2_MISC_ENABLE_SET_BITS_EMAC_BNX2_MISC_ENABLE_SET_BITS_EMAC_ (1L<<9) bnx2.h 　
4604
 BNX2_MISC_ENABLE_SET_BITS_RX_PABNX2_MISC_ENABLE_SET_BITS_RX_PA (1L<<10) bnx2.h 　
4605
 BNX2_MISC_ENABLE_SET_BITS_RX_PABNX2_MISC_ENABLE_SET_BITS_RX_PA (1L<<11) bnx2.h 　
4606
 BNX2_MISC_ENABLE_SET_BITS_RX_MBBNX2_MISC_ENABLE_SET_BITS_RX_MB (1L<<12) bnx2.h 　
4607
 BNX2_MISC_ENABLE_SET_BITS_RX_LOBNX2_MISC_ENABLE_SET_BITS_RX_LO (1L<<13) bnx2.h 　
4608
 BNX2_MISC_ENABLE_SET_BITS_RX_PRBNX2_MISC_ENABLE_SET_BITS_RX_PR (1L<<14) bnx2.h 　
4609
 BNX2_MISC_ENABLE_SET_BITS_RX_V2BNX2_MISC_ENABLE_SET_BITS_RX_V2 (1L<<15) bnx2.h 　
4610
 BNX2_MISC_ENABLE_SET_BITS_RX_BDBNX2_MISC_ENABLE_SET_BITS_RX_BD (1L<<16) bnx2.h 　
4611
 BNX2_MISC_ENABLE_SET_BITS_RX_DMBNX2_MISC_ENABLE_SET_BITS_RX_DM (1L<<17) bnx2.h 　
4612
 BNX2_MISC_ENABLE_SET_BITS_COMPLBNX2_MISC_ENABLE_SET_BITS_COMPL (1L<<18) bnx2.h 　
4613
 BNX2_MISC_ENABLE_SET_BITS_HOST_BNX2_MISC_ENABLE_SET_BITS_HOST_ (1L<<19) bnx2.h 　
4614
 BNX2_MISC_ENABLE_SET_BITS_MAILBBNX2_MISC_ENABLE_SET_BITS_MAILB (1L<<20) bnx2.h 　
4615
 BNX2_MISC_ENABLE_SET_BITS_CONTEBNX2_MISC_ENABLE_SET_BITS_CONTE (1L<<21) bnx2.h 　
4616
 BNX2_MISC_ENABLE_SET_BITS_CMD_SBNX2_MISC_ENABLE_SET_BITS_CMD_S (1L<<22) bnx2.h 　
4617
 BNX2_MISC_ENABLE_SET_BITS_CMD_PBNX2_MISC_ENABLE_SET_BITS_CMD_P (1L<<23) bnx2.h 　
4618
 BNX2_MISC_ENABLE_SET_BITS_MGMT_BNX2_MISC_ENABLE_SET_BITS_MGMT_ (1L<<24) bnx2.h 　
4619
 BNX2_MISC_ENABLE_SET_BITS_TIMERBNX2_MISC_ENABLE_SET_BITS_TIMER (1L<<25) bnx2.h 　
4620
 BNX2_MISC_ENABLE_SET_BITS_DMA_EBNX2_MISC_ENABLE_SET_BITS_DMA_E (1L<<26) bnx2.h 　
4621
 BNX2_MISC_ENABLE_SET_BITS_UMP_EBNX2_MISC_ENABLE_SET_BITS_UMP_E (1L<<27) bnx2.h 　
4622
 BNX2_MISC_ENABLE_CLR_BITSBNX2_MISC_ENABLE_CLR_BITS 0x00000814 bnx2.h 　
4623
 BNX2_MISC_ENABLE_CLR_BITS_TX_SCBNX2_MISC_ENABLE_CLR_BITS_TX_SC (1L<<0) bnx2.h 　
4624
 BNX2_MISC_ENABLE_CLR_BITS_TX_BDBNX2_MISC_ENABLE_CLR_BITS_TX_BD (1L<<1) bnx2.h 　
4625
 BNX2_MISC_ENABLE_CLR_BITS_TX_BDBNX2_MISC_ENABLE_CLR_BITS_TX_BD (1L<<2) bnx2.h 　
4626
 BNX2_MISC_ENABLE_CLR_BITS_TX_PRBNX2_MISC_ENABLE_CLR_BITS_TX_PR (1L<<3) bnx2.h 　
4627
 BNX2_MISC_ENABLE_CLR_BITS_TX_DMBNX2_MISC_ENABLE_CLR_BITS_TX_DM (1L<<4) bnx2.h 　
4628
 BNX2_MISC_ENABLE_CLR_BITS_TX_PABNX2_MISC_ENABLE_CLR_BITS_TX_PA (1L<<5) bnx2.h 　
4629
 BNX2_MISC_ENABLE_CLR_BITS_TX_PABNX2_MISC_ENABLE_CLR_BITS_TX_PA (1L<<6) bnx2.h 　
4630
 BNX2_MISC_ENABLE_CLR_BITS_TX_HEBNX2_MISC_ENABLE_CLR_BITS_TX_HE (1L<<7) bnx2.h 　
4631
 BNX2_MISC_ENABLE_CLR_BITS_TX_ASBNX2_MISC_ENABLE_CLR_BITS_TX_AS (1L<<8) bnx2.h 　
4632
 BNX2_MISC_ENABLE_CLR_BITS_EMAC_BNX2_MISC_ENABLE_CLR_BITS_EMAC_ (1L<<9) bnx2.h 　
4633
 BNX2_MISC_ENABLE_CLR_BITS_RX_PABNX2_MISC_ENABLE_CLR_BITS_RX_PA (1L<<10) bnx2.h 　
4634
 BNX2_MISC_ENABLE_CLR_BITS_RX_PABNX2_MISC_ENABLE_CLR_BITS_RX_PA (1L<<11) bnx2.h 　
4635
 BNX2_MISC_ENABLE_CLR_BITS_RX_MBBNX2_MISC_ENABLE_CLR_BITS_RX_MB (1L<<12) bnx2.h 　
4636
 BNX2_MISC_ENABLE_CLR_BITS_RX_LOBNX2_MISC_ENABLE_CLR_BITS_RX_LO (1L<<13) bnx2.h 　
4637
 BNX2_MISC_ENABLE_CLR_BITS_RX_PRBNX2_MISC_ENABLE_CLR_BITS_RX_PR (1L<<14) bnx2.h 　
4638
 BNX2_MISC_ENABLE_CLR_BITS_RX_V2BNX2_MISC_ENABLE_CLR_BITS_RX_V2 (1L<<15) bnx2.h 　
4639
 BNX2_MISC_ENABLE_CLR_BITS_RX_BDBNX2_MISC_ENABLE_CLR_BITS_RX_BD (1L<<16) bnx2.h 　
4640
 BNX2_MISC_ENABLE_CLR_BITS_RX_DMBNX2_MISC_ENABLE_CLR_BITS_RX_DM (1L<<17) bnx2.h 　
4641
 BNX2_MISC_ENABLE_CLR_BITS_COMPLBNX2_MISC_ENABLE_CLR_BITS_COMPL (1L<<18) bnx2.h 　
4642
 BNX2_MISC_ENABLE_CLR_BITS_HOST_BNX2_MISC_ENABLE_CLR_BITS_HOST_ (1L<<19) bnx2.h 　
4643
 BNX2_MISC_ENABLE_CLR_BITS_MAILBBNX2_MISC_ENABLE_CLR_BITS_MAILB (1L<<20) bnx2.h 　
4644
 BNX2_MISC_ENABLE_CLR_BITS_CONTEBNX2_MISC_ENABLE_CLR_BITS_CONTE (1L<<21) bnx2.h 　
4645
 BNX2_MISC_ENABLE_CLR_BITS_CMD_SBNX2_MISC_ENABLE_CLR_BITS_CMD_S (1L<<22) bnx2.h 　
4646
 BNX2_MISC_ENABLE_CLR_BITS_CMD_PBNX2_MISC_ENABLE_CLR_BITS_CMD_P (1L<<23) bnx2.h 　
4647
 BNX2_MISC_ENABLE_CLR_BITS_MGMT_BNX2_MISC_ENABLE_CLR_BITS_MGMT_ (1L<<24) bnx2.h 　
4648
 BNX2_MISC_ENABLE_CLR_BITS_TIMERBNX2_MISC_ENABLE_CLR_BITS_TIMER (1L<<25) bnx2.h 　
4649
 BNX2_MISC_ENABLE_CLR_BITS_DMA_EBNX2_MISC_ENABLE_CLR_BITS_DMA_E (1L<<26) bnx2.h 　
4650
 BNX2_MISC_ENABLE_CLR_BITS_UMP_EBNX2_MISC_ENABLE_CLR_BITS_UMP_E (1L<<27) bnx2.h 　
4651
 BNX2_MISC_CLOCK_CONTROL_BITSBNX2_MISC_CLOCK_CONTROL_BITS 0x00000818 bnx2.h 　
4652
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (0xfL<<0) bnx2.h 　
4653
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (0L<<0) bnx2.h 　
4654
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (1L<<0) bnx2.h 　
4655
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (2L<<0) bnx2.h 　
4656
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (3L<<0) bnx2.h 　
4657
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (4L<<0) bnx2.h 　
4658
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (5L<<0) bnx2.h 　
4659
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (6L<<0) bnx2.h 　
4660
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (7L<<0) bnx2.h 　
4661
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (0xfL<<0) bnx2.h 　
4662
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (1L<<6) bnx2.h 　
4663
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (1L<<7) bnx2.h 　
4664
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (0x7L<<8) bnx2.h 　
4665
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (0L<<8) bnx2.h 　
4666
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (1L<<8) bnx2.h 　
4667
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (2L<<8) bnx2.h 　
4668
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (4L<<8) bnx2.h 　
4669
 BNX2_MISC_CLOCK_CONTROL_BITS_PLBNX2_MISC_CLOCK_CONTROL_BITS_PL (1L<<11) bnx2.h 　
4670
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (0xfL<<12) bnx2.h 　
4671
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (0L<<12) bnx2.h 　
4672
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (1L<<12) bnx2.h 　
4673
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (2L<<12) bnx2.h 　
4674
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (4L<<12) bnx2.h 　
4675
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (8L<<12) bnx2.h 　
4676
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (1L<<16) bnx2.h 　
4677
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (1L<<17) bnx2.h 　
4678
 BNX2_MISC_CLOCK_CONTROL_BITS_REBNX2_MISC_CLOCK_CONTROL_BITS_RE (1L<<18) bnx2.h 　
4679
 BNX2_MISC_CLOCK_CONTROL_BITS_USBNX2_MISC_CLOCK_CONTROL_BITS_US (1L<<19) bnx2.h 　
4680
 BNX2_MISC_CLOCK_CONTROL_BITS_REBNX2_MISC_CLOCK_CONTROL_BITS_RE (0xfffL<<20) bnx2.h 　
4681
 BNX2_MISC_GPIOBNX2_MISC_GPIO 0x0000081c bnx2.h 　
4682
 BNX2_MISC_GPIO_VALUEBNX2_MISC_GPIO_VALUE (0xffL<<0) bnx2.h 　
4683
 BNX2_MISC_GPIO_SETBNX2_MISC_GPIO_SET (0xffL<<8) bnx2.h 　
4684
 BNX2_MISC_GPIO_CLRBNX2_MISC_GPIO_CLR (0xffL<<16) bnx2.h 　
4685
 BNX2_MISC_GPIO_FLOATBNX2_MISC_GPIO_FLOAT (0xffL<<24) bnx2.h 　
4686
 BNX2_MISC_GPIO_INTBNX2_MISC_GPIO_INT 0x00000820 bnx2.h 　
4687
 BNX2_MISC_GPIO_INT_INT_STATEBNX2_MISC_GPIO_INT_INT_STATE (0xfL<<0) bnx2.h 　
4688
 BNX2_MISC_GPIO_INT_OLD_VALUEBNX2_MISC_GPIO_INT_OLD_VALUE (0xfL<<8) bnx2.h 　
4689
 BNX2_MISC_GPIO_INT_OLD_SETBNX2_MISC_GPIO_INT_OLD_SET (0xfL<<16) bnx2.h 　
4690
 BNX2_MISC_GPIO_INT_OLD_CLRBNX2_MISC_GPIO_INT_OLD_CLR (0xfL<<24) bnx2.h 　
4691
 BNX2_MISC_CONFIG_LFSRBNX2_MISC_CONFIG_LFSR 0x00000824 bnx2.h 　
4692
 BNX2_MISC_CONFIG_LFSR_DIVBNX2_MISC_CONFIG_LFSR_DIV (0xffffL<<0) bnx2.h 　
4693
 BNX2_MISC_LFSR_MASK_BITSBNX2_MISC_LFSR_MASK_BITS 0x00000828 bnx2.h 　
4694
 BNX2_MISC_LFSR_MASK_BITS_TX_SCHBNX2_MISC_LFSR_MASK_BITS_TX_SCH (1L<<0) bnx2.h 　
4695
 BNX2_MISC_LFSR_MASK_BITS_TX_BD_BNX2_MISC_LFSR_MASK_BITS_TX_BD_ (1L<<1) bnx2.h 　
4696
 BNX2_MISC_LFSR_MASK_BITS_TX_BD_BNX2_MISC_LFSR_MASK_BITS_TX_BD_ (1L<<2) bnx2.h 　
4697
 BNX2_MISC_LFSR_MASK_BITS_TX_PROBNX2_MISC_LFSR_MASK_BITS_TX_PRO (1L<<3) bnx2.h 　
4698
 BNX2_MISC_LFSR_MASK_BITS_TX_DMABNX2_MISC_LFSR_MASK_BITS_TX_DMA (1L<<4) bnx2.h 　
4699
 BNX2_MISC_LFSR_MASK_BITS_TX_PATBNX2_MISC_LFSR_MASK_BITS_TX_PAT (1L<<5) bnx2.h 　
4700
 BNX2_MISC_LFSR_MASK_BITS_TX_PAYBNX2_MISC_LFSR_MASK_BITS_TX_PAY (1L<<6) bnx2.h 　
4701
 BNX2_MISC_LFSR_MASK_BITS_TX_HEABNX2_MISC_LFSR_MASK_BITS_TX_HEA (1L<<7) bnx2.h 　
4702
 BNX2_MISC_LFSR_MASK_BITS_TX_ASSBNX2_MISC_LFSR_MASK_BITS_TX_ASS (1L<<8) bnx2.h 　
4703
 BNX2_MISC_LFSR_MASK_BITS_EMAC_EBNX2_MISC_LFSR_MASK_BITS_EMAC_E (1L<<9) bnx2.h 　
4704
 BNX2_MISC_LFSR_MASK_BITS_RX_PARBNX2_MISC_LFSR_MASK_BITS_RX_PAR (1L<<10) bnx2.h 　
4705
 BNX2_MISC_LFSR_MASK_BITS_RX_PARBNX2_MISC_LFSR_MASK_BITS_RX_PAR (1L<<11) bnx2.h 　
4706
 BNX2_MISC_LFSR_MASK_BITS_RX_MBUBNX2_MISC_LFSR_MASK_BITS_RX_MBU (1L<<12) bnx2.h 　
4707
 BNX2_MISC_LFSR_MASK_BITS_RX_LOOBNX2_MISC_LFSR_MASK_BITS_RX_LOO (1L<<13) bnx2.h 　
4708
 BNX2_MISC_LFSR_MASK_BITS_RX_PROBNX2_MISC_LFSR_MASK_BITS_RX_PRO (1L<<14) bnx2.h 　
4709
 BNX2_MISC_LFSR_MASK_BITS_RX_V2PBNX2_MISC_LFSR_MASK_BITS_RX_V2P (1L<<15) bnx2.h 　
4710
 BNX2_MISC_LFSR_MASK_BITS_RX_BD_BNX2_MISC_LFSR_MASK_BITS_RX_BD_ (1L<<16) bnx2.h 　
4711
 BNX2_MISC_LFSR_MASK_BITS_RX_DMABNX2_MISC_LFSR_MASK_BITS_RX_DMA (1L<<17) bnx2.h 　
4712
 BNX2_MISC_LFSR_MASK_BITS_COMPLEBNX2_MISC_LFSR_MASK_BITS_COMPLE (1L<<18) bnx2.h 　
4713
 BNX2_MISC_LFSR_MASK_BITS_HOST_CBNX2_MISC_LFSR_MASK_BITS_HOST_C (1L<<19) bnx2.h 　
4714
 BNX2_MISC_LFSR_MASK_BITS_MAILBOBNX2_MISC_LFSR_MASK_BITS_MAILBO (1L<<20) bnx2.h 　
4715
 BNX2_MISC_LFSR_MASK_BITS_CONTEXBNX2_MISC_LFSR_MASK_BITS_CONTEX (1L<<21) bnx2.h 　
4716
 BNX2_MISC_LFSR_MASK_BITS_CMD_SCBNX2_MISC_LFSR_MASK_BITS_CMD_SC (1L<<22) bnx2.h 　
4717
 BNX2_MISC_LFSR_MASK_BITS_CMD_PRBNX2_MISC_LFSR_MASK_BITS_CMD_PR (1L<<23) bnx2.h 　
4718
 BNX2_MISC_LFSR_MASK_BITS_MGMT_PBNX2_MISC_LFSR_MASK_BITS_MGMT_P (1L<<24) bnx2.h 　
4719
 BNX2_MISC_LFSR_MASK_BITS_TIMER_BNX2_MISC_LFSR_MASK_BITS_TIMER_ (1L<<25) bnx2.h 　
4720
 BNX2_MISC_LFSR_MASK_BITS_DMA_ENBNX2_MISC_LFSR_MASK_BITS_DMA_EN (1L<<26) bnx2.h 　
4721
 BNX2_MISC_LFSR_MASK_BITS_UMP_ENBNX2_MISC_LFSR_MASK_BITS_UMP_EN (1L<<27) bnx2.h 　
4722
 BNX2_MISC_ARB_REQ0BNX2_MISC_ARB_REQ0 0x0000082c bnx2.h 　
4723
 BNX2_MISC_ARB_REQ1BNX2_MISC_ARB_REQ1 0x00000830 bnx2.h 　
4724
 BNX2_MISC_ARB_REQ2BNX2_MISC_ARB_REQ2 0x00000834 bnx2.h 　
4725
 BNX2_MISC_ARB_REQ3BNX2_MISC_ARB_REQ3 0x00000838 bnx2.h 　
4726
 BNX2_MISC_ARB_REQ4BNX2_MISC_ARB_REQ4 0x0000083c bnx2.h 　
4727
 BNX2_MISC_ARB_FREE0BNX2_MISC_ARB_FREE0 0x00000840 bnx2.h 　
4728
 BNX2_MISC_ARB_FREE1BNX2_MISC_ARB_FREE1 0x00000844 bnx2.h 　
4729
 BNX2_MISC_ARB_FREE2BNX2_MISC_ARB_FREE2 0x00000848 bnx2.h 　
4730
 BNX2_MISC_ARB_FREE3BNX2_MISC_ARB_FREE3 0x0000084c bnx2.h 　
4731
 BNX2_MISC_ARB_FREE4BNX2_MISC_ARB_FREE4 0x00000850 bnx2.h 　
4732
 BNX2_MISC_ARB_REQ_STATUS0BNX2_MISC_ARB_REQ_STATUS0 0x00000854 bnx2.h 　
4733
 BNX2_MISC_ARB_REQ_STATUS1BNX2_MISC_ARB_REQ_STATUS1 0x00000858 bnx2.h 　
4734
 BNX2_MISC_ARB_REQ_STATUS2BNX2_MISC_ARB_REQ_STATUS2 0x0000085c bnx2.h 　
4735
 BNX2_MISC_ARB_REQ_STATUS3BNX2_MISC_ARB_REQ_STATUS3 0x00000860 bnx2.h 　
4736
 BNX2_MISC_ARB_REQ_STATUS4BNX2_MISC_ARB_REQ_STATUS4 0x00000864 bnx2.h 　
4737
 BNX2_MISC_ARB_GNT0BNX2_MISC_ARB_GNT0 0x00000868 bnx2.h 　
4738
 BNX2_MISC_ARB_GNT0_0BNX2_MISC_ARB_GNT0_0 (0x7L<<0) bnx2.h 　
4739
 BNX2_MISC_ARB_GNT0_1BNX2_MISC_ARB_GNT0_1 (0x7L<<4) bnx2.h 　
4740
 BNX2_MISC_ARB_GNT0_2BNX2_MISC_ARB_GNT0_2 (0x7L<<8) bnx2.h 　
4741
 BNX2_MISC_ARB_GNT0_3BNX2_MISC_ARB_GNT0_3 (0x7L<<12) bnx2.h 　
4742
 BNX2_MISC_ARB_GNT0_4BNX2_MISC_ARB_GNT0_4 (0x7L<<16) bnx2.h 　
4743
 BNX2_MISC_ARB_GNT0_5BNX2_MISC_ARB_GNT0_5 (0x7L<<20) bnx2.h 　
4744
 BNX2_MISC_ARB_GNT0_6BNX2_MISC_ARB_GNT0_6 (0x7L<<24) bnx2.h 　
4745
 BNX2_MISC_ARB_GNT0_7BNX2_MISC_ARB_GNT0_7 (0x7L<<28) bnx2.h 　
4746
 BNX2_MISC_ARB_GNT1BNX2_MISC_ARB_GNT1 0x0000086c bnx2.h 　
4747
 BNX2_MISC_ARB_GNT1_8BNX2_MISC_ARB_GNT1_8 (0x7L<<0) bnx2.h 　
4748
 BNX2_MISC_ARB_GNT1_9BNX2_MISC_ARB_GNT1_9 (0x7L<<4) bnx2.h 　
4749
 BNX2_MISC_ARB_GNT1_10BNX2_MISC_ARB_GNT1_10 (0x7L<<8) bnx2.h 　
4750
 BNX2_MISC_ARB_GNT1_11BNX2_MISC_ARB_GNT1_11 (0x7L<<12) bnx2.h 　
4751
 BNX2_MISC_ARB_GNT1_12BNX2_MISC_ARB_GNT1_12 (0x7L<<16) bnx2.h 　
4752
 BNX2_MISC_ARB_GNT1_13BNX2_MISC_ARB_GNT1_13 (0x7L<<20) bnx2.h 　
4753
 BNX2_MISC_ARB_GNT1_14BNX2_MISC_ARB_GNT1_14 (0x7L<<24) bnx2.h 　
4754
 BNX2_MISC_ARB_GNT1_15BNX2_MISC_ARB_GNT1_15 (0x7L<<28) bnx2.h 　
4755
 BNX2_MISC_ARB_GNT2BNX2_MISC_ARB_GNT2 0x00000870 bnx2.h 　
4756
 BNX2_MISC_ARB_GNT2_16BNX2_MISC_ARB_GNT2_16 (0x7L<<0) bnx2.h 　
4757
 BNX2_MISC_ARB_GNT2_17BNX2_MISC_ARB_GNT2_17 (0x7L<<4) bnx2.h 　
4758
 BNX2_MISC_ARB_GNT2_18BNX2_MISC_ARB_GNT2_18 (0x7L<<8) bnx2.h 　
4759
 BNX2_MISC_ARB_GNT2_19BNX2_MISC_ARB_GNT2_19 (0x7L<<12) bnx2.h 　
4760
 BNX2_MISC_ARB_GNT2_20BNX2_MISC_ARB_GNT2_20 (0x7L<<16) bnx2.h 　
4761
 BNX2_MISC_ARB_GNT2_21BNX2_MISC_ARB_GNT2_21 (0x7L<<20) bnx2.h 　
4762
 BNX2_MISC_ARB_GNT2_22BNX2_MISC_ARB_GNT2_22 (0x7L<<24) bnx2.h 　
4763
 BNX2_MISC_ARB_GNT2_23BNX2_MISC_ARB_GNT2_23 (0x7L<<28) bnx2.h 　
4764
 BNX2_MISC_ARB_GNT3BNX2_MISC_ARB_GNT3 0x00000874 bnx2.h 　
4765
 BNX2_MISC_ARB_GNT3_24BNX2_MISC_ARB_GNT3_24 (0x7L<<0) bnx2.h 　
4766
 BNX2_MISC_ARB_GNT3_25BNX2_MISC_ARB_GNT3_25 (0x7L<<4) bnx2.h 　
4767
 BNX2_MISC_ARB_GNT3_26BNX2_MISC_ARB_GNT3_26 (0x7L<<8) bnx2.h 　
4768
 BNX2_MISC_ARB_GNT3_27BNX2_MISC_ARB_GNT3_27 (0x7L<<12) bnx2.h 　
4769
 BNX2_MISC_ARB_GNT3_28BNX2_MISC_ARB_GNT3_28 (0x7L<<16) bnx2.h 　
4770
 BNX2_MISC_ARB_GNT3_29BNX2_MISC_ARB_GNT3_29 (0x7L<<20) bnx2.h 　
4771
 BNX2_MISC_ARB_GNT3_30BNX2_MISC_ARB_GNT3_30 (0x7L<<24) bnx2.h 　
4772
 BNX2_MISC_ARB_GNT3_31BNX2_MISC_ARB_GNT3_31 (0x7L<<28) bnx2.h 　
4773
 BNX2_MISC_PRBS_CONTROLBNX2_MISC_PRBS_CONTROL 0x00000878 bnx2.h 　
4774
 BNX2_MISC_PRBS_CONTROL_ENBNX2_MISC_PRBS_CONTROL_EN (1L<<0) bnx2.h 　
4775
 BNX2_MISC_PRBS_CONTROL_RSTBBNX2_MISC_PRBS_CONTROL_RSTB (1L<<1) bnx2.h 　
4776
 BNX2_MISC_PRBS_CONTROL_INVBNX2_MISC_PRBS_CONTROL_INV (1L<<2) bnx2.h 　
4777
 BNX2_MISC_PRBS_CONTROL_ERR_CLRBNX2_MISC_PRBS_CONTROL_ERR_CLR (1L<<3) bnx2.h 　
4778
 BNX2_MISC_PRBS_CONTROL_ORDERBNX2_MISC_PRBS_CONTROL_ORDER (0x3L<<4) bnx2.h 　
4779
 BNX2_MISC_PRBS_CONTROL_ORDER_7TBNX2_MISC_PRBS_CONTROL_ORDER_7T (0L<<4) bnx2.h 　
4780
 BNX2_MISC_PRBS_CONTROL_ORDER_15BNX2_MISC_PRBS_CONTROL_ORDER_15 (1L<<4) bnx2.h 　
4781
 BNX2_MISC_PRBS_CONTROL_ORDER_23BNX2_MISC_PRBS_CONTROL_ORDER_23 (2L<<4) bnx2.h 　
4782
 BNX2_MISC_PRBS_CONTROL_ORDER_31BNX2_MISC_PRBS_CONTROL_ORDER_31 (3L<<4) bnx2.h 　
4783
 BNX2_MISC_PRBS_STATUSBNX2_MISC_PRBS_STATUS 0x0000087c bnx2.h 　
4784
 BNX2_MISC_PRBS_STATUS_LOCKBNX2_MISC_PRBS_STATUS_LOCK (1L<<0) bnx2.h 　
4785
 BNX2_MISC_PRBS_STATUS_STKYBNX2_MISC_PRBS_STATUS_STKY (1L<<1) bnx2.h 　
4786
 BNX2_MISC_PRBS_STATUS_ERRORSBNX2_MISC_PRBS_STATUS_ERRORS (0x3fffL<<2) bnx2.h 　
4787
 BNX2_MISC_PRBS_STATUS_STATEBNX2_MISC_PRBS_STATUS_STATE (0xfL<<16) bnx2.h 　
4788
 BNX2_MISC_SM_ASF_CONTROLBNX2_MISC_SM_ASF_CONTROL 0x00000880 bnx2.h 　
4789
 BNX2_MISC_SM_ASF_CONTROL_ASF_RSBNX2_MISC_SM_ASF_CONTROL_ASF_RS (1L<<0) bnx2.h 　
4790
 BNX2_MISC_SM_ASF_CONTROL_TSC_ENBNX2_MISC_SM_ASF_CONTROL_TSC_EN (1L<<1) bnx2.h 　
4791
 BNX2_MISC_SM_ASF_CONTROL_WG_TOBNX2_MISC_SM_ASF_CONTROL_WG_TO (1L<<2) bnx2.h 　
4792
 BNX2_MISC_SM_ASF_CONTROL_HB_TOBNX2_MISC_SM_ASF_CONTROL_HB_TO (1L<<3) bnx2.h 　
4793
 BNX2_MISC_SM_ASF_CONTROL_PA_TOBNX2_MISC_SM_ASF_CONTROL_PA_TO (1L<<4) bnx2.h 　
4794
 BNX2_MISC_SM_ASF_CONTROL_PL_TOBNX2_MISC_SM_ASF_CONTROL_PL_TO (1L<<5) bnx2.h 　
4795
 BNX2_MISC_SM_ASF_CONTROL_RT_TOBNX2_MISC_SM_ASF_CONTROL_RT_TO (1L<<6) bnx2.h 　
4796
 BNX2_MISC_SM_ASF_CONTROL_SMB_EVBNX2_MISC_SM_ASF_CONTROL_SMB_EV (1L<<7) bnx2.h 　
4797
 BNX2_MISC_SM_ASF_CONTROL_RESBNX2_MISC_SM_ASF_CONTROL_RES (0xfL<<8) bnx2.h 　
4798
 BNX2_MISC_SM_ASF_CONTROL_SMB_ENBNX2_MISC_SM_ASF_CONTROL_SMB_EN (1L<<12) bnx2.h 　
4799
 BNX2_MISC_SM_ASF_CONTROL_SMB_BBBNX2_MISC_SM_ASF_CONTROL_SMB_BB (1L<<13) bnx2.h 　
4800
 BNX2_MISC_SM_ASF_CONTROL_SMB_NOBNX2_MISC_SM_ASF_CONTROL_SMB_NO (1L<<14) bnx2.h 　
4801
 BNX2_MISC_SM_ASF_CONTROL_SMB_AUBNX2_MISC_SM_ASF_CONTROL_SMB_AU (1L<<15) bnx2.h 　
4802
 BNX2_MISC_SM_ASF_CONTROL_NIC_SMBNX2_MISC_SM_ASF_CONTROL_NIC_SM (0x3fL<<16) bnx2.h 　
4803
 BNX2_MISC_SM_ASF_CONTROL_NIC_SMBNX2_MISC_SM_ASF_CONTROL_NIC_SM (0x3fL<<24) bnx2.h 　
4804
 BNX2_MISC_SM_ASF_CONTROL_EN_NICBNX2_MISC_SM_ASF_CONTROL_EN_NIC (1L<<30) bnx2.h 　
4805
 BNX2_MISC_SM_ASF_CONTROL_SMB_EABNX2_MISC_SM_ASF_CONTROL_SMB_EA (1L<<31) bnx2.h 　
4806
 BNX2_MISC_SMB_INBNX2_MISC_SMB_IN 0x00000884 bnx2.h 　
4807
 BNX2_MISC_SMB_IN_DAT_INBNX2_MISC_SMB_IN_DAT_IN (0xffL<<0) bnx2.h 　
4808
 BNX2_MISC_SMB_IN_RDYBNX2_MISC_SMB_IN_RDY (1L<<8) bnx2.h 　
4809
 BNX2_MISC_SMB_IN_DONEBNX2_MISC_SMB_IN_DONE (1L<<9) bnx2.h 　
4810
 BNX2_MISC_SMB_IN_FIRSTBYTEBNX2_MISC_SMB_IN_FIRSTBYTE (1L<<10) bnx2.h 　
4811
 BNX2_MISC_SMB_IN_STATUSBNX2_MISC_SMB_IN_STATUS (0x7L<<11) bnx2.h 　
4812
 BNX2_MISC_SMB_IN_STATUS_OKBNX2_MISC_SMB_IN_STATUS_OK (0x0L<<11) bnx2.h 　
4813
 BNX2_MISC_SMB_IN_STATUS_PECBNX2_MISC_SMB_IN_STATUS_PEC (0x1L<<11) bnx2.h 　
4814
 BNX2_MISC_SMB_IN_STATUS_OFLOWBNX2_MISC_SMB_IN_STATUS_OFLOW (0x2L<<11) bnx2.h 　
4815
 BNX2_MISC_SMB_IN_STATUS_STOPBNX2_MISC_SMB_IN_STATUS_STOP (0x3L<<11) bnx2.h 　
4816
 BNX2_MISC_SMB_IN_STATUS_TIMEOUTBNX2_MISC_SMB_IN_STATUS_TIMEOUT (0x4L<<11) bnx2.h 　
4817
 BNX2_MISC_SMB_OUTBNX2_MISC_SMB_OUT 0x00000888 bnx2.h 　
4818
 BNX2_MISC_SMB_OUT_DAT_OUTBNX2_MISC_SMB_OUT_DAT_OUT (0xffL<<0) bnx2.h 　
4819
 BNX2_MISC_SMB_OUT_RDYBNX2_MISC_SMB_OUT_RDY (1L<<8) bnx2.h 　
4820
 BNX2_MISC_SMB_OUT_STARTBNX2_MISC_SMB_OUT_START (1L<<9) bnx2.h 　
4821
 BNX2_MISC_SMB_OUT_LASTBNX2_MISC_SMB_OUT_LAST (1L<<10) bnx2.h 　
4822
 BNX2_MISC_SMB_OUT_ACC_TYPEBNX2_MISC_SMB_OUT_ACC_TYPE (1L<<11) bnx2.h 　
4823
 BNX2_MISC_SMB_OUT_ENB_PECBNX2_MISC_SMB_OUT_ENB_PEC (1L<<12) bnx2.h 　
4824
 BNX2_MISC_SMB_OUT_GET_RX_LENBNX2_MISC_SMB_OUT_GET_RX_LEN (1L<<13) bnx2.h 　
4825
 BNX2_MISC_SMB_OUT_SMB_READ_LENBNX2_MISC_SMB_OUT_SMB_READ_LEN (0x3fL<<14) bnx2.h 　
4826
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (0xfL<<20) bnx2.h 　
4827
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (0L<<20) bnx2.h 　
4828
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (1L<<20) bnx2.h 　
4829
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (9L<<20) bnx2.h 　
4830
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (2L<<20) bnx2.h 　
4831
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (3L<<20) bnx2.h 　
4832
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (4L<<20) bnx2.h 　
4833
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (5L<<20) bnx2.h 　
4834
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (0xdL<<20) bnx2.h 　
4835
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (0x6L<<20) bnx2.h 　
4836
 BNX2_MISC_SMB_OUT_SMB_OUT_SLAVEBNX2_MISC_SMB_OUT_SMB_OUT_SLAVE (1L<<24) bnx2.h 　
4837
 BNX2_MISC_SMB_OUT_SMB_OUT_DAT_EBNX2_MISC_SMB_OUT_SMB_OUT_DAT_E (1L<<25) bnx2.h 　
4838
 BNX2_MISC_SMB_OUT_SMB_OUT_DAT_IBNX2_MISC_SMB_OUT_SMB_OUT_DAT_I (1L<<26) bnx2.h 　
4839
 BNX2_MISC_SMB_OUT_SMB_OUT_CLK_EBNX2_MISC_SMB_OUT_SMB_OUT_CLK_E (1L<<27) bnx2.h 　
4840
 BNX2_MISC_SMB_OUT_SMB_OUT_CLK_IBNX2_MISC_SMB_OUT_SMB_OUT_CLK_I (1L<<28) bnx2.h 　
4841
 BNX2_MISC_SMB_WATCHDOGBNX2_MISC_SMB_WATCHDOG 0x0000088c bnx2.h 　
4842
 BNX2_MISC_SMB_WATCHDOG_WATCHDOGBNX2_MISC_SMB_WATCHDOG_WATCHDOG (0xffffL<<0) bnx2.h 　
4843
 BNX2_MISC_SMB_HEARTBEATBNX2_MISC_SMB_HEARTBEAT 0x00000890 bnx2.h 　
4844
 BNX2_MISC_SMB_HEARTBEAT_HEARTBEBNX2_MISC_SMB_HEARTBEAT_HEARTBE (0xffffL<<0) bnx2.h 　
4845
 BNX2_MISC_SMB_POLL_ASFBNX2_MISC_SMB_POLL_ASF 0x00000894 bnx2.h 　
4846
 BNX2_MISC_SMB_POLL_ASF_POLL_ASFBNX2_MISC_SMB_POLL_ASF_POLL_ASF (0xffffL<<0) bnx2.h 　
4847
 BNX2_MISC_SMB_POLL_LEGACYBNX2_MISC_SMB_POLL_LEGACY 0x00000898 bnx2.h 　
4848
 BNX2_MISC_SMB_POLL_LEGACY_POLL_BNX2_MISC_SMB_POLL_LEGACY_POLL_ (0xffffL<<0) bnx2.h 　
4849
 BNX2_MISC_SMB_RETRANBNX2_MISC_SMB_RETRAN 0x0000089c bnx2.h 　
4850
 BNX2_MISC_SMB_RETRAN_RETRANBNX2_MISC_SMB_RETRAN_RETRAN (0xffL<<0) bnx2.h 　
4851
 BNX2_MISC_SMB_TIMESTAMPBNX2_MISC_SMB_TIMESTAMP 0x000008a0 bnx2.h 　
4852
 BNX2_MISC_SMB_TIMESTAMP_TIMESTABNX2_MISC_SMB_TIMESTAMP_TIMESTA (0xffffffffL<<0) bnx2.h 　
4853
 BNX2_MISC_PERR_ENA0BNX2_MISC_PERR_ENA0 0x000008a4 bnx2.h 　
4854
 BNX2_MISC_PERR_ENA0_COM_MISC_CTBNX2_MISC_PERR_ENA0_COM_MISC_CT (1L<<0) bnx2.h 　
4855
 BNX2_MISC_PERR_ENA0_COM_MISC_REBNX2_MISC_PERR_ENA0_COM_MISC_RE (1L<<1) bnx2.h 　
4856
 BNX2_MISC_PERR_ENA0_COM_MISC_SCBNX2_MISC_PERR_ENA0_COM_MISC_SC (1L<<2) bnx2.h 　
4857
 BNX2_MISC_PERR_ENA0_CP_MISC_CTXBNX2_MISC_PERR_ENA0_CP_MISC_CTX (1L<<3) bnx2.h 　
4858
 BNX2_MISC_PERR_ENA0_CP_MISC_REGBNX2_MISC_PERR_ENA0_CP_MISC_REG (1L<<4) bnx2.h 　
4859
 BNX2_MISC_PERR_ENA0_CP_MISC_SCPBNX2_MISC_PERR_ENA0_CP_MISC_SCP (1L<<5) bnx2.h 　
4860
 BNX2_MISC_PERR_ENA0_CS_MISC_TMEBNX2_MISC_PERR_ENA0_CS_MISC_TME (1L<<6) bnx2.h 　
4861
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<7) bnx2.h 　
4862
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<8) bnx2.h 　
4863
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<9) bnx2.h 　
4864
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<10) bnx2.h 　
4865
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<11) bnx2.h 　
4866
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<12) bnx2.h 　
4867
 BNX2_MISC_PERR_ENA0_CTX_MISC_PGBNX2_MISC_PERR_ENA0_CTX_MISC_PG (1L<<13) bnx2.h 　
4868
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<14) bnx2.h 　
4869
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<15) bnx2.h 　
4870
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<16) bnx2.h 　
4871
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<17) bnx2.h 　
4872
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<18) bnx2.h 　
4873
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<19) bnx2.h 　
4874
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<20) bnx2.h 　
4875
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<21) bnx2.h 　
4876
 BNX2_MISC_PERR_ENA0_HC_MISC_DMABNX2_MISC_PERR_ENA0_HC_MISC_DMA (1L<<22) bnx2.h 　
4877
 BNX2_MISC_PERR_ENA0_MCP_MISC_REBNX2_MISC_PERR_ENA0_MCP_MISC_RE (1L<<23) bnx2.h 　
4878
 BNX2_MISC_PERR_ENA0_MCP_MISC_SCBNX2_MISC_PERR_ENA0_MCP_MISC_SC (1L<<24) bnx2.h 　
4879
 BNX2_MISC_PERR_ENA0_MQ_MISC_CTXBNX2_MISC_PERR_ENA0_MQ_MISC_CTX (1L<<25) bnx2.h 　
4880
 BNX2_MISC_PERR_ENA0_RBDC_MISCBNX2_MISC_PERR_ENA0_RBDC_MISC (1L<<26) bnx2.h 　
4881
 BNX2_MISC_PERR_ENA0_RBUF_MISC_MBNX2_MISC_PERR_ENA0_RBUF_MISC_M (1L<<27) bnx2.h 　
4882
 BNX2_MISC_PERR_ENA0_RBUF_MISC_PBNX2_MISC_PERR_ENA0_RBUF_MISC_P (1L<<28) bnx2.h 　
4883
 BNX2_MISC_PERR_ENA0_RDE_MISC_RPBNX2_MISC_PERR_ENA0_RDE_MISC_RP (1L<<29) bnx2.h 　
4884
 BNX2_MISC_PERR_ENA0_RDE_MISC_RPBNX2_MISC_PERR_ENA0_RDE_MISC_RP (1L<<30) bnx2.h 　
4885
 BNX2_MISC_PERR_ENA0_RV2P_MISC_CBNX2_MISC_PERR_ENA0_RV2P_MISC_C (1L<<31) bnx2.h 　
4886
 BNX2_MISC_PERR_ENA1BNX2_MISC_PERR_ENA1 0x000008a8 bnx2.h 　
4887
 BNX2_MISC_PERR_ENA1_RV2P_MISC_CBNX2_MISC_PERR_ENA1_RV2P_MISC_C (1L<<0) bnx2.h 　
4888
 BNX2_MISC_PERR_ENA1_RV2P_MISC_PBNX2_MISC_PERR_ENA1_RV2P_MISC_P (1L<<1) bnx2.h 　
4889
 BNX2_MISC_PERR_ENA1_RV2P_MISC_PBNX2_MISC_PERR_ENA1_RV2P_MISC_P (1L<<2) bnx2.h 　
4890
 BNX2_MISC_PERR_ENA1_RXP_MISC_CTBNX2_MISC_PERR_ENA1_RXP_MISC_CT (1L<<3) bnx2.h 　
4891
 BNX2_MISC_PERR_ENA1_RXP_MISC_REBNX2_MISC_PERR_ENA1_RXP_MISC_RE (1L<<4) bnx2.h 　
4892
 BNX2_MISC_PERR_ENA1_RXP_MISC_SCBNX2_MISC_PERR_ENA1_RXP_MISC_SC (1L<<5) bnx2.h 　
4893
 BNX2_MISC_PERR_ENA1_RXP_MISC_RBBNX2_MISC_PERR_ENA1_RXP_MISC_RB (1L<<6) bnx2.h 　
4894
 BNX2_MISC_PERR_ENA1_TBDC_MISCBNX2_MISC_PERR_ENA1_TBDC_MISC (1L<<7) bnx2.h 　
4895
 BNX2_MISC_PERR_ENA1_TDMA_MISCBNX2_MISC_PERR_ENA1_TDMA_MISC (1L<<8) bnx2.h 　
4896
 BNX2_MISC_PERR_ENA1_THBUF_MISC_BNX2_MISC_PERR_ENA1_THBUF_MISC_ (1L<<9) bnx2.h 　
4897
 BNX2_MISC_PERR_ENA1_THBUF_MISC_BNX2_MISC_PERR_ENA1_THBUF_MISC_ (1L<<10) bnx2.h 　
4898
 BNX2_MISC_PERR_ENA1_TPAT_MISC_RBNX2_MISC_PERR_ENA1_TPAT_MISC_R (1L<<11) bnx2.h 　
4899
 BNX2_MISC_PERR_ENA1_TPAT_MISC_SBNX2_MISC_PERR_ENA1_TPAT_MISC_S (1L<<12) bnx2.h 　
4900
 BNX2_MISC_PERR_ENA1_TPBUF_MISC_BNX2_MISC_PERR_ENA1_TPBUF_MISC_ (1L<<13) bnx2.h 　
4901
 BNX2_MISC_PERR_ENA1_TSCH_MISC_LBNX2_MISC_PERR_ENA1_TSCH_MISC_L (1L<<14) bnx2.h 　
4902
 BNX2_MISC_PERR_ENA1_TXP_MISC_CTBNX2_MISC_PERR_ENA1_TXP_MISC_CT (1L<<15) bnx2.h 　
4903
 BNX2_MISC_PERR_ENA1_TXP_MISC_REBNX2_MISC_PERR_ENA1_TXP_MISC_RE (1L<<16) bnx2.h 　
4904
 BNX2_MISC_PERR_ENA1_TXP_MISC_SCBNX2_MISC_PERR_ENA1_TXP_MISC_SC (1L<<17) bnx2.h 　
4905
 BNX2_MISC_PERR_ENA1_UMP_MISC_FIBNX2_MISC_PERR_ENA1_UMP_MISC_FI (1L<<18) bnx2.h 　
4906
 BNX2_MISC_PERR_ENA1_UMP_MISC_FIBNX2_MISC_PERR_ENA1_UMP_MISC_FI (1L<<19) bnx2.h 　
4907
 BNX2_MISC_PERR_ENA1_UMP_MISC_RXBNX2_MISC_PERR_ENA1_UMP_MISC_RX (1L<<20) bnx2.h 　
4908
 BNX2_MISC_PERR_ENA1_UMP_MISC_TXBNX2_MISC_PERR_ENA1_UMP_MISC_TX (1L<<21) bnx2.h 　
4909
 BNX2_MISC_PERR_ENA1_RDMAQ_MISCBNX2_MISC_PERR_ENA1_RDMAQ_MISC (1L<<22) bnx2.h 　
4910
 BNX2_MISC_PERR_ENA1_CSQ_MISCBNX2_MISC_PERR_ENA1_CSQ_MISC (1L<<23) bnx2.h 　
4911
 BNX2_MISC_PERR_ENA1_CPQ_MISCBNX2_MISC_PERR_ENA1_CPQ_MISC (1L<<24) bnx2.h 　
4912
 BNX2_MISC_PERR_ENA1_MCPQ_MISCBNX2_MISC_PERR_ENA1_MCPQ_MISC (1L<<25) bnx2.h 　
4913
 BNX2_MISC_PERR_ENA1_RV2PMQ_MISCBNX2_MISC_PERR_ENA1_RV2PMQ_MISC (1L<<26) bnx2.h 　
4914
 BNX2_MISC_PERR_ENA1_RV2PPQ_MISCBNX2_MISC_PERR_ENA1_RV2PPQ_MISC (1L<<27) bnx2.h 　
4915
 BNX2_MISC_PERR_ENA1_RV2PTQ_MISCBNX2_MISC_PERR_ENA1_RV2PTQ_MISC (1L<<28) bnx2.h 　
4916
 BNX2_MISC_PERR_ENA1_RXPQ_MISCBNX2_MISC_PERR_ENA1_RXPQ_MISC (1L<<29) bnx2.h 　
4917
 BNX2_MISC_PERR_ENA1_RXPCQ_MISCBNX2_MISC_PERR_ENA1_RXPCQ_MISC (1L<<30) bnx2.h 　
4918
 BNX2_MISC_PERR_ENA1_RLUPQ_MISCBNX2_MISC_PERR_ENA1_RLUPQ_MISC (1L<<31) bnx2.h 　
4919
 BNX2_MISC_PERR_ENA2BNX2_MISC_PERR_ENA2 0x000008ac bnx2.h 　
4920
 BNX2_MISC_PERR_ENA2_COMQ_MISCBNX2_MISC_PERR_ENA2_COMQ_MISC (1L<<0) bnx2.h 　
4921
 BNX2_MISC_PERR_ENA2_COMXQ_MISCBNX2_MISC_PERR_ENA2_COMXQ_MISC (1L<<1) bnx2.h 　
4922
 BNX2_MISC_PERR_ENA2_COMTQ_MISCBNX2_MISC_PERR_ENA2_COMTQ_MISC (1L<<2) bnx2.h 　
4923
 BNX2_MISC_PERR_ENA2_TSCHQ_MISCBNX2_MISC_PERR_ENA2_TSCHQ_MISC (1L<<3) bnx2.h 　
4924
 BNX2_MISC_PERR_ENA2_TBDRQ_MISCBNX2_MISC_PERR_ENA2_TBDRQ_MISC (1L<<4) bnx2.h 　
4925
 BNX2_MISC_PERR_ENA2_TXPQ_MISCBNX2_MISC_PERR_ENA2_TXPQ_MISC (1L<<5) bnx2.h 　
4926
 BNX2_MISC_PERR_ENA2_TDMAQ_MISCBNX2_MISC_PERR_ENA2_TDMAQ_MISC (1L<<6) bnx2.h 　
4927
 BNX2_MISC_PERR_ENA2_TPATQ_MISCBNX2_MISC_PERR_ENA2_TPATQ_MISC (1L<<7) bnx2.h 　
4928
 BNX2_MISC_PERR_ENA2_TASQ_MISCBNX2_MISC_PERR_ENA2_TASQ_MISC (1L<<8) bnx2.h 　
4929
 BNX2_MISC_DEBUG_VECTOR_SELBNX2_MISC_DEBUG_VECTOR_SEL 0x000008b0 bnx2.h 　
4930
 BNX2_MISC_DEBUG_VECTOR_SEL_0BNX2_MISC_DEBUG_VECTOR_SEL_0 (0xfffL<<0) bnx2.h 　
4931
 BNX2_MISC_DEBUG_VECTOR_SEL_1BNX2_MISC_DEBUG_VECTOR_SEL_1 (0xfffL<<12) bnx2.h 　
4932
 BNX2_MISC_VREG_CONTROLBNX2_MISC_VREG_CONTROL 0x000008b4 bnx2.h 　
4933
 BNX2_MISC_VREG_CONTROL_1_2BNX2_MISC_VREG_CONTROL_1_2 (0xfL<<0) bnx2.h 　
4934
 BNX2_MISC_VREG_CONTROL_2_5BNX2_MISC_VREG_CONTROL_2_5 (0xfL<<4) bnx2.h 　
4935
 BNX2_MISC_FINAL_CLK_CTL_VALBNX2_MISC_FINAL_CLK_CTL_VAL 0x000008b8 bnx2.h 　
4936
 BNX2_MISC_FINAL_CLK_CTL_VAL_MISBNX2_MISC_FINAL_CLK_CTL_VAL_MIS (0x3ffffffL<<6) bnx2.h 　
4937
 BNX2_MISC_UNUSED0BNX2_MISC_UNUSED0 0x000008bc bnx2.h 　
4938
 BNX2_NVM_COMMANDBNX2_NVM_COMMAND 0x00006400 bnx2.h 　
4939
 BNX2_NVM_COMMAND_RSTBNX2_NVM_COMMAND_RST (1L<<0) bnx2.h 　
4940
 BNX2_NVM_COMMAND_DONEBNX2_NVM_COMMAND_DONE (1L<<3) bnx2.h 　
4941
 BNX2_NVM_COMMAND_DOITBNX2_NVM_COMMAND_DOIT (1L<<4) bnx2.h 　
4942
 BNX2_NVM_COMMAND_WRBNX2_NVM_COMMAND_WR (1L<<5) bnx2.h 　
4943
 BNX2_NVM_COMMAND_ERASEBNX2_NVM_COMMAND_ERASE (1L<<6) bnx2.h 　
4944
 BNX2_NVM_COMMAND_FIRSTBNX2_NVM_COMMAND_FIRST (1L<<7) bnx2.h 　
4945
 BNX2_NVM_COMMAND_LASTBNX2_NVM_COMMAND_LAST (1L<<8) bnx2.h 　
4946
 BNX2_NVM_COMMAND_WRENBNX2_NVM_COMMAND_WREN (1L<<16) bnx2.h 　
4947
 BNX2_NVM_COMMAND_WRDIBNX2_NVM_COMMAND_WRDI (1L<<17) bnx2.h 　
4948
 BNX2_NVM_COMMAND_EWSRBNX2_NVM_COMMAND_EWSR (1L<<18) bnx2.h 　
4949
 BNX2_NVM_COMMAND_WRSRBNX2_NVM_COMMAND_WRSR (1L<<19) bnx2.h 　
4950
 BNX2_NVM_STATUSBNX2_NVM_STATUS 0x00006404 bnx2.h 　
4951
 BNX2_NVM_STATUS_PI_FSM_STATEBNX2_NVM_STATUS_PI_FSM_STATE (0xfL<<0) bnx2.h 　
4952
 BNX2_NVM_STATUS_EE_FSM_STATEBNX2_NVM_STATUS_EE_FSM_STATE (0xfL<<4) bnx2.h 　
4953
 BNX2_NVM_STATUS_EQ_FSM_STATEBNX2_NVM_STATUS_EQ_FSM_STATE (0xfL<<8) bnx2.h 　
4954
 BNX2_NVM_WRITEBNX2_NVM_WRITE 0x00006408 bnx2.h 　
4955
 BNX2_NVM_WRITE_NVM_WRITE_VALUEBNX2_NVM_WRITE_NVM_WRITE_VALUE (0xffffffffL<<0) bnx2.h 　
4956
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (0L<<0) bnx2.h 　
4957
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (1L<<0) bnx2.h 　
4958
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (2L<<0) bnx2.h 　
4959
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (4L<<0) bnx2.h 　
4960
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (8L<<0) bnx2.h 　
4961
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (16L<<0) bnx2.h 　
4962
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (32L<<0) bnx2.h 　
4963
 BNX2_NVM_ADDRBNX2_NVM_ADDR 0x0000640c bnx2.h 　
4964
 BNX2_NVM_ADDR_NVM_ADDR_VALUEBNX2_NVM_ADDR_NVM_ADDR_VALUE (0xffffffL<<0) bnx2.h 　
4965
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_BIBNX2_NVM_ADDR_NVM_ADDR_VALUE_BI (0L<<0) bnx2.h 　
4966
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_EEBNX2_NVM_ADDR_NVM_ADDR_VALUE_EE (1L<<0) bnx2.h 　
4967
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_EEBNX2_NVM_ADDR_NVM_ADDR_VALUE_EE (2L<<0) bnx2.h 　
4968
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_SCBNX2_NVM_ADDR_NVM_ADDR_VALUE_SC (4L<<0) bnx2.h 　
4969
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_CSBNX2_NVM_ADDR_NVM_ADDR_VALUE_CS (8L<<0) bnx2.h 　
4970
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_SOBNX2_NVM_ADDR_NVM_ADDR_VALUE_SO (16L<<0) bnx2.h 　
4971
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_SIBNX2_NVM_ADDR_NVM_ADDR_VALUE_SI (32L<<0) bnx2.h 　
4972
 BNX2_NVM_READBNX2_NVM_READ 0x00006410 bnx2.h 　
4973
 BNX2_NVM_READ_NVM_READ_VALUEBNX2_NVM_READ_NVM_READ_VALUE (0xffffffffL<<0) bnx2.h 　
4974
 BNX2_NVM_READ_NVM_READ_VALUE_BIBNX2_NVM_READ_NVM_READ_VALUE_BI (0L<<0) bnx2.h 　
4975
 BNX2_NVM_READ_NVM_READ_VALUE_EEBNX2_NVM_READ_NVM_READ_VALUE_EE (1L<<0) bnx2.h 　
4976
 BNX2_NVM_READ_NVM_READ_VALUE_EEBNX2_NVM_READ_NVM_READ_VALUE_EE (2L<<0) bnx2.h 　
4977
 BNX2_NVM_READ_NVM_READ_VALUE_SCBNX2_NVM_READ_NVM_READ_VALUE_SC (4L<<0) bnx2.h 　
4978
 BNX2_NVM_READ_NVM_READ_VALUE_CSBNX2_NVM_READ_NVM_READ_VALUE_CS (8L<<0) bnx2.h 　
4979
 BNX2_NVM_READ_NVM_READ_VALUE_SOBNX2_NVM_READ_NVM_READ_VALUE_SO (16L<<0) bnx2.h 　
4980
 BNX2_NVM_READ_NVM_READ_VALUE_SIBNX2_NVM_READ_NVM_READ_VALUE_SI (32L<<0) bnx2.h 　
4981
 BNX2_NVM_CFG1BNX2_NVM_CFG1 0x00006414 bnx2.h 　
4982
 BNX2_NVM_CFG1_FLASH_MODEBNX2_NVM_CFG1_FLASH_MODE (1L<<0) bnx2.h 　
4983
 BNX2_NVM_CFG1_BUFFER_MODEBNX2_NVM_CFG1_BUFFER_MODE (1L<<1) bnx2.h 　
4984
 BNX2_NVM_CFG1_PASS_MODEBNX2_NVM_CFG1_PASS_MODE (1L<<2) bnx2.h 　
4985
 BNX2_NVM_CFG1_BITBANG_MODEBNX2_NVM_CFG1_BITBANG_MODE (1L<<3) bnx2.h 　
4986
 BNX2_NVM_CFG1_STATUS_BITBNX2_NVM_CFG1_STATUS_BIT (0x7L<<4) bnx2.h 　
4987
 BNX2_NVM_CFG1_STATUS_BIT_FLASH_BNX2_NVM_CFG1_STATUS_BIT_FLASH_ (0L<<4) bnx2.h 　
4988
 BNX2_NVM_CFG1_STATUS_BIT_BUFFERBNX2_NVM_CFG1_STATUS_BIT_BUFFER (7L<<4) bnx2.h 　
4989
 BNX2_NVM_CFG1_SPI_CLK_DIVBNX2_NVM_CFG1_SPI_CLK_DIV (0xfL<<7) bnx2.h 　
4990
 BNX2_NVM_CFG1_SEE_CLK_DIVBNX2_NVM_CFG1_SEE_CLK_DIV (0x7ffL<<11) bnx2.h 　
4991
 BNX2_NVM_CFG1_PROTECT_MODEBNX2_NVM_CFG1_PROTECT_MODE (1L<<24) bnx2.h 　
4992
 BNX2_NVM_CFG1_FLASH_SIZEBNX2_NVM_CFG1_FLASH_SIZE (1L<<25) bnx2.h 　
4993
 BNX2_NVM_CFG1_COMPAT_BYPASSSBNX2_NVM_CFG1_COMPAT_BYPASSS (1L<<31) bnx2.h 　
4994
 BNX2_NVM_CFG2BNX2_NVM_CFG2 0x00006418 bnx2.h 　
4995
 BNX2_NVM_CFG2_ERASE_CMDBNX2_NVM_CFG2_ERASE_CMD (0xffL<<0) bnx2.h 　
4996
 BNX2_NVM_CFG2_DUMMYBNX2_NVM_CFG2_DUMMY (0xffL<<8) bnx2.h 　
4997
 BNX2_NVM_CFG2_STATUS_CMDBNX2_NVM_CFG2_STATUS_CMD (0xffL<<16) bnx2.h 　
4998
 BNX2_NVM_CFG3BNX2_NVM_CFG3 0x0000641c bnx2.h 　
4999
 BNX2_NVM_CFG3_BUFFER_RD_CMDBNX2_NVM_CFG3_BUFFER_RD_CMD (0xffL<<0) bnx2.h 　
5000
 BNX2_NVM_CFG3_WRITE_CMDBNX2_NVM_CFG3_WRITE_CMD (0xffL<<8) bnx2.h 　
5001
 BNX2_NVM_CFG3_BUFFER_WRITE_CMDBNX2_NVM_CFG3_BUFFER_WRITE_CMD (0xffL<<16) bnx2.h 　
5002
 BNX2_NVM_CFG3_READ_CMDBNX2_NVM_CFG3_READ_CMD (0xffL<<24) bnx2.h 　
5003
 BNX2_NVM_SW_ARBBNX2_NVM_SW_ARB 0x00006420 bnx2.h 　
5004
 BNX2_NVM_SW_ARB_ARB_REQ_SET0BNX2_NVM_SW_ARB_ARB_REQ_SET0 (1L<<0) bnx2.h 　
5005
 BNX2_NVM_SW_ARB_ARB_REQ_SET1BNX2_NVM_SW_ARB_ARB_REQ_SET1 (1L<<1) bnx2.h 　
5006
 BNX2_NVM_SW_ARB_ARB_REQ_SET2BNX2_NVM_SW_ARB_ARB_REQ_SET2 (1L<<2) bnx2.h 　
5007
 BNX2_NVM_SW_ARB_ARB_REQ_SET3BNX2_NVM_SW_ARB_ARB_REQ_SET3 (1L<<3) bnx2.h 　
5008
 BNX2_NVM_SW_ARB_ARB_REQ_CLR0BNX2_NVM_SW_ARB_ARB_REQ_CLR0 (1L<<4) bnx2.h 　
5009
 BNX2_NVM_SW_ARB_ARB_REQ_CLR1BNX2_NVM_SW_ARB_ARB_REQ_CLR1 (1L<<5) bnx2.h 　
5010
 BNX2_NVM_SW_ARB_ARB_REQ_CLR2BNX2_NVM_SW_ARB_ARB_REQ_CLR2 (1L<<6) bnx2.h 　
5011
 BNX2_NVM_SW_ARB_ARB_REQ_CLR3BNX2_NVM_SW_ARB_ARB_REQ_CLR3 (1L<<7) bnx2.h 　
5012
 BNX2_NVM_SW_ARB_ARB_ARB0BNX2_NVM_SW_ARB_ARB_ARB0 (1L<<8) bnx2.h 　
5013
 BNX2_NVM_SW_ARB_ARB_ARB1BNX2_NVM_SW_ARB_ARB_ARB1 (1L<<9) bnx2.h 　
5014
 BNX2_NVM_SW_ARB_ARB_ARB2BNX2_NVM_SW_ARB_ARB_ARB2 (1L<<10) bnx2.h 　
5015
 BNX2_NVM_SW_ARB_ARB_ARB3BNX2_NVM_SW_ARB_ARB_ARB3 (1L<<11) bnx2.h 　
5016
 BNX2_NVM_SW_ARB_REQ0BNX2_NVM_SW_ARB_REQ0 (1L<<12) bnx2.h 　
5017
 BNX2_NVM_SW_ARB_REQ1BNX2_NVM_SW_ARB_REQ1 (1L<<13) bnx2.h 　
5018
 BNX2_NVM_SW_ARB_REQ2BNX2_NVM_SW_ARB_REQ2 (1L<<14) bnx2.h 　
5019
 BNX2_NVM_SW_ARB_REQ3BNX2_NVM_SW_ARB_REQ3 (1L<<15) bnx2.h 　
5020
 BNX2_NVM_ACCESS_ENABLEBNX2_NVM_ACCESS_ENABLE 0x00006424 bnx2.h 　
5021
 BNX2_NVM_ACCESS_ENABLE_ENBNX2_NVM_ACCESS_ENABLE_EN (1L<<0) bnx2.h 　
5022
 BNX2_NVM_ACCESS_ENABLE_WR_ENBNX2_NVM_ACCESS_ENABLE_WR_EN (1L<<1) bnx2.h 　
5023
 BNX2_NVM_WRITE1BNX2_NVM_WRITE1 0x00006428 bnx2.h 　
5024
 BNX2_NVM_WRITE1_WREN_CMDBNX2_NVM_WRITE1_WREN_CMD (0xffL<<0) bnx2.h 　
5025
 BNX2_NVM_WRITE1_WRDI_CMDBNX2_NVM_WRITE1_WRDI_CMD (0xffL<<8) bnx2.h 　
5026
 BNX2_NVM_WRITE1_SR_DATABNX2_NVM_WRITE1_SR_DATA (0xffL<<16) bnx2.h 　
5027
 BNX2_DMA_COMMANDBNX2_DMA_COMMAND 0x00000c00 bnx2.h 　
5028
 BNX2_DMA_COMMAND_ENABLEBNX2_DMA_COMMAND_ENABLE (1L<<0) bnx2.h 　
5029
 BNX2_DMA_STATUSBNX2_DMA_STATUS 0x00000c04 bnx2.h 　
5030
 BNX2_DMA_STATUS_PAR_ERROR_STATEBNX2_DMA_STATUS_PAR_ERROR_STATE (1L<<0) bnx2.h 　
5031
 BNX2_DMA_STATUS_READ_TRANSFERS_BNX2_DMA_STATUS_READ_TRANSFERS_ (1L<<16) bnx2.h 　
5032
 BNX2_DMA_STATUS_READ_DELAY_PCI_BNX2_DMA_STATUS_READ_DELAY_PCI_ (1L<<17) bnx2.h 　
5033
 BNX2_DMA_STATUS_BIG_READ_TRANSFBNX2_DMA_STATUS_BIG_READ_TRANSF (1L<<18) bnx2.h 　
5034
 BNX2_DMA_STATUS_BIG_READ_DELAY_BNX2_DMA_STATUS_BIG_READ_DELAY_ (1L<<19) bnx2.h 　
5035
 BNX2_DMA_STATUS_BIG_READ_RETRY_BNX2_DMA_STATUS_BIG_READ_RETRY_ (1L<<20) bnx2.h 　
5036
 BNX2_DMA_STATUS_WRITE_TRANSFERSBNX2_DMA_STATUS_WRITE_TRANSFERS (1L<<21) bnx2.h 　
5037
 BNX2_DMA_STATUS_WRITE_DELAY_PCIBNX2_DMA_STATUS_WRITE_DELAY_PCI (1L<<22) bnx2.h 　
5038
 BNX2_DMA_STATUS_BIG_WRITE_TRANSBNX2_DMA_STATUS_BIG_WRITE_TRANS (1L<<23) bnx2.h 　
5039
 BNX2_DMA_STATUS_BIG_WRITE_DELAYBNX2_DMA_STATUS_BIG_WRITE_DELAY (1L<<24) bnx2.h 　
5040
 BNX2_DMA_STATUS_BIG_WRITE_RETRYBNX2_DMA_STATUS_BIG_WRITE_RETRY (1L<<25) bnx2.h 　
5041
 BNX2_DMA_CONFIGBNX2_DMA_CONFIG 0x00000c08 bnx2.h 　
5042
 BNX2_DMA_CONFIG_DATA_BYTE_SWAPBNX2_DMA_CONFIG_DATA_BYTE_SWAP (1L<<0) bnx2.h 　
5043
 BNX2_DMA_CONFIG_DATA_WORD_SWAPBNX2_DMA_CONFIG_DATA_WORD_SWAP (1L<<1) bnx2.h 　
5044
 BNX2_DMA_CONFIG_CNTL_BYTE_SWAPBNX2_DMA_CONFIG_CNTL_BYTE_SWAP (1L<<4) bnx2.h 　
5045
 BNX2_DMA_CONFIG_CNTL_WORD_SWAPBNX2_DMA_CONFIG_CNTL_WORD_SWAP (1L<<5) bnx2.h 　
5046
 BNX2_DMA_CONFIG_ONE_DMABNX2_DMA_CONFIG_ONE_DMA (1L<<6) bnx2.h 　
5047
 BNX2_DMA_CONFIG_CNTL_TWO_DMABNX2_DMA_CONFIG_CNTL_TWO_DMA (1L<<7) bnx2.h 　
5048
 BNX2_DMA_CONFIG_CNTL_FPGA_MODEBNX2_DMA_CONFIG_CNTL_FPGA_MODE (1L<<8) bnx2.h 　
5049
 BNX2_DMA_CONFIG_CNTL_PING_PONG_BNX2_DMA_CONFIG_CNTL_PING_PONG_ (1L<<10) bnx2.h 　
5050
 BNX2_DMA_CONFIG_CNTL_PCI_COMP_DBNX2_DMA_CONFIG_CNTL_PCI_COMP_D (1L<<11) bnx2.h 　
5051
 BNX2_DMA_CONFIG_NO_RCHANS_IN_USBNX2_DMA_CONFIG_NO_RCHANS_IN_US (0xfL<<12) bnx2.h 　
5052
 BNX2_DMA_CONFIG_NO_WCHANS_IN_USBNX2_DMA_CONFIG_NO_WCHANS_IN_US (0xfL<<16) bnx2.h 　
5053
 BNX2_DMA_CONFIG_PCI_CLK_CMP_BITBNX2_DMA_CONFIG_PCI_CLK_CMP_BIT (0x7L<<20) bnx2.h 　
5054
 BNX2_DMA_CONFIG_PCI_FAST_CLK_CMBNX2_DMA_CONFIG_PCI_FAST_CLK_CM (1L<<23) bnx2.h 　
5055
 BNX2_DMA_CONFIG_BIG_SIZEBNX2_DMA_CONFIG_BIG_SIZE (0xfL<<24) bnx2.h 　
5056
 BNX2_DMA_CONFIG_BIG_SIZE_NONEBNX2_DMA_CONFIG_BIG_SIZE_NONE (0x0L<<24) bnx2.h 　
5057
 BNX2_DMA_CONFIG_BIG_SIZE_64BNX2_DMA_CONFIG_BIG_SIZE_64 (0x1L<<24) bnx2.h 　
5058
 BNX2_DMA_CONFIG_BIG_SIZE_128BNX2_DMA_CONFIG_BIG_SIZE_128 (0x2L<<24) bnx2.h 　
5059
 BNX2_DMA_CONFIG_BIG_SIZE_256BNX2_DMA_CONFIG_BIG_SIZE_256 (0x4L<<24) bnx2.h 　
5060
 BNX2_DMA_CONFIG_BIG_SIZE_512BNX2_DMA_CONFIG_BIG_SIZE_512 (0x8L<<24) bnx2.h 　
5061
 BNX2_DMA_BLACKOUTBNX2_DMA_BLACKOUT 0x00000c0c bnx2.h 　
5062
 BNX2_DMA_BLACKOUT_RD_RETRY_BLACBNX2_DMA_BLACKOUT_RD_RETRY_BLAC (0xffL<<0) bnx2.h 　
5063
 BNX2_DMA_BLACKOUT_2ND_RD_RETRY_BNX2_DMA_BLACKOUT_2ND_RD_RETRY_ (0xffL<<8) bnx2.h 　
5064
 BNX2_DMA_BLACKOUT_WR_RETRY_BLACBNX2_DMA_BLACKOUT_WR_RETRY_BLAC (0xffL<<16) bnx2.h 　
5065
 BNX2_DMA_RCHAN_STATBNX2_DMA_RCHAN_STAT 0x00000c30 bnx2.h 　
5066
 BNX2_DMA_RCHAN_STAT_COMP_CODE_0BNX2_DMA_RCHAN_STAT_COMP_CODE_0 (0x7L<<0) bnx2.h 　
5067
 BNX2_DMA_RCHAN_STAT_PAR_ERR_0BNX2_DMA_RCHAN_STAT_PAR_ERR_0 (1L<<3) bnx2.h 　
5068
 BNX2_DMA_RCHAN_STAT_COMP_CODE_1BNX2_DMA_RCHAN_STAT_COMP_CODE_1 (0x7L<<4) bnx2.h 　
5069
 BNX2_DMA_RCHAN_STAT_PAR_ERR_1BNX2_DMA_RCHAN_STAT_PAR_ERR_1 (1L<<7) bnx2.h 　
5070
 BNX2_DMA_RCHAN_STAT_COMP_CODE_2BNX2_DMA_RCHAN_STAT_COMP_CODE_2 (0x7L<<8) bnx2.h 　
5071
 BNX2_DMA_RCHAN_STAT_PAR_ERR_2BNX2_DMA_RCHAN_STAT_PAR_ERR_2 (1L<<11) bnx2.h 　
5072
 BNX2_DMA_RCHAN_STAT_COMP_CODE_3BNX2_DMA_RCHAN_STAT_COMP_CODE_3 (0x7L<<12) bnx2.h 　
5073
 BNX2_DMA_RCHAN_STAT_PAR_ERR_3BNX2_DMA_RCHAN_STAT_PAR_ERR_3 (1L<<15) bnx2.h 　
5074
 BNX2_DMA_RCHAN_STAT_COMP_CODE_4BNX2_DMA_RCHAN_STAT_COMP_CODE_4 (0x7L<<16) bnx2.h 　
5075
 BNX2_DMA_RCHAN_STAT_PAR_ERR_4BNX2_DMA_RCHAN_STAT_PAR_ERR_4 (1L<<19) bnx2.h 　
5076
 BNX2_DMA_RCHAN_STAT_COMP_CODE_5BNX2_DMA_RCHAN_STAT_COMP_CODE_5 (0x7L<<20) bnx2.h 　
5077
 BNX2_DMA_RCHAN_STAT_PAR_ERR_5BNX2_DMA_RCHAN_STAT_PAR_ERR_5 (1L<<23) bnx2.h 　
5078
 BNX2_DMA_RCHAN_STAT_COMP_CODE_6BNX2_DMA_RCHAN_STAT_COMP_CODE_6 (0x7L<<24) bnx2.h 　
5079
 BNX2_DMA_RCHAN_STAT_PAR_ERR_6BNX2_DMA_RCHAN_STAT_PAR_ERR_6 (1L<<27) bnx2.h 　
5080
 BNX2_DMA_RCHAN_STAT_COMP_CODE_7BNX2_DMA_RCHAN_STAT_COMP_CODE_7 (0x7L<<28) bnx2.h 　
5081
 BNX2_DMA_RCHAN_STAT_PAR_ERR_7BNX2_DMA_RCHAN_STAT_PAR_ERR_7 (1L<<31) bnx2.h 　
5082
 BNX2_DMA_WCHAN_STATBNX2_DMA_WCHAN_STAT 0x00000c34 bnx2.h 　
5083
 BNX2_DMA_WCHAN_STAT_COMP_CODE_0BNX2_DMA_WCHAN_STAT_COMP_CODE_0 (0x7L<<0) bnx2.h 　
5084
 BNX2_DMA_WCHAN_STAT_PAR_ERR_0BNX2_DMA_WCHAN_STAT_PAR_ERR_0 (1L<<3) bnx2.h 　
5085
 BNX2_DMA_WCHAN_STAT_COMP_CODE_1BNX2_DMA_WCHAN_STAT_COMP_CODE_1 (0x7L<<4) bnx2.h 　
5086
 BNX2_DMA_WCHAN_STAT_PAR_ERR_1BNX2_DMA_WCHAN_STAT_PAR_ERR_1 (1L<<7) bnx2.h 　
5087
 BNX2_DMA_WCHAN_STAT_COMP_CODE_2BNX2_DMA_WCHAN_STAT_COMP_CODE_2 (0x7L<<8) bnx2.h 　
5088
 BNX2_DMA_WCHAN_STAT_PAR_ERR_2BNX2_DMA_WCHAN_STAT_PAR_ERR_2 (1L<<11) bnx2.h 　
5089
 BNX2_DMA_WCHAN_STAT_COMP_CODE_3BNX2_DMA_WCHAN_STAT_COMP_CODE_3 (0x7L<<12) bnx2.h 　
5090
 BNX2_DMA_WCHAN_STAT_PAR_ERR_3BNX2_DMA_WCHAN_STAT_PAR_ERR_3 (1L<<15) bnx2.h 　
5091
 BNX2_DMA_WCHAN_STAT_COMP_CODE_4BNX2_DMA_WCHAN_STAT_COMP_CODE_4 (0x7L<<16) bnx2.h 　
5092
 BNX2_DMA_WCHAN_STAT_PAR_ERR_4BNX2_DMA_WCHAN_STAT_PAR_ERR_4 (1L<<19) bnx2.h 　
5093
 BNX2_DMA_WCHAN_STAT_COMP_CODE_5BNX2_DMA_WCHAN_STAT_COMP_CODE_5 (0x7L<<20) bnx2.h 　
5094
 BNX2_DMA_WCHAN_STAT_PAR_ERR_5BNX2_DMA_WCHAN_STAT_PAR_ERR_5 (1L<<23) bnx2.h 　
5095
 BNX2_DMA_WCHAN_STAT_COMP_CODE_6BNX2_DMA_WCHAN_STAT_COMP_CODE_6 (0x7L<<24) bnx2.h 　
5096
 BNX2_DMA_WCHAN_STAT_PAR_ERR_6BNX2_DMA_WCHAN_STAT_PAR_ERR_6 (1L<<27) bnx2.h 　
5097
 BNX2_DMA_WCHAN_STAT_COMP_CODE_7BNX2_DMA_WCHAN_STAT_COMP_CODE_7 (0x7L<<28) bnx2.h 　
5098
 BNX2_DMA_WCHAN_STAT_PAR_ERR_7BNX2_DMA_WCHAN_STAT_PAR_ERR_7 (1L<<31) bnx2.h 　
5099
 BNX2_DMA_RCHAN_ASSIGNMENTBNX2_DMA_RCHAN_ASSIGNMENT 0x00000c38 bnx2.h 　
5100
 BNX2_DMA_RCHAN_ASSIGNMENT_0BNX2_DMA_RCHAN_ASSIGNMENT_0 (0xfL<<0) bnx2.h 　
5101
 BNX2_DMA_RCHAN_ASSIGNMENT_1BNX2_DMA_RCHAN_ASSIGNMENT_1 (0xfL<<4) bnx2.h 　
5102
 BNX2_DMA_RCHAN_ASSIGNMENT_2BNX2_DMA_RCHAN_ASSIGNMENT_2 (0xfL<<8) bnx2.h 　
5103
 BNX2_DMA_RCHAN_ASSIGNMENT_3BNX2_DMA_RCHAN_ASSIGNMENT_3 (0xfL<<12) bnx2.h 　
5104
 BNX2_DMA_RCHAN_ASSIGNMENT_4BNX2_DMA_RCHAN_ASSIGNMENT_4 (0xfL<<16) bnx2.h 　
5105
 BNX2_DMA_RCHAN_ASSIGNMENT_5BNX2_DMA_RCHAN_ASSIGNMENT_5 (0xfL<<20) bnx2.h 　
5106
 BNX2_DMA_RCHAN_ASSIGNMENT_6BNX2_DMA_RCHAN_ASSIGNMENT_6 (0xfL<<24) bnx2.h 　
5107
 BNX2_DMA_RCHAN_ASSIGNMENT_7BNX2_DMA_RCHAN_ASSIGNMENT_7 (0xfL<<28) bnx2.h 　
5108
 BNX2_DMA_WCHAN_ASSIGNMENTBNX2_DMA_WCHAN_ASSIGNMENT 0x00000c3c bnx2.h 　
5109
 BNX2_DMA_WCHAN_ASSIGNMENT_0BNX2_DMA_WCHAN_ASSIGNMENT_0 (0xfL<<0) bnx2.h 　
5110
 BNX2_DMA_WCHAN_ASSIGNMENT_1BNX2_DMA_WCHAN_ASSIGNMENT_1 (0xfL<<4) bnx2.h 　
5111
 BNX2_DMA_WCHAN_ASSIGNMENT_2BNX2_DMA_WCHAN_ASSIGNMENT_2 (0xfL<<8) bnx2.h 　
5112
 BNX2_DMA_WCHAN_ASSIGNMENT_3BNX2_DMA_WCHAN_ASSIGNMENT_3 (0xfL<<12) bnx2.h 　
5113
 BNX2_DMA_WCHAN_ASSIGNMENT_4BNX2_DMA_WCHAN_ASSIGNMENT_4 (0xfL<<16) bnx2.h 　
5114
 BNX2_DMA_WCHAN_ASSIGNMENT_5BNX2_DMA_WCHAN_ASSIGNMENT_5 (0xfL<<20) bnx2.h 　
5115
 BNX2_DMA_WCHAN_ASSIGNMENT_6BNX2_DMA_WCHAN_ASSIGNMENT_6 (0xfL<<24) bnx2.h 　
5116
 BNX2_DMA_WCHAN_ASSIGNMENT_7BNX2_DMA_WCHAN_ASSIGNMENT_7 (0xfL<<28) bnx2.h 　
5117
 BNX2_DMA_RCHAN_STAT_00BNX2_DMA_RCHAN_STAT_00 0x00000c40 bnx2.h 　
5118
 BNX2_DMA_RCHAN_STAT_00_RCHAN_STBNX2_DMA_RCHAN_STAT_00_RCHAN_ST (0xffffffffL<<0) bnx2.h 　
5119
 BNX2_DMA_RCHAN_STAT_01BNX2_DMA_RCHAN_STAT_01 0x00000c44 bnx2.h 　
5120
 BNX2_DMA_RCHAN_STAT_01_RCHAN_STBNX2_DMA_RCHAN_STAT_01_RCHAN_ST (0xffffffffL<<0) bnx2.h 　
5121
 BNX2_DMA_RCHAN_STAT_02BNX2_DMA_RCHAN_STAT_02 0x00000c48 bnx2.h 　
5122
 BNX2_DMA_RCHAN_STAT_02_LENGTHBNX2_DMA_RCHAN_STAT_02_LENGTH (0xffffL<<0) bnx2.h 　
5123
 BNX2_DMA_RCHAN_STAT_02_WORD_SWABNX2_DMA_RCHAN_STAT_02_WORD_SWA (1L<<16) bnx2.h 　
5124
 BNX2_DMA_RCHAN_STAT_02_BYTE_SWABNX2_DMA_RCHAN_STAT_02_BYTE_SWA (1L<<17) bnx2.h 　
5125
 BNX2_DMA_RCHAN_STAT_02_PRIORITYBNX2_DMA_RCHAN_STAT_02_PRIORITY (1L<<18) bnx2.h 　
5126
 BNX2_DMA_RCHAN_STAT_10BNX2_DMA_RCHAN_STAT_10 0x00000c4c bnx2.h 　
5127
 BNX2_DMA_RCHAN_STAT_11BNX2_DMA_RCHAN_STAT_11 0x00000c50 bnx2.h 　
5128
 BNX2_DMA_RCHAN_STAT_12BNX2_DMA_RCHAN_STAT_12 0x00000c54 bnx2.h 　
5129
 BNX2_DMA_RCHAN_STAT_20BNX2_DMA_RCHAN_STAT_20 0x00000c58 bnx2.h 　
5130
 BNX2_DMA_RCHAN_STAT_21BNX2_DMA_RCHAN_STAT_21 0x00000c5c bnx2.h 　
5131
 BNX2_DMA_RCHAN_STAT_22BNX2_DMA_RCHAN_STAT_22 0x00000c60 bnx2.h 　
5132
 BNX2_DMA_RCHAN_STAT_30BNX2_DMA_RCHAN_STAT_30 0x00000c64 bnx2.h 　
5133
 BNX2_DMA_RCHAN_STAT_31BNX2_DMA_RCHAN_STAT_31 0x00000c68 bnx2.h 　
5134
 BNX2_DMA_RCHAN_STAT_32BNX2_DMA_RCHAN_STAT_32 0x00000c6c bnx2.h 　
5135
 BNX2_DMA_RCHAN_STAT_40BNX2_DMA_RCHAN_STAT_40 0x00000c70 bnx2.h 　
5136
 BNX2_DMA_RCHAN_STAT_41BNX2_DMA_RCHAN_STAT_41 0x00000c74 bnx2.h 　
5137
 BNX2_DMA_RCHAN_STAT_42BNX2_DMA_RCHAN_STAT_42 0x00000c78 bnx2.h 　
5138
 BNX2_DMA_RCHAN_STAT_50BNX2_DMA_RCHAN_STAT_50 0x00000c7c bnx2.h 　
5139
 BNX2_DMA_RCHAN_STAT_51BNX2_DMA_RCHAN_STAT_51 0x00000c80 bnx2.h 　
5140
 BNX2_DMA_RCHAN_STAT_52BNX2_DMA_RCHAN_STAT_52 0x00000c84 bnx2.h 　
5141
 BNX2_DMA_RCHAN_STAT_60BNX2_DMA_RCHAN_STAT_60 0x00000c88 bnx2.h 　
5142
 BNX2_DMA_RCHAN_STAT_61BNX2_DMA_RCHAN_STAT_61 0x00000c8c bnx2.h 　
5143
 BNX2_DMA_RCHAN_STAT_62BNX2_DMA_RCHAN_STAT_62 0x00000c90 bnx2.h 　
5144
 BNX2_DMA_RCHAN_STAT_70BNX2_DMA_RCHAN_STAT_70 0x00000c94 bnx2.h 　
5145
 BNX2_DMA_RCHAN_STAT_71BNX2_DMA_RCHAN_STAT_71 0x00000c98 bnx2.h 　
5146
 BNX2_DMA_RCHAN_STAT_72BNX2_DMA_RCHAN_STAT_72 0x00000c9c bnx2.h 　
5147
 BNX2_DMA_WCHAN_STAT_00BNX2_DMA_WCHAN_STAT_00 0x00000ca0 bnx2.h 　
5148
 BNX2_DMA_WCHAN_STAT_00_WCHAN_STBNX2_DMA_WCHAN_STAT_00_WCHAN_ST (0xffffffffL<<0) bnx2.h 　
5149
 BNX2_DMA_WCHAN_STAT_01BNX2_DMA_WCHAN_STAT_01 0x00000ca4 bnx2.h 　
5150
 BNX2_DMA_WCHAN_STAT_01_WCHAN_STBNX2_DMA_WCHAN_STAT_01_WCHAN_ST (0xffffffffL<<0) bnx2.h 　
5151
 BNX2_DMA_WCHAN_STAT_02BNX2_DMA_WCHAN_STAT_02 0x00000ca8 bnx2.h 　
5152
 BNX2_DMA_WCHAN_STAT_02_LENGTHBNX2_DMA_WCHAN_STAT_02_LENGTH (0xffffL<<0) bnx2.h 　
5153
 BNX2_DMA_WCHAN_STAT_02_WORD_SWABNX2_DMA_WCHAN_STAT_02_WORD_SWA (1L<<16) bnx2.h 　
5154
 BNX2_DMA_WCHAN_STAT_02_BYTE_SWABNX2_DMA_WCHAN_STAT_02_BYTE_SWA (1L<<17) bnx2.h 　
5155
 BNX2_DMA_WCHAN_STAT_02_PRIORITYBNX2_DMA_WCHAN_STAT_02_PRIORITY (1L<<18) bnx2.h 　
5156
 BNX2_DMA_WCHAN_STAT_10BNX2_DMA_WCHAN_STAT_10 0x00000cac bnx2.h 　
5157
 BNX2_DMA_WCHAN_STAT_11BNX2_DMA_WCHAN_STAT_11 0x00000cb0 bnx2.h 　
5158
 BNX2_DMA_WCHAN_STAT_12BNX2_DMA_WCHAN_STAT_12 0x00000cb4 bnx2.h 　
5159
 BNX2_DMA_WCHAN_STAT_20BNX2_DMA_WCHAN_STAT_20 0x00000cb8 bnx2.h 　
5160
 BNX2_DMA_WCHAN_STAT_21BNX2_DMA_WCHAN_STAT_21 0x00000cbc bnx2.h 　
5161
 BNX2_DMA_WCHAN_STAT_22BNX2_DMA_WCHAN_STAT_22 0x00000cc0 bnx2.h 　
5162
 BNX2_DMA_WCHAN_STAT_30BNX2_DMA_WCHAN_STAT_30 0x00000cc4 bnx2.h 　
5163
 BNX2_DMA_WCHAN_STAT_31BNX2_DMA_WCHAN_STAT_31 0x00000cc8 bnx2.h 　
5164
 BNX2_DMA_WCHAN_STAT_32BNX2_DMA_WCHAN_STAT_32 0x00000ccc bnx2.h 　
5165
 BNX2_DMA_WCHAN_STAT_40BNX2_DMA_WCHAN_STAT_40 0x00000cd0 bnx2.h 　
5166
 BNX2_DMA_WCHAN_STAT_41BNX2_DMA_WCHAN_STAT_41 0x00000cd4 bnx2.h 　
5167
 BNX2_DMA_WCHAN_STAT_42BNX2_DMA_WCHAN_STAT_42 0x00000cd8 bnx2.h 　
5168
 BNX2_DMA_WCHAN_STAT_50BNX2_DMA_WCHAN_STAT_50 0x00000cdc bnx2.h 　
5169
 BNX2_DMA_WCHAN_STAT_51BNX2_DMA_WCHAN_STAT_51 0x00000ce0 bnx2.h 　
5170
 BNX2_DMA_WCHAN_STAT_52BNX2_DMA_WCHAN_STAT_52 0x00000ce4 bnx2.h 　
5171
 BNX2_DMA_WCHAN_STAT_60BNX2_DMA_WCHAN_STAT_60 0x00000ce8 bnx2.h 　
5172
 BNX2_DMA_WCHAN_STAT_61BNX2_DMA_WCHAN_STAT_61 0x00000cec bnx2.h 　
5173
 BNX2_DMA_WCHAN_STAT_62BNX2_DMA_WCHAN_STAT_62 0x00000cf0 bnx2.h 　
5174
 BNX2_DMA_WCHAN_STAT_70BNX2_DMA_WCHAN_STAT_70 0x00000cf4 bnx2.h 　
5175
 BNX2_DMA_WCHAN_STAT_71BNX2_DMA_WCHAN_STAT_71 0x00000cf8 bnx2.h 　
5176
 BNX2_DMA_WCHAN_STAT_72BNX2_DMA_WCHAN_STAT_72 0x00000cfc bnx2.h 　
5177
 BNX2_DMA_ARB_STAT_00BNX2_DMA_ARB_STAT_00 0x00000d00 bnx2.h 　
5178
 BNX2_DMA_ARB_STAT_00_MASTERBNX2_DMA_ARB_STAT_00_MASTER (0xffffL<<0) bnx2.h 　
5179
 BNX2_DMA_ARB_STAT_00_MASTER_ENCBNX2_DMA_ARB_STAT_00_MASTER_ENC (0xffL<<16) bnx2.h 　
5180
 BNX2_DMA_ARB_STAT_00_CUR_BINMSTBNX2_DMA_ARB_STAT_00_CUR_BINMST (0xffL<<24) bnx2.h 　
5181
 BNX2_DMA_ARB_STAT_01BNX2_DMA_ARB_STAT_01 0x00000d04 bnx2.h 　
5182
 BNX2_DMA_ARB_STAT_01_LPR_RPTRBNX2_DMA_ARB_STAT_01_LPR_RPTR (0xfL<<0) bnx2.h 　
5183
 BNX2_DMA_ARB_STAT_01_LPR_WPTRBNX2_DMA_ARB_STAT_01_LPR_WPTR (0xfL<<4) bnx2.h 　
5184
 BNX2_DMA_ARB_STAT_01_LPB_RPTRBNX2_DMA_ARB_STAT_01_LPB_RPTR (0xfL<<8) bnx2.h 　
5185
 BNX2_DMA_ARB_STAT_01_LPB_WPTRBNX2_DMA_ARB_STAT_01_LPB_WPTR (0xfL<<12) bnx2.h 　
5186
 BNX2_DMA_ARB_STAT_01_HPR_RPTRBNX2_DMA_ARB_STAT_01_HPR_RPTR (0xfL<<16) bnx2.h 　
5187
 BNX2_DMA_ARB_STAT_01_HPR_WPTRBNX2_DMA_ARB_STAT_01_HPR_WPTR (0xfL<<20) bnx2.h 　
5188
 BNX2_DMA_ARB_STAT_01_HPB_RPTRBNX2_DMA_ARB_STAT_01_HPB_RPTR (0xfL<<24) bnx2.h 　
5189
 BNX2_DMA_ARB_STAT_01_HPB_WPTRBNX2_DMA_ARB_STAT_01_HPB_WPTR (0xfL<<28) bnx2.h 　
5190
 BNX2_DMA_FUSE_CTRL0_CMDBNX2_DMA_FUSE_CTRL0_CMD 0x00000f00 bnx2.h 　
5191
 BNX2_DMA_FUSE_CTRL0_CMD_PWRUP_DBNX2_DMA_FUSE_CTRL0_CMD_PWRUP_D (1L<<0) bnx2.h 　
5192
 BNX2_DMA_FUSE_CTRL0_CMD_SHIFT_DBNX2_DMA_FUSE_CTRL0_CMD_SHIFT_D (1L<<1) bnx2.h 　
5193
 BNX2_DMA_FUSE_CTRL0_CMD_SHIFTBNX2_DMA_FUSE_CTRL0_CMD_SHIFT (1L<<2) bnx2.h 　
5194
 BNX2_DMA_FUSE_CTRL0_CMD_LOADBNX2_DMA_FUSE_CTRL0_CMD_LOAD (1L<<3) bnx2.h 　
5195
 BNX2_DMA_FUSE_CTRL0_CMD_SELBNX2_DMA_FUSE_CTRL0_CMD_SEL (0xfL<<8) bnx2.h 　
5196
 BNX2_DMA_FUSE_CTRL0_DATABNX2_DMA_FUSE_CTRL0_DATA 0x00000f04 bnx2.h 　
5197
 BNX2_DMA_FUSE_CTRL1_CMDBNX2_DMA_FUSE_CTRL1_CMD 0x00000f08 bnx2.h 　
5198
 BNX2_DMA_FUSE_CTRL1_CMD_PWRUP_DBNX2_DMA_FUSE_CTRL1_CMD_PWRUP_D (1L<<0) bnx2.h 　
5199
 BNX2_DMA_FUSE_CTRL1_CMD_SHIFT_DBNX2_DMA_FUSE_CTRL1_CMD_SHIFT_D (1L<<1) bnx2.h 　
5200
 BNX2_DMA_FUSE_CTRL1_CMD_SHIFTBNX2_DMA_FUSE_CTRL1_CMD_SHIFT (1L<<2) bnx2.h 　
5201
 BNX2_DMA_FUSE_CTRL1_CMD_LOADBNX2_DMA_FUSE_CTRL1_CMD_LOAD (1L<<3) bnx2.h 　
5202
 BNX2_DMA_FUSE_CTRL1_CMD_SELBNX2_DMA_FUSE_CTRL1_CMD_SEL (0xfL<<8) bnx2.h 　
5203
 BNX2_DMA_FUSE_CTRL1_DATABNX2_DMA_FUSE_CTRL1_DATA 0x00000f0c bnx2.h 　
5204
 BNX2_DMA_FUSE_CTRL2_CMDBNX2_DMA_FUSE_CTRL2_CMD 0x00000f10 bnx2.h 　
5205
 BNX2_DMA_FUSE_CTRL2_CMD_PWRUP_DBNX2_DMA_FUSE_CTRL2_CMD_PWRUP_D (1L<<0) bnx2.h 　
5206
 BNX2_DMA_FUSE_CTRL2_CMD_SHIFT_DBNX2_DMA_FUSE_CTRL2_CMD_SHIFT_D (1L<<1) bnx2.h 　
5207
 BNX2_DMA_FUSE_CTRL2_CMD_SHIFTBNX2_DMA_FUSE_CTRL2_CMD_SHIFT (1L<<2) bnx2.h 　
5208
 BNX2_DMA_FUSE_CTRL2_CMD_LOADBNX2_DMA_FUSE_CTRL2_CMD_LOAD (1L<<3) bnx2.h 　
5209
 BNX2_DMA_FUSE_CTRL2_CMD_SELBNX2_DMA_FUSE_CTRL2_CMD_SEL (0xfL<<8) bnx2.h 　
5210
 BNX2_DMA_FUSE_CTRL2_DATABNX2_DMA_FUSE_CTRL2_DATA 0x00000f14 bnx2.h 　
5211
 BNX2_CTX_COMMANDBNX2_CTX_COMMAND 0x00001000 bnx2.h 　
5212
 BNX2_CTX_COMMAND_ENABLEDBNX2_CTX_COMMAND_ENABLED (1L<<0) bnx2.h 　
5213
 BNX2_CTX_STATUSBNX2_CTX_STATUS 0x00001004 bnx2.h 　
5214
 BNX2_CTX_STATUS_LOCK_WAITBNX2_CTX_STATUS_LOCK_WAIT (1L<<0) bnx2.h 　
5215
 BNX2_CTX_STATUS_READ_STATBNX2_CTX_STATUS_READ_STAT (1L<<16) bnx2.h 　
5216
 BNX2_CTX_STATUS_WRITE_STATBNX2_CTX_STATUS_WRITE_STAT (1L<<17) bnx2.h 　
5217
 BNX2_CTX_STATUS_ACC_STALL_STATBNX2_CTX_STATUS_ACC_STALL_STAT (1L<<18) bnx2.h 　
5218
 BNX2_CTX_STATUS_LOCK_STALL_STATBNX2_CTX_STATUS_LOCK_STALL_STAT (1L<<19) bnx2.h 　
5219
 BNX2_CTX_VIRT_ADDRBNX2_CTX_VIRT_ADDR 0x00001008 bnx2.h 　
5220
 BNX2_CTX_VIRT_ADDR_VIRT_ADDRBNX2_CTX_VIRT_ADDR_VIRT_ADDR (0x7fffL<<6) bnx2.h 　
5221
 BNX2_CTX_PAGE_TBLBNX2_CTX_PAGE_TBL 0x0000100c bnx2.h 　
5222
 BNX2_CTX_PAGE_TBL_PAGE_TBLBNX2_CTX_PAGE_TBL_PAGE_TBL (0x3fffL<<6) bnx2.h 　
5223
 BNX2_CTX_DATA_ADRBNX2_CTX_DATA_ADR 0x00001010 bnx2.h 　
5224
 BNX2_CTX_DATA_ADR_DATA_ADRBNX2_CTX_DATA_ADR_DATA_ADR (0x7ffffL<<2) bnx2.h 　
5225
 BNX2_CTX_DATABNX2_CTX_DATA 0x00001014 bnx2.h 　
5226
 BNX2_CTX_LOCKBNX2_CTX_LOCK 0x00001018 bnx2.h 　
5227
 BNX2_CTX_LOCK_TYPEBNX2_CTX_LOCK_TYPE (0x7L<<0) bnx2.h 　
5228
 BNX2_CTX_LOCK_TYPE_LOCK_TYPE_VOBNX2_CTX_LOCK_TYPE_LOCK_TYPE_VO (0x0L<<0) bnx2.h 　
5229
 BNX2_CTX_LOCK_TYPE_LOCK_TYPE_COBNX2_CTX_LOCK_TYPE_LOCK_TYPE_CO (0x7L<<0) bnx2.h 　
5230
 BNX2_CTX_LOCK_TYPE_LOCK_TYPE_PRBNX2_CTX_LOCK_TYPE_LOCK_TYPE_PR (0x1L<<0) bnx2.h 　
5231
 BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TXBNX2_CTX_LOCK_TYPE_LOCK_TYPE_TX (0x2L<<0) bnx2.h 　
5232
 BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TIBNX2_CTX_LOCK_TYPE_LOCK_TYPE_TI (0x4L<<0) bnx2.h 　
5233
 BNX2_CTX_LOCK_CID_VALUEBNX2_CTX_LOCK_CID_VALUE (0x3fffL<<7) bnx2.h 　
5234
 BNX2_CTX_LOCK_GRANTEDBNX2_CTX_LOCK_GRANTED (1L<<26) bnx2.h 　
5235
 BNX2_CTX_LOCK_MODEBNX2_CTX_LOCK_MODE (0x7L<<27) bnx2.h 　
5236
 BNX2_CTX_LOCK_MODE_UNLOCKBNX2_CTX_LOCK_MODE_UNLOCK (0x0L<<27) bnx2.h 　
5237
 BNX2_CTX_LOCK_MODE_IMMEDIATEBNX2_CTX_LOCK_MODE_IMMEDIATE (0x1L<<27) bnx2.h 　
5238
 BNX2_CTX_LOCK_MODE_SUREBNX2_CTX_LOCK_MODE_SURE (0x2L<<27) bnx2.h 　
5239
 BNX2_CTX_LOCK_STATUSBNX2_CTX_LOCK_STATUS (1L<<30) bnx2.h 　
5240
 BNX2_CTX_LOCK_REQBNX2_CTX_LOCK_REQ (1L<<31) bnx2.h 　
5241
 BNX2_CTX_ACCESS_STATUSBNX2_CTX_ACCESS_STATUS 0x00001040 bnx2.h 　
5242
 BNX2_CTX_ACCESS_STATUS_MASTERENBNX2_CTX_ACCESS_STATUS_MASTEREN (0xfL<<0) bnx2.h 　
5243
 BNX2_CTX_ACCESS_STATUS_ACCESSMEBNX2_CTX_ACCESS_STATUS_ACCESSME (0x3L<<10) bnx2.h 　
5244
 BNX2_CTX_ACCESS_STATUS_PAGETABLBNX2_CTX_ACCESS_STATUS_PAGETABL (0x3L<<12) bnx2.h 　
5245
 BNX2_CTX_ACCESS_STATUS_ACCESSMEBNX2_CTX_ACCESS_STATUS_ACCESSME (0x3L<<14) bnx2.h 　
5246
 BNX2_CTX_ACCESS_STATUS_QUALIFIEBNX2_CTX_ACCESS_STATUS_QUALIFIE (0x7ffL<<17) bnx2.h 　
5247
 BNX2_CTX_DBG_LOCK_STATUSBNX2_CTX_DBG_LOCK_STATUS 0x00001044 bnx2.h 　
5248
 BNX2_CTX_DBG_LOCK_STATUS_SMBNX2_CTX_DBG_LOCK_STATUS_SM (0x3ffL<<0) bnx2.h 　
5249
 BNX2_CTX_DBG_LOCK_STATUS_MATCHBNX2_CTX_DBG_LOCK_STATUS_MATCH (0x3ffL<<22) bnx2.h 　
5250
 BNX2_CTX_CHNL_LOCK_STATUS_0BNX2_CTX_CHNL_LOCK_STATUS_0 0x00001080 bnx2.h 　
5251
 BNX2_CTX_CHNL_LOCK_STATUS_0_CIDBNX2_CTX_CHNL_LOCK_STATUS_0_CID (0x3fffL<<0) bnx2.h 　
5252
 BNX2_CTX_CHNL_LOCK_STATUS_0_TYPBNX2_CTX_CHNL_LOCK_STATUS_0_TYP (0x3L<<14) bnx2.h 　
5253
 BNX2_CTX_CHNL_LOCK_STATUS_0_MODBNX2_CTX_CHNL_LOCK_STATUS_0_MOD (1L<<16) bnx2.h 　
5254
 BNX2_CTX_CHNL_LOCK_STATUS_1BNX2_CTX_CHNL_LOCK_STATUS_1 0x00001084 bnx2.h 　
5255
 BNX2_CTX_CHNL_LOCK_STATUS_2BNX2_CTX_CHNL_LOCK_STATUS_2 0x00001088 bnx2.h 　
5256
 BNX2_CTX_CHNL_LOCK_STATUS_3BNX2_CTX_CHNL_LOCK_STATUS_3 0x0000108c bnx2.h 　
5257
 BNX2_CTX_CHNL_LOCK_STATUS_4BNX2_CTX_CHNL_LOCK_STATUS_4 0x00001090 bnx2.h 　
5258
 BNX2_CTX_CHNL_LOCK_STATUS_5BNX2_CTX_CHNL_LOCK_STATUS_5 0x00001094 bnx2.h 　
5259
 BNX2_CTX_CHNL_LOCK_STATUS_6BNX2_CTX_CHNL_LOCK_STATUS_6 0x00001098 bnx2.h 　
5260
 BNX2_CTX_CHNL_LOCK_STATUS_7BNX2_CTX_CHNL_LOCK_STATUS_7 0x0000109c bnx2.h 　
5261
 BNX2_CTX_CHNL_LOCK_STATUS_8BNX2_CTX_CHNL_LOCK_STATUS_8 0x000010a0 bnx2.h 　
5262
 BNX2_EMAC_MODEBNX2_EMAC_MODE 0x00001400 bnx2.h 　
5263
 BNX2_EMAC_MODE_RESETBNX2_EMAC_MODE_RESET (1L<<0) bnx2.h 　
5264
 BNX2_EMAC_MODE_HALF_DUPLEXBNX2_EMAC_MODE_HALF_DUPLEX (1L<<1) bnx2.h 　
5265
 BNX2_EMAC_MODE_PORTBNX2_EMAC_MODE_PORT (0x3L<<2) bnx2.h 　
5266
 BNX2_EMAC_MODE_PORT_NONEBNX2_EMAC_MODE_PORT_NONE (0L<<2) bnx2.h 　
5267
 BNX2_EMAC_MODE_PORT_MIIBNX2_EMAC_MODE_PORT_MII (1L<<2) bnx2.h 　
5268
 BNX2_EMAC_MODE_PORT_GMIIBNX2_EMAC_MODE_PORT_GMII (2L<<2) bnx2.h 　
5269
 BNX2_EMAC_MODE_PORT_MII_10BNX2_EMAC_MODE_PORT_MII_10 (3L<<2) bnx2.h 　
5270
 BNX2_EMAC_MODE_MAC_LOOPBNX2_EMAC_MODE_MAC_LOOP (1L<<4) bnx2.h 　
5271
 BNX2_EMAC_MODE_25GBNX2_EMAC_MODE_25G (1L<<5) bnx2.h 　
5272
 BNX2_EMAC_MODE_TAGGED_MAC_CTLBNX2_EMAC_MODE_TAGGED_MAC_CTL (1L<<7) bnx2.h 　
5273
 BNX2_EMAC_MODE_TX_BURSTBNX2_EMAC_MODE_TX_BURST (1L<<8) bnx2.h 　
5274
 BNX2_EMAC_MODE_MAX_DEFER_DROP_EBNX2_EMAC_MODE_MAX_DEFER_DROP_E (1L<<9) bnx2.h 　
5275
 BNX2_EMAC_MODE_EXT_LINK_POLBNX2_EMAC_MODE_EXT_LINK_POL (1L<<10) bnx2.h 　
5276
 BNX2_EMAC_MODE_FORCE_LINKBNX2_EMAC_MODE_FORCE_LINK (1L<<11) bnx2.h 　
5277
 BNX2_EMAC_MODE_MPKTBNX2_EMAC_MODE_MPKT (1L<<18) bnx2.h 　
5278
 BNX2_EMAC_MODE_MPKT_RCVDBNX2_EMAC_MODE_MPKT_RCVD (1L<<19) bnx2.h 　
5279
 BNX2_EMAC_MODE_ACPI_RCVDBNX2_EMAC_MODE_ACPI_RCVD (1L<<20) bnx2.h 　
5280
 BNX2_EMAC_STATUSBNX2_EMAC_STATUS 0x00001404 bnx2.h 　
5281
 BNX2_EMAC_STATUS_LINKBNX2_EMAC_STATUS_LINK (1L<<11) bnx2.h 　
5282
 BNX2_EMAC_STATUS_LINK_CHANGEBNX2_EMAC_STATUS_LINK_CHANGE (1L<<12) bnx2.h 　
5283
 BNX2_EMAC_STATUS_MI_COMPLETEBNX2_EMAC_STATUS_MI_COMPLETE (1L<<22) bnx2.h 　
5284
 BNX2_EMAC_STATUS_MI_INTBNX2_EMAC_STATUS_MI_INT (1L<<23) bnx2.h 　
5285
 BNX2_EMAC_STATUS_AP_ERRORBNX2_EMAC_STATUS_AP_ERROR (1L<<24) bnx2.h 　
5286
 BNX2_EMAC_STATUS_PARITY_ERROR_SBNX2_EMAC_STATUS_PARITY_ERROR_S (1L<<31) bnx2.h 　
5287
 BNX2_EMAC_ATTENTION_ENABNX2_EMAC_ATTENTION_ENA 0x00001408 bnx2.h 　
5288
 BNX2_EMAC_ATTENTION_ENA_LINKBNX2_EMAC_ATTENTION_ENA_LINK (1L<<11) bnx2.h 　
5289
 BNX2_EMAC_ATTENTION_ENA_MI_COMPBNX2_EMAC_ATTENTION_ENA_MI_COMP (1L<<22) bnx2.h 　
5290
 BNX2_EMAC_ATTENTION_ENA_MI_INTBNX2_EMAC_ATTENTION_ENA_MI_INT (1L<<23) bnx2.h 　
5291
 BNX2_EMAC_ATTENTION_ENA_AP_ERROBNX2_EMAC_ATTENTION_ENA_AP_ERRO (1L<<24) bnx2.h 　
5292
 BNX2_EMAC_LEDBNX2_EMAC_LED 0x0000140c bnx2.h 　
5293
 BNX2_EMAC_LED_OVERRIDEBNX2_EMAC_LED_OVERRIDE (1L<<0) bnx2.h 　
5294
 BNX2_EMAC_LED_1000MB_OVERRIDEBNX2_EMAC_LED_1000MB_OVERRIDE (1L<<1) bnx2.h 　
5295
 BNX2_EMAC_LED_100MB_OVERRIDEBNX2_EMAC_LED_100MB_OVERRIDE (1L<<2) bnx2.h 　
5296
 BNX2_EMAC_LED_10MB_OVERRIDEBNX2_EMAC_LED_10MB_OVERRIDE (1L<<3) bnx2.h 　
5297
 BNX2_EMAC_LED_TRAFFIC_OVERRIDEBNX2_EMAC_LED_TRAFFIC_OVERRIDE (1L<<4) bnx2.h 　
5298
 BNX2_EMAC_LED_BLNK_TRAFFICBNX2_EMAC_LED_BLNK_TRAFFIC (1L<<5) bnx2.h 　
5299
 BNX2_EMAC_LED_TRAFFICBNX2_EMAC_LED_TRAFFIC (1L<<6) bnx2.h 　
5300
 BNX2_EMAC_LED_1000MBBNX2_EMAC_LED_1000MB (1L<<7) bnx2.h 　
5301
 BNX2_EMAC_LED_100MBBNX2_EMAC_LED_100MB (1L<<8) bnx2.h 　
5302
 BNX2_EMAC_LED_10MBBNX2_EMAC_LED_10MB (1L<<9) bnx2.h 　
5303
 BNX2_EMAC_LED_TRAFFIC_STATBNX2_EMAC_LED_TRAFFIC_STAT (1L<<10) bnx2.h 　
5304
 BNX2_EMAC_LED_BLNK_RATEBNX2_EMAC_LED_BLNK_RATE (0xfffL<<19) bnx2.h 　
5305
 BNX2_EMAC_LED_BLNK_RATE_ENABNX2_EMAC_LED_BLNK_RATE_ENA (1L<<31) bnx2.h 　
5306
 BNX2_EMAC_MAC_MATCH0BNX2_EMAC_MAC_MATCH0 0x00001410 bnx2.h 　
5307
 BNX2_EMAC_MAC_MATCH1BNX2_EMAC_MAC_MATCH1 0x00001414 bnx2.h 　
5308
 BNX2_EMAC_MAC_MATCH2BNX2_EMAC_MAC_MATCH2 0x00001418 bnx2.h 　
5309
 BNX2_EMAC_MAC_MATCH3BNX2_EMAC_MAC_MATCH3 0x0000141c bnx2.h 　
5310
 BNX2_EMAC_MAC_MATCH4BNX2_EMAC_MAC_MATCH4 0x00001420 bnx2.h 　
5311
 BNX2_EMAC_MAC_MATCH5BNX2_EMAC_MAC_MATCH5 0x00001424 bnx2.h 　
5312
 BNX2_EMAC_MAC_MATCH6BNX2_EMAC_MAC_MATCH6 0x00001428 bnx2.h 　
5313
 BNX2_EMAC_MAC_MATCH7BNX2_EMAC_MAC_MATCH7 0x0000142c bnx2.h 　
5314
 BNX2_EMAC_MAC_MATCH8BNX2_EMAC_MAC_MATCH8 0x00001430 bnx2.h 　
5315
 BNX2_EMAC_MAC_MATCH9BNX2_EMAC_MAC_MATCH9 0x00001434 bnx2.h 　
5316
 BNX2_EMAC_MAC_MATCH10BNX2_EMAC_MAC_MATCH10 0x00001438 bnx2.h 　
5317
 BNX2_EMAC_MAC_MATCH11BNX2_EMAC_MAC_MATCH11 0x0000143c bnx2.h 　
5318
 BNX2_EMAC_MAC_MATCH12BNX2_EMAC_MAC_MATCH12 0x00001440 bnx2.h 　
5319
 BNX2_EMAC_MAC_MATCH13BNX2_EMAC_MAC_MATCH13 0x00001444 bnx2.h 　
5320
 BNX2_EMAC_MAC_MATCH14BNX2_EMAC_MAC_MATCH14 0x00001448 bnx2.h 　
5321
 BNX2_EMAC_MAC_MATCH15BNX2_EMAC_MAC_MATCH15 0x0000144c bnx2.h 　
5322
 BNX2_EMAC_MAC_MATCH16BNX2_EMAC_MAC_MATCH16 0x00001450 bnx2.h 　
5323
 BNX2_EMAC_MAC_MATCH17BNX2_EMAC_MAC_MATCH17 0x00001454 bnx2.h 　
5324
 BNX2_EMAC_MAC_MATCH18BNX2_EMAC_MAC_MATCH18 0x00001458 bnx2.h 　
5325
 BNX2_EMAC_MAC_MATCH19BNX2_EMAC_MAC_MATCH19 0x0000145c bnx2.h 　
5326
 BNX2_EMAC_MAC_MATCH20BNX2_EMAC_MAC_MATCH20 0x00001460 bnx2.h 　
5327
 BNX2_EMAC_MAC_MATCH21BNX2_EMAC_MAC_MATCH21 0x00001464 bnx2.h 　
5328
 BNX2_EMAC_MAC_MATCH22BNX2_EMAC_MAC_MATCH22 0x00001468 bnx2.h 　
5329
 BNX2_EMAC_MAC_MATCH23BNX2_EMAC_MAC_MATCH23 0x0000146c bnx2.h 　
5330
 BNX2_EMAC_MAC_MATCH24BNX2_EMAC_MAC_MATCH24 0x00001470 bnx2.h 　
5331
 BNX2_EMAC_MAC_MATCH25BNX2_EMAC_MAC_MATCH25 0x00001474 bnx2.h 　
5332
 BNX2_EMAC_MAC_MATCH26BNX2_EMAC_MAC_MATCH26 0x00001478 bnx2.h 　
5333
 BNX2_EMAC_MAC_MATCH27BNX2_EMAC_MAC_MATCH27 0x0000147c bnx2.h 　
5334
 BNX2_EMAC_MAC_MATCH28BNX2_EMAC_MAC_MATCH28 0x00001480 bnx2.h 　
5335
 BNX2_EMAC_MAC_MATCH29BNX2_EMAC_MAC_MATCH29 0x00001484 bnx2.h 　
5336
 BNX2_EMAC_MAC_MATCH30BNX2_EMAC_MAC_MATCH30 0x00001488 bnx2.h 　
5337
 BNX2_EMAC_MAC_MATCH31BNX2_EMAC_MAC_MATCH31 0x0000148c bnx2.h 　
5338
 BNX2_EMAC_BACKOFF_SEEDBNX2_EMAC_BACKOFF_SEED 0x00001498 bnx2.h 　
5339
 BNX2_EMAC_BACKOFF_SEED_EMAC_BACBNX2_EMAC_BACKOFF_SEED_EMAC_BAC (0x3ffL<<0) bnx2.h 　
5340
 BNX2_EMAC_RX_MTU_SIZEBNX2_EMAC_RX_MTU_SIZE 0x0000149c bnx2.h 　
5341
 BNX2_EMAC_RX_MTU_SIZE_MTU_SIZEBNX2_EMAC_RX_MTU_SIZE_MTU_SIZE (0xffffL<<0) bnx2.h 　
5342
 BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENABNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA (1L<<31) bnx2.h 　
5343
 BNX2_EMAC_SERDES_CNTLBNX2_EMAC_SERDES_CNTL 0x000014a4 bnx2.h 　
5344
 BNX2_EMAC_SERDES_CNTL_RXRBNX2_EMAC_SERDES_CNTL_RXR (0x7L<<0) bnx2.h 　
5345
 BNX2_EMAC_SERDES_CNTL_RXGBNX2_EMAC_SERDES_CNTL_RXG (0x3L<<3) bnx2.h 　
5346
 BNX2_EMAC_SERDES_CNTL_RXCKSELBNX2_EMAC_SERDES_CNTL_RXCKSEL (1L<<6) bnx2.h 　
5347
 BNX2_EMAC_SERDES_CNTL_TXBIASBNX2_EMAC_SERDES_CNTL_TXBIAS (0x7L<<7) bnx2.h 　
5348
 BNX2_EMAC_SERDES_CNTL_BGMAXBNX2_EMAC_SERDES_CNTL_BGMAX (1L<<10) bnx2.h 　
5349
 BNX2_EMAC_SERDES_CNTL_BGMINBNX2_EMAC_SERDES_CNTL_BGMIN (1L<<11) bnx2.h 　
5350
 BNX2_EMAC_SERDES_CNTL_TXMODEBNX2_EMAC_SERDES_CNTL_TXMODE (1L<<12) bnx2.h 　
5351
 BNX2_EMAC_SERDES_CNTL_TXEDGEBNX2_EMAC_SERDES_CNTL_TXEDGE (1L<<13) bnx2.h 　
5352
 BNX2_EMAC_SERDES_CNTL_SERDES_MOBNX2_EMAC_SERDES_CNTL_SERDES_MO (1L<<14) bnx2.h 　
5353
 BNX2_EMAC_SERDES_CNTL_PLLTESTBNX2_EMAC_SERDES_CNTL_PLLTEST (1L<<15) bnx2.h 　
5354
 BNX2_EMAC_SERDES_CNTL_CDET_ENBNX2_EMAC_SERDES_CNTL_CDET_EN (1L<<16) bnx2.h 　
5355
 BNX2_EMAC_SERDES_CNTL_TBI_LBKBNX2_EMAC_SERDES_CNTL_TBI_LBK (1L<<17) bnx2.h 　
5356
 BNX2_EMAC_SERDES_CNTL_REMOTE_LBBNX2_EMAC_SERDES_CNTL_REMOTE_LB (1L<<18) bnx2.h 　
5357
 BNX2_EMAC_SERDES_CNTL_REV_PHASEBNX2_EMAC_SERDES_CNTL_REV_PHASE (1L<<19) bnx2.h 　
5358
 BNX2_EMAC_SERDES_CNTL_REGCTL12BNX2_EMAC_SERDES_CNTL_REGCTL12 (0x3L<<20) bnx2.h 　
5359
 BNX2_EMAC_SERDES_CNTL_REGCTL25BNX2_EMAC_SERDES_CNTL_REGCTL25 (0x3L<<22) bnx2.h 　
5360
 BNX2_EMAC_SERDES_STATUSBNX2_EMAC_SERDES_STATUS 0x000014a8 bnx2.h 　
5361
 BNX2_EMAC_SERDES_STATUS_RX_STATBNX2_EMAC_SERDES_STATUS_RX_STAT (0xffL<<0) bnx2.h 　
5362
 BNX2_EMAC_SERDES_STATUS_COMMA_DBNX2_EMAC_SERDES_STATUS_COMMA_D (1L<<8) bnx2.h 　
5363
 BNX2_EMAC_MDIO_COMMBNX2_EMAC_MDIO_COMM 0x000014ac bnx2.h 　
5364
 BNX2_EMAC_MDIO_COMM_DATABNX2_EMAC_MDIO_COMM_DATA (0xffffL<<0) bnx2.h 　
5365
 BNX2_EMAC_MDIO_COMM_REG_ADDRBNX2_EMAC_MDIO_COMM_REG_ADDR (0x1fL<<16) bnx2.h 　
5366
 BNX2_EMAC_MDIO_COMM_PHY_ADDRBNX2_EMAC_MDIO_COMM_PHY_ADDR (0x1fL<<21) bnx2.h 　
5367
 BNX2_EMAC_MDIO_COMM_COMMANDBNX2_EMAC_MDIO_COMM_COMMAND (0x3L<<26) bnx2.h 　
5368
 BNX2_EMAC_MDIO_COMM_COMMAND_UNDBNX2_EMAC_MDIO_COMM_COMMAND_UND (0L<<26) bnx2.h 　
5369
 BNX2_EMAC_MDIO_COMM_COMMAND_WRIBNX2_EMAC_MDIO_COMM_COMMAND_WRI (1L<<26) bnx2.h 　
5370
 BNX2_EMAC_MDIO_COMM_COMMAND_REABNX2_EMAC_MDIO_COMM_COMMAND_REA (2L<<26) bnx2.h 　
5371
 BNX2_EMAC_MDIO_COMM_COMMAND_UNDBNX2_EMAC_MDIO_COMM_COMMAND_UND (3L<<26) bnx2.h 　
5372
 BNX2_EMAC_MDIO_COMM_FAILBNX2_EMAC_MDIO_COMM_FAIL (1L<<28) bnx2.h 　
5373
 BNX2_EMAC_MDIO_COMM_START_BUSYBNX2_EMAC_MDIO_COMM_START_BUSY (1L<<29) bnx2.h 　
5374
 BNX2_EMAC_MDIO_COMM_DISEXTBNX2_EMAC_MDIO_COMM_DISEXT (1L<<30) bnx2.h 　
5375
 BNX2_EMAC_MDIO_STATUSBNX2_EMAC_MDIO_STATUS 0x000014b0 bnx2.h 　
5376
 BNX2_EMAC_MDIO_STATUS_LINKBNX2_EMAC_MDIO_STATUS_LINK (1L<<0) bnx2.h 　
5377
 BNX2_EMAC_MDIO_STATUS_10MBBNX2_EMAC_MDIO_STATUS_10MB (1L<<1) bnx2.h 　
5378
 BNX2_EMAC_MDIO_MODEBNX2_EMAC_MDIO_MODE 0x000014b4 bnx2.h 　
5379
 BNX2_EMAC_MDIO_MODE_SHORT_PREAMBNX2_EMAC_MDIO_MODE_SHORT_PREAM (1L<<1) bnx2.h 　
5380
 BNX2_EMAC_MDIO_MODE_AUTO_POLLBNX2_EMAC_MDIO_MODE_AUTO_POLL (1L<<4) bnx2.h 　
5381
 BNX2_EMAC_MDIO_MODE_BIT_BANGBNX2_EMAC_MDIO_MODE_BIT_BANG (1L<<8) bnx2.h 　
5382
 BNX2_EMAC_MDIO_MODE_MDIOBNX2_EMAC_MDIO_MODE_MDIO (1L<<9) bnx2.h 　
5383
 BNX2_EMAC_MDIO_MODE_MDIO_OEBNX2_EMAC_MDIO_MODE_MDIO_OE (1L<<10) bnx2.h 　
5384
 BNX2_EMAC_MDIO_MODE_MDCBNX2_EMAC_MDIO_MODE_MDC (1L<<11) bnx2.h 　
5385
 BNX2_EMAC_MDIO_MODE_MDINTBNX2_EMAC_MDIO_MODE_MDINT (1L<<12) bnx2.h 　
5386
 BNX2_EMAC_MDIO_MODE_CLOCK_CNTBNX2_EMAC_MDIO_MODE_CLOCK_CNT (0x1fL<<16) bnx2.h 　
5387
 BNX2_EMAC_MDIO_AUTO_STATUSBNX2_EMAC_MDIO_AUTO_STATUS 0x000014b8 bnx2.h 　
5388
 BNX2_EMAC_MDIO_AUTO_STATUS_AUTOBNX2_EMAC_MDIO_AUTO_STATUS_AUTO (1L<<0) bnx2.h 　
5389
 BNX2_EMAC_TX_MODEBNX2_EMAC_TX_MODE 0x000014bc bnx2.h 　
5390
 BNX2_EMAC_TX_MODE_RESETBNX2_EMAC_TX_MODE_RESET (1L<<0) bnx2.h 　
5391
 BNX2_EMAC_TX_MODE_EXT_PAUSE_ENBNX2_EMAC_TX_MODE_EXT_PAUSE_EN (1L<<3) bnx2.h 　
5392
 BNX2_EMAC_TX_MODE_FLOW_ENBNX2_EMAC_TX_MODE_FLOW_EN (1L<<4) bnx2.h 　
5393
 BNX2_EMAC_TX_MODE_BIG_BACKOFFBNX2_EMAC_TX_MODE_BIG_BACKOFF (1L<<5) bnx2.h 　
5394
 BNX2_EMAC_TX_MODE_LONG_PAUSEBNX2_EMAC_TX_MODE_LONG_PAUSE (1L<<6) bnx2.h 　
5395
 BNX2_EMAC_TX_MODE_LINK_AWAREBNX2_EMAC_TX_MODE_LINK_AWARE (1L<<7) bnx2.h 　
5396
 BNX2_EMAC_TX_STATUSBNX2_EMAC_TX_STATUS 0x000014c0 bnx2.h 　
5397
 BNX2_EMAC_TX_STATUS_XOFFEDBNX2_EMAC_TX_STATUS_XOFFED (1L<<0) bnx2.h 　
5398
 BNX2_EMAC_TX_STATUS_XOFF_SENTBNX2_EMAC_TX_STATUS_XOFF_SENT (1L<<1) bnx2.h 　
5399
 BNX2_EMAC_TX_STATUS_XON_SENTBNX2_EMAC_TX_STATUS_XON_SENT (1L<<2) bnx2.h 　
5400
 BNX2_EMAC_TX_STATUS_LINK_UPBNX2_EMAC_TX_STATUS_LINK_UP (1L<<3) bnx2.h 　
5401
 BNX2_EMAC_TX_STATUS_UNDERRUNBNX2_EMAC_TX_STATUS_UNDERRUN (1L<<4) bnx2.h 　
5402
 BNX2_EMAC_TX_LENGTHSBNX2_EMAC_TX_LENGTHS 0x000014c4 bnx2.h 　
5403
 BNX2_EMAC_TX_LENGTHS_SLOTBNX2_EMAC_TX_LENGTHS_SLOT (0xffL<<0) bnx2.h 　
5404
 BNX2_EMAC_TX_LENGTHS_IPGBNX2_EMAC_TX_LENGTHS_IPG (0xfL<<8) bnx2.h 　
5405
 BNX2_EMAC_TX_LENGTHS_IPG_CRSBNX2_EMAC_TX_LENGTHS_IPG_CRS (0x3L<<12) bnx2.h 　
5406
 BNX2_EMAC_RX_MODEBNX2_EMAC_RX_MODE 0x000014c8 bnx2.h 　
5407
 BNX2_EMAC_RX_MODE_RESETBNX2_EMAC_RX_MODE_RESET (1L<<0) bnx2.h 　
5408
 BNX2_EMAC_RX_MODE_FLOW_ENBNX2_EMAC_RX_MODE_FLOW_EN (1L<<2) bnx2.h 　
5409
 BNX2_EMAC_RX_MODE_KEEP_MAC_CONTBNX2_EMAC_RX_MODE_KEEP_MAC_CONT (1L<<3) bnx2.h 　
5410
 BNX2_EMAC_RX_MODE_KEEP_PAUSEBNX2_EMAC_RX_MODE_KEEP_PAUSE (1L<<4) bnx2.h 　
5411
 BNX2_EMAC_RX_MODE_ACCEPT_OVERSIBNX2_EMAC_RX_MODE_ACCEPT_OVERSI (1L<<5) bnx2.h 　
5412
 BNX2_EMAC_RX_MODE_ACCEPT_RUNTSBNX2_EMAC_RX_MODE_ACCEPT_RUNTS (1L<<6) bnx2.h 　
5413
 BNX2_EMAC_RX_MODE_LLC_CHKBNX2_EMAC_RX_MODE_LLC_CHK (1L<<7) bnx2.h 　
5414
 BNX2_EMAC_RX_MODE_PROMISCUOUSBNX2_EMAC_RX_MODE_PROMISCUOUS (1L<<8) bnx2.h 　
5415
 BNX2_EMAC_RX_MODE_NO_CRC_CHKBNX2_EMAC_RX_MODE_NO_CRC_CHK (1L<<9) bnx2.h 　
5416
 BNX2_EMAC_RX_MODE_KEEP_VLAN_TAGBNX2_EMAC_RX_MODE_KEEP_VLAN_TAG (1L<<10) bnx2.h 　
5417
 BNX2_EMAC_RX_MODE_FILT_BROADCASBNX2_EMAC_RX_MODE_FILT_BROADCAS (1L<<11) bnx2.h 　
5418
 BNX2_EMAC_RX_MODE_SORT_MODEBNX2_EMAC_RX_MODE_SORT_MODE (1L<<12) bnx2.h 　
5419
 BNX2_EMAC_RX_STATUSBNX2_EMAC_RX_STATUS 0x000014cc bnx2.h 　
5420
 BNX2_EMAC_RX_STATUS_FFEDBNX2_EMAC_RX_STATUS_FFED (1L<<0) bnx2.h 　
5421
 BNX2_EMAC_RX_STATUS_FF_RECEIVEDBNX2_EMAC_RX_STATUS_FF_RECEIVED (1L<<1) bnx2.h 　
5422
 BNX2_EMAC_RX_STATUS_N_RECEIVEDBNX2_EMAC_RX_STATUS_N_RECEIVED (1L<<2) bnx2.h 　
5423
 BNX2_EMAC_MULTICAST_HASH0BNX2_EMAC_MULTICAST_HASH0 0x000014d0 bnx2.h 　
5424
 BNX2_EMAC_MULTICAST_HASH1BNX2_EMAC_MULTICAST_HASH1 0x000014d4 bnx2.h 　
5425
 BNX2_EMAC_MULTICAST_HASH2BNX2_EMAC_MULTICAST_HASH2 0x000014d8 bnx2.h 　
5426
 BNX2_EMAC_MULTICAST_HASH3BNX2_EMAC_MULTICAST_HASH3 0x000014dc bnx2.h 　
5427
 BNX2_EMAC_MULTICAST_HASH4BNX2_EMAC_MULTICAST_HASH4 0x000014e0 bnx2.h 　
5428
 BNX2_EMAC_MULTICAST_HASH5BNX2_EMAC_MULTICAST_HASH5 0x000014e4 bnx2.h 　
5429
 BNX2_EMAC_MULTICAST_HASH6BNX2_EMAC_MULTICAST_HASH6 0x000014e8 bnx2.h 　
5430
 BNX2_EMAC_MULTICAST_HASH7BNX2_EMAC_MULTICAST_HASH7 0x000014ec bnx2.h 　
5431
 BNX2_EMAC_RX_STAT_IFHCINOCTETSBNX2_EMAC_RX_STAT_IFHCINOCTETS 0x00001500 bnx2.h 　
5432
 BNX2_EMAC_RX_STAT_IFHCINBADOCTEBNX2_EMAC_RX_STAT_IFHCINBADOCTE 0x00001504 bnx2.h 　
5433
 BNX2_EMAC_RX_STAT_ETHERSTATSFRABNX2_EMAC_RX_STAT_ETHERSTATSFRA 0x00001508 bnx2.h 　
5434
 BNX2_EMAC_RX_STAT_IFHCINUCASTPKBNX2_EMAC_RX_STAT_IFHCINUCASTPK 0x0000150c bnx2.h 　
5435
 BNX2_EMAC_RX_STAT_IFHCINMULTICABNX2_EMAC_RX_STAT_IFHCINMULTICA 0x00001510 bnx2.h 　
5436
 BNX2_EMAC_RX_STAT_IFHCINBROADCABNX2_EMAC_RX_STAT_IFHCINBROADCA 0x00001514 bnx2.h 　
5437
 BNX2_EMAC_RX_STAT_DOT3STATSFCSEBNX2_EMAC_RX_STAT_DOT3STATSFCSE 0x00001518 bnx2.h 　
5438
 BNX2_EMAC_RX_STAT_DOT3STATSALIGBNX2_EMAC_RX_STAT_DOT3STATSALIG 0x0000151c bnx2.h 　
5439
 BNX2_EMAC_RX_STAT_DOT3STATSCARRBNX2_EMAC_RX_STAT_DOT3STATSCARR 0x00001520 bnx2.h 　
5440
 BNX2_EMAC_RX_STAT_XONPAUSEFRAMEBNX2_EMAC_RX_STAT_XONPAUSEFRAME 0x00001524 bnx2.h 　
5441
 BNX2_EMAC_RX_STAT_XOFFPAUSEFRAMBNX2_EMAC_RX_STAT_XOFFPAUSEFRAM 0x00001528 bnx2.h 　
5442
 BNX2_EMAC_RX_STAT_MACCONTROLFRABNX2_EMAC_RX_STAT_MACCONTROLFRA 0x0000152c bnx2.h 　
5443
 BNX2_EMAC_RX_STAT_XOFFSTATEENTEBNX2_EMAC_RX_STAT_XOFFSTATEENTE 0x00001530 bnx2.h 　
5444
 BNX2_EMAC_RX_STAT_DOT3STATSFRAMBNX2_EMAC_RX_STAT_DOT3STATSFRAM 0x00001534 bnx2.h 　
5445
 BNX2_EMAC_RX_STAT_ETHERSTATSJABBNX2_EMAC_RX_STAT_ETHERSTATSJAB 0x00001538 bnx2.h 　
5446
 BNX2_EMAC_RX_STAT_ETHERSTATSUNDBNX2_EMAC_RX_STAT_ETHERSTATSUND 0x0000153c bnx2.h 　
5447
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001540 bnx2.h 　
5448
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001544 bnx2.h 　
5449
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001548 bnx2.h 　
5450
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x0000154c bnx2.h 　
5451
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001550 bnx2.h 　
5452
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001554 bnx2.h 　
5453
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001558 bnx2.h 　
5454
 BNX2_EMAC_RXMAC_DEBUG0BNX2_EMAC_RXMAC_DEBUG0 0x0000155c bnx2.h 　
5455
 BNX2_EMAC_RXMAC_DEBUG1BNX2_EMAC_RXMAC_DEBUG1 0x00001560 bnx2.h 　
5456
 BNX2_EMAC_RXMAC_DEBUG1_LENGTH_NBNX2_EMAC_RXMAC_DEBUG1_LENGTH_N (1L<<0) bnx2.h 　
5457
 BNX2_EMAC_RXMAC_DEBUG1_LENGTH_OBNX2_EMAC_RXMAC_DEBUG1_LENGTH_O (1L<<1) bnx2.h 　
5458
 BNX2_EMAC_RXMAC_DEBUG1_BAD_CRCBNX2_EMAC_RXMAC_DEBUG1_BAD_CRC (1L<<2) bnx2.h 　
5459
 BNX2_EMAC_RXMAC_DEBUG1_RX_ERRORBNX2_EMAC_RXMAC_DEBUG1_RX_ERROR (1L<<3) bnx2.h 　
5460
 BNX2_EMAC_RXMAC_DEBUG1_ALIGN_ERBNX2_EMAC_RXMAC_DEBUG1_ALIGN_ER (1L<<4) bnx2.h 　
5461
 BNX2_EMAC_RXMAC_DEBUG1_LAST_DATBNX2_EMAC_RXMAC_DEBUG1_LAST_DAT (1L<<5) bnx2.h 　
5462
 BNX2_EMAC_RXMAC_DEBUG1_ODD_BYTEBNX2_EMAC_RXMAC_DEBUG1_ODD_BYTE (1L<<6) bnx2.h 　
5463
 BNX2_EMAC_RXMAC_DEBUG1_BYTE_COUBNX2_EMAC_RXMAC_DEBUG1_BYTE_COU (0xffffL<<7) bnx2.h 　
5464
 BNX2_EMAC_RXMAC_DEBUG1_SLOT_TIMBNX2_EMAC_RXMAC_DEBUG1_SLOT_TIM (0xffL<<23) bnx2.h 　
5465
 BNX2_EMAC_RXMAC_DEBUG2BNX2_EMAC_RXMAC_DEBUG2 0x00001564 bnx2.h 　
5466
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x7L<<0) bnx2.h 　
5467
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x0L<<0) bnx2.h 　
5468
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x1L<<0) bnx2.h 　
5469
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x2L<<0) bnx2.h 　
5470
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x3L<<0) bnx2.h 　
5471
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x4L<<0) bnx2.h 　
5472
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x5L<<0) bnx2.h 　
5473
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x6L<<0) bnx2.h 　
5474
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x7L<<0) bnx2.h 　
5475
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0xfL<<3) bnx2.h 　
5476
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x0L<<3) bnx2.h 　
5477
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x1L<<3) bnx2.h 　
5478
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x2L<<3) bnx2.h 　
5479
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x3L<<3) bnx2.h 　
5480
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x4L<<3) bnx2.h 　
5481
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x5L<<3) bnx2.h 　
5482
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x6L<<3) bnx2.h 　
5483
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x7L<<3) bnx2.h 　
5484
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x8L<<3) bnx2.h 　
5485
 BNX2_EMAC_RXMAC_DEBUG2_BYTE_INBNX2_EMAC_RXMAC_DEBUG2_BYTE_IN (0xffL<<7) bnx2.h 　
5486
 BNX2_EMAC_RXMAC_DEBUG2_FALSECBNX2_EMAC_RXMAC_DEBUG2_FALSEC (1L<<15) bnx2.h 　
5487
 BNX2_EMAC_RXMAC_DEBUG2_TAGGEDBNX2_EMAC_RXMAC_DEBUG2_TAGGED (1L<<16) bnx2.h 　
5488
 BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STBNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST (1L<<18) bnx2.h 　
5489
 BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STBNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST (0L<<18) bnx2.h 　
5490
 BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STBNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST (1L<<18) bnx2.h 　
5491
 BNX2_EMAC_RXMAC_DEBUG2_SE_COUNTBNX2_EMAC_RXMAC_DEBUG2_SE_COUNT (0xfL<<19) bnx2.h 　
5492
 BNX2_EMAC_RXMAC_DEBUG2_QUANTABNX2_EMAC_RXMAC_DEBUG2_QUANTA (0x1fL<<23) bnx2.h 　
5493
 BNX2_EMAC_RXMAC_DEBUG3BNX2_EMAC_RXMAC_DEBUG3 0x00001568 bnx2.h 　
5494
 BNX2_EMAC_RXMAC_DEBUG3_PAUSE_CTBNX2_EMAC_RXMAC_DEBUG3_PAUSE_CT (0xffffL<<0) bnx2.h 　
5495
 BNX2_EMAC_RXMAC_DEBUG3_TMP_PAUSBNX2_EMAC_RXMAC_DEBUG3_TMP_PAUS (0xffffL<<16) bnx2.h 　
5496
 BNX2_EMAC_RXMAC_DEBUG4BNX2_EMAC_RXMAC_DEBUG4 0x0000156c bnx2.h 　
5497
 BNX2_EMAC_RXMAC_DEBUG4_TYPE_FIEBNX2_EMAC_RXMAC_DEBUG4_TYPE_FIE (0xffffL<<0) bnx2.h 　
5498
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x3fL<<16) bnx2.h 　
5499
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x0L<<16) bnx2.h 　
5500
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1L<<16) bnx2.h 　
5501
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x2L<<16) bnx2.h 　
5502
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x3L<<16) bnx2.h 　
5503
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x7L<<16) bnx2.h 　
5504
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x5L<<16) bnx2.h 　
5505
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x6L<<16) bnx2.h 　
5506
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x7L<<16) bnx2.h 　
5507
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x8L<<16) bnx2.h 　
5508
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x9L<<16) bnx2.h 　
5509
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0xaL<<16) bnx2.h 　
5510
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0xeL<<16) bnx2.h 　
5511
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0xfL<<16) bnx2.h 　
5512
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x10L<<16) bnx2.h 　
5513
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x11L<<16) bnx2.h 　
5514
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x12L<<16) bnx2.h 　
5515
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x13L<<16) bnx2.h 　
5516
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x14L<<16) bnx2.h 　
5517
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x15L<<16) bnx2.h 　
5518
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x16L<<16) bnx2.h 　
5519
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x17L<<16) bnx2.h 　
5520
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x18L<<16) bnx2.h 　
5521
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x19L<<16) bnx2.h 　
5522
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1aL<<16) bnx2.h 　
5523
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1bL<<16) bnx2.h 　
5524
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1cL<<16) bnx2.h 　
5525
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1dL<<16) bnx2.h 　
5526
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1eL<<16) bnx2.h 　
5527
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1fL<<16) bnx2.h 　
5528
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x20L<<16) bnx2.h 　
5529
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x21L<<16) bnx2.h 　
5530
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x22L<<16) bnx2.h 　
5531
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x23L<<16) bnx2.h 　
5532
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x24L<<16) bnx2.h 　
5533
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x25L<<16) bnx2.h 　
5534
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x26L<<16) bnx2.h 　
5535
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x27L<<16) bnx2.h 　
5536
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x28L<<16) bnx2.h 　
5537
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x29L<<16) bnx2.h 　
5538
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x2aL<<16) bnx2.h 　
5539
 BNX2_EMAC_RXMAC_DEBUG4_DROP_PKTBNX2_EMAC_RXMAC_DEBUG4_DROP_PKT (1L<<22) bnx2.h 　
5540
 BNX2_EMAC_RXMAC_DEBUG4_SLOT_FILBNX2_EMAC_RXMAC_DEBUG4_SLOT_FIL (1L<<23) bnx2.h 　
5541
 BNX2_EMAC_RXMAC_DEBUG4_FALSE_CABNX2_EMAC_RXMAC_DEBUG4_FALSE_CA (1L<<24) bnx2.h 　
5542
 BNX2_EMAC_RXMAC_DEBUG4_LAST_DATBNX2_EMAC_RXMAC_DEBUG4_LAST_DAT (1L<<25) bnx2.h 　
5543
 BNX2_EMAC_RXMAC_DEBUG4_sfd_FOUNBNX2_EMAC_RXMAC_DEBUG4_sfd_FOUN (1L<<26) bnx2.h 　
5544
 BNX2_EMAC_RXMAC_DEBUG4_ADVANCEBNX2_EMAC_RXMAC_DEBUG4_ADVANCE (1L<<27) bnx2.h 　
5545
 BNX2_EMAC_RXMAC_DEBUG4_STARTBNX2_EMAC_RXMAC_DEBUG4_START (1L<<28) bnx2.h 　
5546
 BNX2_EMAC_RXMAC_DEBUG5BNX2_EMAC_RXMAC_DEBUG5 0x00001570 bnx2.h 　
5547
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (0x7L<<0) bnx2.h 　
5548
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (0L<<0) bnx2.h 　
5549
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (1L<<0) bnx2.h 　
5550
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (2L<<0) bnx2.h 　
5551
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (3L<<0) bnx2.h 　
5552
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (4L<<0) bnx2.h 　
5553
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (5L<<0) bnx2.h 　
5554
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (6L<<0) bnx2.h 　
5555
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x7L<<4) bnx2.h 　
5556
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x0L<<4) bnx2.h 　
5557
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x1L<<4) bnx2.h 　
5558
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x2L<<4) bnx2.h 　
5559
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x3L<<4) bnx2.h 　
5560
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x4L<<4) bnx2.h 　
5561
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x6L<<4) bnx2.h 　
5562
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x7L<<4) bnx2.h 　
5563
 BNX2_EMAC_RXMAC_DEBUG5_EOF_DETEBNX2_EMAC_RXMAC_DEBUG5_EOF_DETE (1L<<7) bnx2.h 　
5564
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x7L<<8) bnx2.h 　
5565
 BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_ (1L<<11) bnx2.h 　
5566
 BNX2_EMAC_RXMAC_DEBUG5_LOAD_CCOBNX2_EMAC_RXMAC_DEBUG5_LOAD_CCO (1L<<12) bnx2.h 　
5567
 BNX2_EMAC_RXMAC_DEBUG5_LOAD_DATBNX2_EMAC_RXMAC_DEBUG5_LOAD_DAT (1L<<13) bnx2.h 　
5568
 BNX2_EMAC_RXMAC_DEBUG5_LOAD_STABNX2_EMAC_RXMAC_DEBUG5_LOAD_STA (1L<<14) bnx2.h 　
5569
 BNX2_EMAC_RXMAC_DEBUG5_CLR_STATBNX2_EMAC_RXMAC_DEBUG5_CLR_STAT (1L<<15) bnx2.h 　
5570
 BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_ (0x3L<<16) bnx2.h 　
5571
 BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_ (1L<<19) bnx2.h 　
5572
 BNX2_EMAC_RXMAC_DEBUG5_FMLENBNX2_EMAC_RXMAC_DEBUG5_FMLEN (0xfffL<<20) bnx2.h 　
5573
 BNX2_EMAC_RX_STAT_AC0BNX2_EMAC_RX_STAT_AC0 0x00001580 bnx2.h 　
5574
 BNX2_EMAC_RX_STAT_AC1BNX2_EMAC_RX_STAT_AC1 0x00001584 bnx2.h 　
5575
 BNX2_EMAC_RX_STAT_AC2BNX2_EMAC_RX_STAT_AC2 0x00001588 bnx2.h 　
5576
 BNX2_EMAC_RX_STAT_AC3BNX2_EMAC_RX_STAT_AC3 0x0000158c bnx2.h 　
5577
 BNX2_EMAC_RX_STAT_AC4BNX2_EMAC_RX_STAT_AC4 0x00001590 bnx2.h 　
5578
 BNX2_EMAC_RX_STAT_AC5BNX2_EMAC_RX_STAT_AC5 0x00001594 bnx2.h 　
5579
 BNX2_EMAC_RX_STAT_AC6BNX2_EMAC_RX_STAT_AC6 0x00001598 bnx2.h 　
5580
 BNX2_EMAC_RX_STAT_AC7BNX2_EMAC_RX_STAT_AC7 0x0000159c bnx2.h 　
5581
 BNX2_EMAC_RX_STAT_AC8BNX2_EMAC_RX_STAT_AC8 0x000015a0 bnx2.h 　
5582
 BNX2_EMAC_RX_STAT_AC9BNX2_EMAC_RX_STAT_AC9 0x000015a4 bnx2.h 　
5583
 BNX2_EMAC_RX_STAT_AC10BNX2_EMAC_RX_STAT_AC10 0x000015a8 bnx2.h 　
5584
 BNX2_EMAC_RX_STAT_AC11BNX2_EMAC_RX_STAT_AC11 0x000015ac bnx2.h 　
5585
 BNX2_EMAC_RX_STAT_AC12BNX2_EMAC_RX_STAT_AC12 0x000015b0 bnx2.h 　
5586
 BNX2_EMAC_RX_STAT_AC13BNX2_EMAC_RX_STAT_AC13 0x000015b4 bnx2.h 　
5587
 BNX2_EMAC_RX_STAT_AC14BNX2_EMAC_RX_STAT_AC14 0x000015b8 bnx2.h 　
5588
 BNX2_EMAC_RX_STAT_AC15BNX2_EMAC_RX_STAT_AC15 0x000015bc bnx2.h 　
5589
 BNX2_EMAC_RX_STAT_AC16BNX2_EMAC_RX_STAT_AC16 0x000015c0 bnx2.h 　
5590
 BNX2_EMAC_RX_STAT_AC17BNX2_EMAC_RX_STAT_AC17 0x000015c4 bnx2.h 　
5591
 BNX2_EMAC_RX_STAT_AC18BNX2_EMAC_RX_STAT_AC18 0x000015c8 bnx2.h 　
5592
 BNX2_EMAC_RX_STAT_AC19BNX2_EMAC_RX_STAT_AC19 0x000015cc bnx2.h 　
5593
 BNX2_EMAC_RX_STAT_AC20BNX2_EMAC_RX_STAT_AC20 0x000015d0 bnx2.h 　
5594
 BNX2_EMAC_RX_STAT_AC21BNX2_EMAC_RX_STAT_AC21 0x000015d4 bnx2.h 　
5595
 BNX2_EMAC_RX_STAT_AC22BNX2_EMAC_RX_STAT_AC22 0x000015d8 bnx2.h 　
5596
 BNX2_EMAC_RXMAC_SUC_DBG_OVERRUNBNX2_EMAC_RXMAC_SUC_DBG_OVERRUN 0x000015dc bnx2.h 　
5597
 BNX2_EMAC_TX_STAT_IFHCOUTOCTETSBNX2_EMAC_TX_STAT_IFHCOUTOCTETS 0x00001600 bnx2.h 　
5598
 BNX2_EMAC_TX_STAT_IFHCOUTBADOCTBNX2_EMAC_TX_STAT_IFHCOUTBADOCT 0x00001604 bnx2.h 　
5599
 BNX2_EMAC_TX_STAT_ETHERSTATSCOLBNX2_EMAC_TX_STAT_ETHERSTATSCOL 0x00001608 bnx2.h 　
5600
 BNX2_EMAC_TX_STAT_OUTXONSENTBNX2_EMAC_TX_STAT_OUTXONSENT 0x0000160c bnx2.h 　
5601
 BNX2_EMAC_TX_STAT_OUTXOFFSENTBNX2_EMAC_TX_STAT_OUTXOFFSENT 0x00001610 bnx2.h 　
5602
 BNX2_EMAC_TX_STAT_FLOWCONTROLDOBNX2_EMAC_TX_STAT_FLOWCONTROLDO 0x00001614 bnx2.h 　
5603
 BNX2_EMAC_TX_STAT_DOT3STATSSINGBNX2_EMAC_TX_STAT_DOT3STATSSING 0x00001618 bnx2.h 　
5604
 BNX2_EMAC_TX_STAT_DOT3STATSMULTBNX2_EMAC_TX_STAT_DOT3STATSMULT 0x0000161c bnx2.h 　
5605
 BNX2_EMAC_TX_STAT_DOT3STATSDEFEBNX2_EMAC_TX_STAT_DOT3STATSDEFE 0x00001620 bnx2.h 　
5606
 BNX2_EMAC_TX_STAT_DOT3STATSEXCEBNX2_EMAC_TX_STAT_DOT3STATSEXCE 0x00001624 bnx2.h 　
5607
 BNX2_EMAC_TX_STAT_DOT3STATSLATEBNX2_EMAC_TX_STAT_DOT3STATSLATE 0x00001628 bnx2.h 　
5608
 BNX2_EMAC_TX_STAT_IFHCOUTUCASTPBNX2_EMAC_TX_STAT_IFHCOUTUCASTP 0x0000162c bnx2.h 　
5609
 BNX2_EMAC_TX_STAT_IFHCOUTMULTICBNX2_EMAC_TX_STAT_IFHCOUTMULTIC 0x00001630 bnx2.h 　
5610
 BNX2_EMAC_TX_STAT_IFHCOUTBROADCBNX2_EMAC_TX_STAT_IFHCOUTBROADC 0x00001634 bnx2.h 　
5611
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x00001638 bnx2.h 　
5612
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x0000163c bnx2.h 　
5613
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x00001640 bnx2.h 　
5614
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x00001644 bnx2.h 　
5615
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x00001648 bnx2.h 　
5616
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x0000164c bnx2.h 　
5617
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x00001650 bnx2.h 　
5618
 BNX2_EMAC_TX_STAT_DOT3STATSINTEBNX2_EMAC_TX_STAT_DOT3STATSINTE 0x00001654 bnx2.h 　
5619
 BNX2_EMAC_TXMAC_DEBUG0BNX2_EMAC_TXMAC_DEBUG0 0x00001658 bnx2.h 　
5620
 BNX2_EMAC_TXMAC_DEBUG1BNX2_EMAC_TXMAC_DEBUG1 0x0000165c bnx2.h 　
5621
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0xfL<<0) bnx2.h 　
5622
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x0L<<0) bnx2.h 　
5623
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x1L<<0) bnx2.h 　
5624
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x4L<<0) bnx2.h 　
5625
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x5L<<0) bnx2.h 　
5626
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x6L<<0) bnx2.h 　
5627
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x7L<<0) bnx2.h 　
5628
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x8L<<0) bnx2.h 　
5629
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x9L<<0) bnx2.h 　
5630
 BNX2_EMAC_TXMAC_DEBUG1_CRS_ENABBNX2_EMAC_TXMAC_DEBUG1_CRS_ENAB (1L<<4) bnx2.h 　
5631
 BNX2_EMAC_TXMAC_DEBUG1_BAD_CRCBNX2_EMAC_TXMAC_DEBUG1_BAD_CRC (1L<<5) bnx2.h 　
5632
 BNX2_EMAC_TXMAC_DEBUG1_SE_COUNTBNX2_EMAC_TXMAC_DEBUG1_SE_COUNT (0xfL<<6) bnx2.h 　
5633
 BNX2_EMAC_TXMAC_DEBUG1_SEND_PAUBNX2_EMAC_TXMAC_DEBUG1_SEND_PAU (1L<<10) bnx2.h 　
5634
 BNX2_EMAC_TXMAC_DEBUG1_LATE_COLBNX2_EMAC_TXMAC_DEBUG1_LATE_COL (1L<<11) bnx2.h 　
5635
 BNX2_EMAC_TXMAC_DEBUG1_MAX_DEFEBNX2_EMAC_TXMAC_DEBUG1_MAX_DEFE (1L<<12) bnx2.h 　
5636
 BNX2_EMAC_TXMAC_DEBUG1_DEFERREDBNX2_EMAC_TXMAC_DEBUG1_DEFERRED (1L<<13) bnx2.h 　
5637
 BNX2_EMAC_TXMAC_DEBUG1_ONE_BYTEBNX2_EMAC_TXMAC_DEBUG1_ONE_BYTE (1L<<14) bnx2.h 　
5638
 BNX2_EMAC_TXMAC_DEBUG1_IPG_TIMEBNX2_EMAC_TXMAC_DEBUG1_IPG_TIME (0xfL<<15) bnx2.h 　
5639
 BNX2_EMAC_TXMAC_DEBUG1_SLOT_TIMBNX2_EMAC_TXMAC_DEBUG1_SLOT_TIM (0xffL<<19) bnx2.h 　
5640
 BNX2_EMAC_TXMAC_DEBUG2BNX2_EMAC_TXMAC_DEBUG2 0x00001660 bnx2.h 　
5641
 BNX2_EMAC_TXMAC_DEBUG2_BACK_OFFBNX2_EMAC_TXMAC_DEBUG2_BACK_OFF (0x3ffL<<0) bnx2.h 　
5642
 BNX2_EMAC_TXMAC_DEBUG2_BYTE_COUBNX2_EMAC_TXMAC_DEBUG2_BYTE_COU (0xffffL<<10) bnx2.h 　
5643
 BNX2_EMAC_TXMAC_DEBUG2_COL_COUNBNX2_EMAC_TXMAC_DEBUG2_COL_COUN (0x1fL<<26) bnx2.h 　
5644
 BNX2_EMAC_TXMAC_DEBUG2_COL_BITBNX2_EMAC_TXMAC_DEBUG2_COL_BIT (1L<<31) bnx2.h 　
5645
 BNX2_EMAC_TXMAC_DEBUG3BNX2_EMAC_TXMAC_DEBUG3 0x00001664 bnx2.h 　
5646
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xfL<<0) bnx2.h 　
5647
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x0L<<0) bnx2.h 　
5648
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x1L<<0) bnx2.h 　
5649
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x2L<<0) bnx2.h 　
5650
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x3L<<0) bnx2.h 　
5651
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x4L<<0) bnx2.h 　
5652
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x5L<<0) bnx2.h 　
5653
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x6L<<0) bnx2.h 　
5654
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x7L<<0) bnx2.h 　
5655
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x8L<<0) bnx2.h 　
5656
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x9L<<0) bnx2.h 　
5657
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xaL<<0) bnx2.h 　
5658
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xbL<<0) bnx2.h 　
5659
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xcL<<0) bnx2.h 　
5660
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xdL<<0) bnx2.h 　
5661
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xeL<<0) bnx2.h 　
5662
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x7L<<4) bnx2.h 　
5663
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x0L<<4) bnx2.h 　
5664
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x1L<<4) bnx2.h 　
5665
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x2L<<4) bnx2.h 　
5666
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x3L<<4) bnx2.h 　
5667
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x4L<<4) bnx2.h 　
5668
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x5L<<4) bnx2.h 　
5669
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x6L<<4) bnx2.h 　
5670
 BNX2_EMAC_TXMAC_DEBUG3_CRS_DONEBNX2_EMAC_TXMAC_DEBUG3_CRS_DONE (1L<<7) bnx2.h 　
5671
 BNX2_EMAC_TXMAC_DEBUG3_XOFFBNX2_EMAC_TXMAC_DEBUG3_XOFF (1L<<8) bnx2.h 　
5672
 BNX2_EMAC_TXMAC_DEBUG3_SE_COUNTBNX2_EMAC_TXMAC_DEBUG3_SE_COUNT (0xfL<<9) bnx2.h 　
5673
 BNX2_EMAC_TXMAC_DEBUG3_QUANTA_CBNX2_EMAC_TXMAC_DEBUG3_QUANTA_C (0x1fL<<13) bnx2.h 　
5674
 BNX2_EMAC_TXMAC_DEBUG4BNX2_EMAC_TXMAC_DEBUG4 0x00001668 bnx2.h 　
5675
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_COBNX2_EMAC_TXMAC_DEBUG4_PAUSE_CO (0xffffL<<0) bnx2.h 　
5676
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0xfL<<16) bnx2.h 　
5677
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x0L<<16) bnx2.h 　
5678
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x2L<<16) bnx2.h 　
5679
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x3L<<16) bnx2.h 　
5680
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x6L<<16) bnx2.h 　
5681
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x7L<<16) bnx2.h 　
5682
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x5L<<16) bnx2.h 　
5683
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x4L<<16) bnx2.h 　
5684
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0xcL<<16) bnx2.h 　
5685
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0xeL<<16) bnx2.h 　
5686
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0xaL<<16) bnx2.h 　
5687
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x8L<<16) bnx2.h 　
5688
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x9L<<16) bnx2.h 　
5689
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0xdL<<16) bnx2.h 　
5690
 BNX2_EMAC_TXMAC_DEBUG4_STATS0_VBNX2_EMAC_TXMAC_DEBUG4_STATS0_V (1L<<20) bnx2.h 　
5691
 BNX2_EMAC_TXMAC_DEBUG4_APPEND_CBNX2_EMAC_TXMAC_DEBUG4_APPEND_C (1L<<21) bnx2.h 　
5692
 BNX2_EMAC_TXMAC_DEBUG4_SLOT_FILBNX2_EMAC_TXMAC_DEBUG4_SLOT_FIL (1L<<22) bnx2.h 　
5693
 BNX2_EMAC_TXMAC_DEBUG4_MAX_DEFEBNX2_EMAC_TXMAC_DEBUG4_MAX_DEFE (1L<<23) bnx2.h 　
5694
 BNX2_EMAC_TXMAC_DEBUG4_SEND_EXTBNX2_EMAC_TXMAC_DEBUG4_SEND_EXT (1L<<24) bnx2.h 　
5695
 BNX2_EMAC_TXMAC_DEBUG4_SEND_PADBNX2_EMAC_TXMAC_DEBUG4_SEND_PAD (1L<<25) bnx2.h 　
5696
 BNX2_EMAC_TXMAC_DEBUG4_EOF_LOCBNX2_EMAC_TXMAC_DEBUG4_EOF_LOC (1L<<26) bnx2.h 　
5697
 BNX2_EMAC_TXMAC_DEBUG4_COLLIDINBNX2_EMAC_TXMAC_DEBUG4_COLLIDIN (1L<<27) bnx2.h 　
5698
 BNX2_EMAC_TXMAC_DEBUG4_COL_INBNX2_EMAC_TXMAC_DEBUG4_COL_IN (1L<<28) bnx2.h 　
5699
 BNX2_EMAC_TXMAC_DEBUG4_BURSTINGBNX2_EMAC_TXMAC_DEBUG4_BURSTING (1L<<29) bnx2.h 　
5700
 BNX2_EMAC_TXMAC_DEBUG4_ADVANCEBNX2_EMAC_TXMAC_DEBUG4_ADVANCE (1L<<30) bnx2.h 　
5701
 BNX2_EMAC_TXMAC_DEBUG4_GOBNX2_EMAC_TXMAC_DEBUG4_GO (1L<<31) bnx2.h 　
5702
 BNX2_EMAC_TX_STAT_AC0BNX2_EMAC_TX_STAT_AC0 0x00001680 bnx2.h 　
5703
 BNX2_EMAC_TX_STAT_AC1BNX2_EMAC_TX_STAT_AC1 0x00001684 bnx2.h 　
5704
 BNX2_EMAC_TX_STAT_AC2BNX2_EMAC_TX_STAT_AC2 0x00001688 bnx2.h 　
5705
 BNX2_EMAC_TX_STAT_AC3BNX2_EMAC_TX_STAT_AC3 0x0000168c bnx2.h 　
5706
 BNX2_EMAC_TX_STAT_AC4BNX2_EMAC_TX_STAT_AC4 0x00001690 bnx2.h 　
5707
 BNX2_EMAC_TX_STAT_AC5BNX2_EMAC_TX_STAT_AC5 0x00001694 bnx2.h 　
5708
 BNX2_EMAC_TX_STAT_AC6BNX2_EMAC_TX_STAT_AC6 0x00001698 bnx2.h 　
5709
 BNX2_EMAC_TX_STAT_AC7BNX2_EMAC_TX_STAT_AC7 0x0000169c bnx2.h 　
5710
 BNX2_EMAC_TX_STAT_AC8BNX2_EMAC_TX_STAT_AC8 0x000016a0 bnx2.h 　
5711
 BNX2_EMAC_TX_STAT_AC9BNX2_EMAC_TX_STAT_AC9 0x000016a4 bnx2.h 　
5712
 BNX2_EMAC_TX_STAT_AC10BNX2_EMAC_TX_STAT_AC10 0x000016a8 bnx2.h 　
5713
 BNX2_EMAC_TX_STAT_AC11BNX2_EMAC_TX_STAT_AC11 0x000016ac bnx2.h 　
5714
 BNX2_EMAC_TX_STAT_AC12BNX2_EMAC_TX_STAT_AC12 0x000016b0 bnx2.h 　
5715
 BNX2_EMAC_TX_STAT_AC13BNX2_EMAC_TX_STAT_AC13 0x000016b4 bnx2.h 　
5716
 BNX2_EMAC_TX_STAT_AC14BNX2_EMAC_TX_STAT_AC14 0x000016b8 bnx2.h 　
5717
 BNX2_EMAC_TX_STAT_AC15BNX2_EMAC_TX_STAT_AC15 0x000016bc bnx2.h 　
5718
 BNX2_EMAC_TX_STAT_AC16BNX2_EMAC_TX_STAT_AC16 0x000016c0 bnx2.h 　
5719
 BNX2_EMAC_TX_STAT_AC17BNX2_EMAC_TX_STAT_AC17 0x000016c4 bnx2.h 　
5720
 BNX2_EMAC_TX_STAT_AC18BNX2_EMAC_TX_STAT_AC18 0x000016c8 bnx2.h 　
5721
 BNX2_EMAC_TX_STAT_AC19BNX2_EMAC_TX_STAT_AC19 0x000016cc bnx2.h 　
5722
 BNX2_EMAC_TX_STAT_AC20BNX2_EMAC_TX_STAT_AC20 0x000016d0 bnx2.h 　
5723
 BNX2_EMAC_TX_STAT_AC21BNX2_EMAC_TX_STAT_AC21 0x000016d4 bnx2.h 　
5724
 BNX2_EMAC_TXMAC_SUC_DBG_OVERRUNBNX2_EMAC_TXMAC_SUC_DBG_OVERRUN 0x000016d8 bnx2.h 　
5725
 BNX2_RPM_COMMANDBNX2_RPM_COMMAND 0x00001800 bnx2.h 　
5726
 BNX2_RPM_COMMAND_ENABLEDBNX2_RPM_COMMAND_ENABLED (1L<<0) bnx2.h 　
5727
 BNX2_RPM_COMMAND_OVERRUN_ABORTBNX2_RPM_COMMAND_OVERRUN_ABORT (1L<<4) bnx2.h 　
5728
 BNX2_RPM_STATUSBNX2_RPM_STATUS 0x00001804 bnx2.h 　
5729
 BNX2_RPM_STATUS_MBUF_WAITBNX2_RPM_STATUS_MBUF_WAIT (1L<<0) bnx2.h 　
5730
 BNX2_RPM_STATUS_FREE_WAITBNX2_RPM_STATUS_FREE_WAIT (1L<<1) bnx2.h 　
5731
 BNX2_RPM_CONFIGBNX2_RPM_CONFIG 0x00001808 bnx2.h 　
5732
 BNX2_RPM_CONFIG_NO_PSD_HDR_CKSUBNX2_RPM_CONFIG_NO_PSD_HDR_CKSU (1L<<0) bnx2.h 　
5733
 BNX2_RPM_CONFIG_ACPI_ENABNX2_RPM_CONFIG_ACPI_ENA (1L<<1) bnx2.h 　
5734
 BNX2_RPM_CONFIG_ACPI_KEEPBNX2_RPM_CONFIG_ACPI_KEEP (1L<<2) bnx2.h 　
5735
 BNX2_RPM_CONFIG_MP_KEEPBNX2_RPM_CONFIG_MP_KEEP (1L<<3) bnx2.h 　
5736
 BNX2_RPM_CONFIG_SORT_VECT_VALBNX2_RPM_CONFIG_SORT_VECT_VAL (0xfL<<4) bnx2.h 　
5737
 BNX2_RPM_CONFIG_IGNORE_VLANBNX2_RPM_CONFIG_IGNORE_VLAN (1L<<31) bnx2.h 　
5738
 BNX2_RPM_VLAN_MATCH0BNX2_RPM_VLAN_MATCH0 0x00001810 bnx2.h 　
5739
 BNX2_RPM_VLAN_MATCH0_RPM_VLAN_MBNX2_RPM_VLAN_MATCH0_RPM_VLAN_M (0xfffL<<0) bnx2.h 　
5740
 BNX2_RPM_VLAN_MATCH1BNX2_RPM_VLAN_MATCH1 0x00001814 bnx2.h 　
5741
 BNX2_RPM_VLAN_MATCH1_RPM_VLAN_MBNX2_RPM_VLAN_MATCH1_RPM_VLAN_M (0xfffL<<0) bnx2.h 　
5742
 BNX2_RPM_VLAN_MATCH2BNX2_RPM_VLAN_MATCH2 0x00001818 bnx2.h 　
5743
 BNX2_RPM_VLAN_MATCH2_RPM_VLAN_MBNX2_RPM_VLAN_MATCH2_RPM_VLAN_M (0xfffL<<0) bnx2.h 　
5744
 BNX2_RPM_VLAN_MATCH3BNX2_RPM_VLAN_MATCH3 0x0000181c bnx2.h 　
5745
 BNX2_RPM_VLAN_MATCH3_RPM_VLAN_MBNX2_RPM_VLAN_MATCH3_RPM_VLAN_M (0xfffL<<0) bnx2.h 　
5746
 BNX2_RPM_SORT_USER0BNX2_RPM_SORT_USER0 0x00001820 bnx2.h 　
5747
 BNX2_RPM_SORT_USER0_PM_ENBNX2_RPM_SORT_USER0_PM_EN (0xffffL<<0) bnx2.h 　
5748
 BNX2_RPM_SORT_USER0_BC_ENBNX2_RPM_SORT_USER0_BC_EN (1L<<16) bnx2.h 　
5749
 BNX2_RPM_SORT_USER0_MC_ENBNX2_RPM_SORT_USER0_MC_EN (1L<<17) bnx2.h 　
5750
 BNX2_RPM_SORT_USER0_MC_HSH_ENBNX2_RPM_SORT_USER0_MC_HSH_EN (1L<<18) bnx2.h 　
5751
 BNX2_RPM_SORT_USER0_PROM_ENBNX2_RPM_SORT_USER0_PROM_EN (1L<<19) bnx2.h 　
5752
 BNX2_RPM_SORT_USER0_VLAN_ENBNX2_RPM_SORT_USER0_VLAN_EN (0xfL<<20) bnx2.h 　
5753
 BNX2_RPM_SORT_USER0_PROM_VLANBNX2_RPM_SORT_USER0_PROM_VLAN (1L<<24) bnx2.h 　
5754
 BNX2_RPM_SORT_USER0_ENABNX2_RPM_SORT_USER0_ENA (1L<<31) bnx2.h 　
5755
 BNX2_RPM_SORT_USER1BNX2_RPM_SORT_USER1 0x00001824 bnx2.h 　
5756
 BNX2_RPM_SORT_USER1_PM_ENBNX2_RPM_SORT_USER1_PM_EN (0xffffL<<0) bnx2.h 　
5757
 BNX2_RPM_SORT_USER1_BC_ENBNX2_RPM_SORT_USER1_BC_EN (1L<<16) bnx2.h 　
5758
 BNX2_RPM_SORT_USER1_MC_ENBNX2_RPM_SORT_USER1_MC_EN (1L<<17) bnx2.h 　
5759
 BNX2_RPM_SORT_USER1_MC_HSH_ENBNX2_RPM_SORT_USER1_MC_HSH_EN (1L<<18) bnx2.h 　
5760
 BNX2_RPM_SORT_USER1_PROM_ENBNX2_RPM_SORT_USER1_PROM_EN (1L<<19) bnx2.h 　
5761
 BNX2_RPM_SORT_USER1_VLAN_ENBNX2_RPM_SORT_USER1_VLAN_EN (0xfL<<20) bnx2.h 　
5762
 BNX2_RPM_SORT_USER1_PROM_VLANBNX2_RPM_SORT_USER1_PROM_VLAN (1L<<24) bnx2.h 　
5763
 BNX2_RPM_SORT_USER1_ENABNX2_RPM_SORT_USER1_ENA (1L<<31) bnx2.h 　
5764
 BNX2_RPM_SORT_USER2BNX2_RPM_SORT_USER2 0x00001828 bnx2.h 　
5765
 BNX2_RPM_SORT_USER2_PM_ENBNX2_RPM_SORT_USER2_PM_EN (0xffffL<<0) bnx2.h 　
5766
 BNX2_RPM_SORT_USER2_BC_ENBNX2_RPM_SORT_USER2_BC_EN (1L<<16) bnx2.h 　
5767
 BNX2_RPM_SORT_USER2_MC_ENBNX2_RPM_SORT_USER2_MC_EN (1L<<17) bnx2.h 　
5768
 BNX2_RPM_SORT_USER2_MC_HSH_ENBNX2_RPM_SORT_USER2_MC_HSH_EN (1L<<18) bnx2.h 　
5769
 BNX2_RPM_SORT_USER2_PROM_ENBNX2_RPM_SORT_USER2_PROM_EN (1L<<19) bnx2.h 　
5770
 BNX2_RPM_SORT_USER2_VLAN_ENBNX2_RPM_SORT_USER2_VLAN_EN (0xfL<<20) bnx2.h 　
5771
 BNX2_RPM_SORT_USER2_PROM_VLANBNX2_RPM_SORT_USER2_PROM_VLAN (1L<<24) bnx2.h 　
5772
 BNX2_RPM_SORT_USER2_ENABNX2_RPM_SORT_USER2_ENA (1L<<31) bnx2.h 　
5773
 BNX2_RPM_SORT_USER3BNX2_RPM_SORT_USER3 0x0000182c bnx2.h 　
5774
 BNX2_RPM_SORT_USER3_PM_ENBNX2_RPM_SORT_USER3_PM_EN (0xffffL<<0) bnx2.h 　
5775
 BNX2_RPM_SORT_USER3_BC_ENBNX2_RPM_SORT_USER3_BC_EN (1L<<16) bnx2.h 　
5776
 BNX2_RPM_SORT_USER3_MC_ENBNX2_RPM_SORT_USER3_MC_EN (1L<<17) bnx2.h 　
5777
 BNX2_RPM_SORT_USER3_MC_HSH_ENBNX2_RPM_SORT_USER3_MC_HSH_EN (1L<<18) bnx2.h 　
5778
 BNX2_RPM_SORT_USER3_PROM_ENBNX2_RPM_SORT_USER3_PROM_EN (1L<<19) bnx2.h 　
5779
 BNX2_RPM_SORT_USER3_VLAN_ENBNX2_RPM_SORT_USER3_VLAN_EN (0xfL<<20) bnx2.h 　
5780
 BNX2_RPM_SORT_USER3_PROM_VLANBNX2_RPM_SORT_USER3_PROM_VLAN (1L<<24) bnx2.h 　
5781
 BNX2_RPM_SORT_USER3_ENABNX2_RPM_SORT_USER3_ENA (1L<<31) bnx2.h 　
5782
 BNX2_RPM_STAT_L2_FILTER_DISCARDBNX2_RPM_STAT_L2_FILTER_DISCARD 0x00001840 bnx2.h 　
5783
 BNX2_RPM_STAT_RULE_CHECKER_DISCBNX2_RPM_STAT_RULE_CHECKER_DISC 0x00001844 bnx2.h 　
5784
 BNX2_RPM_STAT_IFINFTQDISCARDSBNX2_RPM_STAT_IFINFTQDISCARDS 0x00001848 bnx2.h 　
5785
 BNX2_RPM_STAT_IFINMBUFDISCARDBNX2_RPM_STAT_IFINMBUFDISCARD 0x0000184c bnx2.h 　
5786
 BNX2_RPM_STAT_RULE_CHECKER_P4_HBNX2_RPM_STAT_RULE_CHECKER_P4_H 0x00001850 bnx2.h 　
5787
 BNX2_RPM_STAT_AC0BNX2_RPM_STAT_AC0 0x00001880 bnx2.h 　
5788
 BNX2_RPM_STAT_AC1BNX2_RPM_STAT_AC1 0x00001884 bnx2.h 　
5789
 BNX2_RPM_STAT_AC2BNX2_RPM_STAT_AC2 0x00001888 bnx2.h 　
5790
 BNX2_RPM_STAT_AC3BNX2_RPM_STAT_AC3 0x0000188c bnx2.h 　
5791
 BNX2_RPM_STAT_AC4BNX2_RPM_STAT_AC4 0x00001890 bnx2.h 　
5792
 BNX2_RPM_RC_CNTL_0BNX2_RPM_RC_CNTL_0 0x00001900 bnx2.h 　
5793
 BNX2_RPM_RC_CNTL_0_OFFSETBNX2_RPM_RC_CNTL_0_OFFSET (0xffL<<0) bnx2.h 　
5794
 BNX2_RPM_RC_CNTL_0_CLASSBNX2_RPM_RC_CNTL_0_CLASS (0x7L<<8) bnx2.h 　
5795
 BNX2_RPM_RC_CNTL_0_PRIORITYBNX2_RPM_RC_CNTL_0_PRIORITY (1L<<11) bnx2.h 　
5796
 BNX2_RPM_RC_CNTL_0_P4BNX2_RPM_RC_CNTL_0_P4 (1L<<12) bnx2.h 　
5797
 BNX2_RPM_RC_CNTL_0_HDR_TYPEBNX2_RPM_RC_CNTL_0_HDR_TYPE (0x7L<<13) bnx2.h 　
5798
 BNX2_RPM_RC_CNTL_0_HDR_TYPE_STABNX2_RPM_RC_CNTL_0_HDR_TYPE_STA (0L<<13) bnx2.h 　
5799
 BNX2_RPM_RC_CNTL_0_HDR_TYPE_IPBNX2_RPM_RC_CNTL_0_HDR_TYPE_IP (1L<<13) bnx2.h 　
5800
 BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCPBNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP (2L<<13) bnx2.h 　
5801
 BNX2_RPM_RC_CNTL_0_HDR_TYPE_UDPBNX2_RPM_RC_CNTL_0_HDR_TYPE_UDP (3L<<13) bnx2.h 　
5802
 BNX2_RPM_RC_CNTL_0_HDR_TYPE_DATBNX2_RPM_RC_CNTL_0_HDR_TYPE_DAT (4L<<13) bnx2.h 　
5803
 BNX2_RPM_RC_CNTL_0_COMPBNX2_RPM_RC_CNTL_0_COMP (0x3L<<16) bnx2.h 　
5804
 BNX2_RPM_RC_CNTL_0_COMP_EQUALBNX2_RPM_RC_CNTL_0_COMP_EQUAL (0L<<16) bnx2.h 　
5805
 BNX2_RPM_RC_CNTL_0_COMP_NEQUALBNX2_RPM_RC_CNTL_0_COMP_NEQUAL (1L<<16) bnx2.h 　
5806
 BNX2_RPM_RC_CNTL_0_COMP_GREATERBNX2_RPM_RC_CNTL_0_COMP_GREATER (2L<<16) bnx2.h 　
5807
 BNX2_RPM_RC_CNTL_0_COMP_LESSBNX2_RPM_RC_CNTL_0_COMP_LESS (3L<<16) bnx2.h 　
5808
 BNX2_RPM_RC_CNTL_0_SBITBNX2_RPM_RC_CNTL_0_SBIT (1L<<19) bnx2.h 　
5809
 BNX2_RPM_RC_CNTL_0_CMDSELBNX2_RPM_RC_CNTL_0_CMDSEL (0xfL<<20) bnx2.h 　
5810
 BNX2_RPM_RC_CNTL_0_MAPBNX2_RPM_RC_CNTL_0_MAP (1L<<24) bnx2.h 　
5811
 BNX2_RPM_RC_CNTL_0_DISCARDBNX2_RPM_RC_CNTL_0_DISCARD (1L<<25) bnx2.h 　
5812
 BNX2_RPM_RC_CNTL_0_MASKBNX2_RPM_RC_CNTL_0_MASK (1L<<26) bnx2.h 　
5813
 BNX2_RPM_RC_CNTL_0_P1BNX2_RPM_RC_CNTL_0_P1 (1L<<27) bnx2.h 　
5814
 BNX2_RPM_RC_CNTL_0_P2BNX2_RPM_RC_CNTL_0_P2 (1L<<28) bnx2.h 　
5815
 BNX2_RPM_RC_CNTL_0_P3BNX2_RPM_RC_CNTL_0_P3 (1L<<29) bnx2.h 　
5816
 BNX2_RPM_RC_CNTL_0_NBITBNX2_RPM_RC_CNTL_0_NBIT (1L<<30) bnx2.h 　
5817
 BNX2_RPM_RC_VALUE_MASK_0BNX2_RPM_RC_VALUE_MASK_0 0x00001904 bnx2.h 　
5818
 BNX2_RPM_RC_VALUE_MASK_0_VALUEBNX2_RPM_RC_VALUE_MASK_0_VALUE (0xffffL<<0) bnx2.h 　
5819
 BNX2_RPM_RC_VALUE_MASK_0_MASKBNX2_RPM_RC_VALUE_MASK_0_MASK (0xffffL<<16) bnx2.h 　
5820
 BNX2_RPM_RC_CNTL_1BNX2_RPM_RC_CNTL_1 0x00001908 bnx2.h 　
5821
 BNX2_RPM_RC_CNTL_1_ABNX2_RPM_RC_CNTL_1_A (0x3ffffL<<0) bnx2.h 　
5822
 BNX2_RPM_RC_CNTL_1_BBNX2_RPM_RC_CNTL_1_B (0xfffL<<19) bnx2.h 　
5823
 BNX2_RPM_RC_VALUE_MASK_1BNX2_RPM_RC_VALUE_MASK_1 0x0000190c bnx2.h 　
5824
 BNX2_RPM_RC_CNTL_2BNX2_RPM_RC_CNTL_2 0x00001910 bnx2.h 　
5825
 BNX2_RPM_RC_CNTL_2_ABNX2_RPM_RC_CNTL_2_A (0x3ffffL<<0) bnx2.h 　
5826
 BNX2_RPM_RC_CNTL_2_BBNX2_RPM_RC_CNTL_2_B (0xfffL<<19) bnx2.h 　
5827
 BNX2_RPM_RC_VALUE_MASK_2BNX2_RPM_RC_VALUE_MASK_2 0x00001914 bnx2.h 　
5828
 BNX2_RPM_RC_CNTL_3BNX2_RPM_RC_CNTL_3 0x00001918 bnx2.h 　
5829
 BNX2_RPM_RC_CNTL_3_ABNX2_RPM_RC_CNTL_3_A (0x3ffffL<<0) bnx2.h 　
5830
 BNX2_RPM_RC_CNTL_3_BBNX2_RPM_RC_CNTL_3_B (0xfffL<<19) bnx2.h 　
5831
 BNX2_RPM_RC_VALUE_MASK_3BNX2_RPM_RC_VALUE_MASK_3 0x0000191c bnx2.h 　
5832
 BNX2_RPM_RC_CNTL_4BNX2_RPM_RC_CNTL_4 0x00001920 bnx2.h 　
5833
 BNX2_RPM_RC_CNTL_4_ABNX2_RPM_RC_CNTL_4_A (0x3ffffL<<0) bnx2.h 　
5834
 BNX2_RPM_RC_CNTL_4_BBNX2_RPM_RC_CNTL_4_B (0xfffL<<19) bnx2.h 　
5835
 BNX2_RPM_RC_VALUE_MASK_4BNX2_RPM_RC_VALUE_MASK_4 0x00001924 bnx2.h 　
5836
 BNX2_RPM_RC_CNTL_5BNX2_RPM_RC_CNTL_5 0x00001928 bnx2.h 　
5837
 BNX2_RPM_RC_CNTL_5_ABNX2_RPM_RC_CNTL_5_A (0x3ffffL<<0) bnx2.h 　
5838
 BNX2_RPM_RC_CNTL_5_BBNX2_RPM_RC_CNTL_5_B (0xfffL<<19) bnx2.h 　
5839
 BNX2_RPM_RC_VALUE_MASK_5BNX2_RPM_RC_VALUE_MASK_5 0x0000192c bnx2.h 　
5840
 BNX2_RPM_RC_CNTL_6BNX2_RPM_RC_CNTL_6 0x00001930 bnx2.h 　
5841
 BNX2_RPM_RC_CNTL_6_ABNX2_RPM_RC_CNTL_6_A (0x3ffffL<<0) bnx2.h 　
5842
 BNX2_RPM_RC_CNTL_6_BBNX2_RPM_RC_CNTL_6_B (0xfffL<<19) bnx2.h 　
5843
 BNX2_RPM_RC_VALUE_MASK_6BNX2_RPM_RC_VALUE_MASK_6 0x00001934 bnx2.h 　
5844
 BNX2_RPM_RC_CNTL_7BNX2_RPM_RC_CNTL_7 0x00001938 bnx2.h 　
5845
 BNX2_RPM_RC_CNTL_7_ABNX2_RPM_RC_CNTL_7_A (0x3ffffL<<0) bnx2.h 　
5846
 BNX2_RPM_RC_CNTL_7_BBNX2_RPM_RC_CNTL_7_B (0xfffL<<19) bnx2.h 　
5847
 BNX2_RPM_RC_VALUE_MASK_7BNX2_RPM_RC_VALUE_MASK_7 0x0000193c bnx2.h 　
5848
 BNX2_RPM_RC_CNTL_8BNX2_RPM_RC_CNTL_8 0x00001940 bnx2.h 　
5849
 BNX2_RPM_RC_CNTL_8_ABNX2_RPM_RC_CNTL_8_A (0x3ffffL<<0) bnx2.h 　
5850
 BNX2_RPM_RC_CNTL_8_BBNX2_RPM_RC_CNTL_8_B (0xfffL<<19) bnx2.h 　
5851
 BNX2_RPM_RC_VALUE_MASK_8BNX2_RPM_RC_VALUE_MASK_8 0x00001944 bnx2.h 　
5852
 BNX2_RPM_RC_CNTL_9BNX2_RPM_RC_CNTL_9 0x00001948 bnx2.h 　
5853
 BNX2_RPM_RC_CNTL_9_ABNX2_RPM_RC_CNTL_9_A (0x3ffffL<<0) bnx2.h 　
5854
 BNX2_RPM_RC_CNTL_9_BBNX2_RPM_RC_CNTL_9_B (0xfffL<<19) bnx2.h 　
5855
 BNX2_RPM_RC_VALUE_MASK_9BNX2_RPM_RC_VALUE_MASK_9 0x0000194c bnx2.h 　
5856
 BNX2_RPM_RC_CNTL_10BNX2_RPM_RC_CNTL_10 0x00001950 bnx2.h 　
5857
 BNX2_RPM_RC_CNTL_10_ABNX2_RPM_RC_CNTL_10_A (0x3ffffL<<0) bnx2.h 　
5858
 BNX2_RPM_RC_CNTL_10_BBNX2_RPM_RC_CNTL_10_B (0xfffL<<19) bnx2.h 　
5859
 BNX2_RPM_RC_VALUE_MASK_10BNX2_RPM_RC_VALUE_MASK_10 0x00001954 bnx2.h 　
5860
 BNX2_RPM_RC_CNTL_11BNX2_RPM_RC_CNTL_11 0x00001958 bnx2.h 　
5861
 BNX2_RPM_RC_CNTL_11_ABNX2_RPM_RC_CNTL_11_A (0x3ffffL<<0) bnx2.h 　
5862
 BNX2_RPM_RC_CNTL_11_BBNX2_RPM_RC_CNTL_11_B (0xfffL<<19) bnx2.h 　
5863
 BNX2_RPM_RC_VALUE_MASK_11BNX2_RPM_RC_VALUE_MASK_11 0x0000195c bnx2.h 　
5864
 BNX2_RPM_RC_CNTL_12BNX2_RPM_RC_CNTL_12 0x00001960 bnx2.h 　
5865
 BNX2_RPM_RC_CNTL_12_ABNX2_RPM_RC_CNTL_12_A (0x3ffffL<<0) bnx2.h 　
5866
 BNX2_RPM_RC_CNTL_12_BBNX2_RPM_RC_CNTL_12_B (0xfffL<<19) bnx2.h 　
5867
 BNX2_RPM_RC_VALUE_MASK_12BNX2_RPM_RC_VALUE_MASK_12 0x00001964 bnx2.h 　
5868
 BNX2_RPM_RC_CNTL_13BNX2_RPM_RC_CNTL_13 0x00001968 bnx2.h 　
5869
 BNX2_RPM_RC_CNTL_13_ABNX2_RPM_RC_CNTL_13_A (0x3ffffL<<0) bnx2.h 　
5870
 BNX2_RPM_RC_CNTL_13_BBNX2_RPM_RC_CNTL_13_B (0xfffL<<19) bnx2.h 　
5871
 BNX2_RPM_RC_VALUE_MASK_13BNX2_RPM_RC_VALUE_MASK_13 0x0000196c bnx2.h 　
5872
 BNX2_RPM_RC_CNTL_14BNX2_RPM_RC_CNTL_14 0x00001970 bnx2.h 　
5873
 BNX2_RPM_RC_CNTL_14_ABNX2_RPM_RC_CNTL_14_A (0x3ffffL<<0) bnx2.h 　
5874
 BNX2_RPM_RC_CNTL_14_BBNX2_RPM_RC_CNTL_14_B (0xfffL<<19) bnx2.h 　
5875
 BNX2_RPM_RC_VALUE_MASK_14BNX2_RPM_RC_VALUE_MASK_14 0x00001974 bnx2.h 　
5876
 BNX2_RPM_RC_CNTL_15BNX2_RPM_RC_CNTL_15 0x00001978 bnx2.h 　
5877
 BNX2_RPM_RC_CNTL_15_ABNX2_RPM_RC_CNTL_15_A (0x3ffffL<<0) bnx2.h 　
5878
 BNX2_RPM_RC_CNTL_15_BBNX2_RPM_RC_CNTL_15_B (0xfffL<<19) bnx2.h 　
5879
 BNX2_RPM_RC_VALUE_MASK_15BNX2_RPM_RC_VALUE_MASK_15 0x0000197c bnx2.h 　
5880
 BNX2_RPM_RC_CONFIGBNX2_RPM_RC_CONFIG 0x00001980 bnx2.h 　
5881
 BNX2_RPM_RC_CONFIG_RULE_ENABLEBNX2_RPM_RC_CONFIG_RULE_ENABLE (0xffffL<<0) bnx2.h 　
5882
 BNX2_RPM_RC_CONFIG_DEF_CLASSBNX2_RPM_RC_CONFIG_DEF_CLASS (0x7L<<24) bnx2.h 　
5883
 BNX2_RPM_DEBUG0BNX2_RPM_DEBUG0 0x00001984 bnx2.h 　
5884
 BNX2_RPM_DEBUG0_FM_BCNTBNX2_RPM_DEBUG0_FM_BCNT (0xffffL<<0) bnx2.h 　
5885
 BNX2_RPM_DEBUG0_T_DATA_OFST_VLDBNX2_RPM_DEBUG0_T_DATA_OFST_VLD (1L<<16) bnx2.h 　
5886
 BNX2_RPM_DEBUG0_T_UDP_OFST_VLDBNX2_RPM_DEBUG0_T_UDP_OFST_VLD (1L<<17) bnx2.h 　
5887
 BNX2_RPM_DEBUG0_T_TCP_OFST_VLDBNX2_RPM_DEBUG0_T_TCP_OFST_VLD (1L<<18) bnx2.h 　
5888
 BNX2_RPM_DEBUG0_T_IP_OFST_VLDBNX2_RPM_DEBUG0_T_IP_OFST_VLD (1L<<19) bnx2.h 　
5889
 BNX2_RPM_DEBUG0_IP_MORE_FRGMTBNX2_RPM_DEBUG0_IP_MORE_FRGMT (1L<<20) bnx2.h 　
5890
 BNX2_RPM_DEBUG0_T_IP_NO_TCP_UDPBNX2_RPM_DEBUG0_T_IP_NO_TCP_UDP (1L<<21) bnx2.h 　
5891
 BNX2_RPM_DEBUG0_LLC_SNAPBNX2_RPM_DEBUG0_LLC_SNAP (1L<<22) bnx2.h 　
5892
 BNX2_RPM_DEBUG0_FM_STARTEDBNX2_RPM_DEBUG0_FM_STARTED (1L<<23) bnx2.h 　
5893
 BNX2_RPM_DEBUG0_DONEBNX2_RPM_DEBUG0_DONE (1L<<24) bnx2.h 　
5894
 BNX2_RPM_DEBUG0_WAIT_4_DONEBNX2_RPM_DEBUG0_WAIT_4_DONE (1L<<25) bnx2.h 　
5895
 BNX2_RPM_DEBUG0_USE_TPBUF_CKSUMBNX2_RPM_DEBUG0_USE_TPBUF_CKSUM (1L<<26) bnx2.h 　
5896
 BNX2_RPM_DEBUG0_RX_NO_PSD_HDR_CBNX2_RPM_DEBUG0_RX_NO_PSD_HDR_C (1L<<27) bnx2.h 　
5897
 BNX2_RPM_DEBUG0_IGNORE_VLANBNX2_RPM_DEBUG0_IGNORE_VLAN (1L<<28) bnx2.h 　
5898
 BNX2_RPM_DEBUG0_RP_ENA_ACTIVEBNX2_RPM_DEBUG0_RP_ENA_ACTIVE (1L<<31) bnx2.h 　
5899
 BNX2_RPM_DEBUG1BNX2_RPM_DEBUG1 0x00001988 bnx2.h 　
5900
 BNX2_RPM_DEBUG1_FSM_CUR_STBNX2_RPM_DEBUG1_FSM_CUR_ST (0xffffL<<0) bnx2.h 　
5901
 BNX2_RPM_DEBUG1_FSM_CUR_ST_IDLEBNX2_RPM_DEBUG1_FSM_CUR_ST_IDLE (0L<<0) bnx2.h 　
5902
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPBNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP (1L<<0) bnx2.h 　
5903
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPBNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP (2L<<0) bnx2.h 　
5904
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPBNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP (4L<<0) bnx2.h 　
5905
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPBNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP (8L<<0) bnx2.h 　
5906
 BNX2_RPM_DEBUG1_FSM_CUR_ST_IP_SBNX2_RPM_DEBUG1_FSM_CUR_ST_IP_S (16L<<0) bnx2.h 　
5907
 BNX2_RPM_DEBUG1_FSM_CUR_ST_IPBNX2_RPM_DEBUG1_FSM_CUR_ST_IP (32L<<0) bnx2.h 　
5908
 BNX2_RPM_DEBUG1_FSM_CUR_ST_TCPBNX2_RPM_DEBUG1_FSM_CUR_ST_TCP (64L<<0) bnx2.h 　
5909
 BNX2_RPM_DEBUG1_FSM_CUR_ST_UDPBNX2_RPM_DEBUG1_FSM_CUR_ST_UDP (128L<<0) bnx2.h 　
5910
 BNX2_RPM_DEBUG1_FSM_CUR_ST_AHBNX2_RPM_DEBUG1_FSM_CUR_ST_AH (256L<<0) bnx2.h 　
5911
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ESPBNX2_RPM_DEBUG1_FSM_CUR_ST_ESP (512L<<0) bnx2.h 　
5912
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_ (1024L<<0) bnx2.h 　
5913
 BNX2_RPM_DEBUG1_FSM_CUR_ST_DATABNX2_RPM_DEBUG1_FSM_CUR_ST_DATA (2048L<<0) bnx2.h 　
5914
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_ (0x2000L<<0) bnx2.h 　
5915
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_ (0x4000L<<0) bnx2.h 　
5916
 BNX2_RPM_DEBUG1_FSM_CUR_ST_LATCBNX2_RPM_DEBUG1_FSM_CUR_ST_LATC (0x8000L<<0) bnx2.h 　
5917
 BNX2_RPM_DEBUG1_HDR_BCNTBNX2_RPM_DEBUG1_HDR_BCNT (0x7ffL<<16) bnx2.h 　
5918
 BNX2_RPM_DEBUG1_UNKNOWN_ETYPE_DBNX2_RPM_DEBUG1_UNKNOWN_ETYPE_D (1L<<28) bnx2.h 　
5919
 BNX2_RPM_DEBUG1_VLAN_REMOVED_D2BNX2_RPM_DEBUG1_VLAN_REMOVED_D2 (1L<<29) bnx2.h 　
5920
 BNX2_RPM_DEBUG1_VLAN_REMOVED_D1BNX2_RPM_DEBUG1_VLAN_REMOVED_D1 (1L<<30) bnx2.h 　
5921
 BNX2_RPM_DEBUG1_EOF_0XTRA_WDBNX2_RPM_DEBUG1_EOF_0XTRA_WD (1L<<31) bnx2.h 　
5922
 BNX2_RPM_DEBUG2BNX2_RPM_DEBUG2 0x0000198c bnx2.h 　
5923
 BNX2_RPM_DEBUG2_CMD_HIT_VECBNX2_RPM_DEBUG2_CMD_HIT_VEC (0xffffL<<0) bnx2.h 　
5924
 BNX2_RPM_DEBUG2_IP_BCNTBNX2_RPM_DEBUG2_IP_BCNT (0xffL<<16) bnx2.h 　
5925
 BNX2_RPM_DEBUG2_THIS_CMD_M4BNX2_RPM_DEBUG2_THIS_CMD_M4 (1L<<24) bnx2.h 　
5926
 BNX2_RPM_DEBUG2_THIS_CMD_M3BNX2_RPM_DEBUG2_THIS_CMD_M3 (1L<<25) bnx2.h 　
5927
 BNX2_RPM_DEBUG2_THIS_CMD_M2BNX2_RPM_DEBUG2_THIS_CMD_M2 (1L<<26) bnx2.h 　
5928
 BNX2_RPM_DEBUG2_THIS_CMD_M1BNX2_RPM_DEBUG2_THIS_CMD_M1 (1L<<27) bnx2.h 　
5929
 BNX2_RPM_DEBUG2_IPIPE_EMPTYBNX2_RPM_DEBUG2_IPIPE_EMPTY (1L<<28) bnx2.h 　
5930
 BNX2_RPM_DEBUG2_FM_DISCARDBNX2_RPM_DEBUG2_FM_DISCARD (1L<<29) bnx2.h 　
5931
 BNX2_RPM_DEBUG2_LAST_RULE_IN_FMBNX2_RPM_DEBUG2_LAST_RULE_IN_FM (1L<<30) bnx2.h 　
5932
 BNX2_RPM_DEBUG2_LAST_RULE_IN_FMBNX2_RPM_DEBUG2_LAST_RULE_IN_FM (1L<<31) bnx2.h 　
5933
 BNX2_RPM_DEBUG3BNX2_RPM_DEBUG3 0x00001990 bnx2.h 　
5934
 BNX2_RPM_DEBUG3_AVAIL_MBUF_PTRBNX2_RPM_DEBUG3_AVAIL_MBUF_PTR (0x1ffL<<0) bnx2.h 　
5935
 BNX2_RPM_DEBUG3_RDE_RLUPQ_WR_REBNX2_RPM_DEBUG3_RDE_RLUPQ_WR_RE (1L<<9) bnx2.h 　
5936
 BNX2_RPM_DEBUG3_RDE_RBUF_WR_LASBNX2_RPM_DEBUG3_RDE_RBUF_WR_LAS (1L<<10) bnx2.h 　
5937
 BNX2_RPM_DEBUG3_RDE_RBUF_WR_REQBNX2_RPM_DEBUG3_RDE_RBUF_WR_REQ (1L<<11) bnx2.h 　
5938
 BNX2_RPM_DEBUG3_RDE_RBUF_FREE_RBNX2_RPM_DEBUG3_RDE_RBUF_FREE_R (1L<<12) bnx2.h 　
5939
 BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_ (1L<<13) bnx2.h 　
5940
 BNX2_RPM_DEBUG3_DFSM_MBUF_NOTAVBNX2_RPM_DEBUG3_DFSM_MBUF_NOTAV (1L<<14) bnx2.h 　
5941
 BNX2_RPM_DEBUG3_RBUF_RDE_SOF_DRBNX2_RPM_DEBUG3_RBUF_RDE_SOF_DR (1L<<15) bnx2.h 　
5942
 BNX2_RPM_DEBUG3_DFIFO_VLD_ENTRYBNX2_RPM_DEBUG3_DFIFO_VLD_ENTRY (0xfL<<16) bnx2.h 　
5943
 BNX2_RPM_DEBUG3_RDE_SRC_FIFO_ALBNX2_RPM_DEBUG3_RDE_SRC_FIFO_AL (1L<<21) bnx2.h 　
5944
 BNX2_RPM_DEBUG3_DROP_NXT_VLDBNX2_RPM_DEBUG3_DROP_NXT_VLD (1L<<22) bnx2.h 　
5945
 BNX2_RPM_DEBUG3_DROP_NXTBNX2_RPM_DEBUG3_DROP_NXT (1L<<23) bnx2.h 　
5946
 BNX2_RPM_DEBUG3_FTQ_FSMBNX2_RPM_DEBUG3_FTQ_FSM (0x3L<<24) bnx2.h 　
5947
 BNX2_RPM_DEBUG3_FTQ_FSM_IDLEBNX2_RPM_DEBUG3_FTQ_FSM_IDLE (0x0L<<24) bnx2.h 　
5948
 BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_ACBNX2_RPM_DEBUG3_FTQ_FSM_WAIT_AC (0x1L<<24) bnx2.h 　
5949
 BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FRBNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FR (0x2L<<24) bnx2.h 　
5950
 BNX2_RPM_DEBUG3_MBWRITE_FSMBNX2_RPM_DEBUG3_MBWRITE_FSM (0x3L<<26) bnx2.h 　
5951
 BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIBNX2_RPM_DEBUG3_MBWRITE_FSM_WAI (0x0L<<26) bnx2.h 　
5952
 BNX2_RPM_DEBUG3_MBWRITE_FSM_GETBNX2_RPM_DEBUG3_MBWRITE_FSM_GET (0x1L<<26) bnx2.h 　
5953
 BNX2_RPM_DEBUG3_MBWRITE_FSM_DMABNX2_RPM_DEBUG3_MBWRITE_FSM_DMA (0x2L<<26) bnx2.h 　
5954
 BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIBNX2_RPM_DEBUG3_MBWRITE_FSM_WAI (0x3L<<26) bnx2.h 　
5955
 BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIBNX2_RPM_DEBUG3_MBWRITE_FSM_WAI (0x4L<<26) bnx2.h 　
5956
 BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIBNX2_RPM_DEBUG3_MBWRITE_FSM_WAI (0x5L<<26) bnx2.h 　
5957
 BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIBNX2_RPM_DEBUG3_MBWRITE_FSM_WAI (0x6L<<26) bnx2.h 　
5958
 BNX2_RPM_DEBUG3_MBWRITE_FSM_DONBNX2_RPM_DEBUG3_MBWRITE_FSM_DON (0x7L<<26) bnx2.h 　
5959
 BNX2_RPM_DEBUG3_MBFREE_FSMBNX2_RPM_DEBUG3_MBFREE_FSM (1L<<29) bnx2.h 　
5960
 BNX2_RPM_DEBUG3_MBFREE_FSM_IDLEBNX2_RPM_DEBUG3_MBFREE_FSM_IDLE (0L<<29) bnx2.h 　
5961
 BNX2_RPM_DEBUG3_MBFREE_FSM_WAITBNX2_RPM_DEBUG3_MBFREE_FSM_WAIT (1L<<29) bnx2.h 　
5962
 BNX2_RPM_DEBUG3_MBALLOC_FSMBNX2_RPM_DEBUG3_MBALLOC_FSM (1L<<30) bnx2.h 　
5963
 BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_ (0x0L<<30) bnx2.h 　
5964
 BNX2_RPM_DEBUG3_MBALLOC_FSM_IVEBNX2_RPM_DEBUG3_MBALLOC_FSM_IVE (0x1L<<30) bnx2.h 　
5965
 BNX2_RPM_DEBUG3_CCODE_EOF_ERRORBNX2_RPM_DEBUG3_CCODE_EOF_ERROR (1L<<31) bnx2.h 　
5966
 BNX2_RPM_DEBUG4BNX2_RPM_DEBUG4 0x00001994 bnx2.h 　
5967
 BNX2_RPM_DEBUG4_DFSM_MBUF_CLUSTBNX2_RPM_DEBUG4_DFSM_MBUF_CLUST (0x1ffffffL<<0) bnx2.h 　
5968
 BNX2_RPM_DEBUG4_DFIFO_CUR_CCODEBNX2_RPM_DEBUG4_DFIFO_CUR_CCODE (0x7L<<25) bnx2.h 　
5969
 BNX2_RPM_DEBUG4_MBWRITE_FSMBNX2_RPM_DEBUG4_MBWRITE_FSM (0x7L<<28) bnx2.h 　
5970
 BNX2_RPM_DEBUG4_DFIFO_EMPTYBNX2_RPM_DEBUG4_DFIFO_EMPTY (1L<<31) bnx2.h 　
5971
 BNX2_RPM_DEBUG5BNX2_RPM_DEBUG5 0x00001998 bnx2.h 　
5972
 BNX2_RPM_DEBUG5_RDROP_WPTRBNX2_RPM_DEBUG5_RDROP_WPTR (0x1fL<<0) bnx2.h 　
5973
 BNX2_RPM_DEBUG5_RDROP_ACPI_RPTRBNX2_RPM_DEBUG5_RDROP_ACPI_RPTR (0x1fL<<5) bnx2.h 　
5974
 BNX2_RPM_DEBUG5_RDROP_MC_RPTRBNX2_RPM_DEBUG5_RDROP_MC_RPTR (0x1fL<<10) bnx2.h 　
5975
 BNX2_RPM_DEBUG5_RDROP_RC_RPTRBNX2_RPM_DEBUG5_RDROP_RC_RPTR (0x1fL<<15) bnx2.h 　
5976
 BNX2_RPM_DEBUG5_RDROP_ACPI_EMPTBNX2_RPM_DEBUG5_RDROP_ACPI_EMPT (1L<<20) bnx2.h 　
5977
 BNX2_RPM_DEBUG5_RDROP_MC_EMPTYBNX2_RPM_DEBUG5_RDROP_MC_EMPTY (1L<<21) bnx2.h 　
5978
 BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_ (1L<<22) bnx2.h 　
5979
 BNX2_RPM_DEBUG5_HOLDREG_WOL_DROBNX2_RPM_DEBUG5_HOLDREG_WOL_DRO (1L<<23) bnx2.h 　
5980
 BNX2_RPM_DEBUG5_HOLDREG_DISCARDBNX2_RPM_DEBUG5_HOLDREG_DISCARD (1L<<24) bnx2.h 　
5981
 BNX2_RPM_DEBUG5_HOLDREG_MBUF_NOBNX2_RPM_DEBUG5_HOLDREG_MBUF_NO (1L<<25) bnx2.h 　
5982
 BNX2_RPM_DEBUG5_HOLDREG_MC_EMPTBNX2_RPM_DEBUG5_HOLDREG_MC_EMPT (1L<<26) bnx2.h 　
5983
 BNX2_RPM_DEBUG5_HOLDREG_RC_EMPTBNX2_RPM_DEBUG5_HOLDREG_RC_EMPT (1L<<27) bnx2.h 　
5984
 BNX2_RPM_DEBUG5_HOLDREG_FC_EMPTBNX2_RPM_DEBUG5_HOLDREG_FC_EMPT (1L<<28) bnx2.h 　
5985
 BNX2_RPM_DEBUG5_HOLDREG_ACPI_EMBNX2_RPM_DEBUG5_HOLDREG_ACPI_EM (1L<<29) bnx2.h 　
5986
 BNX2_RPM_DEBUG5_HOLDREG_FULL_TBNX2_RPM_DEBUG5_HOLDREG_FULL_T (1L<<30) bnx2.h 　
5987
 BNX2_RPM_DEBUG5_HOLDREG_RDBNX2_RPM_DEBUG5_HOLDREG_RD (1L<<31) bnx2.h 　
5988
 BNX2_RPM_DEBUG6BNX2_RPM_DEBUG6 0x0000199c bnx2.h 　
5989
 BNX2_RPM_DEBUG6_ACPI_VECBNX2_RPM_DEBUG6_ACPI_VEC (0xffffL<<0) bnx2.h 　
5990
 BNX2_RPM_DEBUG6_VECBNX2_RPM_DEBUG6_VEC (0xffffL<<16) bnx2.h 　
5991
 BNX2_RPM_DEBUG7BNX2_RPM_DEBUG7 0x000019a0 bnx2.h 　
5992
 BNX2_RPM_DEBUG7_RPM_DBG7_LAST_CBNX2_RPM_DEBUG7_RPM_DBG7_LAST_C (0xffffffffL<<0) bnx2.h 　
5993
 BNX2_RPM_DEBUG8BNX2_RPM_DEBUG8 0x000019a4 bnx2.h 　
5994
 BNX2_RPM_DEBUG8_PS_ACPI_FSMBNX2_RPM_DEBUG8_PS_ACPI_FSM (0xfL<<0) bnx2.h 　
5995
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_IDLBNX2_RPM_DEBUG8_PS_ACPI_FSM_IDL (0L<<0) bnx2.h 　
5996
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOFBNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF (1L<<0) bnx2.h 　
5997
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOFBNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF (2L<<0) bnx2.h 　
5998
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOFBNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF (3L<<0) bnx2.h 　
5999
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOFBNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF (4L<<0) bnx2.h 　
6000
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_ (5L<<0) bnx2.h 　
6001
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_ (6L<<0) bnx2.h 　
6002
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_ (7L<<0) bnx2.h 　
6003
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_ (8L<<0) bnx2.h 　
6004
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_ (9L<<0) bnx2.h 　
6005
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_WAIBNX2_RPM_DEBUG8_PS_ACPI_FSM_WAI (10L<<0) bnx2.h 　
6006
 BNX2_RPM_DEBUG8_COMPARE_AT_W0BNX2_RPM_DEBUG8_COMPARE_AT_W0 (1L<<4) bnx2.h 　
6007
 BNX2_RPM_DEBUG8_COMPARE_AT_W3_DBNX2_RPM_DEBUG8_COMPARE_AT_W3_D (1L<<5) bnx2.h 　
6008
 BNX2_RPM_DEBUG8_COMPARE_AT_SOF_BNX2_RPM_DEBUG8_COMPARE_AT_SOF_ (1L<<6) bnx2.h 　
6009
 BNX2_RPM_DEBUG8_COMPARE_AT_SOF_BNX2_RPM_DEBUG8_COMPARE_AT_SOF_ (1L<<7) bnx2.h 　
6010
 BNX2_RPM_DEBUG8_COMPARE_AT_SOF_BNX2_RPM_DEBUG8_COMPARE_AT_SOF_ (1L<<8) bnx2.h 　
6011
 BNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLDBNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLD (1L<<9) bnx2.h 　
6012
 BNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLDBNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLD (1L<<10) bnx2.h 　
6013
 BNX2_RPM_DEBUG8_NXT_EOF_W_12_VLBNX2_RPM_DEBUG8_NXT_EOF_W_12_VL (1L<<11) bnx2.h 　
6014
 BNX2_RPM_DEBUG8_EOF_DETBNX2_RPM_DEBUG8_EOF_DET (1L<<12) bnx2.h 　
6015
 BNX2_RPM_DEBUG8_SOF_DETBNX2_RPM_DEBUG8_SOF_DET (1L<<13) bnx2.h 　
6016
 BNX2_RPM_DEBUG8_WAIT_4_SOFBNX2_RPM_DEBUG8_WAIT_4_SOF (1L<<14) bnx2.h 　
6017
 BNX2_RPM_DEBUG8_ALL_DONEBNX2_RPM_DEBUG8_ALL_DONE (1L<<15) bnx2.h 　
6018
 BNX2_RPM_DEBUG8_THBUF_ADDRBNX2_RPM_DEBUG8_THBUF_ADDR (0x7fL<<16) bnx2.h 　
6019
 BNX2_RPM_DEBUG8_BYTE_CTRBNX2_RPM_DEBUG8_BYTE_CTR (0xffL<<24) bnx2.h 　
6020
 BNX2_RPM_DEBUG9BNX2_RPM_DEBUG9 0x000019a8 bnx2.h 　
6021
 BNX2_RPM_DEBUG9_OUTFIFO_COUNTBNX2_RPM_DEBUG9_OUTFIFO_COUNT (0x7L<<0) bnx2.h 　
6022
 BNX2_RPM_DEBUG9_RDE_ACPI_RDYBNX2_RPM_DEBUG9_RDE_ACPI_RDY (1L<<3) bnx2.h 　
6023
 BNX2_RPM_DEBUG9_VLD_RD_ENTRY_CTBNX2_RPM_DEBUG9_VLD_RD_ENTRY_CT (0x7L<<4) bnx2.h 　
6024
 BNX2_RPM_DEBUG9_OUTFIFO_OVERRUNBNX2_RPM_DEBUG9_OUTFIFO_OVERRUN (1L<<28) bnx2.h 　
6025
 BNX2_RPM_DEBUG9_INFIFO_OVERRUN_BNX2_RPM_DEBUG9_INFIFO_OVERRUN_ (1L<<29) bnx2.h 　
6026
 BNX2_RPM_DEBUG9_ACPI_MATCH_INTBNX2_RPM_DEBUG9_ACPI_MATCH_INT (1L<<30) bnx2.h 　
6027
 BNX2_RPM_DEBUG9_ACPI_ENABLE_SYNBNX2_RPM_DEBUG9_ACPI_ENABLE_SYN (1L<<31) bnx2.h 　
6028
 BNX2_RPM_ACPI_DBG_BUF_W00BNX2_RPM_ACPI_DBG_BUF_W00 0x000019c0 bnx2.h 　
6029
 BNX2_RPM_ACPI_DBG_BUF_W01BNX2_RPM_ACPI_DBG_BUF_W01 0x000019c4 bnx2.h 　
6030
 BNX2_RPM_ACPI_DBG_BUF_W02BNX2_RPM_ACPI_DBG_BUF_W02 0x000019c8 bnx2.h 　
6031
 BNX2_RPM_ACPI_DBG_BUF_W03BNX2_RPM_ACPI_DBG_BUF_W03 0x000019cc bnx2.h 　
6032
 BNX2_RPM_ACPI_DBG_BUF_W10BNX2_RPM_ACPI_DBG_BUF_W10 0x000019d0 bnx2.h 　
6033
 BNX2_RPM_ACPI_DBG_BUF_W11BNX2_RPM_ACPI_DBG_BUF_W11 0x000019d4 bnx2.h 　
6034
 BNX2_RPM_ACPI_DBG_BUF_W12BNX2_RPM_ACPI_DBG_BUF_W12 0x000019d8 bnx2.h 　
6035
 BNX2_RPM_ACPI_DBG_BUF_W13BNX2_RPM_ACPI_DBG_BUF_W13 0x000019dc bnx2.h 　
6036
 BNX2_RPM_ACPI_DBG_BUF_W20BNX2_RPM_ACPI_DBG_BUF_W20 0x000019e0 bnx2.h 　
6037
 BNX2_RPM_ACPI_DBG_BUF_W21BNX2_RPM_ACPI_DBG_BUF_W21 0x000019e4 bnx2.h 　
6038
 BNX2_RPM_ACPI_DBG_BUF_W22BNX2_RPM_ACPI_DBG_BUF_W22 0x000019e8 bnx2.h 　
6039
 BNX2_RPM_ACPI_DBG_BUF_W23BNX2_RPM_ACPI_DBG_BUF_W23 0x000019ec bnx2.h 　
6040
 BNX2_RPM_ACPI_DBG_BUF_W30BNX2_RPM_ACPI_DBG_BUF_W30 0x000019f0 bnx2.h 　
6041
 BNX2_RPM_ACPI_DBG_BUF_W31BNX2_RPM_ACPI_DBG_BUF_W31 0x000019f4 bnx2.h 　
6042
 BNX2_RPM_ACPI_DBG_BUF_W32BNX2_RPM_ACPI_DBG_BUF_W32 0x000019f8 bnx2.h 　
6043
 BNX2_RPM_ACPI_DBG_BUF_W33BNX2_RPM_ACPI_DBG_BUF_W33 0x000019fc bnx2.h 　
6044
 BNX2_RBUF_COMMANDBNX2_RBUF_COMMAND 0x00200000 bnx2.h 　
6045
 BNX2_RBUF_COMMAND_ENABLEDBNX2_RBUF_COMMAND_ENABLED (1L<<0) bnx2.h 　
6046
 BNX2_RBUF_COMMAND_FREE_INITBNX2_RBUF_COMMAND_FREE_INIT (1L<<1) bnx2.h 　
6047
 BNX2_RBUF_COMMAND_RAM_INITBNX2_RBUF_COMMAND_RAM_INIT (1L<<2) bnx2.h 　
6048
 BNX2_RBUF_COMMAND_OVER_FREEBNX2_RBUF_COMMAND_OVER_FREE (1L<<4) bnx2.h 　
6049
 BNX2_RBUF_COMMAND_ALLOC_REQBNX2_RBUF_COMMAND_ALLOC_REQ (1L<<5) bnx2.h 　
6050
 BNX2_RBUF_STATUS1BNX2_RBUF_STATUS1 0x00200004 bnx2.h 　
6051
 BNX2_RBUF_STATUS1_FREE_COUNTBNX2_RBUF_STATUS1_FREE_COUNT (0x3ffL<<0) bnx2.h 　
6052
 BNX2_RBUF_STATUS2BNX2_RBUF_STATUS2 0x00200008 bnx2.h 　
6053
 BNX2_RBUF_STATUS2_FREE_TAILBNX2_RBUF_STATUS2_FREE_TAIL (0x3ffL<<0) bnx2.h 　
6054
 BNX2_RBUF_STATUS2_FREE_HEADBNX2_RBUF_STATUS2_FREE_HEAD (0x3ffL<<16) bnx2.h 　
6055
 BNX2_RBUF_CONFIGBNX2_RBUF_CONFIG 0x0020000c bnx2.h 　
6056
 BNX2_RBUF_CONFIG_XOFF_TRIPBNX2_RBUF_CONFIG_XOFF_TRIP (0x3ffL<<0) bnx2.h 　
6057
 BNX2_RBUF_CONFIG_XON_TRIPBNX2_RBUF_CONFIG_XON_TRIP (0x3ffL<<16) bnx2.h 　
6058
 BNX2_RBUF_FW_BUF_ALLOCBNX2_RBUF_FW_BUF_ALLOC 0x00200010 bnx2.h 　
6059
 BNX2_RBUF_FW_BUF_ALLOC_VALUEBNX2_RBUF_FW_BUF_ALLOC_VALUE (0x1ffL<<7) bnx2.h 　
6060
 BNX2_RBUF_FW_BUF_FREEBNX2_RBUF_FW_BUF_FREE 0x00200014 bnx2.h 　
6061
 BNX2_RBUF_FW_BUF_FREE_COUNTBNX2_RBUF_FW_BUF_FREE_COUNT (0x7fL<<0) bnx2.h 　
6062
 BNX2_RBUF_FW_BUF_FREE_TAILBNX2_RBUF_FW_BUF_FREE_TAIL (0x1ffL<<7) bnx2.h 　
6063
 BNX2_RBUF_FW_BUF_FREE_HEADBNX2_RBUF_FW_BUF_FREE_HEAD (0x1ffL<<16) bnx2.h 　
6064
 BNX2_RBUF_FW_BUF_SELBNX2_RBUF_FW_BUF_SEL 0x00200018 bnx2.h 　
6065
 BNX2_RBUF_FW_BUF_SEL_COUNTBNX2_RBUF_FW_BUF_SEL_COUNT (0x7fL<<0) bnx2.h 　
6066
 BNX2_RBUF_FW_BUF_SEL_TAILBNX2_RBUF_FW_BUF_SEL_TAIL (0x1ffL<<7) bnx2.h 　
6067
 BNX2_RBUF_FW_BUF_SEL_HEADBNX2_RBUF_FW_BUF_SEL_HEAD (0x1ffL<<16) bnx2.h 　
6068
 BNX2_RBUF_CONFIG2BNX2_RBUF_CONFIG2 0x0020001c bnx2.h 　
6069
 BNX2_RBUF_CONFIG2_MAC_DROP_TRIPBNX2_RBUF_CONFIG2_MAC_DROP_TRIP (0x3ffL<<0) bnx2.h 　
6070
 BNX2_RBUF_CONFIG2_MAC_KEEP_TRIPBNX2_RBUF_CONFIG2_MAC_KEEP_TRIP (0x3ffL<<16) bnx2.h 　
6071
 BNX2_RBUF_CONFIG3BNX2_RBUF_CONFIG3 0x00200020 bnx2.h 　
6072
 BNX2_RBUF_CONFIG3_CU_DROP_TRIPBNX2_RBUF_CONFIG3_CU_DROP_TRIP (0x3ffL<<0) bnx2.h 　
6073
 BNX2_RBUF_CONFIG3_CU_KEEP_TRIPBNX2_RBUF_CONFIG3_CU_KEEP_TRIP (0x3ffL<<16) bnx2.h 　
6074
 BNX2_RBUF_PKT_DATABNX2_RBUF_PKT_DATA 0x00208000 bnx2.h 　
6075
 BNX2_RBUF_CLIST_DATABNX2_RBUF_CLIST_DATA 0x00210000 bnx2.h 　
6076
 BNX2_RBUF_BUF_DATABNX2_RBUF_BUF_DATA 0x00220000 bnx2.h 　
6077
 BNX2_RV2P_COMMANDBNX2_RV2P_COMMAND 0x00002800 bnx2.h 　
6078
 BNX2_RV2P_COMMAND_ENABLEDBNX2_RV2P_COMMAND_ENABLED (1L<<0) bnx2.h 　
6079
 BNX2_RV2P_COMMAND_PROC1_INTRPTBNX2_RV2P_COMMAND_PROC1_INTRPT (1L<<1) bnx2.h 　
6080
 BNX2_RV2P_COMMAND_PROC2_INTRPTBNX2_RV2P_COMMAND_PROC2_INTRPT (1L<<2) bnx2.h 　
6081
 BNX2_RV2P_COMMAND_ABORT0BNX2_RV2P_COMMAND_ABORT0 (1L<<4) bnx2.h 　
6082
 BNX2_RV2P_COMMAND_ABORT1BNX2_RV2P_COMMAND_ABORT1 (1L<<5) bnx2.h 　
6083
 BNX2_RV2P_COMMAND_ABORT2BNX2_RV2P_COMMAND_ABORT2 (1L<<6) bnx2.h 　
6084
 BNX2_RV2P_COMMAND_ABORT3BNX2_RV2P_COMMAND_ABORT3 (1L<<7) bnx2.h 　
6085
 BNX2_RV2P_COMMAND_ABORT4BNX2_RV2P_COMMAND_ABORT4 (1L<<8) bnx2.h 　
6086
 BNX2_RV2P_COMMAND_ABORT5BNX2_RV2P_COMMAND_ABORT5 (1L<<9) bnx2.h 　
6087
 BNX2_RV2P_COMMAND_PROC1_RESETBNX2_RV2P_COMMAND_PROC1_RESET (1L<<16) bnx2.h 　
6088
 BNX2_RV2P_COMMAND_PROC2_RESETBNX2_RV2P_COMMAND_PROC2_RESET (1L<<17) bnx2.h 　
6089
 BNX2_RV2P_COMMAND_CTXIF_RESETBNX2_RV2P_COMMAND_CTXIF_RESET (1L<<18) bnx2.h 　
6090
 BNX2_RV2P_STATUSBNX2_RV2P_STATUS 0x00002804 bnx2.h 　
6091
 BNX2_RV2P_STATUS_ALWAYS_0BNX2_RV2P_STATUS_ALWAYS_0 (1L<<0) bnx2.h 　
6092
 BNX2_RV2P_STATUS_RV2P_GEN_STAT0BNX2_RV2P_STATUS_RV2P_GEN_STAT0 (1L<<8) bnx2.h 　
6093
 BNX2_RV2P_STATUS_RV2P_GEN_STAT1BNX2_RV2P_STATUS_RV2P_GEN_STAT1 (1L<<9) bnx2.h 　
6094
 BNX2_RV2P_STATUS_RV2P_GEN_STAT2BNX2_RV2P_STATUS_RV2P_GEN_STAT2 (1L<<10) bnx2.h 　
6095
 BNX2_RV2P_STATUS_RV2P_GEN_STAT3BNX2_RV2P_STATUS_RV2P_GEN_STAT3 (1L<<11) bnx2.h 　
6096
 BNX2_RV2P_STATUS_RV2P_GEN_STAT4BNX2_RV2P_STATUS_RV2P_GEN_STAT4 (1L<<12) bnx2.h 　
6097
 BNX2_RV2P_STATUS_RV2P_GEN_STAT5BNX2_RV2P_STATUS_RV2P_GEN_STAT5 (1L<<13) bnx2.h 　
6098
 BNX2_RV2P_CONFIGBNX2_RV2P_CONFIG 0x00002808 bnx2.h 　
6099
 BNX2_RV2P_CONFIG_STALL_PROC1BNX2_RV2P_CONFIG_STALL_PROC1 (1L<<0) bnx2.h 　
6100
 BNX2_RV2P_CONFIG_STALL_PROC2BNX2_RV2P_CONFIG_STALL_PROC2 (1L<<1) bnx2.h 　
6101
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<8) bnx2.h 　
6102
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<9) bnx2.h 　
6103
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<10) bnx2.h 　
6104
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<11) bnx2.h 　
6105
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<12) bnx2.h 　
6106
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<13) bnx2.h 　
6107
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<16) bnx2.h 　
6108
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<17) bnx2.h 　
6109
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<18) bnx2.h 　
6110
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<19) bnx2.h 　
6111
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<20) bnx2.h 　
6112
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<21) bnx2.h 　
6113
 BNX2_RV2P_CONFIG_PAGE_SIZEBNX2_RV2P_CONFIG_PAGE_SIZE (0xfL<<24) bnx2.h 　
6114
 BNX2_RV2P_CONFIG_PAGE_SIZE_256BNX2_RV2P_CONFIG_PAGE_SIZE_256 (0L<<24) bnx2.h 　
6115
 BNX2_RV2P_CONFIG_PAGE_SIZE_512BNX2_RV2P_CONFIG_PAGE_SIZE_512 (1L<<24) bnx2.h 　
6116
 BNX2_RV2P_CONFIG_PAGE_SIZE_1KBNX2_RV2P_CONFIG_PAGE_SIZE_1K (2L<<24) bnx2.h 　
6117
 BNX2_RV2P_CONFIG_PAGE_SIZE_2KBNX2_RV2P_CONFIG_PAGE_SIZE_2K (3L<<24) bnx2.h 　
6118
 BNX2_RV2P_CONFIG_PAGE_SIZE_4KBNX2_RV2P_CONFIG_PAGE_SIZE_4K (4L<<24) bnx2.h 　
6119
 BNX2_RV2P_CONFIG_PAGE_SIZE_8KBNX2_RV2P_CONFIG_PAGE_SIZE_8K (5L<<24) bnx2.h 　
6120
 BNX2_RV2P_CONFIG_PAGE_SIZE_16KBNX2_RV2P_CONFIG_PAGE_SIZE_16K (6L<<24) bnx2.h 　
6121
 BNX2_RV2P_CONFIG_PAGE_SIZE_32KBNX2_RV2P_CONFIG_PAGE_SIZE_32K (7L<<24) bnx2.h 　
6122
 BNX2_RV2P_CONFIG_PAGE_SIZE_64KBNX2_RV2P_CONFIG_PAGE_SIZE_64K (8L<<24) bnx2.h 　
6123
 BNX2_RV2P_CONFIG_PAGE_SIZE_128KBNX2_RV2P_CONFIG_PAGE_SIZE_128K (9L<<24) bnx2.h 　
6124
 BNX2_RV2P_CONFIG_PAGE_SIZE_256KBNX2_RV2P_CONFIG_PAGE_SIZE_256K (10L<<24) bnx2.h 　
6125
 BNX2_RV2P_CONFIG_PAGE_SIZE_512KBNX2_RV2P_CONFIG_PAGE_SIZE_512K (11L<<24) bnx2.h 　
6126
 BNX2_RV2P_CONFIG_PAGE_SIZE_1MBNX2_RV2P_CONFIG_PAGE_SIZE_1M (12L<<24) bnx2.h 　
6127
 BNX2_RV2P_GEN_BFR_ADDR_0BNX2_RV2P_GEN_BFR_ADDR_0 0x00002810 bnx2.h 　
6128
 BNX2_RV2P_GEN_BFR_ADDR_0_VALUEBNX2_RV2P_GEN_BFR_ADDR_0_VALUE (0xffffL<<16) bnx2.h 　
6129
 BNX2_RV2P_GEN_BFR_ADDR_1BNX2_RV2P_GEN_BFR_ADDR_1 0x00002814 bnx2.h 　
6130
 BNX2_RV2P_GEN_BFR_ADDR_1_VALUEBNX2_RV2P_GEN_BFR_ADDR_1_VALUE (0xffffL<<16) bnx2.h 　
6131
 BNX2_RV2P_GEN_BFR_ADDR_2BNX2_RV2P_GEN_BFR_ADDR_2 0x00002818 bnx2.h 　
6132
 BNX2_RV2P_GEN_BFR_ADDR_2_VALUEBNX2_RV2P_GEN_BFR_ADDR_2_VALUE (0xffffL<<16) bnx2.h 　
6133
 BNX2_RV2P_GEN_BFR_ADDR_3BNX2_RV2P_GEN_BFR_ADDR_3 0x0000281c bnx2.h 　
6134
 BNX2_RV2P_GEN_BFR_ADDR_3_VALUEBNX2_RV2P_GEN_BFR_ADDR_3_VALUE (0xffffL<<16) bnx2.h 　
6135
 BNX2_RV2P_INSTR_HIGHBNX2_RV2P_INSTR_HIGH 0x00002830 bnx2.h 　
6136
 BNX2_RV2P_INSTR_HIGH_HIGHBNX2_RV2P_INSTR_HIGH_HIGH (0x1fL<<0) bnx2.h 　
6137
 BNX2_RV2P_INSTR_LOWBNX2_RV2P_INSTR_LOW 0x00002834 bnx2.h 　
6138
 BNX2_RV2P_PROC1_ADDR_CMDBNX2_RV2P_PROC1_ADDR_CMD 0x00002838 bnx2.h 　
6139
 BNX2_RV2P_PROC1_ADDR_CMD_ADDBNX2_RV2P_PROC1_ADDR_CMD_ADD (0x3ffL<<0) bnx2.h 　
6140
 BNX2_RV2P_PROC1_ADDR_CMD_RDWRBNX2_RV2P_PROC1_ADDR_CMD_RDWR (1L<<31) bnx2.h 　
6141
 BNX2_RV2P_PROC2_ADDR_CMDBNX2_RV2P_PROC2_ADDR_CMD 0x0000283c bnx2.h 　
6142
 BNX2_RV2P_PROC2_ADDR_CMD_ADDBNX2_RV2P_PROC2_ADDR_CMD_ADD (0x3ffL<<0) bnx2.h 　
6143
 BNX2_RV2P_PROC2_ADDR_CMD_RDWRBNX2_RV2P_PROC2_ADDR_CMD_RDWR (1L<<31) bnx2.h 　
6144
 BNX2_RV2P_PROC1_GRC_DEBUGBNX2_RV2P_PROC1_GRC_DEBUG 0x00002840 bnx2.h 　
6145
 BNX2_RV2P_PROC2_GRC_DEBUGBNX2_RV2P_PROC2_GRC_DEBUG 0x00002844 bnx2.h 　
6146
 BNX2_RV2P_GRC_PROC_DEBUGBNX2_RV2P_GRC_PROC_DEBUG 0x00002848 bnx2.h 　
6147
 BNX2_RV2P_DEBUG_VECT_PEEKBNX2_RV2P_DEBUG_VECT_PEEK 0x0000284c bnx2.h 　
6148
 BNX2_RV2P_DEBUG_VECT_PEEK_1_VALBNX2_RV2P_DEBUG_VECT_PEEK_1_VAL (0x7ffL<<0) bnx2.h 　
6149
 BNX2_RV2P_DEBUG_VECT_PEEK_1_PEEBNX2_RV2P_DEBUG_VECT_PEEK_1_PEE (1L<<11) bnx2.h 　
6150
 BNX2_RV2P_DEBUG_VECT_PEEK_1_SELBNX2_RV2P_DEBUG_VECT_PEEK_1_SEL (0xfL<<12) bnx2.h 　
6151
 BNX2_RV2P_DEBUG_VECT_PEEK_2_VALBNX2_RV2P_DEBUG_VECT_PEEK_2_VAL (0x7ffL<<16) bnx2.h 　
6152
 BNX2_RV2P_DEBUG_VECT_PEEK_2_PEEBNX2_RV2P_DEBUG_VECT_PEEK_2_PEE (1L<<27) bnx2.h 　
6153
 BNX2_RV2P_DEBUG_VECT_PEEK_2_SELBNX2_RV2P_DEBUG_VECT_PEEK_2_SEL (0xfL<<28) bnx2.h 　
6154
 BNX2_RV2P_PFTQ_DATABNX2_RV2P_PFTQ_DATA 0x00002b40 bnx2.h 　
6155
 BNX2_RV2P_PFTQ_CMDBNX2_RV2P_PFTQ_CMD 0x00002b78 bnx2.h 　
6156
 BNX2_RV2P_PFTQ_CMD_OFFSETBNX2_RV2P_PFTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
6157
 BNX2_RV2P_PFTQ_CMD_WR_TOPBNX2_RV2P_PFTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
6158
 BNX2_RV2P_PFTQ_CMD_WR_TOP_0BNX2_RV2P_PFTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
6159
 BNX2_RV2P_PFTQ_CMD_WR_TOP_1BNX2_RV2P_PFTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
6160
 BNX2_RV2P_PFTQ_CMD_SFT_RESETBNX2_RV2P_PFTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
6161
 BNX2_RV2P_PFTQ_CMD_RD_DATABNX2_RV2P_PFTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
6162
 BNX2_RV2P_PFTQ_CMD_ADD_INTERVENBNX2_RV2P_PFTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
6163
 BNX2_RV2P_PFTQ_CMD_ADD_DATABNX2_RV2P_PFTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
6164
 BNX2_RV2P_PFTQ_CMD_INTERVENE_CLBNX2_RV2P_PFTQ_CMD_INTERVENE_CL (1L<<29) bnx2.h 　
6165
 BNX2_RV2P_PFTQ_CMD_POPBNX2_RV2P_PFTQ_CMD_POP (1L<<30) bnx2.h 　
6166
 BNX2_RV2P_PFTQ_CMD_BUSYBNX2_RV2P_PFTQ_CMD_BUSY (1L<<31) bnx2.h 　
6167
 BNX2_RV2P_PFTQ_CTLBNX2_RV2P_PFTQ_CTL 0x00002b7c bnx2.h 　
6168
 BNX2_RV2P_PFTQ_CTL_INTERVENEBNX2_RV2P_PFTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
6169
 BNX2_RV2P_PFTQ_CTL_OVERFLOWBNX2_RV2P_PFTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
6170
 BNX2_RV2P_PFTQ_CTL_FORCE_INTERVBNX2_RV2P_PFTQ_CTL_FORCE_INTERV (1L<<2) bnx2.h 　
6171
 BNX2_RV2P_PFTQ_CTL_MAX_DEPTHBNX2_RV2P_PFTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
6172
 BNX2_RV2P_PFTQ_CTL_CUR_DEPTHBNX2_RV2P_PFTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
6173
 BNX2_RV2P_TFTQ_DATABNX2_RV2P_TFTQ_DATA 0x00002b80 bnx2.h 　
6174
 BNX2_RV2P_TFTQ_CMDBNX2_RV2P_TFTQ_CMD 0x00002bb8 bnx2.h 　
6175
 BNX2_RV2P_TFTQ_CMD_OFFSETBNX2_RV2P_TFTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
6176
 BNX2_RV2P_TFTQ_CMD_WR_TOPBNX2_RV2P_TFTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
6177
 BNX2_RV2P_TFTQ_CMD_WR_TOP_0BNX2_RV2P_TFTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
6178
 BNX2_RV2P_TFTQ_CMD_WR_TOP_1BNX2_RV2P_TFTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
6179
 BNX2_RV2P_TFTQ_CMD_SFT_RESETBNX2_RV2P_TFTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
6180
 BNX2_RV2P_TFTQ_CMD_RD_DATABNX2_RV2P_TFTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
6181
 BNX2_RV2P_TFTQ_CMD_ADD_INTERVENBNX2_RV2P_TFTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
6182
 BNX2_RV2P_TFTQ_CMD_ADD_DATABNX2_RV2P_TFTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
6183
 BNX2_RV2P_TFTQ_CMD_INTERVENE_CLBNX2_RV2P_TFTQ_CMD_INTERVENE_CL (1L<<29) bnx2.h 　
6184
 BNX2_RV2P_TFTQ_CMD_POPBNX2_RV2P_TFTQ_CMD_POP (1L<<30) bnx2.h 　
6185
 BNX2_RV2P_TFTQ_CMD_BUSYBNX2_RV2P_TFTQ_CMD_BUSY (1L<<31) bnx2.h 　
6186
 BNX2_RV2P_TFTQ_CTLBNX2_RV2P_TFTQ_CTL 0x00002bbc bnx2.h 　
6187
 BNX2_RV2P_TFTQ_CTL_INTERVENEBNX2_RV2P_TFTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
6188
 BNX2_RV2P_TFTQ_CTL_OVERFLOWBNX2_RV2P_TFTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
6189
 BNX2_RV2P_TFTQ_CTL_FORCE_INTERVBNX2_RV2P_TFTQ_CTL_FORCE_INTERV (1L<<2) bnx2.h 　
6190
 BNX2_RV2P_TFTQ_CTL_MAX_DEPTHBNX2_RV2P_TFTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
6191
 BNX2_RV2P_TFTQ_CTL_CUR_DEPTHBNX2_RV2P_TFTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
6192
 BNX2_RV2P_MFTQ_DATABNX2_RV2P_MFTQ_DATA 0x00002bc0 bnx2.h 　
6193
 BNX2_RV2P_MFTQ_CMDBNX2_RV2P_MFTQ_CMD 0x00002bf8 bnx2.h 　
6194
 BNX2_RV2P_MFTQ_CMD_OFFSETBNX2_RV2P_MFTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
6195
 BNX2_RV2P_MFTQ_CMD_WR_TOPBNX2_RV2P_MFTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
6196
 BNX2_RV2P_MFTQ_CMD_WR_TOP_0BNX2_RV2P_MFTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
6197
 BNX2_RV2P_MFTQ_CMD_WR_TOP_1BNX2_RV2P_MFTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
6198
 BNX2_RV2P_MFTQ_CMD_SFT_RESETBNX2_RV2P_MFTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
6199
 BNX2_RV2P_MFTQ_CMD_RD_DATABNX2_RV2P_MFTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
6200
 BNX2_RV2P_MFTQ_CMD_ADD_INTERVENBNX2_RV2P_MFTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
6201
 BNX2_RV2P_MFTQ_CMD_ADD_DATABNX2_RV2P_MFTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
6202
 BNX2_RV2P_MFTQ_CMD_INTERVENE_CLBNX2_RV2P_MFTQ_CMD_INTERVENE_CL (1L<<29) bnx2.h 　
6203
 BNX2_RV2P_MFTQ_CMD_POPBNX2_RV2P_MFTQ_CMD_POP (1L<<30) bnx2.h 　
6204
 BNX2_RV2P_MFTQ_CMD_BUSYBNX2_RV2P_MFTQ_CMD_BUSY (1L<<31) bnx2.h 　
6205
 BNX2_RV2P_MFTQ_CTLBNX2_RV2P_MFTQ_CTL 0x00002bfc bnx2.h 　
6206
 BNX2_RV2P_MFTQ_CTL_INTERVENEBNX2_RV2P_MFTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
6207
 BNX2_RV2P_MFTQ_CTL_OVERFLOWBNX2_RV2P_MFTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
6208
 BNX2_RV2P_MFTQ_CTL_FORCE_INTERVBNX2_RV2P_MFTQ_CTL_FORCE_INTERV (1L<<2) bnx2.h 　
6209
 BNX2_RV2P_MFTQ_CTL_MAX_DEPTHBNX2_RV2P_MFTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
6210
 BNX2_RV2P_MFTQ_CTL_CUR_DEPTHBNX2_RV2P_MFTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
6211
 BNX2_MQ_COMMANDBNX2_MQ_COMMAND 0x00003c00 bnx2.h 　
6212
 BNX2_MQ_COMMAND_ENABLEDBNX2_MQ_COMMAND_ENABLED (1L<<0) bnx2.h 　
6213
 BNX2_MQ_COMMAND_OVERFLOWBNX2_MQ_COMMAND_OVERFLOW (1L<<4) bnx2.h 　
6214
 BNX2_MQ_COMMAND_WR_ERRORBNX2_MQ_COMMAND_WR_ERROR (1L<<5) bnx2.h 　
6215
 BNX2_MQ_COMMAND_RD_ERRORBNX2_MQ_COMMAND_RD_ERROR (1L<<6) bnx2.h 　
6216
 BNX2_MQ_STATUSBNX2_MQ_STATUS 0x00003c04 bnx2.h 　
6217
 BNX2_MQ_STATUS_CTX_ACCESS_STATBNX2_MQ_STATUS_CTX_ACCESS_STAT (1L<<16) bnx2.h 　
6218
 BNX2_MQ_STATUS_CTX_ACCESS64_STABNX2_MQ_STATUS_CTX_ACCESS64_STA (1L<<17) bnx2.h 　
6219
 BNX2_MQ_STATUS_PCI_STALL_STATBNX2_MQ_STATUS_PCI_STALL_STAT (1L<<18) bnx2.h 　
6220
 BNX2_MQ_CONFIGBNX2_MQ_CONFIG 0x00003c08 bnx2.h 　
6221
 BNX2_MQ_CONFIG_TX_HIGH_PRIBNX2_MQ_CONFIG_TX_HIGH_PRI (1L<<0) bnx2.h 　
6222
 BNX2_MQ_CONFIG_HALT_DISBNX2_MQ_CONFIG_HALT_DIS (1L<<1) bnx2.h 　
6223
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (0x7L<<4) bnx2.h 　
6224
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (0L<<4) bnx2.h 　
6225
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (1L<<4) bnx2.h 　
6226
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (2L<<4) bnx2.h 　
6227
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (3L<<4) bnx2.h 　
6228
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (4L<<4) bnx2.h 　
6229
 BNX2_MQ_CONFIG_MAX_DEPTHBNX2_MQ_CONFIG_MAX_DEPTH (0x7fL<<8) bnx2.h 　
6230
 BNX2_MQ_CONFIG_CUR_DEPTHBNX2_MQ_CONFIG_CUR_DEPTH (0x7fL<<20) bnx2.h 　
6231
 BNX2_MQ_ENQUEUE1BNX2_MQ_ENQUEUE1 0x00003c0c bnx2.h 　
6232
 BNX2_MQ_ENQUEUE1_OFFSETBNX2_MQ_ENQUEUE1_OFFSET (0x3fL<<2) bnx2.h 　
6233
 BNX2_MQ_ENQUEUE1_CIDBNX2_MQ_ENQUEUE1_CID (0x3fffL<<8) bnx2.h 　
6234
 BNX2_MQ_ENQUEUE1_BYTE_MASKBNX2_MQ_ENQUEUE1_BYTE_MASK (0xfL<<24) bnx2.h 　
6235
 BNX2_MQ_ENQUEUE1_KNL_MODEBNX2_MQ_ENQUEUE1_KNL_MODE (1L<<28) bnx2.h 　
6236
 BNX2_MQ_ENQUEUE2BNX2_MQ_ENQUEUE2 0x00003c10 bnx2.h 　
6237
 BNX2_MQ_BAD_WR_ADDRBNX2_MQ_BAD_WR_ADDR 0x00003c14 bnx2.h 　
6238
 BNX2_MQ_BAD_RD_ADDRBNX2_MQ_BAD_RD_ADDR 0x00003c18 bnx2.h 　
6239
 BNX2_MQ_KNL_BYP_WIND_STARTBNX2_MQ_KNL_BYP_WIND_START 0x00003c1c bnx2.h 　
6240
 BNX2_MQ_KNL_BYP_WIND_START_VALUBNX2_MQ_KNL_BYP_WIND_START_VALU (0xfffffL<<12) bnx2.h 　
6241
 BNX2_MQ_KNL_WIND_ENDBNX2_MQ_KNL_WIND_END 0x00003c20 bnx2.h 　
6242
 BNX2_MQ_KNL_WIND_END_VALUEBNX2_MQ_KNL_WIND_END_VALUE (0xffffffL<<8) bnx2.h 　
6243
 BNX2_MQ_KNL_WRITE_MASK1BNX2_MQ_KNL_WRITE_MASK1 0x00003c24 bnx2.h 　
6244
 BNX2_MQ_KNL_TX_MASK1BNX2_MQ_KNL_TX_MASK1 0x00003c28 bnx2.h 　
6245
 BNX2_MQ_KNL_CMD_MASK1BNX2_MQ_KNL_CMD_MASK1 0x00003c2c bnx2.h 　
6246
 BNX2_MQ_KNL_COND_ENQUEUE_MASK1BNX2_MQ_KNL_COND_ENQUEUE_MASK1 0x00003c30 bnx2.h 　
6247
 BNX2_MQ_KNL_RX_V2P_MASK1BNX2_MQ_KNL_RX_V2P_MASK1 0x00003c34 bnx2.h 　
6248
 BNX2_MQ_KNL_WRITE_MASK2BNX2_MQ_KNL_WRITE_MASK2 0x00003c38 bnx2.h 　
6249
 BNX2_MQ_KNL_TX_MASK2BNX2_MQ_KNL_TX_MASK2 0x00003c3c bnx2.h 　
6250
 BNX2_MQ_KNL_CMD_MASK2BNX2_MQ_KNL_CMD_MASK2 0x00003c40 bnx2.h 　
6251
 BNX2_MQ_KNL_COND_ENQUEUE_MASK2BNX2_MQ_KNL_COND_ENQUEUE_MASK2 0x00003c44 bnx2.h 　
6252
 BNX2_MQ_KNL_RX_V2P_MASK2BNX2_MQ_KNL_RX_V2P_MASK2 0x00003c48 bnx2.h 　
6253
 BNX2_MQ_KNL_BYP_WRITE_MASK1BNX2_MQ_KNL_BYP_WRITE_MASK1 0x00003c4c bnx2.h 　
6254
 BNX2_MQ_KNL_BYP_TX_MASK1BNX2_MQ_KNL_BYP_TX_MASK1 0x00003c50 bnx2.h 　
6255
 BNX2_MQ_KNL_BYP_CMD_MASK1BNX2_MQ_KNL_BYP_CMD_MASK1 0x00003c54 bnx2.h 　
6256
 BNX2_MQ_KNL_BYP_COND_ENQUEUE_MABNX2_MQ_KNL_BYP_COND_ENQUEUE_MA 0x00003c58 bnx2.h 　
6257
 BNX2_MQ_KNL_BYP_RX_V2P_MASK1BNX2_MQ_KNL_BYP_RX_V2P_MASK1 0x00003c5c bnx2.h 　
6258
 BNX2_MQ_KNL_BYP_WRITE_MASK2BNX2_MQ_KNL_BYP_WRITE_MASK2 0x00003c60 bnx2.h 　
6259
 BNX2_MQ_KNL_BYP_TX_MASK2BNX2_MQ_KNL_BYP_TX_MASK2 0x00003c64 bnx2.h 　
6260
 BNX2_MQ_KNL_BYP_CMD_MASK2BNX2_MQ_KNL_BYP_CMD_MASK2 0x00003c68 bnx2.h 　
6261
 BNX2_MQ_KNL_BYP_COND_ENQUEUE_MABNX2_MQ_KNL_BYP_COND_ENQUEUE_MA 0x00003c6c bnx2.h 　
6262
 BNX2_MQ_KNL_BYP_RX_V2P_MASK2BNX2_MQ_KNL_BYP_RX_V2P_MASK2 0x00003c70 bnx2.h 　
6263
 BNX2_MQ_MEM_WR_ADDRBNX2_MQ_MEM_WR_ADDR 0x00003c74 bnx2.h 　
6264
 BNX2_MQ_MEM_WR_ADDR_VALUEBNX2_MQ_MEM_WR_ADDR_VALUE (0x3fL<<0) bnx2.h 　
6265
 BNX2_MQ_MEM_WR_DATA0BNX2_MQ_MEM_WR_DATA0 0x00003c78 bnx2.h 　
6266
 BNX2_MQ_MEM_WR_DATA0_VALUEBNX2_MQ_MEM_WR_DATA0_VALUE (0xffffffffL<<0) bnx2.h 　
6267
 BNX2_MQ_MEM_WR_DATA1BNX2_MQ_MEM_WR_DATA1 0x00003c7c bnx2.h 　
6268
 BNX2_MQ_MEM_WR_DATA1_VALUEBNX2_MQ_MEM_WR_DATA1_VALUE (0xffffffffL<<0) bnx2.h 　
6269
 BNX2_MQ_MEM_WR_DATA2BNX2_MQ_MEM_WR_DATA2 0x00003c80 bnx2.h 　
6270
 BNX2_MQ_MEM_WR_DATA2_VALUEBNX2_MQ_MEM_WR_DATA2_VALUE (0x3fffffffL<<0) bnx2.h 　
6271
 BNX2_MQ_MEM_RD_ADDRBNX2_MQ_MEM_RD_ADDR 0x00003c84 bnx2.h 　
6272
 BNX2_MQ_MEM_RD_ADDR_VALUEBNX2_MQ_MEM_RD_ADDR_VALUE (0x3fL<<0) bnx2.h 　
6273
 BNX2_MQ_MEM_RD_DATA0BNX2_MQ_MEM_RD_DATA0 0x00003c88 bnx2.h 　
6274
 BNX2_MQ_MEM_RD_DATA0_VALUEBNX2_MQ_MEM_RD_DATA0_VALUE (0xffffffffL<<0) bnx2.h 　
6275
 BNX2_MQ_MEM_RD_DATA1BNX2_MQ_MEM_RD_DATA1 0x00003c8c bnx2.h 　
6276
 BNX2_MQ_MEM_RD_DATA1_VALUEBNX2_MQ_MEM_RD_DATA1_VALUE (0xffffffffL<<0) bnx2.h 　
6277
 BNX2_MQ_MEM_RD_DATA2BNX2_MQ_MEM_RD_DATA2 0x00003c90 bnx2.h 　
6278
 BNX2_MQ_MEM_RD_DATA2_VALUEBNX2_MQ_MEM_RD_DATA2_VALUE (0x3fffffffL<<0) bnx2.h 　
6279
 BNX2_TBDR_COMMANDBNX2_TBDR_COMMAND 0x00005000 bnx2.h 　
6280
 BNX2_TBDR_COMMAND_ENABLEBNX2_TBDR_COMMAND_ENABLE (1L<<0) bnx2.h 　
6281
 BNX2_TBDR_COMMAND_SOFT_RSTBNX2_TBDR_COMMAND_SOFT_RST (1L<<1) bnx2.h 　
6282
 BNX2_TBDR_COMMAND_MSTR_ABORTBNX2_TBDR_COMMAND_MSTR_ABORT (1L<<4) bnx2.h 　
6283
 BNX2_TBDR_STATUSBNX2_TBDR_STATUS 0x00005004 bnx2.h 　
6284
 BNX2_TBDR_STATUS_DMA_WAITBNX2_TBDR_STATUS_DMA_WAIT (1L<<0) bnx2.h 　
6285
 BNX2_TBDR_STATUS_FTQ_WAITBNX2_TBDR_STATUS_FTQ_WAIT (1L<<1) bnx2.h 　
6286
 BNX2_TBDR_STATUS_FIFO_OVERFLOWBNX2_TBDR_STATUS_FIFO_OVERFLOW (1L<<2) bnx2.h 　
6287
 BNX2_TBDR_STATUS_FIFO_UNDERFLOWBNX2_TBDR_STATUS_FIFO_UNDERFLOW (1L<<3) bnx2.h 　
6288
 BNX2_TBDR_STATUS_SEARCHMISS_ERRBNX2_TBDR_STATUS_SEARCHMISS_ERR (1L<<4) bnx2.h 　
6289
 BNX2_TBDR_STATUS_FTQ_ENTRY_CNTBNX2_TBDR_STATUS_FTQ_ENTRY_CNT (1L<<5) bnx2.h 　
6290
 BNX2_TBDR_STATUS_BURST_CNTBNX2_TBDR_STATUS_BURST_CNT (1L<<6) bnx2.h 　
6291
 BNX2_TBDR_CONFIGBNX2_TBDR_CONFIG 0x00005008 bnx2.h 　
6292
 BNX2_TBDR_CONFIG_MAX_BDSBNX2_TBDR_CONFIG_MAX_BDS (0xffL<<0) bnx2.h 　
6293
 BNX2_TBDR_CONFIG_SWAP_MODEBNX2_TBDR_CONFIG_SWAP_MODE (1L<<8) bnx2.h 　
6294
 BNX2_TBDR_CONFIG_PRIORITYBNX2_TBDR_CONFIG_PRIORITY (1L<<9) bnx2.h 　
6295
 BNX2_TBDR_CONFIG_CACHE_NEXT_PAGBNX2_TBDR_CONFIG_CACHE_NEXT_PAG (1L<<10) bnx2.h 　
6296
 BNX2_TBDR_CONFIG_PAGE_SIZEBNX2_TBDR_CONFIG_PAGE_SIZE (0xfL<<24) bnx2.h 　
6297
 BNX2_TBDR_CONFIG_PAGE_SIZE_256BNX2_TBDR_CONFIG_PAGE_SIZE_256 (0L<<24) bnx2.h 　
6298
 BNX2_TBDR_CONFIG_PAGE_SIZE_512BNX2_TBDR_CONFIG_PAGE_SIZE_512 (1L<<24) bnx2.h 　
6299
 BNX2_TBDR_CONFIG_PAGE_SIZE_1KBNX2_TBDR_CONFIG_PAGE_SIZE_1K (2L<<24) bnx2.h 　
6300
 BNX2_TBDR_CONFIG_PAGE_SIZE_2KBNX2_TBDR_CONFIG_PAGE_SIZE_2K (3L<<24) bnx2.h 　
6301
 BNX2_TBDR_CONFIG_PAGE_SIZE_4KBNX2_TBDR_CONFIG_PAGE_SIZE_4K (4L<<24) bnx2.h 　
6302
 BNX2_TBDR_CONFIG_PAGE_SIZE_8KBNX2_TBDR_CONFIG_PAGE_SIZE_8K (5L<<24) bnx2.h 　
6303
 BNX2_TBDR_CONFIG_PAGE_SIZE_16KBNX2_TBDR_CONFIG_PAGE_SIZE_16K (6L<<24) bnx2.h 　
6304
 BNX2_TBDR_CONFIG_PAGE_SIZE_32KBNX2_TBDR_CONFIG_PAGE_SIZE_32K (7L<<24) bnx2.h 　
6305
 BNX2_TBDR_CONFIG_PAGE_SIZE_64KBNX2_TBDR_CONFIG_PAGE_SIZE_64K (8L<<24) bnx2.h 　
6306
 BNX2_TBDR_CONFIG_PAGE_SIZE_128KBNX2_TBDR_CONFIG_PAGE_SIZE_128K (9L<<24) bnx2.h 　
6307
 BNX2_TBDR_CONFIG_PAGE_SIZE_256KBNX2_TBDR_CONFIG_PAGE_SIZE_256K (10L<<24) bnx2.h 　
6308
 BNX2_TBDR_CONFIG_PAGE_SIZE_512KBNX2_TBDR_CONFIG_PAGE_SIZE_512K (11L<<24) bnx2.h 　
6309
 BNX2_TBDR_CONFIG_PAGE_SIZE_1MBNX2_TBDR_CONFIG_PAGE_SIZE_1M (12L<<24) bnx2.h 　
6310
 BNX2_TBDR_DEBUG_VECT_PEEKBNX2_TBDR_DEBUG_VECT_PEEK 0x0000500c bnx2.h 　
6311
 BNX2_TBDR_DEBUG_VECT_PEEK_1_VALBNX2_TBDR_DEBUG_VECT_PEEK_1_VAL (0x7ffL<<0) bnx2.h 　
6312
 BNX2_TBDR_DEBUG_VECT_PEEK_1_PEEBNX2_TBDR_DEBUG_VECT_PEEK_1_PEE (1L<<11) bnx2.h 　
6313
 BNX2_TBDR_DEBUG_VECT_PEEK_1_SELBNX2_TBDR_DEBUG_VECT_PEEK_1_SEL (0xfL<<12) bnx2.h 　
6314
 BNX2_TBDR_DEBUG_VECT_PEEK_2_VALBNX2_TBDR_DEBUG_VECT_PEEK_2_VAL (0x7ffL<<16) bnx2.h 　
6315
 BNX2_TBDR_DEBUG_VECT_PEEK_2_PEEBNX2_TBDR_DEBUG_VECT_PEEK_2_PEE (1L<<27) bnx2.h 　
6316
 BNX2_TBDR_DEBUG_VECT_PEEK_2_SELBNX2_TBDR_DEBUG_VECT_PEEK_2_SEL (0xfL<<28) bnx2.h 　
6317
 BNX2_TBDR_FTQ_DATABNX2_TBDR_FTQ_DATA 0x000053c0 bnx2.h 　
6318
 BNX2_TBDR_FTQ_CMDBNX2_TBDR_FTQ_CMD 0x000053f8 bnx2.h 　
6319
 BNX2_TBDR_FTQ_CMD_OFFSETBNX2_TBDR_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
6320
 BNX2_TBDR_FTQ_CMD_WR_TOPBNX2_TBDR_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
6321
 BNX2_TBDR_FTQ_CMD_WR_TOP_0BNX2_TBDR_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
6322
 BNX2_TBDR_FTQ_CMD_WR_TOP_1BNX2_TBDR_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
6323
 BNX2_TBDR_FTQ_CMD_SFT_RESETBNX2_TBDR_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
6324
 BNX2_TBDR_FTQ_CMD_RD_DATABNX2_TBDR_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
6325
 BNX2_TBDR_FTQ_CMD_ADD_INTERVENBNX2_TBDR_FTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
6326
 BNX2_TBDR_FTQ_CMD_ADD_DATABNX2_TBDR_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
6327
 BNX2_TBDR_FTQ_CMD_INTERVENE_CLRBNX2_TBDR_FTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
6328
 BNX2_TBDR_FTQ_CMD_POPBNX2_TBDR_FTQ_CMD_POP (1L<<30) bnx2.h 　
6329
 BNX2_TBDR_FTQ_CMD_BUSYBNX2_TBDR_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
6330
 BNX2_TBDR_FTQ_CTLBNX2_TBDR_FTQ_CTL 0x000053fc bnx2.h 　
6331
 BNX2_TBDR_FTQ_CTL_INTERVENEBNX2_TBDR_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
6332
 BNX2_TBDR_FTQ_CTL_OVERFLOWBNX2_TBDR_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
6333
 BNX2_TBDR_FTQ_CTL_FORCE_INTERVEBNX2_TBDR_FTQ_CTL_FORCE_INTERVE (1L<<2) bnx2.h 　
6334
 BNX2_TBDR_FTQ_CTL_MAX_DEPTHBNX2_TBDR_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
6335
 BNX2_TBDR_FTQ_CTL_CUR_DEPTHBNX2_TBDR_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
6336
 BNX2_TDMA_COMMANDBNX2_TDMA_COMMAND 0x00005c00 bnx2.h 　
6337
 BNX2_TDMA_COMMAND_ENABLEDBNX2_TDMA_COMMAND_ENABLED (1L<<0) bnx2.h 　
6338
 BNX2_TDMA_COMMAND_MASTER_ABORTBNX2_TDMA_COMMAND_MASTER_ABORT (1L<<4) bnx2.h 　
6339
 BNX2_TDMA_COMMAND_BAD_L2_LENGTHBNX2_TDMA_COMMAND_BAD_L2_LENGTH (1L<<7) bnx2.h 　
6340
 BNX2_TDMA_STATUSBNX2_TDMA_STATUS 0x00005c04 bnx2.h 　
6341
 BNX2_TDMA_STATUS_DMA_WAITBNX2_TDMA_STATUS_DMA_WAIT (1L<<0) bnx2.h 　
6342
 BNX2_TDMA_STATUS_PAYLOAD_WAITBNX2_TDMA_STATUS_PAYLOAD_WAIT (1L<<1) bnx2.h 　
6343
 BNX2_TDMA_STATUS_PATCH_FTQ_WAITBNX2_TDMA_STATUS_PATCH_FTQ_WAIT (1L<<2) bnx2.h 　
6344
 BNX2_TDMA_STATUS_LOCK_WAITBNX2_TDMA_STATUS_LOCK_WAIT (1L<<3) bnx2.h 　
6345
 BNX2_TDMA_STATUS_FTQ_ENTRY_CNTBNX2_TDMA_STATUS_FTQ_ENTRY_CNT (1L<<16) bnx2.h 　
6346
 BNX2_TDMA_STATUS_BURST_CNTBNX2_TDMA_STATUS_BURST_CNT (1L<<17) bnx2.h 　
6347
 BNX2_TDMA_CONFIGBNX2_TDMA_CONFIG 0x00005c08 bnx2.h 　
6348
 BNX2_TDMA_CONFIG_ONE_DMABNX2_TDMA_CONFIG_ONE_DMA (1L<<0) bnx2.h 　
6349
 BNX2_TDMA_CONFIG_ONE_RECORDBNX2_TDMA_CONFIG_ONE_RECORD (1L<<1) bnx2.h 　
6350
 BNX2_TDMA_CONFIG_LIMIT_SZBNX2_TDMA_CONFIG_LIMIT_SZ (0xfL<<4) bnx2.h 　
6351
 BNX2_TDMA_CONFIG_LIMIT_SZ_64BNX2_TDMA_CONFIG_LIMIT_SZ_64 (0L<<4) bnx2.h 　
6352
 BNX2_TDMA_CONFIG_LIMIT_SZ_128BNX2_TDMA_CONFIG_LIMIT_SZ_128 (0x4L<<4) bnx2.h 　
6353
 BNX2_TDMA_CONFIG_LIMIT_SZ_256BNX2_TDMA_CONFIG_LIMIT_SZ_256 (0x6L<<4) bnx2.h 　
6354
 BNX2_TDMA_CONFIG_LIMIT_SZ_512BNX2_TDMA_CONFIG_LIMIT_SZ_512 (0x8L<<4) bnx2.h 　
6355
 BNX2_TDMA_CONFIG_LINE_SZBNX2_TDMA_CONFIG_LINE_SZ (0xfL<<8) bnx2.h 　
6356
 BNX2_TDMA_CONFIG_LINE_SZ_64BNX2_TDMA_CONFIG_LINE_SZ_64 (0L<<8) bnx2.h 　
6357
 BNX2_TDMA_CONFIG_LINE_SZ_128BNX2_TDMA_CONFIG_LINE_SZ_128 (4L<<8) bnx2.h 　
6358
 BNX2_TDMA_CONFIG_LINE_SZ_256BNX2_TDMA_CONFIG_LINE_SZ_256 (6L<<8) bnx2.h 　
6359
 BNX2_TDMA_CONFIG_LINE_SZ_512BNX2_TDMA_CONFIG_LINE_SZ_512 (8L<<8) bnx2.h 　
6360
 BNX2_TDMA_CONFIG_ALIGN_ENABNX2_TDMA_CONFIG_ALIGN_ENA (1L<<15) bnx2.h 　
6361
 BNX2_TDMA_CONFIG_CHK_L2_BDBNX2_TDMA_CONFIG_CHK_L2_BD (1L<<16) bnx2.h 　
6362
 BNX2_TDMA_CONFIG_FIFO_CMPBNX2_TDMA_CONFIG_FIFO_CMP (0xfL<<20) bnx2.h 　
6363
 BNX2_TDMA_PAYLOAD_PRODBNX2_TDMA_PAYLOAD_PROD 0x00005c0c bnx2.h 　
6364
 BNX2_TDMA_PAYLOAD_PROD_VALUEBNX2_TDMA_PAYLOAD_PROD_VALUE (0x1fffL<<3) bnx2.h 　
6365
 BNX2_TDMA_DBG_WATCHDOGBNX2_TDMA_DBG_WATCHDOG 0x00005c10 bnx2.h 　
6366
 BNX2_TDMA_DBG_TRIGGERBNX2_TDMA_DBG_TRIGGER 0x00005c14 bnx2.h 　
6367
 BNX2_TDMA_DMAD_FSMBNX2_TDMA_DMAD_FSM 0x00005c80 bnx2.h 　
6368
 BNX2_TDMA_DMAD_FSM_BD_INVLDBNX2_TDMA_DMAD_FSM_BD_INVLD (1L<<0) bnx2.h 　
6369
 BNX2_TDMA_DMAD_FSM_PUSHBNX2_TDMA_DMAD_FSM_PUSH (0xfL<<4) bnx2.h 　
6370
 BNX2_TDMA_DMAD_FSM_ARB_TBDCBNX2_TDMA_DMAD_FSM_ARB_TBDC (0x3L<<8) bnx2.h 　
6371
 BNX2_TDMA_DMAD_FSM_ARB_CTXBNX2_TDMA_DMAD_FSM_ARB_CTX (1L<<12) bnx2.h 　
6372
 BNX2_TDMA_DMAD_FSM_DR_INTFBNX2_TDMA_DMAD_FSM_DR_INTF (1L<<16) bnx2.h 　
6373
 BNX2_TDMA_DMAD_FSM_DMADBNX2_TDMA_DMAD_FSM_DMAD (0x7L<<20) bnx2.h 　
6374
 BNX2_TDMA_DMAD_FSM_BDBNX2_TDMA_DMAD_FSM_BD (0xfL<<24) bnx2.h 　
6375
 BNX2_TDMA_DMAD_STATUSBNX2_TDMA_DMAD_STATUS 0x00005c84 bnx2.h 　
6376
 BNX2_TDMA_DMAD_STATUS_RHOLD_PUSBNX2_TDMA_DMAD_STATUS_RHOLD_PUS (0x3L<<0) bnx2.h 　
6377
 BNX2_TDMA_DMAD_STATUS_RHOLD_DMABNX2_TDMA_DMAD_STATUS_RHOLD_DMA (0x3L<<4) bnx2.h 　
6378
 BNX2_TDMA_DMAD_STATUS_RHOLD_BD_BNX2_TDMA_DMAD_STATUS_RHOLD_BD_ (0x3L<<8) bnx2.h 　
6379
 BNX2_TDMA_DMAD_STATUS_IFTQ_ENUMBNX2_TDMA_DMAD_STATUS_IFTQ_ENUM (0xfL<<12) bnx2.h 　
6380
 BNX2_TDMA_DR_INTF_FSMBNX2_TDMA_DR_INTF_FSM 0x00005c88 bnx2.h 　
6381
 BNX2_TDMA_DR_INTF_FSM_L2_COMPBNX2_TDMA_DR_INTF_FSM_L2_COMP (0x3L<<0) bnx2.h 　
6382
 BNX2_TDMA_DR_INTF_FSM_TPATQBNX2_TDMA_DR_INTF_FSM_TPATQ (0x7L<<4) bnx2.h 　
6383
 BNX2_TDMA_DR_INTF_FSM_TPBUFBNX2_TDMA_DR_INTF_FSM_TPBUF (0x3L<<8) bnx2.h 　
6384
 BNX2_TDMA_DR_INTF_FSM_DR_BUFBNX2_TDMA_DR_INTF_FSM_DR_BUF (0x7L<<12) bnx2.h 　
6385
 BNX2_TDMA_DR_INTF_FSM_DMADBNX2_TDMA_DR_INTF_FSM_DMAD (0x7L<<16) bnx2.h 　
6386
 BNX2_TDMA_DR_INTF_STATUSBNX2_TDMA_DR_INTF_STATUS 0x00005c8c bnx2.h 　
6387
 BNX2_TDMA_DR_INTF_STATUS_HOLE_PBNX2_TDMA_DR_INTF_STATUS_HOLE_P (0x7L<<0) bnx2.h 　
6388
 BNX2_TDMA_DR_INTF_STATUS_DATA_ABNX2_TDMA_DR_INTF_STATUS_DATA_A (0x3L<<4) bnx2.h 　
6389
 BNX2_TDMA_DR_INTF_STATUS_SHIFT_BNX2_TDMA_DR_INTF_STATUS_SHIFT_ (0x7L<<8) bnx2.h 　
6390
 BNX2_TDMA_DR_INTF_STATUS_NXT_PNBNX2_TDMA_DR_INTF_STATUS_NXT_PN (0xfL<<12) bnx2.h 　
6391
 BNX2_TDMA_DR_INTF_STATUS_BYTE_CBNX2_TDMA_DR_INTF_STATUS_BYTE_C (0x7L<<16) bnx2.h 　
6392
 BNX2_TDMA_FTQ_DATABNX2_TDMA_FTQ_DATA 0x00005fc0 bnx2.h 　
6393
 BNX2_TDMA_FTQ_CMDBNX2_TDMA_FTQ_CMD 0x00005ff8 bnx2.h 　
6394
 BNX2_TDMA_FTQ_CMD_OFFSETBNX2_TDMA_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
6395
 BNX2_TDMA_FTQ_CMD_WR_TOPBNX2_TDMA_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
6396
 BNX2_TDMA_FTQ_CMD_WR_TOP_0BNX2_TDMA_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
6397
 BNX2_TDMA_FTQ_CMD_WR_TOP_1BNX2_TDMA_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
6398
 BNX2_TDMA_FTQ_CMD_SFT_RESETBNX2_TDMA_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
6399
 BNX2_TDMA_FTQ_CMD_RD_DATABNX2_TDMA_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
6400
 BNX2_TDMA_FTQ_CMD_ADD_INTERVENBNX2_TDMA_FTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
6401
 BNX2_TDMA_FTQ_CMD_ADD_DATABNX2_TDMA_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
6402
 BNX2_TDMA_FTQ_CMD_INTERVENE_CLRBNX2_TDMA_FTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
6403
 BNX2_TDMA_FTQ_CMD_POPBNX2_TDMA_FTQ_CMD_POP (1L<<30) bnx2.h 　
6404
 BNX2_TDMA_FTQ_CMD_BUSYBNX2_TDMA_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
6405
 BNX2_TDMA_FTQ_CTLBNX2_TDMA_FTQ_CTL 0x00005ffc bnx2.h 　
6406
 BNX2_TDMA_FTQ_CTL_INTERVENEBNX2_TDMA_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
6407
 BNX2_TDMA_FTQ_CTL_OVERFLOWBNX2_TDMA_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
6408
 BNX2_TDMA_FTQ_CTL_FORCE_INTERVEBNX2_TDMA_FTQ_CTL_FORCE_INTERVE (1L<<2) bnx2.h 　
6409
 BNX2_TDMA_FTQ_CTL_MAX_DEPTHBNX2_TDMA_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
6410
 BNX2_TDMA_FTQ_CTL_CUR_DEPTHBNX2_TDMA_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
6411
 BNX2_HC_COMMANDBNX2_HC_COMMAND 0x00006800 bnx2.h 　
6412
 BNX2_HC_COMMAND_ENABLEBNX2_HC_COMMAND_ENABLE (1L<<0) bnx2.h 　
6413
 BNX2_HC_COMMAND_SKIP_ABORTBNX2_HC_COMMAND_SKIP_ABORT (1L<<4) bnx2.h 　
6414
 BNX2_HC_COMMAND_COAL_NOWBNX2_HC_COMMAND_COAL_NOW (1L<<16) bnx2.h 　
6415
 BNX2_HC_COMMAND_COAL_NOW_WO_INTBNX2_HC_COMMAND_COAL_NOW_WO_INT (1L<<17) bnx2.h 　
6416
 BNX2_HC_COMMAND_STATS_NOWBNX2_HC_COMMAND_STATS_NOW (1L<<18) bnx2.h 　
6417
 BNX2_HC_COMMAND_FORCE_INTBNX2_HC_COMMAND_FORCE_INT (0x3L<<19) bnx2.h 　
6418
 BNX2_HC_COMMAND_FORCE_INT_NULLBNX2_HC_COMMAND_FORCE_INT_NULL (0L<<19) bnx2.h 　
6419
 BNX2_HC_COMMAND_FORCE_INT_HIGHBNX2_HC_COMMAND_FORCE_INT_HIGH (1L<<19) bnx2.h 　
6420
 BNX2_HC_COMMAND_FORCE_INT_LOWBNX2_HC_COMMAND_FORCE_INT_LOW (2L<<19) bnx2.h 　
6421
 BNX2_HC_COMMAND_FORCE_INT_FREEBNX2_HC_COMMAND_FORCE_INT_FREE (3L<<19) bnx2.h 　
6422
 BNX2_HC_COMMAND_CLR_STAT_NOWBNX2_HC_COMMAND_CLR_STAT_NOW (1L<<21) bnx2.h 　
6423
 BNX2_HC_STATUSBNX2_HC_STATUS 0x00006804 bnx2.h 　
6424
 BNX2_HC_STATUS_MASTER_ABORTBNX2_HC_STATUS_MASTER_ABORT (1L<<0) bnx2.h 　
6425
 BNX2_HC_STATUS_PARITY_ERROR_STABNX2_HC_STATUS_PARITY_ERROR_STA (1L<<1) bnx2.h 　
6426
 BNX2_HC_STATUS_PCI_CLK_CNT_STATBNX2_HC_STATUS_PCI_CLK_CNT_STAT (1L<<16) bnx2.h 　
6427
 BNX2_HC_STATUS_CORE_CLK_CNT_STABNX2_HC_STATUS_CORE_CLK_CNT_STA (1L<<17) bnx2.h 　
6428
 BNX2_HC_STATUS_NUM_STATUS_BLOCKBNX2_HC_STATUS_NUM_STATUS_BLOCK (1L<<18) bnx2.h 　
6429
 BNX2_HC_STATUS_NUM_INT_GEN_STATBNX2_HC_STATUS_NUM_INT_GEN_STAT (1L<<19) bnx2.h 　
6430
 BNX2_HC_STATUS_NUM_INT_MBOX_WR_BNX2_HC_STATUS_NUM_INT_MBOX_WR_ (1L<<20) bnx2.h 　
6431
 BNX2_HC_STATUS_CORE_CLKS_TO_HW_BNX2_HC_STATUS_CORE_CLKS_TO_HW_ (1L<<23) bnx2.h 　
6432
 BNX2_HC_STATUS_CORE_CLKS_TO_SW_BNX2_HC_STATUS_CORE_CLKS_TO_SW_ (1L<<24) bnx2.h 　
6433
 BNX2_HC_STATUS_CORE_CLKS_DURINGBNX2_HC_STATUS_CORE_CLKS_DURING (1L<<25) bnx2.h 　
6434
 BNX2_HC_CONFIGBNX2_HC_CONFIG 0x00006808 bnx2.h 　
6435
 BNX2_HC_CONFIG_COLLECT_STATSBNX2_HC_CONFIG_COLLECT_STATS (1L<<0) bnx2.h 　
6436
 BNX2_HC_CONFIG_RX_TMR_MODEBNX2_HC_CONFIG_RX_TMR_MODE (1L<<1) bnx2.h 　
6437
 BNX2_HC_CONFIG_TX_TMR_MODEBNX2_HC_CONFIG_TX_TMR_MODE (1L<<2) bnx2.h 　
6438
 BNX2_HC_CONFIG_COM_TMR_MODEBNX2_HC_CONFIG_COM_TMR_MODE (1L<<3) bnx2.h 　
6439
 BNX2_HC_CONFIG_CMD_TMR_MODEBNX2_HC_CONFIG_CMD_TMR_MODE (1L<<4) bnx2.h 　
6440
 BNX2_HC_CONFIG_STATISTIC_PRIORIBNX2_HC_CONFIG_STATISTIC_PRIORI (1L<<5) bnx2.h 　
6441
 BNX2_HC_CONFIG_STATUS_PRIORITYBNX2_HC_CONFIG_STATUS_PRIORITY (1L<<6) bnx2.h 　
6442
 BNX2_HC_CONFIG_STAT_MEM_ADDRBNX2_HC_CONFIG_STAT_MEM_ADDR (0xffL<<8) bnx2.h 　
6443
 BNX2_HC_ATTN_BITS_ENABLEBNX2_HC_ATTN_BITS_ENABLE 0x0000680c bnx2.h 　
6444
 BNX2_HC_STATUS_ADDR_LBNX2_HC_STATUS_ADDR_L 0x00006810 bnx2.h 　
6445
 BNX2_HC_STATUS_ADDR_HBNX2_HC_STATUS_ADDR_H 0x00006814 bnx2.h 　
6446
 BNX2_HC_STATISTICS_ADDR_LBNX2_HC_STATISTICS_ADDR_L 0x00006818 bnx2.h 　
6447
 BNX2_HC_STATISTICS_ADDR_HBNX2_HC_STATISTICS_ADDR_H 0x0000681c bnx2.h 　
6448
 BNX2_HC_TX_QUICK_CONS_TRIPBNX2_HC_TX_QUICK_CONS_TRIP 0x00006820 bnx2.h 　
6449
 BNX2_HC_TX_QUICK_CONS_TRIP_VALUBNX2_HC_TX_QUICK_CONS_TRIP_VALU (0xffL<<0) bnx2.h 　
6450
 BNX2_HC_TX_QUICK_CONS_TRIP_INTBNX2_HC_TX_QUICK_CONS_TRIP_INT (0xffL<<16) bnx2.h 　
6451
 BNX2_HC_COMP_PROD_TRIPBNX2_HC_COMP_PROD_TRIP 0x00006824 bnx2.h 　
6452
 BNX2_HC_COMP_PROD_TRIP_VALUEBNX2_HC_COMP_PROD_TRIP_VALUE (0xffL<<0) bnx2.h 　
6453
 BNX2_HC_COMP_PROD_TRIP_INTBNX2_HC_COMP_PROD_TRIP_INT (0xffL<<16) bnx2.h 　
6454
 BNX2_HC_RX_QUICK_CONS_TRIPBNX2_HC_RX_QUICK_CONS_TRIP 0x00006828 bnx2.h 　
6455
 BNX2_HC_RX_QUICK_CONS_TRIP_VALUBNX2_HC_RX_QUICK_CONS_TRIP_VALU (0xffL<<0) bnx2.h 　
6456
 BNX2_HC_RX_QUICK_CONS_TRIP_INTBNX2_HC_RX_QUICK_CONS_TRIP_INT (0xffL<<16) bnx2.h 　
6457
 BNX2_HC_RX_TICKSBNX2_HC_RX_TICKS 0x0000682c bnx2.h 　
6458
 BNX2_HC_RX_TICKS_VALUEBNX2_HC_RX_TICKS_VALUE (0x3ffL<<0) bnx2.h 　
6459
 BNX2_HC_RX_TICKS_INTBNX2_HC_RX_TICKS_INT (0x3ffL<<16) bnx2.h 　
6460
 BNX2_HC_TX_TICKSBNX2_HC_TX_TICKS 0x00006830 bnx2.h 　
6461
 BNX2_HC_TX_TICKS_VALUEBNX2_HC_TX_TICKS_VALUE (0x3ffL<<0) bnx2.h 　
6462
 BNX2_HC_TX_TICKS_INTBNX2_HC_TX_TICKS_INT (0x3ffL<<16) bnx2.h 　
6463
 BNX2_HC_COM_TICKSBNX2_HC_COM_TICKS 0x00006834 bnx2.h 　
6464
 BNX2_HC_COM_TICKS_VALUEBNX2_HC_COM_TICKS_VALUE (0x3ffL<<0) bnx2.h 　
6465
 BNX2_HC_COM_TICKS_INTBNX2_HC_COM_TICKS_INT (0x3ffL<<16) bnx2.h 　
6466
 BNX2_HC_CMD_TICKSBNX2_HC_CMD_TICKS 0x00006838 bnx2.h 　
6467
 BNX2_HC_CMD_TICKS_VALUEBNX2_HC_CMD_TICKS_VALUE (0x3ffL<<0) bnx2.h 　
6468
 BNX2_HC_CMD_TICKS_INTBNX2_HC_CMD_TICKS_INT (0x3ffL<<16) bnx2.h 　
6469
 BNX2_HC_PERIODIC_TICKSBNX2_HC_PERIODIC_TICKS 0x0000683c bnx2.h 　
6470
 BNX2_HC_PERIODIC_TICKS_HC_PERIOBNX2_HC_PERIODIC_TICKS_HC_PERIO (0xffffL<<0) bnx2.h 　
6471
 BNX2_HC_STAT_COLLECT_TICKSBNX2_HC_STAT_COLLECT_TICKS 0x00006840 bnx2.h 　
6472
 BNX2_HC_STAT_COLLECT_TICKS_HC_SBNX2_HC_STAT_COLLECT_TICKS_HC_S (0xffL<<4) bnx2.h 　
6473
 BNX2_HC_STATS_TICKSBNX2_HC_STATS_TICKS 0x00006844 bnx2.h 　
6474
 BNX2_HC_STATS_TICKS_HC_STAT_TICBNX2_HC_STATS_TICKS_HC_STAT_TIC (0xffffL<<8) bnx2.h 　
6475
 BNX2_HC_STAT_MEM_DATABNX2_HC_STAT_MEM_DATA 0x0000684c bnx2.h 　
6476
 BNX2_HC_STAT_GEN_SEL_0BNX2_HC_STAT_GEN_SEL_0 0x00006850 bnx2.h 　
6477
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (0x7fL<<0) bnx2.h 　
6478
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (0L<<0) bnx2.h 　
6479
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (1L<<0) bnx2.h 　
6480
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (2L<<0) bnx2.h 　
6481
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (3L<<0) bnx2.h 　
6482
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (4L<<0) bnx2.h 　
6483
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (5L<<0) bnx2.h 　
6484
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (6L<<0) bnx2.h 　
6485
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (7L<<0) bnx2.h 　
6486
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (8L<<0) bnx2.h 　
6487
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (9L<<0) bnx2.h 　
6488
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (10L<<0) bnx2.h 　
6489
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (11L<<0) bnx2.h 　
6490
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (12L<<0) bnx2.h 　
6491
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (13L<<0) bnx2.h 　
6492
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (14L<<0) bnx2.h 　
6493
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (15L<<0) bnx2.h 　
6494
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (16L<<0) bnx2.h 　
6495
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (17L<<0) bnx2.h 　
6496
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (18L<<0) bnx2.h 　
6497
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (19L<<0) bnx2.h 　
6498
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (20L<<0) bnx2.h 　
6499
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (21L<<0) bnx2.h 　
6500
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (22L<<0) bnx2.h 　
6501
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (23L<<0) bnx2.h 　
6502
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (24L<<0) bnx2.h 　
6503
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (25L<<0) bnx2.h 　
6504
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (26L<<0) bnx2.h 　
6505
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (27L<<0) bnx2.h 　
6506
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (28L<<0) bnx2.h 　
6507
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (29L<<0) bnx2.h 　
6508
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (30L<<0) bnx2.h 　
6509
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (31L<<0) bnx2.h 　
6510
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (32L<<0) bnx2.h 　
6511
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (33L<<0) bnx2.h 　
6512
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (34L<<0) bnx2.h 　
6513
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (35L<<0) bnx2.h 　
6514
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (36L<<0) bnx2.h 　
6515
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (37L<<0) bnx2.h 　
6516
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (38L<<0) bnx2.h 　
6517
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (39L<<0) bnx2.h 　
6518
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (40L<<0) bnx2.h 　
6519
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (41L<<0) bnx2.h 　
6520
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (42L<<0) bnx2.h 　
6521
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (43L<<0) bnx2.h 　
6522
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (44L<<0) bnx2.h 　
6523
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (45L<<0) bnx2.h 　
6524
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (46L<<0) bnx2.h 　
6525
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (47L<<0) bnx2.h 　
6526
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (48L<<0) bnx2.h 　
6527
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (49L<<0) bnx2.h 　
6528
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (50L<<0) bnx2.h 　
6529
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (51L<<0) bnx2.h 　
6530
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (52L<<0) bnx2.h 　
6531
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (53L<<0) bnx2.h 　
6532
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (54L<<0) bnx2.h 　
6533
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (55L<<0) bnx2.h 　
6534
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (56L<<0) bnx2.h 　
6535
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (59L<<0) bnx2.h 　
6536
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (60L<<0) bnx2.h 　
6537
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (61L<<0) bnx2.h 　
6538
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (62L<<0) bnx2.h 　
6539
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (63L<<0) bnx2.h 　
6540
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (64L<<0) bnx2.h 　
6541
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (65L<<0) bnx2.h 　
6542
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (66L<<0) bnx2.h 　
6543
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (67L<<0) bnx2.h 　
6544
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (68L<<0) bnx2.h 　
6545
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (69L<<0) bnx2.h 　
6546
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (70L<<0) bnx2.h 　
6547
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (71L<<0) bnx2.h 　
6548
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (72L<<0) bnx2.h 　
6549
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (73L<<0) bnx2.h 　
6550
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (74L<<0) bnx2.h 　
6551
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (75L<<0) bnx2.h 　
6552
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (76L<<0) bnx2.h 　
6553
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (77L<<0) bnx2.h 　
6554
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (78L<<0) bnx2.h 　
6555
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (79L<<0) bnx2.h 　
6556
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (80L<<0) bnx2.h 　
6557
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (81L<<0) bnx2.h 　
6558
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (82L<<0) bnx2.h 　
6559
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (83L<<0) bnx2.h 　
6560
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (84L<<0) bnx2.h 　
6561
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (85L<<0) bnx2.h 　
6562
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (86L<<0) bnx2.h 　
6563
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (87L<<0) bnx2.h 　
6564
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (88L<<0) bnx2.h 　
6565
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (89L<<0) bnx2.h 　
6566
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (90L<<0) bnx2.h 　
6567
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (91L<<0) bnx2.h 　
6568
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (92L<<0) bnx2.h 　
6569
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (93L<<0) bnx2.h 　
6570
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (94L<<0) bnx2.h 　
6571
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (95L<<0) bnx2.h 　
6572
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (96L<<0) bnx2.h 　
6573
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (97L<<0) bnx2.h 　
6574
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (98L<<0) bnx2.h 　
6575
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (99L<<0) bnx2.h 　
6576
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (100L<<0) bnx2.h 　
6577
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (101L<<0) bnx2.h 　
6578
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (102L<<0) bnx2.h 　
6579
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (103L<<0) bnx2.h 　
6580
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (104L<<0) bnx2.h 　
6581
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (105L<<0) bnx2.h 　
6582
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (106L<<0) bnx2.h 　
6583
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (107L<<0) bnx2.h 　
6584
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (108L<<0) bnx2.h 　
6585
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (109L<<0) bnx2.h 　
6586
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (110L<<0) bnx2.h 　
6587
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (111L<<0) bnx2.h 　
6588
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (112L<<0) bnx2.h 　
6589
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (113L<<0) bnx2.h 　
6590
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (114L<<0) bnx2.h 　
6591
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (115L<<0) bnx2.h 　
6592
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (116L<<0) bnx2.h 　
6593
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (117L<<0) bnx2.h 　
6594
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (118L<<0) bnx2.h 　
6595
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (119L<<0) bnx2.h 　
6596
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (120L<<0) bnx2.h 　
6597
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (121L<<0) bnx2.h 　
6598
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (122L<<0) bnx2.h 　
6599
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (127L<<0) bnx2.h 　
6600
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (0x7fL<<8) bnx2.h 　
6601
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (0x7fL<<16) bnx2.h 　
6602
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (0x7fL<<24) bnx2.h 　
6603
 BNX2_HC_STAT_GEN_SEL_1BNX2_HC_STAT_GEN_SEL_1 0x00006854 bnx2.h 　
6604
 BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_ (0x7fL<<0) bnx2.h 　
6605
 BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_ (0x7fL<<8) bnx2.h 　
6606
 BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_ (0x7fL<<16) bnx2.h 　
6607
 BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_ (0x7fL<<24) bnx2.h 　
6608
 BNX2_HC_STAT_GEN_SEL_2BNX2_HC_STAT_GEN_SEL_2 0x00006858 bnx2.h 　
6609
 BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_ (0x7fL<<0) bnx2.h 　
6610
 BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_ (0x7fL<<8) bnx2.h 　
6611
 BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_ (0x7fL<<16) bnx2.h 　
6612
 BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_ (0x7fL<<24) bnx2.h 　
6613
 BNX2_HC_STAT_GEN_SEL_3BNX2_HC_STAT_GEN_SEL_3 0x0000685c bnx2.h 　
6614
 BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_ (0x7fL<<0) bnx2.h 　
6615
 BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_ (0x7fL<<8) bnx2.h 　
6616
 BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_ (0x7fL<<16) bnx2.h 　
6617
 BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_ (0x7fL<<24) bnx2.h 　
6618
 BNX2_HC_STAT_GEN_STAT0BNX2_HC_STAT_GEN_STAT0 0x00006888 bnx2.h 　
6619
 BNX2_HC_STAT_GEN_STAT1BNX2_HC_STAT_GEN_STAT1 0x0000688c bnx2.h 　
6620
 BNX2_HC_STAT_GEN_STAT2BNX2_HC_STAT_GEN_STAT2 0x00006890 bnx2.h 　
6621
 BNX2_HC_STAT_GEN_STAT3BNX2_HC_STAT_GEN_STAT3 0x00006894 bnx2.h 　
6622
 BNX2_HC_STAT_GEN_STAT4BNX2_HC_STAT_GEN_STAT4 0x00006898 bnx2.h 　
6623
 BNX2_HC_STAT_GEN_STAT5BNX2_HC_STAT_GEN_STAT5 0x0000689c bnx2.h 　
6624
 BNX2_HC_STAT_GEN_STAT6BNX2_HC_STAT_GEN_STAT6 0x000068a0 bnx2.h 　
6625
 BNX2_HC_STAT_GEN_STAT7BNX2_HC_STAT_GEN_STAT7 0x000068a4 bnx2.h 　
6626
 BNX2_HC_STAT_GEN_STAT8BNX2_HC_STAT_GEN_STAT8 0x000068a8 bnx2.h 　
6627
 BNX2_HC_STAT_GEN_STAT9BNX2_HC_STAT_GEN_STAT9 0x000068ac bnx2.h 　
6628
 BNX2_HC_STAT_GEN_STAT10BNX2_HC_STAT_GEN_STAT10 0x000068b0 bnx2.h 　
6629
 BNX2_HC_STAT_GEN_STAT11BNX2_HC_STAT_GEN_STAT11 0x000068b4 bnx2.h 　
6630
 BNX2_HC_STAT_GEN_STAT12BNX2_HC_STAT_GEN_STAT12 0x000068b8 bnx2.h 　
6631
 BNX2_HC_STAT_GEN_STAT13BNX2_HC_STAT_GEN_STAT13 0x000068bc bnx2.h 　
6632
 BNX2_HC_STAT_GEN_STAT14BNX2_HC_STAT_GEN_STAT14 0x000068c0 bnx2.h 　
6633
 BNX2_HC_STAT_GEN_STAT15BNX2_HC_STAT_GEN_STAT15 0x000068c4 bnx2.h 　
6634
 BNX2_HC_STAT_GEN_STAT_AC0BNX2_HC_STAT_GEN_STAT_AC0 0x000068c8 bnx2.h 　
6635
 BNX2_HC_STAT_GEN_STAT_AC1BNX2_HC_STAT_GEN_STAT_AC1 0x000068cc bnx2.h 　
6636
 BNX2_HC_STAT_GEN_STAT_AC2BNX2_HC_STAT_GEN_STAT_AC2 0x000068d0 bnx2.h 　
6637
 BNX2_HC_STAT_GEN_STAT_AC3BNX2_HC_STAT_GEN_STAT_AC3 0x000068d4 bnx2.h 　
6638
 BNX2_HC_STAT_GEN_STAT_AC4BNX2_HC_STAT_GEN_STAT_AC4 0x000068d8 bnx2.h 　
6639
 BNX2_HC_STAT_GEN_STAT_AC5BNX2_HC_STAT_GEN_STAT_AC5 0x000068dc bnx2.h 　
6640
 BNX2_HC_STAT_GEN_STAT_AC6BNX2_HC_STAT_GEN_STAT_AC6 0x000068e0 bnx2.h 　
6641
 BNX2_HC_STAT_GEN_STAT_AC7BNX2_HC_STAT_GEN_STAT_AC7 0x000068e4 bnx2.h 　
6642
 BNX2_HC_STAT_GEN_STAT_AC8BNX2_HC_STAT_GEN_STAT_AC8 0x000068e8 bnx2.h 　
6643
 BNX2_HC_STAT_GEN_STAT_AC9BNX2_HC_STAT_GEN_STAT_AC9 0x000068ec bnx2.h 　
6644
 BNX2_HC_STAT_GEN_STAT_AC10BNX2_HC_STAT_GEN_STAT_AC10 0x000068f0 bnx2.h 　
6645
 BNX2_HC_STAT_GEN_STAT_AC11BNX2_HC_STAT_GEN_STAT_AC11 0x000068f4 bnx2.h 　
6646
 BNX2_HC_STAT_GEN_STAT_AC12BNX2_HC_STAT_GEN_STAT_AC12 0x000068f8 bnx2.h 　
6647
 BNX2_HC_STAT_GEN_STAT_AC13BNX2_HC_STAT_GEN_STAT_AC13 0x000068fc bnx2.h 　
6648
 BNX2_HC_STAT_GEN_STAT_AC14BNX2_HC_STAT_GEN_STAT_AC14 0x00006900 bnx2.h 　
6649
 BNX2_HC_STAT_GEN_STAT_AC15BNX2_HC_STAT_GEN_STAT_AC15 0x00006904 bnx2.h 　
6650
 BNX2_HC_VISBNX2_HC_VIS 0x00006908 bnx2.h 　
6651
 BNX2_HC_VIS_STAT_BUILD_STATEBNX2_HC_VIS_STAT_BUILD_STATE (0xfL<<0) bnx2.h 　
6652
 BNX2_HC_VIS_STAT_BUILD_STATE_IDBNX2_HC_VIS_STAT_BUILD_STATE_ID (0L<<0) bnx2.h 　
6653
 BNX2_HC_VIS_STAT_BUILD_STATE_STBNX2_HC_VIS_STAT_BUILD_STATE_ST (1L<<0) bnx2.h 　
6654
 BNX2_HC_VIS_STAT_BUILD_STATE_REBNX2_HC_VIS_STAT_BUILD_STATE_RE (2L<<0) bnx2.h 　
6655
 BNX2_HC_VIS_STAT_BUILD_STATE_UPBNX2_HC_VIS_STAT_BUILD_STATE_UP (3L<<0) bnx2.h 　
6656
 BNX2_HC_VIS_STAT_BUILD_STATE_UPBNX2_HC_VIS_STAT_BUILD_STATE_UP (4L<<0) bnx2.h 　
6657
 BNX2_HC_VIS_STAT_BUILD_STATE_UPBNX2_HC_VIS_STAT_BUILD_STATE_UP (5L<<0) bnx2.h 　
6658
 BNX2_HC_VIS_STAT_BUILD_STATE_DMBNX2_HC_VIS_STAT_BUILD_STATE_DM (6L<<0) bnx2.h 　
6659
 BNX2_HC_VIS_STAT_BUILD_STATE_MSBNX2_HC_VIS_STAT_BUILD_STATE_MS (7L<<0) bnx2.h 　
6660
 BNX2_HC_VIS_STAT_BUILD_STATE_MSBNX2_HC_VIS_STAT_BUILD_STATE_MS (8L<<0) bnx2.h 　
6661
 BNX2_HC_VIS_STAT_BUILD_STATE_MSBNX2_HC_VIS_STAT_BUILD_STATE_MS (9L<<0) bnx2.h 　
6662
 BNX2_HC_VIS_STAT_BUILD_STATE_MSBNX2_HC_VIS_STAT_BUILD_STATE_MS (10L<<0) bnx2.h 　
6663
 BNX2_HC_VIS_DMA_STAT_STATEBNX2_HC_VIS_DMA_STAT_STATE (0xfL<<8) bnx2.h 　
6664
 BNX2_HC_VIS_DMA_STAT_STATE_IDLEBNX2_HC_VIS_DMA_STAT_STATE_IDLE (0L<<8) bnx2.h 　
6665
 BNX2_HC_VIS_DMA_STAT_STATE_STATBNX2_HC_VIS_DMA_STAT_STATE_STAT (1L<<8) bnx2.h 　
6666
 BNX2_HC_VIS_DMA_STAT_STATE_STATBNX2_HC_VIS_DMA_STAT_STATE_STAT (2L<<8) bnx2.h 　
6667
 BNX2_HC_VIS_DMA_STAT_STATE_WRITBNX2_HC_VIS_DMA_STAT_STATE_WRIT (3L<<8) bnx2.h 　
6668
 BNX2_HC_VIS_DMA_STAT_STATE_COMPBNX2_HC_VIS_DMA_STAT_STATE_COMP (4L<<8) bnx2.h 　
6669
 BNX2_HC_VIS_DMA_STAT_STATE_STATBNX2_HC_VIS_DMA_STAT_STATE_STAT (5L<<8) bnx2.h 　
6670
 BNX2_HC_VIS_DMA_STAT_STATE_STATBNX2_HC_VIS_DMA_STAT_STATE_STAT (6L<<8) bnx2.h 　
6671
 BNX2_HC_VIS_DMA_STAT_STATE_WRITBNX2_HC_VIS_DMA_STAT_STATE_WRIT (7L<<8) bnx2.h 　
6672
 BNX2_HC_VIS_DMA_STAT_STATE_WRITBNX2_HC_VIS_DMA_STAT_STATE_WRIT (8L<<8) bnx2.h 　
6673
 BNX2_HC_VIS_DMA_STAT_STATE_WAITBNX2_HC_VIS_DMA_STAT_STATE_WAIT (9L<<8) bnx2.h 　
6674
 BNX2_HC_VIS_DMA_STAT_STATE_ABORBNX2_HC_VIS_DMA_STAT_STATE_ABOR (15L<<8) bnx2.h 　
6675
 BNX2_HC_VIS_DMA_MSI_STATEBNX2_HC_VIS_DMA_MSI_STATE (0x7L<<12) bnx2.h 　
6676
 BNX2_HC_VIS_STATISTIC_DMA_EN_STBNX2_HC_VIS_STATISTIC_DMA_EN_ST (0x3L<<15) bnx2.h 　
6677
 BNX2_HC_VIS_STATISTIC_DMA_EN_STBNX2_HC_VIS_STATISTIC_DMA_EN_ST (0L<<15) bnx2.h 　
6678
 BNX2_HC_VIS_STATISTIC_DMA_EN_STBNX2_HC_VIS_STATISTIC_DMA_EN_ST (1L<<15) bnx2.h 　
6679
 BNX2_HC_VIS_STATISTIC_DMA_EN_STBNX2_HC_VIS_STATISTIC_DMA_EN_ST (2L<<15) bnx2.h 　
6680
 BNX2_HC_VIS_1BNX2_HC_VIS_1 0x0000690c bnx2.h 　
6681
 BNX2_HC_VIS_1_HW_INTACK_STATEBNX2_HC_VIS_1_HW_INTACK_STATE (1L<<4) bnx2.h 　
6682
 BNX2_HC_VIS_1_HW_INTACK_STATE_IBNX2_HC_VIS_1_HW_INTACK_STATE_I (0L<<4) bnx2.h 　
6683
 BNX2_HC_VIS_1_HW_INTACK_STATE_CBNX2_HC_VIS_1_HW_INTACK_STATE_C (1L<<4) bnx2.h 　
6684
 BNX2_HC_VIS_1_SW_INTACK_STATEBNX2_HC_VIS_1_SW_INTACK_STATE (1L<<5) bnx2.h 　
6685
 BNX2_HC_VIS_1_SW_INTACK_STATE_IBNX2_HC_VIS_1_SW_INTACK_STATE_I (0L<<5) bnx2.h 　
6686
 BNX2_HC_VIS_1_SW_INTACK_STATE_CBNX2_HC_VIS_1_SW_INTACK_STATE_C (1L<<5) bnx2.h 　
6687
 BNX2_HC_VIS_1_DURING_SW_INTACK_BNX2_HC_VIS_1_DURING_SW_INTACK_ (1L<<6) bnx2.h 　
6688
 BNX2_HC_VIS_1_DURING_SW_INTACK_BNX2_HC_VIS_1_DURING_SW_INTACK_ (0L<<6) bnx2.h 　
6689
 BNX2_HC_VIS_1_DURING_SW_INTACK_BNX2_HC_VIS_1_DURING_SW_INTACK_ (1L<<6) bnx2.h 　
6690
 BNX2_HC_VIS_1_MAILBOX_COUNT_STABNX2_HC_VIS_1_MAILBOX_COUNT_STA (1L<<7) bnx2.h 　
6691
 BNX2_HC_VIS_1_MAILBOX_COUNT_STABNX2_HC_VIS_1_MAILBOX_COUNT_STA (0L<<7) bnx2.h 　
6692
 BNX2_HC_VIS_1_MAILBOX_COUNT_STABNX2_HC_VIS_1_MAILBOX_COUNT_STA (1L<<7) bnx2.h 　
6693
 BNX2_HC_VIS_1_RAM_RD_ARB_STATEBNX2_HC_VIS_1_RAM_RD_ARB_STATE (0xfL<<17) bnx2.h 　
6694
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (0L<<17) bnx2.h 　
6695
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (1L<<17) bnx2.h 　
6696
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (2L<<17) bnx2.h 　
6697
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (3L<<17) bnx2.h 　
6698
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (4L<<17) bnx2.h 　
6699
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (5L<<17) bnx2.h 　
6700
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (6L<<17) bnx2.h 　
6701
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (7L<<17) bnx2.h 　
6702
 BNX2_HC_VIS_1_RAM_WR_ARB_STATEBNX2_HC_VIS_1_RAM_WR_ARB_STATE (0x3L<<21) bnx2.h 　
6703
 BNX2_HC_VIS_1_RAM_WR_ARB_STATE_BNX2_HC_VIS_1_RAM_WR_ARB_STATE_ (0L<<21) bnx2.h 　
6704
 BNX2_HC_VIS_1_RAM_WR_ARB_STATE_BNX2_HC_VIS_1_RAM_WR_ARB_STATE_ (1L<<21) bnx2.h 　
6705
 BNX2_HC_VIS_1_INT_GEN_STATEBNX2_HC_VIS_1_INT_GEN_STATE (1L<<23) bnx2.h 　
6706
 BNX2_HC_VIS_1_INT_GEN_STATE_DLEBNX2_HC_VIS_1_INT_GEN_STATE_DLE (0L<<23) bnx2.h 　
6707
 BNX2_HC_VIS_1_INT_GEN_STATE_NTEBNX2_HC_VIS_1_INT_GEN_STATE_NTE (1L<<23) bnx2.h 　
6708
 BNX2_HC_VIS_1_STAT_CHAN_IDBNX2_HC_VIS_1_STAT_CHAN_ID (0x7L<<24) bnx2.h 　
6709
 BNX2_HC_VIS_1_INT_BBNX2_HC_VIS_1_INT_B (1L<<27) bnx2.h 　
6710
 BNX2_HC_DEBUG_VECT_PEEKBNX2_HC_DEBUG_VECT_PEEK 0x00006910 bnx2.h 　
6711
 BNX2_HC_DEBUG_VECT_PEEK_1_VALUEBNX2_HC_DEBUG_VECT_PEEK_1_VALUE (0x7ffL<<0) bnx2.h 　
6712
 BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_ (1L<<11) bnx2.h 　
6713
 BNX2_HC_DEBUG_VECT_PEEK_1_SELBNX2_HC_DEBUG_VECT_PEEK_1_SEL (0xfL<<12) bnx2.h 　
6714
 BNX2_HC_DEBUG_VECT_PEEK_2_VALUEBNX2_HC_DEBUG_VECT_PEEK_2_VALUE (0x7ffL<<16) bnx2.h 　
6715
 BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_ (1L<<27) bnx2.h 　
6716
 BNX2_HC_DEBUG_VECT_PEEK_2_SELBNX2_HC_DEBUG_VECT_PEEK_2_SEL (0xfL<<28) bnx2.h 　
6717
 BNX2_TXP_CPU_MODEBNX2_TXP_CPU_MODE 0x00045000 bnx2.h 　
6718
 BNX2_TXP_CPU_MODE_LOCAL_RSTBNX2_TXP_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
6719
 BNX2_TXP_CPU_MODE_STEP_ENABNX2_TXP_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
6720
 BNX2_TXP_CPU_MODE_PAGE_0_DATA_EBNX2_TXP_CPU_MODE_PAGE_0_DATA_E (1L<<2) bnx2.h 　
6721
 BNX2_TXP_CPU_MODE_PAGE_0_INST_EBNX2_TXP_CPU_MODE_PAGE_0_INST_E (1L<<3) bnx2.h 　
6722
 BNX2_TXP_CPU_MODE_MSG_BIT1BNX2_TXP_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
6723
 BNX2_TXP_CPU_MODE_INTERRUPT_ENABNX2_TXP_CPU_MODE_INTERRUPT_ENA (1L<<7) bnx2.h 　
6724
 BNX2_TXP_CPU_MODE_SOFT_HALTBNX2_TXP_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
6725
 BNX2_TXP_CPU_MODE_BAD_DATA_HALTBNX2_TXP_CPU_MODE_BAD_DATA_HALT (1L<<11) bnx2.h 　
6726
 BNX2_TXP_CPU_MODE_BAD_INST_HALTBNX2_TXP_CPU_MODE_BAD_INST_HALT (1L<<12) bnx2.h 　
6727
 BNX2_TXP_CPU_MODE_FIO_ABORT_HALBNX2_TXP_CPU_MODE_FIO_ABORT_HAL (1L<<13) bnx2.h 　
6728
 BNX2_TXP_CPU_MODE_SPAD_UNDERFLOBNX2_TXP_CPU_MODE_SPAD_UNDERFLO (1L<<15) bnx2.h 　
6729
 BNX2_TXP_CPU_STATEBNX2_TXP_CPU_STATE 0x00045004 bnx2.h 　
6730
 BNX2_TXP_CPU_STATE_BREAKPOINTBNX2_TXP_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
6731
 BNX2_TXP_CPU_STATE_BAD_INST_HALBNX2_TXP_CPU_STATE_BAD_INST_HAL (1L<<2) bnx2.h 　
6732
 BNX2_TXP_CPU_STATE_PAGE_0_DATA_BNX2_TXP_CPU_STATE_PAGE_0_DATA_ (1L<<3) bnx2.h 　
6733
 BNX2_TXP_CPU_STATE_PAGE_0_INST_BNX2_TXP_CPU_STATE_PAGE_0_INST_ (1L<<4) bnx2.h 　
6734
 BNX2_TXP_CPU_STATE_BAD_DATA_ADDBNX2_TXP_CPU_STATE_BAD_DATA_ADD (1L<<5) bnx2.h 　
6735
 BNX2_TXP_CPU_STATE_BAD_pc_HALTEBNX2_TXP_CPU_STATE_BAD_pc_HALTE (1L<<6) bnx2.h 　
6736
 BNX2_TXP_CPU_STATE_ALIGN_HALTEDBNX2_TXP_CPU_STATE_ALIGN_HALTED (1L<<7) bnx2.h 　
6737
 BNX2_TXP_CPU_STATE_FIO_ABORT_HABNX2_TXP_CPU_STATE_FIO_ABORT_HA (1L<<8) bnx2.h 　
6738
 BNX2_TXP_CPU_STATE_SOFT_HALTEDBNX2_TXP_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
6739
 BNX2_TXP_CPU_STATE_SPAD_UNDERFLBNX2_TXP_CPU_STATE_SPAD_UNDERFL (1L<<11) bnx2.h 　
6740
 BNX2_TXP_CPU_STATE_INTERRRUPTBNX2_TXP_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
6741
 BNX2_TXP_CPU_STATE_DATA_ACCESS_BNX2_TXP_CPU_STATE_DATA_ACCESS_ (1L<<14) bnx2.h 　
6742
 BNX2_TXP_CPU_STATE_INST_FETCH_SBNX2_TXP_CPU_STATE_INST_FETCH_S (1L<<15) bnx2.h 　
6743
 BNX2_TXP_CPU_STATE_BLOCKED_READBNX2_TXP_CPU_STATE_BLOCKED_READ (1L<<31) bnx2.h 　
6744
 BNX2_TXP_CPU_EVENT_MASKBNX2_TXP_CPU_EVENT_MASK 0x00045008 bnx2.h 　
6745
 BNX2_TXP_CPU_EVENT_MASK_BREAKPOBNX2_TXP_CPU_EVENT_MASK_BREAKPO (1L<<0) bnx2.h 　
6746
 BNX2_TXP_CPU_EVENT_MASK_BAD_INSBNX2_TXP_CPU_EVENT_MASK_BAD_INS (1L<<2) bnx2.h 　
6747
 BNX2_TXP_CPU_EVENT_MASK_PAGE_0_BNX2_TXP_CPU_EVENT_MASK_PAGE_0_ (1L<<3) bnx2.h 　
6748
 BNX2_TXP_CPU_EVENT_MASK_PAGE_0_BNX2_TXP_CPU_EVENT_MASK_PAGE_0_ (1L<<4) bnx2.h 　
6749
 BNX2_TXP_CPU_EVENT_MASK_BAD_DATBNX2_TXP_CPU_EVENT_MASK_BAD_DAT (1L<<5) bnx2.h 　
6750
 BNX2_TXP_CPU_EVENT_MASK_BAD_PC_BNX2_TXP_CPU_EVENT_MASK_BAD_PC_ (1L<<6) bnx2.h 　
6751
 BNX2_TXP_CPU_EVENT_MASK_ALIGN_HBNX2_TXP_CPU_EVENT_MASK_ALIGN_H (1L<<7) bnx2.h 　
6752
 BNX2_TXP_CPU_EVENT_MASK_FIO_ABOBNX2_TXP_CPU_EVENT_MASK_FIO_ABO (1L<<8) bnx2.h 　
6753
 BNX2_TXP_CPU_EVENT_MASK_SOFT_HABNX2_TXP_CPU_EVENT_MASK_SOFT_HA (1L<<10) bnx2.h 　
6754
 BNX2_TXP_CPU_EVENT_MASK_SPAD_UNBNX2_TXP_CPU_EVENT_MASK_SPAD_UN (1L<<11) bnx2.h 　
6755
 BNX2_TXP_CPU_EVENT_MASK_INTERRUBNX2_TXP_CPU_EVENT_MASK_INTERRU (1L<<12) bnx2.h 　
6756
 BNX2_TXP_CPU_PROGRAM_COUNTERBNX2_TXP_CPU_PROGRAM_COUNTER 0x0004501c bnx2.h 　
6757
 BNX2_TXP_CPU_INSTRUCTIONBNX2_TXP_CPU_INSTRUCTION 0x00045020 bnx2.h 　
6758
 BNX2_TXP_CPU_DATA_ACCESSBNX2_TXP_CPU_DATA_ACCESS 0x00045024 bnx2.h 　
6759
 BNX2_TXP_CPU_INTERRUPT_ENABLEBNX2_TXP_CPU_INTERRUPT_ENABLE 0x00045028 bnx2.h 　
6760
 BNX2_TXP_CPU_INTERRUPT_VECTORBNX2_TXP_CPU_INTERRUPT_VECTOR 0x0004502c bnx2.h 　
6761
 BNX2_TXP_CPU_INTERRUPT_SAVED_PCBNX2_TXP_CPU_INTERRUPT_SAVED_PC 0x00045030 bnx2.h 　
6762
 BNX2_TXP_CPU_HW_BREAKPOINTBNX2_TXP_CPU_HW_BREAKPOINT 0x00045034 bnx2.h 　
6763
 BNX2_TXP_CPU_HW_BREAKPOINT_DISABNX2_TXP_CPU_HW_BREAKPOINT_DISA (1L<<0) bnx2.h 　
6764
 BNX2_TXP_CPU_HW_BREAKPOINT_ADDRBNX2_TXP_CPU_HW_BREAKPOINT_ADDR (0x3fffffffL<<2) bnx2.h 　
6765
 BNX2_TXP_CPU_DEBUG_VECT_PEEKBNX2_TXP_CPU_DEBUG_VECT_PEEK 0x00045038 bnx2.h 　
6766
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_ (0x7ffL<<0) bnx2.h 　
6767
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_ (1L<<11) bnx2.h 　
6768
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_ (0xfL<<12) bnx2.h 　
6769
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_ (0x7ffL<<16) bnx2.h 　
6770
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_ (1L<<27) bnx2.h 　
6771
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_ (0xfL<<28) bnx2.h 　
6772
 BNX2_TXP_CPU_LAST_BRANCH_ADDRBNX2_TXP_CPU_LAST_BRANCH_ADDR 0x00045048 bnx2.h 　
6773
 BNX2_TXP_CPU_LAST_BRANCH_ADDR_TBNX2_TXP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
6774
 BNX2_TXP_CPU_LAST_BRANCH_ADDR_TBNX2_TXP_CPU_LAST_BRANCH_ADDR_T (0L<<1) bnx2.h 　
6775
 BNX2_TXP_CPU_LAST_BRANCH_ADDR_TBNX2_TXP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
6776
 BNX2_TXP_CPU_LAST_BRANCH_ADDR_LBNX2_TXP_CPU_LAST_BRANCH_ADDR_L (0x3fffffffL<<2) bnx2.h 　
6777
 BNX2_TXP_CPU_REG_FILEBNX2_TXP_CPU_REG_FILE 0x00045200 bnx2.h 　
6778
 BNX2_TXP_FTQ_DATABNX2_TXP_FTQ_DATA 0x000453c0 bnx2.h 　
6779
 BNX2_TXP_FTQ_CMDBNX2_TXP_FTQ_CMD 0x000453f8 bnx2.h 　
6780
 BNX2_TXP_FTQ_CMD_OFFSETBNX2_TXP_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
6781
 BNX2_TXP_FTQ_CMD_WR_TOPBNX2_TXP_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
6782
 BNX2_TXP_FTQ_CMD_WR_TOP_0BNX2_TXP_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
6783
 BNX2_TXP_FTQ_CMD_WR_TOP_1BNX2_TXP_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
6784
 BNX2_TXP_FTQ_CMD_SFT_RESETBNX2_TXP_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
6785
 BNX2_TXP_FTQ_CMD_RD_DATABNX2_TXP_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
6786
 BNX2_TXP_FTQ_CMD_ADD_INTERVENBNX2_TXP_FTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
6787
 BNX2_TXP_FTQ_CMD_ADD_DATABNX2_TXP_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
6788
 BNX2_TXP_FTQ_CMD_INTERVENE_CLRBNX2_TXP_FTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
6789
 BNX2_TXP_FTQ_CMD_POPBNX2_TXP_FTQ_CMD_POP (1L<<30) bnx2.h 　
6790
 BNX2_TXP_FTQ_CMD_BUSYBNX2_TXP_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
6791
 BNX2_TXP_FTQ_CTLBNX2_TXP_FTQ_CTL 0x000453fc bnx2.h 　
6792
 BNX2_TXP_FTQ_CTL_INTERVENEBNX2_TXP_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
6793
 BNX2_TXP_FTQ_CTL_OVERFLOWBNX2_TXP_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
6794
 BNX2_TXP_FTQ_CTL_FORCE_INTERVENBNX2_TXP_FTQ_CTL_FORCE_INTERVEN (1L<<2) bnx2.h 　
6795
 BNX2_TXP_FTQ_CTL_MAX_DEPTHBNX2_TXP_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
6796
 BNX2_TXP_FTQ_CTL_CUR_DEPTHBNX2_TXP_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
6797
 BNX2_TXP_SCRATCHBNX2_TXP_SCRATCH 0x00060000 bnx2.h 　
6798
 BNX2_TPAT_CPU_MODEBNX2_TPAT_CPU_MODE 0x00085000 bnx2.h 　
6799
 BNX2_TPAT_CPU_MODE_LOCAL_RSTBNX2_TPAT_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
6800
 BNX2_TPAT_CPU_MODE_STEP_ENABNX2_TPAT_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
6801
 BNX2_TPAT_CPU_MODE_PAGE_0_DATA_BNX2_TPAT_CPU_MODE_PAGE_0_DATA_ (1L<<2) bnx2.h 　
6802
 BNX2_TPAT_CPU_MODE_PAGE_0_INST_BNX2_TPAT_CPU_MODE_PAGE_0_INST_ (1L<<3) bnx2.h 　
6803
 BNX2_TPAT_CPU_MODE_MSG_BIT1BNX2_TPAT_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
6804
 BNX2_TPAT_CPU_MODE_INTERRUPT_ENBNX2_TPAT_CPU_MODE_INTERRUPT_EN (1L<<7) bnx2.h 　
6805
 BNX2_TPAT_CPU_MODE_SOFT_HALTBNX2_TPAT_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
6806
 BNX2_TPAT_CPU_MODE_BAD_DATA_HALBNX2_TPAT_CPU_MODE_BAD_DATA_HAL (1L<<11) bnx2.h 　
6807
 BNX2_TPAT_CPU_MODE_BAD_INST_HALBNX2_TPAT_CPU_MODE_BAD_INST_HAL (1L<<12) bnx2.h 　
6808
 BNX2_TPAT_CPU_MODE_FIO_ABORT_HABNX2_TPAT_CPU_MODE_FIO_ABORT_HA (1L<<13) bnx2.h 　
6809
 BNX2_TPAT_CPU_MODE_SPAD_UNDERFLBNX2_TPAT_CPU_MODE_SPAD_UNDERFL (1L<<15) bnx2.h 　
6810
 BNX2_TPAT_CPU_STATEBNX2_TPAT_CPU_STATE 0x00085004 bnx2.h 　
6811
 BNX2_TPAT_CPU_STATE_BREAKPOINTBNX2_TPAT_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
6812
 BNX2_TPAT_CPU_STATE_BAD_INST_HABNX2_TPAT_CPU_STATE_BAD_INST_HA (1L<<2) bnx2.h 　
6813
 BNX2_TPAT_CPU_STATE_PAGE_0_DATABNX2_TPAT_CPU_STATE_PAGE_0_DATA (1L<<3) bnx2.h 　
6814
 BNX2_TPAT_CPU_STATE_PAGE_0_INSTBNX2_TPAT_CPU_STATE_PAGE_0_INST (1L<<4) bnx2.h 　
6815
 BNX2_TPAT_CPU_STATE_BAD_DATA_ADBNX2_TPAT_CPU_STATE_BAD_DATA_AD (1L<<5) bnx2.h 　
6816
 BNX2_TPAT_CPU_STATE_BAD_pc_HALTBNX2_TPAT_CPU_STATE_BAD_pc_HALT (1L<<6) bnx2.h 　
6817
 BNX2_TPAT_CPU_STATE_ALIGN_HALTEBNX2_TPAT_CPU_STATE_ALIGN_HALTE (1L<<7) bnx2.h 　
6818
 BNX2_TPAT_CPU_STATE_FIO_ABORT_HBNX2_TPAT_CPU_STATE_FIO_ABORT_H (1L<<8) bnx2.h 　
6819
 BNX2_TPAT_CPU_STATE_SOFT_HALTEDBNX2_TPAT_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
6820
 BNX2_TPAT_CPU_STATE_SPAD_UNDERFBNX2_TPAT_CPU_STATE_SPAD_UNDERF (1L<<11) bnx2.h 　
6821
 BNX2_TPAT_CPU_STATE_INTERRRUPTBNX2_TPAT_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
6822
 BNX2_TPAT_CPU_STATE_DATA_ACCESSBNX2_TPAT_CPU_STATE_DATA_ACCESS (1L<<14) bnx2.h 　
6823
 BNX2_TPAT_CPU_STATE_INST_FETCH_BNX2_TPAT_CPU_STATE_INST_FETCH_ (1L<<15) bnx2.h 　
6824
 BNX2_TPAT_CPU_STATE_BLOCKED_REABNX2_TPAT_CPU_STATE_BLOCKED_REA (1L<<31) bnx2.h 　
6825
 BNX2_TPAT_CPU_EVENT_MASKBNX2_TPAT_CPU_EVENT_MASK 0x00085008 bnx2.h 　
6826
 BNX2_TPAT_CPU_EVENT_MASK_BREAKPBNX2_TPAT_CPU_EVENT_MASK_BREAKP (1L<<0) bnx2.h 　
6827
 BNX2_TPAT_CPU_EVENT_MASK_BAD_INBNX2_TPAT_CPU_EVENT_MASK_BAD_IN (1L<<2) bnx2.h 　
6828
 BNX2_TPAT_CPU_EVENT_MASK_PAGE_0BNX2_TPAT_CPU_EVENT_MASK_PAGE_0 (1L<<3) bnx2.h 　
6829
 BNX2_TPAT_CPU_EVENT_MASK_PAGE_0BNX2_TPAT_CPU_EVENT_MASK_PAGE_0 (1L<<4) bnx2.h 　
6830
 BNX2_TPAT_CPU_EVENT_MASK_BAD_DABNX2_TPAT_CPU_EVENT_MASK_BAD_DA (1L<<5) bnx2.h 　
6831
 BNX2_TPAT_CPU_EVENT_MASK_BAD_PCBNX2_TPAT_CPU_EVENT_MASK_BAD_PC (1L<<6) bnx2.h 　
6832
 BNX2_TPAT_CPU_EVENT_MASK_ALIGN_BNX2_TPAT_CPU_EVENT_MASK_ALIGN_ (1L<<7) bnx2.h 　
6833
 BNX2_TPAT_CPU_EVENT_MASK_FIO_ABBNX2_TPAT_CPU_EVENT_MASK_FIO_AB (1L<<8) bnx2.h 　
6834
 BNX2_TPAT_CPU_EVENT_MASK_SOFT_HBNX2_TPAT_CPU_EVENT_MASK_SOFT_H (1L<<10) bnx2.h 　
6835
 BNX2_TPAT_CPU_EVENT_MASK_SPAD_UBNX2_TPAT_CPU_EVENT_MASK_SPAD_U (1L<<11) bnx2.h 　
6836
 BNX2_TPAT_CPU_EVENT_MASK_INTERRBNX2_TPAT_CPU_EVENT_MASK_INTERR (1L<<12) bnx2.h 　
6837
 BNX2_TPAT_CPU_PROGRAM_COUNTERBNX2_TPAT_CPU_PROGRAM_COUNTER 0x0008501c bnx2.h 　
6838
 BNX2_TPAT_CPU_INSTRUCTIONBNX2_TPAT_CPU_INSTRUCTION 0x00085020 bnx2.h 　
6839
 BNX2_TPAT_CPU_DATA_ACCESSBNX2_TPAT_CPU_DATA_ACCESS 0x00085024 bnx2.h 　
6840
 BNX2_TPAT_CPU_INTERRUPT_ENABLEBNX2_TPAT_CPU_INTERRUPT_ENABLE 0x00085028 bnx2.h 　
6841
 BNX2_TPAT_CPU_INTERRUPT_VECTORBNX2_TPAT_CPU_INTERRUPT_VECTOR 0x0008502c bnx2.h 　
6842
 BNX2_TPAT_CPU_INTERRUPT_SAVED_PBNX2_TPAT_CPU_INTERRUPT_SAVED_P 0x00085030 bnx2.h 　
6843
 BNX2_TPAT_CPU_HW_BREAKPOINTBNX2_TPAT_CPU_HW_BREAKPOINT 0x00085034 bnx2.h 　
6844
 BNX2_TPAT_CPU_HW_BREAKPOINT_DISBNX2_TPAT_CPU_HW_BREAKPOINT_DIS (1L<<0) bnx2.h 　
6845
 BNX2_TPAT_CPU_HW_BREAKPOINT_ADDBNX2_TPAT_CPU_HW_BREAKPOINT_ADD (0x3fffffffL<<2) bnx2.h 　
6846
 BNX2_TPAT_CPU_DEBUG_VECT_PEEKBNX2_TPAT_CPU_DEBUG_VECT_PEEK 0x00085038 bnx2.h 　
6847
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1 (0x7ffL<<0) bnx2.h 　
6848
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1 (1L<<11) bnx2.h 　
6849
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1 (0xfL<<12) bnx2.h 　
6850
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2 (0x7ffL<<16) bnx2.h 　
6851
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2 (1L<<27) bnx2.h 　
6852
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2 (0xfL<<28) bnx2.h 　
6853
 BNX2_TPAT_CPU_LAST_BRANCH_ADDRBNX2_TPAT_CPU_LAST_BRANCH_ADDR 0x00085048 bnx2.h 　
6854
 BNX2_TPAT_CPU_LAST_BRANCH_ADDR_BNX2_TPAT_CPU_LAST_BRANCH_ADDR_ (1L<<1) bnx2.h 　
6855
 BNX2_TPAT_CPU_LAST_BRANCH_ADDR_BNX2_TPAT_CPU_LAST_BRANCH_ADDR_ (0L<<1) bnx2.h 　
6856
 BNX2_TPAT_CPU_LAST_BRANCH_ADDR_BNX2_TPAT_CPU_LAST_BRANCH_ADDR_ (1L<<1) bnx2.h 　
6857
 BNX2_TPAT_CPU_LAST_BRANCH_ADDR_BNX2_TPAT_CPU_LAST_BRANCH_ADDR_ (0x3fffffffL<<2) bnx2.h 　
6858
 BNX2_TPAT_CPU_REG_FILEBNX2_TPAT_CPU_REG_FILE 0x00085200 bnx2.h 　
6859
 BNX2_TPAT_FTQ_DATABNX2_TPAT_FTQ_DATA 0x000853c0 bnx2.h 　
6860
 BNX2_TPAT_FTQ_CMDBNX2_TPAT_FTQ_CMD 0x000853f8 bnx2.h 　
6861
 BNX2_TPAT_FTQ_CMD_OFFSETBNX2_TPAT_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
6862
 BNX2_TPAT_FTQ_CMD_WR_TOPBNX2_TPAT_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
6863
 BNX2_TPAT_FTQ_CMD_WR_TOP_0BNX2_TPAT_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
6864
 BNX2_TPAT_FTQ_CMD_WR_TOP_1BNX2_TPAT_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
6865
 BNX2_TPAT_FTQ_CMD_SFT_RESETBNX2_TPAT_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
6866
 BNX2_TPAT_FTQ_CMD_RD_DATABNX2_TPAT_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
6867
 BNX2_TPAT_FTQ_CMD_ADD_INTERVENBNX2_TPAT_FTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
6868
 BNX2_TPAT_FTQ_CMD_ADD_DATABNX2_TPAT_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
6869
 BNX2_TPAT_FTQ_CMD_INTERVENE_CLRBNX2_TPAT_FTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
6870
 BNX2_TPAT_FTQ_CMD_POPBNX2_TPAT_FTQ_CMD_POP (1L<<30) bnx2.h 　
6871
 BNX2_TPAT_FTQ_CMD_BUSYBNX2_TPAT_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
6872
 BNX2_TPAT_FTQ_CTLBNX2_TPAT_FTQ_CTL 0x000853fc bnx2.h 　
6873
 BNX2_TPAT_FTQ_CTL_INTERVENEBNX2_TPAT_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
6874
 BNX2_TPAT_FTQ_CTL_OVERFLOWBNX2_TPAT_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
6875
 BNX2_TPAT_FTQ_CTL_FORCE_INTERVEBNX2_TPAT_FTQ_CTL_FORCE_INTERVE (1L<<2) bnx2.h 　
6876
 BNX2_TPAT_FTQ_CTL_MAX_DEPTHBNX2_TPAT_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
6877
 BNX2_TPAT_FTQ_CTL_CUR_DEPTHBNX2_TPAT_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
6878
 BNX2_TPAT_SCRATCHBNX2_TPAT_SCRATCH 0x000a0000 bnx2.h 　
6879
 BNX2_RXP_CPU_MODEBNX2_RXP_CPU_MODE 0x000c5000 bnx2.h 　
6880
 BNX2_RXP_CPU_MODE_LOCAL_RSTBNX2_RXP_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
6881
 BNX2_RXP_CPU_MODE_STEP_ENABNX2_RXP_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
6882
 BNX2_RXP_CPU_MODE_PAGE_0_DATA_EBNX2_RXP_CPU_MODE_PAGE_0_DATA_E (1L<<2) bnx2.h 　
6883
 BNX2_RXP_CPU_MODE_PAGE_0_INST_EBNX2_RXP_CPU_MODE_PAGE_0_INST_E (1L<<3) bnx2.h 　
6884
 BNX2_RXP_CPU_MODE_MSG_BIT1BNX2_RXP_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
6885
 BNX2_RXP_CPU_MODE_INTERRUPT_ENABNX2_RXP_CPU_MODE_INTERRUPT_ENA (1L<<7) bnx2.h 　
6886
 BNX2_RXP_CPU_MODE_SOFT_HALTBNX2_RXP_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
6887
 BNX2_RXP_CPU_MODE_BAD_DATA_HALTBNX2_RXP_CPU_MODE_BAD_DATA_HALT (1L<<11) bnx2.h 　
6888
 BNX2_RXP_CPU_MODE_BAD_INST_HALTBNX2_RXP_CPU_MODE_BAD_INST_HALT (1L<<12) bnx2.h 　
6889
 BNX2_RXP_CPU_MODE_FIO_ABORT_HALBNX2_RXP_CPU_MODE_FIO_ABORT_HAL (1L<<13) bnx2.h 　
6890
 BNX2_RXP_CPU_MODE_SPAD_UNDERFLOBNX2_RXP_CPU_MODE_SPAD_UNDERFLO (1L<<15) bnx2.h 　
6891
 BNX2_RXP_CPU_STATEBNX2_RXP_CPU_STATE 0x000c5004 bnx2.h 　
6892
 BNX2_RXP_CPU_STATE_BREAKPOINTBNX2_RXP_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
6893
 BNX2_RXP_CPU_STATE_BAD_INST_HALBNX2_RXP_CPU_STATE_BAD_INST_HAL (1L<<2) bnx2.h 　
6894
 BNX2_RXP_CPU_STATE_PAGE_0_DATA_BNX2_RXP_CPU_STATE_PAGE_0_DATA_ (1L<<3) bnx2.h 　
6895
 BNX2_RXP_CPU_STATE_PAGE_0_INST_BNX2_RXP_CPU_STATE_PAGE_0_INST_ (1L<<4) bnx2.h 　
6896
 BNX2_RXP_CPU_STATE_BAD_DATA_ADDBNX2_RXP_CPU_STATE_BAD_DATA_ADD (1L<<5) bnx2.h 　
6897
 BNX2_RXP_CPU_STATE_BAD_pc_HALTEBNX2_RXP_CPU_STATE_BAD_pc_HALTE (1L<<6) bnx2.h 　
6898
 BNX2_RXP_CPU_STATE_ALIGN_HALTEDBNX2_RXP_CPU_STATE_ALIGN_HALTED (1L<<7) bnx2.h 　
6899
 BNX2_RXP_CPU_STATE_FIO_ABORT_HABNX2_RXP_CPU_STATE_FIO_ABORT_HA (1L<<8) bnx2.h 　
6900
 BNX2_RXP_CPU_STATE_SOFT_HALTEDBNX2_RXP_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
6901
 BNX2_RXP_CPU_STATE_SPAD_UNDERFLBNX2_RXP_CPU_STATE_SPAD_UNDERFL (1L<<11) bnx2.h 　
6902
 BNX2_RXP_CPU_STATE_INTERRRUPTBNX2_RXP_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
6903
 BNX2_RXP_CPU_STATE_DATA_ACCESS_BNX2_RXP_CPU_STATE_DATA_ACCESS_ (1L<<14) bnx2.h 　
6904
 BNX2_RXP_CPU_STATE_INST_FETCH_SBNX2_RXP_CPU_STATE_INST_FETCH_S (1L<<15) bnx2.h 　
6905
 BNX2_RXP_CPU_STATE_BLOCKED_READBNX2_RXP_CPU_STATE_BLOCKED_READ (1L<<31) bnx2.h 　
6906
 BNX2_RXP_CPU_EVENT_MASKBNX2_RXP_CPU_EVENT_MASK 0x000c5008 bnx2.h 　
6907
 BNX2_RXP_CPU_EVENT_MASK_BREAKPOBNX2_RXP_CPU_EVENT_MASK_BREAKPO (1L<<0) bnx2.h 　
6908
 BNX2_RXP_CPU_EVENT_MASK_BAD_INSBNX2_RXP_CPU_EVENT_MASK_BAD_INS (1L<<2) bnx2.h 　
6909
 BNX2_RXP_CPU_EVENT_MASK_PAGE_0_BNX2_RXP_CPU_EVENT_MASK_PAGE_0_ (1L<<3) bnx2.h 　
6910
 BNX2_RXP_CPU_EVENT_MASK_PAGE_0_BNX2_RXP_CPU_EVENT_MASK_PAGE_0_ (1L<<4) bnx2.h 　
6911
 BNX2_RXP_CPU_EVENT_MASK_BAD_DATBNX2_RXP_CPU_EVENT_MASK_BAD_DAT (1L<<5) bnx2.h 　
6912
 BNX2_RXP_CPU_EVENT_MASK_BAD_PC_BNX2_RXP_CPU_EVENT_MASK_BAD_PC_ (1L<<6) bnx2.h 　
6913
 BNX2_RXP_CPU_EVENT_MASK_ALIGN_HBNX2_RXP_CPU_EVENT_MASK_ALIGN_H (1L<<7) bnx2.h 　
6914
 BNX2_RXP_CPU_EVENT_MASK_FIO_ABOBNX2_RXP_CPU_EVENT_MASK_FIO_ABO (1L<<8) bnx2.h 　
6915
 BNX2_RXP_CPU_EVENT_MASK_SOFT_HABNX2_RXP_CPU_EVENT_MASK_SOFT_HA (1L<<10) bnx2.h 　
6916
 BNX2_RXP_CPU_EVENT_MASK_SPAD_UNBNX2_RXP_CPU_EVENT_MASK_SPAD_UN (1L<<11) bnx2.h 　
6917
 BNX2_RXP_CPU_EVENT_MASK_INTERRUBNX2_RXP_CPU_EVENT_MASK_INTERRU (1L<<12) bnx2.h 　
6918
 BNX2_RXP_CPU_PROGRAM_COUNTERBNX2_RXP_CPU_PROGRAM_COUNTER 0x000c501c bnx2.h 　
6919
 BNX2_RXP_CPU_INSTRUCTIONBNX2_RXP_CPU_INSTRUCTION 0x000c5020 bnx2.h 　
6920
 BNX2_RXP_CPU_DATA_ACCESSBNX2_RXP_CPU_DATA_ACCESS 0x000c5024 bnx2.h 　
6921
 BNX2_RXP_CPU_INTERRUPT_ENABLEBNX2_RXP_CPU_INTERRUPT_ENABLE 0x000c5028 bnx2.h 　
6922
 BNX2_RXP_CPU_INTERRUPT_VECTORBNX2_RXP_CPU_INTERRUPT_VECTOR 0x000c502c bnx2.h 　
6923
 BNX2_RXP_CPU_INTERRUPT_SAVED_PCBNX2_RXP_CPU_INTERRUPT_SAVED_PC 0x000c5030 bnx2.h 　
6924
 BNX2_RXP_CPU_HW_BREAKPOINTBNX2_RXP_CPU_HW_BREAKPOINT 0x000c5034 bnx2.h 　
6925
 BNX2_RXP_CPU_HW_BREAKPOINT_DISABNX2_RXP_CPU_HW_BREAKPOINT_DISA (1L<<0) bnx2.h 　
6926
 BNX2_RXP_CPU_HW_BREAKPOINT_ADDRBNX2_RXP_CPU_HW_BREAKPOINT_ADDR (0x3fffffffL<<2) bnx2.h 　
6927
 BNX2_RXP_CPU_DEBUG_VECT_PEEKBNX2_RXP_CPU_DEBUG_VECT_PEEK 0x000c5038 bnx2.h 　
6928
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_ (0x7ffL<<0) bnx2.h 　
6929
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_ (1L<<11) bnx2.h 　
6930
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_ (0xfL<<12) bnx2.h 　
6931
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_ (0x7ffL<<16) bnx2.h 　
6932
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_ (1L<<27) bnx2.h 　
6933
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_ (0xfL<<28) bnx2.h 　
6934
 BNX2_RXP_CPU_LAST_BRANCH_ADDRBNX2_RXP_CPU_LAST_BRANCH_ADDR 0x000c5048 bnx2.h 　
6935
 BNX2_RXP_CPU_LAST_BRANCH_ADDR_TBNX2_RXP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
6936
 BNX2_RXP_CPU_LAST_BRANCH_ADDR_TBNX2_RXP_CPU_LAST_BRANCH_ADDR_T (0L<<1) bnx2.h 　
6937
 BNX2_RXP_CPU_LAST_BRANCH_ADDR_TBNX2_RXP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
6938
 BNX2_RXP_CPU_LAST_BRANCH_ADDR_LBNX2_RXP_CPU_LAST_BRANCH_ADDR_L (0x3fffffffL<<2) bnx2.h 　
6939
 BNX2_RXP_CPU_REG_FILEBNX2_RXP_CPU_REG_FILE 0x000c5200 bnx2.h 　
6940
 BNX2_RXP_CFTQ_DATABNX2_RXP_CFTQ_DATA 0x000c5380 bnx2.h 　
6941
 BNX2_RXP_CFTQ_CMDBNX2_RXP_CFTQ_CMD 0x000c53b8 bnx2.h 　
6942
 BNX2_RXP_CFTQ_CMD_OFFSETBNX2_RXP_CFTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
6943
 BNX2_RXP_CFTQ_CMD_WR_TOPBNX2_RXP_CFTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
6944
 BNX2_RXP_CFTQ_CMD_WR_TOP_0BNX2_RXP_CFTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
6945
 BNX2_RXP_CFTQ_CMD_WR_TOP_1BNX2_RXP_CFTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
6946
 BNX2_RXP_CFTQ_CMD_SFT_RESETBNX2_RXP_CFTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
6947
 BNX2_RXP_CFTQ_CMD_RD_DATABNX2_RXP_CFTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
6948
 BNX2_RXP_CFTQ_CMD_ADD_INTERVENBNX2_RXP_CFTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
6949
 BNX2_RXP_CFTQ_CMD_ADD_DATABNX2_RXP_CFTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
6950
 BNX2_RXP_CFTQ_CMD_INTERVENE_CLRBNX2_RXP_CFTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
6951
 BNX2_RXP_CFTQ_CMD_POPBNX2_RXP_CFTQ_CMD_POP (1L<<30) bnx2.h 　
6952
 BNX2_RXP_CFTQ_CMD_BUSYBNX2_RXP_CFTQ_CMD_BUSY (1L<<31) bnx2.h 　
6953
 BNX2_RXP_CFTQ_CTLBNX2_RXP_CFTQ_CTL 0x000c53bc bnx2.h 　
6954
 BNX2_RXP_CFTQ_CTL_INTERVENEBNX2_RXP_CFTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
6955
 BNX2_RXP_CFTQ_CTL_OVERFLOWBNX2_RXP_CFTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
6956
 BNX2_RXP_CFTQ_CTL_FORCE_INTERVEBNX2_RXP_CFTQ_CTL_FORCE_INTERVE (1L<<2) bnx2.h 　
6957
 BNX2_RXP_CFTQ_CTL_MAX_DEPTHBNX2_RXP_CFTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
6958
 BNX2_RXP_CFTQ_CTL_CUR_DEPTHBNX2_RXP_CFTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
6959
 BNX2_RXP_FTQ_DATABNX2_RXP_FTQ_DATA 0x000c53c0 bnx2.h 　
6960
 BNX2_RXP_FTQ_CMDBNX2_RXP_FTQ_CMD 0x000c53f8 bnx2.h 　
6961
 BNX2_RXP_FTQ_CMD_OFFSETBNX2_RXP_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
6962
 BNX2_RXP_FTQ_CMD_WR_TOPBNX2_RXP_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
6963
 BNX2_RXP_FTQ_CMD_WR_TOP_0BNX2_RXP_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
6964
 BNX2_RXP_FTQ_CMD_WR_TOP_1BNX2_RXP_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
6965
 BNX2_RXP_FTQ_CMD_SFT_RESETBNX2_RXP_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
6966
 BNX2_RXP_FTQ_CMD_RD_DATABNX2_RXP_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
6967
 BNX2_RXP_FTQ_CMD_ADD_INTERVENBNX2_RXP_FTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
6968
 BNX2_RXP_FTQ_CMD_ADD_DATABNX2_RXP_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
6969
 BNX2_RXP_FTQ_CMD_INTERVENE_CLRBNX2_RXP_FTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
6970
 BNX2_RXP_FTQ_CMD_POPBNX2_RXP_FTQ_CMD_POP (1L<<30) bnx2.h 　
6971
 BNX2_RXP_FTQ_CMD_BUSYBNX2_RXP_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
6972
 BNX2_RXP_FTQ_CTLBNX2_RXP_FTQ_CTL 0x000c53fc bnx2.h 　
6973
 BNX2_RXP_FTQ_CTL_INTERVENEBNX2_RXP_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
6974
 BNX2_RXP_FTQ_CTL_OVERFLOWBNX2_RXP_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
6975
 BNX2_RXP_FTQ_CTL_FORCE_INTERVENBNX2_RXP_FTQ_CTL_FORCE_INTERVEN (1L<<2) bnx2.h 　
6976
 BNX2_RXP_FTQ_CTL_MAX_DEPTHBNX2_RXP_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
6977
 BNX2_RXP_FTQ_CTL_CUR_DEPTHBNX2_RXP_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
6978
 BNX2_RXP_SCRATCHBNX2_RXP_SCRATCH 0x000e0000 bnx2.h 　
6979
 BNX2_COM_CPU_MODEBNX2_COM_CPU_MODE 0x00105000 bnx2.h 　
6980
 BNX2_COM_CPU_MODE_LOCAL_RSTBNX2_COM_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
6981
 BNX2_COM_CPU_MODE_STEP_ENABNX2_COM_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
6982
 BNX2_COM_CPU_MODE_PAGE_0_DATA_EBNX2_COM_CPU_MODE_PAGE_0_DATA_E (1L<<2) bnx2.h 　
6983
 BNX2_COM_CPU_MODE_PAGE_0_INST_EBNX2_COM_CPU_MODE_PAGE_0_INST_E (1L<<3) bnx2.h 　
6984
 BNX2_COM_CPU_MODE_MSG_BIT1BNX2_COM_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
6985
 BNX2_COM_CPU_MODE_INTERRUPT_ENABNX2_COM_CPU_MODE_INTERRUPT_ENA (1L<<7) bnx2.h 　
6986
 BNX2_COM_CPU_MODE_SOFT_HALTBNX2_COM_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
6987
 BNX2_COM_CPU_MODE_BAD_DATA_HALTBNX2_COM_CPU_MODE_BAD_DATA_HALT (1L<<11) bnx2.h 　
6988
 BNX2_COM_CPU_MODE_BAD_INST_HALTBNX2_COM_CPU_MODE_BAD_INST_HALT (1L<<12) bnx2.h 　
6989
 BNX2_COM_CPU_MODE_FIO_ABORT_HALBNX2_COM_CPU_MODE_FIO_ABORT_HAL (1L<<13) bnx2.h 　
6990
 BNX2_COM_CPU_MODE_SPAD_UNDERFLOBNX2_COM_CPU_MODE_SPAD_UNDERFLO (1L<<15) bnx2.h 　
6991
 BNX2_COM_CPU_STATEBNX2_COM_CPU_STATE 0x00105004 bnx2.h 　
6992
 BNX2_COM_CPU_STATE_BREAKPOINTBNX2_COM_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
6993
 BNX2_COM_CPU_STATE_BAD_INST_HALBNX2_COM_CPU_STATE_BAD_INST_HAL (1L<<2) bnx2.h 　
6994
 BNX2_COM_CPU_STATE_PAGE_0_DATA_BNX2_COM_CPU_STATE_PAGE_0_DATA_ (1L<<3) bnx2.h 　
6995
 BNX2_COM_CPU_STATE_PAGE_0_INST_BNX2_COM_CPU_STATE_PAGE_0_INST_ (1L<<4) bnx2.h 　
6996
 BNX2_COM_CPU_STATE_BAD_DATA_ADDBNX2_COM_CPU_STATE_BAD_DATA_ADD (1L<<5) bnx2.h 　
6997
 BNX2_COM_CPU_STATE_BAD_pc_HALTEBNX2_COM_CPU_STATE_BAD_pc_HALTE (1L<<6) bnx2.h 　
6998
 BNX2_COM_CPU_STATE_ALIGN_HALTEDBNX2_COM_CPU_STATE_ALIGN_HALTED (1L<<7) bnx2.h 　
6999
 BNX2_COM_CPU_STATE_FIO_ABORT_HABNX2_COM_CPU_STATE_FIO_ABORT_HA (1L<<8) bnx2.h 　
7000
 BNX2_COM_CPU_STATE_SOFT_HALTEDBNX2_COM_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
7001
 BNX2_COM_CPU_STATE_SPAD_UNDERFLBNX2_COM_CPU_STATE_SPAD_UNDERFL (1L<<11) bnx2.h 　
7002
 BNX2_COM_CPU_STATE_INTERRRUPTBNX2_COM_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
7003
 BNX2_COM_CPU_STATE_DATA_ACCESS_BNX2_COM_CPU_STATE_DATA_ACCESS_ (1L<<14) bnx2.h 　
7004
 BNX2_COM_CPU_STATE_INST_FETCH_SBNX2_COM_CPU_STATE_INST_FETCH_S (1L<<15) bnx2.h 　
7005
 BNX2_COM_CPU_STATE_BLOCKED_READBNX2_COM_CPU_STATE_BLOCKED_READ (1L<<31) bnx2.h 　
7006
 BNX2_COM_CPU_EVENT_MASKBNX2_COM_CPU_EVENT_MASK 0x00105008 bnx2.h 　
7007
 BNX2_COM_CPU_EVENT_MASK_BREAKPOBNX2_COM_CPU_EVENT_MASK_BREAKPO (1L<<0) bnx2.h 　
7008
 BNX2_COM_CPU_EVENT_MASK_BAD_INSBNX2_COM_CPU_EVENT_MASK_BAD_INS (1L<<2) bnx2.h 　
7009
 BNX2_COM_CPU_EVENT_MASK_PAGE_0_BNX2_COM_CPU_EVENT_MASK_PAGE_0_ (1L<<3) bnx2.h 　
7010
 BNX2_COM_CPU_EVENT_MASK_PAGE_0_BNX2_COM_CPU_EVENT_MASK_PAGE_0_ (1L<<4) bnx2.h 　
7011
 BNX2_COM_CPU_EVENT_MASK_BAD_DATBNX2_COM_CPU_EVENT_MASK_BAD_DAT (1L<<5) bnx2.h 　
7012
 BNX2_COM_CPU_EVENT_MASK_BAD_PC_BNX2_COM_CPU_EVENT_MASK_BAD_PC_ (1L<<6) bnx2.h 　
7013
 BNX2_COM_CPU_EVENT_MASK_ALIGN_HBNX2_COM_CPU_EVENT_MASK_ALIGN_H (1L<<7) bnx2.h 　
7014
 BNX2_COM_CPU_EVENT_MASK_FIO_ABOBNX2_COM_CPU_EVENT_MASK_FIO_ABO (1L<<8) bnx2.h 　
7015
 BNX2_COM_CPU_EVENT_MASK_SOFT_HABNX2_COM_CPU_EVENT_MASK_SOFT_HA (1L<<10) bnx2.h 　
7016
 BNX2_COM_CPU_EVENT_MASK_SPAD_UNBNX2_COM_CPU_EVENT_MASK_SPAD_UN (1L<<11) bnx2.h 　
7017
 BNX2_COM_CPU_EVENT_MASK_INTERRUBNX2_COM_CPU_EVENT_MASK_INTERRU (1L<<12) bnx2.h 　
7018
 BNX2_COM_CPU_PROGRAM_COUNTERBNX2_COM_CPU_PROGRAM_COUNTER 0x0010501c bnx2.h 　
7019
 BNX2_COM_CPU_INSTRUCTIONBNX2_COM_CPU_INSTRUCTION 0x00105020 bnx2.h 　
7020
 BNX2_COM_CPU_DATA_ACCESSBNX2_COM_CPU_DATA_ACCESS 0x00105024 bnx2.h 　
7021
 BNX2_COM_CPU_INTERRUPT_ENABLEBNX2_COM_CPU_INTERRUPT_ENABLE 0x00105028 bnx2.h 　
7022
 BNX2_COM_CPU_INTERRUPT_VECTORBNX2_COM_CPU_INTERRUPT_VECTOR 0x0010502c bnx2.h 　
7023
 BNX2_COM_CPU_INTERRUPT_SAVED_PCBNX2_COM_CPU_INTERRUPT_SAVED_PC 0x00105030 bnx2.h 　
7024
 BNX2_COM_CPU_HW_BREAKPOINTBNX2_COM_CPU_HW_BREAKPOINT 0x00105034 bnx2.h 　
7025
 BNX2_COM_CPU_HW_BREAKPOINT_DISABNX2_COM_CPU_HW_BREAKPOINT_DISA (1L<<0) bnx2.h 　
7026
 BNX2_COM_CPU_HW_BREAKPOINT_ADDRBNX2_COM_CPU_HW_BREAKPOINT_ADDR (0x3fffffffL<<2) bnx2.h 　
7027
 BNX2_COM_CPU_DEBUG_VECT_PEEKBNX2_COM_CPU_DEBUG_VECT_PEEK 0x00105038 bnx2.h 　
7028
 BNX2_COM_CPU_DEBUG_VECT_PEEK_1_BNX2_COM_CPU_DEBUG_VECT_PEEK_1_ (0x7ffL<<0) bnx2.h 　
7029
 BNX2_COM_CPU_DEBUG_VECT_PEEK_1_BNX2_COM_CPU_DEBUG_VECT_PEEK_1_ (1L<<11) bnx2.h 　
7030
 BNX2_COM_CPU_DEBUG_VECT_PEEK_1_BNX2_COM_CPU_DEBUG_VECT_PEEK_1_ (0xfL<<12) bnx2.h 　
7031
 BNX2_COM_CPU_DEBUG_VECT_PEEK_2_BNX2_COM_CPU_DEBUG_VECT_PEEK_2_ (0x7ffL<<16) bnx2.h 　
7032
 BNX2_COM_CPU_DEBUG_VECT_PEEK_2_BNX2_COM_CPU_DEBUG_VECT_PEEK_2_ (1L<<27) bnx2.h 　
7033
 BNX2_COM_CPU_DEBUG_VECT_PEEK_2_BNX2_COM_CPU_DEBUG_VECT_PEEK_2_ (0xfL<<28) bnx2.h 　
7034
 BNX2_COM_CPU_LAST_BRANCH_ADDRBNX2_COM_CPU_LAST_BRANCH_ADDR 0x00105048 bnx2.h 　
7035
 BNX2_COM_CPU_LAST_BRANCH_ADDR_TBNX2_COM_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
7036
 BNX2_COM_CPU_LAST_BRANCH_ADDR_TBNX2_COM_CPU_LAST_BRANCH_ADDR_T (0L<<1) bnx2.h 　
7037
 BNX2_COM_CPU_LAST_BRANCH_ADDR_TBNX2_COM_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
7038
 BNX2_COM_CPU_LAST_BRANCH_ADDR_LBNX2_COM_CPU_LAST_BRANCH_ADDR_L (0x3fffffffL<<2) bnx2.h 　
7039
 BNX2_COM_CPU_REG_FILEBNX2_COM_CPU_REG_FILE 0x00105200 bnx2.h 　
7040
 BNX2_COM_COMXQ_FTQ_DATABNX2_COM_COMXQ_FTQ_DATA 0x00105340 bnx2.h 　
7041
 BNX2_COM_COMXQ_FTQ_CMDBNX2_COM_COMXQ_FTQ_CMD 0x00105378 bnx2.h 　
7042
 BNX2_COM_COMXQ_FTQ_CMD_OFFSETBNX2_COM_COMXQ_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
7043
 BNX2_COM_COMXQ_FTQ_CMD_WR_TOPBNX2_COM_COMXQ_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
7044
 BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
7045
 BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
7046
 BNX2_COM_COMXQ_FTQ_CMD_SFT_RESEBNX2_COM_COMXQ_FTQ_CMD_SFT_RESE (1L<<25) bnx2.h 　
7047
 BNX2_COM_COMXQ_FTQ_CMD_RD_DATABNX2_COM_COMXQ_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
7048
 BNX2_COM_COMXQ_FTQ_CMD_ADD_INTEBNX2_COM_COMXQ_FTQ_CMD_ADD_INTE (1L<<27) bnx2.h 　
7049
 BNX2_COM_COMXQ_FTQ_CMD_ADD_DATABNX2_COM_COMXQ_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
7050
 BNX2_COM_COMXQ_FTQ_CMD_INTERVENBNX2_COM_COMXQ_FTQ_CMD_INTERVEN (1L<<29) bnx2.h 　
7051
 BNX2_COM_COMXQ_FTQ_CMD_POPBNX2_COM_COMXQ_FTQ_CMD_POP (1L<<30) bnx2.h 　
7052
 BNX2_COM_COMXQ_FTQ_CMD_BUSYBNX2_COM_COMXQ_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
7053
 BNX2_COM_COMXQ_FTQ_CTLBNX2_COM_COMXQ_FTQ_CTL 0x0010537c bnx2.h 　
7054
 BNX2_COM_COMXQ_FTQ_CTL_INTERVENBNX2_COM_COMXQ_FTQ_CTL_INTERVEN (1L<<0) bnx2.h 　
7055
 BNX2_COM_COMXQ_FTQ_CTL_OVERFLOWBNX2_COM_COMXQ_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
7056
 BNX2_COM_COMXQ_FTQ_CTL_FORCE_INBNX2_COM_COMXQ_FTQ_CTL_FORCE_IN (1L<<2) bnx2.h 　
7057
 BNX2_COM_COMXQ_FTQ_CTL_MAX_DEPTBNX2_COM_COMXQ_FTQ_CTL_MAX_DEPT (0x3ffL<<12) bnx2.h 　
7058
 BNX2_COM_COMXQ_FTQ_CTL_CUR_DEPTBNX2_COM_COMXQ_FTQ_CTL_CUR_DEPT (0x3ffL<<22) bnx2.h 　
7059
 BNX2_COM_COMTQ_FTQ_DATABNX2_COM_COMTQ_FTQ_DATA 0x00105380 bnx2.h 　
7060
 BNX2_COM_COMTQ_FTQ_CMDBNX2_COM_COMTQ_FTQ_CMD 0x001053b8 bnx2.h 　
7061
 BNX2_COM_COMTQ_FTQ_CMD_OFFSETBNX2_COM_COMTQ_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
7062
 BNX2_COM_COMTQ_FTQ_CMD_WR_TOPBNX2_COM_COMTQ_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
7063
 BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
7064
 BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
7065
 BNX2_COM_COMTQ_FTQ_CMD_SFT_RESEBNX2_COM_COMTQ_FTQ_CMD_SFT_RESE (1L<<25) bnx2.h 　
7066
 BNX2_COM_COMTQ_FTQ_CMD_RD_DATABNX2_COM_COMTQ_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
7067
 BNX2_COM_COMTQ_FTQ_CMD_ADD_INTEBNX2_COM_COMTQ_FTQ_CMD_ADD_INTE (1L<<27) bnx2.h 　
7068
 BNX2_COM_COMTQ_FTQ_CMD_ADD_DATABNX2_COM_COMTQ_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
7069
 BNX2_COM_COMTQ_FTQ_CMD_INTERVENBNX2_COM_COMTQ_FTQ_CMD_INTERVEN (1L<<29) bnx2.h 　
7070
 BNX2_COM_COMTQ_FTQ_CMD_POPBNX2_COM_COMTQ_FTQ_CMD_POP (1L<<30) bnx2.h 　
7071
 BNX2_COM_COMTQ_FTQ_CMD_BUSYBNX2_COM_COMTQ_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
7072
 BNX2_COM_COMTQ_FTQ_CTLBNX2_COM_COMTQ_FTQ_CTL 0x001053bc bnx2.h 　
7073
 BNX2_COM_COMTQ_FTQ_CTL_INTERVENBNX2_COM_COMTQ_FTQ_CTL_INTERVEN (1L<<0) bnx2.h 　
7074
 BNX2_COM_COMTQ_FTQ_CTL_OVERFLOWBNX2_COM_COMTQ_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
7075
 BNX2_COM_COMTQ_FTQ_CTL_FORCE_INBNX2_COM_COMTQ_FTQ_CTL_FORCE_IN (1L<<2) bnx2.h 　
7076
 BNX2_COM_COMTQ_FTQ_CTL_MAX_DEPTBNX2_COM_COMTQ_FTQ_CTL_MAX_DEPT (0x3ffL<<12) bnx2.h 　
7077
 BNX2_COM_COMTQ_FTQ_CTL_CUR_DEPTBNX2_COM_COMTQ_FTQ_CTL_CUR_DEPT (0x3ffL<<22) bnx2.h 　
7078
 BNX2_COM_COMQ_FTQ_DATABNX2_COM_COMQ_FTQ_DATA 0x001053c0 bnx2.h 　
7079
 BNX2_COM_COMQ_FTQ_CMDBNX2_COM_COMQ_FTQ_CMD 0x001053f8 bnx2.h 　
7080
 BNX2_COM_COMQ_FTQ_CMD_OFFSETBNX2_COM_COMQ_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
7081
 BNX2_COM_COMQ_FTQ_CMD_WR_TOPBNX2_COM_COMQ_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
7082
 BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
7083
 BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
7084
 BNX2_COM_COMQ_FTQ_CMD_SFT_RESETBNX2_COM_COMQ_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
7085
 BNX2_COM_COMQ_FTQ_CMD_RD_DATABNX2_COM_COMQ_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
7086
 BNX2_COM_COMQ_FTQ_CMD_ADD_INTERBNX2_COM_COMQ_FTQ_CMD_ADD_INTER (1L<<27) bnx2.h 　
7087
 BNX2_COM_COMQ_FTQ_CMD_ADD_DATABNX2_COM_COMQ_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
7088
 BNX2_COM_COMQ_FTQ_CMD_INTERVENEBNX2_COM_COMQ_FTQ_CMD_INTERVENE (1L<<29) bnx2.h 　
7089
 BNX2_COM_COMQ_FTQ_CMD_POPBNX2_COM_COMQ_FTQ_CMD_POP (1L<<30) bnx2.h 　
7090
 BNX2_COM_COMQ_FTQ_CMD_BUSYBNX2_COM_COMQ_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
7091
 BNX2_COM_COMQ_FTQ_CTLBNX2_COM_COMQ_FTQ_CTL 0x001053fc bnx2.h 　
7092
 BNX2_COM_COMQ_FTQ_CTL_INTERVENEBNX2_COM_COMQ_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
7093
 BNX2_COM_COMQ_FTQ_CTL_OVERFLOWBNX2_COM_COMQ_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
7094
 BNX2_COM_COMQ_FTQ_CTL_FORCE_INTBNX2_COM_COMQ_FTQ_CTL_FORCE_INT (1L<<2) bnx2.h 　
7095
 BNX2_COM_COMQ_FTQ_CTL_MAX_DEPTHBNX2_COM_COMQ_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
7096
 BNX2_COM_COMQ_FTQ_CTL_CUR_DEPTHBNX2_COM_COMQ_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
7097
 BNX2_COM_SCRATCHBNX2_COM_SCRATCH 0x00120000 bnx2.h 　
7098
 BNX2_CP_CPU_MODEBNX2_CP_CPU_MODE 0x00185000 bnx2.h 　
7099
 BNX2_CP_CPU_MODE_LOCAL_RSTBNX2_CP_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
7100
 BNX2_CP_CPU_MODE_STEP_ENABNX2_CP_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
7101
 BNX2_CP_CPU_MODE_PAGE_0_DATA_ENBNX2_CP_CPU_MODE_PAGE_0_DATA_EN (1L<<2) bnx2.h 　
7102
 BNX2_CP_CPU_MODE_PAGE_0_INST_ENBNX2_CP_CPU_MODE_PAGE_0_INST_EN (1L<<3) bnx2.h 　
7103
 BNX2_CP_CPU_MODE_MSG_BIT1BNX2_CP_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
7104
 BNX2_CP_CPU_MODE_INTERRUPT_ENABNX2_CP_CPU_MODE_INTERRUPT_ENA (1L<<7) bnx2.h 　
7105
 BNX2_CP_CPU_MODE_SOFT_HALTBNX2_CP_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
7106
 BNX2_CP_CPU_MODE_BAD_DATA_HALT_BNX2_CP_CPU_MODE_BAD_DATA_HALT_ (1L<<11) bnx2.h 　
7107
 BNX2_CP_CPU_MODE_BAD_INST_HALT_BNX2_CP_CPU_MODE_BAD_INST_HALT_ (1L<<12) bnx2.h 　
7108
 BNX2_CP_CPU_MODE_FIO_ABORT_HALTBNX2_CP_CPU_MODE_FIO_ABORT_HALT (1L<<13) bnx2.h 　
7109
 BNX2_CP_CPU_MODE_SPAD_UNDERFLOWBNX2_CP_CPU_MODE_SPAD_UNDERFLOW (1L<<15) bnx2.h 　
7110
 BNX2_CP_CPU_STATEBNX2_CP_CPU_STATE 0x00185004 bnx2.h 　
7111
 BNX2_CP_CPU_STATE_BREAKPOINTBNX2_CP_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
7112
 BNX2_CP_CPU_STATE_BAD_INST_HALTBNX2_CP_CPU_STATE_BAD_INST_HALT (1L<<2) bnx2.h 　
7113
 BNX2_CP_CPU_STATE_PAGE_0_DATA_HBNX2_CP_CPU_STATE_PAGE_0_DATA_H (1L<<3) bnx2.h 　
7114
 BNX2_CP_CPU_STATE_PAGE_0_INST_HBNX2_CP_CPU_STATE_PAGE_0_INST_H (1L<<4) bnx2.h 　
7115
 BNX2_CP_CPU_STATE_BAD_DATA_ADDRBNX2_CP_CPU_STATE_BAD_DATA_ADDR (1L<<5) bnx2.h 　
7116
 BNX2_CP_CPU_STATE_BAD_pc_HALTEDBNX2_CP_CPU_STATE_BAD_pc_HALTED (1L<<6) bnx2.h 　
7117
 BNX2_CP_CPU_STATE_ALIGN_HALTEDBNX2_CP_CPU_STATE_ALIGN_HALTED (1L<<7) bnx2.h 　
7118
 BNX2_CP_CPU_STATE_FIO_ABORT_HALBNX2_CP_CPU_STATE_FIO_ABORT_HAL (1L<<8) bnx2.h 　
7119
 BNX2_CP_CPU_STATE_SOFT_HALTEDBNX2_CP_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
7120
 BNX2_CP_CPU_STATE_SPAD_UNDERFLOBNX2_CP_CPU_STATE_SPAD_UNDERFLO (1L<<11) bnx2.h 　
7121
 BNX2_CP_CPU_STATE_INTERRRUPTBNX2_CP_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
7122
 BNX2_CP_CPU_STATE_DATA_ACCESS_SBNX2_CP_CPU_STATE_DATA_ACCESS_S (1L<<14) bnx2.h 　
7123
 BNX2_CP_CPU_STATE_INST_FETCH_STBNX2_CP_CPU_STATE_INST_FETCH_ST (1L<<15) bnx2.h 　
7124
 BNX2_CP_CPU_STATE_BLOCKED_READBNX2_CP_CPU_STATE_BLOCKED_READ (1L<<31) bnx2.h 　
7125
 BNX2_CP_CPU_EVENT_MASKBNX2_CP_CPU_EVENT_MASK 0x00185008 bnx2.h 　
7126
 BNX2_CP_CPU_EVENT_MASK_BREAKPOIBNX2_CP_CPU_EVENT_MASK_BREAKPOI (1L<<0) bnx2.h 　
7127
 BNX2_CP_CPU_EVENT_MASK_BAD_INSTBNX2_CP_CPU_EVENT_MASK_BAD_INST (1L<<2) bnx2.h 　
7128
 BNX2_CP_CPU_EVENT_MASK_PAGE_0_DBNX2_CP_CPU_EVENT_MASK_PAGE_0_D (1L<<3) bnx2.h 　
7129
 BNX2_CP_CPU_EVENT_MASK_PAGE_0_IBNX2_CP_CPU_EVENT_MASK_PAGE_0_I (1L<<4) bnx2.h 　
7130
 BNX2_CP_CPU_EVENT_MASK_BAD_DATABNX2_CP_CPU_EVENT_MASK_BAD_DATA (1L<<5) bnx2.h 　
7131
 BNX2_CP_CPU_EVENT_MASK_BAD_PC_HBNX2_CP_CPU_EVENT_MASK_BAD_PC_H (1L<<6) bnx2.h 　
7132
 BNX2_CP_CPU_EVENT_MASK_ALIGN_HABNX2_CP_CPU_EVENT_MASK_ALIGN_HA (1L<<7) bnx2.h 　
7133
 BNX2_CP_CPU_EVENT_MASK_FIO_ABORBNX2_CP_CPU_EVENT_MASK_FIO_ABOR (1L<<8) bnx2.h 　
7134
 BNX2_CP_CPU_EVENT_MASK_SOFT_HALBNX2_CP_CPU_EVENT_MASK_SOFT_HAL (1L<<10) bnx2.h 　
7135
 BNX2_CP_CPU_EVENT_MASK_SPAD_UNDBNX2_CP_CPU_EVENT_MASK_SPAD_UND (1L<<11) bnx2.h 　
7136
 BNX2_CP_CPU_EVENT_MASK_INTERRUPBNX2_CP_CPU_EVENT_MASK_INTERRUP (1L<<12) bnx2.h 　
7137
 BNX2_CP_CPU_PROGRAM_COUNTERBNX2_CP_CPU_PROGRAM_COUNTER 0x0018501c bnx2.h 　
7138
 BNX2_CP_CPU_INSTRUCTIONBNX2_CP_CPU_INSTRUCTION 0x00185020 bnx2.h 　
7139
 BNX2_CP_CPU_DATA_ACCESSBNX2_CP_CPU_DATA_ACCESS 0x00185024 bnx2.h 　
7140
 BNX2_CP_CPU_INTERRUPT_ENABLEBNX2_CP_CPU_INTERRUPT_ENABLE 0x00185028 bnx2.h 　
7141
 BNX2_CP_CPU_INTERRUPT_VECTORBNX2_CP_CPU_INTERRUPT_VECTOR 0x0018502c bnx2.h 　
7142
 BNX2_CP_CPU_INTERRUPT_SAVED_PCBNX2_CP_CPU_INTERRUPT_SAVED_PC 0x00185030 bnx2.h 　
7143
 BNX2_CP_CPU_HW_BREAKPOINTBNX2_CP_CPU_HW_BREAKPOINT 0x00185034 bnx2.h 　
7144
 BNX2_CP_CPU_HW_BREAKPOINT_DISABBNX2_CP_CPU_HW_BREAKPOINT_DISAB (1L<<0) bnx2.h 　
7145
 BNX2_CP_CPU_HW_BREAKPOINT_ADDREBNX2_CP_CPU_HW_BREAKPOINT_ADDRE (0x3fffffffL<<2) bnx2.h 　
7146
 BNX2_CP_CPU_DEBUG_VECT_PEEKBNX2_CP_CPU_DEBUG_VECT_PEEK 0x00185038 bnx2.h 　
7147
 BNX2_CP_CPU_DEBUG_VECT_PEEK_1_VBNX2_CP_CPU_DEBUG_VECT_PEEK_1_V (0x7ffL<<0) bnx2.h 　
7148
 BNX2_CP_CPU_DEBUG_VECT_PEEK_1_PBNX2_CP_CPU_DEBUG_VECT_PEEK_1_P (1L<<11) bnx2.h 　
7149
 BNX2_CP_CPU_DEBUG_VECT_PEEK_1_SBNX2_CP_CPU_DEBUG_VECT_PEEK_1_S (0xfL<<12) bnx2.h 　
7150
 BNX2_CP_CPU_DEBUG_VECT_PEEK_2_VBNX2_CP_CPU_DEBUG_VECT_PEEK_2_V (0x7ffL<<16) bnx2.h 　
7151
 BNX2_CP_CPU_DEBUG_VECT_PEEK_2_PBNX2_CP_CPU_DEBUG_VECT_PEEK_2_P (1L<<27) bnx2.h 　
7152
 BNX2_CP_CPU_DEBUG_VECT_PEEK_2_SBNX2_CP_CPU_DEBUG_VECT_PEEK_2_S (0xfL<<28) bnx2.h 　
7153
 BNX2_CP_CPU_LAST_BRANCH_ADDRBNX2_CP_CPU_LAST_BRANCH_ADDR 0x00185048 bnx2.h 　
7154
 BNX2_CP_CPU_LAST_BRANCH_ADDR_TYBNX2_CP_CPU_LAST_BRANCH_ADDR_TY (1L<<1) bnx2.h 　
7155
 BNX2_CP_CPU_LAST_BRANCH_ADDR_TYBNX2_CP_CPU_LAST_BRANCH_ADDR_TY (0L<<1) bnx2.h 　
7156
 BNX2_CP_CPU_LAST_BRANCH_ADDR_TYBNX2_CP_CPU_LAST_BRANCH_ADDR_TY (1L<<1) bnx2.h 　
7157
 BNX2_CP_CPU_LAST_BRANCH_ADDR_LBBNX2_CP_CPU_LAST_BRANCH_ADDR_LB (0x3fffffffL<<2) bnx2.h 　
7158
 BNX2_CP_CPU_REG_FILEBNX2_CP_CPU_REG_FILE 0x00185200 bnx2.h 　
7159
 BNX2_CP_CPQ_FTQ_DATABNX2_CP_CPQ_FTQ_DATA 0x001853c0 bnx2.h 　
7160
 BNX2_CP_CPQ_FTQ_CMDBNX2_CP_CPQ_FTQ_CMD 0x001853f8 bnx2.h 　
7161
 BNX2_CP_CPQ_FTQ_CMD_OFFSETBNX2_CP_CPQ_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
7162
 BNX2_CP_CPQ_FTQ_CMD_WR_TOPBNX2_CP_CPQ_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
7163
 BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
7164
 BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
7165
 BNX2_CP_CPQ_FTQ_CMD_SFT_RESETBNX2_CP_CPQ_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
7166
 BNX2_CP_CPQ_FTQ_CMD_RD_DATABNX2_CP_CPQ_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
7167
 BNX2_CP_CPQ_FTQ_CMD_ADD_INTERVEBNX2_CP_CPQ_FTQ_CMD_ADD_INTERVE (1L<<27) bnx2.h 　
7168
 BNX2_CP_CPQ_FTQ_CMD_ADD_DATABNX2_CP_CPQ_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
7169
 BNX2_CP_CPQ_FTQ_CMD_INTERVENE_CBNX2_CP_CPQ_FTQ_CMD_INTERVENE_C (1L<<29) bnx2.h 　
7170
 BNX2_CP_CPQ_FTQ_CMD_POPBNX2_CP_CPQ_FTQ_CMD_POP (1L<<30) bnx2.h 　
7171
 BNX2_CP_CPQ_FTQ_CMD_BUSYBNX2_CP_CPQ_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
7172
 BNX2_CP_CPQ_FTQ_CTLBNX2_CP_CPQ_FTQ_CTL 0x001853fc bnx2.h 　
7173
 BNX2_CP_CPQ_FTQ_CTL_INTERVENEBNX2_CP_CPQ_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
7174
 BNX2_CP_CPQ_FTQ_CTL_OVERFLOWBNX2_CP_CPQ_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
7175
 BNX2_CP_CPQ_FTQ_CTL_FORCE_INTERBNX2_CP_CPQ_FTQ_CTL_FORCE_INTER (1L<<2) bnx2.h 　
7176
 BNX2_CP_CPQ_FTQ_CTL_MAX_DEPTHBNX2_CP_CPQ_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
7177
 BNX2_CP_CPQ_FTQ_CTL_CUR_DEPTHBNX2_CP_CPQ_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
7178
 BNX2_CP_SCRATCHBNX2_CP_SCRATCH 0x001a0000 bnx2.h 　
7179
 BNX2_MCP_CPU_MODEBNX2_MCP_CPU_MODE 0x00145000 bnx2.h 　
7180
 BNX2_MCP_CPU_MODE_LOCAL_RSTBNX2_MCP_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
7181
 BNX2_MCP_CPU_MODE_STEP_ENABNX2_MCP_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
7182
 BNX2_MCP_CPU_MODE_PAGE_0_DATA_EBNX2_MCP_CPU_MODE_PAGE_0_DATA_E (1L<<2) bnx2.h 　
7183
 BNX2_MCP_CPU_MODE_PAGE_0_INST_EBNX2_MCP_CPU_MODE_PAGE_0_INST_E (1L<<3) bnx2.h 　
7184
 BNX2_MCP_CPU_MODE_MSG_BIT1BNX2_MCP_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
7185
 BNX2_MCP_CPU_MODE_INTERRUPT_ENABNX2_MCP_CPU_MODE_INTERRUPT_ENA (1L<<7) bnx2.h 　
7186
 BNX2_MCP_CPU_MODE_SOFT_HALTBNX2_MCP_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
7187
 BNX2_MCP_CPU_MODE_BAD_DATA_HALTBNX2_MCP_CPU_MODE_BAD_DATA_HALT (1L<<11) bnx2.h 　
7188
 BNX2_MCP_CPU_MODE_BAD_INST_HALTBNX2_MCP_CPU_MODE_BAD_INST_HALT (1L<<12) bnx2.h 　
7189
 BNX2_MCP_CPU_MODE_FIO_ABORT_HALBNX2_MCP_CPU_MODE_FIO_ABORT_HAL (1L<<13) bnx2.h 　
7190
 BNX2_MCP_CPU_MODE_SPAD_UNDERFLOBNX2_MCP_CPU_MODE_SPAD_UNDERFLO (1L<<15) bnx2.h 　
7191
 BNX2_MCP_CPU_STATEBNX2_MCP_CPU_STATE 0x00145004 bnx2.h 　
7192
 BNX2_MCP_CPU_STATE_BREAKPOINTBNX2_MCP_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
7193
 BNX2_MCP_CPU_STATE_BAD_INST_HALBNX2_MCP_CPU_STATE_BAD_INST_HAL (1L<<2) bnx2.h 　
7194
 BNX2_MCP_CPU_STATE_PAGE_0_DATA_BNX2_MCP_CPU_STATE_PAGE_0_DATA_ (1L<<3) bnx2.h 　
7195
 BNX2_MCP_CPU_STATE_PAGE_0_INST_BNX2_MCP_CPU_STATE_PAGE_0_INST_ (1L<<4) bnx2.h 　
7196
 BNX2_MCP_CPU_STATE_BAD_DATA_ADDBNX2_MCP_CPU_STATE_BAD_DATA_ADD (1L<<5) bnx2.h 　
7197
 BNX2_MCP_CPU_STATE_BAD_pc_HALTEBNX2_MCP_CPU_STATE_BAD_pc_HALTE (1L<<6) bnx2.h 　
7198
 BNX2_MCP_CPU_STATE_ALIGN_HALTEDBNX2_MCP_CPU_STATE_ALIGN_HALTED (1L<<7) bnx2.h 　
7199
 BNX2_MCP_CPU_STATE_FIO_ABORT_HABNX2_MCP_CPU_STATE_FIO_ABORT_HA (1L<<8) bnx2.h 　
7200
 BNX2_MCP_CPU_STATE_SOFT_HALTEDBNX2_MCP_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
7201
 BNX2_MCP_CPU_STATE_SPAD_UNDERFLBNX2_MCP_CPU_STATE_SPAD_UNDERFL (1L<<11) bnx2.h 　
7202
 BNX2_MCP_CPU_STATE_INTERRRUPTBNX2_MCP_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
7203
 BNX2_MCP_CPU_STATE_DATA_ACCESS_BNX2_MCP_CPU_STATE_DATA_ACCESS_ (1L<<14) bnx2.h 　
7204
 BNX2_MCP_CPU_STATE_INST_FETCH_SBNX2_MCP_CPU_STATE_INST_FETCH_S (1L<<15) bnx2.h 　
7205
 BNX2_MCP_CPU_STATE_BLOCKED_READBNX2_MCP_CPU_STATE_BLOCKED_READ (1L<<31) bnx2.h 　
7206
 BNX2_MCP_CPU_EVENT_MASKBNX2_MCP_CPU_EVENT_MASK 0x00145008 bnx2.h 　
7207
 BNX2_MCP_CPU_EVENT_MASK_BREAKPOBNX2_MCP_CPU_EVENT_MASK_BREAKPO (1L<<0) bnx2.h 　
7208
 BNX2_MCP_CPU_EVENT_MASK_BAD_INSBNX2_MCP_CPU_EVENT_MASK_BAD_INS (1L<<2) bnx2.h 　
7209
 BNX2_MCP_CPU_EVENT_MASK_PAGE_0_BNX2_MCP_CPU_EVENT_MASK_PAGE_0_ (1L<<3) bnx2.h 　
7210
 BNX2_MCP_CPU_EVENT_MASK_PAGE_0_BNX2_MCP_CPU_EVENT_MASK_PAGE_0_ (1L<<4) bnx2.h 　
7211
 BNX2_MCP_CPU_EVENT_MASK_BAD_DATBNX2_MCP_CPU_EVENT_MASK_BAD_DAT (1L<<5) bnx2.h 　
7212
 BNX2_MCP_CPU_EVENT_MASK_BAD_PC_BNX2_MCP_CPU_EVENT_MASK_BAD_PC_ (1L<<6) bnx2.h 　
7213
 BNX2_MCP_CPU_EVENT_MASK_ALIGN_HBNX2_MCP_CPU_EVENT_MASK_ALIGN_H (1L<<7) bnx2.h 　
7214
 BNX2_MCP_CPU_EVENT_MASK_FIO_ABOBNX2_MCP_CPU_EVENT_MASK_FIO_ABO (1L<<8) bnx2.h 　
7215
 BNX2_MCP_CPU_EVENT_MASK_SOFT_HABNX2_MCP_CPU_EVENT_MASK_SOFT_HA (1L<<10) bnx2.h 　
7216
 BNX2_MCP_CPU_EVENT_MASK_SPAD_UNBNX2_MCP_CPU_EVENT_MASK_SPAD_UN (1L<<11) bnx2.h 　
7217
 BNX2_MCP_CPU_EVENT_MASK_INTERRUBNX2_MCP_CPU_EVENT_MASK_INTERRU (1L<<12) bnx2.h 　
7218
 BNX2_MCP_CPU_PROGRAM_COUNTERBNX2_MCP_CPU_PROGRAM_COUNTER 0x0014501c bnx2.h 　
7219
 BNX2_MCP_CPU_INSTRUCTIONBNX2_MCP_CPU_INSTRUCTION 0x00145020 bnx2.h 　
7220
 BNX2_MCP_CPU_DATA_ACCESSBNX2_MCP_CPU_DATA_ACCESS 0x00145024 bnx2.h 　
7221
 BNX2_MCP_CPU_INTERRUPT_ENABLEBNX2_MCP_CPU_INTERRUPT_ENABLE 0x00145028 bnx2.h 　
7222
 BNX2_MCP_CPU_INTERRUPT_VECTORBNX2_MCP_CPU_INTERRUPT_VECTOR 0x0014502c bnx2.h 　
7223
 BNX2_MCP_CPU_INTERRUPT_SAVED_PCBNX2_MCP_CPU_INTERRUPT_SAVED_PC 0x00145030 bnx2.h 　
7224
 BNX2_MCP_CPU_HW_BREAKPOINTBNX2_MCP_CPU_HW_BREAKPOINT 0x00145034 bnx2.h 　
7225
 BNX2_MCP_CPU_HW_BREAKPOINT_DISABNX2_MCP_CPU_HW_BREAKPOINT_DISA (1L<<0) bnx2.h 　
7226
 BNX2_MCP_CPU_HW_BREAKPOINT_ADDRBNX2_MCP_CPU_HW_BREAKPOINT_ADDR (0x3fffffffL<<2) bnx2.h 　
7227
 BNX2_MCP_CPU_DEBUG_VECT_PEEKBNX2_MCP_CPU_DEBUG_VECT_PEEK 0x00145038 bnx2.h 　
7228
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_ (0x7ffL<<0) bnx2.h 　
7229
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_ (1L<<11) bnx2.h 　
7230
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_ (0xfL<<12) bnx2.h 　
7231
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_ (0x7ffL<<16) bnx2.h 　
7232
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_ (1L<<27) bnx2.h 　
7233
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_ (0xfL<<28) bnx2.h 　
7234
 BNX2_MCP_CPU_LAST_BRANCH_ADDRBNX2_MCP_CPU_LAST_BRANCH_ADDR 0x00145048 bnx2.h 　
7235
 BNX2_MCP_CPU_LAST_BRANCH_ADDR_TBNX2_MCP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
7236
 BNX2_MCP_CPU_LAST_BRANCH_ADDR_TBNX2_MCP_CPU_LAST_BRANCH_ADDR_T (0L<<1) bnx2.h 　
7237
 BNX2_MCP_CPU_LAST_BRANCH_ADDR_TBNX2_MCP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
7238
 BNX2_MCP_CPU_LAST_BRANCH_ADDR_LBNX2_MCP_CPU_LAST_BRANCH_ADDR_L (0x3fffffffL<<2) bnx2.h 　
7239
 BNX2_MCP_CPU_REG_FILEBNX2_MCP_CPU_REG_FILE 0x00145200 bnx2.h 　
7240
 BNX2_MCP_MCPQ_FTQ_DATABNX2_MCP_MCPQ_FTQ_DATA 0x001453c0 bnx2.h 　
7241
 BNX2_MCP_MCPQ_FTQ_CMDBNX2_MCP_MCPQ_FTQ_CMD 0x001453f8 bnx2.h 　
7242
 BNX2_MCP_MCPQ_FTQ_CMD_OFFSETBNX2_MCP_MCPQ_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
7243
 BNX2_MCP_MCPQ_FTQ_CMD_WR_TOPBNX2_MCP_MCPQ_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
7244
 BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
7245
 BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
7246
 BNX2_MCP_MCPQ_FTQ_CMD_SFT_RESETBNX2_MCP_MCPQ_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
7247
 BNX2_MCP_MCPQ_FTQ_CMD_RD_DATABNX2_MCP_MCPQ_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
7248
 BNX2_MCP_MCPQ_FTQ_CMD_ADD_INTERBNX2_MCP_MCPQ_FTQ_CMD_ADD_INTER (1L<<27) bnx2.h 　
7249
 BNX2_MCP_MCPQ_FTQ_CMD_ADD_DATABNX2_MCP_MCPQ_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
7250
 BNX2_MCP_MCPQ_FTQ_CMD_INTERVENEBNX2_MCP_MCPQ_FTQ_CMD_INTERVENE (1L<<29) bnx2.h 　
7251
 BNX2_MCP_MCPQ_FTQ_CMD_POPBNX2_MCP_MCPQ_FTQ_CMD_POP (1L<<30) bnx2.h 　
7252
 BNX2_MCP_MCPQ_FTQ_CMD_BUSYBNX2_MCP_MCPQ_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
7253
 BNX2_MCP_MCPQ_FTQ_CTLBNX2_MCP_MCPQ_FTQ_CTL 0x001453fc bnx2.h 　
7254
 BNX2_MCP_MCPQ_FTQ_CTL_INTERVENEBNX2_MCP_MCPQ_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
7255
 BNX2_MCP_MCPQ_FTQ_CTL_OVERFLOWBNX2_MCP_MCPQ_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
7256
 BNX2_MCP_MCPQ_FTQ_CTL_FORCE_INTBNX2_MCP_MCPQ_FTQ_CTL_FORCE_INT (1L<<2) bnx2.h 　
7257
 BNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTHBNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
7258
 BNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTHBNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
7259
 BNX2_MCP_ROMBNX2_MCP_ROM 0x00150000 bnx2.h 　
7260
 BNX2_MCP_SCRATCHBNX2_MCP_SCRATCH 0x00160000 bnx2.h 　
7261
 BNX2_SHM_HDR_SIGNATUREBNX2_SHM_HDR_SIGNATURE BNX2_MCP_SCRATCH bnx2.h 　
7262
 BNX2_SHM_HDR_SIGNATURE_SIG_MASKBNX2_SHM_HDR_SIGNATURE_SIG_MASK 0xffff0000 bnx2.h 　
7263
 BNX2_SHM_HDR_SIGNATURE_SIGBNX2_SHM_HDR_SIGNATURE_SIG 0x53530000 bnx2.h 　
7264
 BNX2_SHM_HDR_SIGNATURE_VER_MASKBNX2_SHM_HDR_SIGNATURE_VER_MASK 0x000000ff bnx2.h 　
7265
 BNX2_SHM_HDR_SIGNATURE_VER_ONEBNX2_SHM_HDR_SIGNATURE_VER_ONE 0x00000001 bnx2.h 　
7266
 BNX2_SHM_HDR_ADDR_0BNX2_SHM_HDR_ADDR_0 BNX2_MCP_SCRATCH + 4 bnx2.h 　
7267
 BNX2_SHM_HDR_ADDR_1BNX2_SHM_HDR_ADDR_1 BNX2_MCP_SCRATCH + 8 bnx2.h 　
7268
 NUM_MC_HASH_REGISTERSNUM_MC_HASH_REGISTERS 8 bnx2.h 　
7269
 PHY_BCM5706_PHY_IDPHY_BCM5706_PHY_ID 0x00206160 bnx2.h 　
7270
 BCM5708S_UP1BCM5708S_UP1 0xb bnx2.h 　
7271
 BCM5708S_UP1_2G5BCM5708S_UP1_2G5 0x1 bnx2.h 　
7272
 BCM5708S_BLK_ADDRBCM5708S_BLK_ADDR 0x1f bnx2.h 　
7273
 BCM5708S_BLK_ADDR_DIGBCM5708S_BLK_ADDR_DIG 0x0000 bnx2.h 　
7274
 BCM5708S_BLK_ADDR_DIG3BCM5708S_BLK_ADDR_DIG3 0x0002 bnx2.h 　
7275
 BCM5708S_BLK_ADDR_TX_MISCBCM5708S_BLK_ADDR_TX_MISC 0x0005 bnx2.h 　
7276
 BCM5708S_1000X_CTL1BCM5708S_1000X_CTL1 0x10 bnx2.h 　
7277
 BCM5708S_1000X_CTL1_FIBER_MODEBCM5708S_1000X_CTL1_FIBER_MODE 0x0001 bnx2.h 　
7278
 BCM5708S_1000X_CTL1_AUTODET_ENBCM5708S_1000X_CTL1_AUTODET_EN 0x0010 bnx2.h 　
7279
 BCM5708S_1000X_CTL2BCM5708S_1000X_CTL2 0x11 bnx2.h 　
7280
 BCM5708S_1000X_CTL2_PLLEL_DET_EBCM5708S_1000X_CTL2_PLLEL_DET_E 0x0001 bnx2.h 　
7281
 BCM5708S_1000X_STAT1BCM5708S_1000X_STAT1 0x14 bnx2.h 　
7282
 BCM5708S_1000X_STAT1_SGMIIBCM5708S_1000X_STAT1_SGMII 0x0001 bnx2.h 　
7283
 BCM5708S_1000X_STAT1_LINKBCM5708S_1000X_STAT1_LINK 0x0002 bnx2.h 　
7284
 BCM5708S_1000X_STAT1_FDBCM5708S_1000X_STAT1_FD 0x0004 bnx2.h 　
7285
 BCM5708S_1000X_STAT1_SPEED_MASKBCM5708S_1000X_STAT1_SPEED_MASK 0x0018 bnx2.h 　
7286
 BCM5708S_1000X_STAT1_SPEED_10BCM5708S_1000X_STAT1_SPEED_10 0x0000 bnx2.h 　
7287
 BCM5708S_1000X_STAT1_SPEED_100BCM5708S_1000X_STAT1_SPEED_100 0x0008 bnx2.h 　
7288
 BCM5708S_1000X_STAT1_SPEED_1GBCM5708S_1000X_STAT1_SPEED_1G 0x0010 bnx2.h 　
7289
 BCM5708S_1000X_STAT1_SPEED_2G5BCM5708S_1000X_STAT1_SPEED_2G5 0x0018 bnx2.h 　
7290
 BCM5708S_1000X_STAT1_TX_PAUSEBCM5708S_1000X_STAT1_TX_PAUSE 0x0020 bnx2.h 　
7291
 BCM5708S_1000X_STAT1_RX_PAUSEBCM5708S_1000X_STAT1_RX_PAUSE 0x0040 bnx2.h 　
7292
 BCM5708S_DIG_3_0BCM5708S_DIG_3_0 0x10 bnx2.h 　
7293
 BCM5708S_DIG_3_0_USE_IEEEBCM5708S_DIG_3_0_USE_IEEE 0x0001 bnx2.h 　
7294
 BCM5708S_TX_ACTL1BCM5708S_TX_ACTL1 0x15 bnx2.h 　
7295
 BCM5708S_TX_ACTL1_DRIVER_VCMBCM5708S_TX_ACTL1_DRIVER_VCM 0x30 bnx2.h 　
7296
 BCM5708S_TX_ACTL3BCM5708S_TX_ACTL3 0x17 bnx2.h 　
7297
 MIN_ETHERNET_PACKET_SIZEMIN_ETHERNET_PACKET_SIZE 60 bnx2.h 　
7298
 MAX_ETHERNET_PACKET_SIZEMAX_ETHERNET_PACKET_SIZE 1514 bnx2.h 　
7299
 MAX_ETHERNET_JUMBO_PACKET_SIZEMAX_ETHERNET_JUMBO_PACKET_SIZE 9014 bnx2.h 　
7300
 RX_COPY_THRESHRX_COPY_THRESH 92 bnx2.h 　
7301
 DMA_READ_CHANSDMA_READ_CHANS 5 bnx2.h 　
7302
 DMA_WRITE_CHANSDMA_WRITE_CHANS 3 bnx2.h 　
7303
 BCM_PAGE_BITSBCM_PAGE_BITS 12 bnx2.h 　
7304
 BCM_PAGE_SIZEBCM_PAGE_SIZE (1 << BCM_PAGE_BITS) bnx2.h 　
7305
 TX_DESC_CNTTX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct tx_bd)) bnx2.h 　
7306
 MAX_TX_DESC_CNTMAX_TX_DESC_CNT (TX_DESC_CNT - 1) bnx2.h 　
7307
 MAX_RX_RINGSMAX_RX_RINGS 4 bnx2.h 　
7308
 RX_DESC_CNTRX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct rx_bd)) bnx2.h 　
7309
 MAX_RX_DESC_CNTMAX_RX_DESC_CNT (RX_DESC_CNT - 1) bnx2.h 　
7310
 MAX_TOTAL_RX_DESC_CNTMAX_TOTAL_RX_DESC_CNT (MAX_RX_DESC_CNT * MAX_RX_RINGS) bnx2.h 　
7311
 CTX_SHIFTCTX_SHIFT 7 bnx2.h 　
7312
 CTX_SIZECTX_SIZE (1 << CTX_SHIFT) bnx2.h 　
7313
 CTX_MASKCTX_MASK (CTX_SIZE - 1) bnx2.h 　
7314
 PHY_CTX_SHIFTPHY_CTX_SHIFT 6 bnx2.h 　
7315
 PHY_CTX_SIZEPHY_CTX_SIZE (1 << PHY_CTX_SHIFT) bnx2.h 　
7316
 PHY_CTX_MASKPHY_CTX_MASK (PHY_CTX_SIZE - 1) bnx2.h 　
7317
 MB_KERNEL_CTX_SHIFTMB_KERNEL_CTX_SHIFT 8 bnx2.h 　
7318
 MB_KERNEL_CTX_SIZEMB_KERNEL_CTX_SIZE (1 << MB_KERNEL_CTX_SHIFT) bnx2.h 　
7319
 MB_KERNEL_CTX_MASKMB_KERNEL_CTX_MASK (MB_KERNEL_CTX_SIZE - 1) bnx2.h 　
7320
 MAX_CID_CNTMAX_CID_CNT 0x4000 bnx2.h 　
7321
 MAX_CID_ADDRMAX_CID_ADDR (GET_CID_ADDR(MAX_CID_CNT)) bnx2.h 　
7322
 INVALID_CID_ADDRINVALID_CID_ADDR 0xffffffff bnx2.h 　
7323
 TX_CIDTX_CID 16 bnx2.h 　
7324
 RX_CIDRX_CID 0 bnx2.h 　
7325
 MB_TX_CID_ADDRMB_TX_CID_ADDR MB_GET_CID_ADDR(TX_CID) bnx2.h 　
7326
 MB_RX_CID_ADDRMB_RX_CID_ADDR MB_GET_CID_ADDR(RX_CID) bnx2.h 　
7327
 SEEPROM_PAGE_BITSSEEPROM_PAGE_BITS 2 bnx2.h 　
7328
 SEEPROM_PHY_PAGE_SIZESEEPROM_PHY_PAGE_SIZE (1 << SEEPROM_PAGE_BITS) bnx2.h 　
7329
 SEEPROM_BYTE_ADDR_MASKSEEPROM_BYTE_ADDR_MASK (SEEPROM_PHY_PAGE_SIZE-1) bnx2.h 　
7330
 SEEPROM_PAGE_SIZESEEPROM_PAGE_SIZE 4 bnx2.h 　
7331
 SEEPROM_TOTAL_SIZESEEPROM_TOTAL_SIZE 65536 bnx2.h 　
7332
 BUFFERED_FLASH_PAGE_BITSBUFFERED_FLASH_PAGE_BITS 9 bnx2.h 　
7333
 BUFFERED_FLASH_PHY_PAGE_SIZEBUFFERED_FLASH_PHY_PAGE_SIZE (1 << BUFFERED_FLASH_PAGE_BITS) bnx2.h 　
7334
 BUFFERED_FLASH_BYTE_ADDR_MASKBUFFERED_FLASH_BYTE_ADDR_MASK (BUFFERED_FLASH_PHY_PAGE_SIZE-1) bnx2.h 　
7335
 BUFFERED_FLASH_PAGE_SIZEBUFFERED_FLASH_PAGE_SIZE 264 bnx2.h 　
7336
 BUFFERED_FLASH_TOTAL_SIZEBUFFERED_FLASH_TOTAL_SIZE 0x21000 bnx2.h 　
7337
 SAIFUN_FLASH_PAGE_BITSSAIFUN_FLASH_PAGE_BITS 8 bnx2.h 　
7338
 SAIFUN_FLASH_PHY_PAGE_SIZESAIFUN_FLASH_PHY_PAGE_SIZE (1 << SAIFUN_FLASH_PAGE_BITS) bnx2.h 　
7339
 SAIFUN_FLASH_BYTE_ADDR_MASKSAIFUN_FLASH_BYTE_ADDR_MASK (SAIFUN_FLASH_PHY_PAGE_SIZE-1) bnx2.h 　
7340
 SAIFUN_FLASH_PAGE_SIZESAIFUN_FLASH_PAGE_SIZE 256 bnx2.h 　
7341
 SAIFUN_FLASH_BASE_TOTAL_SIZESAIFUN_FLASH_BASE_TOTAL_SIZE 65536 bnx2.h 　
7342
 ST_MICRO_FLASH_PAGE_BITSST_MICRO_FLASH_PAGE_BITS 8 bnx2.h 　
7343
 ST_MICRO_FLASH_PHY_PAGE_SIZEST_MICRO_FLASH_PHY_PAGE_SIZE (1 << ST_MICRO_FLASH_PAGE_BITS) bnx2.h 　
7344
 ST_MICRO_FLASH_BYTE_ADDR_MASKST_MICRO_FLASH_BYTE_ADDR_MASK (ST_MICRO_FLASH_PHY_PAGE_SIZE-1) bnx2.h 　
7345
 ST_MICRO_FLASH_PAGE_SIZEST_MICRO_FLASH_PAGE_SIZE 256 bnx2.h 　
7346
 ST_MICRO_FLASH_BASE_TOTAL_SIZEST_MICRO_FLASH_BASE_TOTAL_SIZE 65536 bnx2.h 　
7347
 NVRAM_TIMEOUT_COUNTNVRAM_TIMEOUT_COUNT 30000 bnx2.h 　
7348
 FLASH_STRAP_MASKFLASH_STRAP_MASK (BNX2_NVM_CFG1_FLASH_MODE | \ BNX2_NVM_CFG1_BUFFER_MODE | \ BNX2_NVM_CFG1_PROTECT_MODE | \ BNX2_NVM_CFG1_FLASH_SIZE) bnx2.h 　
7349
 FLASH_BACKUP_STRAP_MASKFLASH_BACKUP_STRAP_MASK (0xf << 26) bnx2.h 　
7350
 RV2P_PROC1RV2P_PROC1 0 bnx2.h 　
7351
 RV2P_PROC2RV2P_PROC2 1 bnx2.h 　
7352
 DRV_PULSE_PERIOD_MSDRV_PULSE_PERIOD_MS 250 bnx2.h 　
7353
 FW_ACK_TIME_OUT_MSFW_ACK_TIME_OUT_MS 100 bnx2.h 　
7354
 BNX2_DRV_RESET_SIGNATUREBNX2_DRV_RESET_SIGNATURE 0x00000000 bnx2.h 　
7355
 BNX2_DRV_RESET_SIGNATURE_MAGICBNX2_DRV_RESET_SIGNATURE_MAGIC 0x4841564b bnx2.h HAVK
7356
 BNX2_DRV_MBBNX2_DRV_MB 0x00000004 bnx2.h 　
7357
 BNX2_DRV_MSG_CODEBNX2_DRV_MSG_CODE 0xff000000 bnx2.h 　
7358
 BNX2_DRV_MSG_CODE_RESETBNX2_DRV_MSG_CODE_RESET 0x01000000 bnx2.h 　
7359
 BNX2_DRV_MSG_CODE_UNLOADBNX2_DRV_MSG_CODE_UNLOAD 0x02000000 bnx2.h 　
7360
 BNX2_DRV_MSG_CODE_SHUTDOWNBNX2_DRV_MSG_CODE_SHUTDOWN 0x03000000 bnx2.h 　
7361
 BNX2_DRV_MSG_CODE_SUSPEND_WOLBNX2_DRV_MSG_CODE_SUSPEND_WOL 0x04000000 bnx2.h 　
7362
 BNX2_DRV_MSG_CODE_FW_TIMEOUTBNX2_DRV_MSG_CODE_FW_TIMEOUT 0x05000000 bnx2.h 　
7363
 BNX2_DRV_MSG_CODE_PULSEBNX2_DRV_MSG_CODE_PULSE 0x06000000 bnx2.h 　
7364
 BNX2_DRV_MSG_CODE_DIAGBNX2_DRV_MSG_CODE_DIAG 0x07000000 bnx2.h 　
7365
 BNX2_DRV_MSG_CODE_SUSPEND_NO_WOBNX2_DRV_MSG_CODE_SUSPEND_NO_WO 0x09000000 bnx2.h 　
7366
 BNX2_DRV_MSG_DATABNX2_DRV_MSG_DATA 0x00ff0000 bnx2.h 　
7367
 BNX2_DRV_MSG_DATA_WAIT0BNX2_DRV_MSG_DATA_WAIT0 0x00010000 bnx2.h 　
7368
 BNX2_DRV_MSG_DATA_WAIT1BNX2_DRV_MSG_DATA_WAIT1 0x00020000 bnx2.h 　
7369
 BNX2_DRV_MSG_DATA_WAIT2BNX2_DRV_MSG_DATA_WAIT2 0x00030000 bnx2.h 　
7370
 BNX2_DRV_MSG_DATA_WAIT3BNX2_DRV_MSG_DATA_WAIT3 0x00040000 bnx2.h 　
7371
 BNX2_DRV_MSG_SEQBNX2_DRV_MSG_SEQ 0x0000ffff bnx2.h 　
7372
 BNX2_FW_MBBNX2_FW_MB 0x00000008 bnx2.h 　
7373
 BNX2_FW_MSG_ACKBNX2_FW_MSG_ACK 0x0000ffff bnx2.h 　
7374
 BNX2_FW_MSG_STATUS_MASKBNX2_FW_MSG_STATUS_MASK 0x00ff0000 bnx2.h 　
7375
 BNX2_FW_MSG_STATUS_OKBNX2_FW_MSG_STATUS_OK 0x00000000 bnx2.h 　
7376
 BNX2_FW_MSG_STATUS_FAILUREBNX2_FW_MSG_STATUS_FAILURE 0x00ff0000 bnx2.h 　
7377
 BNX2_LINK_STATUSBNX2_LINK_STATUS 0x0000000c bnx2.h 　
7378
 BNX2_LINK_STATUS_INIT_VALUEBNX2_LINK_STATUS_INIT_VALUE 0xffffffff bnx2.h 　
7379
 BNX2_LINK_STATUS_LINK_UPBNX2_LINK_STATUS_LINK_UP 0x1 bnx2.h 　
7380
 BNX2_LINK_STATUS_LINK_DOWNBNX2_LINK_STATUS_LINK_DOWN 0x0 bnx2.h 　
7381
 BNX2_LINK_STATUS_SPEED_MASKBNX2_LINK_STATUS_SPEED_MASK 0x1e bnx2.h 　
7382
 BNX2_LINK_STATUS_AN_INCOMPLETEBNX2_LINK_STATUS_AN_INCOMPLETE (0<<1) bnx2.h 　
7383
 BNX2_LINK_STATUS_10HALFBNX2_LINK_STATUS_10HALF (1<<1) bnx2.h 　
7384
 BNX2_LINK_STATUS_10FULLBNX2_LINK_STATUS_10FULL (2<<1) bnx2.h 　
7385
 BNX2_LINK_STATUS_100HALFBNX2_LINK_STATUS_100HALF (3<<1) bnx2.h 　
7386
 BNX2_LINK_STATUS_100BASE_T4BNX2_LINK_STATUS_100BASE_T4 (4<<1) bnx2.h 　
7387
 BNX2_LINK_STATUS_100FULLBNX2_LINK_STATUS_100FULL (5<<1) bnx2.h 　
7388
 BNX2_LINK_STATUS_1000HALFBNX2_LINK_STATUS_1000HALF (6<<1) bnx2.h 　
7389
 BNX2_LINK_STATUS_1000FULLBNX2_LINK_STATUS_1000FULL (7<<1) bnx2.h 　
7390
 BNX2_LINK_STATUS_2500HALFBNX2_LINK_STATUS_2500HALF (8<<1) bnx2.h 　
7391
 BNX2_LINK_STATUS_2500FULLBNX2_LINK_STATUS_2500FULL (9<<1) bnx2.h 　
7392
 BNX2_LINK_STATUS_AN_ENABLEDBNX2_LINK_STATUS_AN_ENABLED (1<<5) bnx2.h 　
7393
 BNX2_LINK_STATUS_AN_COMPLETEBNX2_LINK_STATUS_AN_COMPLETE (1<<6) bnx2.h 　
7394
 BNX2_LINK_STATUS_PARALLEL_DETBNX2_LINK_STATUS_PARALLEL_DET (1<<7) bnx2.h 　
7395
 BNX2_LINK_STATUS_RESERVEDBNX2_LINK_STATUS_RESERVED (1<<8) bnx2.h 　
7396
 BNX2_LINK_STATUS_PARTNER_AD_100BNX2_LINK_STATUS_PARTNER_AD_100 (1<<9) bnx2.h 　
7397
 BNX2_LINK_STATUS_PARTNER_AD_100BNX2_LINK_STATUS_PARTNER_AD_100 (1<<10) bnx2.h 　
7398
 BNX2_LINK_STATUS_PARTNER_AD_100BNX2_LINK_STATUS_PARTNER_AD_100 (1<<11) bnx2.h 　
7399
 BNX2_LINK_STATUS_PARTNER_AD_100BNX2_LINK_STATUS_PARTNER_AD_100 (1<<12) bnx2.h 　
7400
 BNX2_LINK_STATUS_PARTNER_AD_100BNX2_LINK_STATUS_PARTNER_AD_100 (1<<13) bnx2.h 　
7401
 BNX2_LINK_STATUS_PARTNER_AD_10FBNX2_LINK_STATUS_PARTNER_AD_10F (1<<14) bnx2.h 　
7402
 BNX2_LINK_STATUS_PARTNER_AD_10HBNX2_LINK_STATUS_PARTNER_AD_10H (1<<15) bnx2.h 　
7403
 BNX2_LINK_STATUS_TX_FC_ENABLEDBNX2_LINK_STATUS_TX_FC_ENABLED (1<<16) bnx2.h 　
7404
 BNX2_LINK_STATUS_RX_FC_ENABLEDBNX2_LINK_STATUS_RX_FC_ENABLED (1<<17) bnx2.h 　
7405
 BNX2_LINK_STATUS_PARTNER_SYM_PABNX2_LINK_STATUS_PARTNER_SYM_PA (1<<18) bnx2.h 　
7406
 BNX2_LINK_STATUS_PARTNER_ASYM_PBNX2_LINK_STATUS_PARTNER_ASYM_P (1<<19) bnx2.h 　
7407
 BNX2_LINK_STATUS_SERDES_LINKBNX2_LINK_STATUS_SERDES_LINK (1<<20) bnx2.h 　
7408
 BNX2_LINK_STATUS_PARTNER_AD_250BNX2_LINK_STATUS_PARTNER_AD_250 (1<<21) bnx2.h 　
7409
 BNX2_LINK_STATUS_PARTNER_AD_250BNX2_LINK_STATUS_PARTNER_AD_250 (1<<22) bnx2.h 　
7410
 BNX2_DRV_PULSE_MBBNX2_DRV_PULSE_MB 0x00000010 bnx2.h 　
7411
 BNX2_DRV_PULSE_SEQ_MASKBNX2_DRV_PULSE_SEQ_MASK 0x00007fff bnx2.h 　
7412
 BNX2_DRV_MSG_DATA_PULSE_CODE_ALBNX2_DRV_MSG_DATA_PULSE_CODE_AL 0x00080000 bnx2.h 　
7413
 BNX2_DEV_INFO_SIGNATUREBNX2_DEV_INFO_SIGNATURE 0x00000020 bnx2.h 　
7414
 BNX2_DEV_INFO_SIGNATURE_MAGICBNX2_DEV_INFO_SIGNATURE_MAGIC 0x44564900 bnx2.h 　
7415
 BNX2_DEV_INFO_SIGNATURE_MAGIC_MBNX2_DEV_INFO_SIGNATURE_MAGIC_M 0xffffff00 bnx2.h 　
7416
 BNX2_DEV_INFO_FEATURE_CFG_VALIDBNX2_DEV_INFO_FEATURE_CFG_VALID 0x01 bnx2.h 　
7417
 BNX2_DEV_INFO_SECONDARY_PORTBNX2_DEV_INFO_SECONDARY_PORT 0x80 bnx2.h 　
7418
 BNX2_DEV_INFO_DRV_ALWAYS_ALIVEBNX2_DEV_INFO_DRV_ALWAYS_ALIVE 0x40 bnx2.h 　
7419
 BNX2_SHARED_HW_CFG_PART_NUMBNX2_SHARED_HW_CFG_PART_NUM 0x00000024 bnx2.h 　
7420
 BNX2_SHARED_HW_CFG_POWER_DISSIPBNX2_SHARED_HW_CFG_POWER_DISSIP 0x00000034 bnx2.h 　
7421
 BNX2_SHARED_HW_CFG_POWER_STATE_BNX2_SHARED_HW_CFG_POWER_STATE_ 0xff000000 bnx2.h 　
7422
 BNX2_SHARED_HW_CFG_POWER_STATE_BNX2_SHARED_HW_CFG_POWER_STATE_ 0xff0000 bnx2.h 　
7423
 BNX2_SHARED_HW_CFG_POWER_STATE_BNX2_SHARED_HW_CFG_POWER_STATE_ 0xff00 bnx2.h 　
7424
 BNX2_SHARED_HW_CFG_POWER_STATE_BNX2_SHARED_HW_CFG_POWER_STATE_ 0xff bnx2.h 　
7425
 BNX2_SHARED_HW_CFGBNX2_SHARED_HW_CFG POWER_CONSUMED 0x00000038 bnx2.h 　
7426
 BNX2_SHARED_HW_CFG_CONFIGBNX2_SHARED_HW_CFG_CONFIG 0x0000003c bnx2.h 　
7427
 BNX2_SHARED_HW_CFG_DESIGN_NICBNX2_SHARED_HW_CFG_DESIGN_NIC 0 bnx2.h 　
7428
 BNX2_SHARED_HW_CFG_DESIGN_LOMBNX2_SHARED_HW_CFG_DESIGN_LOM 0x1 bnx2.h 　
7429
 BNX2_SHARED_HW_CFG_PHY_COPPERBNX2_SHARED_HW_CFG_PHY_COPPER 0 bnx2.h 　
7430
 BNX2_SHARED_HW_CFG_PHY_FIBERBNX2_SHARED_HW_CFG_PHY_FIBER 0x2 bnx2.h 　
7431
 BNX2_SHARED_HW_CFG_PHY_2_5GBNX2_SHARED_HW_CFG_PHY_2_5G 0x20 bnx2.h 　
7432
 BNX2_SHARED_HW_CFG_PHY_BACKPLANBNX2_SHARED_HW_CFG_PHY_BACKPLAN 0x40 bnx2.h 　
7433
 BNX2_SHARED_HW_CFG_LED_MODE_SHIBNX2_SHARED_HW_CFG_LED_MODE_SHI 8 bnx2.h 　
7434
 BNX2_SHARED_HW_CFG_LED_MODE_MASBNX2_SHARED_HW_CFG_LED_MODE_MAS 0x300 bnx2.h 　
7435
 BNX2_SHARED_HW_CFG_LED_MODE_MACBNX2_SHARED_HW_CFG_LED_MODE_MAC 0 bnx2.h 　
7436
 BNX2_SHARED_HW_CFG_LED_MODE_GPHBNX2_SHARED_HW_CFG_LED_MODE_GPH 0x100 bnx2.h 　
7437
 BNX2_SHARED_HW_CFG_LED_MODE_GPHBNX2_SHARED_HW_CFG_LED_MODE_GPH 0x200 bnx2.h 　
7438
 BNX2_SHARED_HW_CFG_CONFIG2BNX2_SHARED_HW_CFG_CONFIG2 0x00000040 bnx2.h 　
7439
 BNX2_SHARED_HW_CFG2_NVM_SIZE_MABNX2_SHARED_HW_CFG2_NVM_SIZE_MA 0x00fff000 bnx2.h 　
7440
 BNX2_DEV_INFO_BC_REVBNX2_DEV_INFO_BC_REV 0x0000004c bnx2.h 　
7441
 BNX2_PORT_HW_CFG_MAC_UPPERBNX2_PORT_HW_CFG_MAC_UPPER 0x00000050 bnx2.h 　
7442
 BNX2_PORT_HW_CFG_UPPERMAC_MASKBNX2_PORT_HW_CFG_UPPERMAC_MASK 0xffff bnx2.h 　
7443
 BNX2_PORT_HW_CFG_MAC_LOWERBNX2_PORT_HW_CFG_MAC_LOWER 0x00000054 bnx2.h 　
7444
 BNX2_PORT_HW_CFG_CONFIGBNX2_PORT_HW_CFG_CONFIG 0x00000058 bnx2.h 　
7445
 BNX2_PORT_HW_CFG_CFG_TXCTL3_MASBNX2_PORT_HW_CFG_CFG_TXCTL3_MAS 0x0000ffff bnx2.h 　
7446
 BNX2_PORT_HW_CFG_CFG_DFLT_LINK_BNX2_PORT_HW_CFG_CFG_DFLT_LINK_ 0x001f0000 bnx2.h 　
7447
 BNX2_PORT_HW_CFG_CFG_DFLT_LINK_BNX2_PORT_HW_CFG_CFG_DFLT_LINK_ 0x00000000 bnx2.h 　
7448
 BNX2_PORT_HW_CFG_CFG_DFLT_LINK_BNX2_PORT_HW_CFG_CFG_DFLT_LINK_ 0x00030000 bnx2.h 　
7449
 BNX2_PORT_HW_CFG_CFG_DFLT_LINK_BNX2_PORT_HW_CFG_CFG_DFLT_LINK_ 0x00040000 bnx2.h 　
7450
 BNX2_PORT_HW_CFG_IMD_MAC_A_UPPEBNX2_PORT_HW_CFG_IMD_MAC_A_UPPE 0x00000068 bnx2.h 　
7451
 BNX2_PORT_HW_CFG_IMD_MAC_A_LOWEBNX2_PORT_HW_CFG_IMD_MAC_A_LOWE 0x0000006c bnx2.h 　
7452
 BNX2_PORT_HW_CFG_IMD_MAC_B_UPPEBNX2_PORT_HW_CFG_IMD_MAC_B_UPPE 0x00000070 bnx2.h 　
7453
 BNX2_PORT_HW_CFG_IMD_MAC_B_LOWEBNX2_PORT_HW_CFG_IMD_MAC_B_LOWE 0x00000074 bnx2.h 　
7454
 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPEBNX2_PORT_HW_CFG_ISCSI_MAC_UPPE 0x00000078 bnx2.h 　
7455
 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWEBNX2_PORT_HW_CFG_ISCSI_MAC_LOWE 0x0000007c bnx2.h 　
7456
 BNX2_DEV_INFO_PER_PORT_HW_CONFIBNX2_DEV_INFO_PER_PORT_HW_CONFI 0x000000b4 bnx2.h 　
7457
 BNX2_DEV_INFO_FORMAT_REVBNX2_DEV_INFO_FORMAT_REV 0x000000c4 bnx2.h 　
7458
 BNX2_DEV_INFO_FORMAT_REV_MASKBNX2_DEV_INFO_FORMAT_REV_MASK 0xff000000 bnx2.h 　
7459
 BNX2_DEV_INFO_FORMAT_REV_IDBNX2_DEV_INFO_FORMAT_REV_ID ('A' << 24) bnx2.h 　
7460
 BNX2_SHARED_FEATUREBNX2_SHARED_FEATURE 0x000000c8 bnx2.h 　
7461
 BNX2_SHARED_FEATURE_MASKBNX2_SHARED_FEATURE_MASK 0xffffffff bnx2.h 　
7462
 BNX2_PORT_FEATUREBNX2_PORT_FEATURE 0x000000d8 bnx2.h 　
7463
 BNX2_PORT2_FEATUREBNX2_PORT2_FEATURE 0x00000014c bnx2.h 　
7464
 BNX2_PORT_FEATURE_WOL_ENABLEDBNX2_PORT_FEATURE_WOL_ENABLED 0x01000000 bnx2.h 　
7465
 BNX2_PORT_FEATURE_MBA_ENABLEDBNX2_PORT_FEATURE_MBA_ENABLED 0x02000000 bnx2.h 　
7466
 BNX2_PORT_FEATURE_ASF_ENABLEDBNX2_PORT_FEATURE_ASF_ENABLED 0x04000000 bnx2.h 　
7467
 BNX2_PORT_FEATURE_IMD_ENABLEDBNX2_PORT_FEATURE_IMD_ENABLED 0x08000000 bnx2.h 　
7468
 BNX2_PORT_FEATURE_BAR1_SIZE_MASBNX2_PORT_FEATURE_BAR1_SIZE_MAS 0xf bnx2.h 　
7469
 BNX2_PORT_FEATURE_BAR1_SIZE_DISBNX2_PORT_FEATURE_BAR1_SIZE_DIS 0x0 bnx2.h 　
7470
 BNX2_PORT_FEATURE_BAR1_SIZE_64KBNX2_PORT_FEATURE_BAR1_SIZE_64K 0x1 bnx2.h 　
7471
 BNX2_PORT_FEATURE_BAR1_SIZE_128BNX2_PORT_FEATURE_BAR1_SIZE_128 0x2 bnx2.h 　
7472
 BNX2_PORT_FEATURE_BAR1_SIZE_256BNX2_PORT_FEATURE_BAR1_SIZE_256 0x3 bnx2.h 　
7473
 BNX2_PORT_FEATURE_BAR1_SIZE_512BNX2_PORT_FEATURE_BAR1_SIZE_512 0x4 bnx2.h 　
7474
 BNX2_PORT_FEATURE_BAR1_SIZE_1MBNX2_PORT_FEATURE_BAR1_SIZE_1M 0x5 bnx2.h 　
7475
 BNX2_PORT_FEATURE_BAR1_SIZE_2MBNX2_PORT_FEATURE_BAR1_SIZE_2M 0x6 bnx2.h 　
7476
 BNX2_PORT_FEATURE_BAR1_SIZE_4MBNX2_PORT_FEATURE_BAR1_SIZE_4M 0x7 bnx2.h 　
7477
 BNX2_PORT_FEATURE_BAR1_SIZE_8MBNX2_PORT_FEATURE_BAR1_SIZE_8M 0x8 bnx2.h 　
7478
 BNX2_PORT_FEATURE_BAR1_SIZE_16MBNX2_PORT_FEATURE_BAR1_SIZE_16M 0x9 bnx2.h 　
7479
 BNX2_PORT_FEATURE_BAR1_SIZE_32MBNX2_PORT_FEATURE_BAR1_SIZE_32M 0xa bnx2.h 　
7480
 BNX2_PORT_FEATURE_BAR1_SIZE_64MBNX2_PORT_FEATURE_BAR1_SIZE_64M 0xb bnx2.h 　
7481
 BNX2_PORT_FEATURE_BAR1_SIZE_128BNX2_PORT_FEATURE_BAR1_SIZE_128 0xc bnx2.h 　
7482
 BNX2_PORT_FEATURE_BAR1_SIZE_256BNX2_PORT_FEATURE_BAR1_SIZE_256 0xd bnx2.h 　
7483
 BNX2_PORT_FEATURE_BAR1_SIZE_512BNX2_PORT_FEATURE_BAR1_SIZE_512 0xe bnx2.h 　
7484
 BNX2_PORT_FEATURE_BAR1_SIZE_1GBNX2_PORT_FEATURE_BAR1_SIZE_1G 0xf bnx2.h 　
7485
 BNX2_PORT_FEATURE_WOLBNX2_PORT_FEATURE_WOL 0xdc bnx2.h 　
7486
 BNX2_PORT2_FEATURE_WOLBNX2_PORT2_FEATURE_WOL 0x150 bnx2.h 　
7487
 BNX2_PORT_FEATURE_WOL_DEFAULT_SBNX2_PORT_FEATURE_WOL_DEFAULT_S 4 bnx2.h 　
7488
 BNX2_PORT_FEATURE_WOL_DEFAULT_MBNX2_PORT_FEATURE_WOL_DEFAULT_M 0x30 bnx2.h 　
7489
 BNX2_PORT_FEATURE_WOL_DEFAULT_DBNX2_PORT_FEATURE_WOL_DEFAULT_D 0 bnx2.h 　
7490
 BNX2_PORT_FEATURE_WOL_DEFAULT_MBNX2_PORT_FEATURE_WOL_DEFAULT_M 0x10 bnx2.h 　
7491
 BNX2_PORT_FEATURE_WOL_DEFAULT_ABNX2_PORT_FEATURE_WOL_DEFAULT_A 0x20 bnx2.h 　
7492
 BNX2_PORT_FEATURE_WOL_DEFAULT_MBNX2_PORT_FEATURE_WOL_DEFAULT_M 0x30 bnx2.h 　
7493
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 0xf bnx2.h 　
7494
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 0 bnx2.h 　
7495
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 1 bnx2.h 　
7496
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 2 bnx2.h 　
7497
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 3 bnx2.h 　
7498
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 4 bnx2.h 　
7499
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 5 bnx2.h 　
7500
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 6 bnx2.h 　
7501
 BNX2_PORT_FEATURE_WOL_AUTONEG_ABNX2_PORT_FEATURE_WOL_AUTONEG_A 0x40 bnx2.h 　
7502
 BNX2_PORT_FEATURE_WOL_RESERVED_BNX2_PORT_FEATURE_WOL_RESERVED_ 0x400 bnx2.h 　
7503
 BNX2_PORT_FEATURE_WOL_RESERVED_BNX2_PORT_FEATURE_WOL_RESERVED_ 0x800 bnx2.h 　
7504
 BNX2_PORT_FEATURE_MBABNX2_PORT_FEATURE_MBA 0xe0 bnx2.h 　
7505
 BNX2_PORT2_FEATURE_MBABNX2_PORT2_FEATURE_MBA 0x154 bnx2.h 　
7506
 BNX2_PORT_FEATURE_MBA_BOOT_AGENBNX2_PORT_FEATURE_MBA_BOOT_AGEN 0 bnx2.h 　
7507
 BNX2_PORT_FEATURE_MBA_BOOT_AGENBNX2_PORT_FEATURE_MBA_BOOT_AGEN 0x3 bnx2.h 　
7508
 BNX2_PORT_FEATURE_MBA_BOOT_AGENBNX2_PORT_FEATURE_MBA_BOOT_AGEN 0 bnx2.h 　
7509
 BNX2_PORT_FEATURE_MBA_BOOT_AGENBNX2_PORT_FEATURE_MBA_BOOT_AGEN 1 bnx2.h 　
7510
 BNX2_PORT_FEATURE_MBA_BOOT_AGENBNX2_PORT_FEATURE_MBA_BOOT_AGEN 2 bnx2.h 　
7511
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 2 bnx2.h 　
7512
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x3c bnx2.h 　
7513
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0 bnx2.h 　
7514
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x4 bnx2.h 　
7515
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x8 bnx2.h 　
7516
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0xc bnx2.h 　
7517
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x10 bnx2.h 　
7518
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x14 bnx2.h 　
7519
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x18 bnx2.h 　
7520
 BNX2_PORT_FEATURE_MBA_SETUP_PROBNX2_PORT_FEATURE_MBA_SETUP_PRO 0x40 bnx2.h 　
7521
 BNX2_PORT_FEATURE_MBA_HOTKEY_CTBNX2_PORT_FEATURE_MBA_HOTKEY_CT 0 bnx2.h 　
7522
 BNX2_PORT_FEATURE_MBA_HOTKEY_CTBNX2_PORT_FEATURE_MBA_HOTKEY_CT 0x80 bnx2.h 　
7523
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 8 bnx2.h 　
7524
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xff00 bnx2.h 　
7525
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0 bnx2.h 　
7526
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x100 bnx2.h 　
7527
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x200 bnx2.h 　
7528
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x300 bnx2.h 　
7529
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x400 bnx2.h 　
7530
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x500 bnx2.h 　
7531
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x600 bnx2.h 　
7532
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x700 bnx2.h 　
7533
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x800 bnx2.h 　
7534
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x900 bnx2.h 　
7535
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xa00 bnx2.h 　
7536
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xb00 bnx2.h 　
7537
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xc00 bnx2.h 　
7538
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xd00 bnx2.h 　
7539
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xe00 bnx2.h 　
7540
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xf00 bnx2.h 　
7541
 BNX2_PORT_FEATURE_MBA_MSG_TIMEOBNX2_PORT_FEATURE_MBA_MSG_TIMEO 16 bnx2.h 　
7542
 BNX2_PORT_FEATURE_MBA_MSG_TIMEOBNX2_PORT_FEATURE_MBA_MSG_TIMEO 0xf0000 bnx2.h 　
7543
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 20 bnx2.h 　
7544
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 0x300000 bnx2.h 　
7545
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 0 bnx2.h 　
7546
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 0x100000 bnx2.h 　
7547
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 0x200000 bnx2.h 　
7548
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 0x300000 bnx2.h 　
7549
 BNX2_PORT_FEATURE_IMDBNX2_PORT_FEATURE_IMD 0xe4 bnx2.h 　
7550
 BNX2_PORT2_FEATURE_IMDBNX2_PORT2_FEATURE_IMD 0x158 bnx2.h 　
7551
 BNX2_PORT_FEATURE_IMD_LINK_OVERBNX2_PORT_FEATURE_IMD_LINK_OVER 0 bnx2.h 　
7552
 BNX2_PORT_FEATURE_IMD_LINK_OVERBNX2_PORT_FEATURE_IMD_LINK_OVER 1 bnx2.h 　
7553
 BNX2_PORT_FEATURE_VLANBNX2_PORT_FEATURE_VLAN 0xe8 bnx2.h 　
7554
 BNX2_PORT2_FEATURE_VLANBNX2_PORT2_FEATURE_VLAN 0x15c bnx2.h 　
7555
 BNX2_PORT_FEATURE_MBA_VLAN_TAG_BNX2_PORT_FEATURE_MBA_VLAN_TAG_ 0xffff bnx2.h 　
7556
 BNX2_PORT_FEATURE_MBA_VLAN_ENABBNX2_PORT_FEATURE_MBA_VLAN_ENAB 0x10000 bnx2.h 　
7557
 BNX2_BC_STATE_RESET_TYPEBNX2_BC_STATE_RESET_TYPE 0x000001c0 bnx2.h 　
7558
 BNX2_BC_STATE_RESET_TYPE_SIGBNX2_BC_STATE_RESET_TYPE_SIG 0x00005254 bnx2.h 　
7559
 BNX2_BC_STATE_RESET_TYPE_SIG_MABNX2_BC_STATE_RESET_TYPE_SIG_MA 0x0000ffff bnx2.h 　
7560
 BNX2_BC_STATE_RESET_TYPE_NONEBNX2_BC_STATE_RESET_TYPE_NONE (BNX2_BC_STATE_RESET_TYPE_SIG | \ 0x00010000) bnx2.h 　
7561
 BNX2_BC_STATE_RESET_TYPE_PCIBNX2_BC_STATE_RESET_TYPE_PCI (BNX2_BC_STATE_RESET_TYPE_SIG | \ 0x00020000) bnx2.h 　
7562
 BNX2_BC_STATE_RESET_TYPE_VAUXBNX2_BC_STATE_RESET_TYPE_VAUX (BNX2_BC_STATE_RESET_TYPE_SIG | \ 0x00030000) bnx2.h 　
7563
 BNX2_BC_STATE_RESET_TYPE_DRV_MABNX2_BC_STATE_RESET_TYPE_DRV_MA DRV_MSG_CODE bnx2.h 　
7564
 BNX2_BC_STATE_RESET_TYPE_DRV_REBNX2_BC_STATE_RESET_TYPE_DRV_RE (BNX2_BC_STATE_RESET_TYPE_SIG | \ DRV_MSG_CODE_RESET) bnx2.h 　
7565
 BNX2_BC_STATE_RESET_TYPE_DRV_UNBNX2_BC_STATE_RESET_TYPE_DRV_UN (BNX2_BC_STATE_RESET_TYPE_SIG | \ DRV_MSG_CODE_UNLOAD) bnx2.h 　
7566
 BNX2_BC_STATE_RESET_TYPE_DRV_SHBNX2_BC_STATE_RESET_TYPE_DRV_SH (BNX2_BC_STATE_RESET_TYPE_SIG | \ DRV_MSG_CODE_SHUTDOWN) bnx2.h 　
7567
 BNX2_BC_STATE_RESET_TYPE_DRV_WOBNX2_BC_STATE_RESET_TYPE_DRV_WO (BNX2_BC_STATE_RESET_TYPE_SIG | \ DRV_MSG_CODE_WOL) bnx2.h 　
7568
 BNX2_BC_STATE_RESET_TYPE_DRV_DIBNX2_BC_STATE_RESET_TYPE_DRV_DI (BNX2_BC_STATE_RESET_TYPE_SIG | \ DRV_MSG_CODE_DIAG) bnx2.h 　
7569
 BNX2_BC_STATEBNX2_BC_STATE 0x000001c4 bnx2.h 　
7570
 BNX2_BC_STATE_ERR_MASKBNX2_BC_STATE_ERR_MASK 0x0000ff00 bnx2.h 　
7571
 BNX2_BC_STATE_SIGNBNX2_BC_STATE_SIGN 0x42530000 bnx2.h 　
7572
 BNX2_BC_STATE_SIGN_MASKBNX2_BC_STATE_SIGN_MASK 0xffff0000 bnx2.h 　
7573
 BNX2_BC_STATE_BC1_STARTBNX2_BC_STATE_BC1_START (BNX2_BC_STATE_SIGN | 0x1) bnx2.h 　
7574
 BNX2_BC_STATE_GET_NVM_CFG1BNX2_BC_STATE_GET_NVM_CFG1 (BNX2_BC_STATE_SIGN | 0x2) bnx2.h 　
7575
 BNX2_BC_STATE_PROG_BARBNX2_BC_STATE_PROG_BAR (BNX2_BC_STATE_SIGN | 0x3) bnx2.h 　
7576
 BNX2_BC_STATE_INIT_VIDBNX2_BC_STATE_INIT_VID (BNX2_BC_STATE_SIGN | 0x4) bnx2.h 　
7577
 BNX2_BC_STATE_GET_NVM_CFG2BNX2_BC_STATE_GET_NVM_CFG2 (BNX2_BC_STATE_SIGN | 0x5) bnx2.h 　
7578
 BNX2_BC_STATE_APPLY_WKARNDBNX2_BC_STATE_APPLY_WKARND (BNX2_BC_STATE_SIGN | 0x6) bnx2.h 　
7579
 BNX2_BC_STATE_LOAD_BC2BNX2_BC_STATE_LOAD_BC2 (BNX2_BC_STATE_SIGN | 0x7) bnx2.h 　
7580
 BNX2_BC_STATE_GOING_BC2BNX2_BC_STATE_GOING_BC2 (BNX2_BC_STATE_SIGN | 0x8) bnx2.h 　
7581
 BNX2_BC_STATE_GOING_DIAGBNX2_BC_STATE_GOING_DIAG (BNX2_BC_STATE_SIGN | 0x9) bnx2.h 　
7582
 BNX2_BC_STATE_RT_FINAL_INITBNX2_BC_STATE_RT_FINAL_INIT (BNX2_BC_STATE_SIGN | 0x81) bnx2.h 　
7583
 BNX2_BC_STATE_RT_WKARNDBNX2_BC_STATE_RT_WKARND (BNX2_BC_STATE_SIGN | 0x82) bnx2.h 　
7584
 BNX2_BC_STATE_RT_DRV_PULSEBNX2_BC_STATE_RT_DRV_PULSE (BNX2_BC_STATE_SIGN | 0x83) bnx2.h 　
7585
 BNX2_BC_STATE_RT_FIOEVTSBNX2_BC_STATE_RT_FIOEVTS (BNX2_BC_STATE_SIGN | 0x84) bnx2.h 　
7586
 BNX2_BC_STATE_RT_DRV_CMDBNX2_BC_STATE_RT_DRV_CMD (BNX2_BC_STATE_SIGN | 0x85) bnx2.h 　
7587
 BNX2_BC_STATE_RT_LOW_POWERBNX2_BC_STATE_RT_LOW_POWER (BNX2_BC_STATE_SIGN | 0x86) bnx2.h 　
7588
 BNX2_BC_STATE_RT_SET_WOLBNX2_BC_STATE_RT_SET_WOL (BNX2_BC_STATE_SIGN | 0x87) bnx2.h 　
7589
 BNX2_BC_STATE_RT_OTHER_FWBNX2_BC_STATE_RT_OTHER_FW (BNX2_BC_STATE_SIGN | 0x88) bnx2.h 　
7590
 BNX2_BC_STATE_RT_GOING_D3BNX2_BC_STATE_RT_GOING_D3 (BNX2_BC_STATE_SIGN | 0x89) bnx2.h 　
7591
 BNX2_BC_STATE_ERR_BAD_VERSIONBNX2_BC_STATE_ERR_BAD_VERSION (BNX2_BC_STATE_SIGN | 0x0100) bnx2.h 　
7592
 BNX2_BC_STATE_ERR_BAD_BC2_CRCBNX2_BC_STATE_ERR_BAD_BC2_CRC (BNX2_BC_STATE_SIGN | 0x0200) bnx2.h 　
7593
 BNX2_BC_STATE_ERR_BC1_LOOPBNX2_BC_STATE_ERR_BC1_LOOP (BNX2_BC_STATE_SIGN | 0x0300) bnx2.h 　
7594
 BNX2_BC_STATE_ERR_UNKNOWN_CMDBNX2_BC_STATE_ERR_UNKNOWN_CMD (BNX2_BC_STATE_SIGN | 0x0400) bnx2.h 　
7595
 BNX2_BC_STATE_ERR_DRV_DEADBNX2_BC_STATE_ERR_DRV_DEAD (BNX2_BC_STATE_SIGN | 0x0500) bnx2.h 　
7596
 BNX2_BC_STATE_ERR_NO_RXPBNX2_BC_STATE_ERR_NO_RXP (BNX2_BC_STATE_SIGN | 0x0600) bnx2.h 　
7597
 BNX2_BC_STATE_ERR_TOO_MANY_RBUFBNX2_BC_STATE_ERR_TOO_MANY_RBUF (BNX2_BC_STATE_SIGN | 0x0700) bnx2.h 　
7598
 BNX2_BC_STATE_DEBUG_CMDBNX2_BC_STATE_DEBUG_CMD 0x1dc bnx2.h 　
7599
 BNX2_BC_STATE_BC_DBG_CMD_SIGNATBNX2_BC_STATE_BC_DBG_CMD_SIGNAT 0x42440000 bnx2.h 　
7600
 BNX2_BC_STATE_BC_DBG_CMD_SIGNATBNX2_BC_STATE_BC_DBG_CMD_SIGNAT 0xffff0000 bnx2.h 　
7601
 BNX2_BC_STATE_BC_DBG_CMD_LOOP_CBNX2_BC_STATE_BC_DBG_CMD_LOOP_C 0xffff bnx2.h 　
7602
 BNX2_BC_STATE_BC_DBG_CMD_LOOP_IBNX2_BC_STATE_BC_DBG_CMD_LOOP_I 0xffff bnx2.h 　
7603
 HOST_VIEW_SHMEM_BASEHOST_VIEW_SHMEM_BASE 0x167c00 bnx2.h 　
7604
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 bnx2.h 　
7605
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 bnx2.h 　
7606
 RX_OFFSETRX_OFFSET (sizeof(struct l2_fhdr) + 2) bnx2.h 　
7607
 RX_BUF_CNTRX_BUF_CNT 20 bnx2.h 　
7608
 RX_BUF_USE_SIZERX_BUF_USE_SIZE (ETH_MAX_MTU + ETH_HLEN + RX_OFFSET + 8) bnx2.h 　
7609
 RX_BUF_SIZERX_BUF_SIZE (L1_CACHE_ALIGN(RX_BUF_USE_SIZE + 8)) bnx2.h 　
7610
 PP_ChipIDPP_ChipID 0x0000 cs89x0.h offset 0h -> Corp -ID
7611
 PP_ISAIOBPP_ISAIOB 0x0020 cs89x0.h IO base address
7612
 PP_CS8900_ISAINTPP_CS8900_ISAINT 0x0022 cs89x0.h ISA interrupt select
7613
 PP_CS8920_ISAINTPP_CS8920_ISAINT 0x0370 cs89x0.h ISA interrupt select
7614
 PP_CS8900_ISADMAPP_CS8900_ISADMA 0x0024 cs89x0.h ISA Rec DMA channel
7615
 PP_CS8920_ISADMAPP_CS8920_ISADMA 0x0374 cs89x0.h ISA Rec DMA channel
7616
 PP_ISASOFPP_ISASOF 0x0026 cs89x0.h ISA DMA offset
7617
 PP_DmaFrameCntPP_DmaFrameCnt 0x0028 cs89x0.h ISA DMA Frame count
7618
 PP_DmaByteCntPP_DmaByteCnt 0x002A cs89x0.h ISA DMA Byte count
7619
 PP_CS8900_ISAMemBPP_CS8900_ISAMemB 0x002C cs89x0.h Memory base
7620
 PP_CS8920_ISAMemBPP_CS8920_ISAMemB 0x0348 cs89x0.h 　
7621
 PP_ISABootBasePP_ISABootBase 0x0030 cs89x0.h Boot Prom base
7622
 PP_ISABootMaskPP_ISABootMask 0x0034 cs89x0.h Boot Prom Mask
7623
 PP_EECMDPP_EECMD 0x0040 cs89x0.h NVR Interface Command register
7624
 PP_EEDataPP_EEData 0x0042 cs89x0.h NVR Interface Data Register
7625
 PP_DebugRegPP_DebugReg 0x0044 cs89x0.h Debug Register
7626
 PP_RxCFGPP_RxCFG 0x0102 cs89x0.h Rx Bus config
7627
 PP_RxCTLPP_RxCTL 0x0104 cs89x0.h Receive Control Register
7628
 PP_TxCFGPP_TxCFG 0x0106 cs89x0.h Transmit Config Register
7629
 PP_TxCMDPP_TxCMD 0x0108 cs89x0.h Transmit Command Register
7630
 PP_BufCFGPP_BufCFG 0x010A cs89x0.h Bus configuration Register
7631
 PP_LineCTLPP_LineCTL 0x0112 cs89x0.h Line Config Register
7632
 PP_SelfCTLPP_SelfCTL 0x0114 cs89x0.h Self Command Register
7633
 PP_BusCTLPP_BusCTL 0x0116 cs89x0.h ISA bus control Register
7634
 PP_TestCTLPP_TestCTL 0x0118 cs89x0.h Test Register
7635
 PP_AutoNegCTLPP_AutoNegCTL 0x011C cs89x0.h Auto Negotiation Ctrl
7636
 PP_ISQPP_ISQ 0x0120 cs89x0.h Interrupt Status
7637
 PP_RxEventPP_RxEvent 0x0124 cs89x0.h Rx Event Register
7638
 PP_TxEventPP_TxEvent 0x0128 cs89x0.h Tx Event Register
7639
 PP_BufEventPP_BufEvent 0x012C cs89x0.h Bus Event Register
7640
 PP_RxMissPP_RxMiss 0x0130 cs89x0.h Receive Miss Count
7641
 PP_TxColPP_TxCol 0x0132 cs89x0.h Transmit Collision Count
7642
 PP_LineSTPP_LineST 0x0134 cs89x0.h Line State Register
7643
 PP_SelfSTPP_SelfST 0x0136 cs89x0.h Self State register
7644
 PP_BusSTPP_BusST 0x0138 cs89x0.h Bus Status
7645
 PP_TDRPP_TDR 0x013C cs89x0.h Time Domain Reflectometry
7646
 PP_AutoNegSTPP_AutoNegST 0x013E cs89x0.h Auto Neg Status
7647
 PP_TxCommandPP_TxCommand 0x0144 cs89x0.h Tx Command
7648
 PP_TxLengthPP_TxLength 0x0146 cs89x0.h Tx Length
7649
 PP_LAFPP_LAF 0x0150 cs89x0.h Hash Table
7650
 PP_IAPP_IA 0x0158 cs89x0.h Physical Address Register
7651
 PP_RxStatusPP_RxStatus 0x0400 cs89x0.h Receive start of frame
7652
 PP_RxLengthPP_RxLength 0x0402 cs89x0.h Receive Length of frame
7653
 PP_RxFramePP_RxFrame 0x0404 cs89x0.h Receive frame pointer
7654
 PP_TxFramePP_TxFrame 0x0A00 cs89x0.h Transmit frame pointer
7655
 DEFAULTIOBASEDEFAULTIOBASE 0x0300 cs89x0.h 　
7656
 FIRST_IOFIRST_IO 0x020C cs89x0.h First I/O port to check
7657
 LAST_IOLAST_IO 0x037C cs89x0.h Last I/O port to check (+10h)
7658
 ADD_MASKADD_MASK 0x3000 cs89x0.h Mask it use of the ADD_PORT register
7659
 ADD_SIGADD_SIG 0x3000 cs89x0.h Expected ID signature
7660
 CHIP_EISA_ID_SIGCHIP_EISA_ID_SIG 0x630E cs89x0.h Product ID Code for Crystal Chip (CS8900 spec 4.3)
7661
 EISA_ID_SIGEISA_ID_SIG 0x4D24 cs89x0.h IBM
7662
 PART_NO_SIGPART_NO_SIG 0x1010 cs89x0.h IBM
7663
 MONGOOSE_BITMONGOOSE_BIT 0x0000 cs89x0.h IBM
7664
 EISA_ID_SIGEISA_ID_SIG 0x630E cs89x0.h PnP Vendor ID (same as chip id for Crystal board)
7665
 PART_NO_SIGPART_NO_SIG 0x4000 cs89x0.h ID code CS8920 board (PnP Vendor Product code)
7666
 MONGOOSE_BITMONGOOSE_BIT 0x2000 cs89x0.h PART_NO_SIG + MONGOOSE_BUT => ID of mongoose
7667
 PRODUCT_ID_ADDPRODUCT_ID_ADD 0x0002 cs89x0.h Address of product ID
7668
 REG_TYPE_MASKREG_TYPE_MASK 0x001F cs89x0.h 　
7669
 ERSE_WR_ENBLERSE_WR_ENBL 0x00F0 cs89x0.h 　
7670
 ERSE_WR_DISABLEERSE_WR_DISABLE 0x0000 cs89x0.h 　
7671
 RX_BUF_CFGRX_BUF_CFG 0x0003 cs89x0.h 　
7672
 RX_CONTROLRX_CONTROL 0x0005 cs89x0.h 　
7673
 TX_CFGTX_CFG 0x0007 cs89x0.h 　
7674
 TX_COMMANDTX_COMMAND 0x0009 cs89x0.h 　
7675
 BUF_CFGBUF_CFG 0x000B cs89x0.h 　
7676
 LINE_CONTROLLINE_CONTROL 0x0013 cs89x0.h 　
7677
 SELF_CONTROLSELF_CONTROL 0x0015 cs89x0.h 　
7678
 BUS_CONTROLBUS_CONTROL 0x0017 cs89x0.h 　
7679
 TEST_CONTROLTEST_CONTROL 0x0019 cs89x0.h 　
7680
 RX_EVENTRX_EVENT 0x0004 cs89x0.h 　
7681
 TX_EVENTTX_EVENT 0x0008 cs89x0.h 　
7682
 BUF_EVENTBUF_EVENT 0x000C cs89x0.h 　
7683
 RX_MISS_COUNTRX_MISS_COUNT 0x0010 cs89x0.h 　
7684
 TX_COL_COUNTTX_COL_COUNT 0x0012 cs89x0.h 　
7685
 LINE_STATUSLINE_STATUS 0x0014 cs89x0.h 　
7686
 SELF_STATUSSELF_STATUS 0x0016 cs89x0.h 　
7687
 BUS_STATUSBUS_STATUS 0x0018 cs89x0.h 　
7688
 TDRTDR 0x001C cs89x0.h 　
7689
 SKIP_1SKIP_1 0x0040 cs89x0.h 　
7690
 RX_STREAM_ENBLRX_STREAM_ENBL 0x0080 cs89x0.h 　
7691
 RX_OK_ENBLRX_OK_ENBL 0x0100 cs89x0.h 　
7692
 RX_DMA_ONLYRX_DMA_ONLY 0x0200 cs89x0.h 　
7693
 AUTO_RX_DMAAUTO_RX_DMA 0x0400 cs89x0.h 　
7694
 BUFFER_CRCBUFFER_CRC 0x0800 cs89x0.h 　
7695
 RX_CRC_ERROR_ENBLRX_CRC_ERROR_ENBL 0x1000 cs89x0.h 　
7696
 RX_RUNT_ENBLRX_RUNT_ENBL 0x2000 cs89x0.h 　
7697
 RX_EXTRA_DATA_ENBLRX_EXTRA_DATA_ENBL 0x4000 cs89x0.h 　
7698
 RX_IA_HASH_ACCEPTRX_IA_HASH_ACCEPT 0x0040 cs89x0.h 　
7699
 RX_PROM_ACCEPTRX_PROM_ACCEPT 0x0080 cs89x0.h 　
7700
 RX_OK_ACCEPTRX_OK_ACCEPT 0x0100 cs89x0.h 　
7701
 RX_MULTCAST_ACCEPTRX_MULTCAST_ACCEPT 0x0200 cs89x0.h 　
7702
 RX_IA_ACCEPTRX_IA_ACCEPT 0x0400 cs89x0.h 　
7703
 RX_BROADCAST_ACCEPTRX_BROADCAST_ACCEPT 0x0800 cs89x0.h 　
7704
 RX_BAD_CRC_ACCEPTRX_BAD_CRC_ACCEPT 0x1000 cs89x0.h 　
7705
 RX_RUNT_ACCEPTRX_RUNT_ACCEPT 0x2000 cs89x0.h 　
7706
 RX_EXTRA_DATA_ACCEPTRX_EXTRA_DATA_ACCEPT 0x4000 cs89x0.h 　
7707
 RX_ALL_ACCEPTRX_ALL_ACCEPT (RX_PROM_ACCEPT|RX_BAD_CRC_ACCEPT|RX_RUNT_ACCEPT|RX_EXTRA_DATA_ACCEPT) cs89x0.h 　
7708
 DEF_RX_ACCEPTDEF_RX_ACCEPT (RX_IA_ACCEPT | RX_BROADCAST_ACCEPT | RX_OK_ACCEPT) cs89x0.h 　
7709
 TX_LOST_CRS_ENBLTX_LOST_CRS_ENBL 0x0040 cs89x0.h 　
7710
 TX_SQE_ERROR_ENBLTX_SQE_ERROR_ENBL 0x0080 cs89x0.h 　
7711
 TX_OK_ENBLTX_OK_ENBL 0x0100 cs89x0.h 　
7712
 TX_LATE_COL_ENBLTX_LATE_COL_ENBL 0x0200 cs89x0.h 　
7713
 TX_JBR_ENBLTX_JBR_ENBL 0x0400 cs89x0.h 　
7714
 TX_ANY_COL_ENBLTX_ANY_COL_ENBL 0x0800 cs89x0.h 　
7715
 TX_16_COL_ENBLTX_16_COL_ENBL 0x8000 cs89x0.h 　
7716
 TX_START_4_BYTESTX_START_4_BYTES 0x0000 cs89x0.h 　
7717
 TX_START_64_BYTESTX_START_64_BYTES 0x0040 cs89x0.h 　
7718
 TX_START_128_BYTESTX_START_128_BYTES 0x0080 cs89x0.h 　
7719
 TX_START_ALL_BYTESTX_START_ALL_BYTES 0x00C0 cs89x0.h 　
7720
 TX_FORCETX_FORCE 0x0100 cs89x0.h 　
7721
 TX_ONE_COLTX_ONE_COL 0x0200 cs89x0.h 　
7722
 TX_TWO_PART_DEFF_DISABLETX_TWO_PART_DEFF_DISABLE 0x0400 cs89x0.h 　
7723
 TX_NO_CRCTX_NO_CRC 0x1000 cs89x0.h 　
7724
 TX_RUNTTX_RUNT 0x2000 cs89x0.h 　
7725
 GENERATE_SW_INTERRUPTGENERATE_SW_INTERRUPT 0x0040 cs89x0.h 　
7726
 RX_DMA_ENBLRX_DMA_ENBL 0x0080 cs89x0.h 　
7727
 READY_FOR_TX_ENBLREADY_FOR_TX_ENBL 0x0100 cs89x0.h 　
7728
 TX_UNDERRUN_ENBLTX_UNDERRUN_ENBL 0x0200 cs89x0.h 　
7729
 RX_MISS_ENBLRX_MISS_ENBL 0x0400 cs89x0.h 　
7730
 RX_128_BYTE_ENBLRX_128_BYTE_ENBL 0x0800 cs89x0.h 　
7731
 TX_COL_COUNT_OVRFLOW_ENBLTX_COL_COUNT_OVRFLOW_ENBL 0x1000 cs89x0.h 　
7732
 RX_MISS_COUNT_OVRFLOW_ENBLRX_MISS_COUNT_OVRFLOW_ENBL 0x2000 cs89x0.h 　
7733
 RX_DEST_MATCH_ENBLRX_DEST_MATCH_ENBL 0x8000 cs89x0.h 　
7734
 SERIAL_RX_ONSERIAL_RX_ON 0x0040 cs89x0.h 　
7735
 SERIAL_TX_ONSERIAL_TX_ON 0x0080 cs89x0.h 　
7736
 AUI_ONLYAUI_ONLY 0x0100 cs89x0.h 　
7737
 AUTO_AUI_10BASETAUTO_AUI_10BASET 0x0200 cs89x0.h 　
7738
 MODIFIED_BACKOFFMODIFIED_BACKOFF 0x0800 cs89x0.h 　
7739
 NO_AUTO_POLARITYNO_AUTO_POLARITY 0x1000 cs89x0.h 　
7740
 TWO_PART_DEFDISTWO_PART_DEFDIS 0x2000 cs89x0.h 　
7741
 LOW_RX_SQUELCHLOW_RX_SQUELCH 0x4000 cs89x0.h 　
7742
 POWER_ON_RESETPOWER_ON_RESET 0x0040 cs89x0.h 　
7743
 SW_STOPSW_STOP 0x0100 cs89x0.h 　
7744
 SLEEP_ONSLEEP_ON 0x0200 cs89x0.h 　
7745
 AUTO_WAKEUPAUTO_WAKEUP 0x0400 cs89x0.h 　
7746
 HCB0_ENBLHCB0_ENBL 0x1000 cs89x0.h 　
7747
 HCB1_ENBLHCB1_ENBL 0x2000 cs89x0.h 　
7748
 HCB0HCB0 0x4000 cs89x0.h 　
7749
 HCB1HCB1 0x8000 cs89x0.h 　
7750
 RESET_RX_DMARESET_RX_DMA 0x0040 cs89x0.h 　
7751
 MEMORY_ONMEMORY_ON 0x0400 cs89x0.h 　
7752
 DMA_BURST_MODEDMA_BURST_MODE 0x0800 cs89x0.h 　
7753
 IO_CHANNEL_READY_ONIO_CHANNEL_READY_ON 0x1000 cs89x0.h 　
7754
 RX_DMA_SIZE_64KRX_DMA_SIZE_64K 0x2000 cs89x0.h 　
7755
 ENABLE_IRQENABLE_IRQ 0x8000 cs89x0.h 　
7756
 LINK_OFFLINK_OFF 0x0080 cs89x0.h 　
7757
 ENDEC_LOOPBACKENDEC_LOOPBACK 0x0200 cs89x0.h 　
7758
 AUI_LOOPBACKAUI_LOOPBACK 0x0400 cs89x0.h 　
7759
 BACKOFF_OFFBACKOFF_OFF 0x0800 cs89x0.h 　
7760
 FAST_TESTFAST_TEST 0x8000 cs89x0.h 　
7761
 RX_IA_HASHEDRX_IA_HASHED 0x0040 cs89x0.h 　
7762
 RX_DRIBBLERX_DRIBBLE 0x0080 cs89x0.h 　
7763
 RX_OKRX_OK 0x0100 cs89x0.h 　
7764
 RX_HASHEDRX_HASHED 0x0200 cs89x0.h 　
7765
 RX_IARX_IA 0x0400 cs89x0.h 　
7766
 RX_BROADCASTRX_BROADCAST 0x0800 cs89x0.h 　
7767
 RX_CRC_ERRORRX_CRC_ERROR 0x1000 cs89x0.h 　
7768
 RX_RUNTRX_RUNT 0x2000 cs89x0.h 　
7769
 RX_EXTRA_DATARX_EXTRA_DATA 0x4000 cs89x0.h 　
7770
 HASH_INDEX_MASKHASH_INDEX_MASK 0x0FC00 cs89x0.h 　
7771
 TX_LOST_CRSTX_LOST_CRS 0x0040 cs89x0.h 　
7772
 TX_SQE_ERRORTX_SQE_ERROR 0x0080 cs89x0.h 　
7773
 TX_OKTX_OK 0x0100 cs89x0.h 　
7774
 TX_LATE_COLTX_LATE_COL 0x0200 cs89x0.h 　
7775
 TX_JBRTX_JBR 0x0400 cs89x0.h 　
7776
 TX_16_COLTX_16_COL 0x8000 cs89x0.h 　
7777
 TX_SEND_OK_BITSTX_SEND_OK_BITS (TX_OK|TX_LOST_CRS) cs89x0.h 　
7778
 TX_COL_COUNT_MASKTX_COL_COUNT_MASK 0x7800 cs89x0.h 　
7779
 SW_INTERRUPTSW_INTERRUPT 0x0040 cs89x0.h 　
7780
 RX_DMARX_DMA 0x0080 cs89x0.h 　
7781
 READY_FOR_TXREADY_FOR_TX 0x0100 cs89x0.h 　
7782
 TX_UNDERRUNTX_UNDERRUN 0x0200 cs89x0.h 　
7783
 RX_MISSRX_MISS 0x0400 cs89x0.h 　
7784
 RX_128_BYTERX_128_BYTE 0x0800 cs89x0.h 　
7785
 TX_COL_OVRFLWTX_COL_OVRFLW 0x1000 cs89x0.h 　
7786
 RX_MISS_OVRFLWRX_MISS_OVRFLW 0x2000 cs89x0.h 　
7787
 RX_DEST_MATCHRX_DEST_MATCH 0x8000 cs89x0.h 　
7788
 LINK_OKLINK_OK 0x0080 cs89x0.h 　
7789
 AUI_ONAUI_ON 0x0100 cs89x0.h 　
7790
 TENBASET_ONTENBASET_ON 0x0200 cs89x0.h 　
7791
 POLARITY_OKPOLARITY_OK 0x1000 cs89x0.h 　
7792
 CRS_OKCRS_OK 0x4000 cs89x0.h 　
7793
 ACTIVE_33VACTIVE_33V 0x0040 cs89x0.h 　
7794
 INIT_DONEINIT_DONE 0x0080 cs89x0.h 　
7795
 SI_BUSYSI_BUSY 0x0100 cs89x0.h 　
7796
 EEPROM_PRESENTEEPROM_PRESENT 0x0200 cs89x0.h 　
7797
 EEPROM_OKEEPROM_OK 0x0400 cs89x0.h 　
7798
 EL_PRESENTEL_PRESENT 0x0800 cs89x0.h 　
7799
 EE_SIZE_64EE_SIZE_64 0x1000 cs89x0.h 　
7800
 TX_BID_ERRORTX_BID_ERROR 0x0080 cs89x0.h 　
7801
 READY_FOR_TX_NOWREADY_FOR_TX_NOW 0x0100 cs89x0.h 　
7802
 RE_NEG_NOWRE_NEG_NOW 0x0040 cs89x0.h 　
7803
 ALLOW_FDXALLOW_FDX 0x0080 cs89x0.h 　
7804
 AUTO_NEG_ENABLEAUTO_NEG_ENABLE 0x0100 cs89x0.h 　
7805
 NLP_ENABLENLP_ENABLE 0x0200 cs89x0.h 　
7806
 FORCE_FDXFORCE_FDX 0x8000 cs89x0.h 　
7807
 AUTO_NEG_BITSAUTO_NEG_BITS (FORCE_FDX|NLP_ENABLE|AUTO_NEG_ENABLE) cs89x0.h 　
7808
 AUTO_NEG_MASKAUTO_NEG_MASK (FORCE_FDX|NLP_ENABLE|AUTO_NEG_ENABLE|ALLOW_FDX|RE_NEG_NOW) cs89x0.h 　
7809
 AUTO_NEG_BUSYAUTO_NEG_BUSY 0x0080 cs89x0.h 　
7810
 FLP_LINKFLP_LINK 0x0100 cs89x0.h 　
7811
 FLP_LINK_GOODFLP_LINK_GOOD 0x0800 cs89x0.h 　
7812
 LINK_FAULTLINK_FAULT 0x1000 cs89x0.h 　
7813
 HDX_ACTIVEHDX_ACTIVE 0x4000 cs89x0.h 　
7814
 FDX_ACTIVEFDX_ACTIVE 0x8000 cs89x0.h 　
7815
 ISQ_RECEIVER_EVENTISQ_RECEIVER_EVENT 0x04 cs89x0.h 　
7816
 ISQ_TRANSMITTER_EVENTISQ_TRANSMITTER_EVENT 0x08 cs89x0.h 　
7817
 ISQ_BUFFER_EVENTISQ_BUFFER_EVENT 0x0c cs89x0.h 　
7818
 ISQ_RX_MISS_EVENTISQ_RX_MISS_EVENT 0x10 cs89x0.h 　
7819
 ISQ_TX_COL_EVENTISQ_TX_COL_EVENT 0x12 cs89x0.h 　
7820
 ISQ_EVENT_MASKISQ_EVENT_MASK 0x003F cs89x0.h ISQ mask to find out type of event
7821
 ISQ_HISTISQ_HIST 16 cs89x0.h small history buffer
7822
 AUTOINCREMENTAUTOINCREMENT 0x8000 cs89x0.h Bit mask to set bit-15 for autoincrement
7823
 TXRXBUFSIZETXRXBUFSIZE 0x0600 cs89x0.h 　
7824
 RXDMABUFSIZERXDMABUFSIZE 0x8000 cs89x0.h 　
7825
 RXDMASIZERXDMASIZE 0x4000 cs89x0.h 　
7826
 TXRX_LENGTH_MASKTXRX_LENGTH_MASK 0x07FF cs89x0.h 　
7827
 RCV_WITH_RXONRCV_WITH_RXON 1 cs89x0.h Set SerRx ON
7828
 RCV_COUNTSRCV_COUNTS 2 cs89x0.h Use Framecnt1
7829
 RCV_PONGRCV_PONG 4 cs89x0.h Pong respondent
7830
 RCV_DONGRCV_DONG 8 cs89x0.h Dong operation
7831
 RCV_POLLINGRCV_POLLING 0x10 cs89x0.h Poll RxEvent
7832
 RCV_ISQRCV_ISQ 0x20 cs89x0.h Use ISQ, int
7833
 RCV_AUTO_DMARCV_AUTO_DMA 0x100 cs89x0.h Set AutoRxDMAE
7834
 RCV_DMARCV_DMA 0x200 cs89x0.h Set RxDMA only
7835
 RCV_DMA_ALLRCV_DMA_ALL 0x400 cs89x0.h Copy all DMA'ed
7836
 RCV_FIXED_DATARCV_FIXED_DATA 0x800 cs89x0.h Every frame same
7837
 RCV_IORCV_IO 0x1000 cs89x0.h Use ISA IO only
7838
 RCV_MEMORYRCV_MEMORY 0x2000 cs89x0.h Use ISA Memory
7839
 RAM_SIZERAM_SIZE 0x1000 cs89x0.h The card has 4k bytes or RAM
7840
 PKT_STARTPKT_START PP_TxFrame cs89x0.h Start of packet RAM
7841
 RX_FRAME_PORTRX_FRAME_PORT 0x0000 cs89x0.h 　
7842
 TX_FRAME_PORTTX_FRAME_PORT RX_FRAME_PORT cs89x0.h 　
7843
 TX_CMD_PORTTX_CMD_PORT 0x0004 cs89x0.h 　
7844
 TX_NOWTX_NOW 0x0000 cs89x0.h Tx packet after 5 bytes copied
7845
 TX_AFTER_381TX_AFTER_381 0x0020 cs89x0.h Tx packet after 381 bytes copied
7846
 TX_AFTER_ALLTX_AFTER_ALL 0x00C0 cs89x0.h Tx packet after all bytes copied
7847
 TX_LEN_PORTTX_LEN_PORT 0x0006 cs89x0.h 　
7848
 ISQ_PORTISQ_PORT 0x0008 cs89x0.h 　
7849
 ADD_PORTADD_PORT 0x000A cs89x0.h 　
7850
 DATA_PORTDATA_PORT 0x000C cs89x0.h 　
7851
 EEPROM_WRITE_ENEEPROM_WRITE_EN 0x00F0 cs89x0.h 　
7852
 EEPROM_WRITE_DISEEPROM_WRITE_DIS 0x0000 cs89x0.h 　
7853
 EEPROM_WRITE_CMDEEPROM_WRITE_CMD 0x0100 cs89x0.h 　
7854
 EEPROM_READ_CMDEEPROM_READ_CMD 0x0200 cs89x0.h 　
7855
 RBUF_EVENT_LOWRBUF_EVENT_LOW 0 cs89x0.h Low byte of RxEvent - status of received frame
7856
 RBUF_EVENT_HIGHRBUF_EVENT_HIGH 1 cs89x0.h High byte of RxEvent - status of received frame
7857
 RBUF_LEN_LOWRBUF_LEN_LOW 2 cs89x0.h Length of received data - low byte
7858
 RBUF_LEN_HIRBUF_LEN_HI 3 cs89x0.h Length of received data - high byte
7859
 RBUF_HEAD_LENRBUF_HEAD_LEN 4 cs89x0.h Length of this header
7860
 CHIP_READCHIP_READ 0x1 cs89x0.h Used to mark state of the repins code (chip or dma)
7861
 DMA_READDMA_READ 0x2 cs89x0.h Used to mark state of the repins code (chip or dma)
7862
 BIOS_START_SEGBIOS_START_SEG 0x00000 cs89x0.h 　
7863
 BIOS_OFFSET_INCBIOS_OFFSET_INC 0x0010 cs89x0.h 　
7864
 BIOS_START_SEGBIOS_START_SEG 0x0c000 cs89x0.h 　
7865
 BIOS_OFFSET_INCBIOS_OFFSET_INC 0x0200 cs89x0.h 　
7866
 BIOS_LAST_OFFSETBIOS_LAST_OFFSET 0x0fc00 cs89x0.h 　
7867
 ISA_CNF_OFFSETISA_CNF_OFFSET 0x6 cs89x0.h 　
7868
 TX_CTL_OFFSETTX_CTL_OFFSET (ISA_CNF_OFFSET + 8) cs89x0.h 8900 eeprom
7869
 AUTO_NEG_CNF_OFFSETAUTO_NEG_CNF_OFFSET (ISA_CNF_OFFSET + 8) cs89x0.h 8920 eeprom
7870
 EE_FORCE_FDXEE_FORCE_FDX 0x8000 cs89x0.h 　
7871
 EE_NLP_ENABLEEE_NLP_ENABLE 0x0200 cs89x0.h 　
7872
 EE_AUTO_NEG_ENABLEEE_AUTO_NEG_ENABLE 0x0100 cs89x0.h 　
7873
 EE_ALLOW_FDXEE_ALLOW_FDX 0x0080 cs89x0.h 　
7874
 EE_AUTO_NEG_CNF_MASKEE_AUTO_NEG_CNF_MASK (EE_FORCE_FDX|EE_NLP_ENABLE|EE_AUTO_NEG_ENABLE|EE_ALLOW_FDX) cs89x0.h 　
7875
 IMM_BITIMM_BIT 0x0040 cs89x0.h ignore missing media
7876
 ADAPTER_CNF_OFFSETADAPTER_CNF_OFFSET (AUTO_NEG_CNF_OFFSET + 2) cs89x0.h 　
7877
 A_CNF_10B_TA_CNF_10B_T 0x0001 cs89x0.h 　
7878
 A_CNF_AUIA_CNF_AUI 0x0002 cs89x0.h 　
7879
 A_CNF_10B_2A_CNF_10B_2 0x0004 cs89x0.h 　
7880
 A_CNF_MEDIA_TYPEA_CNF_MEDIA_TYPE 0x0060 cs89x0.h 　
7881
 A_CNF_MEDIA_AUTOA_CNF_MEDIA_AUTO 0x0000 cs89x0.h 　
7882
 A_CNF_MEDIA_10B_TA_CNF_MEDIA_10B_T 0x0020 cs89x0.h 　
7883
 A_CNF_MEDIA_AUIA_CNF_MEDIA_AUI 0x0040 cs89x0.h 　
7884
 A_CNF_MEDIA_10B_2A_CNF_MEDIA_10B_2 0x0060 cs89x0.h 　
7885
 A_CNF_DC_DC_POLARITYA_CNF_DC_DC_POLARITY 0x0080 cs89x0.h 　
7886
 A_CNF_NO_AUTO_POLARITYA_CNF_NO_AUTO_POLARITY 0x2000 cs89x0.h 　
7887
 A_CNF_LOW_RX_SQUELCHA_CNF_LOW_RX_SQUELCH 0x4000 cs89x0.h 　
7888
 A_CNF_EXTND_10B_2A_CNF_EXTND_10B_2 0x8000 cs89x0.h 　
7889
 PACKET_PAGE_OFFSETPACKET_PAGE_OFFSET 0x8 cs89x0.h 　
7890
 INT_NO_MASKINT_NO_MASK 0x000F cs89x0.h 　
7891
 DMA_NO_MASKDMA_NO_MASK 0x0070 cs89x0.h 　
7892
 ISA_DMA_SIZEISA_DMA_SIZE 0x0200 cs89x0.h 　
7893
 ISA_AUTO_RxDMAISA_AUTO_RxDMA 0x0400 cs89x0.h 　
7894
 ISA_RxDMAISA_RxDMA 0x0800 cs89x0.h 　
7895
 DMA_BURSTDMA_BURST 0x1000 cs89x0.h 　
7896
 STREAM_TRANSFERSTREAM_TRANSFER 0x2000 cs89x0.h 　
7897
 ANY_ISA_DMAANY_ISA_DMA (ISA_AUTO_RxDMA | ISA_RxDMA) cs89x0.h 　
7898
 DMA_BASEDMA_BASE 0x00 cs89x0.h DMA controller base
7899
 DMA_BASE_2DMA_BASE_2 0x0C0 cs89x0.h DMA controller base
7900
 DMA_STATDMA_STAT 0x0D0 cs89x0.h DMA controller status register
7901
 DMA_MASKDMA_MASK 0x0D4 cs89x0.h DMA controller mask register
7902
 DMA_MODEDMA_MODE 0x0D6 cs89x0.h DMA controller mode register
7903
 DMA_RESETFFDMA_RESETFF 0x0D8 cs89x0.h DMA controller first/last flip flop
7904
 DMA_DISABLEDMA_DISABLE 0x04 cs89x0.h Disable channel n
7905
 DMA_ENABLEDMA_ENABLE 0x00 cs89x0.h Enable channel n
7906
 DMA_RX_MODEDMA_RX_MODE 0x14 cs89x0.h 　
7907
 DMA_TX_MODEDMA_TX_MODE 0x18 cs89x0.h 　
7908
 DMA_SIZEDMA_SIZE (16*1024) cs89x0.h Size of dma buffer - 16k
7909
 CS8900CS8900 0x0000 cs89x0.h 　
7910
 CS8920CS8920 0x4000 cs89x0.h 　
7911
 CS8920MCS8920M 0x6000 cs89x0.h 　
7912
 REVISON_BITSREVISON_BITS 0x1F00 cs89x0.h 　
7913
 EEVER_NUMBEREEVER_NUMBER 0x12 cs89x0.h 　
7914
 CHKSUM_LENCHKSUM_LEN 0x14 cs89x0.h 　
7915
 CHKSUM_VALCHKSUM_VAL 0x0000 cs89x0.h 　
7916
 START_EEPROM_DATASTART_EEPROM_DATA 0x001c cs89x0.h Offset into eeprom for start of data
7917
 IRQ_MAP_EEPROM_DATAIRQ_MAP_EEPROM_DATA 0x0046 cs89x0.h Offset into eeprom for the IRQ map
7918
 IRQ_MAP_LENIRQ_MAP_LEN 0x0004 cs89x0.h No of bytes to read for the IRQ map
7919
 PNP_IRQ_FRMTPNP_IRQ_FRMT 0x0022 cs89x0.h PNP small item IRQ format
7920
 CS8900_IRQ_MAPCS8900_IRQ_MAP 0x1c20 cs89x0.h This IRQ map is fixed
7921
 CS8920_NO_INTSCS8920_NO_INTS 0x0F cs89x0.h Max CS8920 interrupt select #
7922
 PNP_ADD_PORTPNP_ADD_PORT 0x0279 cs89x0.h 　
7923
 PNP_WRITE_PORTPNP_WRITE_PORT 0x0A79 cs89x0.h 　
7924
 GET_PNP_ISA_STRUCTGET_PNP_ISA_STRUCT 0x40 cs89x0.h 　
7925
 PNP_ISA_STRUCT_LENPNP_ISA_STRUCT_LEN 0x06 cs89x0.h 　
7926
 PNP_CSN_CNT_OFFPNP_CSN_CNT_OFF 0x01 cs89x0.h 　
7927
 PNP_RD_PORT_OFFPNP_RD_PORT_OFF 0x02 cs89x0.h 　
7928
 PNP_FUNCTION_OKPNP_FUNCTION_OK 0x00 cs89x0.h 　
7929
 PNP_WAKEPNP_WAKE 0x03 cs89x0.h 　
7930
 PNP_RSRC_DATAPNP_RSRC_DATA 0x04 cs89x0.h 　
7931
 PNP_RSRC_READYPNP_RSRC_READY 0x01 cs89x0.h 　
7932
 PNP_STATUSPNP_STATUS 0x05 cs89x0.h 　
7933
 PNP_ACTIVATEPNP_ACTIVATE 0x30 cs89x0.h 　
7934
 PNP_CNF_IO_HPNP_CNF_IO_H 0x60 cs89x0.h 　
7935
 PNP_CNF_IO_LPNP_CNF_IO_L 0x61 cs89x0.h 　
7936
 PNP_CNF_INTPNP_CNF_INT 0x70 cs89x0.h 　
7937
 PNP_CNF_DMAPNP_CNF_DMA 0x74 cs89x0.h 　
7938
 PNP_CNF_MEMPNP_CNF_MEM 0x48 cs89x0.h 　
7939
 BIT0BIT0 1 cs89x0.h 　
7940
 BIT15BIT15 0x8000 cs89x0.h 　
7941
 PCI_VENDOR_SMCPCI_VENDOR_SMC 0x10B8 epic100.h 　
7942
 PCI_DEVICE_SMC_EPIC100PCI_DEVICE_SMC_EPIC100 0x0005 epic100.h 　
7943
 PCI_DEVICE_ID_NONEPCI_DEVICE_ID_NONE 0xFFFF epic100.h 　
7944
 CR_STOP_RXCR_STOP_RX (0x00000001) epic100.h 　
7945
 CR_START_RXCR_START_RX (0x00000002) epic100.h 　
7946
 CR_QUEUE_TXCR_QUEUE_TX (0x00000004) epic100.h 　
7947
 CR_QUEUE_RXCR_QUEUE_RX (0x00000008) epic100.h 　
7948
 CR_NEXTFRAMECR_NEXTFRAME (0x00000010) epic100.h 　
7949
 CR_STOP_TX_DMACR_STOP_TX_DMA (0x00000020) epic100.h 　
7950
 CR_STOP_RX_DMACR_STOP_RX_DMA (0x00000040) epic100.h 　
7951
 CR_TX_UGOCR_TX_UGO (0x00000080) epic100.h 　
7952
 INTR_RX_THR_STAINTR_RX_THR_STA (0x00400000) epic100.h rx copy threshold status NI
7953
 INTR_RX_BUFF_EMPTYINTR_RX_BUFF_EMPTY (0x00200000) epic100.h rx buffers empty. NI
7954
 INTR_TX_IN_PROGINTR_TX_IN_PROG (0x00100000) epic100.h tx copy in progess. NI
7955
 INTR_RX_IN_PROGINTR_RX_IN_PROG (0x00080000) epic100.h rx copy in progress. NI
7956
 INTR_TXIDLEINTR_TXIDLE (0x00040000) epic100.h tx idle. NI
7957
 INTR_RXIDLEINTR_RXIDLE (0x00020000) epic100.h rx idle. NI
7958
 INTR_INTR_ACTIVEINTR_INTR_ACTIVE (0x00010000) epic100.h Interrupt active. NI
7959
 INTR_RX_STATUS_OKINTR_RX_STATUS_OK (0x00008000) epic100.h rx status valid. NI
7960
 INTR_PCI_TGT_ABTINTR_PCI_TGT_ABT (0x00004000) epic100.h PCI Target abort
7961
 INTR_PCI_MASTER_ABTINTR_PCI_MASTER_ABT (0x00002000) epic100.h PCI Master abort
7962
 INTR_PCI_PARITY_ERRINTR_PCI_PARITY_ERR (0x00001000) epic100.h PCI adress parity error
7963
 INTR_PCI_DATA_ERRINTR_PCI_DATA_ERR (0x00000800) epic100.h PCI data parity error
7964
 INTR_RX_THR_CROSSEDINTR_RX_THR_CROSSED (0x00000400) epic100.h rx copy threshold crossed
7965
 INTR_CNTFULLINTR_CNTFULL (0x00000200) epic100.h Counter overflow
7966
 INTR_TXUNDERRUNINTR_TXUNDERRUN (0x00000100) epic100.h tx underrun.
7967
 INTR_TXEMPTYINTR_TXEMPTY (0x00000080) epic100.h tx queue empty
7968
 INTR_TX_CH_COMPLETEINTR_TX_CH_COMPLETE (0x00000040) epic100.h tx chain complete
7969
 INTR_TXDONEINTR_TXDONE (0x00000020) epic100.h tx complete (w or w/o err)
7970
 INTR_RXERRORINTR_RXERROR (0x00000010) epic100.h rx error (CRC)
7971
 INTR_RXOVERFLOWINTR_RXOVERFLOW (0x00000008) epic100.h rx buffer overflow
7972
 INTR_RX_QUEUE_EMPTYINTR_RX_QUEUE_EMPTY (0x00000004) epic100.h rx queue empty.
7973
 INTR_RXHEADERINTR_RXHEADER (0x00000002) epic100.h header copy complete
7974
 INTR_RXDONEINTR_RXDONE (0x00000001) epic100.h Receive copy complete
7975
 INTR_CLEARINTRINTR_CLEARINTR (0x00007FFF) epic100.h 　
7976
 INTR_VALIDBITSINTR_VALIDBITS (0x007FFFFF) epic100.h 　
7977
 INTR_DISABLEINTR_DISABLE (0x00000000) epic100.h 　
7978
 INTR_CLEARERRSINTR_CLEARERRS (0x00007F18) epic100.h 　
7979
 INTR_ABNINTRINTR_ABNINTR (INTR_CNTFULL | INTR_TXUNDERRUN | INTR_RXOVERFLOW) epic100.h 　
7980
 GC_SOFT_RESETGC_SOFT_RESET (0x00000001) epic100.h 　
7981
 GC_INTR_ENABLEGC_INTR_ENABLE (0x00000002) epic100.h 　
7982
 GC_SOFT_INTRGC_SOFT_INTR (0x00000004) epic100.h 　
7983
 GC_POWER_DOWNGC_POWER_DOWN (0x00000008) epic100.h 　
7984
 GC_ONE_COPYGC_ONE_COPY (0x00000010) epic100.h 　
7985
 GC_BIG_ENDIANGC_BIG_ENDIAN (0x00000020) epic100.h 　
7986
 GC_RX_PREEMPT_TXGC_RX_PREEMPT_TX (0x00000040) epic100.h 　
7987
 GC_TX_PREEMPT_RXGC_TX_PREEMPT_RX (0x00000080) epic100.h 　
7988
 GC_RX_FIFO_THR_32GC_RX_FIFO_THR_32 (0x00000000) epic100.h 　
7989
 GC_RX_FIFO_THR_64GC_RX_FIFO_THR_64 (0x00000100) epic100.h 　
7990
 GC_RX_FIFO_THR_96GC_RX_FIFO_THR_96 (0x00000200) epic100.h 　
7991
 GC_RX_FIFO_THR_128GC_RX_FIFO_THR_128 (0x00000300) epic100.h 　
7992
 GC_MRC_MEM_READGC_MRC_MEM_READ (0x00000000) epic100.h 　
7993
 GC_MRC_READ_MULTGC_MRC_READ_MULT (0x00000400) epic100.h 　
7994
 GC_MRC_READ_LINEGC_MRC_READ_LINE (0x00000800) epic100.h 　
7995
 GC_SOFTBIT0GC_SOFTBIT0 (0x00001000) epic100.h 　
7996
 GC_SOFTBIT1GC_SOFTBIT1 (0x00002000) epic100.h 　
7997
 GC_RESET_PHYGC_RESET_PHY (0x00004000) epic100.h 　
7998
 RC_SAVE_ERRORED_PKTRC_SAVE_ERRORED_PKT (0x00000001) epic100.h 　
7999
 RC_SAVE_RUNT_FRAMESRC_SAVE_RUNT_FRAMES (0x00000002) epic100.h 　
8000
 RC_RCV_BROADCASTRC_RCV_BROADCAST (0x00000004) epic100.h 　
8001
 RC_RCV_MULTICASTRC_RCV_MULTICAST (0x00000008) epic100.h 　
8002
 RC_RCV_INVERSE_PKTRC_RCV_INVERSE_PKT (0x00000010) epic100.h 　
8003
 RC_PROMISCUOUS_MODERC_PROMISCUOUS_MODE (0x00000020) epic100.h 　
8004
 RC_MONITOR_MODERC_MONITOR_MODE (0x00000040) epic100.h 　
8005
 RC_EARLY_RCV_ENABLERC_EARLY_RCV_ENABLE (0x00000080) epic100.h 　
8006
 RD_FRAGLISTRD_FRAGLIST (0x0001) epic100.h Desc points to a fragment list
8007
 RD_LLFORMRD_LLFORM (0x0002) epic100.h Frag list format
8008
 RD_HDR_CPYRD_HDR_CPY (0x0004) epic100.h Desc used for header copy
8009
 TC_EARLY_TX_ENABLETC_EARLY_TX_ENABLE (0x00000001) epic100.h 　
8010
 TC_LM_NORMALTC_LM_NORMAL (0x00000000) epic100.h 　
8011
 TC_LM_INTERNALTC_LM_INTERNAL (0x00000002) epic100.h 　
8012
 TC_LM_EXTERNALTC_LM_EXTERNAL (0x00000004) epic100.h 　
8013
 TC_LM_FULL_DPXTC_LM_FULL_DPX (0x00000006) epic100.h 　
8014
 TX_SLOT_TIMETX_SLOT_TIME (0x00000078) epic100.h 　
8015
 TX_FIFO_THRESHTX_FIFO_THRESH 128 epic100.h Rounded down to 4 byte units.
8016
 RRING_PKT_INTACTRRING_PKT_INTACT (0x0001) epic100.h 　
8017
 RRING_ALIGN_ERRRRING_ALIGN_ERR (0x0002) epic100.h 　
8018
 RRING_CRC_ERRRRING_CRC_ERR (0x0004) epic100.h 　
8019
 RRING_MISSED_PKTRRING_MISSED_PKT (0x0008) epic100.h 　
8020
 RRING_MULTICASTRRING_MULTICAST (0x0010) epic100.h 　
8021
 RRING_BROADCASTRRING_BROADCAST (0x0020) epic100.h 　
8022
 RRING_RECEIVER_DISABLERRING_RECEIVER_DISABLE (0x0040) epic100.h 　
8023
 RRING_STATUS_VALIDRRING_STATUS_VALID (0x1000) epic100.h 　
8024
 RRING_FRAGLIST_ERRRRING_FRAGLIST_ERR (0x2000) epic100.h 　
8025
 RRING_HDR_COPIEDRRING_HDR_COPIED (0x4000) epic100.h 　
8026
 RRING_OWNRRING_OWN (0x8000) epic100.h 　
8027
 RRING_ERRORRRING_ERROR (RRING_ALIGN_ERR|RRING_CRC_ERR) epic100.h 　
8028
 TRING_PKT_INTACTTRING_PKT_INTACT (0x0001) epic100.h pkt transmitted.
8029
 TRING_PKT_NONDEFERTRING_PKT_NONDEFER (0x0002) epic100.h pkt xmitted w/o deferring
8030
 TRING_COLLTRING_COLL (0x0004) epic100.h pkt xmitted w collisions
8031
 TRING_CARRTRING_CARR (0x0008) epic100.h carrier sense lost
8032
 TRING_UNDERRUNTRING_UNDERRUN (0x0010) epic100.h DMA underrun
8033
 TRING_HB_COLLTRING_HB_COLL (0x0020) epic100.h Collision detect Heartbeat
8034
 TRING_WIN_COLLTRING_WIN_COLL (0x0040) epic100.h out of window collision
8035
 TRING_DEFERREDTRING_DEFERRED (0x0080) epic100.h Deferring
8036
 TRING_COLL_COUNTTRING_COLL_COUNT (0x0F00) epic100.h collision counter (mask)
8037
 TRING_COLL_EXCESSTRING_COLL_EXCESS (0x1000) epic100.h tx aborted: excessive colls
8038
 TRING_OWNTRING_OWN (0x8000) epic100.h desc ownership bit
8039
 TRING_ABORTTRING_ABORT (TRING_COLL_EXCESS|TRING_WIN_COLL|TRING_UNDERRUN) epic100.h 　
8040
 TRING_ERRORTRING_ERROR (TRING_DEFERRED|TRING_WIN_COLL|TRING_UNDERRUN|TRING_CARR ) epic100.h |TRING_COLL
8041
 TD_FRAGLISTTD_FRAGLIST (0x0001) epic100.h Desc points to a fragment list
8042
 TD_LLFORMTD_LLFORM (0x0002) epic100.h Frag list format
8043
 TD_IAFTD_IAF (0x0004) epic100.h Generate Interrupt after tx
8044
 TD_NOCRCTD_NOCRC (0x0008) epic100.h No CRC generated
8045
 TD_LASTDESCTD_LASTDESC (0x0010) epic100.h Last desc for this frame
8046
 EFAB_DUMMY_FIELD_LBNEFAB_DUMMY_FIELD_LBN 0 etherfabric.h 　
8047
 EFAB_DUMMY_FIELD_WIDTHEFAB_DUMMY_FIELD_WIDTH 0 etherfabric.h 　
8048
 EFAB_DWORD_0_LBNEFAB_DWORD_0_LBN 0 etherfabric.h 　
8049
 EFAB_DWORD_0_WIDTHEFAB_DWORD_0_WIDTH 32 etherfabric.h 　
8050
 EFAB_DWORD_1_LBNEFAB_DWORD_1_LBN 32 etherfabric.h 　
8051
 EFAB_DWORD_1_WIDTHEFAB_DWORD_1_WIDTH 32 etherfabric.h 　
8052
 EFAB_DWORD_2_LBNEFAB_DWORD_2_LBN 64 etherfabric.h 　
8053
 EFAB_DWORD_2_WIDTHEFAB_DWORD_2_WIDTH 32 etherfabric.h 　
8054
 EFAB_DWORD_3_LBNEFAB_DWORD_3_LBN 96 etherfabric.h 　
8055
 EFAB_DWORD_3_WIDTHEFAB_DWORD_3_WIDTH 32 etherfabric.h 　
8056
 EFAB_DWORD_FMTEFAB_DWORD_FMT "%08x" etherfabric.h 　
8057
 EFAB_QWORD_FMTEFAB_QWORD_FMT "%08x:%08x" etherfabric.h 　
8058
 EFAB_OWORD_FMTEFAB_OWORD_FMT "%08x:%08x:%08x:%08x" etherfabric.h 　
8059
 EFAB_OWORD_FIELDEFAB_OWORD_FIELD EFAB_OWORD_FIELD64 etherfabric.h 　
8060
 EFAB_QWORD_FIELDEFAB_QWORD_FIELD EFAB_QWORD_FIELD64 etherfabric.h 　
8061
 EFAB_OWORD_IS_ZEROEFAB_OWORD_IS_ZERO EFAB_OWORD_IS_ZERO64 etherfabric.h 　
8062
 EFAB_QWORD_IS_ZEROEFAB_QWORD_IS_ZERO EFAB_QWORD_IS_ZERO64 etherfabric.h 　
8063
 EFAB_OWORD_IS_ALL_ONESEFAB_OWORD_IS_ALL_ONES EFAB_OWORD_IS_ALL_ONES64 etherfabric.h 　
8064
 EFAB_QWORD_IS_ALL_ONESEFAB_QWORD_IS_ALL_ONES EFAB_QWORD_IS_ALL_ONES64 etherfabric.h 　
8065
 EFAB_OWORD_FIELDEFAB_OWORD_FIELD EFAB_OWORD_FIELD32 etherfabric.h 　
8066
 EFAB_QWORD_FIELDEFAB_QWORD_FIELD EFAB_QWORD_FIELD32 etherfabric.h 　
8067
 EFAB_OWORD_IS_ZEROEFAB_OWORD_IS_ZERO EFAB_OWORD_IS_ZERO32 etherfabric.h 　
8068
 EFAB_QWORD_IS_ZEROEFAB_QWORD_IS_ZERO EFAB_QWORD_IS_ZERO32 etherfabric.h 　
8069
 EFAB_OWORD_IS_ALL_ONESEFAB_OWORD_IS_ALL_ONES EFAB_OWORD_IS_ALL_ONES32 etherfabric.h 　
8070
 EFAB_QWORD_IS_ALL_ONESEFAB_QWORD_IS_ALL_ONES EFAB_QWORD_IS_ALL_ONES32 etherfabric.h 　
8071
 EFAB_POPULATE_OWORDEFAB_POPULATE_OWORD EFAB_POPULATE_OWORD64 etherfabric.h 　
8072
 EFAB_POPULATE_QWORDEFAB_POPULATE_QWORD EFAB_POPULATE_QWORD64 etherfabric.h 　
8073
 EFAB_POPULATE_OWORDEFAB_POPULATE_OWORD EFAB_POPULATE_OWORD32 etherfabric.h 　
8074
 EFAB_POPULATE_QWORDEFAB_POPULATE_QWORD EFAB_POPULATE_QWORD32 etherfabric.h 　
8075
 EFAB_POPULATE_OWORD_10EFAB_POPULATE_OWORD_10 EFAB_POPULATE_OWORD etherfabric.h 　
8076
 EFAB_POPULATE_QWORD_10EFAB_POPULATE_QWORD_10 EFAB_POPULATE_QWORD etherfabric.h 　
8077
 EFAB_POPULATE_DWORD_10EFAB_POPULATE_DWORD_10 EFAB_POPULATE_DWORD etherfabric.h 　
8078
 EFAB_SET_OWORD_FIELDEFAB_SET_OWORD_FIELD EFAB_SET_OWORD_FIELD64 etherfabric.h 　
8079
 EFAB_SET_QWORD_FIELDEFAB_SET_QWORD_FIELD EFAB_SET_QWORD_FIELD64 etherfabric.h 　
8080
 EFAB_SET_OWORD_FIELDEFAB_SET_OWORD_FIELD EFAB_SET_OWORD_FIELD32 etherfabric.h 　
8081
 EFAB_SET_QWORD_FIELDEFAB_SET_QWORD_FIELD EFAB_SET_QWORD_FIELD32 etherfabric.h 　
8082
 DMA_ADDR_T_WIDTHDMA_ADDR_T_WIDTH ( 8 * sizeof ( dma_addr_t ) ) etherfabric.h 　
8083
 EFAB_DMA_MAX_MASKEFAB_DMA_MAX_MASK ( ( DMA_ADDR_T_WIDTH == 64 ) ? \ ~( ( uint64_t ) 0 ) : ~( ( uint32_t ) 0 ) ) etherfabric.h 　
8084
 dma_addr_tdma_addr_t unsigned long etherfabric_nic.h 　
8085
 EFAB_BUF_ALIGNEFAB_BUF_ALIGN 4096 etherfabric_nic.h 　
8086
 EFAB_RXD_SIZEEFAB_RXD_SIZE 512 etherfabric_nic.h 　
8087
 EFAB_TXD_SIZEEFAB_TXD_SIZE 512 etherfabric_nic.h 　
8088
 EFAB_EVQ_SIZEEFAB_EVQ_SIZE 512 etherfabric_nic.h 　
8089
 EFAB_NUM_RX_DESCEFAB_NUM_RX_DESC 16 etherfabric_nic.h 　
8090
 EFAB_RX_BUF_SIZEEFAB_RX_BUF_SIZE 1600 etherfabric_nic.h 　
8091
 HFA384x_CMD_ALLOC_LEN_MINHFA384x_CMD_ALLOC_LEN_MIN ((UINT16)4) hfa384x.h 　
8092
 HFA384x_CMD_ALLOC_LEN_MAXHFA384x_CMD_ALLOC_LEN_MAX ((UINT16)2400) hfa384x.h 　
8093
 HFA384x_BAP_DATALEN_MAXHFA384x_BAP_DATALEN_MAX ((UINT16)4096) hfa384x.h 　
8094
 HFA384x_BAP_OFFSET_MAXHFA384x_BAP_OFFSET_MAX ((UINT16)4096) hfa384x.h 　
8095
 HFA384x_PORTID_MAXHFA384x_PORTID_MAX ((UINT16)7) hfa384x.h 　
8096
 HFA384x_NUMPORTS_MAXHFA384x_NUMPORTS_MAX ((UINT16)(HFA384x_PORTID_MAX+1)) hfa384x.h 　
8097
 HFA384x_PDR_LEN_MAXHFA384x_PDR_LEN_MAX ((UINT16)512) hfa384x.h in bytes, from EK
8098
 HFA384x_PDA_RECS_MAXHFA384x_PDA_RECS_MAX ((UINT16)200) hfa384x.h a guess
8099
 HFA384x_PDA_LEN_MAXHFA384x_PDA_LEN_MAX ((UINT16)1024) hfa384x.h in bytes, from EK
8100
 HFA384x_SCANRESULT_MAXHFA384x_SCANRESULT_MAX ((UINT16)31) hfa384x.h 　
8101
 HFA384x_HSCANRESULT_MAXHFA384x_HSCANRESULT_MAX ((UINT16)31) hfa384x.h 　
8102
 HFA384x_CHINFORESULT_MAXHFA384x_CHINFORESULT_MAX ((UINT16)16) hfa384x.h 　
8103
 HFA384x_DRVR_FIDSTACKLEN_MAXHFA384x_DRVR_FIDSTACKLEN_MAX (10) hfa384x.h 　
8104
 HFA384x_DRVR_TXBUF_MAXHFA384x_DRVR_TXBUF_MAX (sizeof(hfa384x_tx_frame_t) + \ WLAN_DATA_MAXLEN - \ WLAN_WEP_IV_LEN - \ WLAN_WEP_ICV_LEN + 2) hfa384x.h 　
8105
 HFA384x_DRVR_MAGICHFA384x_DRVR_MAGIC (0x4a2d) hfa384x.h 　
8106
 HFA384x_INFODATA_MAXLENHFA384x_INFODATA_MAXLEN (sizeof(hfa384x_infodata_t)) hfa384x.h 　
8107
 HFA384x_INFOFRM_MAXLENHFA384x_INFOFRM_MAXLEN (sizeof(hfa384x_InfFrame_t)) hfa384x.h 　
8108
 HFA384x_RID_GUESSING_MAXLENHFA384x_RID_GUESSING_MAXLEN 2048 hfa384x.h I'm not really sure
8109
 HFA384x_RIDDATA_MAXLENHFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN hfa384x.h 　
8110
 HFA384x_USB_RWMEM_MAXLENHFA384x_USB_RWMEM_MAXLEN 2048 hfa384x.h 　
8111
 HFA384x_BAP_PROCHFA384x_BAP_PROC ((UINT16)0) hfa384x.h 　
8112
 HFA384x_BAP_INTHFA384x_BAP_INT ((UINT16)1) hfa384x.h 　
8113
 HFA384x_PORTTYPE_IBSSHFA384x_PORTTYPE_IBSS ((UINT16)0) hfa384x.h 　
8114
 HFA384x_PORTTYPE_BSSHFA384x_PORTTYPE_BSS ((UINT16)1) hfa384x.h 　
8115
 HFA384x_PORTTYPE_WDSHFA384x_PORTTYPE_WDS ((UINT16)2) hfa384x.h 　
8116
 HFA384x_PORTTYPE_PSUEDOIBSSHFA384x_PORTTYPE_PSUEDOIBSS ((UINT16)3) hfa384x.h 　
8117
 HFA384x_PORTTYPE_HOSTAPHFA384x_PORTTYPE_HOSTAP ((UINT16)6) hfa384x.h 　
8118
 HFA384x_WEPFLAGS_PRIVINVOKEDHFA384x_WEPFLAGS_PRIVINVOKED ((UINT16)BIT0) hfa384x.h 　
8119
 HFA384x_WEPFLAGS_EXCLUDEHFA384x_WEPFLAGS_EXCLUDE ((UINT16)BIT1) hfa384x.h 　
8120
 HFA384x_WEPFLAGS_DISABLE_TXCRYPHFA384x_WEPFLAGS_DISABLE_TXCRYP ((UINT16)BIT4) hfa384x.h 　
8121
 HFA384x_WEPFLAGS_DISABLE_RXCRYPHFA384x_WEPFLAGS_DISABLE_RXCRYP ((UINT16)BIT7) hfa384x.h 　
8122
 HFA384x_WEPFLAGS_DISALLOW_MIXEDHFA384x_WEPFLAGS_DISALLOW_MIXED ((UINT16)BIT11) hfa384x.h 　
8123
 HFA384x_WEPFLAGS_IV_INTERVAL1HFA384x_WEPFLAGS_IV_INTERVAL1 ((UINT16)0) hfa384x.h 　
8124
 HFA384x_WEPFLAGS_IV_INTERVAL10HFA384x_WEPFLAGS_IV_INTERVAL10 ((UINT16)BIT5) hfa384x.h 　
8125
 HFA384x_WEPFLAGS_IV_INTERVAL50HFA384x_WEPFLAGS_IV_INTERVAL50 ((UINT16)BIT6) hfa384x.h 　
8126
 HFA384x_WEPFLAGS_IV_INTERVAL100HFA384x_WEPFLAGS_IV_INTERVAL100 ((UINT16)(BIT5 | BIT6)) hfa384x.h 　
8127
 HFA384x_WEPFLAGS_FIRMWARE_WPAHFA384x_WEPFLAGS_FIRMWARE_WPA ((UINT16)BIT8) hfa384x.h 　
8128
 HFA384x_WEPFLAGS_HOST_MICHFA384x_WEPFLAGS_HOST_MIC ((UINT16)BIT9) hfa384x.h 　
8129
 HFA384x_ROAMMODE_FWSCAN_FWROAMHFA384x_ROAMMODE_FWSCAN_FWROAM ((UINT16)1) hfa384x.h 　
8130
 HFA384x_ROAMMODE_FWSCAN_HOSTROAHFA384x_ROAMMODE_FWSCAN_HOSTROA ((UINT16)2) hfa384x.h 　
8131
 HFA384x_ROAMMODE_HOSTSCAN_HOSTRHFA384x_ROAMMODE_HOSTSCAN_HOSTR ((UINT16)3) hfa384x.h 　
8132
 HFA384x_PORTSTATUS_DISABLEDHFA384x_PORTSTATUS_DISABLED ((UINT16)1) hfa384x.h 　
8133
 HFA384x_PORTSTATUS_INITSRCHHFA384x_PORTSTATUS_INITSRCH ((UINT16)2) hfa384x.h 　
8134
 HFA384x_PORTSTATUS_CONN_IBSSHFA384x_PORTSTATUS_CONN_IBSS ((UINT16)3) hfa384x.h 　
8135
 HFA384x_PORTSTATUS_CONN_ESSHFA384x_PORTSTATUS_CONN_ESS ((UINT16)4) hfa384x.h 　
8136
 HFA384x_PORTSTATUS_OOR_ESSHFA384x_PORTSTATUS_OOR_ESS ((UINT16)5) hfa384x.h 　
8137
 HFA384x_PORTSTATUS_CONN_WDSHFA384x_PORTSTATUS_CONN_WDS ((UINT16)6) hfa384x.h 　
8138
 HFA384x_PORTSTATUS_HOSTAPHFA384x_PORTSTATUS_HOSTAP ((UINT16)8) hfa384x.h 　
8139
 HFA384x_RATEBIT_1HFA384x_RATEBIT_1 ((UINT16)1) hfa384x.h 　
8140
 HFA384x_RATEBIT_2HFA384x_RATEBIT_2 ((UINT16)2) hfa384x.h 　
8141
 HFA384x_RATEBIT_5dot5HFA384x_RATEBIT_5dot5 ((UINT16)4) hfa384x.h 　
8142
 HFA384x_RATEBIT_11HFA384x_RATEBIT_11 ((UINT16)8) hfa384x.h 　
8143
 HFA384x_TXCMD_NORECLHFA384x_TXCMD_NORECL ((UINT16)0) hfa384x.h 　
8144
 HFA384x_TXCMD_RECLHFA384x_TXCMD_RECL ((UINT16)1) hfa384x.h 　
8145
 HFA384x_ADDR_AUX_OFF_MAXHFA384x_ADDR_AUX_OFF_MAX ((UINT16)0x007f) hfa384x.h 　
8146
 HFA384x_ADDR_FLAT_AUX_PAGE_MASKHFA384x_ADDR_FLAT_AUX_PAGE_MASK (0x007fff80) hfa384x.h 　
8147
 HFA384x_ADDR_FLAT_AUX_OFF_MASKHFA384x_ADDR_FLAT_AUX_OFF_MASK (0x0000007f) hfa384x.h 　
8148
 HFA384x_ADDR_FLAT_CMD_PAGE_MASKHFA384x_ADDR_FLAT_CMD_PAGE_MASK (0xffff0000) hfa384x.h 　
8149
 HFA384x_ADDR_FLAT_CMD_OFF_MASKHFA384x_ADDR_FLAT_CMD_OFF_MASK (0x0000ffff) hfa384x.h 　
8150
 HFA384x_ADDR_AUX_PAGE_MASKHFA384x_ADDR_AUX_PAGE_MASK (0xffff) hfa384x.h 　
8151
 HFA384x_ADDR_AUX_OFF_MASKHFA384x_ADDR_AUX_OFF_MASK (0x007f) hfa384x.h 　
8152
 HFA384x_ADDR_CMD_PAGE_MASKHFA384x_ADDR_CMD_PAGE_MASK (0x007f) hfa384x.h 　
8153
 HFA384x_ADDR_CMD_OFF_MASKHFA384x_ADDR_CMD_OFF_MASK (0xffff) hfa384x.h 　
8154
 HFA384x_AUX_CTL_EXTDSHFA384x_AUX_CTL_EXTDS (0x00) hfa384x.h 　
8155
 HFA384x_AUX_CTL_NVHFA384x_AUX_CTL_NV (0x01) hfa384x.h 　
8156
 HFA384x_AUX_CTL_PHYHFA384x_AUX_CTL_PHY (0x02) hfa384x.h 　
8157
 HFA384x_AUX_CTL_ICSRAMHFA384x_AUX_CTL_ICSRAM (0x03) hfa384x.h 　
8158
 HFA3842_PDA_BASEHFA3842_PDA_BASE (0x007f0000UL) hfa384x.h 　
8159
 HFA3841_PDA_BASEHFA3841_PDA_BASE (0x003f0000UL) hfa384x.h 　
8160
 HFA3841_PDA_BOGUS_BASEHFA3841_PDA_BOGUS_BASE (0x00390000UL) hfa384x.h 　
8161
 HFA384x_DLSTATE_DISABLEDHFA384x_DLSTATE_DISABLED 0 hfa384x.h 　
8162
 HFA384x_DLSTATE_RAMENABLEDHFA384x_DLSTATE_RAMENABLED 1 hfa384x.h 　
8163
 HFA384x_DLSTATE_FLASHENABLEDHFA384x_DLSTATE_FLASHENABLED 2 hfa384x.h 　
8164
 HFA384x_DLSTATE_FLASHWRITTENHFA384x_DLSTATE_FLASHWRITTEN 3 hfa384x.h 　
8165
 HFA384x_DLSTATE_FLASHWRITEPENDIHFA384x_DLSTATE_FLASHWRITEPENDI 4 hfa384x.h 　
8166
 HFA384x_DLSTATE_GENESISHFA384x_DLSTATE_GENESIS 5 hfa384x.h 　
8167
 HFA384x_CMD_OFFHFA384x_CMD_OFF (0x00) hfa384x.h 　
8168
 HFA384x_PARAM0_OFFHFA384x_PARAM0_OFF (0x02) hfa384x.h 　
8169
 HFA384x_PARAM1_OFFHFA384x_PARAM1_OFF (0x04) hfa384x.h 　
8170
 HFA384x_PARAM2_OFFHFA384x_PARAM2_OFF (0x06) hfa384x.h 　
8171
 HFA384x_STATUS_OFFHFA384x_STATUS_OFF (0x08) hfa384x.h 　
8172
 HFA384x_RESP0_OFFHFA384x_RESP0_OFF (0x0A) hfa384x.h 　
8173
 HFA384x_RESP1_OFFHFA384x_RESP1_OFF (0x0C) hfa384x.h 　
8174
 HFA384x_RESP2_OFFHFA384x_RESP2_OFF (0x0E) hfa384x.h 　
8175
 HFA384x_INFOFID_OFFHFA384x_INFOFID_OFF (0x10) hfa384x.h 　
8176
 HFA384x_RXFID_OFFHFA384x_RXFID_OFF (0x20) hfa384x.h 　
8177
 HFA384x_ALLOCFID_OFFHFA384x_ALLOCFID_OFF (0x22) hfa384x.h 　
8178
 HFA384x_TXCOMPLFID_OFFHFA384x_TXCOMPLFID_OFF (0x24) hfa384x.h 　
8179
 HFA384x_SELECT0_OFFHFA384x_SELECT0_OFF (0x18) hfa384x.h 　
8180
 HFA384x_OFFSET0_OFFHFA384x_OFFSET0_OFF (0x1C) hfa384x.h 　
8181
 HFA384x_DATA0_OFFHFA384x_DATA0_OFF (0x36) hfa384x.h 　
8182
 HFA384x_SELECT1_OFFHFA384x_SELECT1_OFF (0x1A) hfa384x.h 　
8183
 HFA384x_OFFSET1_OFFHFA384x_OFFSET1_OFF (0x1E) hfa384x.h 　
8184
 HFA384x_DATA1_OFFHFA384x_DATA1_OFF (0x38) hfa384x.h 　
8185
 HFA384x_EVSTAT_OFFHFA384x_EVSTAT_OFF (0x30) hfa384x.h 　
8186
 HFA384x_INTEN_OFFHFA384x_INTEN_OFF (0x32) hfa384x.h 　
8187
 HFA384x_EVACK_OFFHFA384x_EVACK_OFF (0x34) hfa384x.h 　
8188
 HFA384x_CONTROL_OFFHFA384x_CONTROL_OFF (0x14) hfa384x.h 　
8189
 HFA384x_SWSUPPORT0_OFFHFA384x_SWSUPPORT0_OFF (0x28) hfa384x.h 　
8190
 HFA384x_SWSUPPORT1_OFFHFA384x_SWSUPPORT1_OFF (0x2A) hfa384x.h 　
8191
 HFA384x_SWSUPPORT2_OFFHFA384x_SWSUPPORT2_OFF (0x2C) hfa384x.h 　
8192
 HFA384x_AUXPAGE_OFFHFA384x_AUXPAGE_OFF (0x3A) hfa384x.h 　
8193
 HFA384x_AUXOFFSET_OFFHFA384x_AUXOFFSET_OFF (0x3C) hfa384x.h 　
8194
 HFA384x_AUXDATA_OFFHFA384x_AUXDATA_OFF (0x3E) hfa384x.h 　
8195
 HFA384x_CMD_OFFHFA384x_CMD_OFF (0x00) hfa384x.h 　
8196
 HFA384x_PARAM0_OFFHFA384x_PARAM0_OFF (0x04) hfa384x.h 　
8197
 HFA384x_PARAM1_OFFHFA384x_PARAM1_OFF (0x08) hfa384x.h 　
8198
 HFA384x_PARAM2_OFFHFA384x_PARAM2_OFF (0x0c) hfa384x.h 　
8199
 HFA384x_STATUS_OFFHFA384x_STATUS_OFF (0x10) hfa384x.h 　
8200
 HFA384x_RESP0_OFFHFA384x_RESP0_OFF (0x14) hfa384x.h 　
8201
 HFA384x_RESP1_OFFHFA384x_RESP1_OFF (0x18) hfa384x.h 　
8202
 HFA384x_RESP2_OFFHFA384x_RESP2_OFF (0x1c) hfa384x.h 　
8203
 HFA384x_INFOFID_OFFHFA384x_INFOFID_OFF (0x20) hfa384x.h 　
8204
 HFA384x_RXFID_OFFHFA384x_RXFID_OFF (0x40) hfa384x.h 　
8205
 HFA384x_ALLOCFID_OFFHFA384x_ALLOCFID_OFF (0x44) hfa384x.h 　
8206
 HFA384x_TXCOMPLFID_OFFHFA384x_TXCOMPLFID_OFF (0x48) hfa384x.h 　
8207
 HFA384x_SELECT0_OFFHFA384x_SELECT0_OFF (0x30) hfa384x.h 　
8208
 HFA384x_OFFSET0_OFFHFA384x_OFFSET0_OFF (0x38) hfa384x.h 　
8209
 HFA384x_DATA0_OFFHFA384x_DATA0_OFF (0x6c) hfa384x.h 　
8210
 HFA384x_SELECT1_OFFHFA384x_SELECT1_OFF (0x34) hfa384x.h 　
8211
 HFA384x_OFFSET1_OFFHFA384x_OFFSET1_OFF (0x3c) hfa384x.h 　
8212
 HFA384x_DATA1_OFFHFA384x_DATA1_OFF (0x70) hfa384x.h 　
8213
 HFA384x_EVSTAT_OFFHFA384x_EVSTAT_OFF (0x60) hfa384x.h 　
8214
 HFA384x_INTEN_OFFHFA384x_INTEN_OFF (0x64) hfa384x.h 　
8215
 HFA384x_EVACK_OFFHFA384x_EVACK_OFF (0x68) hfa384x.h 　
8216
 HFA384x_CONTROL_OFFHFA384x_CONTROL_OFF (0x28) hfa384x.h 　
8217
 HFA384x_SWSUPPORT0_OFFHFA384x_SWSUPPORT0_OFF (0x50) hfa384x.h 　
8218
 HFA384x_SWSUPPORT1_OFFHFA384x_SWSUPPORT1_OFF (0x54) hfa384x.h 　
8219
 HFA384x_SWSUPPORT2_OFFHFA384x_SWSUPPORT2_OFF (0x58) hfa384x.h 　
8220
 HFA384x_AUXPAGE_OFFHFA384x_AUXPAGE_OFF (0x74) hfa384x.h 　
8221
 HFA384x_AUXOFFSET_OFFHFA384x_AUXOFFSET_OFF (0x78) hfa384x.h 　
8222
 HFA384x_AUXDATA_OFFHFA384x_AUXDATA_OFF (0x7c) hfa384x.h 　
8223
 HFA384x_PCICOR_OFFHFA384x_PCICOR_OFF (0x4c) hfa384x.h 　
8224
 HFA384x_PCIHCR_OFFHFA384x_PCIHCR_OFF (0x5c) hfa384x.h 　
8225
 HFA384x_PCI_M0_ADDRH_OFFHFA384x_PCI_M0_ADDRH_OFF (0x80) hfa384x.h 　
8226
 HFA384x_PCI_M0_ADDRL_OFFHFA384x_PCI_M0_ADDRL_OFF (0x84) hfa384x.h 　
8227
 HFA384x_PCI_M0_LEN_OFFHFA384x_PCI_M0_LEN_OFF (0x88) hfa384x.h 　
8228
 HFA384x_PCI_M0_CTL_OFFHFA384x_PCI_M0_CTL_OFF (0x8c) hfa384x.h 　
8229
 HFA384x_PCI_STATUS_OFFHFA384x_PCI_STATUS_OFF (0x98) hfa384x.h 　
8230
 HFA384x_PCI_M1_ADDRH_OFFHFA384x_PCI_M1_ADDRH_OFF (0xa0) hfa384x.h 　
8231
 HFA384x_PCI_M1_ADDRL_OFFHFA384x_PCI_M1_ADDRL_OFF (0xa4) hfa384x.h 　
8232
 HFA384x_PCI_M1_LEN_OFFHFA384x_PCI_M1_LEN_OFF (0xa8) hfa384x.h 　
8233
 HFA384x_PCI_M1_CTL_OFFHFA384x_PCI_M1_CTL_OFF (0xac) hfa384x.h 　
8234
 HFA384x_CMD_BUSYHFA384x_CMD_BUSY ((UINT16)BIT15) hfa384x.h 　
8235
 HFA384x_CMD_AINFOHFA384x_CMD_AINFO ((UINT16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8)) hfa384x.h 　
8236
 HFA384x_CMD_MACPORTHFA384x_CMD_MACPORT ((UINT16)(BIT10 | BIT9 | BIT8)) hfa384x.h 　
8237
 HFA384x_CMD_RECLHFA384x_CMD_RECL ((UINT16)BIT8) hfa384x.h 　
8238
 HFA384x_CMD_WRITEHFA384x_CMD_WRITE ((UINT16)BIT8) hfa384x.h 　
8239
 HFA384x_CMD_PROGMODEHFA384x_CMD_PROGMODE ((UINT16)(BIT9 | BIT8)) hfa384x.h 　
8240
 HFA384x_CMD_CMDCODEHFA384x_CMD_CMDCODE ((UINT16)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)) hfa384x.h 　
8241
 HFA384x_STATUS_RESULTHFA384x_STATUS_RESULT ((UINT16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8)) hfa384x.h 　
8242
 HFA384x_STATUS_CMDCODEHFA384x_STATUS_CMDCODE ((UINT16)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)) hfa384x.h 　
8243
 HFA384x_OFFSET_BUSYHFA384x_OFFSET_BUSY ((UINT16)BIT15) hfa384x.h 　
8244
 HFA384x_OFFSET_ERRHFA384x_OFFSET_ERR ((UINT16)BIT14) hfa384x.h 　
8245
 HFA384x_OFFSET_DATAOFFHFA384x_OFFSET_DATAOFF ((UINT16)(BIT11 | BIT10 | BIT9 | BIT8 | BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1)) hfa384x.h 　
8246
 HFA384x_EVSTAT_TICKHFA384x_EVSTAT_TICK ((UINT16)BIT15) hfa384x.h 　
8247
 HFA384x_EVSTAT_WTERRHFA384x_EVSTAT_WTERR ((UINT16)BIT14) hfa384x.h 　
8248
 HFA384x_EVSTAT_INFDROPHFA384x_EVSTAT_INFDROP ((UINT16)BIT13) hfa384x.h 　
8249
 HFA384x_EVSTAT_INFOHFA384x_EVSTAT_INFO ((UINT16)BIT7) hfa384x.h 　
8250
 HFA384x_EVSTAT_DTIMHFA384x_EVSTAT_DTIM ((UINT16)BIT5) hfa384x.h 　
8251
 HFA384x_EVSTAT_CMDHFA384x_EVSTAT_CMD ((UINT16)BIT4) hfa384x.h 　
8252
 HFA384x_EVSTAT_ALLOCHFA384x_EVSTAT_ALLOC ((UINT16)BIT3) hfa384x.h 　
8253
 HFA384x_EVSTAT_TXEXCHFA384x_EVSTAT_TXEXC ((UINT16)BIT2) hfa384x.h 　
8254
 HFA384x_EVSTAT_TXHFA384x_EVSTAT_TX ((UINT16)BIT1) hfa384x.h 　
8255
 HFA384x_EVSTAT_RXHFA384x_EVSTAT_RX ((UINT16)BIT0) hfa384x.h 　
8256
 HFA384x_INT_BAP_OPHFA384x_INT_BAP_OP (HFA384x_EVSTAT_INFO|HFA384x_EVSTAT_RX|HFA384x_EVSTAT_TX|HFA384x_EVSTAT_TXEXC) hfa384x.h 　
8257
 HFA384x_INT_NORMALHFA384x_INT_NORMAL (HFA384x_EVSTAT_INFO|HFA384x_EVSTAT_RX|HFA384x_EVSTAT_TX|HFA384x_EVSTAT_TXEXC|HFA384x_EVSTAT_INFDROP|HFA384x_EVSTAT_ALLOC|HFA38 hfa384x.h 　
8258
 HFA384x_INTEN_TICKHFA384x_INTEN_TICK ((UINT16)BIT15) hfa384x.h 　
8259
 HFA384x_INTEN_WTERRHFA384x_INTEN_WTERR ((UINT16)BIT14) hfa384x.h 　
8260
 HFA384x_INTEN_INFDROPHFA384x_INTEN_INFDROP ((UINT16)BIT13) hfa384x.h 　
8261
 HFA384x_INTEN_INFOHFA384x_INTEN_INFO ((UINT16)BIT7) hfa384x.h 　
8262
 HFA384x_INTEN_DTIMHFA384x_INTEN_DTIM ((UINT16)BIT5) hfa384x.h 　
8263
 HFA384x_INTEN_CMDHFA384x_INTEN_CMD ((UINT16)BIT4) hfa384x.h 　
8264
 HFA384x_INTEN_ALLOCHFA384x_INTEN_ALLOC ((UINT16)BIT3) hfa384x.h 　
8265
 HFA384x_INTEN_TXEXCHFA384x_INTEN_TXEXC ((UINT16)BIT2) hfa384x.h 　
8266
 HFA384x_INTEN_TXHFA384x_INTEN_TX ((UINT16)BIT1) hfa384x.h 　
8267
 HFA384x_INTEN_RXHFA384x_INTEN_RX ((UINT16)BIT0) hfa384x.h 　
8268
 HFA384x_EVACK_TICKHFA384x_EVACK_TICK ((UINT16)BIT15) hfa384x.h 　
8269
 HFA384x_EVACK_WTERRHFA384x_EVACK_WTERR ((UINT16)BIT14) hfa384x.h 　
8270
 HFA384x_EVACK_INFDROPHFA384x_EVACK_INFDROP ((UINT16)BIT13) hfa384x.h 　
8271
 HFA384x_EVACK_INFOHFA384x_EVACK_INFO ((UINT16)BIT7) hfa384x.h 　
8272
 HFA384x_EVACK_DTIMHFA384x_EVACK_DTIM ((UINT16)BIT5) hfa384x.h 　
8273
 HFA384x_EVACK_CMDHFA384x_EVACK_CMD ((UINT16)BIT4) hfa384x.h 　
8274
 HFA384x_EVACK_ALLOCHFA384x_EVACK_ALLOC ((UINT16)BIT3) hfa384x.h 　
8275
 HFA384x_EVACK_TXEXCHFA384x_EVACK_TXEXC ((UINT16)BIT2) hfa384x.h 　
8276
 HFA384x_EVACK_TXHFA384x_EVACK_TX ((UINT16)BIT1) hfa384x.h 　
8277
 HFA384x_EVACK_RXHFA384x_EVACK_RX ((UINT16)BIT0) hfa384x.h 　
8278
 HFA384x_CONTROL_AUXENHFA384x_CONTROL_AUXEN ((UINT16)(BIT15 | BIT14)) hfa384x.h 　
8279
 HFA384x_CMDCODE_INITHFA384x_CMDCODE_INIT ((UINT16)0x00) hfa384x.h 　
8280
 HFA384x_CMDCODE_ENABLEHFA384x_CMDCODE_ENABLE ((UINT16)0x01) hfa384x.h 　
8281
 HFA384x_CMDCODE_DISABLEHFA384x_CMDCODE_DISABLE ((UINT16)0x02) hfa384x.h 　
8282
 HFA384x_CMDCODE_DIAGHFA384x_CMDCODE_DIAG ((UINT16)0x03) hfa384x.h 　
8283
 HFA384x_CMDCODE_ALLOCHFA384x_CMDCODE_ALLOC ((UINT16)0x0A) hfa384x.h 　
8284
 HFA384x_CMDCODE_TXHFA384x_CMDCODE_TX ((UINT16)0x0B) hfa384x.h 　
8285
 HFA384x_CMDCODE_CLRPRSTHFA384x_CMDCODE_CLRPRST ((UINT16)0x12) hfa384x.h 　
8286
 HFA384x_CMDCODE_NOTIFYHFA384x_CMDCODE_NOTIFY ((UINT16)0x10) hfa384x.h 　
8287
 HFA384x_CMDCODE_INQHFA384x_CMDCODE_INQ ((UINT16)0x11) hfa384x.h 　
8288
 HFA384x_CMDCODE_ACCESSHFA384x_CMDCODE_ACCESS ((UINT16)0x21) hfa384x.h 　
8289
 HFA384x_CMDCODE_DOWNLDHFA384x_CMDCODE_DOWNLD ((UINT16)0x22) hfa384x.h 　
8290
 HFA384x_CMDCODE_MONITORHFA384x_CMDCODE_MONITOR ((UINT16)(0x38)) hfa384x.h 　
8291
 HFA384x_MONITOR_ENABLEHFA384x_MONITOR_ENABLE ((UINT16)(0x0b)) hfa384x.h 　
8292
 HFA384x_MONITOR_DISABLEHFA384x_MONITOR_DISABLE ((UINT16)(0x0f)) hfa384x.h 　
8293
 HFA384x_SUCCESSHFA384x_SUCCESS ((UINT16)(0x00)) hfa384x.h 　
8294
 HFA384x_CARD_FAILHFA384x_CARD_FAIL ((UINT16)(0x01)) hfa384x.h 　
8295
 HFA384x_NO_BUFFHFA384x_NO_BUFF ((UINT16)(0x05)) hfa384x.h 　
8296
 HFA384x_CMD_ERRHFA384x_CMD_ERR ((UINT16)(0x7F)) hfa384x.h 　
8297
 HFA384x_PROGMODE_DISABLEHFA384x_PROGMODE_DISABLE ((UINT16)0x00) hfa384x.h 　
8298
 HFA384x_PROGMODE_RAMHFA384x_PROGMODE_RAM ((UINT16)0x01) hfa384x.h 　
8299
 HFA384x_PROGMODE_NVHFA384x_PROGMODE_NV ((UINT16)0x02) hfa384x.h 　
8300
 HFA384x_PROGMODE_NVWRITEHFA384x_PROGMODE_NVWRITE ((UINT16)0x03) hfa384x.h 　
8301
 HFA384x_AUXPW0HFA384x_AUXPW0 ((UINT16)0xfe01) hfa384x.h 　
8302
 HFA384x_AUXPW1HFA384x_AUXPW1 ((UINT16)0xdc23) hfa384x.h 　
8303
 HFA384x_AUXPW2HFA384x_AUXPW2 ((UINT16)0xba45) hfa384x.h 　
8304
 HFA384x_CONTROL_AUX_ISDISABLEDHFA384x_CONTROL_AUX_ISDISABLED ((UINT16)0x0000) hfa384x.h 　
8305
 HFA384x_CONTROL_AUX_ISENABLEDHFA384x_CONTROL_AUX_ISENABLED ((UINT16)0xc000) hfa384x.h 　
8306
 HFA384x_CONTROL_AUX_DOENABLEHFA384x_CONTROL_AUX_DOENABLE ((UINT16)0x8000) hfa384x.h 　
8307
 HFA384x_CONTROL_AUX_DODISABLEHFA384x_CONTROL_AUX_DODISABLE ((UINT16)0x4000) hfa384x.h 　
8308
 HFA384x_RID_CNFPORTTYPEHFA384x_RID_CNFPORTTYPE ((UINT16)0xFC00) hfa384x.h 　
8309
 HFA384x_RID_CNFOWNMACADDRHFA384x_RID_CNFOWNMACADDR ((UINT16)0xFC01) hfa384x.h 　
8310
 HFA384x_RID_CNFDESIREDSSIDHFA384x_RID_CNFDESIREDSSID ((UINT16)0xFC02) hfa384x.h 　
8311
 HFA384x_RID_CNFOWNCHANNELHFA384x_RID_CNFOWNCHANNEL ((UINT16)0xFC03) hfa384x.h 　
8312
 HFA384x_RID_CNFOWNSSIDHFA384x_RID_CNFOWNSSID ((UINT16)0xFC04) hfa384x.h 　
8313
 HFA384x_RID_CNFOWNATIMWINHFA384x_RID_CNFOWNATIMWIN ((UINT16)0xFC05) hfa384x.h 　
8314
 HFA384x_RID_CNFSYSSCALEHFA384x_RID_CNFSYSSCALE ((UINT16)0xFC06) hfa384x.h 　
8315
 HFA384x_RID_CNFMAXDATALENHFA384x_RID_CNFMAXDATALEN ((UINT16)0xFC07) hfa384x.h 　
8316
 HFA384x_RID_CNFWDSADDRHFA384x_RID_CNFWDSADDR ((UINT16)0xFC08) hfa384x.h 　
8317
 HFA384x_RID_CNFPMENABLEDHFA384x_RID_CNFPMENABLED ((UINT16)0xFC09) hfa384x.h 　
8318
 HFA384x_RID_CNFPMEPSHFA384x_RID_CNFPMEPS ((UINT16)0xFC0A) hfa384x.h 　
8319
 HFA384x_RID_CNFMULTICASTRXHFA384x_RID_CNFMULTICASTRX ((UINT16)0xFC0B) hfa384x.h 　
8320
 HFA384x_RID_CNFMAXSLEEPDURHFA384x_RID_CNFMAXSLEEPDUR ((UINT16)0xFC0C) hfa384x.h 　
8321
 HFA384x_RID_CNFPMHOLDDURHFA384x_RID_CNFPMHOLDDUR ((UINT16)0xFC0D) hfa384x.h 　
8322
 HFA384x_RID_CNFOWNNAMEHFA384x_RID_CNFOWNNAME ((UINT16)0xFC0E) hfa384x.h 　
8323
 HFA384x_RID_CNFOWNDTIMPERHFA384x_RID_CNFOWNDTIMPER ((UINT16)0xFC10) hfa384x.h 　
8324
 HFA384x_RID_CNFWDSADDR1HFA384x_RID_CNFWDSADDR1 ((UINT16)0xFC11) hfa384x.h 　
8325
 HFA384x_RID_CNFWDSADDR2HFA384x_RID_CNFWDSADDR2 ((UINT16)0xFC12) hfa384x.h 　
8326
 HFA384x_RID_CNFWDSADDR3HFA384x_RID_CNFWDSADDR3 ((UINT16)0xFC13) hfa384x.h 　
8327
 HFA384x_RID_CNFWDSADDR4HFA384x_RID_CNFWDSADDR4 ((UINT16)0xFC14) hfa384x.h 　
8328
 HFA384x_RID_CNFWDSADDR5HFA384x_RID_CNFWDSADDR5 ((UINT16)0xFC15) hfa384x.h 　
8329
 HFA384x_RID_CNFWDSADDR6HFA384x_RID_CNFWDSADDR6 ((UINT16)0xFC16) hfa384x.h 　
8330
 HFA384x_RID_CNFMCASTPMBUFFHFA384x_RID_CNFMCASTPMBUFF ((UINT16)0xFC17) hfa384x.h 　
8331
 HFA384x_RID_CNFPORTTYPE_LENHFA384x_RID_CNFPORTTYPE_LEN ((UINT16)2) hfa384x.h 　
8332
 HFA384x_RID_CNFOWNMACADDR_LENHFA384x_RID_CNFOWNMACADDR_LEN ((UINT16)6) hfa384x.h 　
8333
 HFA384x_RID_CNFDESIREDSSID_LENHFA384x_RID_CNFDESIREDSSID_LEN ((UINT16)34) hfa384x.h 　
8334
 HFA384x_RID_CNFOWNCHANNEL_LENHFA384x_RID_CNFOWNCHANNEL_LEN ((UINT16)2) hfa384x.h 　
8335
 HFA384x_RID_CNFOWNSSID_LENHFA384x_RID_CNFOWNSSID_LEN ((UINT16)34) hfa384x.h 　
8336
 HFA384x_RID_CNFOWNATIMWIN_LENHFA384x_RID_CNFOWNATIMWIN_LEN ((UINT16)2) hfa384x.h 　
8337
 HFA384x_RID_CNFSYSSCALE_LENHFA384x_RID_CNFSYSSCALE_LEN ((UINT16)0) hfa384x.h 　
8338
 HFA384x_RID_CNFMAXDATALEN_LENHFA384x_RID_CNFMAXDATALEN_LEN ((UINT16)0) hfa384x.h 　
8339
 HFA384x_RID_CNFWDSADDR_LENHFA384x_RID_CNFWDSADDR_LEN ((UINT16)6) hfa384x.h 　
8340
 HFA384x_RID_CNFPMENABLED_LENHFA384x_RID_CNFPMENABLED_LEN ((UINT16)0) hfa384x.h 　
8341
 HFA384x_RID_CNFPMEPS_LENHFA384x_RID_CNFPMEPS_LEN ((UINT16)0) hfa384x.h 　
8342
 HFA384x_RID_CNFMULTICASTRX_LENHFA384x_RID_CNFMULTICASTRX_LEN ((UINT16)0) hfa384x.h 　
8343
 HFA384x_RID_CNFMAXSLEEPDUR_LENHFA384x_RID_CNFMAXSLEEPDUR_LEN ((UINT16)0) hfa384x.h 　
8344
 HFA384x_RID_CNFPMHOLDDUR_LENHFA384x_RID_CNFPMHOLDDUR_LEN ((UINT16)0) hfa384x.h 　
8345
 HFA384x_RID_CNFOWNNAME_LENHFA384x_RID_CNFOWNNAME_LEN ((UINT16)34) hfa384x.h 　
8346
 HFA384x_RID_CNFOWNDTIMPER_LENHFA384x_RID_CNFOWNDTIMPER_LEN ((UINT16)0) hfa384x.h 　
8347
 HFA384x_RID_CNFWDSADDR1_LENHFA384x_RID_CNFWDSADDR1_LEN ((UINT16)6) hfa384x.h 　
8348
 HFA384x_RID_CNFWDSADDR2_LENHFA384x_RID_CNFWDSADDR2_LEN ((UINT16)6) hfa384x.h 　
8349
 HFA384x_RID_CNFWDSADDR3_LENHFA384x_RID_CNFWDSADDR3_LEN ((UINT16)6) hfa384x.h 　
8350
 HFA384x_RID_CNFWDSADDR4_LENHFA384x_RID_CNFWDSADDR4_LEN ((UINT16)6) hfa384x.h 　
8351
 HFA384x_RID_CNFWDSADDR5_LENHFA384x_RID_CNFWDSADDR5_LEN ((UINT16)6) hfa384x.h 　
8352
 HFA384x_RID_CNFWDSADDR6_LENHFA384x_RID_CNFWDSADDR6_LEN ((UINT16)6) hfa384x.h 　
8353
 HFA384x_RID_CNFMCASTPMBUFF_LENHFA384x_RID_CNFMCASTPMBUFF_LEN ((UINT16)0) hfa384x.h 　
8354
 HFA384x_RID_CNFAUTHENTICATION_LHFA384x_RID_CNFAUTHENTICATION_L ((UINT16)sizeof(UINT16)) hfa384x.h 　
8355
 HFA384x_RID_CNFMAXSLEEPDUR_LENHFA384x_RID_CNFMAXSLEEPDUR_LEN ((UINT16)0) hfa384x.h 　
8356
 HFA384x_RID_GROUPADDRHFA384x_RID_GROUPADDR ((UINT16)0xFC80) hfa384x.h 　
8357
 HFA384x_RID_CREATEIBSSHFA384x_RID_CREATEIBSS ((UINT16)0xFC81) hfa384x.h 　
8358
 HFA384x_RID_FRAGTHRESHHFA384x_RID_FRAGTHRESH ((UINT16)0xFC82) hfa384x.h 　
8359
 HFA384x_RID_RTSTHRESHHFA384x_RID_RTSTHRESH ((UINT16)0xFC83) hfa384x.h 　
8360
 HFA384x_RID_TXRATECNTLHFA384x_RID_TXRATECNTL ((UINT16)0xFC84) hfa384x.h 　
8361
 HFA384x_RID_PROMISCMODEHFA384x_RID_PROMISCMODE ((UINT16)0xFC85) hfa384x.h 　
8362
 HFA384x_RID_FRAGTHRESH0HFA384x_RID_FRAGTHRESH0 ((UINT16)0xFC90) hfa384x.h 　
8363
 HFA384x_RID_FRAGTHRESH1HFA384x_RID_FRAGTHRESH1 ((UINT16)0xFC91) hfa384x.h 　
8364
 HFA384x_RID_FRAGTHRESH2HFA384x_RID_FRAGTHRESH2 ((UINT16)0xFC92) hfa384x.h 　
8365
 HFA384x_RID_FRAGTHRESH3HFA384x_RID_FRAGTHRESH3 ((UINT16)0xFC93) hfa384x.h 　
8366
 HFA384x_RID_FRAGTHRESH4HFA384x_RID_FRAGTHRESH4 ((UINT16)0xFC94) hfa384x.h 　
8367
 HFA384x_RID_FRAGTHRESH5HFA384x_RID_FRAGTHRESH5 ((UINT16)0xFC95) hfa384x.h 　
8368
 HFA384x_RID_FRAGTHRESH6HFA384x_RID_FRAGTHRESH6 ((UINT16)0xFC96) hfa384x.h 　
8369
 HFA384x_RID_RTSTHRESH0HFA384x_RID_RTSTHRESH0 ((UINT16)0xFC97) hfa384x.h 　
8370
 HFA384x_RID_RTSTHRESH1HFA384x_RID_RTSTHRESH1 ((UINT16)0xFC98) hfa384x.h 　
8371
 HFA384x_RID_RTSTHRESH2HFA384x_RID_RTSTHRESH2 ((UINT16)0xFC99) hfa384x.h 　
8372
 HFA384x_RID_RTSTHRESH3HFA384x_RID_RTSTHRESH3 ((UINT16)0xFC9A) hfa384x.h 　
8373
 HFA384x_RID_RTSTHRESH4HFA384x_RID_RTSTHRESH4 ((UINT16)0xFC9B) hfa384x.h 　
8374
 HFA384x_RID_RTSTHRESH5HFA384x_RID_RTSTHRESH5 ((UINT16)0xFC9C) hfa384x.h 　
8375
 HFA384x_RID_RTSTHRESH6HFA384x_RID_RTSTHRESH6 ((UINT16)0xFC9D) hfa384x.h 　
8376
 HFA384x_RID_TXRATECNTL0HFA384x_RID_TXRATECNTL0 ((UINT16)0xFC9E) hfa384x.h 　
8377
 HFA384x_RID_TXRATECNTL1HFA384x_RID_TXRATECNTL1 ((UINT16)0xFC9F) hfa384x.h 　
8378
 HFA384x_RID_TXRATECNTL2HFA384x_RID_TXRATECNTL2 ((UINT16)0xFCA0) hfa384x.h 　
8379
 HFA384x_RID_TXRATECNTL3HFA384x_RID_TXRATECNTL3 ((UINT16)0xFCA1) hfa384x.h 　
8380
 HFA384x_RID_TXRATECNTL4HFA384x_RID_TXRATECNTL4 ((UINT16)0xFCA2) hfa384x.h 　
8381
 HFA384x_RID_TXRATECNTL5HFA384x_RID_TXRATECNTL5 ((UINT16)0xFCA3) hfa384x.h 　
8382
 HFA384x_RID_TXRATECNTL6HFA384x_RID_TXRATECNTL6 ((UINT16)0xFCA4) hfa384x.h 　
8383
 HFA384x_RID_GROUPADDR_LENHFA384x_RID_GROUPADDR_LEN ((UINT16)16 * WLAN_ADDR_LEN) hfa384x.h 　
8384
 HFA384x_RID_CREATEIBSS_LENHFA384x_RID_CREATEIBSS_LEN ((UINT16)0) hfa384x.h 　
8385
 HFA384x_RID_FRAGTHRESH_LENHFA384x_RID_FRAGTHRESH_LEN ((UINT16)0) hfa384x.h 　
8386
 HFA384x_RID_RTSTHRESH_LENHFA384x_RID_RTSTHRESH_LEN ((UINT16)0) hfa384x.h 　
8387
 HFA384x_RID_TXRATECNTL_LENHFA384x_RID_TXRATECNTL_LEN ((UINT16)4) hfa384x.h 　
8388
 HFA384x_RID_PROMISCMODE_LENHFA384x_RID_PROMISCMODE_LEN ((UINT16)2) hfa384x.h 　
8389
 HFA384x_RID_FRAGTHRESH0_LENHFA384x_RID_FRAGTHRESH0_LEN ((UINT16)0) hfa384x.h 　
8390
 HFA384x_RID_FRAGTHRESH1_LENHFA384x_RID_FRAGTHRESH1_LEN ((UINT16)0) hfa384x.h 　
8391
 HFA384x_RID_FRAGTHRESH2_LENHFA384x_RID_FRAGTHRESH2_LEN ((UINT16)0) hfa384x.h 　
8392
 HFA384x_RID_FRAGTHRESH3_LENHFA384x_RID_FRAGTHRESH3_LEN ((UINT16)0) hfa384x.h 　
8393
 HFA384x_RID_FRAGTHRESH4_LENHFA384x_RID_FRAGTHRESH4_LEN ((UINT16)0) hfa384x.h 　
8394
 HFA384x_RID_FRAGTHRESH5_LENHFA384x_RID_FRAGTHRESH5_LEN ((UINT16)0) hfa384x.h 　
8395
 HFA384x_RID_FRAGTHRESH6_LENHFA384x_RID_FRAGTHRESH6_LEN ((UINT16)0) hfa384x.h 　
8396
 HFA384x_RID_RTSTHRESH0_LENHFA384x_RID_RTSTHRESH0_LEN ((UINT16)0) hfa384x.h 　
8397
 HFA384x_RID_RTSTHRESH1_LENHFA384x_RID_RTSTHRESH1_LEN ((UINT16)0) hfa384x.h 　
8398
 HFA384x_RID_RTSTHRESH2_LENHFA384x_RID_RTSTHRESH2_LEN ((UINT16)0) hfa384x.h 　
8399
 HFA384x_RID_RTSTHRESH3_LENHFA384x_RID_RTSTHRESH3_LEN ((UINT16)0) hfa384x.h 　
8400
 HFA384x_RID_RTSTHRESH4_LENHFA384x_RID_RTSTHRESH4_LEN ((UINT16)0) hfa384x.h 　
8401
 HFA384x_RID_RTSTHRESH5_LENHFA384x_RID_RTSTHRESH5_LEN ((UINT16)0) hfa384x.h 　
8402
 HFA384x_RID_RTSTHRESH6_LENHFA384x_RID_RTSTHRESH6_LEN ((UINT16)0) hfa384x.h 　
8403
 HFA384x_RID_TXRATECNTL0_LENHFA384x_RID_TXRATECNTL0_LEN ((UINT16)0) hfa384x.h 　
8404
 HFA384x_RID_TXRATECNTL1_LENHFA384x_RID_TXRATECNTL1_LEN ((UINT16)0) hfa384x.h 　
8405
 HFA384x_RID_TXRATECNTL2_LENHFA384x_RID_TXRATECNTL2_LEN ((UINT16)0) hfa384x.h 　
8406
 HFA384x_RID_TXRATECNTL3_LENHFA384x_RID_TXRATECNTL3_LEN ((UINT16)0) hfa384x.h 　
8407
 HFA384x_RID_TXRATECNTL4_LENHFA384x_RID_TXRATECNTL4_LEN ((UINT16)0) hfa384x.h 　
8408
 HFA384x_RID_TXRATECNTL5_LENHFA384x_RID_TXRATECNTL5_LEN ((UINT16)0) hfa384x.h 　
8409
 HFA384x_RID_TXRATECNTL6_LENHFA384x_RID_TXRATECNTL6_LEN ((UINT16)0) hfa384x.h 　
8410
 HFA384x_RID_ITICKTIMEHFA384x_RID_ITICKTIME ((UINT16)0xFCE0) hfa384x.h 　
8411
 HFA384x_RID_ITICKTIME_LENHFA384x_RID_ITICKTIME_LEN ((UINT16)2) hfa384x.h 　
8412
 HFA384x_RID_MAXLOADTIMEHFA384x_RID_MAXLOADTIME ((UINT16)0xFD00) hfa384x.h 　
8413
 HFA384x_RID_DOWNLOADBUFFERHFA384x_RID_DOWNLOADBUFFER ((UINT16)0xFD01) hfa384x.h 　
8414
 HFA384x_RID_PRIIDENTITYHFA384x_RID_PRIIDENTITY ((UINT16)0xFD02) hfa384x.h 　
8415
 HFA384x_RID_PRISUPRANGEHFA384x_RID_PRISUPRANGE ((UINT16)0xFD03) hfa384x.h 　
8416
 HFA384x_RID_PRI_CFIACTRANGESHFA384x_RID_PRI_CFIACTRANGES ((UINT16)0xFD04) hfa384x.h 　
8417
 HFA384x_RID_NICSERIALNUMBERHFA384x_RID_NICSERIALNUMBER ((UINT16)0xFD0A) hfa384x.h 　
8418
 HFA384x_RID_NICIDENTITYHFA384x_RID_NICIDENTITY ((UINT16)0xFD0B) hfa384x.h 　
8419
 HFA384x_RID_MFISUPRANGEHFA384x_RID_MFISUPRANGE ((UINT16)0xFD0C) hfa384x.h 　
8420
 HFA384x_RID_CFISUPRANGEHFA384x_RID_CFISUPRANGE ((UINT16)0xFD0D) hfa384x.h 　
8421
 HFA384x_RID_CHANNELLISTHFA384x_RID_CHANNELLIST ((UINT16)0xFD10) hfa384x.h 　
8422
 HFA384x_RID_REGULATORYDOMAINSHFA384x_RID_REGULATORYDOMAINS ((UINT16)0xFD11) hfa384x.h 　
8423
 HFA384x_RID_TEMPTYPEHFA384x_RID_TEMPTYPE ((UINT16)0xFD12) hfa384x.h 　
8424
 HFA384x_RID_CISHFA384x_RID_CIS ((UINT16)0xFD13) hfa384x.h 　
8425
 HFA384x_RID_STAIDENTITYHFA384x_RID_STAIDENTITY ((UINT16)0xFD20) hfa384x.h 　
8426
 HFA384x_RID_STASUPRANGEHFA384x_RID_STASUPRANGE ((UINT16)0xFD21) hfa384x.h 　
8427
 HFA384x_RID_STA_MFIACTRANGESHFA384x_RID_STA_MFIACTRANGES ((UINT16)0xFD22) hfa384x.h 　
8428
 HFA384x_RID_STA_CFIACTRANGESHFA384x_RID_STA_CFIACTRANGES ((UINT16)0xFD23) hfa384x.h 　
8429
 HFA384x_RID_BUILDSEQHFA384x_RID_BUILDSEQ ((UINT16)0xFFFE) hfa384x.h 　
8430
 HFA384x_RID_FWIDHFA384x_RID_FWID ((UINT16)0xFFFF) hfa384x.h 　
8431
 HFA384x_RID_MAXLOADTIME_LENHFA384x_RID_MAXLOADTIME_LEN ((UINT16)0) hfa384x.h 　
8432
 HFA384x_RID_DOWNLOADBUFFER_LENHFA384x_RID_DOWNLOADBUFFER_LEN ((UINT16)sizeof(hfa384x_downloadbuffer_t)) hfa384x.h 　
8433
 HFA384x_RID_PRIIDENTITY_LENHFA384x_RID_PRIIDENTITY_LEN ((UINT16)8) hfa384x.h 　
8434
 HFA384x_RID_PRISUPRANGE_LENHFA384x_RID_PRISUPRANGE_LEN ((UINT16)10) hfa384x.h 　
8435
 HFA384x_RID_CFIACTRANGES_LENHFA384x_RID_CFIACTRANGES_LEN ((UINT16)10) hfa384x.h 　
8436
 HFA384x_RID_NICSERIALNUMBER_LENHFA384x_RID_NICSERIALNUMBER_LEN ((UINT16)12) hfa384x.h 　
8437
 HFA384x_RID_NICIDENTITY_LENHFA384x_RID_NICIDENTITY_LEN ((UINT16)8) hfa384x.h 　
8438
 HFA384x_RID_MFISUPRANGE_LENHFA384x_RID_MFISUPRANGE_LEN ((UINT16)10) hfa384x.h 　
8439
 HFA384x_RID_CFISUPRANGE_LENHFA384x_RID_CFISUPRANGE_LEN ((UINT16)10) hfa384x.h 　
8440
 HFA384x_RID_CHANNELLIST_LENHFA384x_RID_CHANNELLIST_LEN ((UINT16)0) hfa384x.h 　
8441
 HFA384x_RID_REGULATORYDOMAINS_LHFA384x_RID_REGULATORYDOMAINS_L ((UINT16)12) hfa384x.h 　
8442
 HFA384x_RID_TEMPTYPE_LENHFA384x_RID_TEMPTYPE_LEN ((UINT16)0) hfa384x.h 　
8443
 HFA384x_RID_CIS_LENHFA384x_RID_CIS_LEN ((UINT16)480) hfa384x.h 　
8444
 HFA384x_RID_STAIDENTITY_LENHFA384x_RID_STAIDENTITY_LEN ((UINT16)8) hfa384x.h 　
8445
 HFA384x_RID_STASUPRANGE_LENHFA384x_RID_STASUPRANGE_LEN ((UINT16)10) hfa384x.h 　
8446
 HFA384x_RID_MFIACTRANGES_LENHFA384x_RID_MFIACTRANGES_LEN ((UINT16)10) hfa384x.h 　
8447
 HFA384x_RID_CFIACTRANGES2_LENHFA384x_RID_CFIACTRANGES2_LEN ((UINT16)10) hfa384x.h 　
8448
 HFA384x_RID_BUILDSEQ_LENHFA384x_RID_BUILDSEQ_LEN ((UINT16)sizeof(hfa384x_BuildSeq_t)) hfa384x.h 　
8449
 HFA384x_RID_FWID_LENHFA384x_RID_FWID_LEN ((UINT16)sizeof(hfa384x_FWID_t)) hfa384x.h 　
8450
 HFA384x_RID_PORTSTATUSHFA384x_RID_PORTSTATUS ((UINT16)0xFD40) hfa384x.h 　
8451
 HFA384x_RID_CURRENTSSIDHFA384x_RID_CURRENTSSID ((UINT16)0xFD41) hfa384x.h 　
8452
 HFA384x_RID_CURRENTBSSIDHFA384x_RID_CURRENTBSSID ((UINT16)0xFD42) hfa384x.h 　
8453
 HFA384x_RID_COMMSQUALITYHFA384x_RID_COMMSQUALITY ((UINT16)0xFD43) hfa384x.h 　
8454
 HFA384x_RID_CURRENTTXRATEHFA384x_RID_CURRENTTXRATE ((UINT16)0xFD44) hfa384x.h 　
8455
 HFA384x_RID_CURRENTBCNINTHFA384x_RID_CURRENTBCNINT ((UINT16)0xFD45) hfa384x.h 　
8456
 HFA384x_RID_CURRENTSCALETHRESHHFA384x_RID_CURRENTSCALETHRESH ((UINT16)0xFD46) hfa384x.h 　
8457
 HFA384x_RID_PROTOCOLRSPTIMEHFA384x_RID_PROTOCOLRSPTIME ((UINT16)0xFD47) hfa384x.h 　
8458
 HFA384x_RID_SHORTRETRYLIMITHFA384x_RID_SHORTRETRYLIMIT ((UINT16)0xFD48) hfa384x.h 　
8459
 HFA384x_RID_LONGRETRYLIMITHFA384x_RID_LONGRETRYLIMIT ((UINT16)0xFD49) hfa384x.h 　
8460
 HFA384x_RID_MAXTXLIFETIMEHFA384x_RID_MAXTXLIFETIME ((UINT16)0xFD4A) hfa384x.h 　
8461
 HFA384x_RID_MAXRXLIFETIMEHFA384x_RID_MAXRXLIFETIME ((UINT16)0xFD4B) hfa384x.h 　
8462
 HFA384x_RID_CFPOLLABLEHFA384x_RID_CFPOLLABLE ((UINT16)0xFD4C) hfa384x.h 　
8463
 HFA384x_RID_AUTHALGORITHMSHFA384x_RID_AUTHALGORITHMS ((UINT16)0xFD4D) hfa384x.h 　
8464
 HFA384x_RID_PRIVACYOPTIMPHFA384x_RID_PRIVACYOPTIMP ((UINT16)0xFD4F) hfa384x.h 　
8465
 HFA384x_RID_DBMCOMMSQUALITYHFA384x_RID_DBMCOMMSQUALITY ((UINT16)0xFD51) hfa384x.h 　
8466
 HFA384x_RID_CURRENTTXRATE1HFA384x_RID_CURRENTTXRATE1 ((UINT16)0xFD80) hfa384x.h 　
8467
 HFA384x_RID_CURRENTTXRATE2HFA384x_RID_CURRENTTXRATE2 ((UINT16)0xFD81) hfa384x.h 　
8468
 HFA384x_RID_CURRENTTXRATE3HFA384x_RID_CURRENTTXRATE3 ((UINT16)0xFD82) hfa384x.h 　
8469
 HFA384x_RID_CURRENTTXRATE4HFA384x_RID_CURRENTTXRATE4 ((UINT16)0xFD83) hfa384x.h 　
8470
 HFA384x_RID_CURRENTTXRATE5HFA384x_RID_CURRENTTXRATE5 ((UINT16)0xFD84) hfa384x.h 　
8471
 HFA384x_RID_CURRENTTXRATE6HFA384x_RID_CURRENTTXRATE6 ((UINT16)0xFD85) hfa384x.h 　
8472
 HFA384x_RID_OWNMACADDRESSHFA384x_RID_OWNMACADDRESS ((UINT16)0xFD86) hfa384x.h 　
8473
 HFA384x_RID_SCANRESULTSHFA384x_RID_SCANRESULTS ((UINT16)0xFD88) hfa384x.h NEW
8474
 HFA384x_RID_HOSTSCANRESULTSHFA384x_RID_HOSTSCANRESULTS ((UINT16)0xFD89) hfa384x.h NEW
8475
 HFA384x_RID_AUTHENTICATIONUSEDHFA384x_RID_AUTHENTICATIONUSED ((UINT16)0xFD8A) hfa384x.h NEW
8476
 HFA384x_RID_ASSOCIATEFAILUREHFA384x_RID_ASSOCIATEFAILURE ((UINT16)0xFD8D) hfa384x.h 1.8.0
8477
 HFA384x_RID_PORTSTATUS_LENHFA384x_RID_PORTSTATUS_LEN ((UINT16)0) hfa384x.h 　
8478
 HFA384x_RID_CURRENTSSID_LENHFA384x_RID_CURRENTSSID_LEN ((UINT16)34) hfa384x.h 　
8479
 HFA384x_RID_CURRENTBSSID_LENHFA384x_RID_CURRENTBSSID_LEN ((UINT16)WLAN_BSSID_LEN) hfa384x.h 　
8480
 HFA384x_RID_COMMSQUALITY_LENHFA384x_RID_COMMSQUALITY_LEN ((UINT16)sizeof(hfa384x_commsquality_t)) hfa384x.h 　
8481
 HFA384x_RID_DBMCOMMSQUALITY_LENHFA384x_RID_DBMCOMMSQUALITY_LEN ((UINT16)sizeof(hfa384x_dbmcommsquality_t)) hfa384x.h 　
8482
 HFA384x_RID_CURRENTTXRATE_LENHFA384x_RID_CURRENTTXRATE_LEN ((UINT16)0) hfa384x.h 　
8483
 HFA384x_RID_CURRENTBCNINT_LENHFA384x_RID_CURRENTBCNINT_LEN ((UINT16)0) hfa384x.h 　
8484
 HFA384x_RID_STACURSCALETHRESH_LHFA384x_RID_STACURSCALETHRESH_L ((UINT16)12) hfa384x.h 　
8485
 HFA384x_RID_APCURSCALETHRESH_LEHFA384x_RID_APCURSCALETHRESH_LE ((UINT16)6) hfa384x.h 　
8486
 HFA384x_RID_PROTOCOLRSPTIME_LENHFA384x_RID_PROTOCOLRSPTIME_LEN ((UINT16)0) hfa384x.h 　
8487
 HFA384x_RID_SHORTRETRYLIMIT_LENHFA384x_RID_SHORTRETRYLIMIT_LEN ((UINT16)0) hfa384x.h 　
8488
 HFA384x_RID_LONGRETRYLIMIT_LENHFA384x_RID_LONGRETRYLIMIT_LEN ((UINT16)0) hfa384x.h 　
8489
 HFA384x_RID_MAXTXLIFETIME_LENHFA384x_RID_MAXTXLIFETIME_LEN ((UINT16)0) hfa384x.h 　
8490
 HFA384x_RID_MAXRXLIFETIME_LENHFA384x_RID_MAXRXLIFETIME_LEN ((UINT16)0) hfa384x.h 　
8491
 HFA384x_RID_CFPOLLABLE_LENHFA384x_RID_CFPOLLABLE_LEN ((UINT16)0) hfa384x.h 　
8492
 HFA384x_RID_AUTHALGORITHMS_LENHFA384x_RID_AUTHALGORITHMS_LEN ((UINT16)4) hfa384x.h 　
8493
 HFA384x_RID_PRIVACYOPTIMP_LENHFA384x_RID_PRIVACYOPTIMP_LEN ((UINT16)0) hfa384x.h 　
8494
 HFA384x_RID_CURRENTTXRATE1_LENHFA384x_RID_CURRENTTXRATE1_LEN ((UINT16)0) hfa384x.h 　
8495
 HFA384x_RID_CURRENTTXRATE2_LENHFA384x_RID_CURRENTTXRATE2_LEN ((UINT16)0) hfa384x.h 　
8496
 HFA384x_RID_CURRENTTXRATE3_LENHFA384x_RID_CURRENTTXRATE3_LEN ((UINT16)0) hfa384x.h 　
8497
 HFA384x_RID_CURRENTTXRATE4_LENHFA384x_RID_CURRENTTXRATE4_LEN ((UINT16)0) hfa384x.h 　
8498
 HFA384x_RID_CURRENTTXRATE5_LENHFA384x_RID_CURRENTTXRATE5_LEN ((UINT16)0) hfa384x.h 　
8499
 HFA384x_RID_CURRENTTXRATE6_LENHFA384x_RID_CURRENTTXRATE6_LEN ((UINT16)0) hfa384x.h 　
8500
 HFA384x_RID_OWNMACADDRESS_LENHFA384x_RID_OWNMACADDRESS_LEN ((UINT16)6) hfa384x.h 　
8501
 HFA384x_RID_PCFINFO_LENHFA384x_RID_PCFINFO_LEN ((UINT16)6) hfa384x.h 　
8502
 HFA384x_RID_CNFAPPCFINFO_LENHFA384x_RID_CNFAPPCFINFO_LEN ((UINT16)sizeof(hfa384x_PCFInfo_data_t)) hfa384x.h 　
8503
 HFA384x_RID_SCANREQUEST_LENHFA384x_RID_SCANREQUEST_LEN ((UINT16)sizeof(hfa384x_ScanRequest_data_t)) hfa384x.h 　
8504
 HFA384x_RID_JOINREQUEST_LENHFA384x_RID_JOINREQUEST_LEN ((UINT16)sizeof(hfa384x_JoinRequest_data_t)) hfa384x.h 　
8505
 HFA384x_RID_AUTHENTICATESTA_LENHFA384x_RID_AUTHENTICATESTA_LEN ((UINT16)sizeof(hfa384x_authenticateStation_data_t)) hfa384x.h 　
8506
 HFA384x_RID_CHANNELINFOREQUEST_HFA384x_RID_CHANNELINFOREQUEST_ ((UINT16)sizeof(hfa384x_ChannelInfoRequest_data_t)) hfa384x.h 　
8507
 HFA384x_RID_PHYTYPEHFA384x_RID_PHYTYPE ((UINT16)0xFDC0) hfa384x.h 　
8508
 HFA384x_RID_CURRENTCHANNELHFA384x_RID_CURRENTCHANNEL ((UINT16)0xFDC1) hfa384x.h 　
8509
 HFA384x_RID_CURRENTPOWERSTATEHFA384x_RID_CURRENTPOWERSTATE ((UINT16)0xFDC2) hfa384x.h 　
8510
 HFA384x_RID_CCAMODEHFA384x_RID_CCAMODE ((UINT16)0xFDC3) hfa384x.h 　
8511
 HFA384x_RID_SUPPORTEDDATARATESHFA384x_RID_SUPPORTEDDATARATES ((UINT16)0xFDC6) hfa384x.h 　
8512
 HFA384x_RID_LFOSTATUSHFA384x_RID_LFOSTATUS ((UINT16)0xFDC7) hfa384x.h 1.7.1
8513
 HFA384x_RID_PHYTYPE_LENHFA384x_RID_PHYTYPE_LEN ((UINT16)0) hfa384x.h 　
8514
 HFA384x_RID_CURRENTCHANNEL_LENHFA384x_RID_CURRENTCHANNEL_LEN ((UINT16)0) hfa384x.h 　
8515
 HFA384x_RID_CURRENTPOWERSTATE_LHFA384x_RID_CURRENTPOWERSTATE_L ((UINT16)0) hfa384x.h 　
8516
 HFA384x_RID_CCAMODE_LENHFA384x_RID_CCAMODE_LEN ((UINT16)0) hfa384x.h 　
8517
 HFA384x_RID_SUPPORTEDDATARATES_HFA384x_RID_SUPPORTEDDATARATES_ ((UINT16)10) hfa384x.h 　
8518
 HFA384x_RID_CNFWEPDEFAULTKEYIDHFA384x_RID_CNFWEPDEFAULTKEYID ((UINT16)0xFC23) hfa384x.h 　
8519
 HFA384x_RID_CNFWEPDEFAULTKEY0HFA384x_RID_CNFWEPDEFAULTKEY0 ((UINT16)0xFC24) hfa384x.h 　
8520
 HFA384x_RID_CNFWEPDEFAULTKEY1HFA384x_RID_CNFWEPDEFAULTKEY1 ((UINT16)0xFC25) hfa384x.h 　
8521
 HFA384x_RID_CNFWEPDEFAULTKEY2HFA384x_RID_CNFWEPDEFAULTKEY2 ((UINT16)0xFC26) hfa384x.h 　
8522
 HFA384x_RID_CNFWEPDEFAULTKEY3HFA384x_RID_CNFWEPDEFAULTKEY3 ((UINT16)0xFC27) hfa384x.h 　
8523
 HFA384x_RID_CNFWEPFLAGSHFA384x_RID_CNFWEPFLAGS ((UINT16)0xFC28) hfa384x.h 　
8524
 HFA384x_RID_CNFWEPKEYMAPTABLEHFA384x_RID_CNFWEPKEYMAPTABLE ((UINT16)0xFC29) hfa384x.h 　
8525
 HFA384x_RID_CNFAUTHENTICATIONHFA384x_RID_CNFAUTHENTICATION ((UINT16)0xFC2A) hfa384x.h 　
8526
 HFA384x_RID_CNFMAXASSOCSTATIONSHFA384x_RID_CNFMAXASSOCSTATIONS ((UINT16)0xFC2B) hfa384x.h 　
8527
 HFA384x_RID_CNFTXCONTROLHFA384x_RID_CNFTXCONTROL ((UINT16)0xFC2C) hfa384x.h 　
8528
 HFA384x_RID_CNFROAMINGMODEHFA384x_RID_CNFROAMINGMODE ((UINT16)0xFC2D) hfa384x.h 　
8529
 HFA384x_RID_CNFHOSTAUTHASSOCHFA384x_RID_CNFHOSTAUTHASSOC ((UINT16)0xFC2E) hfa384x.h 　
8530
 HFA384x_RID_CNFRCVCRCERRORHFA384x_RID_CNFRCVCRCERROR ((UINT16)0xFC30) hfa384x.h 　
8531
 HFA384x_RID_CNFALTRETRYCNTHFA384x_RID_CNFALTRETRYCNT ((UINT16)0xFC32) hfa384x.h 　
8532
 HFA384x_RID_CNFAPBCNINTHFA384x_RID_CNFAPBCNINT ((UINT16)0xFC33) hfa384x.h 　
8533
 HFA384x_RID_CNFAPPCFINFOHFA384x_RID_CNFAPPCFINFO ((UINT16)0xFC34) hfa384x.h 　
8534
 HFA384x_RID_CNFSTAPCFINFOHFA384x_RID_CNFSTAPCFINFO ((UINT16)0xFC35) hfa384x.h 　
8535
 HFA384x_RID_CNFPRIORITYQUSAGEHFA384x_RID_CNFPRIORITYQUSAGE ((UINT16)0xFC37) hfa384x.h 　
8536
 HFA384x_RID_CNFTIMCTRLHFA384x_RID_CNFTIMCTRL ((UINT16)0xFC40) hfa384x.h 　
8537
 HFA384x_RID_CNFTHIRTY2TALLYHFA384x_RID_CNFTHIRTY2TALLY ((UINT16)0xFC42) hfa384x.h 　
8538
 HFA384x_RID_CNFENHSECURITYHFA384x_RID_CNFENHSECURITY ((UINT16)0xFC43) hfa384x.h 　
8539
 HFA384x_RID_CNFDBMADJUSTHFA384x_RID_CNFDBMADJUST ((UINT16)0xFC46) hfa384x.h NEW
8540
 HFA384x_RID_CNFWPADATAHFA384x_RID_CNFWPADATA ((UINT16)0xFC48) hfa384x.h 1.7.0
8541
 HFA384x_RID_CNFPROPOGATIONDELAYHFA384x_RID_CNFPROPOGATIONDELAY ((UINT16)0xFC49) hfa384x.h 1.7.6
8542
 HFA384x_RID_CNFSHORTPREAMBLEHFA384x_RID_CNFSHORTPREAMBLE ((UINT16)0xFCB0) hfa384x.h 　
8543
 HFA384x_RID_CNFEXCLONGPREAMBLEHFA384x_RID_CNFEXCLONGPREAMBLE ((UINT16)0xFCB1) hfa384x.h 　
8544
 HFA384x_RID_CNFAUTHRSPTIMEOUTHFA384x_RID_CNFAUTHRSPTIMEOUT ((UINT16)0xFCB2) hfa384x.h 　
8545
 HFA384x_RID_CNFBASICRATESHFA384x_RID_CNFBASICRATES ((UINT16)0xFCB3) hfa384x.h 　
8546
 HFA384x_RID_CNFSUPPRATESHFA384x_RID_CNFSUPPRATES ((UINT16)0xFCB4) hfa384x.h 　
8547
 HFA384x_RID_CNFFALLBACKCTRLHFA384x_RID_CNFFALLBACKCTRL ((UINT16)0xFCB5) hfa384x.h NEW
8548
 HFA384x_RID_WEPKEYSTATUSHFA384x_RID_WEPKEYSTATUS ((UINT16)0xFCB6) hfa384x.h NEW
8549
 HFA384x_RID_WEPKEYMAPINDEXHFA384x_RID_WEPKEYMAPINDEX ((UINT16)0xFCB7) hfa384x.h NEW
8550
 HFA384x_RID_BROADCASTKEYIDHFA384x_RID_BROADCASTKEYID ((UINT16)0xFCB8) hfa384x.h NEW
8551
 HFA384x_RID_ENTSECFLAGEYIDHFA384x_RID_ENTSECFLAGEYID ((UINT16)0xFCB9) hfa384x.h NEW
8552
 HFA384x_RID_CNFPASSIVESCANCTRLHFA384x_RID_CNFPASSIVESCANCTRL ((UINT16)0xFCBA) hfa384x.h NEW STA
8553
 HFA384x_RID_CNFWPAHANDLINGHFA384x_RID_CNFWPAHANDLING ((UINT16)0xFCBB) hfa384x.h 1.7.0
8554
 HFA384x_RID_MDCCONTROLHFA384x_RID_MDCCONTROL ((UINT16)0xFCBC) hfa384x.h 1.7.0/1.4.0
8555
 HFA384x_RID_MDCCOUNTRYHFA384x_RID_MDCCOUNTRY ((UINT16)0xFCBD) hfa384x.h 1.7.0/1.4.0
8556
 HFA384x_RID_TXPOWERMAXHFA384x_RID_TXPOWERMAX ((UINT16)0xFCBE) hfa384x.h 1.7.0/1.4.0
8557
 HFA384x_RID_CNFLFOENBLEDHFA384x_RID_CNFLFOENBLED ((UINT16)0xFCBF) hfa384x.h 1.6.3
8558
 HFA384x_RID_CAPINFOHFA384x_RID_CAPINFO ((UINT16)0xFCC0) hfa384x.h 1.7.0/1.3.7
8559
 HFA384x_RID_LISTENINTERVALHFA384x_RID_LISTENINTERVAL ((UINT16)0xFCC1) hfa384x.h 1.7.0/1.3.7
8560
 HFA384x_RID_DIVERSITYENABLEDHFA384x_RID_DIVERSITYENABLED ((UINT16)0xFCC2) hfa384x.h 1.7.0/1.3.7
8561
 HFA384x_RID_LED_CONTROLHFA384x_RID_LED_CONTROL ((UINT16)0xFCC4) hfa384x.h 1.7.6
8562
 HFA384x_RID_HFO_DELAYHFA384x_RID_HFO_DELAY ((UINT16)0xFCC5) hfa384x.h 1.7.6
8563
 HFA384x_RID_DISSALOWEDBSSIDHFA384x_RID_DISSALOWEDBSSID ((UINT16)0xFCC6) hfa384x.h 1.8.0
8564
 HFA384x_RID_SCANREQUESTHFA384x_RID_SCANREQUEST ((UINT16)0xFCE1) hfa384x.h 　
8565
 HFA384x_RID_JOINREQUESTHFA384x_RID_JOINREQUEST ((UINT16)0xFCE2) hfa384x.h 　
8566
 HFA384x_RID_AUTHENTICATESTAHFA384x_RID_AUTHENTICATESTA ((UINT16)0xFCE3) hfa384x.h 　
8567
 HFA384x_RID_CHANNELINFOREQUESTHFA384x_RID_CHANNELINFOREQUEST ((UINT16)0xFCE4) hfa384x.h 　
8568
 HFA384x_RID_HOSTSCANHFA384x_RID_HOSTSCAN ((UINT16)0xFCE5) hfa384x.h NEW STA
8569
 HFA384x_RID_ASSOCIATESTAHFA384x_RID_ASSOCIATESTA ((UINT16)0xFCE6) hfa384x.h 　
8570
 HFA384x_RID_CNFWEPDEFAULTKEY_LEHFA384x_RID_CNFWEPDEFAULTKEY_LE ((UINT16)6) hfa384x.h 　
8571
 HFA384x_RID_CNFWEP128DEFAULTKEYHFA384x_RID_CNFWEP128DEFAULTKEY ((UINT16)14) hfa384x.h 　
8572
 HFA384x_RID_CNFPRIOQUSAGE_LENHFA384x_RID_CNFPRIOQUSAGE_LEN ((UINT16)4) hfa384x.h 　
8573
 HFA384x_PDR_PCB_PARTNUMHFA384x_PDR_PCB_PARTNUM ((UINT16)0x0001) hfa384x.h 　
8574
 HFA384x_PDR_PDAVERHFA384x_PDR_PDAVER ((UINT16)0x0002) hfa384x.h 　
8575
 HFA384x_PDR_NIC_SERIALHFA384x_PDR_NIC_SERIAL ((UINT16)0x0003) hfa384x.h 　
8576
 HFA384x_PDR_MKK_MEASUREMENTSHFA384x_PDR_MKK_MEASUREMENTS ((UINT16)0x0004) hfa384x.h 　
8577
 HFA384x_PDR_NIC_RAMSIZEHFA384x_PDR_NIC_RAMSIZE ((UINT16)0x0005) hfa384x.h 　
8578
 HFA384x_PDR_MFISUPRANGEHFA384x_PDR_MFISUPRANGE ((UINT16)0x0006) hfa384x.h 　
8579
 HFA384x_PDR_CFISUPRANGEHFA384x_PDR_CFISUPRANGE ((UINT16)0x0007) hfa384x.h 　
8580
 HFA384x_PDR_NICIDHFA384x_PDR_NICID ((UINT16)0x0008) hfa384x.h 　
8581
 HFA384x_PDR_MAC_ADDRESSHFA384x_PDR_MAC_ADDRESS ((UINT16)0x0101) hfa384x.h 　
8582
 HFA384x_PDR_REGDOMAINHFA384x_PDR_REGDOMAIN ((UINT16)0x0103) hfa384x.h 　
8583
 HFA384x_PDR_ALLOWED_CHANNELHFA384x_PDR_ALLOWED_CHANNEL ((UINT16)0x0104) hfa384x.h 　
8584
 HFA384x_PDR_DEFAULT_CHANNELHFA384x_PDR_DEFAULT_CHANNEL ((UINT16)0x0105) hfa384x.h 　
8585
 HFA384x_PDR_TEMPTYPEHFA384x_PDR_TEMPTYPE ((UINT16)0x0107) hfa384x.h 　
8586
 HFA384x_PDR_IFR_SETTINGHFA384x_PDR_IFR_SETTING ((UINT16)0x0200) hfa384x.h 　
8587
 HFA384x_PDR_RFR_SETTINGHFA384x_PDR_RFR_SETTING ((UINT16)0x0201) hfa384x.h 　
8588
 HFA384x_PDR_HFA3861_BASELINEHFA384x_PDR_HFA3861_BASELINE ((UINT16)0x0202) hfa384x.h 　
8589
 HFA384x_PDR_HFA3861_SHADOWHFA384x_PDR_HFA3861_SHADOW ((UINT16)0x0203) hfa384x.h 　
8590
 HFA384x_PDR_HFA3861_IFRFHFA384x_PDR_HFA3861_IFRF ((UINT16)0x0204) hfa384x.h 　
8591
 HFA384x_PDR_HFA3861_CHCALSPHFA384x_PDR_HFA3861_CHCALSP ((UINT16)0x0300) hfa384x.h 　
8592
 HFA384x_PDR_HFA3861_CHCALIHFA384x_PDR_HFA3861_CHCALI ((UINT16)0x0301) hfa384x.h 　
8593
 HFA384x_PDR_MAX_TX_POWERHFA384x_PDR_MAX_TX_POWER ((UINT16)0x0302) hfa384x.h 　
8594
 HFA384x_PDR_MASTER_CHAN_LISTHFA384x_PDR_MASTER_CHAN_LIST ((UINT16)0x0303) hfa384x.h 　
8595
 HFA384x_PDR_3842_NIC_CONFIGHFA384x_PDR_3842_NIC_CONFIG ((UINT16)0x0400) hfa384x.h 　
8596
 HFA384x_PDR_USB_IDHFA384x_PDR_USB_ID ((UINT16)0x0401) hfa384x.h 　
8597
 HFA384x_PDR_PCI_IDHFA384x_PDR_PCI_ID ((UINT16)0x0402) hfa384x.h 　
8598
 HFA384x_PDR_PCI_IFCONFHFA384x_PDR_PCI_IFCONF ((UINT16)0x0403) hfa384x.h 　
8599
 HFA384x_PDR_PCI_PMCONFHFA384x_PDR_PCI_PMCONF ((UINT16)0x0404) hfa384x.h 　
8600
 HFA384x_PDR_RFENRGYHFA384x_PDR_RFENRGY ((UINT16)0x0406) hfa384x.h 　
8601
 HFA384x_PDR_USB_POWER_TYPEHFA384x_PDR_USB_POWER_TYPE ((UINT16)0x0407) hfa384x.h 　
8602
 HFA384x_PDR_USB_MAX_POWERHFA384x_PDR_USB_MAX_POWER ((UINT16)0x0409) hfa384x.h 　
8603
 HFA384x_PDR_USB_MANUFACTURERHFA384x_PDR_USB_MANUFACTURER ((UINT16)0x0410) hfa384x.h 　
8604
 HFA384x_PDR_USB_PRODUCTHFA384x_PDR_USB_PRODUCT ((UINT16)0x0411) hfa384x.h 　
8605
 HFA384x_PDR_ANT_DIVERSITYHFA384x_PDR_ANT_DIVERSITY ((UINT16)0x0412) hfa384x.h 　
8606
 HFA384x_PDR_HFO_DELAYHFA384x_PDR_HFO_DELAY ((UINT16)0x0413) hfa384x.h 　
8607
 HFA384x_PDR_SCALE_THRESHHFA384x_PDR_SCALE_THRESH ((UINT16)0x0414) hfa384x.h 　
8608
 HFA384x_PDR_HFA3861_MANF_TESTSPHFA384x_PDR_HFA3861_MANF_TESTSP ((UINT16)0x0900) hfa384x.h 　
8609
 HFA384x_PDR_HFA3861_MANF_TESTIHFA384x_PDR_HFA3861_MANF_TESTI ((UINT16)0x0901) hfa384x.h 　
8610
 HFA384x_PDR_END_OF_PDAHFA384x_PDR_END_OF_PDA ((UINT16)0x0000) hfa384x.h 　
8611
 HFA384x_CMDHFA384x_CMD HFA384x_CMD_OFF hfa384x.h 　
8612
 HFA384x_PARAM0HFA384x_PARAM0 HFA384x_PARAM0_OFF hfa384x.h 　
8613
 HFA384x_PARAM1HFA384x_PARAM1 HFA384x_PARAM1_OFF hfa384x.h 　
8614
 HFA384x_PARAM2HFA384x_PARAM2 HFA384x_PARAM2_OFF hfa384x.h 　
8615
 HFA384x_STATUSHFA384x_STATUS HFA384x_STATUS_OFF hfa384x.h 　
8616
 HFA384x_RESP0HFA384x_RESP0 HFA384x_RESP0_OFF hfa384x.h 　
8617
 HFA384x_RESP1HFA384x_RESP1 HFA384x_RESP1_OFF hfa384x.h 　
8618
 HFA384x_RESP2HFA384x_RESP2 HFA384x_RESP2_OFF hfa384x.h 　
8619
 HFA384x_INFOFIDHFA384x_INFOFID HFA384x_INFOFID_OFF hfa384x.h 　
8620
 HFA384x_RXFIDHFA384x_RXFID HFA384x_RXFID_OFF hfa384x.h 　
8621
 HFA384x_ALLOCFIDHFA384x_ALLOCFID HFA384x_ALLOCFID_OFF hfa384x.h 　
8622
 HFA384x_TXCOMPLFIDHFA384x_TXCOMPLFID HFA384x_TXCOMPLFID_OFF hfa384x.h 　
8623
 HFA384x_SELECT0HFA384x_SELECT0 HFA384x_SELECT0_OFF hfa384x.h 　
8624
 HFA384x_OFFSET0HFA384x_OFFSET0 HFA384x_OFFSET0_OFF hfa384x.h 　
8625
 HFA384x_DATA0HFA384x_DATA0 HFA384x_DATA0_OFF hfa384x.h 　
8626
 HFA384x_SELECT1HFA384x_SELECT1 HFA384x_SELECT1_OFF hfa384x.h 　
8627
 HFA384x_OFFSET1HFA384x_OFFSET1 HFA384x_OFFSET1_OFF hfa384x.h 　
8628
 HFA384x_DATA1HFA384x_DATA1 HFA384x_DATA1_OFF hfa384x.h 　
8629
 HFA384x_EVSTATHFA384x_EVSTAT HFA384x_EVSTAT_OFF hfa384x.h 　
8630
 HFA384x_INTENHFA384x_INTEN HFA384x_INTEN_OFF hfa384x.h 　
8631
 HFA384x_EVACKHFA384x_EVACK HFA384x_EVACK_OFF hfa384x.h 　
8632
 HFA384x_CONTROLHFA384x_CONTROL HFA384x_CONTROL_OFF hfa384x.h 　
8633
 HFA384x_SWSUPPORT0HFA384x_SWSUPPORT0 HFA384x_SWSUPPORT0_OFF hfa384x.h 　
8634
 HFA384x_SWSUPPORT1HFA384x_SWSUPPORT1 HFA384x_SWSUPPORT1_OFF hfa384x.h 　
8635
 HFA384x_SWSUPPORT2HFA384x_SWSUPPORT2 HFA384x_SWSUPPORT2_OFF hfa384x.h 　
8636
 HFA384x_AUXPAGEHFA384x_AUXPAGE HFA384x_AUXPAGE_OFF hfa384x.h 　
8637
 HFA384x_AUXOFFSETHFA384x_AUXOFFSET HFA384x_AUXOFFSET_OFF hfa384x.h 　
8638
 HFA384x_AUXDATAHFA384x_AUXDATA HFA384x_AUXDATA_OFF hfa384x.h 　
8639
 HFA384x_PCICORHFA384x_PCICOR HFA384x_PCICOR_OFF hfa384x.h 　
8640
 HFA384x_PCIHCRHFA384x_PCIHCR HFA384x_PCIHCR_OFF hfa384x.h 　
8641
 HFA384x_STATE_PREINITHFA384x_STATE_PREINIT 0 hfa384x.h 　
8642
 HFA384x_STATE_INITHFA384x_STATE_INIT 1 hfa384x.h 　
8643
 HFA384x_STATE_RUNNINGHFA384x_STATE_RUNNING 2 hfa384x.h 　
8644
 HFA384x_HOSTAUTHASSOC_HOSTAUTHHFA384x_HOSTAUTHASSOC_HOSTAUTH BIT0 hfa384x.h 　
8645
 HFA384x_HOSTAUTHASSOC_HOSTASSOCHFA384x_HOSTAUTHASSOC_HOSTASSOC BIT1 hfa384x.h 　
8646
 HFA384x_WHAHANDLING_DISABLEDHFA384x_WHAHANDLING_DISABLED 0 hfa384x.h 　
8647
 HFA384x_WHAHANDLING_PASSTHROUGHHFA384x_WHAHANDLING_PASSTHROUGH BIT1 hfa384x.h 　
8648
 HFA384x_CNFAUTHENTICATION_OPENSHFA384x_CNFAUTHENTICATION_OPENS 0x0001 hfa384x.h 　
8649
 HFA384x_CNFAUTHENTICATION_SHAREHFA384x_CNFAUTHENTICATION_SHARE 0x0002 hfa384x.h 　
8650
 HFA384x_CNFAUTHENTICATION_LEAPHFA384x_CNFAUTHENTICATION_LEAP 0x0004 hfa384x.h 　
8651
 HFA384x_CREATEIBSS_JOINCREATEIBHFA384x_CREATEIBSS_JOINCREATEIB 0 hfa384x.h 　
8652
 HFA384x_CREATEIBSS_JOINESS_JOINHFA384x_CREATEIBSS_JOINESS_JOIN 1 hfa384x.h 　
8653
 HFA384x_CREATEIBSS_JOINIBSSHFA384x_CREATEIBSS_JOINIBSS 2 hfa384x.h 　
8654
 HFA384x_CREATEIBSS_JOINESS_JOINHFA384x_CREATEIBSS_JOINESS_JOIN 3 hfa384x.h 　
8655
 HFA384x_FWID_LENHFA384x_FWID_LEN 14 hfa384x.h 　
8656
 HFA384x_PSTATUS_DISABLEDHFA384x_PSTATUS_DISABLED ((UINT16)1) hfa384x.h 　
8657
 HFA384x_PSTATUS_SEARCHINGHFA384x_PSTATUS_SEARCHING ((UINT16)2) hfa384x.h 　
8658
 HFA384x_PSTATUS_CONN_IBSSHFA384x_PSTATUS_CONN_IBSS ((UINT16)3) hfa384x.h 　
8659
 HFA384x_PSTATUS_CONN_ESSHFA384x_PSTATUS_CONN_ESS ((UINT16)4) hfa384x.h 　
8660
 HFA384x_PSTATUS_OUTOFRANGEHFA384x_PSTATUS_OUTOFRANGE ((UINT16)5) hfa384x.h 　
8661
 HFA384x_PSTATUS_CONN_WDSHFA384x_PSTATUS_CONN_WDS ((UINT16)6) hfa384x.h 　
8662
 HFA384x_TESTRESULT_ALLPASSEDHFA384x_TESTRESULT_ALLPASSED BIT0 hfa384x.h 　
8663
 HFA384x_TESTRESULT_LFO_FAILHFA384x_TESTRESULT_LFO_FAIL BIT1 hfa384x.h 　
8664
 HFA384x_TESTRESULT_VR_HF0_FAILHFA384x_TESTRESULT_VR_HF0_FAIL BIT2 hfa384x.h 　
8665
 HFA384x_HOST_FIRM_COORDINATEHFA384x_HOST_FIRM_COORDINATE BIT7 hfa384x.h 　
8666
 HFA384x_TESTRESULT_COORDINATEHFA384x_TESTRESULT_COORDINATE BIT15 hfa384x.h 　
8667
 HFA384x_FD_STATUS_OFFHFA384x_FD_STATUS_OFF ((UINT16)0x44) hfa384x.h 　
8668
 HFA384x_FD_TIME_OFFHFA384x_FD_TIME_OFF ((UINT16)0x46) hfa384x.h 　
8669
 HFA384x_FD_SWSUPPORT_OFFHFA384x_FD_SWSUPPORT_OFF ((UINT16)0x4A) hfa384x.h 　
8670
 HFA384x_FD_SILENCE_OFFHFA384x_FD_SILENCE_OFF ((UINT16)0x4A) hfa384x.h 　
8671
 HFA384x_FD_SIGNAL_OFFHFA384x_FD_SIGNAL_OFF ((UINT16)0x4B) hfa384x.h 　
8672
 HFA384x_FD_RATE_OFFHFA384x_FD_RATE_OFF ((UINT16)0x4C) hfa384x.h 　
8673
 HFA384x_FD_RXFLOW_OFFHFA384x_FD_RXFLOW_OFF ((UINT16)0x4D) hfa384x.h 　
8674
 HFA384x_FD_RESERVED_OFFHFA384x_FD_RESERVED_OFF ((UINT16)0x4E) hfa384x.h 　
8675
 HFA384x_FD_TXCONTROL_OFFHFA384x_FD_TXCONTROL_OFF ((UINT16)0x50) hfa384x.h 　
8676
 HFA384x_FD_FRAMECONTROL_OFFHFA384x_FD_FRAMECONTROL_OFF ((UINT16)0x52) hfa384x.h 　
8677
 HFA384x_FD_DURATIONID_OFFHFA384x_FD_DURATIONID_OFF ((UINT16)0x54) hfa384x.h 　
8678
 HFA384x_FD_ADDRESS1_OFFHFA384x_FD_ADDRESS1_OFF ((UINT16)0x56) hfa384x.h 　
8679
 HFA384x_FD_ADDRESS2_OFFHFA384x_FD_ADDRESS2_OFF ((UINT16)0x5C) hfa384x.h 　
8680
 HFA384x_FD_ADDRESS3_OFFHFA384x_FD_ADDRESS3_OFF ((UINT16)0x62) hfa384x.h 　
8681
 HFA384x_FD_SEQCONTROL_OFFHFA384x_FD_SEQCONTROL_OFF ((UINT16)0x68) hfa384x.h 　
8682
 HFA384x_FD_ADDRESS4_OFFHFA384x_FD_ADDRESS4_OFF ((UINT16)0x6A) hfa384x.h 　
8683
 HFA384x_FD_DATALEN_OFFHFA384x_FD_DATALEN_OFF ((UINT16)0x70) hfa384x.h 　
8684
 HFA384x_FD_DESTADDRESS_OFFHFA384x_FD_DESTADDRESS_OFF ((UINT16)0x72) hfa384x.h 　
8685
 HFA384x_FD_SRCADDRESS_OFFHFA384x_FD_SRCADDRESS_OFF ((UINT16)0x78) hfa384x.h 　
8686
 HFA384x_FD_DATALENGTH_OFFHFA384x_FD_DATALENGTH_OFF ((UINT16)0x7E) hfa384x.h 　
8687
 HFA384x_TXSTATUS_ACKERRHFA384x_TXSTATUS_ACKERR ((UINT16)BIT5) hfa384x.h 　
8688
 HFA384x_TXSTATUS_FORMERRHFA384x_TXSTATUS_FORMERR ((UINT16)BIT3) hfa384x.h 　
8689
 HFA384x_TXSTATUS_DISCONHFA384x_TXSTATUS_DISCON ((UINT16)BIT2) hfa384x.h 　
8690
 HFA384x_TXSTATUS_AGEDERRHFA384x_TXSTATUS_AGEDERR ((UINT16)BIT1) hfa384x.h 　
8691
 HFA384x_TXSTATUS_RETRYERRHFA384x_TXSTATUS_RETRYERR ((UINT16)BIT0) hfa384x.h 　
8692
 HFA384x_TX_CFPOLLHFA384x_TX_CFPOLL ((UINT16)BIT12) hfa384x.h 　
8693
 HFA384x_TX_PRSTHFA384x_TX_PRST ((UINT16)BIT11) hfa384x.h 　
8694
 HFA384x_TX_MACPORTHFA384x_TX_MACPORT ((UINT16)(BIT10 | BIT9 | BIT8)) hfa384x.h 　
8695
 HFA384x_TX_NOENCRYPTHFA384x_TX_NOENCRYPT ((UINT16)BIT7) hfa384x.h 　
8696
 HFA384x_TX_RETRYSTRATHFA384x_TX_RETRYSTRAT ((UINT16)(BIT6 | BIT5)) hfa384x.h 　
8697
 HFA384x_TX_STRUCTYPEHFA384x_TX_STRUCTYPE ((UINT16)(BIT4 | BIT3)) hfa384x.h 　
8698
 HFA384x_TX_TXEXHFA384x_TX_TXEX ((UINT16)BIT2) hfa384x.h 　
8699
 HFA384x_TX_TXOKHFA384x_TX_TXOK ((UINT16)BIT1) hfa384x.h 　
8700
 HFA384x_RX_DATA_LEN_OFFHFA384x_RX_DATA_LEN_OFF ((UINT16)44) hfa384x.h 　
8701
 HFA384x_RX_80211HDR_OFFHFA384x_RX_80211HDR_OFF ((UINT16)14) hfa384x.h 　
8702
 HFA384x_RX_DATA_OFFHFA384x_RX_DATA_OFF ((UINT16)60) hfa384x.h 　
8703
 HFA384x_RXSTATUS_MSGTYPEHFA384x_RXSTATUS_MSGTYPE ((UINT16)(BIT15 | BIT14 | BIT13)) hfa384x.h 　
8704
 HFA384x_RXSTATUS_MACPORTHFA384x_RXSTATUS_MACPORT ((UINT16)(BIT10 | BIT9 | BIT8)) hfa384x.h 　
8705
 HFA384x_RXSTATUS_UNDECRHFA384x_RXSTATUS_UNDECR ((UINT16)BIT1) hfa384x.h 　
8706
 HFA384x_RXSTATUS_FCSERRHFA384x_RXSTATUS_FCSERR ((UINT16)BIT0) hfa384x.h 　
8707
 HFA384x_IT_HANDOVERADDRHFA384x_IT_HANDOVERADDR ((UINT16)0xF000UL) hfa384x.h 　
8708
 HFA384x_IT_HANDOVERDEAUTHADDRESHFA384x_IT_HANDOVERDEAUTHADDRES ((UINT16)0xF001UL) hfa384x.h AP 1.3.7
8709
 HFA384x_IT_COMMTALLIESHFA384x_IT_COMMTALLIES ((UINT16)0xF100UL) hfa384x.h 　
8710
 HFA384x_IT_SCANRESULTSHFA384x_IT_SCANRESULTS ((UINT16)0xF101UL) hfa384x.h 　
8711
 HFA384x_IT_CHINFORESULTSHFA384x_IT_CHINFORESULTS ((UINT16)0xF102UL) hfa384x.h 　
8712
 HFA384x_IT_HOSTSCANRESULTSHFA384x_IT_HOSTSCANRESULTS ((UINT16)0xF103UL) hfa384x.h 　
8713
 HFA384x_IT_LINKSTATUSHFA384x_IT_LINKSTATUS ((UINT16)0xF200UL) hfa384x.h 　
8714
 HFA384x_IT_ASSOCSTATUSHFA384x_IT_ASSOCSTATUS ((UINT16)0xF201UL) hfa384x.h 　
8715
 HFA384x_IT_AUTHREQHFA384x_IT_AUTHREQ ((UINT16)0xF202UL) hfa384x.h 　
8716
 HFA384x_IT_PSUSERCNTHFA384x_IT_PSUSERCNT ((UINT16)0xF203UL) hfa384x.h 　
8717
 HFA384x_IT_KEYIDCHANGEDHFA384x_IT_KEYIDCHANGED ((UINT16)0xF204UL) hfa384x.h 　
8718
 HFA384x_IT_ASSOCREQHFA384x_IT_ASSOCREQ ((UINT16)0xF205UL) hfa384x.h 　
8719
 HFA384x_IT_MICFAILUREHFA384x_IT_MICFAILURE ((UINT16)0xF206UL) hfa384x.h 　
8720
 HFA384x_CHINFORESULT_BSSACTIVEHFA384x_CHINFORESULT_BSSACTIVE BIT0 hfa384x.h 　
8721
 HFA384x_CHINFORESULT_PCFACTIVEHFA384x_CHINFORESULT_PCFACTIVE BIT1 hfa384x.h 　
8722
 HFA384x_LINK_NOTCONNECTEDHFA384x_LINK_NOTCONNECTED ((UINT16)0) hfa384x.h 　
8723
 HFA384x_LINK_CONNECTEDHFA384x_LINK_CONNECTED ((UINT16)1) hfa384x.h 　
8724
 HFA384x_LINK_DISCONNECTEDHFA384x_LINK_DISCONNECTED ((UINT16)2) hfa384x.h 　
8725
 HFA384x_LINK_AP_CHANGEHFA384x_LINK_AP_CHANGE ((UINT16)3) hfa384x.h 　
8726
 HFA384x_LINK_AP_OUTOFRANGEHFA384x_LINK_AP_OUTOFRANGE ((UINT16)4) hfa384x.h 　
8727
 HFA384x_LINK_AP_INRANGEHFA384x_LINK_AP_INRANGE ((UINT16)5) hfa384x.h 　
8728
 HFA384x_LINK_ASSOCFAILHFA384x_LINK_ASSOCFAIL ((UINT16)6) hfa384x.h 　
8729
 HFA384x_ASSOCSTATUS_STAASSOCHFA384x_ASSOCSTATUS_STAASSOC ((UINT16)1) hfa384x.h 　
8730
 HFA384x_ASSOCSTATUS_REASSOCHFA384x_ASSOCSTATUS_REASSOC ((UINT16)2) hfa384x.h 　
8731
 HFA384x_ASSOCSTATUS_DISASSOCHFA384x_ASSOCSTATUS_DISASSOC ((UINT16)3) hfa384x.h 　
8732
 HFA384x_ASSOCSTATUS_ASSOCFAILHFA384x_ASSOCSTATUS_ASSOCFAIL ((UINT16)4) hfa384x.h 　
8733
 HFA384x_ASSOCSTATUS_AUTHFAILHFA384x_ASSOCSTATUS_AUTHFAIL ((UINT16)5) hfa384x.h 　
8734
 HFA384x_ASSOCREQ_TYPE_ASSOCHFA384x_ASSOCREQ_TYPE_ASSOC 0 hfa384x.h 　
8735
 HFA384x_ASSOCREQ_TYPE_REASSOCHFA384x_ASSOCREQ_TYPE_REASSOC 1 hfa384x.h 　
8736
 HFA384x_USB_ENBULKINHFA384x_USB_ENBULKIN 6 hfa384x.h 　
8737
 HFA384x_USB_TXFRMHFA384x_USB_TXFRM 0 hfa384x.h 　
8738
 HFA384x_USB_CMDREQHFA384x_USB_CMDREQ 1 hfa384x.h 　
8739
 HFA384x_USB_WRIDREQHFA384x_USB_WRIDREQ 2 hfa384x.h 　
8740
 HFA384x_USB_RRIDREQHFA384x_USB_RRIDREQ 3 hfa384x.h 　
8741
 HFA384x_USB_WMEMREQHFA384x_USB_WMEMREQ 4 hfa384x.h 　
8742
 HFA384x_USB_RMEMREQHFA384x_USB_RMEMREQ 5 hfa384x.h 　
8743
 HFA384x_USB_INFOFRMHFA384x_USB_INFOFRM 0x8000 hfa384x.h 　
8744
 HFA384x_USB_CMDRESPHFA384x_USB_CMDRESP 0x8001 hfa384x.h 　
8745
 HFA384x_USB_WRIDRESPHFA384x_USB_WRIDRESP 0x8002 hfa384x.h 　
8746
 HFA384x_USB_RRIDRESPHFA384x_USB_RRIDRESP 0x8003 hfa384x.h 　
8747
 HFA384x_USB_WMEMRESPHFA384x_USB_WMEMRESP 0x8004 hfa384x.h 　
8748
 HFA384x_USB_RMEMRESPHFA384x_USB_RMEMRESP 0x8005 hfa384x.h 　
8749
 HFA384x_USB_BUFAVAILHFA384x_USB_BUFAVAIL 0x8006 hfa384x.h 　
8750
 HFA384x_USB_ERRORHFA384x_USB_ERROR 0x8007 hfa384x.h 　
8751
 MAX_PRISM2_GRP_ADDRMAX_PRISM2_GRP_ADDR 16 hfa384x.h 　
8752
 MAX_GRP_ADDRMAX_GRP_ADDR 32 hfa384x.h 　
8753
 WLAN_COMMENT_MAXWLAN_COMMENT_MAX 80 hfa384x.h Max. length of user comment string.
8754
 MM_SAT_PCFMM_SAT_PCF (BIT14) hfa384x.h 　
8755
 MM_GCSD_PCFMM_GCSD_PCF (BIT15) hfa384x.h 　
8756
 MM_GCSD_PCF_EBMM_GCSD_PCF_EB (BIT14 | BIT15) hfa384x.h 　
8757
 WLAN_STATE_STOPPEDWLAN_STATE_STOPPED 0 hfa384x.h Network is not active.
8758
 WLAN_STATE_STARTEDWLAN_STATE_STARTED 1 hfa384x.h Network has been started.
8759
 WLAN_AUTH_MAXWLAN_AUTH_MAX 60 hfa384x.h Max. # of authenticated stations.
8760
 WLAN_ACCESS_MAXWLAN_ACCESS_MAX 60 hfa384x.h Max. # of stations in an access list.
8761
 WLAN_ACCESS_NONEWLAN_ACCESS_NONE 0 hfa384x.h No stations may be authenticated.
8762
 WLAN_ACCESS_ALLWLAN_ACCESS_ALL 1 hfa384x.h All stations may be authenticated.
8763
 WLAN_ACCESS_ALLOWWLAN_ACCESS_ALLOW 2 hfa384x.h Authenticate only "allowed" stations.
8764
 WLAN_ACCESS_DENYWLAN_ACCESS_DENY 3 hfa384x.h Do not authenticate "denied" stations.
8765
 hfa384x_getreghfa384x_getreg __hfa384x_getreg_noswap hfa384x.h 　
8766
 hfa384x_setreghfa384x_setreg __hfa384x_setreg_noswap hfa384x.h 　
8767
 hfa384x_getreg_noswaphfa384x_getreg_noswap __hfa384x_getreg hfa384x.h 　
8768
 hfa384x_setreg_noswaphfa384x_setreg_noswap __hfa384x_setreg hfa384x.h 　
8769
 hfa384x_getreghfa384x_getreg __hfa384x_getreg hfa384x.h 　
8770
 hfa384x_setreghfa384x_setreg __hfa384x_setreg hfa384x.h 　
8771
 hfa384x_getreg_noswaphfa384x_getreg_noswap __hfa384x_getreg_noswap hfa384x.h 　
8772
 hfa384x_setreg_noswaphfa384x_setreg_noswap __hfa384x_setreg_noswap hfa384x.h 　
8773
 MTNIC_MAX_PORTSMTNIC_MAX_PORTS 2 mtnic.h 　
8774
 MTNIC_PORT1MTNIC_PORT1 0 mtnic.h 　
8775
 MTNIC_PORT2MTNIC_PORT2 1 mtnic.h 　
8776
 NUM_TX_RINGSNUM_TX_RINGS 1 mtnic.h 　
8777
 NUM_RX_RINGSNUM_RX_RINGS 1 mtnic.h 　
8778
 NUM_CQSNUM_CQS (NUM_RX_RINGS + NUM_TX_RINGS) mtnic.h 　
8779
 GO_BIT_TIMEOUTGO_BIT_TIMEOUT 6000 mtnic.h 　
8780
 TBIT_RETRIESTBIT_RETRIES 100 mtnic.h 　
8781
 UNITS_BUFFER_SIZEUNITS_BUFFER_SIZE 8 mtnic.h can be configured to 4/8/16
8782
 MAX_GAP_PROD_CONSMAX_GAP_PROD_CONS ( UNITS_BUFFER_SIZE / 4 ) mtnic.h 　
8783
 ETH_DEF_LENETH_DEF_LEN 1540 mtnic.h 40 bytes used by the card
8784
 ETH_FCS_LENETH_FCS_LEN 14 mtnic.h 　
8785
 DEF_MTUDEF_MTU ETH_DEF_LEN + ETH_FCS_LEN mtnic.h 　
8786
 DEF_IOBUF_SIZEDEF_IOBUF_SIZE ETH_DEF_LEN mtnic.h 　
8787
 MAC_ADDRESS_SIZEMAC_ADDRESS_SIZE 6 mtnic.h 　
8788
 NUM_EQESNUM_EQES 16 mtnic.h 　
8789
 ROUND_TO_CHECKROUND_TO_CHECK 0x400 mtnic.h 　
8790
 DELAY_LINK_CHECKDELAY_LINK_CHECK 300 mtnic.h 　
8791
 CHECK_LINK_TIMESCHECK_LINK_TIMES 7 mtnic.h 　
8792
 dma_addr_tdma_addr_t unsigned long mtnic.h 　
8793
 PAGE_SIZEPAGE_SIZE 4096 mtnic.h 　
8794
 PAGE_MASKPAGE_MASK (PAGE_SIZE - 1) mtnic.h 　
8795
 MTNIC_MAILBOX_SIZEMTNIC_MAILBOX_SIZE PAGE_SIZE mtnic.h 　
8796
 MTNIC_RESET_OFFSETMTNIC_RESET_OFFSET 0xF0010 mtnic.h 　
8797
 NATSEMI_HW_TIMEOUTNATSEMI_HW_TIMEOUT 400 natsemi.h 　
8798
 TX_RING_SIZETX_RING_SIZE 4 natsemi.h 　
8799
 NUM_RX_DESCNUM_RX_DESC 4 natsemi.h 　
8800
 RX_BUF_SIZERX_BUF_SIZE 1536 natsemi.h 　
8801
 OWNOWN 0x80000000 natsemi.h 　
8802
 DSIZEDSIZE 0x00000FFF natsemi.h 　
8803
 CRC_SIZECRC_SIZE 4 natsemi.h 　
8804
 PHYID_AM79C874PHYID_AM79C874 0x0022561b natsemi.h 　
8805
 SRR_DP83815_CSRR_DP83815_C 0x0302 natsemi.h 　
8806
 SRR_DP83815_DSRR_DP83815_D 0x0403 natsemi.h 　
8807
 SRR_DP83816_A4SRR_DP83816_A4 0x0504 natsemi.h 　
8808
 SRR_DP83816_A5SRR_DP83816_A5 0x0505 natsemi.h 　
8809
 PMDCSR_VALPMDCSR_VAL 0x189c natsemi.h enable preferred adaptation circuitry
8810
 TSTDAT_VALTSTDAT_VAL 0x0 natsemi.h 　
8811
 DSPCFG_VALDSPCFG_VAL 0x5040 natsemi.h 　
8812
 SDCFG_VALSDCFG_VAL 0x008c natsemi.h set voltage thresholds for Signal Detect
8813
 DSPCFG_LOCKDSPCFG_LOCK 0x20 natsemi.h coefficient lock bit in DSPCFG
8814
 DSPCFG_COEFDSPCFG_COEF 0x1000 natsemi.h see coefficient (in TSTDAT) bit in DSPCFG
8815
 TSTDAT_FIXEDTSTDAT_FIXED 0xe8 natsemi.h magic number for bad coefficients
8816
 CFG_RESET_SAVECFG_RESET_SAVE 0xfde000 natsemi.h 　
8817
 WCSR_RESET_SAVEWCSR_RESET_SAVE 0x61f natsemi.h 　
8818
 RFCR_RESET_SAVERFCR_RESET_SAVE 0xf8500000; natsemi.h 　
8819
 EE_Write0EE_Write0 (EE_ChipSelect) natsemi.h 　
8820
 EE_Write1EE_Write1 (EE_ChipSelect | EE_DataIn) natsemi.h 　
8821
 EE_CSEE_CS 0x08 natsemi.h EEPROM chip select
8822
 EE_SKEE_SK 0x04 natsemi.h EEPROM shift clock
8823
 EE_DIEE_DI 0x01 natsemi.h Data in
8824
 EE_DOEE_DO 0x02 natsemi.h Data out
8825
 EE_MACEE_MAC 7 natsemi.h 　
8826
 EE_REGEE_REG EECtrl natsemi.h 　
8827
 VENDOR_NONEVENDOR_NONE 0 ns8390.h 　
8828
 VENDOR_WDVENDOR_WD 1 ns8390.h 　
8829
 VENDOR_NOVELLVENDOR_NOVELL 2 ns8390.h 　
8830
 VENDOR_3COMVENDOR_3COM 3 ns8390.h 　
8831
 FLAG_PIOFLAG_PIO 0x01 ns8390.h 　
8832
 FLAG_16BITFLAG_16BIT 0x02 ns8390.h 　
8833
 FLAG_790FLAG_790 0x04 ns8390.h 　
8834
 MEM_8192MEM_8192 32 ns8390.h 　
8835
 MEM_16384MEM_16384 64 ns8390.h 　
8836
 MEM_32768MEM_32768 128 ns8390.h 　
8837
 ISA_MAX_ADDRISA_MAX_ADDR 0x400 ns8390.h 　
8838
 WD_LOW_BASEWD_LOW_BASE 0x200 ns8390.h 　
8839
 WD_HIGH_BASEWD_HIGH_BASE 0x3e0 ns8390.h 　
8840
 WD_DEFAULT_MEMWD_DEFAULT_MEM 0xD0000 ns8390.h 　
8841
 WD_NIC_ADDRWD_NIC_ADDR 0x10 ns8390.h 　
8842
 WD_MSRWD_MSR 0x00 ns8390.h 　
8843
 WD_ICRWD_ICR 0x01 ns8390.h 　
8844
 WD_IARWD_IAR 0x02 ns8390.h 　
8845
 WD_BIOWD_BIO 0x03 ns8390.h 　
8846
 WD_IRRWD_IRR 0x04 ns8390.h 　
8847
 WD_LAARWD_LAAR 0x05 ns8390.h 　
8848
 WD_IJRWD_IJR 0x06 ns8390.h 　
8849
 WD_GP2WD_GP2 0x07 ns8390.h 　
8850
 WD_LARWD_LAR 0x08 ns8390.h 　
8851
 WD_BIDWD_BID 0x0E ns8390.h 　
8852
 WD_ICR_16BITWD_ICR_16BIT 0x01 ns8390.h 　
8853
 WD_MSR_MENBWD_MSR_MENB 0x40 ns8390.h 　
8854
 WD_LAAR_L16ENWD_LAAR_L16EN 0x40 ns8390.h 　
8855
 WD_LAAR_M16ENWD_LAAR_M16EN 0x80 ns8390.h 　
8856
 WD_SOFTCONFIGWD_SOFTCONFIG 0x20 ns8390.h 　
8857
 TYPE_WD8003STYPE_WD8003S 0x02 ns8390.h 　
8858
 TYPE_WD8003ETYPE_WD8003E 0x03 ns8390.h 　
8859
 TYPE_WD8013EBTTYPE_WD8013EBT 0x05 ns8390.h 　
8860
 TYPE_WD8003WTYPE_WD8003W 0x24 ns8390.h 　
8861
 TYPE_WD8003EBTYPE_WD8003EB 0x25 ns8390.h 　
8862
 TYPE_WD8013WTYPE_WD8013W 0x26 ns8390.h 　
8863
 TYPE_WD8013EPTYPE_WD8013EP 0x27 ns8390.h 　
8864
 TYPE_WD8013WCTYPE_WD8013WC 0x28 ns8390.h 　
8865
 TYPE_WD8013EPCTYPE_WD8013EPC 0x29 ns8390.h 　
8866
 TYPE_SMC8216TTYPE_SMC8216T 0x2a ns8390.h 　
8867
 TYPE_SMC8216CTYPE_SMC8216C 0x2b ns8390.h 　
8868
 TYPE_SMC8416TTYPE_SMC8416T 0x00 ns8390.h Bogus entries: the 8416 generates the
8869
 TYPE_SMC8416CTYPE_SMC8416C 0x00 ns8390.h the same codes as the 8216.
8870
 TYPE_SMC8013EBPTYPE_SMC8013EBP 0x2c ns8390.h 　
8871
 _3COM_BASE_3COM_BASE 0x300 ns8390.h 　
8872
 _3COM_TX_PAGE_OFFSET_8BIT_3COM_TX_PAGE_OFFSET_8BIT 0x20 ns8390.h 　
8873
 _3COM_TX_PAGE_OFFSET_16BIT_3COM_TX_PAGE_OFFSET_16BIT 0x0 ns8390.h 　
8874
 _3COM_RX_PAGE_OFFSET_16BIT_3COM_RX_PAGE_OFFSET_16BIT 0x20 ns8390.h 　
8875
 _3COM_ASIC_OFFSET_3COM_ASIC_OFFSET 0x400 ns8390.h 　
8876
 _3COM_NIC_OFFSET_3COM_NIC_OFFSET 0x0 ns8390.h 　
8877
 _3COM_PSTR_3COM_PSTR 0 ns8390.h 　
8878
 _3COM_PSPR_3COM_PSPR 1 ns8390.h 　
8879
 _3COM_BCFR_3COM_BCFR 3 ns8390.h 　
8880
 _3COM_BCFR_2E0_3COM_BCFR_2E0 0x01 ns8390.h 　
8881
 _3COM_BCFR_2A0_3COM_BCFR_2A0 0x02 ns8390.h 　
8882
 _3COM_BCFR_280_3COM_BCFR_280 0x04 ns8390.h 　
8883
 _3COM_BCFR_250_3COM_BCFR_250 0x08 ns8390.h 　
8884
 _3COM_BCFR_350_3COM_BCFR_350 0x10 ns8390.h 　
8885
 _3COM_BCFR_330_3COM_BCFR_330 0x20 ns8390.h 　
8886
 _3COM_BCFR_310_3COM_BCFR_310 0x40 ns8390.h 　
8887
 _3COM_BCFR_300_3COM_BCFR_300 0x80 ns8390.h 　
8888
 _3COM_PCFR_3COM_PCFR 4 ns8390.h 　
8889
 _3COM_PCFR_PIO_3COM_PCFR_PIO 0 ns8390.h 　
8890
 _3COM_PCFR_C8000_3COM_PCFR_C8000 0x10 ns8390.h 　
8891
 _3COM_PCFR_CC000_3COM_PCFR_CC000 0x20 ns8390.h 　
8892
 _3COM_PCFR_D8000_3COM_PCFR_D8000 0x40 ns8390.h 　
8893
 _3COM_PCFR_DC000_3COM_PCFR_DC000 0x80 ns8390.h 　
8894
 _3COM_CR_3COM_CR 6 ns8390.h 　
8895
 _3COM_CR_RST_3COM_CR_RST 0x01 ns8390.h Reset GA and NIC
8896
 _3COM_CR_XSEL_3COM_CR_XSEL 0x02 ns8390.h Transceiver select. BNC=1(def) AUI=0
8897
 _3COM_CR_EALO_3COM_CR_EALO 0x04 ns8390.h window EA PROM 0-15 to I/O base
8898
 _3COM_CR_EAHI_3COM_CR_EAHI 0x08 ns8390.h window EA PROM 16-31 to I/O base
8899
 _3COM_CR_SHARE_3COM_CR_SHARE 0x10 ns8390.h select interrupt sharing option
8900
 _3COM_CR_DBSEL_3COM_CR_DBSEL 0x20 ns8390.h Double buffer select
8901
 _3COM_CR_DDIR_3COM_CR_DDIR 0x40 ns8390.h DMA direction select
8902
 _3COM_CR_START_3COM_CR_START 0x80 ns8390.h Start DMA controller
8903
 _3COM_GACFR_3COM_GACFR 5 ns8390.h 　
8904
 _3COM_GACFR_MBS0_3COM_GACFR_MBS0 0x01 ns8390.h 　
8905
 _3COM_GACFR_MBS1_3COM_GACFR_MBS1 0x02 ns8390.h 　
8906
 _3COM_GACFR_MBS2_3COM_GACFR_MBS2 0x04 ns8390.h 　
8907
 _3COM_GACFR_RSEL_3COM_GACFR_RSEL 0x08 ns8390.h enable shared memory
8908
 _3COM_GACFR_TEST_3COM_GACFR_TEST 0x10 ns8390.h for GA testing
8909
 _3COM_GACFR_OWS_3COM_GACFR_OWS 0x20 ns8390.h select 0WS access to GA
8910
 _3COM_GACFR_TCM_3COM_GACFR_TCM 0x40 ns8390.h Mask DMA interrupts
8911
 _3COM_GACFR_NIM_3COM_GACFR_NIM 0x80 ns8390.h Mask NIC interrupts
8912
 _3COM_STREG_3COM_STREG 7 ns8390.h 　
8913
 _3COM_STREG_REV_3COM_STREG_REV 0x07 ns8390.h GA revision
8914
 _3COM_STREG_DIP_3COM_STREG_DIP 0x08 ns8390.h DMA in progress
8915
 _3COM_STREG_DTC_3COM_STREG_DTC 0x10 ns8390.h DMA terminal count
8916
 _3COM_STREG_OFLW_3COM_STREG_OFLW 0x20 ns8390.h Overflow
8917
 _3COM_STREG_UFLW_3COM_STREG_UFLW 0x40 ns8390.h Underflow
8918
 _3COM_STREG_DPRDY_3COM_STREG_DPRDY 0x80 ns8390.h Data port ready
8919
 _3COM_IDCFR_3COM_IDCFR 8 ns8390.h 　
8920
 _3COM_IDCFR_DRQ0_3COM_IDCFR_DRQ0 0x01 ns8390.h DMA request 1 select
8921
 _3COM_IDCFR_DRQ1_3COM_IDCFR_DRQ1 0x02 ns8390.h DMA request 2 select
8922
 _3COM_IDCFR_DRQ2_3COM_IDCFR_DRQ2 0x04 ns8390.h DMA request 3 select
8923
 _3COM_IDCFR_UNUSED_3COM_IDCFR_UNUSED 0x08 ns8390.h not used
8924
 _3COM_IDCFR_IRQ2_3COM_IDCFR_IRQ2 0x10 ns8390.h Interrupt request 2 select
8925
 _3COM_IDCFR_IRQ3_3COM_IDCFR_IRQ3 0x20 ns8390.h Interrupt request 3 select
8926
 _3COM_IDCFR_IRQ4_3COM_IDCFR_IRQ4 0x40 ns8390.h Interrupt request 4 select
8927
 _3COM_IDCFR_IRQ5_3COM_IDCFR_IRQ5 0x80 ns8390.h Interrupt request 5 select
8928
 _3COM_IRQ2_3COM_IRQ2 2 ns8390.h 　
8929
 _3COM_IRQ3_3COM_IRQ3 3 ns8390.h 　
8930
 _3COM_IRQ4_3COM_IRQ4 4 ns8390.h 　
8931
 _3COM_IRQ5_3COM_IRQ5 5 ns8390.h 　
8932
 _3COM_DAMSB_3COM_DAMSB 9 ns8390.h 　
8933
 _3COM_DALSB_3COM_DALSB 0x0a ns8390.h 　
8934
 _3COM_VPTR2_3COM_VPTR2 0x0b ns8390.h 　
8935
 _3COM_VPTR1_3COM_VPTR1 0x0c ns8390.h 　
8936
 _3COM_VPTR0_3COM_VPTR0 0x0d ns8390.h 　
8937
 _3COM_RFMSB_3COM_RFMSB 0x0e ns8390.h 　
8938
 _3COM_RFLSB_3COM_RFLSB 0x0f ns8390.h 　
8939
 NE_ASIC_OFFSETNE_ASIC_OFFSET 0x10 ns8390.h 　
8940
 NE_RESETNE_RESET 0x0F ns8390.h Used to reset card
8941
 NE_DATANE_DATA 0x00 ns8390.h Used to read/write NIC mem
8942
 COMPEX_RL2000_TRIESCOMPEX_RL2000_TRIES 200 ns8390.h 　
8943
 D8390_P0_COMMANDD8390_P0_COMMAND 0x00 ns8390.h 　
8944
 D8390_P0_PSTARTD8390_P0_PSTART 0x01 ns8390.h 　
8945
 D8390_P0_PSTOPD8390_P0_PSTOP 0x02 ns8390.h 　
8946
 D8390_P0_BOUNDD8390_P0_BOUND 0x03 ns8390.h 　
8947
 D8390_P0_TSRD8390_P0_TSR 0x04 ns8390.h 　
8948
 D8390_P0_TPSRD8390_P0_TPSR 0x04 ns8390.h 　
8949
 D8390_P0_TBCR0D8390_P0_TBCR0 0x05 ns8390.h 　
8950
 D8390_P0_TBCR1D8390_P0_TBCR1 0x06 ns8390.h 　
8951
 D8390_P0_ISRD8390_P0_ISR 0x07 ns8390.h 　
8952
 D8390_P0_RSAR0D8390_P0_RSAR0 0x08 ns8390.h 　
8953
 D8390_P0_RSAR1D8390_P0_RSAR1 0x09 ns8390.h 　
8954
 D8390_P0_RBCR0D8390_P0_RBCR0 0x0A ns8390.h 　
8955
 D8390_P0_RBCR1D8390_P0_RBCR1 0x0B ns8390.h 　
8956
 D8390_P0_RSRD8390_P0_RSR 0x0C ns8390.h 　
8957
 D8390_P0_RCRD8390_P0_RCR 0x0C ns8390.h 　
8958
 D8390_P0_TCRD8390_P0_TCR 0x0D ns8390.h 　
8959
 D8390_P0_DCRD8390_P0_DCR 0x0E ns8390.h 　
8960
 D8390_P0_IMRD8390_P0_IMR 0x0F ns8390.h 　
8961
 D8390_P1_COMMANDD8390_P1_COMMAND 0x00 ns8390.h 　
8962
 D8390_P1_PAR0D8390_P1_PAR0 0x01 ns8390.h 　
8963
 D8390_P1_PAR1D8390_P1_PAR1 0x02 ns8390.h 　
8964
 D8390_P1_PAR2D8390_P1_PAR2 0x03 ns8390.h 　
8965
 D8390_P1_PAR3D8390_P1_PAR3 0x04 ns8390.h 　
8966
 D8390_P1_PAR4D8390_P1_PAR4 0x05 ns8390.h 　
8967
 D8390_P1_PAR5D8390_P1_PAR5 0x06 ns8390.h 　
8968
 D8390_P1_CURRD8390_P1_CURR 0x07 ns8390.h 　
8969
 D8390_P1_MAR0D8390_P1_MAR0 0x08 ns8390.h 　
8970
 D8390_COMMAND_PS0D8390_COMMAND_PS0 0x0 ns8390.h Page 0 select
8971
 D8390_COMMAND_PS1D8390_COMMAND_PS1 0x40 ns8390.h Page 1 select
8972
 D8390_COMMAND_PS2D8390_COMMAND_PS2 0x80 ns8390.h Page 2 select
8973
 D8390_COMMAND_RD2D8390_COMMAND_RD2 0x20 ns8390.h Remote DMA control
8974
 D8390_COMMAND_RD1D8390_COMMAND_RD1 0x10 ns8390.h 　
8975
 D8390_COMMAND_RD0D8390_COMMAND_RD0 0x08 ns8390.h 　
8976
 D8390_COMMAND_TXPD8390_COMMAND_TXP 0x04 ns8390.h transmit packet
8977
 D8390_COMMAND_STAD8390_COMMAND_STA 0x02 ns8390.h start
8978
 D8390_COMMAND_STPD8390_COMMAND_STP 0x01 ns8390.h stop
8979
 D8390_RCR_MOND8390_RCR_MON 0x20 ns8390.h monitor mode
8980
 D8390_DCR_FT1D8390_DCR_FT1 0x40 ns8390.h 　
8981
 D8390_DCR_LSD8390_DCR_LS 0x08 ns8390.h Loopback select
8982
 D8390_DCR_WTSD8390_DCR_WTS 0x01 ns8390.h Word transfer select
8983
 D8390_ISR_PRXD8390_ISR_PRX 0x01 ns8390.h successful recv
8984
 D8390_ISR_PTXD8390_ISR_PTX 0x02 ns8390.h successful xmit
8985
 D8390_ISR_RXED8390_ISR_RXE 0x04 ns8390.h receive error
8986
 D8390_ISR_TXED8390_ISR_TXE 0x08 ns8390.h transmit error
8987
 D8390_ISR_OVWD8390_ISR_OVW 0x10 ns8390.h Overflow
8988
 D8390_ISR_CNTD8390_ISR_CNT 0x20 ns8390.h Counter overflow
8989
 D8390_ISR_RDCD8390_ISR_RDC 0x40 ns8390.h Remote DMA complete
8990
 D8390_ISR_RSTD8390_ISR_RST 0x80 ns8390.h reset
8991
 D8390_RSTAT_PRXD8390_RSTAT_PRX 0x01 ns8390.h successful recv
8992
 D8390_RSTAT_CRCD8390_RSTAT_CRC 0x02 ns8390.h CRC error
8993
 D8390_RSTAT_FAED8390_RSTAT_FAE 0x04 ns8390.h Frame alignment error
8994
 D8390_RSTAT_OVERD8390_RSTAT_OVER 0x08 ns8390.h FIFO overrun
8995
 D8390_TXBUF_SIZED8390_TXBUF_SIZE 6 ns8390.h 　
8996
 D8390_RXBUF_ENDD8390_RXBUF_END 32 ns8390.h 　
8997
 D8390_PAGE_SIZED8390_PAGE_SIZE 256 ns8390.h 　
8998
 WLAN_ADDR_LENWLAN_ADDR_LEN 6 p80211hdr.h 　
8999
 WLAN_CRC_LENWLAN_CRC_LEN 4 p80211hdr.h 　
9000
 WLAN_BSSID_LENWLAN_BSSID_LEN 6 p80211hdr.h 　
9001
 WLAN_BSS_TS_LENWLAN_BSS_TS_LEN 8 p80211hdr.h 　
9002
 WLAN_HDR_A3_LENWLAN_HDR_A3_LEN 24 p80211hdr.h 　
9003
 WLAN_HDR_A4_LENWLAN_HDR_A4_LEN 30 p80211hdr.h 　
9004
 WLAN_SSID_MAXLENWLAN_SSID_MAXLEN 32 p80211hdr.h 　
9005
 WLAN_DATA_MAXLENWLAN_DATA_MAXLEN 2312 p80211hdr.h 　
9006
 WLAN_A3FR_MAXLENWLAN_A3FR_MAXLEN (WLAN_HDR_A3_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN) p80211hdr.h 　
9007
 WLAN_A4FR_MAXLENWLAN_A4FR_MAXLEN (WLAN_HDR_A4_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN) p80211hdr.h 　
9008
 WLAN_BEACON_FR_MAXLENWLAN_BEACON_FR_MAXLEN (WLAN_HDR_A3_LEN + 334) p80211hdr.h 　
9009
 WLAN_ATIM_FR_MAXLENWLAN_ATIM_FR_MAXLEN (WLAN_HDR_A3_LEN + 0) p80211hdr.h 　
9010
 WLAN_DISASSOC_FR_MAXLENWLAN_DISASSOC_FR_MAXLEN (WLAN_HDR_A3_LEN + 2) p80211hdr.h 　
9011
 WLAN_ASSOCREQ_FR_MAXLENWLAN_ASSOCREQ_FR_MAXLEN (WLAN_HDR_A3_LEN + 48) p80211hdr.h 　
9012
 WLAN_ASSOCRESP_FR_MAXLENWLAN_ASSOCRESP_FR_MAXLEN (WLAN_HDR_A3_LEN + 16) p80211hdr.h 　
9013
 WLAN_REASSOCREQ_FR_MAXLENWLAN_REASSOCREQ_FR_MAXLEN (WLAN_HDR_A3_LEN + 54) p80211hdr.h 　
9014
 WLAN_REASSOCRESP_FR_MAXLENWLAN_REASSOCRESP_FR_MAXLEN (WLAN_HDR_A3_LEN + 16) p80211hdr.h 　
9015
 WLAN_PROBEREQ_FR_MAXLENWLAN_PROBEREQ_FR_MAXLEN (WLAN_HDR_A3_LEN + 44) p80211hdr.h 　
9016
 WLAN_PROBERESP_FR_MAXLENWLAN_PROBERESP_FR_MAXLEN (WLAN_HDR_A3_LEN + 78) p80211hdr.h 　
9017
 WLAN_AUTHEN_FR_MAXLENWLAN_AUTHEN_FR_MAXLEN (WLAN_HDR_A3_LEN + 261) p80211hdr.h 　
9018
 WLAN_DEAUTHEN_FR_MAXLENWLAN_DEAUTHEN_FR_MAXLEN (WLAN_HDR_A3_LEN + 2) p80211hdr.h 　
9019
 WLAN_WEP_NKEYSWLAN_WEP_NKEYS 4 p80211hdr.h 　
9020
 WLAN_WEP_MAXKEYLENWLAN_WEP_MAXKEYLEN 13 p80211hdr.h 　
9021
 WLAN_CHALLENGE_IE_LENWLAN_CHALLENGE_IE_LEN 130 p80211hdr.h 　
9022
 WLAN_CHALLENGE_LENWLAN_CHALLENGE_LEN 128 p80211hdr.h 　
9023
 WLAN_WEP_IV_LENWLAN_WEP_IV_LEN 4 p80211hdr.h 　
9024
 WLAN_WEP_ICV_LENWLAN_WEP_ICV_LEN 4 p80211hdr.h 　
9025
 WLAN_FTYPE_MGMTWLAN_FTYPE_MGMT 0x00 p80211hdr.h 　
9026
 WLAN_FTYPE_CTLWLAN_FTYPE_CTL 0x01 p80211hdr.h 　
9027
 WLAN_FTYPE_DATAWLAN_FTYPE_DATA 0x02 p80211hdr.h 　
9028
 WLAN_FSTYPE_ASSOCREQWLAN_FSTYPE_ASSOCREQ 0x00 p80211hdr.h 　
9029
 WLAN_FSTYPE_ASSOCRESPWLAN_FSTYPE_ASSOCRESP 0x01 p80211hdr.h 　
9030
 WLAN_FSTYPE_REASSOCREQWLAN_FSTYPE_REASSOCREQ 0x02 p80211hdr.h 　
9031
 WLAN_FSTYPE_REASSOCRESPWLAN_FSTYPE_REASSOCRESP 0x03 p80211hdr.h 　
9032
 WLAN_FSTYPE_PROBEREQWLAN_FSTYPE_PROBEREQ 0x04 p80211hdr.h 　
9033
 WLAN_FSTYPE_PROBERESPWLAN_FSTYPE_PROBERESP 0x05 p80211hdr.h 　
9034
 WLAN_FSTYPE_BEACONWLAN_FSTYPE_BEACON 0x08 p80211hdr.h 　
9035
 WLAN_FSTYPE_ATIMWLAN_FSTYPE_ATIM 0x09 p80211hdr.h 　
9036
 WLAN_FSTYPE_DISASSOCWLAN_FSTYPE_DISASSOC 0x0a p80211hdr.h 　
9037
 WLAN_FSTYPE_AUTHENWLAN_FSTYPE_AUTHEN 0x0b p80211hdr.h 　
9038
 WLAN_FSTYPE_DEAUTHENWLAN_FSTYPE_DEAUTHEN 0x0c p80211hdr.h 　
9039
 WLAN_FSTYPE_BLOCKACKREQWLAN_FSTYPE_BLOCKACKREQ 0x8 p80211hdr.h 　
9040
 WLAN_FSTYPE_BLOCKACKWLAN_FSTYPE_BLOCKACK 0x9 p80211hdr.h 　
9041
 WLAN_FSTYPE_PSPOLLWLAN_FSTYPE_PSPOLL 0x0a p80211hdr.h 　
9042
 WLAN_FSTYPE_RTSWLAN_FSTYPE_RTS 0x0b p80211hdr.h 　
9043
 WLAN_FSTYPE_CTSWLAN_FSTYPE_CTS 0x0c p80211hdr.h 　
9044
 WLAN_FSTYPE_ACKWLAN_FSTYPE_ACK 0x0d p80211hdr.h 　
9045
 WLAN_FSTYPE_CFENDWLAN_FSTYPE_CFEND 0x0e p80211hdr.h 　
9046
 WLAN_FSTYPE_CFENDCFACKWLAN_FSTYPE_CFENDCFACK 0x0f p80211hdr.h 　
9047
 WLAN_FSTYPE_DATAONLYWLAN_FSTYPE_DATAONLY 0x00 p80211hdr.h 　
9048
 WLAN_FSTYPE_DATA_CFACKWLAN_FSTYPE_DATA_CFACK 0x01 p80211hdr.h 　
9049
 WLAN_FSTYPE_DATA_CFPOLLWLAN_FSTYPE_DATA_CFPOLL 0x02 p80211hdr.h 　
9050
 WLAN_FSTYPE_DATA_CFACK_CFPOLLWLAN_FSTYPE_DATA_CFACK_CFPOLL 0x03 p80211hdr.h 　
9051
 WLAN_FSTYPE_NULLWLAN_FSTYPE_NULL 0x04 p80211hdr.h 　
9052
 WLAN_FSTYPE_CFACKWLAN_FSTYPE_CFACK 0x05 p80211hdr.h 　
9053
 WLAN_FSTYPE_CFPOLLWLAN_FSTYPE_CFPOLL 0x06 p80211hdr.h 　
9054
 WLAN_FSTYPE_CFACK_CFPOLLWLAN_FSTYPE_CFACK_CFPOLL 0x07 p80211hdr.h 　
9055
 WLAN_FCS_LENWLAN_FCS_LEN 4 p80211hdr.h 　
9056
 PNIC_PCI_VENDORPNIC_PCI_VENDOR 0xfefe pnic_api.h Hopefully these won't clash with
9057
 PNIC_PCI_DEVICEPNIC_PCI_DEVICE 0xefef pnic_api.h any real PCI device IDs.
9058
 PNIC_REG_CMDPNIC_REG_CMD 0x00 pnic_api.h Command register, 2 bytes, write only
9059
 PNIC_REG_STATPNIC_REG_STAT 0x00 pnic_api.h Status register, 2 bytes, read only
9060
 PNIC_REG_LENPNIC_REG_LEN 0x02 pnic_api.h Length register, 2 bytes, read-write
9061
 PNIC_REG_DATAPNIC_REG_DATA 0x04 pnic_api.h Data port, 1 byte, read-write
9062
 PNIC_MAX_REGPNIC_MAX_REG 0x04 pnic_api.h 　
9063
 PNIC_CMD_NOOPPNIC_CMD_NOOP 0x0000 pnic_api.h 　
9064
 PNIC_CMD_API_VERPNIC_CMD_API_VER 0x0001 pnic_api.h 　
9065
 PNIC_CMD_READ_MACPNIC_CMD_READ_MAC 0x0002 pnic_api.h 　
9066
 PNIC_CMD_RESETPNIC_CMD_RESET 0x0003 pnic_api.h 　
9067
 PNIC_CMD_XMITPNIC_CMD_XMIT 0x0004 pnic_api.h 　
9068
 PNIC_CMD_RECVPNIC_CMD_RECV 0x0005 pnic_api.h 　
9069
 PNIC_CMD_RECV_QLENPNIC_CMD_RECV_QLEN 0x0006 pnic_api.h 　
9070
 PNIC_CMD_MASK_IRQPNIC_CMD_MASK_IRQ 0x0007 pnic_api.h 　
9071
 PNIC_CMD_FORCE_IRQPNIC_CMD_FORCE_IRQ 0x0008 pnic_api.h 　
9072
 PNIC_STATUS_OKPNIC_STATUS_OK 0x4f4b pnic_api.h 'OK'
9073
 PNIC_STATUS_UNKNOWN_CMDPNIC_STATUS_UNKNOWN_CMD 0x3f3f pnic_api.h '??'
9074
 PNIC_API_VERSIONPNIC_API_VERSION 0x0101 pnic_api.h 1.1
9075
 PCI_EXP_DEVCTLPCI_EXP_DEVCTL 8 r8169.h Device Control
9076
 PCI_EXP_DEVCTL_READRQPCI_EXP_DEVCTL_READRQ 0x7000 r8169.h Max_Read_Request_Size
9077
 PCI_EXP_LNKCTLPCI_EXP_LNKCTL 16 r8169.h Link Control
9078
 PCI_EXP_LNKCTL_CLKREQ_ENPCI_EXP_LNKCTL_CLKREQ_EN 0x100 r8169.h Enable clkreq
9079
 PCI_EXP_DEVCTL_NOSNOOP_ENPCI_EXP_DEVCTL_NOSNOOP_EN 0x0800 r8169.h Enable No Snoop
9080
 SPEED_10SPEED_10 10 r8169.h 　
9081
 SPEED_100SPEED_100 100 r8169.h 　
9082
 SPEED_1000SPEED_1000 1000 r8169.h 　
9083
 SPEED_2500SPEED_2500 2500 r8169.h 　
9084
 SPEED_10000SPEED_10000 10000 r8169.h 　
9085
 DUPLEX_HALFDUPLEX_HALF 0x00 r8169.h 　
9086
 DUPLEX_FULLDUPLEX_FULL 0x01 r8169.h 　
9087
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 r8169.h 　
9088
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 r8169.h 　
9089
 MAC_ADDR_LENMAC_ADDR_LEN 6 r8169.h 　
9090
 MAX_READ_REQUEST_SHIFTMAX_READ_REQUEST_SHIFT 12 r8169.h 　
9091
 RX_FIFO_THRESHRX_FIFO_THRESH 7 r8169.h 7 means NO threshold, Rx buffer level before first PCI xfer.
9092
 RX_DMA_BURSTRX_DMA_BURST 6 r8169.h Maximum PCI burst, '6' is 1024
9093
 TX_DMA_BURSTTX_DMA_BURST 6 r8169.h Maximum PCI burst, '6' is 1024
9094
 EarlyTxThldEarlyTxThld 0x3F r8169.h 0x3F means NO early transmit
9095
 RxPacketMaxSizeRxPacketMaxSize 0x3FE8 r8169.h 16K - 1 - ETH_HLEN - VLAN - CRC...
9096
 SafeMtuSafeMtu 0x1c20 r8169.h ... actually life sucks beyond ~7k
9097
 InterFrameGapInterFrameGap 0x03 r8169.h 3 means InterFrameGap = the shortest one
9098
 R8169_REGS_SIZER8169_REGS_SIZE 256 r8169.h 　
9099
 R8169_NAPI_WEIGHTR8169_NAPI_WEIGHT 64 r8169.h 　
9100
 NUM_TX_DESCNUM_TX_DESC 8 r8169.h Number of Tx descriptor registers
9101
 NUM_RX_DESCNUM_RX_DESC 8 r8169.h Number of Rx descriptor registers
9102
 RX_BUF_SIZERX_BUF_SIZE 1536 r8169.h Rx Buffer size
9103
 R8169_TX_RING_BYTESR8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) r8169.h 　
9104
 R8169_RX_RING_BYTESR8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) r8169.h 　
9105
 TX_RING_ALIGNTX_RING_ALIGN 256 r8169.h 　
9106
 RX_RING_ALIGNRX_RING_ALIGN 256 r8169.h 　
9107
 RTL8169_TX_TIMEOUTRTL8169_TX_TIMEOUT (6*HZ) r8169.h 　
9108
 RTL8169_PHY_TIMEOUTRTL8169_PHY_TIMEOUT (10*HZ) r8169.h 　
9109
 RTL_EEPROM_SIGRTL_EEPROM_SIG cpu_to_le32(0x8129) r8169.h 　
9110
 RTL_EEPROM_SIG_MASKRTL_EEPROM_SIG_MASK cpu_to_le32(0xffff) r8169.h 　
9111
 RTL_EEPROM_SIG_ADDRRTL_EEPROM_SIG_ADDR 0x0000 r8169.h 　
9112
 RsvdMaskRsvdMask 0x3fffc000 r8169.h 　
9113
 PCI_VENDOR_ID_SIPCI_VENDOR_ID_SI 0x1039 sis190.h 　
9114
 PHY_MAX_ADDRPHY_MAX_ADDR 32 sis190.h 　
9115
 PHY_ID_ANYPHY_ID_ANY 0x1f sis190.h 　
9116
 MII_REG_ANYMII_REG_ANY 0x1f sis190.h 　
9117
 DRV_VERSIONDRV_VERSION "1.3" sis190.h 　
9118
 DRV_NAMEDRV_NAME "sis190" sis190.h 　
9119
 SIS190_DRIVER_NAMESIS190_DRIVER_NAME DRV_NAME " Gigabit Ethernet driver " DRV_VERSION sis190.h 　
9120
 PFXPFX DRV_NAME ": " sis190.h 　
9121
 NUM_TX_DESCNUM_TX_DESC 8 sis190.h [8..1024]
9122
 NUM_RX_DESCNUM_RX_DESC 8 sis190.h [8..8192]
9123
 TX_RING_BYTESTX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) sis190.h 　
9124
 RX_RING_BYTESRX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) sis190.h 　
9125
 RX_BUF_SIZERX_BUF_SIZE 1536 sis190.h 　
9126
 RX_BUF_MASKRX_BUF_MASK 0xfff8 sis190.h 　
9127
 RING_ALIGNMENTRING_ALIGNMENT 256 sis190.h 　
9128
 SIS190_REGS_SIZESIS190_REGS_SIZE 0x80 sis190.h 　
9129
 EhnMIIreadEhnMIIread 0x0000 sis190.h 　
9130
 EhnMIIwriteEhnMIIwrite 0x0020 sis190.h 　
9131
 EhnMIIdataShiftEhnMIIdataShift 16 sis190.h 　
9132
 EhnMIIpmdShiftEhnMIIpmdShift 6 sis190.h 7016 only
9133
 EhnMIIregShiftEhnMIIregShift 11 sis190.h 　
9134
 EhnMIIreqEhnMIIreq 0x0010 sis190.h 　
9135
 EhnMIInotDoneEhnMIInotDone 0x0010 sis190.h 　
9136
 SIS900_TOTAL_SIZESIS900_TOTAL_SIZE 0x100 sis900.h 　
9137
 MAX_DMA_RANGEMAX_DMA_RANGE 7 sis900.h actually 0 means MAXIMUM !!
9138
 TxMXDMA_shiftTxMXDMA_shift 20 sis900.h 　
9139
 RxMXDMA_shiftRxMXDMA_shift 20 sis900.h 　
9140
 TX_DMA_BURSTTX_DMA_BURST 0 sis900.h 　
9141
 RX_DMA_BURSTRX_DMA_BURST 0 sis900.h 　
9142
 TX_FILL_THRESHTX_FILL_THRESH 16 sis900.h 1/4 FIFO size
9143
 TxFILLT_shiftTxFILLT_shift 8 sis900.h 　
9144
 TxDRNT_shiftTxDRNT_shift 0 sis900.h 　
9145
 TxDRNT_100TxDRNT_100 48 sis900.h 3/4 FIFO size
9146
 TxDRNT_10TxDRNT_10 16 sis900.h 1/2 FIFO size
9147
 RxDRNT_shiftRxDRNT_shift 1 sis900.h 　
9148
 RxDRNT_100RxDRNT_100 16 sis900.h 1/2 FIFO size
9149
 RxDRNT_10RxDRNT_10 24 sis900.h 3/4 FIFO size
9150
 RFAA_shiftRFAA_shift 28 sis900.h 　
9151
 RFADDR_shiftRFADDR_shift 16 sis900.h 　
9152
 MIIreadMIIread 0x6000 sis900.h 　
9153
 MIIwriteMIIwrite 0x5002 sis900.h 　
9154
 MIIpmdShiftMIIpmdShift 7 sis900.h 　
9155
 MIIregShiftMIIregShift 2 sis900.h 　
9156
 MIIcmdLenMIIcmdLen 16 sis900.h 　
9157
 MIIcmdShiftMIIcmdShift 16 sis900.h 　
9158
 MII_ID1_OUI_LOMII_ID1_OUI_LO 0xFC00 sis900.h low bits of OUI mask
9159
 MII_ID1_MODELMII_ID1_MODEL 0x03F0 sis900.h model number
9160
 MII_ID1_REVMII_ID1_REV 0x000F sis900.h model number
9161
 FDX_CAPABLE_DUPLEX_UNKNOWNFDX_CAPABLE_DUPLEX_UNKNOWN 0 sis900.h 　
9162
 FDX_CAPABLE_HALF_SELECTEDFDX_CAPABLE_HALF_SELECTED 1 sis900.h 　
9163
 FDX_CAPABLE_FULL_SELECTEDFDX_CAPABLE_FULL_SELECTED 2 sis900.h 　
9164
 HW_SPEED_UNCONFIGHW_SPEED_UNCONFIG 0 sis900.h 　
9165
 HW_SPEED_HOMEHW_SPEED_HOME 1 sis900.h 　
9166
 HW_SPEED_10_MBPSHW_SPEED_10_MBPS 10 sis900.h 　
9167
 HW_SPEED_100_MBPSHW_SPEED_100_MBPS 100 sis900.h 　
9168
 HW_SPEED_DEFAULTHW_SPEED_DEFAULT (HW_SPEED_100_MBPS) sis900.h 　
9169
 CRC_SIZECRC_SIZE 4 sis900.h 　
9170
 MAC_HEADER_SIZEMAC_HEADER_SIZE 14 sis900.h 　
9171
 TX_BUF_SIZETX_BUF_SIZE 1536 sis900.h 　
9172
 RX_BUF_SIZERX_BUF_SIZE 1536 sis900.h 　
9173
 NUM_RX_DESCNUM_RX_DESC 4 sis900.h Number of Rx descriptor registers.
9174
 TX_TIMEOUTTX_TIMEOUT (4*TICKS_PER_SEC) sis900.h 　
9175
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 sky2.h 　
9176
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 sky2.h 　
9177
 DUPLEX_HALFDUPLEX_HALF 0x00 sky2.h 　
9178
 DUPLEX_FULLDUPLEX_FULL 0x01 sky2.h 　
9179
 SPEED_10SPEED_10 10 sky2.h 　
9180
 SPEED_100SPEED_100 100 sky2.h 　
9181
 SPEED_1000SPEED_1000 1000 sky2.h 　
9182
 ADVERTISED_10baseT_HalfADVERTISED_10baseT_Half (1 << 0) sky2.h 　
9183
 ADVERTISED_10baseT_FullADVERTISED_10baseT_Full (1 << 1) sky2.h 　
9184
 ADVERTISED_100baseT_HalfADVERTISED_100baseT_Half (1 << 2) sky2.h 　
9185
 ADVERTISED_100baseT_FullADVERTISED_100baseT_Full (1 << 3) sky2.h 　
9186
 ADVERTISED_1000baseT_HalfADVERTISED_1000baseT_Half (1 << 4) sky2.h 　
9187
 ADVERTISED_1000baseT_FullADVERTISED_1000baseT_Full (1 << 5) sky2.h 　
9188
 SUPPORTED_10baseT_HalfSUPPORTED_10baseT_Half (1 << 0) sky2.h 　
9189
 SUPPORTED_10baseT_FullSUPPORTED_10baseT_Full (1 << 1) sky2.h 　
9190
 SUPPORTED_100baseT_HalfSUPPORTED_100baseT_Half (1 << 2) sky2.h 　
9191
 SUPPORTED_100baseT_FullSUPPORTED_100baseT_Full (1 << 3) sky2.h 　
9192
 SUPPORTED_1000baseT_HalfSUPPORTED_1000baseT_Half (1 << 4) sky2.h 　
9193
 SUPPORTED_1000baseT_FullSUPPORTED_1000baseT_Full (1 << 5) sky2.h 　
9194
 SUPPORTED_AutonegSUPPORTED_Autoneg (1 << 6) sky2.h 　
9195
 SUPPORTED_TPSUPPORTED_TP (1 << 7) sky2.h 　
9196
 SUPPORTED_FIBRESUPPORTED_FIBRE (1 << 10) sky2.h 　
9197
 PCI_STATUS_ERROR_BITSPCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \ PCI_STATUS_SIG_SYSTEM_ERROR | \ PCI_STATUS_REC_MASTER_ABORT | \ PCI_STATUS_REC_TARGET_ABORT | \ sky2.h 　
9198
 CFG_DUAL_MAC_MSKCFG_DUAL_MAC_MSK (CFG_LINK_2_AVAIL | CFG_LINK_1_AVAIL) sky2.h 　
9199
 RAM_ADR_RANRAM_ADR_RAN 0x0007ffffL sky2.h Bit 18.. 0: RAM Address Range
9200
 SK_RI_TO_53SK_RI_TO_53 36 sky2.h RAM interface timeout
9201
 TXA_MAX_VALTXA_MAX_VAL 0x00ffffffUL sky2.h Bit 23.. 0: Max TXA Timer/Cnt Val
9202
 RB_MSKRB_MSK 0x0007ffff sky2.h Bit 18.. 0: RAM Buffer Pointer Bits
9203
 PHY_M_PS_PAUSE_MSKPHY_M_PS_PAUSE_MSK (PHY_M_PS_TX_P_EN | PHY_M_PS_RX_P_EN) sky2.h 　
9204
 GM_GPCR_SPEED_1000GM_GPCR_SPEED_1000 (GM_GPCR_GIGS_ENA | GM_GPCR_SPEED_100) sky2.h 　
9205
 GM_GPCR_AU_ALL_DISGM_GPCR_AU_ALL_DIS (GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS|GM_GPCR_AU_SPD_DIS) sky2.h 　
9206
 TX_COL_DEFTX_COL_DEF 0x04 sky2.h 　
9207
 DATA_BLIND_DEFDATA_BLIND_DEF 0x04 sky2.h 　
9208
 IPG_DATA_DEFIPG_DATA_DEF 0x1e sky2.h 　
9209
 GM_PHY_RETRIESGM_PHY_RETRIES 100 sky2.h 　
9210
 BANK_SELECTBANK_SELECT 14 smc9000.h 　
9211
 TCRTCR 0 smc9000.h transmit control register
9212
 TCR_ENABLETCR_ENABLE 0x0001 smc9000.h if this is 1, we can transmit
9213
 TCR_FDUPLXTCR_FDUPLX 0x0800 smc9000.h receive packets sent out
9214
 TCR_STP_SQETTCR_STP_SQET 0x1000 smc9000.h stop transmitting if Signal quality error
9215
 TCR_MON_CNSTCR_MON_CNS 0x0400 smc9000.h monitors the carrier status
9216
 TCR_PAD_ENABLETCR_PAD_ENABLE 0x0080 smc9000.h pads short packets to 64 bytes
9217
 TCR_CLEARTCR_CLEAR 0 smc9000.h do NOTHING
9218
 TCR_NORMALTCR_NORMAL (TCR_ENABLE | TCR_PAD_ENABLE) smc9000.h 　
9219
 EPH_STATUSEPH_STATUS 2 smc9000.h 　
9220
 ES_LINK_OKES_LINK_OK 0x4000 smc9000.h is the link integrity ok ?
9221
 RCRRCR 4 smc9000.h 　
9222
 RCR_SOFTRESETRCR_SOFTRESET 0x8000 smc9000.h resets the chip
9223
 RCR_STRIP_CRCRCR_STRIP_CRC 0x200 smc9000.h strips CRC
9224
 RCR_ENABLERCR_ENABLE 0x100 smc9000.h IFF this is set, we can receive packets
9225
 RCR_ALMULRCR_ALMUL 0x4 smc9000.h receive all multicast packets
9226
 RCR_PROMISCRCR_PROMISC 0x2 smc9000.h enable promiscuous mode
9227
 RCR_NORMALRCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE) smc9000.h 　
9228
 RCR_CLEARRCR_CLEAR 0x0 smc9000.h set it to a base state
9229
 COUNTERCOUNTER 6 smc9000.h 　
9230
 MIRMIR 8 smc9000.h 　
9231
 MCRMCR 10 smc9000.h 　
9232
 RPC_REGRPC_REG 0x000A smc9000.h 　
9233
 RPC_SPEEDRPC_SPEED 0x2000 smc9000.h When 1 PHY is in 100Mbps mode.
9234
 RPC_DPLXRPC_DPLX 0x1000 smc9000.h When 1 PHY is in Full-Duplex Mode
9235
 RPC_ANEGRPC_ANEG 0x0800 smc9000.h When 1 PHY is in Auto-Negotiate Mode
9236
 RPC_LSXA_SHFTRPC_LSXA_SHFT 5 smc9000.h Bits to shift LS2A,LS1A,LS0A to lsb
9237
 RPC_LSXB_SHFTRPC_LSXB_SHFT 2 smc9000.h Bits to get LS2B,LS1B,LS0B to lsb
9238
 RPC_LED_100_10RPC_LED_100_10 (0x00) smc9000.h LED = 100Mbps OR's with 10Mbps link detect
9239
 RPC_LED_RESRPC_LED_RES (0x01) smc9000.h LED = Reserved
9240
 RPC_LED_10RPC_LED_10 (0x02) smc9000.h LED = 10Mbps link detect
9241
 RPC_LED_FDRPC_LED_FD (0x03) smc9000.h LED = Full Duplex Mode
9242
 RPC_LED_TX_RXRPC_LED_TX_RX (0x04) smc9000.h LED = TX or RX packet occurred
9243
 RPC_LED_100RPC_LED_100 (0x05) smc9000.h LED = 100Mbps link dectect
9244
 RPC_LED_TXRPC_LED_TX (0x06) smc9000.h LED = TX packet occurred
9245
 RPC_LED_RXRPC_LED_RX (0x07) smc9000.h LED = RX packet occurred
9246
 RPC_DEFAULTRPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX) smc9000.h 　
9247
 RPC_REGRPC_REG 0x000A smc9000.h 　
9248
 RPC_SPEEDRPC_SPEED 0x2000 smc9000.h When 1 PHY is in 100Mbps mode.
9249
 RPC_DPLXRPC_DPLX 0x1000 smc9000.h When 1 PHY is in Full-Duplex Mode
9250
 RPC_ANEGRPC_ANEG 0x0800 smc9000.h When 1 PHY is in Auto-Negotiate Mode
9251
 RPC_LSXA_SHFTRPC_LSXA_SHFT 5 smc9000.h Bits to shift LS2A,LS1A,LS0A to lsb
9252
 RPC_LSXB_SHFTRPC_LSXB_SHFT 2 smc9000.h Bits to get LS2B,LS1B,LS0B to lsb
9253
 RPC_LED_100_10RPC_LED_100_10 (0x00) smc9000.h LED = 100Mbps OR's with 10Mbps link detect
9254
 RPC_LED_RESRPC_LED_RES (0x01) smc9000.h LED = Reserved
9255
 RPC_LED_10RPC_LED_10 (0x02) smc9000.h LED = 10Mbps link detect
9256
 RPC_LED_FDRPC_LED_FD (0x03) smc9000.h LED = Full Duplex Mode
9257
 RPC_LED_TX_RXRPC_LED_TX_RX (0x04) smc9000.h LED = TX or RX packet occurred
9258
 RPC_LED_100RPC_LED_100 (0x05) smc9000.h LED = 100Mbps link dectect
9259
 RPC_LED_TXRPC_LED_TX (0x06) smc9000.h LED = TX packet occurred
9260
 RPC_LED_RXRPC_LED_RX (0x07) smc9000.h LED = RX packet occurred
9261
 RPC_DEFAULTRPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX) smc9000.h 　
9262
 CONFIGCONFIG 0 smc9000.h 　
9263
 CFG_AUI_SELECTCFG_AUI_SELECT 0x100 smc9000.h 　
9264
 BASEBASE 2 smc9000.h 　
9265
 ADDR0ADDR0 4 smc9000.h 　
9266
 ADDR1ADDR1 6 smc9000.h 　
9267
 ADDR2ADDR2 8 smc9000.h 　
9268
 GENERALGENERAL 10 smc9000.h 　
9269
 CONTROLCONTROL 12 smc9000.h 　
9270
 CTL_POWERDOWNCTL_POWERDOWN 0x2000 smc9000.h 　
9271
 CTL_LE_ENABLECTL_LE_ENABLE 0x80 smc9000.h 　
9272
 CTL_CR_ENABLECTL_CR_ENABLE 0x40 smc9000.h 　
9273
 CTL_TE_ENABLECTL_TE_ENABLE 0x0020 smc9000.h 　
9274
 CTL_AUTO_RELEASECTL_AUTO_RELEASE 0x0800 smc9000.h 　
9275
 CTL_EPROM_ACCESSCTL_EPROM_ACCESS 0x0003 smc9000.h high if Eprom is being read
9276
 MMU_CMDMMU_CMD 0 smc9000.h 　
9277
 MC_BUSYMC_BUSY 1 smc9000.h only readable bit in the register
9278
 MC_NOPMC_NOP 0 smc9000.h 　
9279
 MC_ALLOCMC_ALLOC 0x20 smc9000.h or with number of 256 byte packets
9280
 MC_RESETMC_RESET 0x40 smc9000.h 　
9281
 MC_REMOVEMC_REMOVE 0x60 smc9000.h remove the current rx packet
9282
 MC_RELEASEMC_RELEASE 0x80 smc9000.h remove and release the current rx packet
9283
 MC_FREEPKTMC_FREEPKT 0xA0 smc9000.h Release packet in PNR register
9284
 MC_ENQUEUEMC_ENQUEUE 0xC0 smc9000.h Enqueue the packet for transmit
9285
 PNR_ARRPNR_ARR 2 smc9000.h 　
9286
 FIFO_PORTSFIFO_PORTS 4 smc9000.h 　
9287
 FP_RXEMPTYFP_RXEMPTY 0x8000 smc9000.h 　
9288
 FP_TXEMPTYFP_TXEMPTY 0x80 smc9000.h 　
9289
 POINTERPOINTER 6 smc9000.h 　
9290
 PTR_READPTR_READ 0x2000 smc9000.h 　
9291
 PTR_RCVPTR_RCV 0x8000 smc9000.h 　
9292
 PTR_AUTOINCPTR_AUTOINC 0x4000 smc9000.h 　
9293
 PTR_AUTO_INCPTR_AUTO_INC 0x0040 smc9000.h 　
9294
 DATA_1DATA_1 8 smc9000.h 　
9295
 DATA_2DATA_2 10 smc9000.h 　
9296
 INTERRUPTINTERRUPT 12 smc9000.h 　
9297
 INT_MASKINT_MASK 13 smc9000.h 　
9298
 IM_RCV_INTIM_RCV_INT 0x1 smc9000.h 　
9299
 IM_TX_INTIM_TX_INT 0x2 smc9000.h 　
9300
 IM_TX_EMPTY_INTIM_TX_EMPTY_INT 0x4 smc9000.h 　
9301
 IM_ALLOC_INTIM_ALLOC_INT 0x8 smc9000.h 　
9302
 IM_RX_OVRN_INTIM_RX_OVRN_INT 0x10 smc9000.h 　
9303
 IM_EPH_INTIM_EPH_INT 0x20 smc9000.h 　
9304
 IM_ERCV_INTIM_ERCV_INT 0x40 smc9000.h not on SMC9192
9305
 MULTICAST1MULTICAST1 0 smc9000.h 　
9306
 MULTICAST2MULTICAST2 2 smc9000.h 　
9307
 MULTICAST3MULTICAST3 4 smc9000.h 　
9308
 MULTICAST4MULTICAST4 6 smc9000.h 　
9309
 MGMTMGMT 8 smc9000.h 　
9310
 REVISIONREVISION 10 smc9000.h ( hi: chip id low: rev # )
9311
 MII_REGMII_REG 0x0008 smc9000.h 　
9312
 MII_MSK_CRS100MII_MSK_CRS100 0x4000 smc9000.h Disables CRS100 detection during tx half dup
9313
 MII_MDOEMII_MDOE 0x0008 smc9000.h MII Output Enable
9314
 MII_MCLKMII_MCLK 0x0004 smc9000.h MII Clock, pin MDCLK
9315
 MII_MDIMII_MDI 0x0002 smc9000.h MII Input, pin MDI
9316
 MII_MDOMII_MDO 0x0001 smc9000.h MII Output, pin MDO
9317
 ERCVERCV 12 smc9000.h 　
9318
 CHIP_9190CHIP_9190 3 smc9000.h 　
9319
 CHIP_9194CHIP_9194 4 smc9000.h 　
9320
 CHIP_9195CHIP_9195 5 smc9000.h 　
9321
 CHIP_9196CHIP_9196 4 smc9000.h 　
9322
 CHIP_91100CHIP_91100 7 smc9000.h 　
9323
 CHIP_91100FDCHIP_91100FD 8 smc9000.h 　
9324
 REV_9196REV_9196 6 smc9000.h 　
9325
 TS_SUCCESSTS_SUCCESS 0x0001 smc9000.h 　
9326
 TS_LOSTCARTS_LOSTCAR 0x0400 smc9000.h 　
9327
 TS_LATCOLTS_LATCOL 0x0200 smc9000.h 　
9328
 TS_16COLTS_16COL 0x0010 smc9000.h 　
9329
 RS_ALGNERRRS_ALGNERR 0x8000 smc9000.h 　
9330
 RS_BADCRCRS_BADCRC 0x2000 smc9000.h 　
9331
 RS_ODDFRAMERS_ODDFRAME 0x1000 smc9000.h 　
9332
 RS_TOOLONGRS_TOOLONG 0x0800 smc9000.h 　
9333
 RS_TOOSHORTRS_TOOSHORT 0x0400 smc9000.h 　
9334
 RS_MULTICASTRS_MULTICAST 0x0001 smc9000.h 　
9335
 RS_ERRORSRS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT) smc9000.h 　
9336
 PHY_CNTL_REGPHY_CNTL_REG 0x00 smc9000.h 　
9337
 PHY_CNTL_RSTPHY_CNTL_RST 0x8000 smc9000.h 1=PHY Reset
9338
 PHY_CNTL_LPBKPHY_CNTL_LPBK 0x4000 smc9000.h 1=PHY Loopback
9339
 PHY_CNTL_SPEEDPHY_CNTL_SPEED 0x2000 smc9000.h 1=100Mbps, 0=10Mpbs
9340
 PHY_CNTL_ANEG_ENPHY_CNTL_ANEG_EN 0x1000 smc9000.h 1=Enable Auto negotiation
9341
 PHY_CNTL_PDNPHY_CNTL_PDN 0x0800 smc9000.h 1=PHY Power Down mode
9342
 PHY_CNTL_MII_DISPHY_CNTL_MII_DIS 0x0400 smc9000.h 1=MII 4 bit interface disabled
9343
 PHY_CNTL_ANEG_RSTPHY_CNTL_ANEG_RST 0x0200 smc9000.h 1=Reset Auto negotiate
9344
 PHY_CNTL_DPLXPHY_CNTL_DPLX 0x0100 smc9000.h 1=Full Duplex, 0=Half Duplex
9345
 PHY_CNTL_COLTSTPHY_CNTL_COLTST 0x0080 smc9000.h 1= MII Colision Test
9346
 PHY_STAT_REGPHY_STAT_REG 0x01 smc9000.h 　
9347
 PHY_STAT_CAP_T4PHY_STAT_CAP_T4 0x8000 smc9000.h 1=100Base-T4 capable
9348
 PHY_STAT_CAP_TXFPHY_STAT_CAP_TXF 0x4000 smc9000.h 1=100Base-X full duplex capable
9349
 PHY_STAT_CAP_TXHPHY_STAT_CAP_TXH 0x2000 smc9000.h 1=100Base-X half duplex capable
9350
 PHY_STAT_CAP_TFPHY_STAT_CAP_TF 0x1000 smc9000.h 1=10Mbps full duplex capable
9351
 PHY_STAT_CAP_THPHY_STAT_CAP_TH 0x0800 smc9000.h 1=10Mbps half duplex capable
9352
 PHY_STAT_CAP_SUPRPHY_STAT_CAP_SUPR 0x0040 smc9000.h 1=recv mgmt frames with not preamble
9353
 PHY_STAT_ANEG_ACKPHY_STAT_ANEG_ACK 0x0020 smc9000.h 1=ANEG has completed
9354
 PHY_STAT_REM_FLTPHY_STAT_REM_FLT 0x0010 smc9000.h 1=Remote Fault detected
9355
 PHY_STAT_CAP_ANEGPHY_STAT_CAP_ANEG 0x0008 smc9000.h 1=Auto negotiate capable
9356
 PHY_STAT_LINKPHY_STAT_LINK 0x0004 smc9000.h 1=valid link
9357
 PHY_STAT_JABPHY_STAT_JAB 0x0002 smc9000.h 1=10Mbps jabber condition
9358
 PHY_STAT_EXREGPHY_STAT_EXREG 0x0001 smc9000.h 1=extended registers implemented
9359
 PHY_ID1_REGPHY_ID1_REG 0x02 smc9000.h PHY Identifier 1
9360
 PHY_ID2_REGPHY_ID2_REG 0x03 smc9000.h PHY Identifier 2
9361
 PHY_AD_REGPHY_AD_REG 0x04 smc9000.h 　
9362
 PHY_AD_NPPHY_AD_NP 0x8000 smc9000.h 1=PHY requests exchange of Next Page
9363
 PHY_AD_ACKPHY_AD_ACK 0x4000 smc9000.h 1=got link code word from remote
9364
 PHY_AD_RFPHY_AD_RF 0x2000 smc9000.h 1=advertise remote fault
9365
 PHY_AD_T4PHY_AD_T4 0x0200 smc9000.h 1=PHY is capable of 100Base-T4
9366
 PHY_AD_TX_FDXPHY_AD_TX_FDX 0x0100 smc9000.h 1=PHY is capable of 100Base-TX FDPLX
9367
 PHY_AD_TX_HDXPHY_AD_TX_HDX 0x0080 smc9000.h 1=PHY is capable of 100Base-TX HDPLX
9368
 PHY_AD_10_FDXPHY_AD_10_FDX 0x0040 smc9000.h 1=PHY is capable of 10Base-T FDPLX
9369
 PHY_AD_10_HDXPHY_AD_10_HDX 0x0020 smc9000.h 1=PHY is capable of 10Base-T HDPLX
9370
 PHY_AD_CSMAPHY_AD_CSMA 0x0001 smc9000.h 1=PHY is capable of 802.3 CMSA
9371
 PHY_RMT_REGPHY_RMT_REG 0x05 smc9000.h 　
9372
 PHY_CFG1_REGPHY_CFG1_REG 0x10 smc9000.h 　
9373
 PHY_CFG1_LNKDISPHY_CFG1_LNKDIS 0x8000 smc9000.h 1=Rx Link Detect Function disabled
9374
 PHY_CFG1_XMTDISPHY_CFG1_XMTDIS 0x4000 smc9000.h 1=TP Transmitter Disabled
9375
 PHY_CFG1_XMTPDNPHY_CFG1_XMTPDN 0x2000 smc9000.h 1=TP Transmitter Powered Down
9376
 PHY_CFG1_BYPSCRPHY_CFG1_BYPSCR 0x0400 smc9000.h 1=Bypass scrambler/descrambler
9377
 PHY_CFG1_UNSCDSPHY_CFG1_UNSCDS 0x0200 smc9000.h 1=Unscramble Idle Reception Disable
9378
 PHY_CFG1_EQLZRPHY_CFG1_EQLZR 0x0100 smc9000.h 1=Rx Equalizer Disabled
9379
 PHY_CFG1_CABLEPHY_CFG1_CABLE 0x0080 smc9000.h 1=STP(150ohm), 0=UTP(100ohm)
9380
 PHY_CFG1_RLVL0PHY_CFG1_RLVL0 0x0040 smc9000.h 1=Rx Squelch level reduced by 4.5db
9381
 PHY_CFG1_TLVL_SHIFTPHY_CFG1_TLVL_SHIFT 2 smc9000.h Transmit Output Level Adjust
9382
 PHY_CFG1_TLVL_MASKPHY_CFG1_TLVL_MASK 0x003C smc9000.h 　
9383
 PHY_CFG1_TRF_MASKPHY_CFG1_TRF_MASK 0x0003 smc9000.h Transmitter Rise/Fall time
9384
 PHY_CFG2_REGPHY_CFG2_REG 0x11 smc9000.h 　
9385
 PHY_CFG2_APOLDISPHY_CFG2_APOLDIS 0x0020 smc9000.h 1=Auto Polarity Correction disabled
9386
 PHY_CFG2_JABDISPHY_CFG2_JABDIS 0x0010 smc9000.h 1=Jabber disabled
9387
 PHY_CFG2_MREGPHY_CFG2_MREG 0x0008 smc9000.h 1=Multiple register access (MII mgt)
9388
 PHY_CFG2_INTMDIOPHY_CFG2_INTMDIO 0x0004 smc9000.h 1=Interrupt signaled with MDIO pulseo
9389
 PHY_INT_REGPHY_INT_REG 0x12 smc9000.h Status Output (Interrupt Status)
9390
 PHY_INT_INTPHY_INT_INT 0x8000 smc9000.h 1=bits have changed since last read
9391
 PHY_INT_LNKFAILPHY_INT_LNKFAIL 0x4000 smc9000.h 1=Link Not detected
9392
 PHY_INT_LOSSSYNCPHY_INT_LOSSSYNC 0x2000 smc9000.h 1=Descrambler has lost sync
9393
 PHY_INT_CWRDPHY_INT_CWRD 0x1000 smc9000.h 1=Invalid 4B5B code detected on rx
9394
 PHY_INT_SSDPHY_INT_SSD 0x0800 smc9000.h 1=No Start Of Stream detected on rx
9395
 PHY_INT_ESDPHY_INT_ESD 0x0400 smc9000.h 1=No End Of Stream detected on rx
9396
 PHY_INT_RPOLPHY_INT_RPOL 0x0200 smc9000.h 1=Reverse Polarity detected
9397
 PHY_INT_JABPHY_INT_JAB 0x0100 smc9000.h 1=Jabber detected
9398
 PHY_INT_SPDDETPHY_INT_SPDDET 0x0080 smc9000.h 1=100Base-TX mode, 0=10Base-T mode
9399
 PHY_INT_DPLXDETPHY_INT_DPLXDET 0x0040 smc9000.h 1=Device in Full Duplex
9400
 PHY_MASK_REGPHY_MASK_REG 0x13 smc9000.h Interrupt Mask
9401
 PHY_CNTL_REGPHY_CNTL_REG 0x00 smc9000.h 　
9402
 PHY_CNTL_RSTPHY_CNTL_RST 0x8000 smc9000.h 1=PHY Reset
9403
 PHY_CNTL_LPBKPHY_CNTL_LPBK 0x4000 smc9000.h 1=PHY Loopback
9404
 PHY_CNTL_SPEEDPHY_CNTL_SPEED 0x2000 smc9000.h 1=100Mbps, 0=10Mpbs
9405
 PHY_CNTL_ANEG_ENPHY_CNTL_ANEG_EN 0x1000 smc9000.h 1=Enable Auto negotiation
9406
 PHY_CNTL_PDNPHY_CNTL_PDN 0x0800 smc9000.h 1=PHY Power Down mode
9407
 PHY_CNTL_MII_DISPHY_CNTL_MII_DIS 0x0400 smc9000.h 1=MII 4 bit interface disabled
9408
 PHY_CNTL_ANEG_RSTPHY_CNTL_ANEG_RST 0x0200 smc9000.h 1=Reset Auto negotiate
9409
 PHY_CNTL_DPLXPHY_CNTL_DPLX 0x0100 smc9000.h 1=Full Duplex, 0=Half Duplex
9410
 PHY_CNTL_COLTSTPHY_CNTL_COLTST 0x0080 smc9000.h 1= MII Colision Test
9411
 PHY_STAT_REGPHY_STAT_REG 0x01 smc9000.h 　
9412
 PHY_STAT_CAP_T4PHY_STAT_CAP_T4 0x8000 smc9000.h 1=100Base-T4 capable
9413
 PHY_STAT_CAP_TXFPHY_STAT_CAP_TXF 0x4000 smc9000.h 1=100Base-X full duplex capable
9414
 PHY_STAT_CAP_TXHPHY_STAT_CAP_TXH 0x2000 smc9000.h 1=100Base-X half duplex capable
9415
 PHY_STAT_CAP_TFPHY_STAT_CAP_TF 0x1000 smc9000.h 1=10Mbps full duplex capable
9416
 PHY_STAT_CAP_THPHY_STAT_CAP_TH 0x0800 smc9000.h 1=10Mbps half duplex capable
9417
 PHY_STAT_CAP_SUPRPHY_STAT_CAP_SUPR 0x0040 smc9000.h 1=recv mgmt frames with not preamble
9418
 PHY_STAT_ANEG_ACKPHY_STAT_ANEG_ACK 0x0020 smc9000.h 1=ANEG has completed
9419
 PHY_STAT_REM_FLTPHY_STAT_REM_FLT 0x0010 smc9000.h 1=Remote Fault detected
9420
 PHY_STAT_CAP_ANEGPHY_STAT_CAP_ANEG 0x0008 smc9000.h 1=Auto negotiate capable
9421
 PHY_STAT_LINKPHY_STAT_LINK 0x0004 smc9000.h 1=valid link
9422
 PHY_STAT_JABPHY_STAT_JAB 0x0002 smc9000.h 1=10Mbps jabber condition
9423
 PHY_STAT_EXREGPHY_STAT_EXREG 0x0001 smc9000.h 1=extended registers implemented
9424
 PHY_ID1_REGPHY_ID1_REG 0x02 smc9000.h PHY Identifier 1
9425
 PHY_ID2_REGPHY_ID2_REG 0x03 smc9000.h PHY Identifier 2
9426
 PHY_AD_REGPHY_AD_REG 0x04 smc9000.h 　
9427
 PHY_AD_NPPHY_AD_NP 0x8000 smc9000.h 1=PHY requests exchange of Next Page
9428
 PHY_AD_ACKPHY_AD_ACK 0x4000 smc9000.h 1=got link code word from remote
9429
 PHY_AD_RFPHY_AD_RF 0x2000 smc9000.h 1=advertise remote fault
9430
 PHY_AD_T4PHY_AD_T4 0x0200 smc9000.h 1=PHY is capable of 100Base-T4
9431
 PHY_AD_TX_FDXPHY_AD_TX_FDX 0x0100 smc9000.h 1=PHY is capable of 100Base-TX FDPLX
9432
 PHY_AD_TX_HDXPHY_AD_TX_HDX 0x0080 smc9000.h 1=PHY is capable of 100Base-TX HDPLX
9433
 PHY_AD_10_FDXPHY_AD_10_FDX 0x0040 smc9000.h 1=PHY is capable of 10Base-T FDPLX
9434
 PHY_AD_10_HDXPHY_AD_10_HDX 0x0020 smc9000.h 1=PHY is capable of 10Base-T HDPLX
9435
 PHY_AD_CSMAPHY_AD_CSMA 0x0001 smc9000.h 1=PHY is capable of 802.3 CMSA
9436
 PHY_RMT_REGPHY_RMT_REG 0x05 smc9000.h 　
9437
 PHY_CFG1_REGPHY_CFG1_REG 0x10 smc9000.h 　
9438
 PHY_CFG1_LNKDISPHY_CFG1_LNKDIS 0x8000 smc9000.h 1=Rx Link Detect Function disabled
9439
 PHY_CFG1_XMTDISPHY_CFG1_XMTDIS 0x4000 smc9000.h 1=TP Transmitter Disabled
9440
 PHY_CFG1_XMTPDNPHY_CFG1_XMTPDN 0x2000 smc9000.h 1=TP Transmitter Powered Down
9441
 PHY_CFG1_BYPSCRPHY_CFG1_BYPSCR 0x0400 smc9000.h 1=Bypass scrambler/descrambler
9442
 PHY_CFG1_UNSCDSPHY_CFG1_UNSCDS 0x0200 smc9000.h 1=Unscramble Idle Reception Disable
9443
 PHY_CFG1_EQLZRPHY_CFG1_EQLZR 0x0100 smc9000.h 1=Rx Equalizer Disabled
9444
 PHY_CFG1_CABLEPHY_CFG1_CABLE 0x0080 smc9000.h 1=STP(150ohm), 0=UTP(100ohm)
9445
 PHY_CFG1_RLVL0PHY_CFG1_RLVL0 0x0040 smc9000.h 1=Rx Squelch level reduced by 4.5db
9446
 PHY_CFG1_TLVL_SHIFTPHY_CFG1_TLVL_SHIFT 2 smc9000.h Transmit Output Level Adjust
9447
 PHY_CFG1_TLVL_MASKPHY_CFG1_TLVL_MASK 0x003C smc9000.h 　
9448
 PHY_CFG1_TRF_MASKPHY_CFG1_TRF_MASK 0x0003 smc9000.h Transmitter Rise/Fall time
9449
 PHY_CFG2_REGPHY_CFG2_REG 0x11 smc9000.h 　
9450
 PHY_CFG2_APOLDISPHY_CFG2_APOLDIS 0x0020 smc9000.h 1=Auto Polarity Correction disabled
9451
 PHY_CFG2_JABDISPHY_CFG2_JABDIS 0x0010 smc9000.h 1=Jabber disabled
9452
 PHY_CFG2_MREGPHY_CFG2_MREG 0x0008 smc9000.h 1=Multiple register access (MII mgt)
9453
 PHY_CFG2_INTMDIOPHY_CFG2_INTMDIO 0x0004 smc9000.h 1=Interrupt signaled with MDIO pulseo
9454
 PHY_INT_REGPHY_INT_REG 0x12 smc9000.h Status Output (Interrupt Status)
9455
 PHY_INT_INTPHY_INT_INT 0x8000 smc9000.h 1=bits have changed since last read
9456
 PHY_INT_LNKFAILPHY_INT_LNKFAIL 0x4000 smc9000.h 1=Link Not detected
9457
 PHY_INT_LOSSSYNCPHY_INT_LOSSSYNC 0x2000 smc9000.h 1=Descrambler has lost sync
9458
 PHY_INT_CWRDPHY_INT_CWRD 0x1000 smc9000.h 1=Invalid 4B5B code detected on rx
9459
 PHY_INT_SSDPHY_INT_SSD 0x0800 smc9000.h 1=No Start Of Stream detected on rx
9460
 PHY_INT_ESDPHY_INT_ESD 0x0400 smc9000.h 1=No End Of Stream detected on rx
9461
 PHY_INT_RPOLPHY_INT_RPOL 0x0200 smc9000.h 1=Reverse Polarity detected
9462
 PHY_INT_JABPHY_INT_JAB 0x0100 smc9000.h 1=Jabber detected
9463
 PHY_INT_SPDDETPHY_INT_SPDDET 0x0080 smc9000.h 1=100Base-TX mode, 0=10Base-T mode
9464
 PHY_INT_DPLXDETPHY_INT_DPLXDET 0x0040 smc9000.h 1=Device in Full Duplex
9465
 PHY_MASK_REGPHY_MASK_REG 0x13 smc9000.h Interrupt Mask
9466
 ADVERTISED_10baseT_HalfADVERTISED_10baseT_Half (1 << 0) tg3.h 　
9467
 ADVERTISED_10baseT_FullADVERTISED_10baseT_Full (1 << 1) tg3.h 　
9468
 ADVERTISED_100baseT_HalfADVERTISED_100baseT_Half (1 << 2) tg3.h 　
9469
 ADVERTISED_100baseT_FullADVERTISED_100baseT_Full (1 << 3) tg3.h 　
9470
 ADVERTISED_1000baseT_HalfADVERTISED_1000baseT_Half (1 << 4) tg3.h 　
9471
 ADVERTISED_1000baseT_FullADVERTISED_1000baseT_Full (1 << 5) tg3.h 　
9472
 ADVERTISED_AutonegADVERTISED_Autoneg (1 << 6) tg3.h 　
9473
 ADVERTISED_TPADVERTISED_TP (1 << 7) tg3.h 　
9474
 ADVERTISED_AUIADVERTISED_AUI (1 << 8) tg3.h 　
9475
 ADVERTISED_MIIADVERTISED_MII (1 << 9) tg3.h 　
9476
 ADVERTISED_FIBREADVERTISED_FIBRE (1 << 10) tg3.h 　
9477
 ADVERTISED_BNCADVERTISED_BNC (1 << 11) tg3.h 　
9478
 SPEED_10SPEED_10 0 tg3.h 　
9479
 SPEED_100SPEED_100 1 tg3.h 　
9480
 SPEED_1000SPEED_1000 2 tg3.h 　
9481
 SPEED_INVALIDSPEED_INVALID 3 tg3.h 　
9482
 DUPLEX_HALFDUPLEX_HALF 0x00 tg3.h 　
9483
 DUPLEX_FULLDUPLEX_FULL 0x01 tg3.h 　
9484
 DUPLEX_INVALIDDUPLEX_INVALID 0x02 tg3.h 　
9485
 PORT_TPPORT_TP 0x00 tg3.h 　
9486
 PORT_AUIPORT_AUI 0x01 tg3.h 　
9487
 PORT_MIIPORT_MII 0x02 tg3.h 　
9488
 PORT_FIBREPORT_FIBRE 0x03 tg3.h 　
9489
 PORT_BNCPORT_BNC 0x04 tg3.h 　
9490
 XCVR_INTERNALXCVR_INTERNAL 0x00 tg3.h 　
9491
 XCVR_EXTERNALXCVR_EXTERNAL 0x01 tg3.h 　
9492
 XCVR_DUMMY1XCVR_DUMMY1 0x02 tg3.h 　
9493
 XCVR_DUMMY2XCVR_DUMMY2 0x03 tg3.h 　
9494
 XCVR_DUMMY3XCVR_DUMMY3 0x04 tg3.h 　
9495
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 tg3.h 　
9496
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 tg3.h 　
9497
 WAKE_PHYWAKE_PHY (1 << 0) tg3.h 　
9498
 WAKE_UCASTWAKE_UCAST (1 << 1) tg3.h 　
9499
 WAKE_MCASTWAKE_MCAST (1 << 2) tg3.h 　
9500
 WAKE_BCASTWAKE_BCAST (1 << 3) tg3.h 　
9501
 WAKE_ARPWAKE_ARP (1 << 4) tg3.h 　
9502
 WAKE_MAGICWAKE_MAGIC (1 << 5) tg3.h 　
9503
 WAKE_MAGICSECUREWAKE_MAGICSECURE (1 << 6) tg3.h only meaningful if WAKE_MAGIC
9504
 TG3_64BIT_REG_HIGHTG3_64BIT_REG_HIGH 0x00UL tg3.h 　
9505
 TG3_64BIT_REG_LOWTG3_64BIT_REG_LOW 0x04UL tg3.h 　
9506
 TG3_BDINFO_HOST_ADDRTG3_BDINFO_HOST_ADDR 0x0UL tg3.h 64-bit
9507
 TG3_BDINFO_MAXLEN_FLAGSTG3_BDINFO_MAXLEN_FLAGS 0x8UL tg3.h 32-bit
9508
 BDINFO_FLAGS_USE_EXT_RECVBDINFO_FLAGS_USE_EXT_RECV 0x00000001 tg3.h ext rx_buffer_desc
9509
 BDINFO_FLAGS_DISABLEDBDINFO_FLAGS_DISABLED 0x00000002 tg3.h 　
9510
 BDINFO_FLAGS_MAXLEN_MASKBDINFO_FLAGS_MAXLEN_MASK 0xffff0000 tg3.h 　
9511
 BDINFO_FLAGS_MAXLEN_SHIFTBDINFO_FLAGS_MAXLEN_SHIFT 16 tg3.h 　
9512
 TG3_BDINFO_NIC_ADDRTG3_BDINFO_NIC_ADDR 0xcUL tg3.h 32-bit
9513
 TG3_BDINFO_SIZETG3_BDINFO_SIZE 0x10UL tg3.h 　
9514
 RX_COPY_THRESHOLDRX_COPY_THRESHOLD 256 tg3.h 　
9515
 RX_STD_MAX_SIZERX_STD_MAX_SIZE 1536 tg3.h 　
9516
 RX_STD_MAX_SIZE_5705RX_STD_MAX_SIZE_5705 512 tg3.h 　
9517
 RX_JUMBO_MAX_SIZERX_JUMBO_MAX_SIZE 0xdeadbeef tg3.h XXX
9518
 TG3PCI_VENDORTG3PCI_VENDOR 0x00000000 tg3.h 　
9519
 TG3PCI_VENDOR_BROADCOMTG3PCI_VENDOR_BROADCOM 0x14e4 tg3.h 　
9520
 TG3PCI_DEVICETG3PCI_DEVICE 0x00000002 tg3.h 　
9521
 TG3PCI_DEVICE_TIGON3_1TG3PCI_DEVICE_TIGON3_1 0x1644 tg3.h BCM5700
9522
 TG3PCI_DEVICE_TIGON3_2TG3PCI_DEVICE_TIGON3_2 0x1645 tg3.h BCM5701
9523
 TG3PCI_DEVICE_TIGON3_3TG3PCI_DEVICE_TIGON3_3 0x1646 tg3.h BCM5702
9524
 TG3PCI_DEVICE_TIGON3_4TG3PCI_DEVICE_TIGON3_4 0x1647 tg3.h BCM5703
9525
 TG3PCI_COMMANDTG3PCI_COMMAND 0x00000004 tg3.h 　
9526
 TG3PCI_STATUSTG3PCI_STATUS 0x00000006 tg3.h 　
9527
 TG3PCI_CCREVIDTG3PCI_CCREVID 0x00000008 tg3.h 　
9528
 TG3PCI_CACHELINESZTG3PCI_CACHELINESZ 0x0000000c tg3.h 　
9529
 TG3PCI_LATTIMERTG3PCI_LATTIMER 0x0000000d tg3.h 　
9530
 TG3PCI_HEADERTYPETG3PCI_HEADERTYPE 0x0000000e tg3.h 　
9531
 TG3PCI_BISTTG3PCI_BIST 0x0000000f tg3.h 　
9532
 TG3PCI_BASE0_LOWTG3PCI_BASE0_LOW 0x00000010 tg3.h 　
9533
 TG3PCI_BASE0_HIGHTG3PCI_BASE0_HIGH 0x00000014 tg3.h 　
9534
 TG3PCI_SUBSYSVENIDTG3PCI_SUBSYSVENID 0x0000002c tg3.h 　
9535
 TG3PCI_SUBSYSIDTG3PCI_SUBSYSID 0x0000002e tg3.h 　
9536
 TG3PCI_ROMADDRTG3PCI_ROMADDR 0x00000030 tg3.h 　
9537
 TG3PCI_CAPLISTTG3PCI_CAPLIST 0x00000034 tg3.h 　
9538
 TG3PCI_IRQ_LINETG3PCI_IRQ_LINE 0x0000003c tg3.h 　
9539
 TG3PCI_IRQ_PINTG3PCI_IRQ_PIN 0x0000003d tg3.h 　
9540
 TG3PCI_MIN_GNTTG3PCI_MIN_GNT 0x0000003e tg3.h 　
9541
 TG3PCI_MAX_LATTG3PCI_MAX_LAT 0x0000003f tg3.h 　
9542
 TG3PCI_X_CAPSTG3PCI_X_CAPS 0x00000040 tg3.h 　
9543
 PCIX_CAPS_RELAXED_ORDERINGPCIX_CAPS_RELAXED_ORDERING 0x00020000 tg3.h 　
9544
 PCIX_CAPS_SPLIT_MASKPCIX_CAPS_SPLIT_MASK 0x00700000 tg3.h 　
9545
 PCIX_CAPS_SPLIT_SHIFTPCIX_CAPS_SPLIT_SHIFT 20 tg3.h 　
9546
 PCIX_CAPS_BURST_MASKPCIX_CAPS_BURST_MASK 0x000c0000 tg3.h 　
9547
 PCIX_CAPS_BURST_SHIFTPCIX_CAPS_BURST_SHIFT 18 tg3.h 　
9548
 PCIX_CAPS_MAX_BURST_CPIOBPCIX_CAPS_MAX_BURST_CPIOB 2 tg3.h 　
9549
 TG3PCI_PM_CAP_PTRTG3PCI_PM_CAP_PTR 0x00000041 tg3.h 　
9550
 TG3PCI_X_COMMANDTG3PCI_X_COMMAND 0x00000042 tg3.h 　
9551
 TG3PCI_X_STATUSTG3PCI_X_STATUS 0x00000044 tg3.h 　
9552
 TG3PCI_PM_CAP_IDTG3PCI_PM_CAP_ID 0x00000048 tg3.h 　
9553
 TG3PCI_VPD_CAP_PTRTG3PCI_VPD_CAP_PTR 0x00000049 tg3.h 　
9554
 TG3PCI_PM_CAPSTG3PCI_PM_CAPS 0x0000004a tg3.h 　
9555
 TG3PCI_PM_CTRL_STATTG3PCI_PM_CTRL_STAT 0x0000004c tg3.h 　
9556
 TG3PCI_BR_SUPP_EXTTG3PCI_BR_SUPP_EXT 0x0000004e tg3.h 　
9557
 TG3PCI_PM_DATATG3PCI_PM_DATA 0x0000004f tg3.h 　
9558
 TG3PCI_VPD_CAP_IDTG3PCI_VPD_CAP_ID 0x00000050 tg3.h 　
9559
 TG3PCI_MSI_CAP_PTRTG3PCI_MSI_CAP_PTR 0x00000051 tg3.h 　
9560
 TG3PCI_VPD_ADDR_FLAGTG3PCI_VPD_ADDR_FLAG 0x00000052 tg3.h 　
9561
 VPD_ADDR_FLAG_WRITEVPD_ADDR_FLAG_WRITE 0x00008000 tg3.h 　
9562
 TG3PCI_VPD_DATATG3PCI_VPD_DATA 0x00000054 tg3.h 　
9563
 TG3PCI_MSI_CAP_IDTG3PCI_MSI_CAP_ID 0x00000058 tg3.h 　
9564
 TG3PCI_NXT_CAP_PTRTG3PCI_NXT_CAP_PTR 0x00000059 tg3.h 　
9565
 TG3PCI_MSI_CTRLTG3PCI_MSI_CTRL 0x0000005a tg3.h 　
9566
 TG3PCI_MSI_ADDR_LOWTG3PCI_MSI_ADDR_LOW 0x0000005c tg3.h 　
9567
 TG3PCI_MSI_ADDR_HIGHTG3PCI_MSI_ADDR_HIGH 0x00000060 tg3.h 　
9568
 TG3PCI_MSI_DATATG3PCI_MSI_DATA 0x00000064 tg3.h 　
9569
 TG3PCI_MISC_HOST_CTRLTG3PCI_MISC_HOST_CTRL 0x00000068 tg3.h 　
9570
 MISC_HOST_CTRL_CLEAR_INTMISC_HOST_CTRL_CLEAR_INT 0x00000001 tg3.h 　
9571
 MISC_HOST_CTRL_MASK_PCI_INTMISC_HOST_CTRL_MASK_PCI_INT 0x00000002 tg3.h 　
9572
 MISC_HOST_CTRL_BYTE_SWAPMISC_HOST_CTRL_BYTE_SWAP 0x00000004 tg3.h 　
9573
 MISC_HOST_CTRL_WORD_SWAPMISC_HOST_CTRL_WORD_SWAP 0x00000008 tg3.h 　
9574
 MISC_HOST_CTRL_PCISTATE_RWMISC_HOST_CTRL_PCISTATE_RW 0x00000010 tg3.h 　
9575
 MISC_HOST_CTRL_CLKREG_RWMISC_HOST_CTRL_CLKREG_RW 0x00000020 tg3.h 　
9576
 MISC_HOST_CTRL_REGWORD_SWAPMISC_HOST_CTRL_REGWORD_SWAP 0x00000040 tg3.h 　
9577
 MISC_HOST_CTRL_INDIR_ACCESSMISC_HOST_CTRL_INDIR_ACCESS 0x00000080 tg3.h 　
9578
 MISC_HOST_CTRL_IRQ_MASK_MODEMISC_HOST_CTRL_IRQ_MASK_MODE 0x00000100 tg3.h 　
9579
 MISC_HOST_CTRL_TAGGED_STATUSMISC_HOST_CTRL_TAGGED_STATUS 0x00000200 tg3.h 　
9580
 MISC_HOST_CTRL_CHIPREVMISC_HOST_CTRL_CHIPREV 0xffff0000 tg3.h 　
9581
 MISC_HOST_CTRL_CHIPREV_SHIFTMISC_HOST_CTRL_CHIPREV_SHIFT 16 tg3.h 　
9582
 CHIPREV_ID_5700_A0CHIPREV_ID_5700_A0 0x7000 tg3.h 　
9583
 CHIPREV_ID_5700_A1CHIPREV_ID_5700_A1 0x7001 tg3.h 　
9584
 CHIPREV_ID_5700_B0CHIPREV_ID_5700_B0 0x7100 tg3.h 　
9585
 CHIPREV_ID_5700_B1CHIPREV_ID_5700_B1 0x7101 tg3.h 　
9586
 CHIPREV_ID_5700_B3CHIPREV_ID_5700_B3 0x7102 tg3.h 　
9587
 CHIPREV_ID_5700_ALTIMACHIPREV_ID_5700_ALTIMA 0x7104 tg3.h 　
9588
 CHIPREV_ID_5700_C0CHIPREV_ID_5700_C0 0x7200 tg3.h 　
9589
 CHIPREV_ID_5701_A0CHIPREV_ID_5701_A0 0x0000 tg3.h 　
9590
 CHIPREV_ID_5701_B0CHIPREV_ID_5701_B0 0x0100 tg3.h 　
9591
 CHIPREV_ID_5701_B2CHIPREV_ID_5701_B2 0x0102 tg3.h 　
9592
 CHIPREV_ID_5701_B5CHIPREV_ID_5701_B5 0x0105 tg3.h 　
9593
 CHIPREV_ID_5703_A0CHIPREV_ID_5703_A0 0x1000 tg3.h 　
9594
 CHIPREV_ID_5703_A1CHIPREV_ID_5703_A1 0x1001 tg3.h 　
9595
 CHIPREV_ID_5703_A2CHIPREV_ID_5703_A2 0x1002 tg3.h 　
9596
 CHIPREV_ID_5703_A3CHIPREV_ID_5703_A3 0x1003 tg3.h 　
9597
 CHIPREV_ID_5704_A0CHIPREV_ID_5704_A0 0x2000 tg3.h 　
9598
 CHIPREV_ID_5704_A1CHIPREV_ID_5704_A1 0x2001 tg3.h 　
9599
 CHIPREV_ID_5704_A2CHIPREV_ID_5704_A2 0x2002 tg3.h 　
9600
 CHIPREV_ID_5705_A0CHIPREV_ID_5705_A0 0x3000 tg3.h 　
9601
 CHIPREV_ID_5705_A1CHIPREV_ID_5705_A1 0x3001 tg3.h 　
9602
 CHIPREV_ID_5705_A2CHIPREV_ID_5705_A2 0x3002 tg3.h 　
9603
 CHIPREV_ID_5705_A3CHIPREV_ID_5705_A3 0x3003 tg3.h 　
9604
 CHIPREV_ID_5721CHIPREV_ID_5721 0x4101 tg3.h 　
9605
 CHIPREV_ID_5750_A0CHIPREV_ID_5750_A0 0x4000 tg3.h 　
9606
 CHIPREV_ID_5750_A1CHIPREV_ID_5750_A1 0x4001 tg3.h 　
9607
 CHIPREV_ID_5750_A3CHIPREV_ID_5750_A3 0x4003 tg3.h 　
9608
 ASIC_REV_5700ASIC_REV_5700 0x07 tg3.h 　
9609
 ASIC_REV_5701ASIC_REV_5701 0x00 tg3.h 　
9610
 ASIC_REV_5703ASIC_REV_5703 0x01 tg3.h 　
9611
 ASIC_REV_5704ASIC_REV_5704 0x02 tg3.h 　
9612
 ASIC_REV_5705ASIC_REV_5705 0x03 tg3.h 　
9613
 ASIC_REV_5750ASIC_REV_5750 0x04 tg3.h 　
9614
 ASIC_REV_5787ASIC_REV_5787 0x0b tg3.h 　
9615
 CHIPREV_5700_AXCHIPREV_5700_AX 0x70 tg3.h 　
9616
 CHIPREV_5700_BXCHIPREV_5700_BX 0x71 tg3.h 　
9617
 CHIPREV_5700_CXCHIPREV_5700_CX 0x72 tg3.h 　
9618
 CHIPREV_5701_AXCHIPREV_5701_AX 0x00 tg3.h 　
9619
 METAL_REV_A0METAL_REV_A0 0x00 tg3.h 　
9620
 METAL_REV_A1METAL_REV_A1 0x01 tg3.h 　
9621
 METAL_REV_B0METAL_REV_B0 0x00 tg3.h 　
9622
 METAL_REV_B1METAL_REV_B1 0x01 tg3.h 　
9623
 METAL_REV_B2METAL_REV_B2 0x02 tg3.h 　
9624
 TG3PCI_DMA_RW_CTRLTG3PCI_DMA_RW_CTRL 0x0000006c tg3.h 　
9625
 DMA_RWCTRL_MIN_DMADMA_RWCTRL_MIN_DMA 0x000000ff tg3.h 　
9626
 DMA_RWCTRL_MIN_DMA_SHIFTDMA_RWCTRL_MIN_DMA_SHIFT 0 tg3.h 　
9627
 DMA_RWCTRL_READ_BNDRY_MASKDMA_RWCTRL_READ_BNDRY_MASK 0x00000700 tg3.h 　
9628
 DMA_RWCTRL_READ_BNDRY_DISABDMA_RWCTRL_READ_BNDRY_DISAB 0x00000000 tg3.h 　
9629
 DMA_RWCTRL_READ_BNDRY_16DMA_RWCTRL_READ_BNDRY_16 0x00000100 tg3.h 　
9630
 DMA_RWCTRL_READ_BNDRY_32DMA_RWCTRL_READ_BNDRY_32 0x00000200 tg3.h 　
9631
 DMA_RWCTRL_READ_BNDRY_64DMA_RWCTRL_READ_BNDRY_64 0x00000300 tg3.h 　
9632
 DMA_RWCTRL_READ_BNDRY_128DMA_RWCTRL_READ_BNDRY_128 0x00000400 tg3.h 　
9633
 DMA_RWCTRL_READ_BNDRY_256DMA_RWCTRL_READ_BNDRY_256 0x00000500 tg3.h 　
9634
 DMA_RWCTRL_READ_BNDRY_512DMA_RWCTRL_READ_BNDRY_512 0x00000600 tg3.h 　
9635
 DMA_RWCTRL_READ_BNDRY_1024DMA_RWCTRL_READ_BNDRY_1024 0x00000700 tg3.h 　
9636
 DMA_RWCTRL_WRITE_BNDRY_MASKDMA_RWCTRL_WRITE_BNDRY_MASK 0x00003800 tg3.h 　
9637
 DMA_RWCTRL_WRITE_BNDRY_DISABDMA_RWCTRL_WRITE_BNDRY_DISAB 0x00000000 tg3.h 　
9638
 DMA_RWCTRL_WRITE_BNDRY_16DMA_RWCTRL_WRITE_BNDRY_16 0x00000800 tg3.h 　
9639
 DMA_RWCTRL_WRITE_BNDRY_32DMA_RWCTRL_WRITE_BNDRY_32 0x00001000 tg3.h 　
9640
 DMA_RWCTRL_WRITE_BNDRY_64DMA_RWCTRL_WRITE_BNDRY_64 0x00001800 tg3.h 　
9641
 DMA_RWCTRL_WRITE_BNDRY_128DMA_RWCTRL_WRITE_BNDRY_128 0x00002000 tg3.h 　
9642
 DMA_RWCTRL_WRITE_BNDRY_256DMA_RWCTRL_WRITE_BNDRY_256 0x00002800 tg3.h 　
9643
 DMA_RWCTRL_WRITE_BNDRY_512DMA_RWCTRL_WRITE_BNDRY_512 0x00003000 tg3.h 　
9644
 DMA_RWCTRL_WRITE_BNDRY_1024DMA_RWCTRL_WRITE_BNDRY_1024 0x00003800 tg3.h 　
9645
 DMA_RWCTRL_ONE_DMADMA_RWCTRL_ONE_DMA 0x00004000 tg3.h 　
9646
 DMA_RWCTRL_READ_WATERDMA_RWCTRL_READ_WATER 0x00070000 tg3.h 　
9647
 DMA_RWCTRL_READ_WATER_SHIFTDMA_RWCTRL_READ_WATER_SHIFT 16 tg3.h 　
9648
 DMA_RWCTRL_WRITE_WATERDMA_RWCTRL_WRITE_WATER 0x00380000 tg3.h 　
9649
 DMA_RWCTRL_WRITE_WATER_SHIFTDMA_RWCTRL_WRITE_WATER_SHIFT 19 tg3.h 　
9650
 DMA_RWCTRL_USE_MEM_READ_MULTDMA_RWCTRL_USE_MEM_READ_MULT 0x00400000 tg3.h 　
9651
 DMA_RWCTRL_ASSERT_ALL_BEDMA_RWCTRL_ASSERT_ALL_BE 0x00800000 tg3.h 　
9652
 DMA_RWCTRL_PCI_READ_CMDDMA_RWCTRL_PCI_READ_CMD 0x0f000000 tg3.h 　
9653
 DMA_RWCTRL_PCI_READ_CMD_SHIFTDMA_RWCTRL_PCI_READ_CMD_SHIFT 24 tg3.h 　
9654
 DMA_RWCTRL_PCI_WRITE_CMDDMA_RWCTRL_PCI_WRITE_CMD 0xf0000000 tg3.h 　
9655
 DMA_RWCTRL_PCI_WRITE_CMD_SHIFTDMA_RWCTRL_PCI_WRITE_CMD_SHIFT 28 tg3.h 　
9656
 TG3PCI_PCISTATETG3PCI_PCISTATE 0x00000070 tg3.h 　
9657
 PCISTATE_FORCE_RESETPCISTATE_FORCE_RESET 0x00000001 tg3.h 　
9658
 PCISTATE_INT_NOT_ACTIVEPCISTATE_INT_NOT_ACTIVE 0x00000002 tg3.h 　
9659
 PCISTATE_CONV_PCI_MODEPCISTATE_CONV_PCI_MODE 0x00000004 tg3.h 　
9660
 PCISTATE_BUS_SPEED_HIGHPCISTATE_BUS_SPEED_HIGH 0x00000008 tg3.h 　
9661
 PCISTATE_BUS_32BITPCISTATE_BUS_32BIT 0x00000010 tg3.h 　
9662
 PCISTATE_ROM_ENABLEPCISTATE_ROM_ENABLE 0x00000020 tg3.h 　
9663
 PCISTATE_ROM_RETRY_ENABLEPCISTATE_ROM_RETRY_ENABLE 0x00000040 tg3.h 　
9664
 PCISTATE_FLAT_VIEWPCISTATE_FLAT_VIEW 0x00000100 tg3.h 　
9665
 PCISTATE_RETRY_SAME_DMAPCISTATE_RETRY_SAME_DMA 0x00002000 tg3.h 　
9666
 TG3PCI_CLOCK_CTRLTG3PCI_CLOCK_CTRL 0x00000074 tg3.h 　
9667
 CLOCK_CTRL_CORECLK_DISABLECLOCK_CTRL_CORECLK_DISABLE 0x00000200 tg3.h 　
9668
 CLOCK_CTRL_RXCLK_DISABLECLOCK_CTRL_RXCLK_DISABLE 0x00000400 tg3.h 　
9669
 CLOCK_CTRL_TXCLK_DISABLECLOCK_CTRL_TXCLK_DISABLE 0x00000800 tg3.h 　
9670
 CLOCK_CTRL_ALTCLKCLOCK_CTRL_ALTCLK 0x00001000 tg3.h 　
9671
 CLOCK_CTRL_PWRDOWN_PLL133CLOCK_CTRL_PWRDOWN_PLL133 0x00008000 tg3.h 　
9672
 CLOCK_CTRL_44MHZ_CORECLOCK_CTRL_44MHZ_CORE 0x00040000 tg3.h 　
9673
 CLOCK_CTRL_625_CORECLOCK_CTRL_625_CORE 0x00100000 tg3.h 　
9674
 CLOCK_CTRL_FORCE_CLKRUNCLOCK_CTRL_FORCE_CLKRUN 0x00200000 tg3.h 　
9675
 CLOCK_CTRL_CLKRUN_OENABLECLOCK_CTRL_CLKRUN_OENABLE 0x00400000 tg3.h 　
9676
 CLOCK_CTRL_DELAY_PCI_GRANTCLOCK_CTRL_DELAY_PCI_GRANT 0x80000000 tg3.h 　
9677
 TG3PCI_REG_BASE_ADDRTG3PCI_REG_BASE_ADDR 0x00000078 tg3.h 　
9678
 TG3PCI_MEM_WIN_BASE_ADDRTG3PCI_MEM_WIN_BASE_ADDR 0x0000007c tg3.h 　
9679
 TG3PCI_REG_DATATG3PCI_REG_DATA 0x00000080 tg3.h 　
9680
 TG3PCI_MEM_WIN_DATATG3PCI_MEM_WIN_DATA 0x00000084 tg3.h 　
9681
 TG3PCI_MODE_CTRLTG3PCI_MODE_CTRL 0x00000088 tg3.h 　
9682
 TG3PCI_MISC_CFGTG3PCI_MISC_CFG 0x0000008c tg3.h 　
9683
 TG3PCI_MISC_LOCAL_CTRLTG3PCI_MISC_LOCAL_CTRL 0x00000090 tg3.h 　
9684
 TG3PCI_STD_RING_PROD_IDXTG3PCI_STD_RING_PROD_IDX 0x00000098 tg3.h 64-bit
9685
 TG3PCI_RCV_RET_RING_CON_IDXTG3PCI_RCV_RET_RING_CON_IDX 0x000000a0 tg3.h 64-bit
9686
 TG3PCI_SND_PROD_IDXTG3PCI_SND_PROD_IDX 0x000000a8 tg3.h 64-bit
9687
 MAILBOX_INTERRUPT_0MAILBOX_INTERRUPT_0 0x00000200 tg3.h 64-bit
9688
 MAILBOX_INTERRUPT_1MAILBOX_INTERRUPT_1 0x00000208 tg3.h 64-bit
9689
 MAILBOX_INTERRUPT_2MAILBOX_INTERRUPT_2 0x00000210 tg3.h 64-bit
9690
 MAILBOX_INTERRUPT_3MAILBOX_INTERRUPT_3 0x00000218 tg3.h 64-bit
9691
 MAILBOX_GENERAL_0MAILBOX_GENERAL_0 0x00000220 tg3.h 64-bit
9692
 MAILBOX_GENERAL_1MAILBOX_GENERAL_1 0x00000228 tg3.h 64-bit
9693
 MAILBOX_GENERAL_2MAILBOX_GENERAL_2 0x00000230 tg3.h 64-bit
9694
 MAILBOX_GENERAL_3MAILBOX_GENERAL_3 0x00000238 tg3.h 64-bit
9695
 MAILBOX_GENERAL_4MAILBOX_GENERAL_4 0x00000240 tg3.h 64-bit
9696
 MAILBOX_GENERAL_5MAILBOX_GENERAL_5 0x00000248 tg3.h 64-bit
9697
 MAILBOX_GENERAL_6MAILBOX_GENERAL_6 0x00000250 tg3.h 64-bit
9698
 MAILBOX_GENERAL_7MAILBOX_GENERAL_7 0x00000258 tg3.h 64-bit
9699
 MAILBOX_RELOAD_STATMAILBOX_RELOAD_STAT 0x00000260 tg3.h 64-bit
9700
 MAILBOX_RCV_STD_PROD_IDXMAILBOX_RCV_STD_PROD_IDX 0x00000268 tg3.h 64-bit
9701
 MAILBOX_RCV_JUMBO_PROD_IDXMAILBOX_RCV_JUMBO_PROD_IDX 0x00000270 tg3.h 64-bit
9702
 MAILBOX_RCV_MINI_PROD_IDXMAILBOX_RCV_MINI_PROD_IDX 0x00000278 tg3.h 64-bit
9703
 MAILBOX_RCVRET_CON_IDX_0MAILBOX_RCVRET_CON_IDX_0 0x00000280 tg3.h 64-bit
9704
 MAILBOX_RCVRET_CON_IDX_1MAILBOX_RCVRET_CON_IDX_1 0x00000288 tg3.h 64-bit
9705
 MAILBOX_RCVRET_CON_IDX_2MAILBOX_RCVRET_CON_IDX_2 0x00000290 tg3.h 64-bit
9706
 MAILBOX_RCVRET_CON_IDX_3MAILBOX_RCVRET_CON_IDX_3 0x00000298 tg3.h 64-bit
9707
 MAILBOX_RCVRET_CON_IDX_4MAILBOX_RCVRET_CON_IDX_4 0x000002a0 tg3.h 64-bit
9708
 MAILBOX_RCVRET_CON_IDX_5MAILBOX_RCVRET_CON_IDX_5 0x000002a8 tg3.h 64-bit
9709
 MAILBOX_RCVRET_CON_IDX_6MAILBOX_RCVRET_CON_IDX_6 0x000002b0 tg3.h 64-bit
9710
 MAILBOX_RCVRET_CON_IDX_7MAILBOX_RCVRET_CON_IDX_7 0x000002b8 tg3.h 64-bit
9711
 MAILBOX_RCVRET_CON_IDX_8MAILBOX_RCVRET_CON_IDX_8 0x000002c0 tg3.h 64-bit
9712
 MAILBOX_RCVRET_CON_IDX_9MAILBOX_RCVRET_CON_IDX_9 0x000002c8 tg3.h 64-bit
9713
 MAILBOX_RCVRET_CON_IDX_10MAILBOX_RCVRET_CON_IDX_10 0x000002d0 tg3.h 64-bit
9714
 MAILBOX_RCVRET_CON_IDX_11MAILBOX_RCVRET_CON_IDX_11 0x000002d8 tg3.h 64-bit
9715
 MAILBOX_RCVRET_CON_IDX_12MAILBOX_RCVRET_CON_IDX_12 0x000002e0 tg3.h 64-bit
9716
 MAILBOX_RCVRET_CON_IDX_13MAILBOX_RCVRET_CON_IDX_13 0x000002e8 tg3.h 64-bit
9717
 MAILBOX_RCVRET_CON_IDX_14MAILBOX_RCVRET_CON_IDX_14 0x000002f0 tg3.h 64-bit
9718
 MAILBOX_RCVRET_CON_IDX_15MAILBOX_RCVRET_CON_IDX_15 0x000002f8 tg3.h 64-bit
9719
 MAILBOX_SNDHOST_PROD_IDX_0MAILBOX_SNDHOST_PROD_IDX_0 0x00000300 tg3.h 64-bit
9720
 MAILBOX_SNDHOST_PROD_IDX_1MAILBOX_SNDHOST_PROD_IDX_1 0x00000308 tg3.h 64-bit
9721
 MAILBOX_SNDHOST_PROD_IDX_2MAILBOX_SNDHOST_PROD_IDX_2 0x00000310 tg3.h 64-bit
9722
 MAILBOX_SNDHOST_PROD_IDX_3MAILBOX_SNDHOST_PROD_IDX_3 0x00000318 tg3.h 64-bit
9723
 MAILBOX_SNDHOST_PROD_IDX_4MAILBOX_SNDHOST_PROD_IDX_4 0x00000320 tg3.h 64-bit
9724
 MAILBOX_SNDHOST_PROD_IDX_5MAILBOX_SNDHOST_PROD_IDX_5 0x00000328 tg3.h 64-bit
9725
 MAILBOX_SNDHOST_PROD_IDX_6MAILBOX_SNDHOST_PROD_IDX_6 0x00000330 tg3.h 64-bit
9726
 MAILBOX_SNDHOST_PROD_IDX_7MAILBOX_SNDHOST_PROD_IDX_7 0x00000338 tg3.h 64-bit
9727
 MAILBOX_SNDHOST_PROD_IDX_8MAILBOX_SNDHOST_PROD_IDX_8 0x00000340 tg3.h 64-bit
9728
 MAILBOX_SNDHOST_PROD_IDX_9MAILBOX_SNDHOST_PROD_IDX_9 0x00000348 tg3.h 64-bit
9729
 MAILBOX_SNDHOST_PROD_IDX_10MAILBOX_SNDHOST_PROD_IDX_10 0x00000350 tg3.h 64-bit
9730
 MAILBOX_SNDHOST_PROD_IDX_11MAILBOX_SNDHOST_PROD_IDX_11 0x00000358 tg3.h 64-bit
9731
 MAILBOX_SNDHOST_PROD_IDX_12MAILBOX_SNDHOST_PROD_IDX_12 0x00000360 tg3.h 64-bit
9732
 MAILBOX_SNDHOST_PROD_IDX_13MAILBOX_SNDHOST_PROD_IDX_13 0x00000368 tg3.h 64-bit
9733
 MAILBOX_SNDHOST_PROD_IDX_14MAILBOX_SNDHOST_PROD_IDX_14 0x00000370 tg3.h 64-bit
9734
 MAILBOX_SNDHOST_PROD_IDX_15MAILBOX_SNDHOST_PROD_IDX_15 0x00000378 tg3.h 64-bit
9735
 MAILBOX_SNDNIC_PROD_IDX_0MAILBOX_SNDNIC_PROD_IDX_0 0x00000380 tg3.h 64-bit
9736
 MAILBOX_SNDNIC_PROD_IDX_1MAILBOX_SNDNIC_PROD_IDX_1 0x00000388 tg3.h 64-bit
9737
 MAILBOX_SNDNIC_PROD_IDX_2MAILBOX_SNDNIC_PROD_IDX_2 0x00000390 tg3.h 64-bit
9738
 MAILBOX_SNDNIC_PROD_IDX_3MAILBOX_SNDNIC_PROD_IDX_3 0x00000398 tg3.h 64-bit
9739
 MAILBOX_SNDNIC_PROD_IDX_4MAILBOX_SNDNIC_PROD_IDX_4 0x000003a0 tg3.h 64-bit
9740
 MAILBOX_SNDNIC_PROD_IDX_5MAILBOX_SNDNIC_PROD_IDX_5 0x000003a8 tg3.h 64-bit
9741
 MAILBOX_SNDNIC_PROD_IDX_6MAILBOX_SNDNIC_PROD_IDX_6 0x000003b0 tg3.h 64-bit
9742
 MAILBOX_SNDNIC_PROD_IDX_7MAILBOX_SNDNIC_PROD_IDX_7 0x000003b8 tg3.h 64-bit
9743
 MAILBOX_SNDNIC_PROD_IDX_8MAILBOX_SNDNIC_PROD_IDX_8 0x000003c0 tg3.h 64-bit
9744
 MAILBOX_SNDNIC_PROD_IDX_9MAILBOX_SNDNIC_PROD_IDX_9 0x000003c8 tg3.h 64-bit
9745
 MAILBOX_SNDNIC_PROD_IDX_10MAILBOX_SNDNIC_PROD_IDX_10 0x000003d0 tg3.h 64-bit
9746
 MAILBOX_SNDNIC_PROD_IDX_11MAILBOX_SNDNIC_PROD_IDX_11 0x000003d8 tg3.h 64-bit
9747
 MAILBOX_SNDNIC_PROD_IDX_12MAILBOX_SNDNIC_PROD_IDX_12 0x000003e0 tg3.h 64-bit
9748
 MAILBOX_SNDNIC_PROD_IDX_13MAILBOX_SNDNIC_PROD_IDX_13 0x000003e8 tg3.h 64-bit
9749
 MAILBOX_SNDNIC_PROD_IDX_14MAILBOX_SNDNIC_PROD_IDX_14 0x000003f0 tg3.h 64-bit
9750
 MAILBOX_SNDNIC_PROD_IDX_15MAILBOX_SNDNIC_PROD_IDX_15 0x000003f8 tg3.h 64-bit
9751
 MAC_MODEMAC_MODE 0x00000400 tg3.h 　
9752
 MAC_MODE_RESETMAC_MODE_RESET 0x00000001 tg3.h 　
9753
 MAC_MODE_HALF_DUPLEXMAC_MODE_HALF_DUPLEX 0x00000002 tg3.h 　
9754
 MAC_MODE_PORT_MODE_MASKMAC_MODE_PORT_MODE_MASK 0x0000000c tg3.h 　
9755
 MAC_MODE_PORT_MODE_TBIMAC_MODE_PORT_MODE_TBI 0x0000000c tg3.h 　
9756
 MAC_MODE_PORT_MODE_GMIIMAC_MODE_PORT_MODE_GMII 0x00000008 tg3.h 　
9757
 MAC_MODE_PORT_MODE_MIIMAC_MODE_PORT_MODE_MII 0x00000004 tg3.h 　
9758
 MAC_MODE_PORT_MODE_NONEMAC_MODE_PORT_MODE_NONE 0x00000000 tg3.h 　
9759
 MAC_MODE_PORT_INT_LPBACKMAC_MODE_PORT_INT_LPBACK 0x00000010 tg3.h 　
9760
 MAC_MODE_TAGGED_MAC_CTRLMAC_MODE_TAGGED_MAC_CTRL 0x00000080 tg3.h 　
9761
 MAC_MODE_TX_BURSTINGMAC_MODE_TX_BURSTING 0x00000100 tg3.h 　
9762
 MAC_MODE_MAX_DEFERMAC_MODE_MAX_DEFER 0x00000200 tg3.h 　
9763
 MAC_MODE_LINK_POLARITYMAC_MODE_LINK_POLARITY 0x00000400 tg3.h 　
9764
 MAC_MODE_RXSTAT_ENABLEMAC_MODE_RXSTAT_ENABLE 0x00000800 tg3.h 　
9765
 MAC_MODE_RXSTAT_CLEARMAC_MODE_RXSTAT_CLEAR 0x00001000 tg3.h 　
9766
 MAC_MODE_RXSTAT_FLUSHMAC_MODE_RXSTAT_FLUSH 0x00002000 tg3.h 　
9767
 MAC_MODE_TXSTAT_ENABLEMAC_MODE_TXSTAT_ENABLE 0x00004000 tg3.h 　
9768
 MAC_MODE_TXSTAT_CLEARMAC_MODE_TXSTAT_CLEAR 0x00008000 tg3.h 　
9769
 MAC_MODE_TXSTAT_FLUSHMAC_MODE_TXSTAT_FLUSH 0x00010000 tg3.h 　
9770
 MAC_MODE_SEND_CONFIGSMAC_MODE_SEND_CONFIGS 0x00020000 tg3.h 　
9771
 MAC_MODE_MAGIC_PKT_ENABLEMAC_MODE_MAGIC_PKT_ENABLE 0x00040000 tg3.h 　
9772
 MAC_MODE_ACPI_ENABLEMAC_MODE_ACPI_ENABLE 0x00080000 tg3.h 　
9773
 MAC_MODE_MIP_ENABLEMAC_MODE_MIP_ENABLE 0x00100000 tg3.h 　
9774
 MAC_MODE_TDE_ENABLEMAC_MODE_TDE_ENABLE 0x00200000 tg3.h 　
9775
 MAC_MODE_RDE_ENABLEMAC_MODE_RDE_ENABLE 0x00400000 tg3.h 　
9776
 MAC_MODE_FHDE_ENABLEMAC_MODE_FHDE_ENABLE 0x00800000 tg3.h 　
9777
 MAC_STATUSMAC_STATUS 0x00000404 tg3.h 　
9778
 MAC_STATUS_PCS_SYNCEDMAC_STATUS_PCS_SYNCED 0x00000001 tg3.h 　
9779
 MAC_STATUS_SIGNAL_DETMAC_STATUS_SIGNAL_DET 0x00000002 tg3.h 　
9780
 MAC_STATUS_RCVD_CFGMAC_STATUS_RCVD_CFG 0x00000004 tg3.h 　
9781
 MAC_STATUS_CFG_CHANGEDMAC_STATUS_CFG_CHANGED 0x00000008 tg3.h 　
9782
 MAC_STATUS_SYNC_CHANGEDMAC_STATUS_SYNC_CHANGED 0x00000010 tg3.h 　
9783
 MAC_STATUS_PORT_DEC_ERRMAC_STATUS_PORT_DEC_ERR 0x00000400 tg3.h 　
9784
 MAC_STATUS_LNKSTATE_CHANGEDMAC_STATUS_LNKSTATE_CHANGED 0x00001000 tg3.h 　
9785
 MAC_STATUS_MI_COMPLETIONMAC_STATUS_MI_COMPLETION 0x00400000 tg3.h 　
9786
 MAC_STATUS_MI_INTERRUPTMAC_STATUS_MI_INTERRUPT 0x00800000 tg3.h 　
9787
 MAC_STATUS_AP_ERRORMAC_STATUS_AP_ERROR 0x01000000 tg3.h 　
9788
 MAC_STATUS_ODI_ERRORMAC_STATUS_ODI_ERROR 0x02000000 tg3.h 　
9789
 MAC_STATUS_RXSTAT_OVERRUNMAC_STATUS_RXSTAT_OVERRUN 0x04000000 tg3.h 　
9790
 MAC_STATUS_TXSTAT_OVERRUNMAC_STATUS_TXSTAT_OVERRUN 0x08000000 tg3.h 　
9791
 MAC_EVENTMAC_EVENT 0x00000408 tg3.h 　
9792
 MAC_EVENT_PORT_DECODE_ERRMAC_EVENT_PORT_DECODE_ERR 0x00000400 tg3.h 　
9793
 MAC_EVENT_LNKSTATE_CHANGEDMAC_EVENT_LNKSTATE_CHANGED 0x00001000 tg3.h 　
9794
 MAC_EVENT_MI_COMPLETIONMAC_EVENT_MI_COMPLETION 0x00400000 tg3.h 　
9795
 MAC_EVENT_MI_INTERRUPTMAC_EVENT_MI_INTERRUPT 0x00800000 tg3.h 　
9796
 MAC_EVENT_AP_ERRORMAC_EVENT_AP_ERROR 0x01000000 tg3.h 　
9797
 MAC_EVENT_ODI_ERRORMAC_EVENT_ODI_ERROR 0x02000000 tg3.h 　
9798
 MAC_EVENT_RXSTAT_OVERRUNMAC_EVENT_RXSTAT_OVERRUN 0x04000000 tg3.h 　
9799
 MAC_EVENT_TXSTAT_OVERRUNMAC_EVENT_TXSTAT_OVERRUN 0x08000000 tg3.h 　
9800
 MAC_LED_CTRLMAC_LED_CTRL 0x0000040c tg3.h 　
9801
 LED_CTRL_LNKLED_OVERRIDELED_CTRL_LNKLED_OVERRIDE 0x00000001 tg3.h 　
9802
 LED_CTRL_1000MBPS_ONLED_CTRL_1000MBPS_ON 0x00000002 tg3.h 　
9803
 LED_CTRL_100MBPS_ONLED_CTRL_100MBPS_ON 0x00000004 tg3.h 　
9804
 LED_CTRL_10MBPS_ONLED_CTRL_10MBPS_ON 0x00000008 tg3.h 　
9805
 LED_CTRL_TRAFFIC_OVERRIDELED_CTRL_TRAFFIC_OVERRIDE 0x00000010 tg3.h 　
9806
 LED_CTRL_TRAFFIC_BLINKLED_CTRL_TRAFFIC_BLINK 0x00000020 tg3.h 　
9807
 LED_CTRL_TRAFFIC_LEDLED_CTRL_TRAFFIC_LED 0x00000040 tg3.h 　
9808
 LED_CTRL_1000MBPS_STATUSLED_CTRL_1000MBPS_STATUS 0x00000080 tg3.h 　
9809
 LED_CTRL_100MBPS_STATUSLED_CTRL_100MBPS_STATUS 0x00000100 tg3.h 　
9810
 LED_CTRL_10MBPS_STATUSLED_CTRL_10MBPS_STATUS 0x00000200 tg3.h 　
9811
 LED_CTRL_TRAFFIC_STATUSLED_CTRL_TRAFFIC_STATUS 0x00000400 tg3.h 　
9812
 LED_CTRL_MAC_MODELED_CTRL_MAC_MODE 0x00000000 tg3.h 　
9813
 LED_CTRL_PHY_MODE_1LED_CTRL_PHY_MODE_1 0x00000800 tg3.h 　
9814
 LED_CTRL_PHY_MODE_2LED_CTRL_PHY_MODE_2 0x00001000 tg3.h 　
9815
 LED_CTRL_BLINK_RATE_MASKLED_CTRL_BLINK_RATE_MASK 0x7ff80000 tg3.h 　
9816
 LED_CTRL_BLINK_RATE_SHIFTLED_CTRL_BLINK_RATE_SHIFT 19 tg3.h 　
9817
 LED_CTRL_BLINK_PER_OVERRIDELED_CTRL_BLINK_PER_OVERRIDE 0x00080000 tg3.h 　
9818
 LED_CTRL_BLINK_RATE_OVERRIDELED_CTRL_BLINK_RATE_OVERRIDE 0x80000000 tg3.h 　
9819
 MAC_ADDR_0_HIGHMAC_ADDR_0_HIGH 0x00000410 tg3.h upper 2 bytes
9820
 MAC_ADDR_0_LOWMAC_ADDR_0_LOW 0x00000414 tg3.h lower 4 bytes
9821
 MAC_ADDR_1_HIGHMAC_ADDR_1_HIGH 0x00000418 tg3.h upper 2 bytes
9822
 MAC_ADDR_1_LOWMAC_ADDR_1_LOW 0x0000041c tg3.h lower 4 bytes
9823
 MAC_ADDR_2_HIGHMAC_ADDR_2_HIGH 0x00000420 tg3.h upper 2 bytes
9824
 MAC_ADDR_2_LOWMAC_ADDR_2_LOW 0x00000424 tg3.h lower 4 bytes
9825
 MAC_ADDR_3_HIGHMAC_ADDR_3_HIGH 0x00000428 tg3.h upper 2 bytes
9826
 MAC_ADDR_3_LOWMAC_ADDR_3_LOW 0x0000042c tg3.h lower 4 bytes
9827
 MAC_ACPI_MBUF_PTRMAC_ACPI_MBUF_PTR 0x00000430 tg3.h 　
9828
 MAC_ACPI_LEN_OFFSETMAC_ACPI_LEN_OFFSET 0x00000434 tg3.h 　
9829
 ACPI_LENOFF_LEN_MASKACPI_LENOFF_LEN_MASK 0x0000ffff tg3.h 　
9830
 ACPI_LENOFF_LEN_SHIFTACPI_LENOFF_LEN_SHIFT 0 tg3.h 　
9831
 ACPI_LENOFF_OFF_MASKACPI_LENOFF_OFF_MASK 0x0fff0000 tg3.h 　
9832
 ACPI_LENOFF_OFF_SHIFTACPI_LENOFF_OFF_SHIFT 16 tg3.h 　
9833
 MAC_TX_BACKOFF_SEEDMAC_TX_BACKOFF_SEED 0x00000438 tg3.h 　
9834
 TX_BACKOFF_SEED_MASKTX_BACKOFF_SEED_MASK 0x000003ff tg3.h 　
9835
 MAC_RX_MTU_SIZEMAC_RX_MTU_SIZE 0x0000043c tg3.h 　
9836
 RX_MTU_SIZE_MASKRX_MTU_SIZE_MASK 0x0000ffff tg3.h 　
9837
 MAC_PCS_TESTMAC_PCS_TEST 0x00000440 tg3.h 　
9838
 PCS_TEST_PATTERN_MASKPCS_TEST_PATTERN_MASK 0x000fffff tg3.h 　
9839
 PCS_TEST_PATTERN_SHIFTPCS_TEST_PATTERN_SHIFT 0 tg3.h 　
9840
 PCS_TEST_ENABLEPCS_TEST_ENABLE 0x00100000 tg3.h 　
9841
 MAC_TX_AUTO_NEGMAC_TX_AUTO_NEG 0x00000444 tg3.h 　
9842
 TX_AUTO_NEG_MASKTX_AUTO_NEG_MASK 0x0000ffff tg3.h 　
9843
 TX_AUTO_NEG_SHIFTTX_AUTO_NEG_SHIFT 0 tg3.h 　
9844
 MAC_RX_AUTO_NEGMAC_RX_AUTO_NEG 0x00000448 tg3.h 　
9845
 RX_AUTO_NEG_MASKRX_AUTO_NEG_MASK 0x0000ffff tg3.h 　
9846
 RX_AUTO_NEG_SHIFTRX_AUTO_NEG_SHIFT 0 tg3.h 　
9847
 MAC_MI_COMMAC_MI_COM 0x0000044c tg3.h 　
9848
 MI_COM_CMD_MASKMI_COM_CMD_MASK 0x0c000000 tg3.h 　
9849
 MI_COM_CMD_WRITEMI_COM_CMD_WRITE 0x04000000 tg3.h 　
9850
 MI_COM_CMD_READMI_COM_CMD_READ 0x08000000 tg3.h 　
9851
 MI_COM_READ_FAILEDMI_COM_READ_FAILED 0x10000000 tg3.h 　
9852
 MI_COM_STARTMI_COM_START 0x20000000 tg3.h 　
9853
 MI_COM_BUSYMI_COM_BUSY 0x20000000 tg3.h 　
9854
 MI_COM_PHY_ADDR_MASKMI_COM_PHY_ADDR_MASK 0x03e00000 tg3.h 　
9855
 MI_COM_PHY_ADDR_SHIFTMI_COM_PHY_ADDR_SHIFT 21 tg3.h 　
9856
 MI_COM_REG_ADDR_MASKMI_COM_REG_ADDR_MASK 0x001f0000 tg3.h 　
9857
 MI_COM_REG_ADDR_SHIFTMI_COM_REG_ADDR_SHIFT 16 tg3.h 　
9858
 MI_COM_DATA_MASKMI_COM_DATA_MASK 0x0000ffff tg3.h 　
9859
 MAC_MI_STATMAC_MI_STAT 0x00000450 tg3.h 　
9860
 MAC_MI_STAT_LNKSTAT_ATTN_ENABMAC_MI_STAT_LNKSTAT_ATTN_ENAB 0x00000001 tg3.h 　
9861
 MAC_MI_MODEMAC_MI_MODE 0x00000454 tg3.h 　
9862
 MAC_MI_MODE_CLK_10MHZMAC_MI_MODE_CLK_10MHZ 0x00000001 tg3.h 　
9863
 MAC_MI_MODE_SHORT_PREAMBLEMAC_MI_MODE_SHORT_PREAMBLE 0x00000002 tg3.h 　
9864
 MAC_MI_MODE_AUTO_POLLMAC_MI_MODE_AUTO_POLL 0x00000010 tg3.h 　
9865
 MAC_MI_MODE_CORE_CLK_62MHZMAC_MI_MODE_CORE_CLK_62MHZ 0x00008000 tg3.h 　
9866
 MAC_MI_MODE_BASEMAC_MI_MODE_BASE 0x000c0000 tg3.h XXX magic values XXX
9867
 MAC_AUTO_POLL_STATUSMAC_AUTO_POLL_STATUS 0x00000458 tg3.h 　
9868
 MAC_AUTO_POLL_ERRORMAC_AUTO_POLL_ERROR 0x00000001 tg3.h 　
9869
 MAC_TX_MODEMAC_TX_MODE 0x0000045c tg3.h 　
9870
 TX_MODE_RESETTX_MODE_RESET 0x00000001 tg3.h 　
9871
 TX_MODE_ENABLETX_MODE_ENABLE 0x00000002 tg3.h 　
9872
 TX_MODE_FLOW_CTRL_ENABLETX_MODE_FLOW_CTRL_ENABLE 0x00000010 tg3.h 　
9873
 TX_MODE_BIG_BCKOFF_ENABLETX_MODE_BIG_BCKOFF_ENABLE 0x00000020 tg3.h 　
9874
 TX_MODE_LONG_PAUSE_ENABLETX_MODE_LONG_PAUSE_ENABLE 0x00000040 tg3.h 　
9875
 MAC_TX_STATUSMAC_TX_STATUS 0x00000460 tg3.h 　
9876
 TX_STATUS_XOFFEDTX_STATUS_XOFFED 0x00000001 tg3.h 　
9877
 TX_STATUS_SENT_XOFFTX_STATUS_SENT_XOFF 0x00000002 tg3.h 　
9878
 TX_STATUS_SENT_XONTX_STATUS_SENT_XON 0x00000004 tg3.h 　
9879
 TX_STATUS_LINK_UPTX_STATUS_LINK_UP 0x00000008 tg3.h 　
9880
 TX_STATUS_ODI_UNDERRUNTX_STATUS_ODI_UNDERRUN 0x00000010 tg3.h 　
9881
 TX_STATUS_ODI_OVERRUNTX_STATUS_ODI_OVERRUN 0x00000020 tg3.h 　
9882
 MAC_TX_LENGTHSMAC_TX_LENGTHS 0x00000464 tg3.h 　
9883
 TX_LENGTHS_SLOT_TIME_MASKTX_LENGTHS_SLOT_TIME_MASK 0x000000ff tg3.h 　
9884
 TX_LENGTHS_SLOT_TIME_SHIFTTX_LENGTHS_SLOT_TIME_SHIFT 0 tg3.h 　
9885
 TX_LENGTHS_IPG_MASKTX_LENGTHS_IPG_MASK 0x00000f00 tg3.h 　
9886
 TX_LENGTHS_IPG_SHIFTTX_LENGTHS_IPG_SHIFT 8 tg3.h 　
9887
 TX_LENGTHS_IPG_CRS_MASKTX_LENGTHS_IPG_CRS_MASK 0x00003000 tg3.h 　
9888
 TX_LENGTHS_IPG_CRS_SHIFTTX_LENGTHS_IPG_CRS_SHIFT 12 tg3.h 　
9889
 MAC_RX_MODEMAC_RX_MODE 0x00000468 tg3.h 　
9890
 RX_MODE_RESETRX_MODE_RESET 0x00000001 tg3.h 　
9891
 RX_MODE_ENABLERX_MODE_ENABLE 0x00000002 tg3.h 　
9892
 RX_MODE_FLOW_CTRL_ENABLERX_MODE_FLOW_CTRL_ENABLE 0x00000004 tg3.h 　
9893
 RX_MODE_KEEP_MAC_CTRLRX_MODE_KEEP_MAC_CTRL 0x00000008 tg3.h 　
9894
 RX_MODE_KEEP_PAUSERX_MODE_KEEP_PAUSE 0x00000010 tg3.h 　
9895
 RX_MODE_ACCEPT_OVERSIZEDRX_MODE_ACCEPT_OVERSIZED 0x00000020 tg3.h 　
9896
 RX_MODE_ACCEPT_RUNTSRX_MODE_ACCEPT_RUNTS 0x00000040 tg3.h 　
9897
 RX_MODE_LEN_CHECKRX_MODE_LEN_CHECK 0x00000080 tg3.h 　
9898
 RX_MODE_PROMISCRX_MODE_PROMISC 0x00000100 tg3.h 　
9899
 RX_MODE_NO_CRC_CHECKRX_MODE_NO_CRC_CHECK 0x00000200 tg3.h 　
9900
 RX_MODE_KEEP_VLAN_TAGRX_MODE_KEEP_VLAN_TAG 0x00000400 tg3.h 　
9901
 MAC_RX_STATUSMAC_RX_STATUS 0x0000046c tg3.h 　
9902
 RX_STATUS_REMOTE_TX_XOFFEDRX_STATUS_REMOTE_TX_XOFFED 0x00000001 tg3.h 　
9903
 RX_STATUS_XOFF_RCVDRX_STATUS_XOFF_RCVD 0x00000002 tg3.h 　
9904
 RX_STATUS_XON_RCVDRX_STATUS_XON_RCVD 0x00000004 tg3.h 　
9905
 MAC_HASH_REG_0MAC_HASH_REG_0 0x00000470 tg3.h 　
9906
 MAC_HASH_REG_1MAC_HASH_REG_1 0x00000474 tg3.h 　
9907
 MAC_HASH_REG_2MAC_HASH_REG_2 0x00000478 tg3.h 　
9908
 MAC_HASH_REG_3MAC_HASH_REG_3 0x0000047c tg3.h 　
9909
 MAC_RCV_RULE_0MAC_RCV_RULE_0 0x00000480 tg3.h 　
9910
 MAC_RCV_VALUE_0MAC_RCV_VALUE_0 0x00000484 tg3.h 　
9911
 MAC_RCV_RULE_1MAC_RCV_RULE_1 0x00000488 tg3.h 　
9912
 MAC_RCV_VALUE_1MAC_RCV_VALUE_1 0x0000048c tg3.h 　
9913
 MAC_RCV_RULE_2MAC_RCV_RULE_2 0x00000490 tg3.h 　
9914
 MAC_RCV_VALUE_2MAC_RCV_VALUE_2 0x00000494 tg3.h 　
9915
 MAC_RCV_RULE_3MAC_RCV_RULE_3 0x00000498 tg3.h 　
9916
 MAC_RCV_VALUE_3MAC_RCV_VALUE_3 0x0000049c tg3.h 　
9917
 MAC_RCV_RULE_4MAC_RCV_RULE_4 0x000004a0 tg3.h 　
9918
 MAC_RCV_VALUE_4MAC_RCV_VALUE_4 0x000004a4 tg3.h 　
9919
 MAC_RCV_RULE_5MAC_RCV_RULE_5 0x000004a8 tg3.h 　
9920
 MAC_RCV_VALUE_5MAC_RCV_VALUE_5 0x000004ac tg3.h 　
9921
 MAC_RCV_RULE_6MAC_RCV_RULE_6 0x000004b0 tg3.h 　
9922
 MAC_RCV_VALUE_6MAC_RCV_VALUE_6 0x000004b4 tg3.h 　
9923
 MAC_RCV_RULE_7MAC_RCV_RULE_7 0x000004b8 tg3.h 　
9924
 MAC_RCV_VALUE_7MAC_RCV_VALUE_7 0x000004bc tg3.h 　
9925
 MAC_RCV_RULE_8MAC_RCV_RULE_8 0x000004c0 tg3.h 　
9926
 MAC_RCV_VALUE_8MAC_RCV_VALUE_8 0x000004c4 tg3.h 　
9927
 MAC_RCV_RULE_9MAC_RCV_RULE_9 0x000004c8 tg3.h 　
9928
 MAC_RCV_VALUE_9MAC_RCV_VALUE_9 0x000004cc tg3.h 　
9929
 MAC_RCV_RULE_10MAC_RCV_RULE_10 0x000004d0 tg3.h 　
9930
 MAC_RCV_VALUE_10MAC_RCV_VALUE_10 0x000004d4 tg3.h 　
9931
 MAC_RCV_RULE_11MAC_RCV_RULE_11 0x000004d8 tg3.h 　
9932
 MAC_RCV_VALUE_11MAC_RCV_VALUE_11 0x000004dc tg3.h 　
9933
 MAC_RCV_RULE_12MAC_RCV_RULE_12 0x000004e0 tg3.h 　
9934
 MAC_RCV_VALUE_12MAC_RCV_VALUE_12 0x000004e4 tg3.h 　
9935
 MAC_RCV_RULE_13MAC_RCV_RULE_13 0x000004e8 tg3.h 　
9936
 MAC_RCV_VALUE_13MAC_RCV_VALUE_13 0x000004ec tg3.h 　
9937
 MAC_RCV_RULE_14MAC_RCV_RULE_14 0x000004f0 tg3.h 　
9938
 MAC_RCV_VALUE_14MAC_RCV_VALUE_14 0x000004f4 tg3.h 　
9939
 MAC_RCV_RULE_15MAC_RCV_RULE_15 0x000004f8 tg3.h 　
9940
 MAC_RCV_VALUE_15MAC_RCV_VALUE_15 0x000004fc tg3.h 　
9941
 RCV_RULE_DISABLE_MASKRCV_RULE_DISABLE_MASK 0x7fffffff tg3.h 　
9942
 MAC_RCV_RULE_CFGMAC_RCV_RULE_CFG 0x00000500 tg3.h 　
9943
 RCV_RULE_CFG_DEFAULT_CLASSRCV_RULE_CFG_DEFAULT_CLASS 0x00000008 tg3.h 　
9944
 MAC_LOW_WMARK_MAX_RX_FRAMEMAC_LOW_WMARK_MAX_RX_FRAME 0x00000504 tg3.h 　
9945
 MAC_HASHREGU_0MAC_HASHREGU_0 0x00000520 tg3.h 　
9946
 MAC_HASHREGU_1MAC_HASHREGU_1 0x00000524 tg3.h 　
9947
 MAC_HASHREGU_2MAC_HASHREGU_2 0x00000528 tg3.h 　
9948
 MAC_HASHREGU_3MAC_HASHREGU_3 0x0000052c tg3.h 　
9949
 MAC_EXTADDR_0_HIGHMAC_EXTADDR_0_HIGH 0x00000530 tg3.h 　
9950
 MAC_EXTADDR_0_LOWMAC_EXTADDR_0_LOW 0x00000534 tg3.h 　
9951
 MAC_EXTADDR_1_HIGHMAC_EXTADDR_1_HIGH 0x00000538 tg3.h 　
9952
 MAC_EXTADDR_1_LOWMAC_EXTADDR_1_LOW 0x0000053c tg3.h 　
9953
 MAC_EXTADDR_2_HIGHMAC_EXTADDR_2_HIGH 0x00000540 tg3.h 　
9954
 MAC_EXTADDR_2_LOWMAC_EXTADDR_2_LOW 0x00000544 tg3.h 　
9955
 MAC_EXTADDR_3_HIGHMAC_EXTADDR_3_HIGH 0x00000548 tg3.h 　
9956
 MAC_EXTADDR_3_LOWMAC_EXTADDR_3_LOW 0x0000054c tg3.h 　
9957
 MAC_EXTADDR_4_HIGHMAC_EXTADDR_4_HIGH 0x00000550 tg3.h 　
9958
 MAC_EXTADDR_4_LOWMAC_EXTADDR_4_LOW 0x00000554 tg3.h 　
9959
 MAC_EXTADDR_5_HIGHMAC_EXTADDR_5_HIGH 0x00000558 tg3.h 　
9960
 MAC_EXTADDR_5_LOWMAC_EXTADDR_5_LOW 0x0000055c tg3.h 　
9961
 MAC_EXTADDR_6_HIGHMAC_EXTADDR_6_HIGH 0x00000560 tg3.h 　
9962
 MAC_EXTADDR_6_LOWMAC_EXTADDR_6_LOW 0x00000564 tg3.h 　
9963
 MAC_EXTADDR_7_HIGHMAC_EXTADDR_7_HIGH 0x00000568 tg3.h 　
9964
 MAC_EXTADDR_7_LOWMAC_EXTADDR_7_LOW 0x0000056c tg3.h 　
9965
 MAC_EXTADDR_8_HIGHMAC_EXTADDR_8_HIGH 0x00000570 tg3.h 　
9966
 MAC_EXTADDR_8_LOWMAC_EXTADDR_8_LOW 0x00000574 tg3.h 　
9967
 MAC_EXTADDR_9_HIGHMAC_EXTADDR_9_HIGH 0x00000578 tg3.h 　
9968
 MAC_EXTADDR_9_LOWMAC_EXTADDR_9_LOW 0x0000057c tg3.h 　
9969
 MAC_EXTADDR_10_HIGHMAC_EXTADDR_10_HIGH 0x00000580 tg3.h 　
9970
 MAC_EXTADDR_10_LOWMAC_EXTADDR_10_LOW 0x00000584 tg3.h 　
9971
 MAC_EXTADDR_11_HIGHMAC_EXTADDR_11_HIGH 0x00000588 tg3.h 　
9972
 MAC_EXTADDR_11_LOWMAC_EXTADDR_11_LOW 0x0000058c tg3.h 　
9973
 MAC_SERDES_CFGMAC_SERDES_CFG 0x00000590 tg3.h 　
9974
 MAC_SERDES_STATMAC_SERDES_STAT 0x00000594 tg3.h 　
9975
 MAC_TX_MAC_STATE_BASEMAC_TX_MAC_STATE_BASE 0x00000600 tg3.h 16 bytes
9976
 MAC_RX_MAC_STATE_BASEMAC_RX_MAC_STATE_BASE 0x00000610 tg3.h 20 bytes
9977
 MAC_TX_STATS_OCTETSMAC_TX_STATS_OCTETS 0x00000800 tg3.h 　
9978
 MAC_TX_STATS_RESV1MAC_TX_STATS_RESV1 0x00000804 tg3.h 　
9979
 MAC_TX_STATS_COLLISIONSMAC_TX_STATS_COLLISIONS 0x00000808 tg3.h 　
9980
 MAC_TX_STATS_XON_SENTMAC_TX_STATS_XON_SENT 0x0000080c tg3.h 　
9981
 MAC_TX_STATS_XOFF_SENTMAC_TX_STATS_XOFF_SENT 0x00000810 tg3.h 　
9982
 MAC_TX_STATS_RESV2MAC_TX_STATS_RESV2 0x00000814 tg3.h 　
9983
 MAC_TX_STATS_MAC_ERRORSMAC_TX_STATS_MAC_ERRORS 0x00000818 tg3.h 　
9984
 MAC_TX_STATS_SINGLE_COLLISIONSMAC_TX_STATS_SINGLE_COLLISIONS 0x0000081c tg3.h 　
9985
 MAC_TX_STATS_MULT_COLLISIONSMAC_TX_STATS_MULT_COLLISIONS 0x00000820 tg3.h 　
9986
 MAC_TX_STATS_DEFERREDMAC_TX_STATS_DEFERRED 0x00000824 tg3.h 　
9987
 MAC_TX_STATS_RESV3MAC_TX_STATS_RESV3 0x00000828 tg3.h 　
9988
 MAC_TX_STATS_EXCESSIVE_COLMAC_TX_STATS_EXCESSIVE_COL 0x0000082c tg3.h 　
9989
 MAC_TX_STATS_LATE_COLMAC_TX_STATS_LATE_COL 0x00000830 tg3.h 　
9990
 MAC_TX_STATS_RESV4_1MAC_TX_STATS_RESV4_1 0x00000834 tg3.h 　
9991
 MAC_TX_STATS_RESV4_2MAC_TX_STATS_RESV4_2 0x00000838 tg3.h 　
9992
 MAC_TX_STATS_RESV4_3MAC_TX_STATS_RESV4_3 0x0000083c tg3.h 　
9993
 MAC_TX_STATS_RESV4_4MAC_TX_STATS_RESV4_4 0x00000840 tg3.h 　
9994
 MAC_TX_STATS_RESV4_5MAC_TX_STATS_RESV4_5 0x00000844 tg3.h 　
9995
 MAC_TX_STATS_RESV4_6MAC_TX_STATS_RESV4_6 0x00000848 tg3.h 　
9996
 MAC_TX_STATS_RESV4_7MAC_TX_STATS_RESV4_7 0x0000084c tg3.h 　
9997
 MAC_TX_STATS_RESV4_8MAC_TX_STATS_RESV4_8 0x00000850 tg3.h 　
9998
 MAC_TX_STATS_RESV4_9MAC_TX_STATS_RESV4_9 0x00000854 tg3.h 　
9999
 MAC_TX_STATS_RESV4_10MAC_TX_STATS_RESV4_10 0x00000858 tg3.h 　
10000
 MAC_TX_STATS_RESV4_11MAC_TX_STATS_RESV4_11 0x0000085c tg3.h 　
10001
 MAC_TX_STATS_RESV4_12MAC_TX_STATS_RESV4_12 0x00000860 tg3.h 　
10002
 MAC_TX_STATS_RESV4_13MAC_TX_STATS_RESV4_13 0x00000864 tg3.h 　
10003
 MAC_TX_STATS_RESV4_14MAC_TX_STATS_RESV4_14 0x00000868 tg3.h 　
10004
 MAC_TX_STATS_UCASTMAC_TX_STATS_UCAST 0x0000086c tg3.h 　
10005
 MAC_TX_STATS_MCASTMAC_TX_STATS_MCAST 0x00000870 tg3.h 　
10006
 MAC_TX_STATS_BCASTMAC_TX_STATS_BCAST 0x00000874 tg3.h 　
10007
 MAC_TX_STATS_RESV5_1MAC_TX_STATS_RESV5_1 0x00000878 tg3.h 　
10008
 MAC_TX_STATS_RESV5_2MAC_TX_STATS_RESV5_2 0x0000087c tg3.h 　
10009
 MAC_RX_STATS_OCTETSMAC_RX_STATS_OCTETS 0x00000880 tg3.h 　
10010
 MAC_RX_STATS_RESV1MAC_RX_STATS_RESV1 0x00000884 tg3.h 　
10011
 MAC_RX_STATS_FRAGMENTSMAC_RX_STATS_FRAGMENTS 0x00000888 tg3.h 　
10012
 MAC_RX_STATS_UCASTMAC_RX_STATS_UCAST 0x0000088c tg3.h 　
10013
 MAC_RX_STATS_MCASTMAC_RX_STATS_MCAST 0x00000890 tg3.h 　
10014
 MAC_RX_STATS_BCASTMAC_RX_STATS_BCAST 0x00000894 tg3.h 　
10015
 MAC_RX_STATS_FCS_ERRORSMAC_RX_STATS_FCS_ERRORS 0x00000898 tg3.h 　
10016
 MAC_RX_STATS_ALIGN_ERRORSMAC_RX_STATS_ALIGN_ERRORS 0x0000089c tg3.h 　
10017
 MAC_RX_STATS_XON_PAUSE_RECVDMAC_RX_STATS_XON_PAUSE_RECVD 0x000008a0 tg3.h 　
10018
 MAC_RX_STATS_XOFF_PAUSE_RECVDMAC_RX_STATS_XOFF_PAUSE_RECVD 0x000008a4 tg3.h 　
10019
 MAC_RX_STATS_MAC_CTRL_RECVDMAC_RX_STATS_MAC_CTRL_RECVD 0x000008a8 tg3.h 　
10020
 MAC_RX_STATS_XOFF_ENTEREDMAC_RX_STATS_XOFF_ENTERED 0x000008ac tg3.h 　
10021
 MAC_RX_STATS_FRAME_TOO_LONGMAC_RX_STATS_FRAME_TOO_LONG 0x000008b0 tg3.h 　
10022
 MAC_RX_STATS_JABBERSMAC_RX_STATS_JABBERS 0x000008b4 tg3.h 　
10023
 MAC_RX_STATS_UNDERSIZEMAC_RX_STATS_UNDERSIZE 0x000008b8 tg3.h 　
10024
 SNDDATAI_MODESNDDATAI_MODE 0x00000c00 tg3.h 　
10025
 SNDDATAI_MODE_RESETSNDDATAI_MODE_RESET 0x00000001 tg3.h 　
10026
 SNDDATAI_MODE_ENABLESNDDATAI_MODE_ENABLE 0x00000002 tg3.h 　
10027
 SNDDATAI_MODE_STAT_OFLOW_ENABSNDDATAI_MODE_STAT_OFLOW_ENAB 0x00000004 tg3.h 　
10028
 SNDDATAI_STATUSSNDDATAI_STATUS 0x00000c04 tg3.h 　
10029
 SNDDATAI_STATUS_STAT_OFLOWSNDDATAI_STATUS_STAT_OFLOW 0x00000004 tg3.h 　
10030
 SNDDATAI_STATSCTRLSNDDATAI_STATSCTRL 0x00000c08 tg3.h 　
10031
 SNDDATAI_SCTRL_ENABLESNDDATAI_SCTRL_ENABLE 0x00000001 tg3.h 　
10032
 SNDDATAI_SCTRL_FASTUPDSNDDATAI_SCTRL_FASTUPD 0x00000002 tg3.h 　
10033
 SNDDATAI_SCTRL_CLEARSNDDATAI_SCTRL_CLEAR 0x00000004 tg3.h 　
10034
 SNDDATAI_SCTRL_FLUSHSNDDATAI_SCTRL_FLUSH 0x00000008 tg3.h 　
10035
 SNDDATAI_SCTRL_FORCE_ZEROSNDDATAI_SCTRL_FORCE_ZERO 0x00000010 tg3.h 　
10036
 SNDDATAI_STATSENABSNDDATAI_STATSENAB 0x00000c0c tg3.h 　
10037
 SNDDATAI_STATSINCMASKSNDDATAI_STATSINCMASK 0x00000c10 tg3.h 　
10038
 SNDDATAI_COS_CNT_0SNDDATAI_COS_CNT_0 0x00000c80 tg3.h 　
10039
 SNDDATAI_COS_CNT_1SNDDATAI_COS_CNT_1 0x00000c84 tg3.h 　
10040
 SNDDATAI_COS_CNT_2SNDDATAI_COS_CNT_2 0x00000c88 tg3.h 　
10041
 SNDDATAI_COS_CNT_3SNDDATAI_COS_CNT_3 0x00000c8c tg3.h 　
10042
 SNDDATAI_COS_CNT_4SNDDATAI_COS_CNT_4 0x00000c90 tg3.h 　
10043
 SNDDATAI_COS_CNT_5SNDDATAI_COS_CNT_5 0x00000c94 tg3.h 　
10044
 SNDDATAI_COS_CNT_6SNDDATAI_COS_CNT_6 0x00000c98 tg3.h 　
10045
 SNDDATAI_COS_CNT_7SNDDATAI_COS_CNT_7 0x00000c9c tg3.h 　
10046
 SNDDATAI_COS_CNT_8SNDDATAI_COS_CNT_8 0x00000ca0 tg3.h 　
10047
 SNDDATAI_COS_CNT_9SNDDATAI_COS_CNT_9 0x00000ca4 tg3.h 　
10048
 SNDDATAI_COS_CNT_10SNDDATAI_COS_CNT_10 0x00000ca8 tg3.h 　
10049
 SNDDATAI_COS_CNT_11SNDDATAI_COS_CNT_11 0x00000cac tg3.h 　
10050
 SNDDATAI_COS_CNT_12SNDDATAI_COS_CNT_12 0x00000cb0 tg3.h 　
10051
 SNDDATAI_COS_CNT_13SNDDATAI_COS_CNT_13 0x00000cb4 tg3.h 　
10052
 SNDDATAI_COS_CNT_14SNDDATAI_COS_CNT_14 0x00000cb8 tg3.h 　
10053
 SNDDATAI_COS_CNT_15SNDDATAI_COS_CNT_15 0x00000cbc tg3.h 　
10054
 SNDDATAI_DMA_RDQ_FULL_CNTSNDDATAI_DMA_RDQ_FULL_CNT 0x00000cc0 tg3.h 　
10055
 SNDDATAI_DMA_PRIO_RDQ_FULL_CNTSNDDATAI_DMA_PRIO_RDQ_FULL_CNT 0x00000cc4 tg3.h 　
10056
 SNDDATAI_SDCQ_FULL_CNTSNDDATAI_SDCQ_FULL_CNT 0x00000cc8 tg3.h 　
10057
 SNDDATAI_NICRNG_SSND_PIDX_CNTSNDDATAI_NICRNG_SSND_PIDX_CNT 0x00000ccc tg3.h 　
10058
 SNDDATAI_STATS_UPDATED_CNTSNDDATAI_STATS_UPDATED_CNT 0x00000cd0 tg3.h 　
10059
 SNDDATAI_INTERRUPTS_CNTSNDDATAI_INTERRUPTS_CNT 0x00000cd4 tg3.h 　
10060
 SNDDATAI_AVOID_INTERRUPTS_CNTSNDDATAI_AVOID_INTERRUPTS_CNT 0x00000cd8 tg3.h 　
10061
 SNDDATAI_SND_THRESH_HIT_CNTSNDDATAI_SND_THRESH_HIT_CNT 0x00000cdc tg3.h 　
10062
 SNDDATAC_MODESNDDATAC_MODE 0x00001000 tg3.h 　
10063
 SNDDATAC_MODE_RESETSNDDATAC_MODE_RESET 0x00000001 tg3.h 　
10064
 SNDDATAC_MODE_ENABLESNDDATAC_MODE_ENABLE 0x00000002 tg3.h 　
10065
 SNDBDS_MODESNDBDS_MODE 0x00001400 tg3.h 　
10066
 SNDBDS_MODE_RESETSNDBDS_MODE_RESET 0x00000001 tg3.h 　
10067
 SNDBDS_MODE_ENABLESNDBDS_MODE_ENABLE 0x00000002 tg3.h 　
10068
 SNDBDS_MODE_ATTN_ENABLESNDBDS_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
10069
 SNDBDS_STATUSSNDBDS_STATUS 0x00001404 tg3.h 　
10070
 SNDBDS_STATUS_ERROR_ATTNSNDBDS_STATUS_ERROR_ATTN 0x00000004 tg3.h 　
10071
 SNDBDS_HWDIAGSNDBDS_HWDIAG 0x00001408 tg3.h 　
10072
 SNDBDS_SEL_CON_IDX_0SNDBDS_SEL_CON_IDX_0 0x00001440 tg3.h 　
10073
 SNDBDS_SEL_CON_IDX_1SNDBDS_SEL_CON_IDX_1 0x00001444 tg3.h 　
10074
 SNDBDS_SEL_CON_IDX_2SNDBDS_SEL_CON_IDX_2 0x00001448 tg3.h 　
10075
 SNDBDS_SEL_CON_IDX_3SNDBDS_SEL_CON_IDX_3 0x0000144c tg3.h 　
10076
 SNDBDS_SEL_CON_IDX_4SNDBDS_SEL_CON_IDX_4 0x00001450 tg3.h 　
10077
 SNDBDS_SEL_CON_IDX_5SNDBDS_SEL_CON_IDX_5 0x00001454 tg3.h 　
10078
 SNDBDS_SEL_CON_IDX_6SNDBDS_SEL_CON_IDX_6 0x00001458 tg3.h 　
10079
 SNDBDS_SEL_CON_IDX_7SNDBDS_SEL_CON_IDX_7 0x0000145c tg3.h 　
10080
 SNDBDS_SEL_CON_IDX_8SNDBDS_SEL_CON_IDX_8 0x00001460 tg3.h 　
10081
 SNDBDS_SEL_CON_IDX_9SNDBDS_SEL_CON_IDX_9 0x00001464 tg3.h 　
10082
 SNDBDS_SEL_CON_IDX_10SNDBDS_SEL_CON_IDX_10 0x00001468 tg3.h 　
10083
 SNDBDS_SEL_CON_IDX_11SNDBDS_SEL_CON_IDX_11 0x0000146c tg3.h 　
10084
 SNDBDS_SEL_CON_IDX_12SNDBDS_SEL_CON_IDX_12 0x00001470 tg3.h 　
10085
 SNDBDS_SEL_CON_IDX_13SNDBDS_SEL_CON_IDX_13 0x00001474 tg3.h 　
10086
 SNDBDS_SEL_CON_IDX_14SNDBDS_SEL_CON_IDX_14 0x00001478 tg3.h 　
10087
 SNDBDS_SEL_CON_IDX_15SNDBDS_SEL_CON_IDX_15 0x0000147c tg3.h 　
10088
 SNDBDI_MODESNDBDI_MODE 0x00001800 tg3.h 　
10089
 SNDBDI_MODE_RESETSNDBDI_MODE_RESET 0x00000001 tg3.h 　
10090
 SNDBDI_MODE_ENABLESNDBDI_MODE_ENABLE 0x00000002 tg3.h 　
10091
 SNDBDI_MODE_ATTN_ENABLESNDBDI_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
10092
 SNDBDI_STATUSSNDBDI_STATUS 0x00001804 tg3.h 　
10093
 SNDBDI_STATUS_ERROR_ATTNSNDBDI_STATUS_ERROR_ATTN 0x00000004 tg3.h 　
10094
 SNDBDI_IN_PROD_IDX_0SNDBDI_IN_PROD_IDX_0 0x00001808 tg3.h 　
10095
 SNDBDI_IN_PROD_IDX_1SNDBDI_IN_PROD_IDX_1 0x0000180c tg3.h 　
10096
 SNDBDI_IN_PROD_IDX_2SNDBDI_IN_PROD_IDX_2 0x00001810 tg3.h 　
10097
 SNDBDI_IN_PROD_IDX_3SNDBDI_IN_PROD_IDX_3 0x00001814 tg3.h 　
10098
 SNDBDI_IN_PROD_IDX_4SNDBDI_IN_PROD_IDX_4 0x00001818 tg3.h 　
10099
 SNDBDI_IN_PROD_IDX_5SNDBDI_IN_PROD_IDX_5 0x0000181c tg3.h 　
10100
 SNDBDI_IN_PROD_IDX_6SNDBDI_IN_PROD_IDX_6 0x00001820 tg3.h 　
10101
 SNDBDI_IN_PROD_IDX_7SNDBDI_IN_PROD_IDX_7 0x00001824 tg3.h 　
10102
 SNDBDI_IN_PROD_IDX_8SNDBDI_IN_PROD_IDX_8 0x00001828 tg3.h 　
10103
 SNDBDI_IN_PROD_IDX_9SNDBDI_IN_PROD_IDX_9 0x0000182c tg3.h 　
10104
 SNDBDI_IN_PROD_IDX_10SNDBDI_IN_PROD_IDX_10 0x00001830 tg3.h 　
10105
 SNDBDI_IN_PROD_IDX_11SNDBDI_IN_PROD_IDX_11 0x00001834 tg3.h 　
10106
 SNDBDI_IN_PROD_IDX_12SNDBDI_IN_PROD_IDX_12 0x00001838 tg3.h 　
10107
 SNDBDI_IN_PROD_IDX_13SNDBDI_IN_PROD_IDX_13 0x0000183c tg3.h 　
10108
 SNDBDI_IN_PROD_IDX_14SNDBDI_IN_PROD_IDX_14 0x00001840 tg3.h 　
10109
 SNDBDI_IN_PROD_IDX_15SNDBDI_IN_PROD_IDX_15 0x00001844 tg3.h 　
10110
 SNDBDC_MODESNDBDC_MODE 0x00001c00 tg3.h 　
10111
 SNDBDC_MODE_RESETSNDBDC_MODE_RESET 0x00000001 tg3.h 　
10112
 SNDBDC_MODE_ENABLESNDBDC_MODE_ENABLE 0x00000002 tg3.h 　
10113
 SNDBDC_MODE_ATTN_ENABLESNDBDC_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
10114
 RCVLPC_MODERCVLPC_MODE 0x00002000 tg3.h 　
10115
 RCVLPC_MODE_RESETRCVLPC_MODE_RESET 0x00000001 tg3.h 　
10116
 RCVLPC_MODE_ENABLERCVLPC_MODE_ENABLE 0x00000002 tg3.h 　
10117
 RCVLPC_MODE_CLASS0_ATTN_ENABRCVLPC_MODE_CLASS0_ATTN_ENAB 0x00000004 tg3.h 　
10118
 RCVLPC_MODE_MAPOOR_AATTN_ENABRCVLPC_MODE_MAPOOR_AATTN_ENAB 0x00000008 tg3.h 　
10119
 RCVLPC_MODE_STAT_OFLOW_ENABRCVLPC_MODE_STAT_OFLOW_ENAB 0x00000010 tg3.h 　
10120
 RCVLPC_STATUSRCVLPC_STATUS 0x00002004 tg3.h 　
10121
 RCVLPC_STATUS_CLASS0RCVLPC_STATUS_CLASS0 0x00000004 tg3.h 　
10122
 RCVLPC_STATUS_MAPOORRCVLPC_STATUS_MAPOOR 0x00000008 tg3.h 　
10123
 RCVLPC_STATUS_STAT_OFLOWRCVLPC_STATUS_STAT_OFLOW 0x00000010 tg3.h 　
10124
 RCVLPC_LOCKRCVLPC_LOCK 0x00002008 tg3.h 　
10125
 RCVLPC_LOCK_REQ_MASKRCVLPC_LOCK_REQ_MASK 0x0000ffff tg3.h 　
10126
 RCVLPC_LOCK_REQ_SHIFTRCVLPC_LOCK_REQ_SHIFT 0 tg3.h 　
10127
 RCVLPC_LOCK_GRANT_MASKRCVLPC_LOCK_GRANT_MASK 0xffff0000 tg3.h 　
10128
 RCVLPC_LOCK_GRANT_SHIFTRCVLPC_LOCK_GRANT_SHIFT 16 tg3.h 　
10129
 RCVLPC_NON_EMPTY_BITSRCVLPC_NON_EMPTY_BITS 0x0000200c tg3.h 　
10130
 RCVLPC_NON_EMPTY_BITS_MASKRCVLPC_NON_EMPTY_BITS_MASK 0x0000ffff tg3.h 　
10131
 RCVLPC_CONFIGRCVLPC_CONFIG 0x00002010 tg3.h 　
10132
 RCVLPC_STATSCTRLRCVLPC_STATSCTRL 0x00002014 tg3.h 　
10133
 RCVLPC_STATSCTRL_ENABLERCVLPC_STATSCTRL_ENABLE 0x00000001 tg3.h 　
10134
 RCVLPC_STATSCTRL_FASTUPDRCVLPC_STATSCTRL_FASTUPD 0x00000002 tg3.h 　
10135
 RCVLPC_STATS_ENABLERCVLPC_STATS_ENABLE 0x00002018 tg3.h 　
10136
 RCVLPC_STATSENAB_LNGBRST_RFIXRCVLPC_STATSENAB_LNGBRST_RFIX 0x00400000 tg3.h 　
10137
 RCVLPC_STATS_INCMASKRCVLPC_STATS_INCMASK 0x0000201c tg3.h 　
10138
 RCVLPC_SELLST_BASERCVLPC_SELLST_BASE 0x00002100 tg3.h 16 16-byte entries
10139
 SELLST_TAILSELLST_TAIL 0x00000004 tg3.h 　
10140
 SELLST_CONTSELLST_CONT 0x00000008 tg3.h 　
10141
 SELLST_UNUSEDSELLST_UNUSED 0x0000000c tg3.h 　
10142
 RCVLPC_COS_CNTL_BASERCVLPC_COS_CNTL_BASE 0x00002200 tg3.h 16 4-byte entries
10143
 RCVLPC_DROP_FILTER_CNTRCVLPC_DROP_FILTER_CNT 0x00002240 tg3.h 　
10144
 RCVLPC_DMA_WQ_FULL_CNTRCVLPC_DMA_WQ_FULL_CNT 0x00002244 tg3.h 　
10145
 RCVLPC_DMA_HIPRIO_WQ_FULL_CNTRCVLPC_DMA_HIPRIO_WQ_FULL_CNT 0x00002248 tg3.h 　
10146
 RCVLPC_NO_RCV_BD_CNTRCVLPC_NO_RCV_BD_CNT 0x0000224c tg3.h 　
10147
 RCVLPC_IN_DISCARDS_CNTRCVLPC_IN_DISCARDS_CNT 0x00002250 tg3.h 　
10148
 RCVLPC_IN_ERRORS_CNTRCVLPC_IN_ERRORS_CNT 0x00002254 tg3.h 　
10149
 RCVLPC_RCV_THRESH_HIT_CNTRCVLPC_RCV_THRESH_HIT_CNT 0x00002258 tg3.h 　
10150
 RCVDBDI_MODERCVDBDI_MODE 0x00002400 tg3.h 　
10151
 RCVDBDI_MODE_RESETRCVDBDI_MODE_RESET 0x00000001 tg3.h 　
10152
 RCVDBDI_MODE_ENABLERCVDBDI_MODE_ENABLE 0x00000002 tg3.h 　
10153
 RCVDBDI_MODE_JUMBOBD_NEEDEDRCVDBDI_MODE_JUMBOBD_NEEDED 0x00000004 tg3.h 　
10154
 RCVDBDI_MODE_FRM_TOO_BIGRCVDBDI_MODE_FRM_TOO_BIG 0x00000008 tg3.h 　
10155
 RCVDBDI_MODE_INV_RING_SZRCVDBDI_MODE_INV_RING_SZ 0x00000010 tg3.h 　
10156
 RCVDBDI_STATUSRCVDBDI_STATUS 0x00002404 tg3.h 　
10157
 RCVDBDI_STATUS_JUMBOBD_NEEDEDRCVDBDI_STATUS_JUMBOBD_NEEDED 0x00000004 tg3.h 　
10158
 RCVDBDI_STATUS_FRM_TOO_BIGRCVDBDI_STATUS_FRM_TOO_BIG 0x00000008 tg3.h 　
10159
 RCVDBDI_STATUS_INV_RING_SZRCVDBDI_STATUS_INV_RING_SZ 0x00000010 tg3.h 　
10160
 RCVDBDI_SPLIT_FRAME_MINSZRCVDBDI_SPLIT_FRAME_MINSZ 0x00002408 tg3.h 　
10161
 RCVDBDI_JUMBO_BDRCVDBDI_JUMBO_BD 0x00002440 tg3.h TG3_BDINFO_...
10162
 RCVDBDI_STD_BDRCVDBDI_STD_BD 0x00002450 tg3.h TG3_BDINFO_...
10163
 RCVDBDI_MINI_BDRCVDBDI_MINI_BD 0x00002460 tg3.h TG3_BDINFO_...
10164
 RCVDBDI_JUMBO_CON_IDXRCVDBDI_JUMBO_CON_IDX 0x00002470 tg3.h 　
10165
 RCVDBDI_STD_CON_IDXRCVDBDI_STD_CON_IDX 0x00002474 tg3.h 　
10166
 RCVDBDI_MINI_CON_IDXRCVDBDI_MINI_CON_IDX 0x00002478 tg3.h 　
10167
 RCVDBDI_BD_PROD_IDX_0RCVDBDI_BD_PROD_IDX_0 0x00002480 tg3.h 　
10168
 RCVDBDI_BD_PROD_IDX_1RCVDBDI_BD_PROD_IDX_1 0x00002484 tg3.h 　
10169
 RCVDBDI_BD_PROD_IDX_2RCVDBDI_BD_PROD_IDX_2 0x00002488 tg3.h 　
10170
 RCVDBDI_BD_PROD_IDX_3RCVDBDI_BD_PROD_IDX_3 0x0000248c tg3.h 　
10171
 RCVDBDI_BD_PROD_IDX_4RCVDBDI_BD_PROD_IDX_4 0x00002490 tg3.h 　
10172
 RCVDBDI_BD_PROD_IDX_5RCVDBDI_BD_PROD_IDX_5 0x00002494 tg3.h 　
10173
 RCVDBDI_BD_PROD_IDX_6RCVDBDI_BD_PROD_IDX_6 0x00002498 tg3.h 　
10174
 RCVDBDI_BD_PROD_IDX_7RCVDBDI_BD_PROD_IDX_7 0x0000249c tg3.h 　
10175
 RCVDBDI_BD_PROD_IDX_8RCVDBDI_BD_PROD_IDX_8 0x000024a0 tg3.h 　
10176
 RCVDBDI_BD_PROD_IDX_9RCVDBDI_BD_PROD_IDX_9 0x000024a4 tg3.h 　
10177
 RCVDBDI_BD_PROD_IDX_10RCVDBDI_BD_PROD_IDX_10 0x000024a8 tg3.h 　
10178
 RCVDBDI_BD_PROD_IDX_11RCVDBDI_BD_PROD_IDX_11 0x000024ac tg3.h 　
10179
 RCVDBDI_BD_PROD_IDX_12RCVDBDI_BD_PROD_IDX_12 0x000024b0 tg3.h 　
10180
 RCVDBDI_BD_PROD_IDX_13RCVDBDI_BD_PROD_IDX_13 0x000024b4 tg3.h 　
10181
 RCVDBDI_BD_PROD_IDX_14RCVDBDI_BD_PROD_IDX_14 0x000024b8 tg3.h 　
10182
 RCVDBDI_BD_PROD_IDX_15RCVDBDI_BD_PROD_IDX_15 0x000024bc tg3.h 　
10183
 RCVDBDI_HWDIAGRCVDBDI_HWDIAG 0x000024c0 tg3.h 　
10184
 RCVDCC_MODERCVDCC_MODE 0x00002800 tg3.h 　
10185
 RCVDCC_MODE_RESETRCVDCC_MODE_RESET 0x00000001 tg3.h 　
10186
 RCVDCC_MODE_ENABLERCVDCC_MODE_ENABLE 0x00000002 tg3.h 　
10187
 RCVDCC_MODE_ATTN_ENABLERCVDCC_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
10188
 RCVBDI_MODERCVBDI_MODE 0x00002c00 tg3.h 　
10189
 RCVBDI_MODE_RESETRCVBDI_MODE_RESET 0x00000001 tg3.h 　
10190
 RCVBDI_MODE_ENABLERCVBDI_MODE_ENABLE 0x00000002 tg3.h 　
10191
 RCVBDI_MODE_RCB_ATTN_ENABRCVBDI_MODE_RCB_ATTN_ENAB 0x00000004 tg3.h 　
10192
 RCVBDI_STATUSRCVBDI_STATUS 0x00002c04 tg3.h 　
10193
 RCVBDI_STATUS_RCB_ATTNRCVBDI_STATUS_RCB_ATTN 0x00000004 tg3.h 　
10194
 RCVBDI_JUMBO_PROD_IDXRCVBDI_JUMBO_PROD_IDX 0x00002c08 tg3.h 　
10195
 RCVBDI_STD_PROD_IDXRCVBDI_STD_PROD_IDX 0x00002c0c tg3.h 　
10196
 RCVBDI_MINI_PROD_IDXRCVBDI_MINI_PROD_IDX 0x00002c10 tg3.h 　
10197
 RCVBDI_MINI_THRESHRCVBDI_MINI_THRESH 0x00002c14 tg3.h 　
10198
 RCVBDI_STD_THRESHRCVBDI_STD_THRESH 0x00002c18 tg3.h 　
10199
 RCVBDI_JUMBO_THRESHRCVBDI_JUMBO_THRESH 0x00002c1c tg3.h 　
10200
 RCVCC_MODERCVCC_MODE 0x00003000 tg3.h 　
10201
 RCVCC_MODE_RESETRCVCC_MODE_RESET 0x00000001 tg3.h 　
10202
 RCVCC_MODE_ENABLERCVCC_MODE_ENABLE 0x00000002 tg3.h 　
10203
 RCVCC_MODE_ATTN_ENABLERCVCC_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
10204
 RCVCC_STATUSRCVCC_STATUS 0x00003004 tg3.h 　
10205
 RCVCC_STATUS_ERROR_ATTNRCVCC_STATUS_ERROR_ATTN 0x00000004 tg3.h 　
10206
 RCVCC_JUMP_PROD_IDXRCVCC_JUMP_PROD_IDX 0x00003008 tg3.h 　
10207
 RCVCC_STD_PROD_IDXRCVCC_STD_PROD_IDX 0x0000300c tg3.h 　
10208
 RCVCC_MINI_PROD_IDXRCVCC_MINI_PROD_IDX 0x00003010 tg3.h 　
10209
 RCVLSC_MODERCVLSC_MODE 0x00003400 tg3.h 　
10210
 RCVLSC_MODE_RESETRCVLSC_MODE_RESET 0x00000001 tg3.h 　
10211
 RCVLSC_MODE_ENABLERCVLSC_MODE_ENABLE 0x00000002 tg3.h 　
10212
 RCVLSC_MODE_ATTN_ENABLERCVLSC_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
10213
 RCVLSC_STATUSRCVLSC_STATUS 0x00003404 tg3.h 　
10214
 RCVLSC_STATUS_ERROR_ATTNRCVLSC_STATUS_ERROR_ATTN 0x00000004 tg3.h 　
10215
 MBFREE_MODEMBFREE_MODE 0x00003800 tg3.h 　
10216
 MBFREE_MODE_RESETMBFREE_MODE_RESET 0x00000001 tg3.h 　
10217
 MBFREE_MODE_ENABLEMBFREE_MODE_ENABLE 0x00000002 tg3.h 　
10218
 MBFREE_STATUSMBFREE_STATUS 0x00003804 tg3.h 　
10219
 HOSTCC_MODEHOSTCC_MODE 0x00003c00 tg3.h 　
10220
 HOSTCC_MODE_RESETHOSTCC_MODE_RESET 0x00000001 tg3.h 　
10221
 HOSTCC_MODE_ENABLEHOSTCC_MODE_ENABLE 0x00000002 tg3.h 　
10222
 HOSTCC_MODE_ATTNHOSTCC_MODE_ATTN 0x00000004 tg3.h 　
10223
 HOSTCC_MODE_NOWHOSTCC_MODE_NOW 0x00000008 tg3.h 　
10224
 HOSTCC_MODE_FULL_STATUSHOSTCC_MODE_FULL_STATUS 0x00000000 tg3.h 　
10225
 HOSTCC_MODE_64BYTEHOSTCC_MODE_64BYTE 0x00000080 tg3.h 　
10226
 HOSTCC_MODE_32BYTEHOSTCC_MODE_32BYTE 0x00000100 tg3.h 　
10227
 HOSTCC_MODE_CLRTICK_RXBDHOSTCC_MODE_CLRTICK_RXBD 0x00000200 tg3.h 　
10228
 HOSTCC_MODE_CLRTICK_TXBDHOSTCC_MODE_CLRTICK_TXBD 0x00000400 tg3.h 　
10229
 HOSTCC_MODE_NOINT_ON_NOWHOSTCC_MODE_NOINT_ON_NOW 0x00000800 tg3.h 　
10230
 HOSTCC_MODE_NOINT_ON_FORCEHOSTCC_MODE_NOINT_ON_FORCE 0x00001000 tg3.h 　
10231
 HOSTCC_STATUSHOSTCC_STATUS 0x00003c04 tg3.h 　
10232
 HOSTCC_STATUS_ERROR_ATTNHOSTCC_STATUS_ERROR_ATTN 0x00000004 tg3.h 　
10233
 HOSTCC_RXCOL_TICKSHOSTCC_RXCOL_TICKS 0x00003c08 tg3.h 　
10234
 LOW_RXCOL_TICKSLOW_RXCOL_TICKS 0x00000032 tg3.h 　
10235
 DEFAULT_RXCOL_TICKSDEFAULT_RXCOL_TICKS 0x00000048 tg3.h 　
10236
 HIGH_RXCOL_TICKSHIGH_RXCOL_TICKS 0x00000096 tg3.h 　
10237
 HOSTCC_TXCOL_TICKSHOSTCC_TXCOL_TICKS 0x00003c0c tg3.h 　
10238
 LOW_TXCOL_TICKSLOW_TXCOL_TICKS 0x00000096 tg3.h 　
10239
 DEFAULT_TXCOL_TICKSDEFAULT_TXCOL_TICKS 0x0000012c tg3.h 　
10240
 HIGH_TXCOL_TICKSHIGH_TXCOL_TICKS 0x00000145 tg3.h 　
10241
 HOSTCC_RXMAX_FRAMESHOSTCC_RXMAX_FRAMES 0x00003c10 tg3.h 　
10242
 LOW_RXMAX_FRAMESLOW_RXMAX_FRAMES 0x00000005 tg3.h 　
10243
 DEFAULT_RXMAX_FRAMESDEFAULT_RXMAX_FRAMES 0x00000008 tg3.h 　
10244
 HIGH_RXMAX_FRAMESHIGH_RXMAX_FRAMES 0x00000012 tg3.h 　
10245
 HOSTCC_TXMAX_FRAMESHOSTCC_TXMAX_FRAMES 0x00003c14 tg3.h 　
10246
 LOW_TXMAX_FRAMESLOW_TXMAX_FRAMES 0x00000035 tg3.h 　
10247
 DEFAULT_TXMAX_FRAMESDEFAULT_TXMAX_FRAMES 0x0000004b tg3.h 　
10248
 HIGH_TXMAX_FRAMESHIGH_TXMAX_FRAMES 0x00000052 tg3.h 　
10249
 HOSTCC_RXCOAL_TICK_INTHOSTCC_RXCOAL_TICK_INT 0x00003c18 tg3.h 　
10250
 DEFAULT_RXCOAL_TICK_INTDEFAULT_RXCOAL_TICK_INT 0x00000019 tg3.h 　
10251
 HOSTCC_TXCOAL_TICK_INTHOSTCC_TXCOAL_TICK_INT 0x00003c1c tg3.h 　
10252
 DEFAULT_TXCOAL_TICK_INTDEFAULT_TXCOAL_TICK_INT 0x00000019 tg3.h 　
10253
 HOSTCC_RXCOAL_MAXF_INTHOSTCC_RXCOAL_MAXF_INT 0x00003c20 tg3.h 　
10254
 DEFAULT_RXCOAL_MAXF_INTDEFAULT_RXCOAL_MAXF_INT 0x00000005 tg3.h 　
10255
 HOSTCC_TXCOAL_MAXF_INTHOSTCC_TXCOAL_MAXF_INT 0x00003c24 tg3.h 　
10256
 DEFAULT_TXCOAL_MAXF_INTDEFAULT_TXCOAL_MAXF_INT 0x00000005 tg3.h 　
10257
 HOSTCC_STAT_COAL_TICKSHOSTCC_STAT_COAL_TICKS 0x00003c28 tg3.h 　
10258
 DEFAULT_STAT_COAL_TICKSDEFAULT_STAT_COAL_TICKS 0x000f4240 tg3.h 　
10259
 HOSTCC_STATS_BLK_HOST_ADDRHOSTCC_STATS_BLK_HOST_ADDR 0x00003c30 tg3.h 64-bit
10260
 HOSTCC_STATUS_BLK_HOST_ADDRHOSTCC_STATUS_BLK_HOST_ADDR 0x00003c38 tg3.h 64-bit
10261
 HOSTCC_STATS_BLK_NIC_ADDRHOSTCC_STATS_BLK_NIC_ADDR 0x00003c40 tg3.h 　
10262
 HOSTCC_STATUS_BLK_NIC_ADDRHOSTCC_STATUS_BLK_NIC_ADDR 0x00003c44 tg3.h 　
10263
 HOSTCC_FLOW_ATTNHOSTCC_FLOW_ATTN 0x00003c48 tg3.h 　
10264
 HOSTCC_JUMBO_CON_IDXHOSTCC_JUMBO_CON_IDX 0x00003c50 tg3.h 　
10265
 HOSTCC_STD_CON_IDXHOSTCC_STD_CON_IDX 0x00003c54 tg3.h 　
10266
 HOSTCC_MINI_CON_IDXHOSTCC_MINI_CON_IDX 0x00003c58 tg3.h 　
10267
 HOSTCC_RET_PROD_IDX_0HOSTCC_RET_PROD_IDX_0 0x00003c80 tg3.h 　
10268
 HOSTCC_RET_PROD_IDX_1HOSTCC_RET_PROD_IDX_1 0x00003c84 tg3.h 　
10269
 HOSTCC_RET_PROD_IDX_2HOSTCC_RET_PROD_IDX_2 0x00003c88 tg3.h 　
10270
 HOSTCC_RET_PROD_IDX_3HOSTCC_RET_PROD_IDX_3 0x00003c8c tg3.h 　
10271
 HOSTCC_RET_PROD_IDX_4HOSTCC_RET_PROD_IDX_4 0x00003c90 tg3.h 　
10272
 HOSTCC_RET_PROD_IDX_5HOSTCC_RET_PROD_IDX_5 0x00003c94 tg3.h 　
10273
 HOSTCC_RET_PROD_IDX_6HOSTCC_RET_PROD_IDX_6 0x00003c98 tg3.h 　
10274
 HOSTCC_RET_PROD_IDX_7HOSTCC_RET_PROD_IDX_7 0x00003c9c tg3.h 　
10275
 HOSTCC_RET_PROD_IDX_8HOSTCC_RET_PROD_IDX_8 0x00003ca0 tg3.h 　
10276
 HOSTCC_RET_PROD_IDX_9HOSTCC_RET_PROD_IDX_9 0x00003ca4 tg3.h 　
10277
 HOSTCC_RET_PROD_IDX_10HOSTCC_RET_PROD_IDX_10 0x00003ca8 tg3.h 　
10278
 HOSTCC_RET_PROD_IDX_11HOSTCC_RET_PROD_IDX_11 0x00003cac tg3.h 　
10279
 HOSTCC_RET_PROD_IDX_12HOSTCC_RET_PROD_IDX_12 0x00003cb0 tg3.h 　
10280
 HOSTCC_RET_PROD_IDX_13HOSTCC_RET_PROD_IDX_13 0x00003cb4 tg3.h 　
10281
 HOSTCC_RET_PROD_IDX_14HOSTCC_RET_PROD_IDX_14 0x00003cb8 tg3.h 　
10282
 HOSTCC_RET_PROD_IDX_15HOSTCC_RET_PROD_IDX_15 0x00003cbc tg3.h 　
10283
 HOSTCC_SND_CON_IDX_0HOSTCC_SND_CON_IDX_0 0x00003cc0 tg3.h 　
10284
 HOSTCC_SND_CON_IDX_1HOSTCC_SND_CON_IDX_1 0x00003cc4 tg3.h 　
10285
 HOSTCC_SND_CON_IDX_2HOSTCC_SND_CON_IDX_2 0x00003cc8 tg3.h 　
10286
 HOSTCC_SND_CON_IDX_3HOSTCC_SND_CON_IDX_3 0x00003ccc tg3.h 　
10287
 HOSTCC_SND_CON_IDX_4HOSTCC_SND_CON_IDX_4 0x00003cd0 tg3.h 　
10288
 HOSTCC_SND_CON_IDX_5HOSTCC_SND_CON_IDX_5 0x00003cd4 tg3.h 　
10289
 HOSTCC_SND_CON_IDX_6HOSTCC_SND_CON_IDX_6 0x00003cd8 tg3.h 　
10290
 HOSTCC_SND_CON_IDX_7HOSTCC_SND_CON_IDX_7 0x00003cdc tg3.h 　
10291
 HOSTCC_SND_CON_IDX_8HOSTCC_SND_CON_IDX_8 0x00003ce0 tg3.h 　
10292
 HOSTCC_SND_CON_IDX_9HOSTCC_SND_CON_IDX_9 0x00003ce4 tg3.h 　
10293
 HOSTCC_SND_CON_IDX_10HOSTCC_SND_CON_IDX_10 0x00003ce8 tg3.h 　
10294
 HOSTCC_SND_CON_IDX_11HOSTCC_SND_CON_IDX_11 0x00003cec tg3.h 　
10295
 HOSTCC_SND_CON_IDX_12HOSTCC_SND_CON_IDX_12 0x00003cf0 tg3.h 　
10296
 HOSTCC_SND_CON_IDX_13HOSTCC_SND_CON_IDX_13 0x00003cf4 tg3.h 　
10297
 HOSTCC_SND_CON_IDX_14HOSTCC_SND_CON_IDX_14 0x00003cf8 tg3.h 　
10298
 HOSTCC_SND_CON_IDX_15HOSTCC_SND_CON_IDX_15 0x00003cfc tg3.h 　
10299
 MEMARB_MODEMEMARB_MODE 0x00004000 tg3.h 　
10300
 MEMARB_MODE_RESETMEMARB_MODE_RESET 0x00000001 tg3.h 　
10301
 MEMARB_MODE_ENABLEMEMARB_MODE_ENABLE 0x00000002 tg3.h 　
10302
 MEMARB_STATUSMEMARB_STATUS 0x00004004 tg3.h 　
10303
 MEMARB_TRAP_ADDR_LOWMEMARB_TRAP_ADDR_LOW 0x00004008 tg3.h 　
10304
 MEMARB_TRAP_ADDR_HIGHMEMARB_TRAP_ADDR_HIGH 0x0000400c tg3.h 　
10305
 BUFMGR_MODEBUFMGR_MODE 0x00004400 tg3.h 　
10306
 BUFMGR_MODE_RESETBUFMGR_MODE_RESET 0x00000001 tg3.h 　
10307
 BUFMGR_MODE_ENABLEBUFMGR_MODE_ENABLE 0x00000002 tg3.h 　
10308
 BUFMGR_MODE_ATTN_ENABLEBUFMGR_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
10309
 BUFMGR_MODE_BM_TESTBUFMGR_MODE_BM_TEST 0x00000008 tg3.h 　
10310
 BUFMGR_MODE_MBLOW_ATTN_ENABBUFMGR_MODE_MBLOW_ATTN_ENAB 0x00000010 tg3.h 　
10311
 BUFMGR_STATUSBUFMGR_STATUS 0x00004404 tg3.h 　
10312
 BUFMGR_STATUS_ERRORBUFMGR_STATUS_ERROR 0x00000004 tg3.h 　
10313
 BUFMGR_STATUS_MBLOWBUFMGR_STATUS_MBLOW 0x00000010 tg3.h 　
10314
 BUFMGR_MB_POOL_ADDRBUFMGR_MB_POOL_ADDR 0x00004408 tg3.h 　
10315
 BUFMGR_MB_POOL_SIZEBUFMGR_MB_POOL_SIZE 0x0000440c tg3.h 　
10316
 BUFMGR_MB_RDMA_LOW_WATERBUFMGR_MB_RDMA_LOW_WATER 0x00004410 tg3.h 　
10317
 DEFAULT_MB_RDMA_LOW_WATERDEFAULT_MB_RDMA_LOW_WATER 0x00000050 tg3.h 　
10318
 DEFAULT_MB_RDMA_LOW_WATER_5705DEFAULT_MB_RDMA_LOW_WATER_5705 0x00000000 tg3.h 　
10319
 DEFAULT_MB_RDMA_LOW_WATER_JUMBODEFAULT_MB_RDMA_LOW_WATER_JUMBO 0x00000130 tg3.h 　
10320
 BUFMGR_MB_MACRX_LOW_WATERBUFMGR_MB_MACRX_LOW_WATER 0x00004414 tg3.h 　
10321
 DEFAULT_MB_MACRX_LOW_WATERDEFAULT_MB_MACRX_LOW_WATER 0x00000020 tg3.h 　
10322
 DEFAULT_MB_MACRX_LOW_WATER_5705DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010 tg3.h 　
10323
 DEFAULT_MB_MACRX_LOW_WATER_JUMBDEFAULT_MB_MACRX_LOW_WATER_JUMB 0x00000098 tg3.h 　
10324
 BUFMGR_MB_HIGH_WATERBUFMGR_MB_HIGH_WATER 0x00004418 tg3.h 　
10325
 DEFAULT_MB_HIGH_WATERDEFAULT_MB_HIGH_WATER 0x00000060 tg3.h 　
10326
 DEFAULT_MB_HIGH_WATER_5705DEFAULT_MB_HIGH_WATER_5705 0x00000060 tg3.h 　
10327
 DEFAULT_MB_HIGH_WATER_JUMBODEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c tg3.h 　
10328
 BUFMGR_RX_MB_ALLOC_REQBUFMGR_RX_MB_ALLOC_REQ 0x0000441c tg3.h 　
10329
 BUFMGR_MB_ALLOC_BITBUFMGR_MB_ALLOC_BIT 0x10000000 tg3.h 　
10330
 BUFMGR_RX_MB_ALLOC_RESPBUFMGR_RX_MB_ALLOC_RESP 0x00004420 tg3.h 　
10331
 BUFMGR_TX_MB_ALLOC_REQBUFMGR_TX_MB_ALLOC_REQ 0x00004424 tg3.h 　
10332
 BUFMGR_TX_MB_ALLOC_RESPBUFMGR_TX_MB_ALLOC_RESP 0x00004428 tg3.h 　
10333
 BUFMGR_DMA_DESC_POOL_ADDRBUFMGR_DMA_DESC_POOL_ADDR 0x0000442c tg3.h 　
10334
 BUFMGR_DMA_DESC_POOL_SIZEBUFMGR_DMA_DESC_POOL_SIZE 0x00004430 tg3.h 　
10335
 BUFMGR_DMA_LOW_WATERBUFMGR_DMA_LOW_WATER 0x00004434 tg3.h 　
10336
 DEFAULT_DMA_LOW_WATERDEFAULT_DMA_LOW_WATER 0x00000005 tg3.h 　
10337
 BUFMGR_DMA_HIGH_WATERBUFMGR_DMA_HIGH_WATER 0x00004438 tg3.h 　
10338
 DEFAULT_DMA_HIGH_WATERDEFAULT_DMA_HIGH_WATER 0x0000000a tg3.h 　
10339
 BUFMGR_RX_DMA_ALLOC_REQBUFMGR_RX_DMA_ALLOC_REQ 0x0000443c tg3.h 　
10340
 BUFMGR_RX_DMA_ALLOC_RESPBUFMGR_RX_DMA_ALLOC_RESP 0x00004440 tg3.h 　
10341
 BUFMGR_TX_DMA_ALLOC_REQBUFMGR_TX_DMA_ALLOC_REQ 0x00004444 tg3.h 　
10342
 BUFMGR_TX_DMA_ALLOC_RESPBUFMGR_TX_DMA_ALLOC_RESP 0x00004448 tg3.h 　
10343
 BUFMGR_HWDIAG_0BUFMGR_HWDIAG_0 0x0000444c tg3.h 　
10344
 BUFMGR_HWDIAG_1BUFMGR_HWDIAG_1 0x00004450 tg3.h 　
10345
 BUFMGR_HWDIAG_2BUFMGR_HWDIAG_2 0x00004454 tg3.h 　
10346
 RDMAC_MODERDMAC_MODE 0x00004800 tg3.h 　
10347
 RDMAC_MODE_RESETRDMAC_MODE_RESET 0x00000001 tg3.h 　
10348
 RDMAC_MODE_ENABLERDMAC_MODE_ENABLE 0x00000002 tg3.h 　
10349
 RDMAC_MODE_TGTABORT_ENABRDMAC_MODE_TGTABORT_ENAB 0x00000004 tg3.h 　
10350
 RDMAC_MODE_MSTABORT_ENABRDMAC_MODE_MSTABORT_ENAB 0x00000008 tg3.h 　
10351
 RDMAC_MODE_PARITYERR_ENABRDMAC_MODE_PARITYERR_ENAB 0x00000010 tg3.h 　
10352
 RDMAC_MODE_ADDROFLOW_ENABRDMAC_MODE_ADDROFLOW_ENAB 0x00000020 tg3.h 　
10353
 RDMAC_MODE_FIFOOFLOW_ENABRDMAC_MODE_FIFOOFLOW_ENAB 0x00000040 tg3.h 　
10354
 RDMAC_MODE_FIFOURUN_ENABRDMAC_MODE_FIFOURUN_ENAB 0x00000080 tg3.h 　
10355
 RDMAC_MODE_FIFOOREAD_ENABRDMAC_MODE_FIFOOREAD_ENAB 0x00000100 tg3.h 　
10356
 RDMAC_MODE_LNGREAD_ENABRDMAC_MODE_LNGREAD_ENAB 0x00000200 tg3.h 　
10357
 RDMAC_MODE_SPLIT_ENABLERDMAC_MODE_SPLIT_ENABLE 0x00000800 tg3.h 　
10358
 RDMAC_MODE_SPLIT_RESETRDMAC_MODE_SPLIT_RESET 0x00001000 tg3.h 　
10359
 RDMAC_MODE_FIFO_SIZE_128RDMAC_MODE_FIFO_SIZE_128 0x00020000 tg3.h 　
10360
 RDMAC_MODE_FIFO_LONG_BURSTRDMAC_MODE_FIFO_LONG_BURST 0x00030000 tg3.h 　
10361
 RDMAC_STATUSRDMAC_STATUS 0x00004804 tg3.h 　
10362
 RDMAC_STATUS_TGTABORTRDMAC_STATUS_TGTABORT 0x00000004 tg3.h 　
10363
 RDMAC_STATUS_MSTABORTRDMAC_STATUS_MSTABORT 0x00000008 tg3.h 　
10364
 RDMAC_STATUS_PARITYERRRDMAC_STATUS_PARITYERR 0x00000010 tg3.h 　
10365
 RDMAC_STATUS_ADDROFLOWRDMAC_STATUS_ADDROFLOW 0x00000020 tg3.h 　
10366
 RDMAC_STATUS_FIFOOFLOWRDMAC_STATUS_FIFOOFLOW 0x00000040 tg3.h 　
10367
 RDMAC_STATUS_FIFOURUNRDMAC_STATUS_FIFOURUN 0x00000080 tg3.h 　
10368
 RDMAC_STATUS_FIFOOREADRDMAC_STATUS_FIFOOREAD 0x00000100 tg3.h 　
10369
 RDMAC_STATUS_LNGREADRDMAC_STATUS_LNGREAD 0x00000200 tg3.h 　
10370
 WDMAC_MODEWDMAC_MODE 0x00004c00 tg3.h 　
10371
 WDMAC_MODE_RESETWDMAC_MODE_RESET 0x00000001 tg3.h 　
10372
 WDMAC_MODE_ENABLEWDMAC_MODE_ENABLE 0x00000002 tg3.h 　
10373
 WDMAC_MODE_TGTABORT_ENABWDMAC_MODE_TGTABORT_ENAB 0x00000004 tg3.h 　
10374
 WDMAC_MODE_MSTABORT_ENABWDMAC_MODE_MSTABORT_ENAB 0x00000008 tg3.h 　
10375
 WDMAC_MODE_PARITYERR_ENABWDMAC_MODE_PARITYERR_ENAB 0x00000010 tg3.h 　
10376
 WDMAC_MODE_ADDROFLOW_ENABWDMAC_MODE_ADDROFLOW_ENAB 0x00000020 tg3.h 　
10377
 WDMAC_MODE_FIFOOFLOW_ENABWDMAC_MODE_FIFOOFLOW_ENAB 0x00000040 tg3.h 　
10378
 WDMAC_MODE_FIFOURUN_ENABWDMAC_MODE_FIFOURUN_ENAB 0x00000080 tg3.h 　
10379
 WDMAC_MODE_FIFOOREAD_ENABWDMAC_MODE_FIFOOREAD_ENAB 0x00000100 tg3.h 　
10380
 WDMAC_MODE_LNGREAD_ENABWDMAC_MODE_LNGREAD_ENAB 0x00000200 tg3.h 　
10381
 WDMAC_MODE_RX_ACCELWDMAC_MODE_RX_ACCEL 0x00000400 tg3.h 　
10382
 WDMAC_STATUSWDMAC_STATUS 0x00004c04 tg3.h 　
10383
 WDMAC_STATUS_TGTABORTWDMAC_STATUS_TGTABORT 0x00000004 tg3.h 　
10384
 WDMAC_STATUS_MSTABORTWDMAC_STATUS_MSTABORT 0x00000008 tg3.h 　
10385
 WDMAC_STATUS_PARITYERRWDMAC_STATUS_PARITYERR 0x00000010 tg3.h 　
10386
 WDMAC_STATUS_ADDROFLOWWDMAC_STATUS_ADDROFLOW 0x00000020 tg3.h 　
10387
 WDMAC_STATUS_FIFOOFLOWWDMAC_STATUS_FIFOOFLOW 0x00000040 tg3.h 　
10388
 WDMAC_STATUS_FIFOURUNWDMAC_STATUS_FIFOURUN 0x00000080 tg3.h 　
10389
 WDMAC_STATUS_FIFOOREADWDMAC_STATUS_FIFOOREAD 0x00000100 tg3.h 　
10390
 WDMAC_STATUS_LNGREADWDMAC_STATUS_LNGREAD 0x00000200 tg3.h 　
10391
 CPU_MODECPU_MODE 0x00000000 tg3.h 　
10392
 CPU_MODE_RESETCPU_MODE_RESET 0x00000001 tg3.h 　
10393
 CPU_MODE_HALTCPU_MODE_HALT 0x00000400 tg3.h 　
10394
 CPU_STATECPU_STATE 0x00000004 tg3.h 　
10395
 CPU_EVTMASKCPU_EVTMASK 0x00000008 tg3.h 　
10396
 CPU_PCCPU_PC 0x0000001c tg3.h 　
10397
 CPU_INSNCPU_INSN 0x00000020 tg3.h 　
10398
 CPU_SPAD_UFLOWCPU_SPAD_UFLOW 0x00000024 tg3.h 　
10399
 CPU_WDOG_CLEARCPU_WDOG_CLEAR 0x00000028 tg3.h 　
10400
 CPU_WDOG_VECTORCPU_WDOG_VECTOR 0x0000002c tg3.h 　
10401
 CPU_WDOG_PCCPU_WDOG_PC 0x00000030 tg3.h 　
10402
 CPU_HW_BPCPU_HW_BP 0x00000034 tg3.h 　
10403
 CPU_WDOG_SAVED_STATECPU_WDOG_SAVED_STATE 0x00000044 tg3.h 　
10404
 CPU_LAST_BRANCH_ADDRCPU_LAST_BRANCH_ADDR 0x00000048 tg3.h 　
10405
 CPU_SPAD_UFLOW_SETCPU_SPAD_UFLOW_SET 0x0000004c tg3.h 　
10406
 CPU_R0CPU_R0 0x00000200 tg3.h 　
10407
 CPU_R1CPU_R1 0x00000204 tg3.h 　
10408
 CPU_R2CPU_R2 0x00000208 tg3.h 　
10409
 CPU_R3CPU_R3 0x0000020c tg3.h 　
10410
 CPU_R4CPU_R4 0x00000210 tg3.h 　
10411
 CPU_R5CPU_R5 0x00000214 tg3.h 　
10412
 CPU_R6CPU_R6 0x00000218 tg3.h 　
10413
 CPU_R7CPU_R7 0x0000021c tg3.h 　
10414
 CPU_R8CPU_R8 0x00000220 tg3.h 　
10415
 CPU_R9CPU_R9 0x00000224 tg3.h 　
10416
 CPU_R10CPU_R10 0x00000228 tg3.h 　
10417
 CPU_R11CPU_R11 0x0000022c tg3.h 　
10418
 CPU_R12CPU_R12 0x00000230 tg3.h 　
10419
 CPU_R13CPU_R13 0x00000234 tg3.h 　
10420
 CPU_R14CPU_R14 0x00000238 tg3.h 　
10421
 CPU_R15CPU_R15 0x0000023c tg3.h 　
10422
 CPU_R16CPU_R16 0x00000240 tg3.h 　
10423
 CPU_R17CPU_R17 0x00000244 tg3.h 　
10424
 CPU_R18CPU_R18 0x00000248 tg3.h 　
10425
 CPU_R19CPU_R19 0x0000024c tg3.h 　
10426
 CPU_R20CPU_R20 0x00000250 tg3.h 　
10427
 CPU_R21CPU_R21 0x00000254 tg3.h 　
10428
 CPU_R22CPU_R22 0x00000258 tg3.h 　
10429
 CPU_R23CPU_R23 0x0000025c tg3.h 　
10430
 CPU_R24CPU_R24 0x00000260 tg3.h 　
10431
 CPU_R25CPU_R25 0x00000264 tg3.h 　
10432
 CPU_R26CPU_R26 0x00000268 tg3.h 　
10433
 CPU_R27CPU_R27 0x0000026c tg3.h 　
10434
 CPU_R28CPU_R28 0x00000270 tg3.h 　
10435
 CPU_R29CPU_R29 0x00000274 tg3.h 　
10436
 CPU_R30CPU_R30 0x00000278 tg3.h 　
10437
 CPU_R31CPU_R31 0x0000027c tg3.h 　
10438
 RX_CPU_BASERX_CPU_BASE 0x00005000 tg3.h 　
10439
 TX_CPU_BASETX_CPU_BASE 0x00005400 tg3.h 　
10440
 GRCMBOX_INTERRUPT_0GRCMBOX_INTERRUPT_0 0x00005800 tg3.h 64-bit
10441
 GRCMBOX_INTERRUPT_1GRCMBOX_INTERRUPT_1 0x00005808 tg3.h 64-bit
10442
 GRCMBOX_INTERRUPT_2GRCMBOX_INTERRUPT_2 0x00005810 tg3.h 64-bit
10443
 GRCMBOX_INTERRUPT_3GRCMBOX_INTERRUPT_3 0x00005818 tg3.h 64-bit
10444
 GRCMBOX_GENERAL_0GRCMBOX_GENERAL_0 0x00005820 tg3.h 64-bit
10445
 GRCMBOX_GENERAL_1GRCMBOX_GENERAL_1 0x00005828 tg3.h 64-bit
10446
 GRCMBOX_GENERAL_2GRCMBOX_GENERAL_2 0x00005830 tg3.h 64-bit
10447
 GRCMBOX_GENERAL_3GRCMBOX_GENERAL_3 0x00005838 tg3.h 64-bit
10448
 GRCMBOX_GENERAL_4GRCMBOX_GENERAL_4 0x00005840 tg3.h 64-bit
10449
 GRCMBOX_GENERAL_5GRCMBOX_GENERAL_5 0x00005848 tg3.h 64-bit
10450
 GRCMBOX_GENERAL_6GRCMBOX_GENERAL_6 0x00005850 tg3.h 64-bit
10451
 GRCMBOX_GENERAL_7GRCMBOX_GENERAL_7 0x00005858 tg3.h 64-bit
10452
 GRCMBOX_RELOAD_STATGRCMBOX_RELOAD_STAT 0x00005860 tg3.h 64-bit
10453
 GRCMBOX_RCVSTD_PROD_IDXGRCMBOX_RCVSTD_PROD_IDX 0x00005868 tg3.h 64-bit
10454
 GRCMBOX_RCVJUMBO_PROD_IDXGRCMBOX_RCVJUMBO_PROD_IDX 0x00005870 tg3.h 64-bit
10455
 GRCMBOX_RCVMINI_PROD_IDXGRCMBOX_RCVMINI_PROD_IDX 0x00005878 tg3.h 64-bit
10456
 GRCMBOX_RCVRET_CON_IDX_0GRCMBOX_RCVRET_CON_IDX_0 0x00005880 tg3.h 64-bit
10457
 GRCMBOX_RCVRET_CON_IDX_1GRCMBOX_RCVRET_CON_IDX_1 0x00005888 tg3.h 64-bit
10458
 GRCMBOX_RCVRET_CON_IDX_2GRCMBOX_RCVRET_CON_IDX_2 0x00005890 tg3.h 64-bit
10459
 GRCMBOX_RCVRET_CON_IDX_3GRCMBOX_RCVRET_CON_IDX_3 0x00005898 tg3.h 64-bit
10460
 GRCMBOX_RCVRET_CON_IDX_4GRCMBOX_RCVRET_CON_IDX_4 0x000058a0 tg3.h 64-bit
10461
 GRCMBOX_RCVRET_CON_IDX_5GRCMBOX_RCVRET_CON_IDX_5 0x000058a8 tg3.h 64-bit
10462
 GRCMBOX_RCVRET_CON_IDX_6GRCMBOX_RCVRET_CON_IDX_6 0x000058b0 tg3.h 64-bit
10463
 GRCMBOX_RCVRET_CON_IDX_7GRCMBOX_RCVRET_CON_IDX_7 0x000058b8 tg3.h 64-bit
10464
 GRCMBOX_RCVRET_CON_IDX_8GRCMBOX_RCVRET_CON_IDX_8 0x000058c0 tg3.h 64-bit
10465
 GRCMBOX_RCVRET_CON_IDX_9GRCMBOX_RCVRET_CON_IDX_9 0x000058c8 tg3.h 64-bit
10466
 GRCMBOX_RCVRET_CON_IDX_10GRCMBOX_RCVRET_CON_IDX_10 0x000058d0 tg3.h 64-bit
10467
 GRCMBOX_RCVRET_CON_IDX_11GRCMBOX_RCVRET_CON_IDX_11 0x000058d8 tg3.h 64-bit
10468
 GRCMBOX_RCVRET_CON_IDX_12GRCMBOX_RCVRET_CON_IDX_12 0x000058e0 tg3.h 64-bit
10469
 GRCMBOX_RCVRET_CON_IDX_13GRCMBOX_RCVRET_CON_IDX_13 0x000058e8 tg3.h 64-bit
10470
 GRCMBOX_RCVRET_CON_IDX_14GRCMBOX_RCVRET_CON_IDX_14 0x000058f0 tg3.h 64-bit
10471
 GRCMBOX_RCVRET_CON_IDX_15GRCMBOX_RCVRET_CON_IDX_15 0x000058f8 tg3.h 64-bit
10472
 GRCMBOX_SNDHOST_PROD_IDX_0GRCMBOX_SNDHOST_PROD_IDX_0 0x00005900 tg3.h 64-bit
10473
 GRCMBOX_SNDHOST_PROD_IDX_1GRCMBOX_SNDHOST_PROD_IDX_1 0x00005908 tg3.h 64-bit
10474
 GRCMBOX_SNDHOST_PROD_IDX_2GRCMBOX_SNDHOST_PROD_IDX_2 0x00005910 tg3.h 64-bit
10475
 GRCMBOX_SNDHOST_PROD_IDX_3GRCMBOX_SNDHOST_PROD_IDX_3 0x00005918 tg3.h 64-bit
10476
 GRCMBOX_SNDHOST_PROD_IDX_4GRCMBOX_SNDHOST_PROD_IDX_4 0x00005920 tg3.h 64-bit
10477
 GRCMBOX_SNDHOST_PROD_IDX_5GRCMBOX_SNDHOST_PROD_IDX_5 0x00005928 tg3.h 64-bit
10478
 GRCMBOX_SNDHOST_PROD_IDX_6GRCMBOX_SNDHOST_PROD_IDX_6 0x00005930 tg3.h 64-bit
10479
 GRCMBOX_SNDHOST_PROD_IDX_7GRCMBOX_SNDHOST_PROD_IDX_7 0x00005938 tg3.h 64-bit
10480
 GRCMBOX_SNDHOST_PROD_IDX_8GRCMBOX_SNDHOST_PROD_IDX_8 0x00005940 tg3.h 64-bit
10481
 GRCMBOX_SNDHOST_PROD_IDX_9GRCMBOX_SNDHOST_PROD_IDX_9 0x00005948 tg3.h 64-bit
10482
 GRCMBOX_SNDHOST_PROD_IDX_10GRCMBOX_SNDHOST_PROD_IDX_10 0x00005950 tg3.h 64-bit
10483
 GRCMBOX_SNDHOST_PROD_IDX_11GRCMBOX_SNDHOST_PROD_IDX_11 0x00005958 tg3.h 64-bit
10484
 GRCMBOX_SNDHOST_PROD_IDX_12GRCMBOX_SNDHOST_PROD_IDX_12 0x00005960 tg3.h 64-bit
10485
 GRCMBOX_SNDHOST_PROD_IDX_13GRCMBOX_SNDHOST_PROD_IDX_13 0x00005968 tg3.h 64-bit
10486
 GRCMBOX_SNDHOST_PROD_IDX_14GRCMBOX_SNDHOST_PROD_IDX_14 0x00005970 tg3.h 64-bit
10487
 GRCMBOX_SNDHOST_PROD_IDX_15GRCMBOX_SNDHOST_PROD_IDX_15 0x00005978 tg3.h 64-bit
10488
 GRCMBOX_SNDNIC_PROD_IDX_0GRCMBOX_SNDNIC_PROD_IDX_0 0x00005980 tg3.h 64-bit
10489
 GRCMBOX_SNDNIC_PROD_IDX_1GRCMBOX_SNDNIC_PROD_IDX_1 0x00005988 tg3.h 64-bit
10490
 GRCMBOX_SNDNIC_PROD_IDX_2GRCMBOX_SNDNIC_PROD_IDX_2 0x00005990 tg3.h 64-bit
10491
 GRCMBOX_SNDNIC_PROD_IDX_3GRCMBOX_SNDNIC_PROD_IDX_3 0x00005998 tg3.h 64-bit
10492
 GRCMBOX_SNDNIC_PROD_IDX_4GRCMBOX_SNDNIC_PROD_IDX_4 0x000059a0 tg3.h 64-bit
10493
 GRCMBOX_SNDNIC_PROD_IDX_5GRCMBOX_SNDNIC_PROD_IDX_5 0x000059a8 tg3.h 64-bit
10494
 GRCMBOX_SNDNIC_PROD_IDX_6GRCMBOX_SNDNIC_PROD_IDX_6 0x000059b0 tg3.h 64-bit
10495
 GRCMBOX_SNDNIC_PROD_IDX_7GRCMBOX_SNDNIC_PROD_IDX_7 0x000059b8 tg3.h 64-bit
10496
 GRCMBOX_SNDNIC_PROD_IDX_8GRCMBOX_SNDNIC_PROD_IDX_8 0x000059c0 tg3.h 64-bit
10497
 GRCMBOX_SNDNIC_PROD_IDX_9GRCMBOX_SNDNIC_PROD_IDX_9 0x000059c8 tg3.h 64-bit
10498
 GRCMBOX_SNDNIC_PROD_IDX_10GRCMBOX_SNDNIC_PROD_IDX_10 0x000059d0 tg3.h 64-bit
10499
 GRCMBOX_SNDNIC_PROD_IDX_11GRCMBOX_SNDNIC_PROD_IDX_11 0x000059d8 tg3.h 64-bit
10500
 GRCMBOX_SNDNIC_PROD_IDX_12GRCMBOX_SNDNIC_PROD_IDX_12 0x000059e0 tg3.h 64-bit
10501
 GRCMBOX_SNDNIC_PROD_IDX_13GRCMBOX_SNDNIC_PROD_IDX_13 0x000059e8 tg3.h 64-bit
10502
 GRCMBOX_SNDNIC_PROD_IDX_14GRCMBOX_SNDNIC_PROD_IDX_14 0x000059f0 tg3.h 64-bit
10503
 GRCMBOX_SNDNIC_PROD_IDX_15GRCMBOX_SNDNIC_PROD_IDX_15 0x000059f8 tg3.h 64-bit
10504
 GRCMBOX_HIGH_PRIO_EV_VECTORGRCMBOX_HIGH_PRIO_EV_VECTOR 0x00005a00 tg3.h 　
10505
 GRCMBOX_HIGH_PRIO_EV_MASKGRCMBOX_HIGH_PRIO_EV_MASK 0x00005a04 tg3.h 　
10506
 GRCMBOX_LOW_PRIO_EV_VECGRCMBOX_LOW_PRIO_EV_VEC 0x00005a08 tg3.h 　
10507
 GRCMBOX_LOW_PRIO_EV_MASKGRCMBOX_LOW_PRIO_EV_MASK 0x00005a0c tg3.h 　
10508
 FTQ_RESETFTQ_RESET 0x00005c00 tg3.h 　
10509
 FTQ_RESET_DMA_READ_QUEUEFTQ_RESET_DMA_READ_QUEUE (1 << 1) tg3.h 　
10510
 FTQ_RESET_DMA_HIGH_PRI_READFTQ_RESET_DMA_HIGH_PRI_READ (1 << 2) tg3.h 　
10511
 FTQ_RESET_SEND_BD_COMPLETIONFTQ_RESET_SEND_BD_COMPLETION (1 << 4) tg3.h 　
10512
 FTQ_RESET_DMA_WRITEFTQ_RESET_DMA_WRITE (1 << 6) tg3.h 　
10513
 FTQ_RESET_DMA_HIGH_PRI_WRITEFTQ_RESET_DMA_HIGH_PRI_WRITE (1 << 7) tg3.h 　
10514
 FTQ_RESET_SEND_DATA_COMPLETIONFTQ_RESET_SEND_DATA_COMPLETION (1 << 9) tg3.h 　
10515
 FTQ_RESET_HOST_COALESCINGFTQ_RESET_HOST_COALESCING (1 << 10) tg3.h 　
10516
 FTQ_RESET_MAC_TXFTQ_RESET_MAC_TX (1 << 11) tg3.h 　
10517
 FTQ_RESET_RX_BD_COMPLETEFTQ_RESET_RX_BD_COMPLETE (1 << 13) tg3.h 　
10518
 FTQ_RESET_RX_LIST_PLCMTFTQ_RESET_RX_LIST_PLCMT (1 << 14) tg3.h 　
10519
 FTQ_RESET_RX_DATA_COMPLETIONFTQ_RESET_RX_DATA_COMPLETION (1 << 16) tg3.h 　
10520
 FTQ_DMA_NORM_READ_CTLFTQ_DMA_NORM_READ_CTL 0x00005c10 tg3.h 　
10521
 FTQ_DMA_NORM_READ_FULL_CNTFTQ_DMA_NORM_READ_FULL_CNT 0x00005c14 tg3.h 　
10522
 FTQ_DMA_NORM_READ_FIFO_ENQDEQFTQ_DMA_NORM_READ_FIFO_ENQDEQ 0x00005c18 tg3.h 　
10523
 FTQ_DMA_NORM_READ_WRITE_PEEKFTQ_DMA_NORM_READ_WRITE_PEEK 0x00005c1c tg3.h 　
10524
 FTQ_DMA_HIGH_READ_CTLFTQ_DMA_HIGH_READ_CTL 0x00005c20 tg3.h 　
10525
 FTQ_DMA_HIGH_READ_FULL_CNTFTQ_DMA_HIGH_READ_FULL_CNT 0x00005c24 tg3.h 　
10526
 FTQ_DMA_HIGH_READ_FIFO_ENQDEQFTQ_DMA_HIGH_READ_FIFO_ENQDEQ 0x00005c28 tg3.h 　
10527
 FTQ_DMA_HIGH_READ_WRITE_PEEKFTQ_DMA_HIGH_READ_WRITE_PEEK 0x00005c2c tg3.h 　
10528
 FTQ_DMA_COMP_DISC_CTLFTQ_DMA_COMP_DISC_CTL 0x00005c30 tg3.h 　
10529
 FTQ_DMA_COMP_DISC_FULL_CNTFTQ_DMA_COMP_DISC_FULL_CNT 0x00005c34 tg3.h 　
10530
 FTQ_DMA_COMP_DISC_FIFO_ENQDEQFTQ_DMA_COMP_DISC_FIFO_ENQDEQ 0x00005c38 tg3.h 　
10531
 FTQ_DMA_COMP_DISC_WRITE_PEEKFTQ_DMA_COMP_DISC_WRITE_PEEK 0x00005c3c tg3.h 　
10532
 FTQ_SEND_BD_COMP_CTLFTQ_SEND_BD_COMP_CTL 0x00005c40 tg3.h 　
10533
 FTQ_SEND_BD_COMP_FULL_CNTFTQ_SEND_BD_COMP_FULL_CNT 0x00005c44 tg3.h 　
10534
 FTQ_SEND_BD_COMP_FIFO_ENQDEQFTQ_SEND_BD_COMP_FIFO_ENQDEQ 0x00005c48 tg3.h 　
10535
 FTQ_SEND_BD_COMP_WRITE_PEEKFTQ_SEND_BD_COMP_WRITE_PEEK 0x00005c4c tg3.h 　
10536
 FTQ_SEND_DATA_INIT_CTLFTQ_SEND_DATA_INIT_CTL 0x00005c50 tg3.h 　
10537
 FTQ_SEND_DATA_INIT_FULL_CNTFTQ_SEND_DATA_INIT_FULL_CNT 0x00005c54 tg3.h 　
10538
 FTQ_SEND_DATA_INIT_FIFO_ENQDEQFTQ_SEND_DATA_INIT_FIFO_ENQDEQ 0x00005c58 tg3.h 　
10539
 FTQ_SEND_DATA_INIT_WRITE_PEEKFTQ_SEND_DATA_INIT_WRITE_PEEK 0x00005c5c tg3.h 　
10540
 FTQ_DMA_NORM_WRITE_CTLFTQ_DMA_NORM_WRITE_CTL 0x00005c60 tg3.h 　
10541
 FTQ_DMA_NORM_WRITE_FULL_CNTFTQ_DMA_NORM_WRITE_FULL_CNT 0x00005c64 tg3.h 　
10542
 FTQ_DMA_NORM_WRITE_FIFO_ENQDEQFTQ_DMA_NORM_WRITE_FIFO_ENQDEQ 0x00005c68 tg3.h 　
10543
 FTQ_DMA_NORM_WRITE_WRITE_PEEKFTQ_DMA_NORM_WRITE_WRITE_PEEK 0x00005c6c tg3.h 　
10544
 FTQ_DMA_HIGH_WRITE_CTLFTQ_DMA_HIGH_WRITE_CTL 0x00005c70 tg3.h 　
10545
 FTQ_DMA_HIGH_WRITE_FULL_CNTFTQ_DMA_HIGH_WRITE_FULL_CNT 0x00005c74 tg3.h 　
10546
 FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQFTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ 0x00005c78 tg3.h 　
10547
 FTQ_DMA_HIGH_WRITE_WRITE_PEEKFTQ_DMA_HIGH_WRITE_WRITE_PEEK 0x00005c7c tg3.h 　
10548
 FTQ_SWTYPE1_CTLFTQ_SWTYPE1_CTL 0x00005c80 tg3.h 　
10549
 FTQ_SWTYPE1_FULL_CNTFTQ_SWTYPE1_FULL_CNT 0x00005c84 tg3.h 　
10550
 FTQ_SWTYPE1_FIFO_ENQDEQFTQ_SWTYPE1_FIFO_ENQDEQ 0x00005c88 tg3.h 　
10551
 FTQ_SWTYPE1_WRITE_PEEKFTQ_SWTYPE1_WRITE_PEEK 0x00005c8c tg3.h 　
10552
 FTQ_SEND_DATA_COMP_CTLFTQ_SEND_DATA_COMP_CTL 0x00005c90 tg3.h 　
10553
 FTQ_SEND_DATA_COMP_FULL_CNTFTQ_SEND_DATA_COMP_FULL_CNT 0x00005c94 tg3.h 　
10554
 FTQ_SEND_DATA_COMP_FIFO_ENQDEQFTQ_SEND_DATA_COMP_FIFO_ENQDEQ 0x00005c98 tg3.h 　
10555
 FTQ_SEND_DATA_COMP_WRITE_PEEKFTQ_SEND_DATA_COMP_WRITE_PEEK 0x00005c9c tg3.h 　
10556
 FTQ_HOST_COAL_CTLFTQ_HOST_COAL_CTL 0x00005ca0 tg3.h 　
10557
 FTQ_HOST_COAL_FULL_CNTFTQ_HOST_COAL_FULL_CNT 0x00005ca4 tg3.h 　
10558
 FTQ_HOST_COAL_FIFO_ENQDEQFTQ_HOST_COAL_FIFO_ENQDEQ 0x00005ca8 tg3.h 　
10559
 FTQ_HOST_COAL_WRITE_PEEKFTQ_HOST_COAL_WRITE_PEEK 0x00005cac tg3.h 　
10560
 FTQ_MAC_TX_CTLFTQ_MAC_TX_CTL 0x00005cb0 tg3.h 　
10561
 FTQ_MAC_TX_FULL_CNTFTQ_MAC_TX_FULL_CNT 0x00005cb4 tg3.h 　
10562
 FTQ_MAC_TX_FIFO_ENQDEQFTQ_MAC_TX_FIFO_ENQDEQ 0x00005cb8 tg3.h 　
10563
 FTQ_MAC_TX_WRITE_PEEKFTQ_MAC_TX_WRITE_PEEK 0x00005cbc tg3.h 　
10564
 FTQ_MB_FREE_CTLFTQ_MB_FREE_CTL 0x00005cc0 tg3.h 　
10565
 FTQ_MB_FREE_FULL_CNTFTQ_MB_FREE_FULL_CNT 0x00005cc4 tg3.h 　
10566
 FTQ_MB_FREE_FIFO_ENQDEQFTQ_MB_FREE_FIFO_ENQDEQ 0x00005cc8 tg3.h 　
10567
 FTQ_MB_FREE_WRITE_PEEKFTQ_MB_FREE_WRITE_PEEK 0x00005ccc tg3.h 　
10568
 FTQ_RCVBD_COMP_CTLFTQ_RCVBD_COMP_CTL 0x00005cd0 tg3.h 　
10569
 FTQ_RCVBD_COMP_FULL_CNTFTQ_RCVBD_COMP_FULL_CNT 0x00005cd4 tg3.h 　
10570
 FTQ_RCVBD_COMP_FIFO_ENQDEQFTQ_RCVBD_COMP_FIFO_ENQDEQ 0x00005cd8 tg3.h 　
10571
 FTQ_RCVBD_COMP_WRITE_PEEKFTQ_RCVBD_COMP_WRITE_PEEK 0x00005cdc tg3.h 　
10572
 FTQ_RCVLST_PLMT_CTLFTQ_RCVLST_PLMT_CTL 0x00005ce0 tg3.h 　
10573
 FTQ_RCVLST_PLMT_FULL_CNTFTQ_RCVLST_PLMT_FULL_CNT 0x00005ce4 tg3.h 　
10574
 FTQ_RCVLST_PLMT_FIFO_ENQDEQFTQ_RCVLST_PLMT_FIFO_ENQDEQ 0x00005ce8 tg3.h 　
10575
 FTQ_RCVLST_PLMT_WRITE_PEEKFTQ_RCVLST_PLMT_WRITE_PEEK 0x00005cec tg3.h 　
10576
 FTQ_RCVDATA_INI_CTLFTQ_RCVDATA_INI_CTL 0x00005cf0 tg3.h 　
10577
 FTQ_RCVDATA_INI_FULL_CNTFTQ_RCVDATA_INI_FULL_CNT 0x00005cf4 tg3.h 　
10578
 FTQ_RCVDATA_INI_FIFO_ENQDEQFTQ_RCVDATA_INI_FIFO_ENQDEQ 0x00005cf8 tg3.h 　
10579
 FTQ_RCVDATA_INI_WRITE_PEEKFTQ_RCVDATA_INI_WRITE_PEEK 0x00005cfc tg3.h 　
10580
 FTQ_RCVDATA_COMP_CTLFTQ_RCVDATA_COMP_CTL 0x00005d00 tg3.h 　
10581
 FTQ_RCVDATA_COMP_FULL_CNTFTQ_RCVDATA_COMP_FULL_CNT 0x00005d04 tg3.h 　
10582
 FTQ_RCVDATA_COMP_FIFO_ENQDEQFTQ_RCVDATA_COMP_FIFO_ENQDEQ 0x00005d08 tg3.h 　
10583
 FTQ_RCVDATA_COMP_WRITE_PEEKFTQ_RCVDATA_COMP_WRITE_PEEK 0x00005d0c tg3.h 　
10584
 FTQ_SWTYPE2_CTLFTQ_SWTYPE2_CTL 0x00005d10 tg3.h 　
10585
 FTQ_SWTYPE2_FULL_CNTFTQ_SWTYPE2_FULL_CNT 0x00005d14 tg3.h 　
10586
 FTQ_SWTYPE2_FIFO_ENQDEQFTQ_SWTYPE2_FIFO_ENQDEQ 0x00005d18 tg3.h 　
10587
 FTQ_SWTYPE2_WRITE_PEEKFTQ_SWTYPE2_WRITE_PEEK 0x00005d1c tg3.h 　
10588
 MSGINT_MODEMSGINT_MODE 0x00006000 tg3.h 　
10589
 MSGINT_MODE_RESETMSGINT_MODE_RESET 0x00000001 tg3.h 　
10590
 MSGINT_MODE_ENABLEMSGINT_MODE_ENABLE 0x00000002 tg3.h 　
10591
 MSGINT_STATUSMSGINT_STATUS 0x00006004 tg3.h 　
10592
 MSGINT_FIFOMSGINT_FIFO 0x00006008 tg3.h 　
10593
 DMAC_MODEDMAC_MODE 0x00006400 tg3.h 　
10594
 DMAC_MODE_RESETDMAC_MODE_RESET 0x00000001 tg3.h 　
10595
 DMAC_MODE_ENABLEDMAC_MODE_ENABLE 0x00000002 tg3.h 　
10596
 GRC_MODEGRC_MODE 0x00006800 tg3.h 　
10597
 GRC_MODE_UPD_ON_COALGRC_MODE_UPD_ON_COAL 0x00000001 tg3.h 　
10598
 GRC_MODE_BSWAP_NONFRM_DATAGRC_MODE_BSWAP_NONFRM_DATA 0x00000002 tg3.h 　
10599
 GRC_MODE_WSWAP_NONFRM_DATAGRC_MODE_WSWAP_NONFRM_DATA 0x00000004 tg3.h 　
10600
 GRC_MODE_BSWAP_DATAGRC_MODE_BSWAP_DATA 0x00000010 tg3.h 　
10601
 GRC_MODE_WSWAP_DATAGRC_MODE_WSWAP_DATA 0x00000020 tg3.h 　
10602
 GRC_MODE_SPLITHDRGRC_MODE_SPLITHDR 0x00000100 tg3.h 　
10603
 GRC_MODE_NOFRM_CRACKINGGRC_MODE_NOFRM_CRACKING 0x00000200 tg3.h 　
10604
 GRC_MODE_INCL_CRCGRC_MODE_INCL_CRC 0x00000400 tg3.h 　
10605
 GRC_MODE_ALLOW_BAD_FRMSGRC_MODE_ALLOW_BAD_FRMS 0x00000800 tg3.h 　
10606
 GRC_MODE_NOIRQ_ON_SENDSGRC_MODE_NOIRQ_ON_SENDS 0x00002000 tg3.h 　
10607
 GRC_MODE_NOIRQ_ON_RCVGRC_MODE_NOIRQ_ON_RCV 0x00004000 tg3.h 　
10608
 GRC_MODE_FORCE_PCI32BITGRC_MODE_FORCE_PCI32BIT 0x00008000 tg3.h 　
10609
 GRC_MODE_HOST_STACKUPGRC_MODE_HOST_STACKUP 0x00010000 tg3.h 　
10610
 GRC_MODE_HOST_SENDBDSGRC_MODE_HOST_SENDBDS 0x00020000 tg3.h 　
10611
 GRC_MODE_NO_TX_PHDR_CSUMGRC_MODE_NO_TX_PHDR_CSUM 0x00100000 tg3.h 　
10612
 GRC_MODE_NO_RX_PHDR_CSUMGRC_MODE_NO_RX_PHDR_CSUM 0x00800000 tg3.h 　
10613
 GRC_MODE_IRQ_ON_TX_CPU_ATTNGRC_MODE_IRQ_ON_TX_CPU_ATTN 0x01000000 tg3.h 　
10614
 GRC_MODE_IRQ_ON_RX_CPU_ATTNGRC_MODE_IRQ_ON_RX_CPU_ATTN 0x02000000 tg3.h 　
10615
 GRC_MODE_IRQ_ON_MAC_ATTNGRC_MODE_IRQ_ON_MAC_ATTN 0x04000000 tg3.h 　
10616
 GRC_MODE_IRQ_ON_DMA_ATTNGRC_MODE_IRQ_ON_DMA_ATTN 0x08000000 tg3.h 　
10617
 GRC_MODE_IRQ_ON_FLOW_ATTNGRC_MODE_IRQ_ON_FLOW_ATTN 0x10000000 tg3.h 　
10618
 GRC_MODE_4X_NIC_SEND_RINGSGRC_MODE_4X_NIC_SEND_RINGS 0x20000000 tg3.h 　
10619
 GRC_MODE_MCAST_FRM_ENABLEGRC_MODE_MCAST_FRM_ENABLE 0x40000000 tg3.h 　
10620
 GRC_MISC_CFGGRC_MISC_CFG 0x00006804 tg3.h 　
10621
 GRC_MISC_CFG_CORECLK_RESETGRC_MISC_CFG_CORECLK_RESET 0x00000001 tg3.h 　
10622
 GRC_MISC_CFG_PRESCALAR_MASKGRC_MISC_CFG_PRESCALAR_MASK 0x000000fe tg3.h 　
10623
 GRC_MISC_CFG_PRESCALAR_SHIFTGRC_MISC_CFG_PRESCALAR_SHIFT 1 tg3.h 　
10624
 GRC_MISC_CFG_BOARD_ID_MASKGRC_MISC_CFG_BOARD_ID_MASK 0x0001e000 tg3.h 　
10625
 GRC_MISC_CFG_BOARD_ID_5700GRC_MISC_CFG_BOARD_ID_5700 0x0001e000 tg3.h 　
10626
 GRC_MISC_CFG_BOARD_ID_5701GRC_MISC_CFG_BOARD_ID_5701 0x00000000 tg3.h 　
10627
 GRC_MISC_CFG_BOARD_ID_5702FEGRC_MISC_CFG_BOARD_ID_5702FE 0x00004000 tg3.h 　
10628
 GRC_MISC_CFG_BOARD_ID_5703GRC_MISC_CFG_BOARD_ID_5703 0x00000000 tg3.h 　
10629
 GRC_MISC_CFG_BOARD_ID_5703SGRC_MISC_CFG_BOARD_ID_5703S 0x00002000 tg3.h 　
10630
 GRC_MISC_CFG_BOARD_ID_5704GRC_MISC_CFG_BOARD_ID_5704 0x00000000 tg3.h 　
10631
 GRC_MISC_CFG_BOARD_ID_5704CIOBEGRC_MISC_CFG_BOARD_ID_5704CIOBE 0x00004000 tg3.h 　
10632
 GRC_MISC_CFG_BOARD_ID_5704_A2GRC_MISC_CFG_BOARD_ID_5704_A2 0x00008000 tg3.h 　
10633
 GRC_MISC_CFG_BOARD_ID_5788GRC_MISC_CFG_BOARD_ID_5788 0x00010000 tg3.h 　
10634
 GRC_MISC_CFG_BOARD_ID_5788MGRC_MISC_CFG_BOARD_ID_5788M 0x00018000 tg3.h 　
10635
 GRC_MISC_CFG_BOARD_ID_AC91002A1GRC_MISC_CFG_BOARD_ID_AC91002A1 0x00018000 tg3.h 　
10636
 GRC_MISC_CFG_KEEP_GPHY_POWERGRC_MISC_CFG_KEEP_GPHY_POWER 0x04000000 tg3.h 　
10637
 GRC_LOCAL_CTRLGRC_LOCAL_CTRL 0x00006808 tg3.h 　
10638
 GRC_LCLCTRL_INT_ACTIVEGRC_LCLCTRL_INT_ACTIVE 0x00000001 tg3.h 　
10639
 GRC_LCLCTRL_CLEARINTGRC_LCLCTRL_CLEARINT 0x00000002 tg3.h 　
10640
 GRC_LCLCTRL_SETINTGRC_LCLCTRL_SETINT 0x00000004 tg3.h 　
10641
 GRC_LCLCTRL_INT_ON_ATTNGRC_LCLCTRL_INT_ON_ATTN 0x00000008 tg3.h 　
10642
 GRC_LCLCTRL_GPIO_INPUT0GRC_LCLCTRL_GPIO_INPUT0 0x00000100 tg3.h 　
10643
 GRC_LCLCTRL_GPIO_INPUT1GRC_LCLCTRL_GPIO_INPUT1 0x00000200 tg3.h 　
10644
 GRC_LCLCTRL_GPIO_INPUT2GRC_LCLCTRL_GPIO_INPUT2 0x00000400 tg3.h 　
10645
 GRC_LCLCTRL_GPIO_OE0GRC_LCLCTRL_GPIO_OE0 0x00000800 tg3.h 　
10646
 GRC_LCLCTRL_GPIO_OE1GRC_LCLCTRL_GPIO_OE1 0x00001000 tg3.h 　
10647
 GRC_LCLCTRL_GPIO_OE2GRC_LCLCTRL_GPIO_OE2 0x00002000 tg3.h 　
10648
 GRC_LCLCTRL_GPIO_OUTPUT0GRC_LCLCTRL_GPIO_OUTPUT0 0x00004000 tg3.h 　
10649
 GRC_LCLCTRL_GPIO_OUTPUT1GRC_LCLCTRL_GPIO_OUTPUT1 0x00008000 tg3.h 　
10650
 GRC_LCLCTRL_GPIO_OUTPUT2GRC_LCLCTRL_GPIO_OUTPUT2 0x00010000 tg3.h 　
10651
 GRC_LCLCTRL_EXTMEM_ENABLEGRC_LCLCTRL_EXTMEM_ENABLE 0x00020000 tg3.h 　
10652
 GRC_LCLCTRL_MEMSZ_MASKGRC_LCLCTRL_MEMSZ_MASK 0x001c0000 tg3.h 　
10653
 GRC_LCLCTRL_MEMSZ_256KGRC_LCLCTRL_MEMSZ_256K 0x00000000 tg3.h 　
10654
 GRC_LCLCTRL_MEMSZ_512KGRC_LCLCTRL_MEMSZ_512K 0x00040000 tg3.h 　
10655
 GRC_LCLCTRL_MEMSZ_1MGRC_LCLCTRL_MEMSZ_1M 0x00080000 tg3.h 　
10656
 GRC_LCLCTRL_MEMSZ_2MGRC_LCLCTRL_MEMSZ_2M 0x000c0000 tg3.h 　
10657
 GRC_LCLCTRL_MEMSZ_4MGRC_LCLCTRL_MEMSZ_4M 0x00100000 tg3.h 　
10658
 GRC_LCLCTRL_MEMSZ_8MGRC_LCLCTRL_MEMSZ_8M 0x00140000 tg3.h 　
10659
 GRC_LCLCTRL_MEMSZ_16MGRC_LCLCTRL_MEMSZ_16M 0x00180000 tg3.h 　
10660
 GRC_LCLCTRL_BANK_SELECTGRC_LCLCTRL_BANK_SELECT 0x00200000 tg3.h 　
10661
 GRC_LCLCTRL_SSRAM_TYPEGRC_LCLCTRL_SSRAM_TYPE 0x00400000 tg3.h 　
10662
 GRC_LCLCTRL_AUTO_SEEPROMGRC_LCLCTRL_AUTO_SEEPROM 0x01000000 tg3.h 　
10663
 GRC_TIMERGRC_TIMER 0x0000680c tg3.h 　
10664
 GRC_RX_CPU_EVENTGRC_RX_CPU_EVENT 0x00006810 tg3.h 　
10665
 GRC_RX_TIMER_REFGRC_RX_TIMER_REF 0x00006814 tg3.h 　
10666
 GRC_RX_CPU_SEMGRC_RX_CPU_SEM 0x00006818 tg3.h 　
10667
 GRC_REMOTE_RX_CPU_ATTNGRC_REMOTE_RX_CPU_ATTN 0x0000681c tg3.h 　
10668
 GRC_TX_CPU_EVENTGRC_TX_CPU_EVENT 0x00006820 tg3.h 　
10669
 GRC_TX_TIMER_REFGRC_TX_TIMER_REF 0x00006824 tg3.h 　
10670
 GRC_TX_CPU_SEMGRC_TX_CPU_SEM 0x00006828 tg3.h 　
10671
 GRC_REMOTE_TX_CPU_ATTNGRC_REMOTE_TX_CPU_ATTN 0x0000682c tg3.h 　
10672
 GRC_MEM_POWER_UPGRC_MEM_POWER_UP 0x00006830 tg3.h 64-bit
10673
 GRC_EEPROM_ADDRGRC_EEPROM_ADDR 0x00006838 tg3.h 　
10674
 EEPROM_ADDR_WRITEEEPROM_ADDR_WRITE 0x00000000 tg3.h 　
10675
 EEPROM_ADDR_READEEPROM_ADDR_READ 0x80000000 tg3.h 　
10676
 EEPROM_ADDR_COMPLETEEEPROM_ADDR_COMPLETE 0x40000000 tg3.h 　
10677
 EEPROM_ADDR_FSM_RESETEEPROM_ADDR_FSM_RESET 0x20000000 tg3.h 　
10678
 EEPROM_ADDR_DEVID_MASKEEPROM_ADDR_DEVID_MASK 0x1c000000 tg3.h 　
10679
 EEPROM_ADDR_DEVID_SHIFTEEPROM_ADDR_DEVID_SHIFT 26 tg3.h 　
10680
 EEPROM_ADDR_STARTEEPROM_ADDR_START 0x02000000 tg3.h 　
10681
 EEPROM_ADDR_CLKPERD_SHIFTEEPROM_ADDR_CLKPERD_SHIFT 16 tg3.h 　
10682
 EEPROM_ADDR_ADDR_MASKEEPROM_ADDR_ADDR_MASK 0x0000ffff tg3.h 　
10683
 EEPROM_ADDR_ADDR_SHIFTEEPROM_ADDR_ADDR_SHIFT 0 tg3.h 　
10684
 EEPROM_DEFAULT_CLOCK_PERIODEEPROM_DEFAULT_CLOCK_PERIOD 0x60 tg3.h 　
10685
 EEPROM_CHIP_SIZEEEPROM_CHIP_SIZE (64 * 1024) tg3.h 　
10686
 GRC_EEPROM_DATAGRC_EEPROM_DATA 0x0000683c tg3.h 　
10687
 GRC_EEPROM_CTRLGRC_EEPROM_CTRL 0x00006840 tg3.h 　
10688
 GRC_MDI_CTRLGRC_MDI_CTRL 0x00006844 tg3.h 　
10689
 GRC_SEEPROM_DELAYGRC_SEEPROM_DELAY 0x00006848 tg3.h 　
10690
 NVRAM_CMDNVRAM_CMD 0x00007000 tg3.h 　
10691
 NVRAM_CMD_RESETNVRAM_CMD_RESET 0x00000001 tg3.h 　
10692
 NVRAM_CMD_DONENVRAM_CMD_DONE 0x00000008 tg3.h 　
10693
 NVRAM_CMD_GONVRAM_CMD_GO 0x00000010 tg3.h 　
10694
 NVRAM_CMD_WRNVRAM_CMD_WR 0x00000020 tg3.h 　
10695
 NVRAM_CMD_RDNVRAM_CMD_RD 0x00000000 tg3.h 　
10696
 NVRAM_CMD_ERASENVRAM_CMD_ERASE 0x00000040 tg3.h 　
10697
 NVRAM_CMD_FIRSTNVRAM_CMD_FIRST 0x00000080 tg3.h 　
10698
 NVRAM_CMD_LASTNVRAM_CMD_LAST 0x00000100 tg3.h 　
10699
 NVRAM_STATNVRAM_STAT 0x00007004 tg3.h 　
10700
 NVRAM_WRDATANVRAM_WRDATA 0x00007008 tg3.h 　
10701
 NVRAM_ADDRNVRAM_ADDR 0x0000700c tg3.h 　
10702
 NVRAM_ADDR_MSKNVRAM_ADDR_MSK 0x00ffffff tg3.h 　
10703
 NVRAM_RDDATANVRAM_RDDATA 0x00007010 tg3.h 　
10704
 NVRAM_CFG1NVRAM_CFG1 0x00007014 tg3.h 　
10705
 NVRAM_CFG1_FLASHIF_ENABNVRAM_CFG1_FLASHIF_ENAB 0x00000001 tg3.h 　
10706
 NVRAM_CFG1_BUFFERED_MODENVRAM_CFG1_BUFFERED_MODE 0x00000002 tg3.h 　
10707
 NVRAM_CFG1_PASS_THRUNVRAM_CFG1_PASS_THRU 0x00000004 tg3.h 　
10708
 NVRAM_CFG1_BIT_BANGNVRAM_CFG1_BIT_BANG 0x00000008 tg3.h 　
10709
 NVRAM_CFG1_COMPAT_BYPASSNVRAM_CFG1_COMPAT_BYPASS 0x80000000 tg3.h 　
10710
 NVRAM_CFG2NVRAM_CFG2 0x00007018 tg3.h 　
10711
 NVRAM_CFG3NVRAM_CFG3 0x0000701c tg3.h 　
10712
 NVRAM_SWARBNVRAM_SWARB 0x00007020 tg3.h 　
10713
 SWARB_REQ_SET0SWARB_REQ_SET0 0x00000001 tg3.h 　
10714
 SWARB_REQ_SET1SWARB_REQ_SET1 0x00000002 tg3.h 　
10715
 SWARB_REQ_SET2SWARB_REQ_SET2 0x00000004 tg3.h 　
10716
 SWARB_REQ_SET3SWARB_REQ_SET3 0x00000008 tg3.h 　
10717
 SWARB_REQ_CLR0SWARB_REQ_CLR0 0x00000010 tg3.h 　
10718
 SWARB_REQ_CLR1SWARB_REQ_CLR1 0x00000020 tg3.h 　
10719
 SWARB_REQ_CLR2SWARB_REQ_CLR2 0x00000040 tg3.h 　
10720
 SWARB_REQ_CLR3SWARB_REQ_CLR3 0x00000080 tg3.h 　
10721
 SWARB_GNT0SWARB_GNT0 0x00000100 tg3.h 　
10722
 SWARB_GNT1SWARB_GNT1 0x00000200 tg3.h 　
10723
 SWARB_GNT2SWARB_GNT2 0x00000400 tg3.h 　
10724
 SWARB_GNT3SWARB_GNT3 0x00000800 tg3.h 　
10725
 SWARB_REQ0SWARB_REQ0 0x00001000 tg3.h 　
10726
 SWARB_REQ1SWARB_REQ1 0x00002000 tg3.h 　
10727
 SWARB_REQ2SWARB_REQ2 0x00004000 tg3.h 　
10728
 SWARB_REQ3SWARB_REQ3 0x00008000 tg3.h 　
10729
 NVRAM_BUFFERED_PAGE_SIZENVRAM_BUFFERED_PAGE_SIZE 264 tg3.h 　
10730
 NVRAM_BUFFERED_PAGE_POSNVRAM_BUFFERED_PAGE_POS 9 tg3.h 　
10731
 NIC_SRAM_WIN_BASENIC_SRAM_WIN_BASE 0x00008000 tg3.h 　
10732
 NIC_SRAM_PAGE_ZERONIC_SRAM_PAGE_ZERO 0x00000000 tg3.h 　
10733
 NIC_SRAM_SEND_RCBNIC_SRAM_SEND_RCB 0x00000100 tg3.h 16 * TG3_BDINFO_...
10734
 NIC_SRAM_RCV_RET_RCBNIC_SRAM_RCV_RET_RCB 0x00000200 tg3.h 16 * TG3_BDINFO_...
10735
 NIC_SRAM_STATS_BLKNIC_SRAM_STATS_BLK 0x00000300 tg3.h 　
10736
 NIC_SRAM_STATUS_BLKNIC_SRAM_STATUS_BLK 0x00000b00 tg3.h 　
10737
 NIC_SRAM_FIRMWARE_MBOXNIC_SRAM_FIRMWARE_MBOX 0x00000b50 tg3.h 　
10738
 NIC_SRAM_FIRMWARE_MBOX_MAGIC1NIC_SRAM_FIRMWARE_MBOX_MAGIC1 0x4B657654 tg3.h 　
10739
 NIC_SRAM_FIRMWARE_MBOX_MAGIC2NIC_SRAM_FIRMWARE_MBOX_MAGIC2 0x4861764b tg3.h !dma on linkchg
10740
 NIC_SRAM_DATA_SIGNIC_SRAM_DATA_SIG 0x00000b54 tg3.h 　
10741
 NIC_SRAM_DATA_SIG_MAGICNIC_SRAM_DATA_SIG_MAGIC 0x4b657654 tg3.h ascii for 'KevT'
10742
 NIC_SRAM_DATA_CFGNIC_SRAM_DATA_CFG 0x00000b58 tg3.h 　
10743
 NIC_SRAM_DATA_CFG_LED_MODE_MASKNIC_SRAM_DATA_CFG_LED_MODE_MASK 0x0000000c tg3.h 　
10744
 NIC_SRAM_DATA_CFG_LED_MODE_UNKNNIC_SRAM_DATA_CFG_LED_MODE_UNKN 0x00000000 tg3.h 　
10745
 NIC_SRAM_DATA_CFG_LED_TRIPLE_SPNIC_SRAM_DATA_CFG_LED_TRIPLE_SP 0x00000004 tg3.h 　
10746
 NIC_SRAM_DATA_CFG_LED_OPEN_DRAINIC_SRAM_DATA_CFG_LED_OPEN_DRAI 0x00000004 tg3.h 　
10747
 NIC_SRAM_DATA_CFG_LED_LINK_SPDNIC_SRAM_DATA_CFG_LED_LINK_SPD 0x00000008 tg3.h 　
10748
 NIC_SRAM_DATA_CFG_LED_OUTPUTNIC_SRAM_DATA_CFG_LED_OUTPUT 0x00000008 tg3.h 　
10749
 NIC_SRAM_DATA_CFG_PHY_TYPE_MASKNIC_SRAM_DATA_CFG_PHY_TYPE_MASK 0x00000030 tg3.h 　
10750
 NIC_SRAM_DATA_CFG_PHY_TYPE_UNKNNIC_SRAM_DATA_CFG_PHY_TYPE_UNKN 0x00000000 tg3.h 　
10751
 NIC_SRAM_DATA_CFG_PHY_TYPE_COPPNIC_SRAM_DATA_CFG_PHY_TYPE_COPP 0x00000010 tg3.h 　
10752
 NIC_SRAM_DATA_CFG_PHY_TYPE_FIBENIC_SRAM_DATA_CFG_PHY_TYPE_FIBE 0x00000020 tg3.h 　
10753
 NIC_SRAM_DATA_CFG_WOL_ENABLENIC_SRAM_DATA_CFG_WOL_ENABLE 0x00000040 tg3.h 　
10754
 NIC_SRAM_DATA_CFG_ASF_ENABLENIC_SRAM_DATA_CFG_ASF_ENABLE 0x00000080 tg3.h 　
10755
 NIC_SRAM_DATA_CFG_EEPROM_WPNIC_SRAM_DATA_CFG_EEPROM_WP 0x00000100 tg3.h 　
10756
 NIC_SRAM_DATA_CFG_MINI_PCINIC_SRAM_DATA_CFG_MINI_PCI 0x00001000 tg3.h 　
10757
 NIC_SRAM_DATA_CFG_FIBER_WOLNIC_SRAM_DATA_CFG_FIBER_WOL 0x00004000 tg3.h 　
10758
 NIC_SRAM_DATA_PHY_IDNIC_SRAM_DATA_PHY_ID 0x00000b74 tg3.h 　
10759
 NIC_SRAM_DATA_PHY_ID1_MASKNIC_SRAM_DATA_PHY_ID1_MASK 0xffff0000 tg3.h 　
10760
 NIC_SRAM_DATA_PHY_ID2_MASKNIC_SRAM_DATA_PHY_ID2_MASK 0x0000ffff tg3.h 　
10761
 NIC_SRAM_FW_CMD_MBOXNIC_SRAM_FW_CMD_MBOX 0x00000b78 tg3.h 　
10762
 FWCMD_NICDRV_ALIVEFWCMD_NICDRV_ALIVE 0x00000001 tg3.h 　
10763
 FWCMD_NICDRV_PAUSE_FWFWCMD_NICDRV_PAUSE_FW 0x00000002 tg3.h 　
10764
 FWCMD_NICDRV_IPV4ADDR_CHGFWCMD_NICDRV_IPV4ADDR_CHG 0x00000003 tg3.h 　
10765
 FWCMD_NICDRV_IPV6ADDR_CHGFWCMD_NICDRV_IPV6ADDR_CHG 0x00000004 tg3.h 　
10766
 FWCMD_NICDRV_FIX_DMARFWCMD_NICDRV_FIX_DMAR 0x00000005 tg3.h 　
10767
 FWCMD_NICDRV_FIX_DMAWFWCMD_NICDRV_FIX_DMAW 0x00000006 tg3.h 　
10768
 NIC_SRAM_FW_CMD_LEN_MBOXNIC_SRAM_FW_CMD_LEN_MBOX 0x00000b7c tg3.h 　
10769
 NIC_SRAM_FW_CMD_DATA_MBOXNIC_SRAM_FW_CMD_DATA_MBOX 0x00000b80 tg3.h 　
10770
 NIC_SRAM_FW_ASF_STATUS_MBOXNIC_SRAM_FW_ASF_STATUS_MBOX 0x00000c00 tg3.h 　
10771
 NIC_SRAM_FW_DRV_STATE_MBOXNIC_SRAM_FW_DRV_STATE_MBOX 0x00000c04 tg3.h 　
10772
 DRV_STATE_STARTDRV_STATE_START 0x00000001 tg3.h 　
10773
 DRV_STATE_UNLOADDRV_STATE_UNLOAD 0x00000002 tg3.h 　
10774
 DRV_STATE_WOLDRV_STATE_WOL 0x00000003 tg3.h 　
10775
 DRV_STATE_SUSPENDDRV_STATE_SUSPEND 0x00000004 tg3.h 　
10776
 NIC_SRAM_FW_RESET_TYPE_MBOXNIC_SRAM_FW_RESET_TYPE_MBOX 0x00000c08 tg3.h 　
10777
 NIC_SRAM_MAC_ADDR_HIGH_MBOXNIC_SRAM_MAC_ADDR_HIGH_MBOX 0x00000c14 tg3.h 　
10778
 NIC_SRAM_MAC_ADDR_LOW_MBOXNIC_SRAM_MAC_ADDR_LOW_MBOX 0x00000c18 tg3.h 　
10779
 NIC_SRAM_RX_MINI_BUFFER_DESCNIC_SRAM_RX_MINI_BUFFER_DESC 0x00001000 tg3.h 　
10780
 NIC_SRAM_DMA_DESC_POOL_BASENIC_SRAM_DMA_DESC_POOL_BASE 0x00002000 tg3.h 　
10781
 NIC_SRAM_DMA_DESC_POOL_SIZENIC_SRAM_DMA_DESC_POOL_SIZE 0x00002000 tg3.h 　
10782
 NIC_SRAM_TX_BUFFER_DESCNIC_SRAM_TX_BUFFER_DESC 0x00004000 tg3.h 512 entries
10783
 NIC_SRAM_RX_BUFFER_DESCNIC_SRAM_RX_BUFFER_DESC 0x00006000 tg3.h 256 entries
10784
 NIC_SRAM_RX_JUMBO_BUFFER_DESCNIC_SRAM_RX_JUMBO_BUFFER_DESC 0x00007000 tg3.h 256 entries
10785
 NIC_SRAM_MBUF_POOL_BASENIC_SRAM_MBUF_POOL_BASE 0x00008000 tg3.h 　
10786
 NIC_SRAM_MBUF_POOL_SIZE96NIC_SRAM_MBUF_POOL_SIZE96 0x00018000 tg3.h 　
10787
 NIC_SRAM_MBUF_POOL_SIZE64NIC_SRAM_MBUF_POOL_SIZE64 0x00010000 tg3.h 　
10788
 NIC_SRAM_MBUF_POOL_BASE5705NIC_SRAM_MBUF_POOL_BASE5705 0x00010000 tg3.h 　
10789
 NIC_SRAM_MBUF_POOL_SIZE5705NIC_SRAM_MBUF_POOL_SIZE5705 0x0000e000 tg3.h 　
10790
 PHY_ADDRPHY_ADDR 0x01 tg3.h 　
10791
 TG3_BMCR_SPEED1000TG3_BMCR_SPEED1000 0x0040 tg3.h 　
10792
 MII_TG3_CTRLMII_TG3_CTRL 0x09 tg3.h 1000-baseT control register
10793
 MII_TG3_CTRL_ADV_1000_HALFMII_TG3_CTRL_ADV_1000_HALF 0x0100 tg3.h 　
10794
 MII_TG3_CTRL_ADV_1000_FULLMII_TG3_CTRL_ADV_1000_FULL 0x0200 tg3.h 　
10795
 MII_TG3_CTRL_AS_MASTERMII_TG3_CTRL_AS_MASTER 0x0800 tg3.h 　
10796
 MII_TG3_CTRL_ENABLE_AS_MASTERMII_TG3_CTRL_ENABLE_AS_MASTER 0x1000 tg3.h 　
10797
 MII_TG3_EXT_CTRLMII_TG3_EXT_CTRL 0x10 tg3.h Extended control register
10798
 MII_TG3_EXT_CTRL_LNK3_LED_MODEMII_TG3_EXT_CTRL_LNK3_LED_MODE 0x0002 tg3.h 　
10799
 MII_TG3_EXT_CTRL_TBIMII_TG3_EXT_CTRL_TBI 0x8000 tg3.h 　
10800
 MII_TG3_EXT_STATMII_TG3_EXT_STAT 0x11 tg3.h Extended status register
10801
 MII_TG3_EXT_STAT_LPASSMII_TG3_EXT_STAT_LPASS 0x0100 tg3.h 　
10802
 MII_TG3_DSP_RW_PORTMII_TG3_DSP_RW_PORT 0x15 tg3.h DSP coefficient read/write port
10803
 MII_TG3_DSP_ADDRESSMII_TG3_DSP_ADDRESS 0x17 tg3.h DSP address register
10804
 MII_TG3_AUX_CTRLMII_TG3_AUX_CTRL 0x18 tg3.h auxilliary control register
10805
 MII_TG3_AUX_STATMII_TG3_AUX_STAT 0x19 tg3.h auxilliary status register
10806
 MII_TG3_AUX_STAT_LPASSMII_TG3_AUX_STAT_LPASS 0x0004 tg3.h 　
10807
 MII_TG3_AUX_STAT_SPDMASKMII_TG3_AUX_STAT_SPDMASK 0x0700 tg3.h 　
10808
 MII_TG3_AUX_STAT_10HALFMII_TG3_AUX_STAT_10HALF 0x0100 tg3.h 　
10809
 MII_TG3_AUX_STAT_10FULLMII_TG3_AUX_STAT_10FULL 0x0200 tg3.h 　
10810
 MII_TG3_AUX_STAT_100HALFMII_TG3_AUX_STAT_100HALF 0x0300 tg3.h 　
10811
 MII_TG3_AUX_STAT_100_4MII_TG3_AUX_STAT_100_4 0x0400 tg3.h 　
10812
 MII_TG3_AUX_STAT_100FULLMII_TG3_AUX_STAT_100FULL 0x0500 tg3.h 　
10813
 MII_TG3_AUX_STAT_1000HALFMII_TG3_AUX_STAT_1000HALF 0x0600 tg3.h 　
10814
 MII_TG3_AUX_STAT_1000FULLMII_TG3_AUX_STAT_1000FULL 0x0700 tg3.h 　
10815
 MII_TG3_ISTATMII_TG3_ISTAT 0x1a tg3.h IRQ status register
10816
 MII_TG3_IMASKMII_TG3_IMASK 0x1b tg3.h IRQ mask register
10817
 MII_TG3_INT_LINKCHGMII_TG3_INT_LINKCHG 0x0002 tg3.h 　
10818
 MII_TG3_INT_SPEEDCHGMII_TG3_INT_SPEEDCHG 0x0004 tg3.h 　
10819
 MII_TG3_INT_DUPLEXCHGMII_TG3_INT_DUPLEXCHG 0x0008 tg3.h 　
10820
 MII_TG3_INT_ANEG_PAGE_RXMII_TG3_INT_ANEG_PAGE_RX 0x0400 tg3.h 　
10821
 TXD_ADDRTXD_ADDR 0x00UL tg3.h 64-bit
10822
 TXD_LEN_FLAGSTXD_LEN_FLAGS 0x08UL tg3.h 32-bit (upper 16-bits are len)
10823
 TXD_VLAN_TAGTXD_VLAN_TAG 0x0cUL tg3.h 32-bit (upper 16-bits are tag)
10824
 TXD_SIZETXD_SIZE 0x10UL tg3.h 　
10825
 TG3_HW_STATUS_SIZETG3_HW_STATUS_SIZE 0x50 tg3.h 　
10826
 FALSEFALSE 0 tlan.h 　
10827
 TRUETRUE 1 tlan.h 　
10828
 TLAN_MIN_FRAME_SIZETLAN_MIN_FRAME_SIZE 64 tlan.h 　
10829
 TLAN_MAX_FRAME_SIZETLAN_MAX_FRAME_SIZE 1600 tlan.h 　
10830
 TLAN_NUM_RX_LISTSTLAN_NUM_RX_LISTS 4 tlan.h 　
10831
 TLAN_NUM_TX_LISTSTLAN_NUM_TX_LISTS 2 tlan.h 　
10832
 TLAN_IGNORETLAN_IGNORE 0 tlan.h 　
10833
 TLAN_RECORDTLAN_RECORD 1 tlan.h 　
10834
 TLAN_DEBUG_GNRLTLAN_DEBUG_GNRL 0x0001 tlan.h 　
10835
 TLAN_DEBUG_TXTLAN_DEBUG_TX 0x0002 tlan.h 　
10836
 TLAN_DEBUG_RXTLAN_DEBUG_RX 0x0004 tlan.h 　
10837
 TLAN_DEBUG_LISTTLAN_DEBUG_LIST 0x0008 tlan.h 　
10838
 TLAN_DEBUG_PROBETLAN_DEBUG_PROBE 0x0010 tlan.h 　
10839
 TX_TIMEOUTTX_TIMEOUT (10*HZ) tlan.h We need time for auto-neg
10840
 MAX_TLAN_BOARDSMAX_TLAN_BOARDS 8 tlan.h Max number of boards installed at a time
10841
 PCI_DEVICE_ID_NETELLIGENT_10_T2PCI_DEVICE_ID_NETELLIGENT_10_T2 0xB012 tlan.h 　
10842
 PCI_DEVICE_ID_NETELLIGENT_10_10PCI_DEVICE_ID_NETELLIGENT_10_10 0xB030 tlan.h 　
10843
 PCI_DEVICE_ID_OLICOM_OC2183PCI_DEVICE_ID_OLICOM_OC2183 0x0013 tlan.h 　
10844
 PCI_DEVICE_ID_OLICOM_OC2325PCI_DEVICE_ID_OLICOM_OC2325 0x0012 tlan.h 　
10845
 PCI_DEVICE_ID_OLICOM_OC2326PCI_DEVICE_ID_OLICOM_OC2326 0x0014 tlan.h 　
10846
 TLAN_ADAPTER_NONETLAN_ADAPTER_NONE 0x00000000 tlan.h 　
10847
 TLAN_ADAPTER_UNMANAGED_PHYTLAN_ADAPTER_UNMANAGED_PHY 0x00000001 tlan.h 　
10848
 TLAN_ADAPTER_BIT_RATE_PHYTLAN_ADAPTER_BIT_RATE_PHY 0x00000002 tlan.h 　
10849
 TLAN_ADAPTER_USE_INTERN_10TLAN_ADAPTER_USE_INTERN_10 0x00000004 tlan.h 　
10850
 TLAN_ADAPTER_ACTIVITY_LEDTLAN_ADAPTER_ACTIVITY_LED 0x00000008 tlan.h 　
10851
 TLAN_SPEED_DEFAULTTLAN_SPEED_DEFAULT 0 tlan.h 　
10852
 TLAN_SPEED_10TLAN_SPEED_10 10 tlan.h 　
10853
 TLAN_SPEED_100TLAN_SPEED_100 100 tlan.h 　
10854
 TLAN_DUPLEX_DEFAULTTLAN_DUPLEX_DEFAULT 0 tlan.h 　
10855
 TLAN_DUPLEX_HALFTLAN_DUPLEX_HALF 1 tlan.h 　
10856
 TLAN_DUPLEX_FULLTLAN_DUPLEX_FULL 2 tlan.h 　
10857
 EISA_IDEISA_ID 0xc80 tlan.h EISA ID Registers
10858
 EISA_ID0EISA_ID0 0xc80 tlan.h EISA ID Register 0
10859
 EISA_ID1EISA_ID1 0xc81 tlan.h EISA ID Register 1
10860
 EISA_ID2EISA_ID2 0xc82 tlan.h EISA ID Register 2
10861
 EISA_ID3EISA_ID3 0xc83 tlan.h EISA ID Register 3
10862
 EISA_CREISA_CR 0xc84 tlan.h EISA Control Register
10863
 EISA_REG0EISA_REG0 0xc88 tlan.h EISA Configuration Register 0
10864
 EISA_REG1EISA_REG1 0xc89 tlan.h EISA Configuration Register 1
10865
 EISA_REG2EISA_REG2 0xc8a tlan.h EISA Configuration Register 2
10866
 EISA_REG3EISA_REG3 0xc8f tlan.h EISA Configuration Register 3
10867
 EISA_APROMEISA_APROM 0xc90 tlan.h Ethernet Address PROM
10868
 TLAN_BUFFERS_PER_LISTTLAN_BUFFERS_PER_LIST 10 tlan.h 　
10869
 TLAN_LAST_BUFFERTLAN_LAST_BUFFER 0x80000000 tlan.h 　
10870
 TLAN_CSTAT_UNUSEDTLAN_CSTAT_UNUSED 0x8000 tlan.h 　
10871
 TLAN_CSTAT_FRM_CMPTLAN_CSTAT_FRM_CMP 0x4000 tlan.h 　
10872
 TLAN_CSTAT_READYTLAN_CSTAT_READY 0x3000 tlan.h 　
10873
 TLAN_CSTAT_EOCTLAN_CSTAT_EOC 0x0800 tlan.h 　
10874
 TLAN_CSTAT_RX_ERRORTLAN_CSTAT_RX_ERROR 0x0400 tlan.h 　
10875
 TLAN_CSTAT_PASS_CRCTLAN_CSTAT_PASS_CRC 0x0200 tlan.h 　
10876
 TLAN_CSTAT_DP_PRTLAN_CSTAT_DP_PR 0x0100 tlan.h 　
10877
 TLAN_PHY_MAX_ADDRTLAN_PHY_MAX_ADDR 0x1F tlan.h 　
10878
 TLAN_PHY_NONETLAN_PHY_NONE 0x20 tlan.h 　
10879
 TLAN_TIMER_LINK_BEATTLAN_TIMER_LINK_BEAT 1 tlan.h 　
10880
 TLAN_TIMER_ACTIVITYTLAN_TIMER_ACTIVITY 2 tlan.h 　
10881
 TLAN_TIMER_PHY_PDOWNTLAN_TIMER_PHY_PDOWN 3 tlan.h 　
10882
 TLAN_TIMER_PHY_PUPTLAN_TIMER_PHY_PUP 4 tlan.h 　
10883
 TLAN_TIMER_PHY_RESETTLAN_TIMER_PHY_RESET 5 tlan.h 　
10884
 TLAN_TIMER_PHY_START_LINKTLAN_TIMER_PHY_START_LINK 6 tlan.h 　
10885
 TLAN_TIMER_PHY_FINISH_ANTLAN_TIMER_PHY_FINISH_AN 7 tlan.h 　
10886
 TLAN_TIMER_FINISH_RESETTLAN_TIMER_FINISH_RESET 8 tlan.h 　
10887
 TLAN_TIMER_ACT_DELAYTLAN_TIMER_ACT_DELAY (HZ/10) tlan.h 　
10888
 TLAN_EEPROM_ACKTLAN_EEPROM_ACK 0 tlan.h 　
10889
 TLAN_EEPROM_STOPTLAN_EEPROM_STOP 1 tlan.h 　
10890
 TLAN_HOST_CMDTLAN_HOST_CMD 0x00 tlan.h 　
10891
 TLAN_HC_GOTLAN_HC_GO 0x80000000 tlan.h 　
10892
 TLAN_HC_STOPTLAN_HC_STOP 0x40000000 tlan.h 　
10893
 TLAN_HC_ACKTLAN_HC_ACK 0x20000000 tlan.h 　
10894
 TLAN_HC_CS_MASKTLAN_HC_CS_MASK 0x1FE00000 tlan.h 　
10895
 TLAN_HC_EOCTLAN_HC_EOC 0x00100000 tlan.h 　
10896
 TLAN_HC_RTTLAN_HC_RT 0x00080000 tlan.h 　
10897
 TLAN_HC_NESTLAN_HC_NES 0x00040000 tlan.h 　
10898
 TLAN_HC_AD_RSTTLAN_HC_AD_RST 0x00008000 tlan.h 　
10899
 TLAN_HC_LD_TMRTLAN_HC_LD_TMR 0x00004000 tlan.h 　
10900
 TLAN_HC_LD_THRTLAN_HC_LD_THR 0x00002000 tlan.h 　
10901
 TLAN_HC_REQ_INTTLAN_HC_REQ_INT 0x00001000 tlan.h 　
10902
 TLAN_HC_INT_OFFTLAN_HC_INT_OFF 0x00000800 tlan.h 　
10903
 TLAN_HC_INT_ONTLAN_HC_INT_ON 0x00000400 tlan.h 　
10904
 TLAN_HC_AC_MASKTLAN_HC_AC_MASK 0x000000FF tlan.h 　
10905
 TLAN_CH_PARMTLAN_CH_PARM 0x04 tlan.h 　
10906
 TLAN_DIO_ADRTLAN_DIO_ADR 0x08 tlan.h 　
10907
 TLAN_DA_ADR_INCTLAN_DA_ADR_INC 0x8000 tlan.h 　
10908
 TLAN_DA_RAM_ADRTLAN_DA_RAM_ADR 0x4000 tlan.h 　
10909
 TLAN_HOST_INTTLAN_HOST_INT 0x0A tlan.h 　
10910
 TLAN_HI_IV_MASKTLAN_HI_IV_MASK 0x1FE0 tlan.h 　
10911
 TLAN_HI_IT_MASKTLAN_HI_IT_MASK 0x001C tlan.h 　
10912
 TLAN_DIO_DATATLAN_DIO_DATA 0x0C tlan.h 　
10913
 TLAN_NET_CMDTLAN_NET_CMD 0x00 tlan.h 　
10914
 TLAN_NET_CMD_NRESETTLAN_NET_CMD_NRESET 0x80 tlan.h 　
10915
 TLAN_NET_CMD_NWRAPTLAN_NET_CMD_NWRAP 0x40 tlan.h 　
10916
 TLAN_NET_CMD_CSFTLAN_NET_CMD_CSF 0x20 tlan.h 　
10917
 TLAN_NET_CMD_CAFTLAN_NET_CMD_CAF 0x10 tlan.h 　
10918
 TLAN_NET_CMD_NOBRXTLAN_NET_CMD_NOBRX 0x08 tlan.h 　
10919
 TLAN_NET_CMD_DUPLEXTLAN_NET_CMD_DUPLEX 0x04 tlan.h 　
10920
 TLAN_NET_CMD_TRFRAMTLAN_NET_CMD_TRFRAM 0x02 tlan.h 　
10921
 TLAN_NET_CMD_TXPACETLAN_NET_CMD_TXPACE 0x01 tlan.h 　
10922
 TLAN_NET_SIOTLAN_NET_SIO 0x01 tlan.h 　
10923
 TLAN_NET_SIO_MINTENTLAN_NET_SIO_MINTEN 0x80 tlan.h 　
10924
 TLAN_NET_SIO_ECLOKTLAN_NET_SIO_ECLOK 0x40 tlan.h 　
10925
 TLAN_NET_SIO_ETXENTLAN_NET_SIO_ETXEN 0x20 tlan.h 　
10926
 TLAN_NET_SIO_EDATATLAN_NET_SIO_EDATA 0x10 tlan.h 　
10927
 TLAN_NET_SIO_NMRSTTLAN_NET_SIO_NMRST 0x08 tlan.h 　
10928
 TLAN_NET_SIO_MCLKTLAN_NET_SIO_MCLK 0x04 tlan.h 　
10929
 TLAN_NET_SIO_MTXENTLAN_NET_SIO_MTXEN 0x02 tlan.h 　
10930
 TLAN_NET_SIO_MDATATLAN_NET_SIO_MDATA 0x01 tlan.h 　
10931
 TLAN_NET_STSTLAN_NET_STS 0x02 tlan.h 　
10932
 TLAN_NET_STS_MIRQTLAN_NET_STS_MIRQ 0x80 tlan.h 　
10933
 TLAN_NET_STS_HBEATTLAN_NET_STS_HBEAT 0x40 tlan.h 　
10934
 TLAN_NET_STS_TXSTOPTLAN_NET_STS_TXSTOP 0x20 tlan.h 　
10935
 TLAN_NET_STS_RXSTOPTLAN_NET_STS_RXSTOP 0x10 tlan.h 　
10936
 TLAN_NET_STS_RSRVDTLAN_NET_STS_RSRVD 0x0F tlan.h 　
10937
 TLAN_NET_MASKTLAN_NET_MASK 0x03 tlan.h 　
10938
 TLAN_NET_MASK_MASK7TLAN_NET_MASK_MASK7 0x80 tlan.h 　
10939
 TLAN_NET_MASK_MASK6TLAN_NET_MASK_MASK6 0x40 tlan.h 　
10940
 TLAN_NET_MASK_MASK5TLAN_NET_MASK_MASK5 0x20 tlan.h 　
10941
 TLAN_NET_MASK_MASK4TLAN_NET_MASK_MASK4 0x10 tlan.h 　
10942
 TLAN_NET_MASK_RSRVDTLAN_NET_MASK_RSRVD 0x0F tlan.h 　
10943
 TLAN_NET_CONFIGTLAN_NET_CONFIG 0x04 tlan.h 　
10944
 TLAN_NET_CFG_RCLKTLAN_NET_CFG_RCLK 0x8000 tlan.h 　
10945
 TLAN_NET_CFG_TCLKTLAN_NET_CFG_TCLK 0x4000 tlan.h 　
10946
 TLAN_NET_CFG_BITTLAN_NET_CFG_BIT 0x2000 tlan.h 　
10947
 TLAN_NET_CFG_RXCRCTLAN_NET_CFG_RXCRC 0x1000 tlan.h 　
10948
 TLAN_NET_CFG_PEFTLAN_NET_CFG_PEF 0x0800 tlan.h 　
10949
 TLAN_NET_CFG_1FRAGTLAN_NET_CFG_1FRAG 0x0400 tlan.h 　
10950
 TLAN_NET_CFG_1CHANTLAN_NET_CFG_1CHAN 0x0200 tlan.h 　
10951
 TLAN_NET_CFG_MTESTTLAN_NET_CFG_MTEST 0x0100 tlan.h 　
10952
 TLAN_NET_CFG_PHY_ENTLAN_NET_CFG_PHY_EN 0x0080 tlan.h 　
10953
 TLAN_NET_CFG_MSMASKTLAN_NET_CFG_MSMASK 0x007F tlan.h 　
10954
 TLAN_MAN_TESTTLAN_MAN_TEST 0x06 tlan.h 　
10955
 TLAN_DEF_VENDOR_IDTLAN_DEF_VENDOR_ID 0x08 tlan.h 　
10956
 TLAN_DEF_DEVICE_IDTLAN_DEF_DEVICE_ID 0x0A tlan.h 　
10957
 TLAN_DEF_REVISIONTLAN_DEF_REVISION 0x0C tlan.h 　
10958
 TLAN_DEF_SUBCLASSTLAN_DEF_SUBCLASS 0x0D tlan.h 　
10959
 TLAN_DEF_MIN_LATTLAN_DEF_MIN_LAT 0x0E tlan.h 　
10960
 TLAN_DEF_MAX_LATTLAN_DEF_MAX_LAT 0x0F tlan.h 　
10961
 TLAN_AREG_0TLAN_AREG_0 0x10 tlan.h 　
10962
 TLAN_AREG_1TLAN_AREG_1 0x16 tlan.h 　
10963
 TLAN_AREG_2TLAN_AREG_2 0x1C tlan.h 　
10964
 TLAN_AREG_3TLAN_AREG_3 0x22 tlan.h 　
10965
 TLAN_HASH_1TLAN_HASH_1 0x28 tlan.h 　
10966
 TLAN_HASH_2TLAN_HASH_2 0x2C tlan.h 　
10967
 TLAN_GOOD_TX_FRMSTLAN_GOOD_TX_FRMS 0x30 tlan.h 　
10968
 TLAN_TX_UNDERUNSTLAN_TX_UNDERUNS 0x33 tlan.h 　
10969
 TLAN_GOOD_RX_FRMSTLAN_GOOD_RX_FRMS 0x34 tlan.h 　
10970
 TLAN_RX_OVERRUNSTLAN_RX_OVERRUNS 0x37 tlan.h 　
10971
 TLAN_DEFERRED_TXTLAN_DEFERRED_TX 0x38 tlan.h 　
10972
 TLAN_CRC_ERRORSTLAN_CRC_ERRORS 0x3A tlan.h 　
10973
 TLAN_CODE_ERRORSTLAN_CODE_ERRORS 0x3B tlan.h 　
10974
 TLAN_MULTICOL_FRMSTLAN_MULTICOL_FRMS 0x3C tlan.h 　
10975
 TLAN_SINGLECOL_FRMSTLAN_SINGLECOL_FRMS 0x3E tlan.h 　
10976
 TLAN_EXCESSCOL_FRMSTLAN_EXCESSCOL_FRMS 0x40 tlan.h 　
10977
 TLAN_LATE_COLSTLAN_LATE_COLS 0x41 tlan.h 　
10978
 TLAN_CARRIER_LOSSTLAN_CARRIER_LOSS 0x42 tlan.h 　
10979
 TLAN_ACOMMITTLAN_ACOMMIT 0x43 tlan.h 　
10980
 TLAN_LED_REGTLAN_LED_REG 0x44 tlan.h 　
10981
 TLAN_LED_ACTTLAN_LED_ACT 0x10 tlan.h 　
10982
 TLAN_LED_LINKTLAN_LED_LINK 0x01 tlan.h 　
10983
 TLAN_BSIZE_REGTLAN_BSIZE_REG 0x45 tlan.h 　
10984
 TLAN_MAX_RXTLAN_MAX_RX 0x46 tlan.h 　
10985
 TLAN_INT_DISTLAN_INT_DIS 0x48 tlan.h 　
10986
 TLAN_ID_TX_EOCTLAN_ID_TX_EOC 0x04 tlan.h 　
10987
 TLAN_ID_RX_EOFTLAN_ID_RX_EOF 0x02 tlan.h 　
10988
 TLAN_ID_RX_EOCTLAN_ID_RX_EOC 0x01 tlan.h 　
10989
 TLAN_INT_NUMBER_OF_INTSTLAN_INT_NUMBER_OF_INTS 8 tlan.h 　
10990
 TLAN_INT_NONETLAN_INT_NONE 0x0000 tlan.h 　
10991
 TLAN_INT_TX_EOFTLAN_INT_TX_EOF 0x0001 tlan.h 　
10992
 TLAN_INT_STAT_OVERFLOWTLAN_INT_STAT_OVERFLOW 0x0002 tlan.h 　
10993
 TLAN_INT_RX_EOFTLAN_INT_RX_EOF 0x0003 tlan.h 　
10994
 TLAN_INT_DUMMYTLAN_INT_DUMMY 0x0004 tlan.h 　
10995
 TLAN_INT_TX_EOCTLAN_INT_TX_EOC 0x0005 tlan.h 　
10996
 TLAN_INT_STATUS_CHECKTLAN_INT_STATUS_CHECK 0x0006 tlan.h 　
10997
 TLAN_INT_RX_EOCTLAN_INT_RX_EOC 0x0007 tlan.h 　
10998
 TLAN_TLPHY_IDTLAN_TLPHY_ID 0x10 tlan.h 　
10999
 TLAN_TLPHY_CTLTLAN_TLPHY_CTL 0x11 tlan.h 　
11000
 TLAN_TC_IGLINKTLAN_TC_IGLINK 0x8000 tlan.h 　
11001
 TLAN_TC_SWAPOLTLAN_TC_SWAPOL 0x4000 tlan.h 　
11002
 TLAN_TC_AUISELTLAN_TC_AUISEL 0x2000 tlan.h 　
11003
 TLAN_TC_SQEENTLAN_TC_SQEEN 0x1000 tlan.h 　
11004
 TLAN_TC_MTESTTLAN_TC_MTEST 0x0800 tlan.h 　
11005
 TLAN_TC_RESERVEDTLAN_TC_RESERVED 0x07F8 tlan.h 　
11006
 TLAN_TC_NFEWTLAN_TC_NFEW 0x0004 tlan.h 　
11007
 TLAN_TC_INTENTLAN_TC_INTEN 0x0002 tlan.h 　
11008
 TLAN_TC_TINTTLAN_TC_TINT 0x0001 tlan.h 　
11009
 TLAN_TLPHY_STSTLAN_TLPHY_STS 0x12 tlan.h 　
11010
 TLAN_TS_MINTTLAN_TS_MINT 0x8000 tlan.h 　
11011
 TLAN_TS_PHOKTLAN_TS_PHOK 0x4000 tlan.h 　
11012
 TLAN_TS_POLOKTLAN_TS_POLOK 0x2000 tlan.h 　
11013
 TLAN_TS_TPENERGYTLAN_TS_TPENERGY 0x1000 tlan.h 　
11014
 TLAN_TS_RESERVEDTLAN_TS_RESERVED 0x0FFF tlan.h 　
11015
 TLAN_TLPHY_PARTLAN_TLPHY_PAR 0x19 tlan.h 　
11016
 TLAN_PHY_CIM_STATTLAN_PHY_CIM_STAT 0x0020 tlan.h 　
11017
 TLAN_PHY_SPEED_100TLAN_PHY_SPEED_100 0x0040 tlan.h 　
11018
 TLAN_PHY_DUPLEX_FULLTLAN_PHY_DUPLEX_FULL 0x0080 tlan.h 　
11019
 TLAN_PHY_AN_EN_STATTLAN_PHY_AN_EN_STAT 0x0400 tlan.h 　
11020
 NAT_SEM_ID1NAT_SEM_ID1 0x2000 tlan.h 　
11021
 NAT_SEM_ID2NAT_SEM_ID2 0x5C01 tlan.h 　
11022
 LEVEL1_ID1LEVEL1_ID1 0x7810 tlan.h 　
11023
 LEVEL1_ID2LEVEL1_ID2 0x0000 tlan.h 　
11024
 VELOCITY_NAMEVELOCITY_NAME "via-velocity" via-velocity.h 　
11025
 VELOCITY_FULL_DRV_NAMVELOCITY_FULL_DRV_NAM "VIA Networking Velocity Family Gigabit Ethernet Adapter Driver" via-velocity.h 　
11026
 VELOCITY_VERSIONVELOCITY_VERSION "1.13" via-velocity.h 　
11027
 PKT_BUF_SZPKT_BUF_SZ 1564 via-velocity.h 　
11028
 MAX_UNITSMAX_UNITS 8 via-velocity.h 　
11029
 OPTION_DEFAULTOPTION_DEFAULT { [0 ... MAX_UNITS-1] = -1} via-velocity.h 　
11030
 REV_ID_VT6110REV_ID_VT6110 (0) via-velocity.h 　
11031
 B_OWNED_BY_CHIPB_OWNED_BY_CHIP 1 via-velocity.h 　
11032
 B_OWNED_BY_HOSTB_OWNED_BY_HOST 0 via-velocity.h 　
11033
 RSR_DETAGRSR_DETAG 0x0080 via-velocity.h 　
11034
 RSR_SNTAGRSR_SNTAG 0x0040 via-velocity.h 　
11035
 RSR_RXERRSR_RXER 0x0020 via-velocity.h 　
11036
 RSR_RLRSR_RL 0x0010 via-velocity.h 　
11037
 RSR_CERSR_CE 0x0008 via-velocity.h 　
11038
 RSR_FAERSR_FAE 0x0004 via-velocity.h 　
11039
 RSR_CRCRSR_CRC 0x0002 via-velocity.h 　
11040
 RSR_VIDMRSR_VIDM 0x0001 via-velocity.h 　
11041
 RSR_RXOKRSR_RXOK 0x8000 via-velocity.h rx OK
11042
 RSR_PFTRSR_PFT 0x4000 via-velocity.h Perfect filtering address match
11043
 RSR_MARRSR_MAR 0x2000 via-velocity.h MAC accept multicast address packet
11044
 RSR_BARRSR_BAR 0x1000 via-velocity.h MAC accept broadcast address packet
11045
 RSR_PHYRSR_PHY 0x0800 via-velocity.h MAC accept physical address packet
11046
 RSR_VTAGRSR_VTAG 0x0400 via-velocity.h 802.1p/1q tagging packet indicator
11047
 RSR_STPRSR_STP 0x0200 via-velocity.h start of packet
11048
 RSR_EDPRSR_EDP 0x0100 via-velocity.h end of packet
11049
 RSR1_RXOKRSR1_RXOK 0x80 via-velocity.h rx OK
11050
 RSR1_PFTRSR1_PFT 0x40 via-velocity.h Perfect filtering address match
11051
 RSR1_MARRSR1_MAR 0x20 via-velocity.h MAC accept multicast address packet
11052
 RSR1_BARRSR1_BAR 0x10 via-velocity.h MAC accept broadcast address packet
11053
 RSR1_PHYRSR1_PHY 0x08 via-velocity.h MAC accept physical address packet
11054
 RSR1_VTAGRSR1_VTAG 0x04 via-velocity.h 802.1p/1q tagging packet indicator
11055
 RSR1_STPRSR1_STP 0x02 via-velocity.h start of packet
11056
 RSR1_EDPRSR1_EDP 0x01 via-velocity.h end of packet
11057
 CSM_IPOKCSM_IPOK 0x40 via-velocity.h IP Checkusm validatiaon ok
11058
 CSM_TUPOKCSM_TUPOK 0x20 via-velocity.h TCP/UDP Checkusm validatiaon ok
11059
 CSM_FRAGCSM_FRAG 0x10 via-velocity.h Fragment IP datagram
11060
 CSM_IPKTCSM_IPKT 0x04 via-velocity.h Received an IP packet
11061
 CSM_TCPKTCSM_TCPKT 0x02 via-velocity.h Received a TCP packet
11062
 CSM_UDPKTCSM_UDPKT 0x01 via-velocity.h Received a UDP packet
11063
 TSR0_ABTTSR0_ABT 0x0080 via-velocity.h Tx abort because of excessive collision
11064
 TSR0_OWTTSR0_OWT 0x0040 via-velocity.h Jumbo frame Tx abort
11065
 TSR0_OWCTSR0_OWC 0x0020 via-velocity.h Out of window collision
11066
 TSR0_COLSTSR0_COLS 0x0010 via-velocity.h experience collision in this transmit event
11067
 TSR0_NCR3TSR0_NCR3 0x0008 via-velocity.h collision retry counter[3]
11068
 TSR0_NCR2TSR0_NCR2 0x0004 via-velocity.h collision retry counter[2]
11069
 TSR0_NCR1TSR0_NCR1 0x0002 via-velocity.h collision retry counter[1]
11070
 TSR0_NCR0TSR0_NCR0 0x0001 via-velocity.h collision retry counter[0]
11071
 TSR0_TERRTSR0_TERR 0x8000 via-velocity.h 　
11072
 TSR0_FDXTSR0_FDX 0x4000 via-velocity.h current transaction is serviced by full duplex mode
11073
 TSR0_GMIITSR0_GMII 0x2000 via-velocity.h current transaction is serviced by GMII mode
11074
 TSR0_LNKFLTSR0_LNKFL 0x1000 via-velocity.h packet serviced during link down
11075
 TSR0_SHDNTSR0_SHDN 0x0400 via-velocity.h shutdown case
11076
 TSR0_CRSTSR0_CRS 0x0200 via-velocity.h carrier sense lost
11077
 TSR0_CDHTSR0_CDH 0x0100 via-velocity.h AQE test fail (CD heartbeat)
11078
 TSR1_TERRTSR1_TERR 0x80 via-velocity.h 　
11079
 TSR1_FDXTSR1_FDX 0x40 via-velocity.h current transaction is serviced by full duplex mode
11080
 TSR1_GMIITSR1_GMII 0x20 via-velocity.h current transaction is serviced by GMII mode
11081
 TSR1_LNKFLTSR1_LNKFL 0x10 via-velocity.h packet serviced during link down
11082
 TSR1_SHDNTSR1_SHDN 0x04 via-velocity.h shutdown case
11083
 TSR1_CRSTSR1_CRS 0x02 via-velocity.h carrier sense lost
11084
 TSR1_CDHTSR1_CDH 0x01 via-velocity.h AQE test fail (CD heartbeat)
11085
 TCR0_TICTCR0_TIC 0x80 via-velocity.h assert interrupt immediately while descriptor has been send complete
11086
 TCR0_PICTCR0_PIC 0x40 via-velocity.h priority interrupt request, INA# is issued over adaptive interrupt scheme
11087
 TCR0_VETAGTCR0_VETAG 0x20 via-velocity.h enable VLAN tag
11088
 TCR0_IPCKTCR0_IPCK 0x10 via-velocity.h request IP checksum calculation.
11089
 TCR0_UDPCKTCR0_UDPCK 0x08 via-velocity.h request UDP checksum calculation.
11090
 TCR0_TCPCKTCR0_TCPCK 0x04 via-velocity.h request TCP checksum calculation.
11091
 TCR0_JMBOTCR0_JMBO 0x02 via-velocity.h indicate a jumbo packet in GMAC side
11092
 TCR0_CRCTCR0_CRC 0x01 via-velocity.h disable CRC generation
11093
 TCPLS_NORMALTCPLS_NORMAL 3 via-velocity.h 　
11094
 TCPLS_STARTTCPLS_START 2 via-velocity.h 　
11095
 TCPLS_ENDTCPLS_END 1 via-velocity.h 　
11096
 TCPLS_MEDTCPLS_MED 0 via-velocity.h 　
11097
 CB_RX_BUF_SIZECB_RX_BUF_SIZE 2048UL via-velocity.h max buffer size
11098
 CB_MAX_RD_NUMCB_MAX_RD_NUM 512 via-velocity.h MAX # of RD
11099
 CB_MAX_TD_NUMCB_MAX_TD_NUM 256 via-velocity.h MAX # of TD
11100
 CB_INIT_RD_NUM_3119CB_INIT_RD_NUM_3119 128 via-velocity.h init # of RD, for setup VT3119
11101
 CB_INIT_TD_NUM_3119CB_INIT_TD_NUM_3119 64 via-velocity.h init # of TD, for setup VT3119
11102
 CB_INIT_RD_NUMCB_INIT_RD_NUM 128 via-velocity.h init # of RD, for setup default
11103
 CB_INIT_TD_NUMCB_INIT_TD_NUM 64 via-velocity.h init # of TD, for setup default
11104
 CB_TD_RING_NUMCB_TD_RING_NUM 4 via-velocity.h # of TD rings.
11105
 CB_MAX_SEG_PER_PKTCB_MAX_SEG_PER_PKT 7 via-velocity.h max data seg per packet (Tx)
11106
 CB_MAX_TX_ABORT_RETRYCB_MAX_TX_ABORT_RETRY 3 via-velocity.h 　
11107
 MCAM_SIZEMCAM_SIZE 64 via-velocity.h 　
11108
 VCAM_SIZEVCAM_SIZE 64 via-velocity.h 　
11109
 TX_QUEUE_NOTX_QUEUE_NO 4 via-velocity.h 　
11110
 MAX_HW_MIB_COUNTERMAX_HW_MIB_COUNTER 32 via-velocity.h 　
11111
 VELOCITY_MIN_MTUVELOCITY_MIN_MTU (1514-14) via-velocity.h 　
11112
 VELOCITY_MAX_MTUVELOCITY_MAX_MTU (9000) via-velocity.h 　
11113
 MAC_REG_PARMAC_REG_PAR 0x00 via-velocity.h physical address
11114
 MAC_REG_RCRMAC_REG_RCR 0x06 via-velocity.h 　
11115
 MAC_REG_TCRMAC_REG_TCR 0x07 via-velocity.h 　
11116
 MAC_REG_CR0_SETMAC_REG_CR0_SET 0x08 via-velocity.h 　
11117
 MAC_REG_CR1_SETMAC_REG_CR1_SET 0x09 via-velocity.h 　
11118
 MAC_REG_CR2_SETMAC_REG_CR2_SET 0x0A via-velocity.h 　
11119
 MAC_REG_CR3_SETMAC_REG_CR3_SET 0x0B via-velocity.h 　
11120
 MAC_REG_CR0_CLRMAC_REG_CR0_CLR 0x0C via-velocity.h 　
11121
 MAC_REG_CR1_CLRMAC_REG_CR1_CLR 0x0D via-velocity.h 　
11122
 MAC_REG_CR2_CLRMAC_REG_CR2_CLR 0x0E via-velocity.h 　
11123
 MAC_REG_CR3_CLRMAC_REG_CR3_CLR 0x0F via-velocity.h 　
11124
 MAC_REG_MARMAC_REG_MAR 0x10 via-velocity.h 　
11125
 MAC_REG_CAMMAC_REG_CAM 0x10 via-velocity.h 　
11126
 MAC_REG_DEC_BASE_HIMAC_REG_DEC_BASE_HI 0x18 via-velocity.h 　
11127
 MAC_REG_DBF_BASE_HIMAC_REG_DBF_BASE_HI 0x1C via-velocity.h 　
11128
 MAC_REG_ISR_CTLMAC_REG_ISR_CTL 0x20 via-velocity.h 　
11129
 MAC_REG_ISR_HOTMRMAC_REG_ISR_HOTMR 0x20 via-velocity.h 　
11130
 MAC_REG_ISR_TSUPTHRMAC_REG_ISR_TSUPTHR 0x20 via-velocity.h 　
11131
 MAC_REG_ISR_RSUPTHRMAC_REG_ISR_RSUPTHR 0x20 via-velocity.h 　
11132
 MAC_REG_ISR_CTL1MAC_REG_ISR_CTL1 0x21 via-velocity.h 　
11133
 MAC_REG_TXE_SRMAC_REG_TXE_SR 0x22 via-velocity.h 　
11134
 MAC_REG_RXE_SRMAC_REG_RXE_SR 0x23 via-velocity.h 　
11135
 MAC_REG_ISRMAC_REG_ISR 0x24 via-velocity.h 　
11136
 MAC_REG_ISR0MAC_REG_ISR0 0x24 via-velocity.h 　
11137
 MAC_REG_ISR1MAC_REG_ISR1 0x25 via-velocity.h 　
11138
 MAC_REG_ISR2MAC_REG_ISR2 0x26 via-velocity.h 　
11139
 MAC_REG_ISR3MAC_REG_ISR3 0x27 via-velocity.h 　
11140
 MAC_REG_IMRMAC_REG_IMR 0x28 via-velocity.h 　
11141
 MAC_REG_IMR0MAC_REG_IMR0 0x28 via-velocity.h 　
11142
 MAC_REG_IMR1MAC_REG_IMR1 0x29 via-velocity.h 　
11143
 MAC_REG_IMR2MAC_REG_IMR2 0x2A via-velocity.h 　
11144
 MAC_REG_IMR3MAC_REG_IMR3 0x2B via-velocity.h 　
11145
 MAC_REG_TDCSR_SETMAC_REG_TDCSR_SET 0x30 via-velocity.h 　
11146
 MAC_REG_RDCSR_SETMAC_REG_RDCSR_SET 0x32 via-velocity.h 　
11147
 MAC_REG_TDCSR_CLRMAC_REG_TDCSR_CLR 0x34 via-velocity.h 　
11148
 MAC_REG_RDCSR_CLRMAC_REG_RDCSR_CLR 0x36 via-velocity.h 　
11149
 MAC_REG_RDBASE_LOMAC_REG_RDBASE_LO 0x38 via-velocity.h 　
11150
 MAC_REG_RDINDXMAC_REG_RDINDX 0x3C via-velocity.h 　
11151
 MAC_REG_TDBASE_LOMAC_REG_TDBASE_LO 0x40 via-velocity.h 　
11152
 MAC_REG_RDCSIZEMAC_REG_RDCSIZE 0x50 via-velocity.h 　
11153
 MAC_REG_TDCSIZEMAC_REG_TDCSIZE 0x52 via-velocity.h 　
11154
 MAC_REG_TDINDXMAC_REG_TDINDX 0x54 via-velocity.h 　
11155
 MAC_REG_TDIDX0MAC_REG_TDIDX0 0x54 via-velocity.h 　
11156
 MAC_REG_TDIDX1MAC_REG_TDIDX1 0x56 via-velocity.h 　
11157
 MAC_REG_TDIDX2MAC_REG_TDIDX2 0x58 via-velocity.h 　
11158
 MAC_REG_TDIDX3MAC_REG_TDIDX3 0x5A via-velocity.h 　
11159
 MAC_REG_PAUSE_TIMERMAC_REG_PAUSE_TIMER 0x5C via-velocity.h 　
11160
 MAC_REG_RBRDUMAC_REG_RBRDU 0x5E via-velocity.h 　
11161
 MAC_REG_FIFO_TEST0MAC_REG_FIFO_TEST0 0x60 via-velocity.h 　
11162
 MAC_REG_FIFO_TEST1MAC_REG_FIFO_TEST1 0x64 via-velocity.h 　
11163
 MAC_REG_CAMADDRMAC_REG_CAMADDR 0x68 via-velocity.h 　
11164
 MAC_REG_CAMCRMAC_REG_CAMCR 0x69 via-velocity.h 　
11165
 MAC_REG_GFTESTMAC_REG_GFTEST 0x6A via-velocity.h 　
11166
 MAC_REG_FTSTCMDMAC_REG_FTSTCMD 0x6B via-velocity.h 　
11167
 MAC_REG_MIICFGMAC_REG_MIICFG 0x6C via-velocity.h 　
11168
 MAC_REG_MIISRMAC_REG_MIISR 0x6D via-velocity.h 　
11169
 MAC_REG_PHYSR0MAC_REG_PHYSR0 0x6E via-velocity.h 　
11170
 MAC_REG_PHYSR1MAC_REG_PHYSR1 0x6F via-velocity.h 　
11171
 MAC_REG_MIICRMAC_REG_MIICR 0x70 via-velocity.h 　
11172
 MAC_REG_MIIADRMAC_REG_MIIADR 0x71 via-velocity.h 　
11173
 MAC_REG_MIIDATAMAC_REG_MIIDATA 0x72 via-velocity.h 　
11174
 MAC_REG_SOFT_TIMER0MAC_REG_SOFT_TIMER0 0x74 via-velocity.h 　
11175
 MAC_REG_SOFT_TIMER1MAC_REG_SOFT_TIMER1 0x76 via-velocity.h 　
11176
 MAC_REG_CFGAMAC_REG_CFGA 0x78 via-velocity.h 　
11177
 MAC_REG_CFGBMAC_REG_CFGB 0x79 via-velocity.h 　
11178
 MAC_REG_CFGCMAC_REG_CFGC 0x7A via-velocity.h 　
11179
 MAC_REG_CFGDMAC_REG_CFGD 0x7B via-velocity.h 　
11180
 MAC_REG_DCFG0MAC_REG_DCFG0 0x7C via-velocity.h 　
11181
 MAC_REG_DCFG1MAC_REG_DCFG1 0x7D via-velocity.h 　
11182
 MAC_REG_MCFG0MAC_REG_MCFG0 0x7E via-velocity.h 　
11183
 MAC_REG_MCFG1MAC_REG_MCFG1 0x7F via-velocity.h 　
11184
 MAC_REG_TBISTMAC_REG_TBIST 0x80 via-velocity.h 　
11185
 MAC_REG_RBISTMAC_REG_RBIST 0x81 via-velocity.h 　
11186
 MAC_REG_PMCCMAC_REG_PMCC 0x82 via-velocity.h 　
11187
 MAC_REG_STICKHWMAC_REG_STICKHW 0x83 via-velocity.h 　
11188
 MAC_REG_MIBCRMAC_REG_MIBCR 0x84 via-velocity.h 　
11189
 MAC_REG_EERSVMAC_REG_EERSV 0x85 via-velocity.h 　
11190
 MAC_REG_REVIDMAC_REG_REVID 0x86 via-velocity.h 　
11191
 MAC_REG_MIBREADMAC_REG_MIBREAD 0x88 via-velocity.h 　
11192
 MAC_REG_BPMAMAC_REG_BPMA 0x8C via-velocity.h 　
11193
 MAC_REG_EEWR_DATAMAC_REG_EEWR_DATA 0x8C via-velocity.h 　
11194
 MAC_REG_BPMD_WRMAC_REG_BPMD_WR 0x8F via-velocity.h 　
11195
 MAC_REG_BPCMDMAC_REG_BPCMD 0x90 via-velocity.h 　
11196
 MAC_REG_BPMD_RDMAC_REG_BPMD_RD 0x91 via-velocity.h 　
11197
 MAC_REG_EECHKSUMMAC_REG_EECHKSUM 0x92 via-velocity.h 　
11198
 MAC_REG_EECSRMAC_REG_EECSR 0x93 via-velocity.h 　
11199
 MAC_REG_EERD_DATAMAC_REG_EERD_DATA 0x94 via-velocity.h 　
11200
 MAC_REG_EADDRMAC_REG_EADDR 0x96 via-velocity.h 　
11201
 MAC_REG_EMBCMDMAC_REG_EMBCMD 0x97 via-velocity.h 　
11202
 MAC_REG_JMPSR0MAC_REG_JMPSR0 0x98 via-velocity.h 　
11203
 MAC_REG_JMPSR1MAC_REG_JMPSR1 0x99 via-velocity.h 　
11204
 MAC_REG_JMPSR2MAC_REG_JMPSR2 0x9A via-velocity.h 　
11205
 MAC_REG_JMPSR3MAC_REG_JMPSR3 0x9B via-velocity.h 　
11206
 MAC_REG_CHIPGSRMAC_REG_CHIPGSR 0x9C via-velocity.h 　
11207
 MAC_REG_TESTCFGMAC_REG_TESTCFG 0x9D via-velocity.h 　
11208
 MAC_REG_DEBUGMAC_REG_DEBUG 0x9E via-velocity.h 　
11209
 MAC_REG_CHIPGCRMAC_REG_CHIPGCR 0x9F via-velocity.h 　
11210
 MAC_REG_WOLCR0_SETMAC_REG_WOLCR0_SET 0xA0 via-velocity.h 　
11211
 MAC_REG_WOLCR1_SETMAC_REG_WOLCR1_SET 0xA1 via-velocity.h 　
11212
 MAC_REG_PWCFG_SETMAC_REG_PWCFG_SET 0xA2 via-velocity.h 　
11213
 MAC_REG_WOLCFG_SETMAC_REG_WOLCFG_SET 0xA3 via-velocity.h 　
11214
 MAC_REG_WOLCR0_CLRMAC_REG_WOLCR0_CLR 0xA4 via-velocity.h 　
11215
 MAC_REG_WOLCR1_CLRMAC_REG_WOLCR1_CLR 0xA5 via-velocity.h 　
11216
 MAC_REG_PWCFG_CLRMAC_REG_PWCFG_CLR 0xA6 via-velocity.h 　
11217
 MAC_REG_WOLCFG_CLRMAC_REG_WOLCFG_CLR 0xA7 via-velocity.h 　
11218
 MAC_REG_WOLSR0_SETMAC_REG_WOLSR0_SET 0xA8 via-velocity.h 　
11219
 MAC_REG_WOLSR1_SETMAC_REG_WOLSR1_SET 0xA9 via-velocity.h 　
11220
 MAC_REG_WOLSR0_CLRMAC_REG_WOLSR0_CLR 0xAC via-velocity.h 　
11221
 MAC_REG_WOLSR1_CLRMAC_REG_WOLSR1_CLR 0xAD via-velocity.h 　
11222
 MAC_REG_PATRN_CRC0MAC_REG_PATRN_CRC0 0xB0 via-velocity.h 　
11223
 MAC_REG_PATRN_CRC1MAC_REG_PATRN_CRC1 0xB2 via-velocity.h 　
11224
 MAC_REG_PATRN_CRC2MAC_REG_PATRN_CRC2 0xB4 via-velocity.h 　
11225
 MAC_REG_PATRN_CRC3MAC_REG_PATRN_CRC3 0xB6 via-velocity.h 　
11226
 MAC_REG_PATRN_CRC4MAC_REG_PATRN_CRC4 0xB8 via-velocity.h 　
11227
 MAC_REG_PATRN_CRC5MAC_REG_PATRN_CRC5 0xBA via-velocity.h 　
11228
 MAC_REG_PATRN_CRC6MAC_REG_PATRN_CRC6 0xBC via-velocity.h 　
11229
 MAC_REG_PATRN_CRC7MAC_REG_PATRN_CRC7 0xBE via-velocity.h 　
11230
 MAC_REG_BYTEMSK0_0MAC_REG_BYTEMSK0_0 0xC0 via-velocity.h 　
11231
 MAC_REG_BYTEMSK0_1MAC_REG_BYTEMSK0_1 0xC4 via-velocity.h 　
11232
 MAC_REG_BYTEMSK0_2MAC_REG_BYTEMSK0_2 0xC8 via-velocity.h 　
11233
 MAC_REG_BYTEMSK0_3MAC_REG_BYTEMSK0_3 0xCC via-velocity.h 　
11234
 MAC_REG_BYTEMSK1_0MAC_REG_BYTEMSK1_0 0xD0 via-velocity.h 　
11235
 MAC_REG_BYTEMSK1_1MAC_REG_BYTEMSK1_1 0xD4 via-velocity.h 　
11236
 MAC_REG_BYTEMSK1_2MAC_REG_BYTEMSK1_2 0xD8 via-velocity.h 　
11237
 MAC_REG_BYTEMSK1_3MAC_REG_BYTEMSK1_3 0xDC via-velocity.h 　
11238
 MAC_REG_BYTEMSK2_0MAC_REG_BYTEMSK2_0 0xE0 via-velocity.h 　
11239
 MAC_REG_BYTEMSK2_1MAC_REG_BYTEMSK2_1 0xE4 via-velocity.h 　
11240
 MAC_REG_BYTEMSK2_2MAC_REG_BYTEMSK2_2 0xE8 via-velocity.h 　
11241
 MAC_REG_BYTEMSK2_3MAC_REG_BYTEMSK2_3 0xEC via-velocity.h 　
11242
 MAC_REG_BYTEMSK3_0MAC_REG_BYTEMSK3_0 0xF0 via-velocity.h 　
11243
 MAC_REG_BYTEMSK3_1MAC_REG_BYTEMSK3_1 0xF4 via-velocity.h 　
11244
 MAC_REG_BYTEMSK3_2MAC_REG_BYTEMSK3_2 0xF8 via-velocity.h 　
11245
 MAC_REG_BYTEMSK3_3MAC_REG_BYTEMSK3_3 0xFC via-velocity.h 　
11246
 RCR_ASRCR_AS 0x80 via-velocity.h 　
11247
 RCR_APRCR_AP 0x40 via-velocity.h 　
11248
 RCR_ALRCR_AL 0x20 via-velocity.h 　
11249
 RCR_PROMRCR_PROM 0x10 via-velocity.h 　
11250
 RCR_ABRCR_AB 0x08 via-velocity.h 　
11251
 RCR_AMRCR_AM 0x04 via-velocity.h 　
11252
 RCR_ARRCR_AR 0x02 via-velocity.h 　
11253
 RCR_SEPRCR_SEP 0x01 via-velocity.h 　
11254
 TCR_TB2BDISTCR_TB2BDIS 0x80 via-velocity.h 　
11255
 TCR_COLTMC1TCR_COLTMC1 0x08 via-velocity.h 　
11256
 TCR_COLTMC0TCR_COLTMC0 0x04 via-velocity.h 　
11257
 TCR_LB1TCR_LB1 0x02 via-velocity.h loopback[1]
11258
 TCR_LB0TCR_LB0 0x01 via-velocity.h loopback[0]
11259
 CR0_TXONCR0_TXON 0x00000008UL via-velocity.h 　
11260
 CR0_RXONCR0_RXON 0x00000004UL via-velocity.h 　
11261
 CR0_STOPCR0_STOP 0x00000002UL via-velocity.h stop MAC, default = 1
11262
 CR0_STRTCR0_STRT 0x00000001UL via-velocity.h start MAC
11263
 CR0_SFRSTCR0_SFRST 0x00008000UL via-velocity.h software reset
11264
 CR0_TM1ENCR0_TM1EN 0x00004000UL via-velocity.h 　
11265
 CR0_TM0ENCR0_TM0EN 0x00002000UL via-velocity.h 　
11266
 CR0_DPOLLCR0_DPOLL 0x00000800UL via-velocity.h disable rx/tx auto polling
11267
 CR0_DISAUCR0_DISAU 0x00000100UL via-velocity.h 　
11268
 CR0_XONENCR0_XONEN 0x00800000UL via-velocity.h 　
11269
 CR0_FDXTFCENCR0_FDXTFCEN 0x00400000UL via-velocity.h full-duplex TX flow control enable
11270
 CR0_FDXRFCENCR0_FDXRFCEN 0x00200000UL via-velocity.h full-duplex RX flow control enable
11271
 CR0_HDXFCENCR0_HDXFCEN 0x00100000UL via-velocity.h half-duplex flow control enable
11272
 CR0_XHITH1CR0_XHITH1 0x00080000UL via-velocity.h TX XON high threshold 1
11273
 CR0_XHITH0CR0_XHITH0 0x00040000UL via-velocity.h TX XON high threshold 0
11274
 CR0_XLTH1CR0_XLTH1 0x00020000UL via-velocity.h TX pause frame low threshold 1
11275
 CR0_XLTH0CR0_XLTH0 0x00010000UL via-velocity.h TX pause frame low threshold 0
11276
 CR0_GSPRSTCR0_GSPRST 0x80000000UL via-velocity.h 　
11277
 CR0_FORSRSTCR0_FORSRST 0x40000000UL via-velocity.h 　
11278
 CR0_FPHYRSTCR0_FPHYRST 0x20000000UL via-velocity.h 　
11279
 CR0_DIAGCR0_DIAG 0x10000000UL via-velocity.h 　
11280
 CR0_INTPCTLCR0_INTPCTL 0x04000000UL via-velocity.h 　
11281
 CR0_GINTMSK1CR0_GINTMSK1 0x02000000UL via-velocity.h 　
11282
 CR0_GINTMSK0CR0_GINTMSK0 0x01000000UL via-velocity.h 　
11283
 CR1_SFRSTCR1_SFRST 0x80 via-velocity.h software reset
11284
 CR1_TM1ENCR1_TM1EN 0x40 via-velocity.h 　
11285
 CR1_TM0ENCR1_TM0EN 0x20 via-velocity.h 　
11286
 CR1_DPOLLCR1_DPOLL 0x08 via-velocity.h disable rx/tx auto polling
11287
 CR1_DISAUCR1_DISAU 0x01 via-velocity.h 　
11288
 CR2_XONENCR2_XONEN 0x80 via-velocity.h 　
11289
 CR2_FDXTFCENCR2_FDXTFCEN 0x40 via-velocity.h full-duplex TX flow control enable
11290
 CR2_FDXRFCENCR2_FDXRFCEN 0x20 via-velocity.h full-duplex RX flow control enable
11291
 CR2_HDXFCENCR2_HDXFCEN 0x10 via-velocity.h half-duplex flow control enable
11292
 CR2_XHITH1CR2_XHITH1 0x08 via-velocity.h TX XON high threshold 1
11293
 CR2_XHITH0CR2_XHITH0 0x04 via-velocity.h TX XON high threshold 0
11294
 CR2_XLTH1CR2_XLTH1 0x02 via-velocity.h TX pause frame low threshold 1
11295
 CR2_XLTH0CR2_XLTH0 0x01 via-velocity.h TX pause frame low threshold 0
11296
 CR3_GSPRSTCR3_GSPRST 0x80 via-velocity.h 　
11297
 CR3_FORSRSTCR3_FORSRST 0x40 via-velocity.h 　
11298
 CR3_FPHYRSTCR3_FPHYRST 0x20 via-velocity.h 　
11299
 CR3_DIAGCR3_DIAG 0x10 via-velocity.h 　
11300
 CR3_INTPCTLCR3_INTPCTL 0x04 via-velocity.h 　
11301
 CR3_GINTMSK1CR3_GINTMSK1 0x02 via-velocity.h 　
11302
 CR3_GINTMSK0CR3_GINTMSK0 0x01 via-velocity.h 　
11303
 ISRCTL_UDPINTISRCTL_UDPINT 0x8000 via-velocity.h 　
11304
 ISRCTL_TSUPDISISRCTL_TSUPDIS 0x4000 via-velocity.h 　
11305
 ISRCTL_RSUPDISISRCTL_RSUPDIS 0x2000 via-velocity.h 　
11306
 ISRCTL_PMSK1ISRCTL_PMSK1 0x1000 via-velocity.h 　
11307
 ISRCTL_PMSK0ISRCTL_PMSK0 0x0800 via-velocity.h 　
11308
 ISRCTL_INTPDISRCTL_INTPD 0x0400 via-velocity.h 　
11309
 ISRCTL_HCRLDISRCTL_HCRLD 0x0200 via-velocity.h 　
11310
 ISRCTL_SCRLDISRCTL_SCRLD 0x0100 via-velocity.h 　
11311
 ISRCTL1_UDPINTISRCTL1_UDPINT 0x80 via-velocity.h 　
11312
 ISRCTL1_TSUPDISISRCTL1_TSUPDIS 0x40 via-velocity.h 　
11313
 ISRCTL1_RSUPDISISRCTL1_RSUPDIS 0x20 via-velocity.h 　
11314
 ISRCTL1_PMSK1ISRCTL1_PMSK1 0x10 via-velocity.h 　
11315
 ISRCTL1_PMSK0ISRCTL1_PMSK0 0x08 via-velocity.h 　
11316
 ISRCTL1_INTPDISRCTL1_INTPD 0x04 via-velocity.h 　
11317
 ISRCTL1_HCRLDISRCTL1_HCRLD 0x02 via-velocity.h 　
11318
 ISRCTL1_SCRLDISRCTL1_SCRLD 0x01 via-velocity.h 　
11319
 TXESR_TFDBSTXESR_TFDBS 0x08 via-velocity.h 　
11320
 TXESR_TDWBSTXESR_TDWBS 0x04 via-velocity.h 　
11321
 TXESR_TDRBSTXESR_TDRBS 0x02 via-velocity.h 　
11322
 TXESR_TDSTRTXESR_TDSTR 0x01 via-velocity.h 　
11323
 RXESR_RFDBSRXESR_RFDBS 0x08 via-velocity.h 　
11324
 RXESR_RDWBSRXESR_RDWBS 0x04 via-velocity.h 　
11325
 RXESR_RDRBSRXESR_RDRBS 0x02 via-velocity.h 　
11326
 RXESR_RDSTRRXESR_RDSTR 0x01 via-velocity.h 　
11327
 ISR_ISR3ISR_ISR3 0x80000000UL via-velocity.h 　
11328
 ISR_ISR2ISR_ISR2 0x40000000UL via-velocity.h 　
11329
 ISR_ISR1ISR_ISR1 0x20000000UL via-velocity.h 　
11330
 ISR_ISR0ISR_ISR0 0x10000000UL via-velocity.h 　
11331
 ISR_TXSTLIISR_TXSTLI 0x02000000UL via-velocity.h 　
11332
 ISR_RXSTLIISR_RXSTLI 0x01000000UL via-velocity.h 　
11333
 ISR_HFLDISR_HFLD 0x00800000UL via-velocity.h 　
11334
 ISR_UDPIISR_UDPI 0x00400000UL via-velocity.h 　
11335
 ISR_MIBFIISR_MIBFI 0x00200000UL via-velocity.h 　
11336
 ISR_SHDNIISR_SHDNI 0x00100000UL via-velocity.h 　
11337
 ISR_PHYIISR_PHYI 0x00080000UL via-velocity.h 　
11338
 ISR_PWEIISR_PWEI 0x00040000UL via-velocity.h 　
11339
 ISR_TMR1IISR_TMR1I 0x00020000UL via-velocity.h 　
11340
 ISR_TMR0IISR_TMR0I 0x00010000UL via-velocity.h 　
11341
 ISR_SRCIISR_SRCI 0x00008000UL via-velocity.h 　
11342
 ISR_LSTPEIISR_LSTPEI 0x00004000UL via-velocity.h 　
11343
 ISR_LSTEIISR_LSTEI 0x00002000UL via-velocity.h 　
11344
 ISR_OVFIISR_OVFI 0x00001000UL via-velocity.h 　
11345
 ISR_FLONIISR_FLONI 0x00000800UL via-velocity.h 　
11346
 ISR_RACEIISR_RACEI 0x00000400UL via-velocity.h 　
11347
 ISR_TXWB1IISR_TXWB1I 0x00000200UL via-velocity.h 　
11348
 ISR_TXWB0IISR_TXWB0I 0x00000100UL via-velocity.h 　
11349
 ISR_PTX3IISR_PTX3I 0x00000080UL via-velocity.h 　
11350
 ISR_PTX2IISR_PTX2I 0x00000040UL via-velocity.h 　
11351
 ISR_PTX1IISR_PTX1I 0x00000020UL via-velocity.h 　
11352
 ISR_PTX0IISR_PTX0I 0x00000010UL via-velocity.h 　
11353
 ISR_PTXIISR_PTXI 0x00000008UL via-velocity.h 　
11354
 ISR_PRXIISR_PRXI 0x00000004UL via-velocity.h 　
11355
 ISR_PPTXIISR_PPTXI 0x00000002UL via-velocity.h 　
11356
 ISR_PPRXIISR_PPRXI 0x00000001UL via-velocity.h 　
11357
 IMR_TXSTLMIMR_TXSTLM 0x02000000UL via-velocity.h 　
11358
 IMR_UDPIMIMR_UDPIM 0x00400000UL via-velocity.h 　
11359
 IMR_MIBFIMIMR_MIBFIM 0x00200000UL via-velocity.h 　
11360
 IMR_SHDNIMIMR_SHDNIM 0x00100000UL via-velocity.h 　
11361
 IMR_PHYIMIMR_PHYIM 0x00080000UL via-velocity.h 　
11362
 IMR_PWEIMIMR_PWEIM 0x00040000UL via-velocity.h 　
11363
 IMR_TMR1IMIMR_TMR1IM 0x00020000UL via-velocity.h 　
11364
 IMR_TMR0IMIMR_TMR0IM 0x00010000UL via-velocity.h 　
11365
 IMR_SRCIMIMR_SRCIM 0x00008000UL via-velocity.h 　
11366
 IMR_LSTPEIMIMR_LSTPEIM 0x00004000UL via-velocity.h 　
11367
 IMR_LSTEIMIMR_LSTEIM 0x00002000UL via-velocity.h 　
11368
 IMR_OVFIMIMR_OVFIM 0x00001000UL via-velocity.h 　
11369
 IMR_FLONIMIMR_FLONIM 0x00000800UL via-velocity.h 　
11370
 IMR_RACEIMIMR_RACEIM 0x00000400UL via-velocity.h 　
11371
 IMR_TXWB1IMIMR_TXWB1IM 0x00000200UL via-velocity.h 　
11372
 IMR_TXWB0IMIMR_TXWB0IM 0x00000100UL via-velocity.h 　
11373
 IMR_PTX3IMIMR_PTX3IM 0x00000080UL via-velocity.h 　
11374
 IMR_PTX2IMIMR_PTX2IM 0x00000040UL via-velocity.h 　
11375
 IMR_PTX1IMIMR_PTX1IM 0x00000020UL via-velocity.h 　
11376
 IMR_PTX0IMIMR_PTX0IM 0x00000010UL via-velocity.h 　
11377
 IMR_PTXIMIMR_PTXIM 0x00000008UL via-velocity.h 　
11378
 IMR_PRXIMIMR_PRXIM 0x00000004UL via-velocity.h 　
11379
 IMR_PPTXIMIMR_PPTXIM 0x00000002UL via-velocity.h 　
11380
 IMR_PPRXIMIMR_PPRXIM 0x00000001UL via-velocity.h 　
11381
 INT_MASK_DEFINT_MASK_DEF ( IMR_PPTXIM|IMR_PPRXIM| IMR_PTXIM|IMR_PRXIM | \ IMR_PWEIM|IMR_TXWB0IM|IMR_TXWB1IM|IMR_FLONIM| \ IMR_OVFIM|IMR_LSTEIM|IMR_LSTP via-velocity.h 　
11382
 TRDCSR_DEADTRDCSR_DEAD 0x0008 via-velocity.h 　
11383
 TRDCSR_WAKTRDCSR_WAK 0x0004 via-velocity.h 　
11384
 TRDCSR_ACTTRDCSR_ACT 0x0002 via-velocity.h 　
11385
 TRDCSR_RUNTRDCSR_RUN 0x0001 via-velocity.h 　
11386
 CAMADDR_CAMENCAMADDR_CAMEN 0x80 via-velocity.h 　
11387
 CAMADDR_VCAMSLCAMADDR_VCAMSL 0x40 via-velocity.h 　
11388
 CAMCR_PS1CAMCR_PS1 0x80 via-velocity.h 　
11389
 CAMCR_PS0CAMCR_PS0 0x40 via-velocity.h 　
11390
 CAMCR_AITRPKTCAMCR_AITRPKT 0x20 via-velocity.h 　
11391
 CAMCR_AITR16CAMCR_AITR16 0x10 via-velocity.h 　
11392
 CAMCR_CAMRDCAMCR_CAMRD 0x08 via-velocity.h 　
11393
 CAMCR_CAMWRCAMCR_CAMWR 0x04 via-velocity.h 　
11394
 CAMCR_PS_CAM_MASKCAMCR_PS_CAM_MASK 0x40 via-velocity.h 　
11395
 CAMCR_PS_CAM_DATACAMCR_PS_CAM_DATA 0x80 via-velocity.h 　
11396
 CAMCR_PS_MARCAMCR_PS_MAR 0x00 via-velocity.h 　
11397
 MIICFG_MPO1MIICFG_MPO1 0x80 via-velocity.h 　
11398
 MIICFG_MPO0MIICFG_MPO0 0x40 via-velocity.h 　
11399
 MIICFG_MFDCMIICFG_MFDC 0x20 via-velocity.h 　
11400
 MIISR_MIDLEMIISR_MIDLE 0x80 via-velocity.h 　
11401
 PHYSR0_PHYRSTPHYSR0_PHYRST 0x80 via-velocity.h 　
11402
 PHYSR0_LINKGDPHYSR0_LINKGD 0x40 via-velocity.h 　
11403
 PHYSR0_FDPXPHYSR0_FDPX 0x10 via-velocity.h 　
11404
 PHYSR0_SPDGPHYSR0_SPDG 0x08 via-velocity.h 　
11405
 PHYSR0_SPD10PHYSR0_SPD10 0x04 via-velocity.h 　
11406
 PHYSR0_RXFLCPHYSR0_RXFLC 0x02 via-velocity.h 　
11407
 PHYSR0_TXFLCPHYSR0_TXFLC 0x01 via-velocity.h 　
11408
 PHYSR1_PHYTBIPHYSR1_PHYTBI 0x01 via-velocity.h 　
11409
 MIICR_MAUTOMIICR_MAUTO 0x80 via-velocity.h 　
11410
 MIICR_RCMDMIICR_RCMD 0x40 via-velocity.h 　
11411
 MIICR_WCMDMIICR_WCMD 0x20 via-velocity.h 　
11412
 MIICR_MDPMMIICR_MDPM 0x10 via-velocity.h 　
11413
 MIICR_MOUTMIICR_MOUT 0x08 via-velocity.h 　
11414
 MIICR_MDOMIICR_MDO 0x04 via-velocity.h 　
11415
 MIICR_MDIMIICR_MDI 0x02 via-velocity.h 　
11416
 MIICR_MDCMIICR_MDC 0x01 via-velocity.h 　
11417
 MIIADR_SWMPLMIIADR_SWMPL 0x80 via-velocity.h 　
11418
 CFGA_PMHCTGCFGA_PMHCTG 0x08 via-velocity.h 　
11419
 CFGA_GPIO1PDCFGA_GPIO1PD 0x04 via-velocity.h 　
11420
 CFGA_ABSHDNCFGA_ABSHDN 0x02 via-velocity.h 　
11421
 CFGA_PACPICFGA_PACPI 0x01 via-velocity.h 　
11422
 CFGB_GTCKOPTCFGB_GTCKOPT 0x80 via-velocity.h 　
11423
 CFGB_MIIOPTCFGB_MIIOPT 0x40 via-velocity.h 　
11424
 CFGB_CRSEOPTCFGB_CRSEOPT 0x20 via-velocity.h 　
11425
 CFGB_OFSETCFGB_OFSET 0x10 via-velocity.h 　
11426
 CFGB_CRANDOMCFGB_CRANDOM 0x08 via-velocity.h 　
11427
 CFGB_CAPCFGB_CAP 0x04 via-velocity.h 　
11428
 CFGB_MBACFGB_MBA 0x02 via-velocity.h 　
11429
 CFGB_BAKOPTCFGB_BAKOPT 0x01 via-velocity.h 　
11430
 CFGC_EELOADCFGC_EELOAD 0x80 via-velocity.h 　
11431
 CFGC_BROPTCFGC_BROPT 0x40 via-velocity.h 　
11432
 CFGC_DLYENCFGC_DLYEN 0x20 via-velocity.h 　
11433
 CFGC_DTSELCFGC_DTSEL 0x10 via-velocity.h 　
11434
 CFGC_BTSELCFGC_BTSEL 0x08 via-velocity.h 　
11435
 CFGC_BPS2CFGC_BPS2 0x04 via-velocity.h bootrom select[2]
11436
 CFGC_BPS1CFGC_BPS1 0x02 via-velocity.h bootrom select[1]
11437
 CFGC_BPS0CFGC_BPS0 0x01 via-velocity.h bootrom select[0]
11438
 CFGD_IODISCFGD_IODIS 0x80 via-velocity.h 　
11439
 CFGD_MSLVDACENCFGD_MSLVDACEN 0x40 via-velocity.h 　
11440
 CFGD_CFGDACENCFGD_CFGDACEN 0x20 via-velocity.h 　
11441
 CFGD_PCI64ENCFGD_PCI64EN 0x10 via-velocity.h 　
11442
 CFGD_HTMRL4CFGD_HTMRL4 0x08 via-velocity.h 　
11443
 DCFG_XMWIDCFG_XMWI 0x8000 via-velocity.h 　
11444
 DCFG_XMRMDCFG_XMRM 0x4000 via-velocity.h 　
11445
 DCFG_XMRLDCFG_XMRL 0x2000 via-velocity.h 　
11446
 DCFG_PERDISDCFG_PERDIS 0x1000 via-velocity.h 　
11447
 DCFG_MRWAITDCFG_MRWAIT 0x0400 via-velocity.h 　
11448
 DCFG_MWWAITDCFG_MWWAIT 0x0200 via-velocity.h 　
11449
 DCFG_LATMENDCFG_LATMEN 0x0100 via-velocity.h 　
11450
 MCFG_RXARBMCFG_RXARB 0x0080 via-velocity.h 　
11451
 MCFG_RFT1MCFG_RFT1 0x0020 via-velocity.h 　
11452
 MCFG_RFT0MCFG_RFT0 0x0010 via-velocity.h 　
11453
 MCFG_LOWTHOPTMCFG_LOWTHOPT 0x0008 via-velocity.h 　
11454
 MCFG_PQENMCFG_PQEN 0x0004 via-velocity.h 　
11455
 MCFG_RTGOPTMCFG_RTGOPT 0x0002 via-velocity.h 　
11456
 MCFG_VIDFRMCFG_VIDFR 0x0001 via-velocity.h 　
11457
 MCFG_TXARBMCFG_TXARB 0x8000 via-velocity.h 　
11458
 MCFG_TXQBK1MCFG_TXQBK1 0x0800 via-velocity.h 　
11459
 MCFG_TXQBK0MCFG_TXQBK0 0x0400 via-velocity.h 　
11460
 MCFG_TXQNOBKMCFG_TXQNOBK 0x0200 via-velocity.h 　
11461
 MCFG_SNAPOPTMCFG_SNAPOPT 0x0100 via-velocity.h 　
11462
 PMCC_DSIPMCC_DSI 0x80 via-velocity.h 　
11463
 PMCC_D2_DISPMCC_D2_DIS 0x40 via-velocity.h 　
11464
 PMCC_D1_DISPMCC_D1_DIS 0x20 via-velocity.h 　
11465
 PMCC_D3C_ENPMCC_D3C_EN 0x10 via-velocity.h 　
11466
 PMCC_D3H_ENPMCC_D3H_EN 0x08 via-velocity.h 　
11467
 PMCC_D2_ENPMCC_D2_EN 0x04 via-velocity.h 　
11468
 PMCC_D1_ENPMCC_D1_EN 0x02 via-velocity.h 　
11469
 PMCC_D0_ENPMCC_D0_EN 0x01 via-velocity.h 　
11470
 STICKHW_SWPTAGSTICKHW_SWPTAG 0x10 via-velocity.h 　
11471
 STICKHW_WOLSRSTICKHW_WOLSR 0x08 via-velocity.h 　
11472
 STICKHW_WOLENSTICKHW_WOLEN 0x04 via-velocity.h 　
11473
 STICKHW_DS1STICKHW_DS1 0x02 via-velocity.h R/W by software/cfg cycle
11474
 STICKHW_DS0STICKHW_DS0 0x01 via-velocity.h suspend well DS write port
11475
 MIBCR_MIBISTOKMIBCR_MIBISTOK 0x80 via-velocity.h 　
11476
 MIBCR_MIBISTGOMIBCR_MIBISTGO 0x40 via-velocity.h 　
11477
 MIBCR_MIBINCMIBCR_MIBINC 0x20 via-velocity.h 　
11478
 MIBCR_MIBHIMIBCR_MIBHI 0x10 via-velocity.h 　
11479
 MIBCR_MIBFRZMIBCR_MIBFRZ 0x08 via-velocity.h 　
11480
 MIBCR_MIBFLSHMIBCR_MIBFLSH 0x04 via-velocity.h 　
11481
 MIBCR_MPTRINIMIBCR_MPTRINI 0x02 via-velocity.h 　
11482
 MIBCR_MIBCLRMIBCR_MIBCLR 0x01 via-velocity.h 　
11483
 EERSV_BOOT_RPLEERSV_BOOT_RPL ((u8) 0x01) via-velocity.h Boot method selection for VT6110
11484
 EERSV_BOOT_MASKEERSV_BOOT_MASK ((u8) 0x06) via-velocity.h 　
11485
 EERSV_BOOT_INT19EERSV_BOOT_INT19 ((u8) 0x00) via-velocity.h 　
11486
 EERSV_BOOT_INT18EERSV_BOOT_INT18 ((u8) 0x02) via-velocity.h 　
11487
 EERSV_BOOT_LOCALEERSV_BOOT_LOCAL ((u8) 0x04) via-velocity.h 　
11488
 EERSV_BOOT_BEVEERSV_BOOT_BEV ((u8) 0x06) via-velocity.h 　
11489
 BPCMD_BPDNEBPCMD_BPDNE 0x80 via-velocity.h 　
11490
 BPCMD_EBPWRBPCMD_EBPWR 0x02 via-velocity.h 　
11491
 BPCMD_EBPRDBPCMD_EBPRD 0x01 via-velocity.h 　
11492
 EECSR_EMBPEECSR_EMBP 0x40 via-velocity.h eeprom embeded programming
11493
 EECSR_RELOADEECSR_RELOAD 0x20 via-velocity.h eeprom content reload
11494
 EECSR_DPMEECSR_DPM 0x10 via-velocity.h eeprom direct programming
11495
 EECSR_ECSEECSR_ECS 0x08 via-velocity.h eeprom CS pin
11496
 EECSR_ECKEECSR_ECK 0x04 via-velocity.h eeprom CK pin
11497
 EECSR_EDIEECSR_EDI 0x02 via-velocity.h eeprom DI pin
11498
 EECSR_EDOEECSR_EDO 0x01 via-velocity.h eeprom DO pin
11499
 EMBCMD_EDONEEMBCMD_EDONE 0x80 via-velocity.h 　
11500
 EMBCMD_EWDISEMBCMD_EWDIS 0x08 via-velocity.h 　
11501
 EMBCMD_EWENEMBCMD_EWEN 0x04 via-velocity.h 　
11502
 EMBCMD_EWREMBCMD_EWR 0x02 via-velocity.h 　
11503
 EMBCMD_ERDEMBCMD_ERD 0x01 via-velocity.h 　
11504
 TESTCFG_HBDISTESTCFG_HBDIS 0x80 via-velocity.h 　
11505
 CHIPGCR_FCGMIICHIPGCR_FCGMII 0x80 via-velocity.h 　
11506
 CHIPGCR_FCFDXCHIPGCR_FCFDX 0x40 via-velocity.h 　
11507
 CHIPGCR_FCRESVCHIPGCR_FCRESV 0x20 via-velocity.h 　
11508
 CHIPGCR_FCMODECHIPGCR_FCMODE 0x10 via-velocity.h 　
11509
 CHIPGCR_LPSOPTCHIPGCR_LPSOPT 0x08 via-velocity.h 　
11510
 CHIPGCR_TM1USCHIPGCR_TM1US 0x04 via-velocity.h 　
11511
 CHIPGCR_TM0USCHIPGCR_TM0US 0x02 via-velocity.h 　
11512
 CHIPGCR_PHYINTENCHIPGCR_PHYINTEN 0x01 via-velocity.h 　
11513
 WOLCR_MSWOLEN7WOLCR_MSWOLEN7 0x0080 via-velocity.h enable pattern match filtering
11514
 WOLCR_MSWOLEN6WOLCR_MSWOLEN6 0x0040 via-velocity.h 　
11515
 WOLCR_MSWOLEN5WOLCR_MSWOLEN5 0x0020 via-velocity.h 　
11516
 WOLCR_MSWOLEN4WOLCR_MSWOLEN4 0x0010 via-velocity.h 　
11517
 WOLCR_MSWOLEN3WOLCR_MSWOLEN3 0x0008 via-velocity.h 　
11518
 WOLCR_MSWOLEN2WOLCR_MSWOLEN2 0x0004 via-velocity.h 　
11519
 WOLCR_MSWOLEN1WOLCR_MSWOLEN1 0x0002 via-velocity.h 　
11520
 WOLCR_MSWOLEN0WOLCR_MSWOLEN0 0x0001 via-velocity.h 　
11521
 WOLCR_ARP_ENWOLCR_ARP_EN 0x0001 via-velocity.h 　
11522
 WOLCR_LINKOFF_ENWOLCR_LINKOFF_EN 0x0800 via-velocity.h link off detected enable
11523
 WOLCR_LINKON_ENWOLCR_LINKON_EN 0x0400 via-velocity.h link on detected enable
11524
 WOLCR_MAGIC_ENWOLCR_MAGIC_EN 0x0200 via-velocity.h magic packet filter enable
11525
 WOLCR_UNICAST_ENWOLCR_UNICAST_EN 0x0100 via-velocity.h unicast filter enable
11526
 PWCFG_PHYPWOPTPWCFG_PHYPWOPT 0x80 via-velocity.h internal MII I/F timing
11527
 PWCFG_PCISTICKPWCFG_PCISTICK 0x40 via-velocity.h PCI sticky R/W enable
11528
 PWCFG_WOLTYPEPWCFG_WOLTYPE 0x20 via-velocity.h pulse(1) or button (0)
11529
 PWCFG_LEGCY_WOLPWCFG_LEGCY_WOL 0x10 via-velocity.h 　
11530
 PWCFG_PMCSR_PME_SRPWCFG_PMCSR_PME_SR 0x08 via-velocity.h 　
11531
 PWCFG_PMCSR_PME_ENPWCFG_PMCSR_PME_EN 0x04 via-velocity.h control by PCISTICK
11532
 PWCFG_LEGACY_WOLSRPWCFG_LEGACY_WOLSR 0x02 via-velocity.h Legacy WOL_SR shadow
11533
 PWCFG_LEGACY_WOLENPWCFG_LEGACY_WOLEN 0x01 via-velocity.h Legacy WOL_EN shadow
11534
 WOLCFG_PMEOVRWOLCFG_PMEOVR 0x80 via-velocity.h for legacy use, force PMEEN always
11535
 WOLCFG_SAMWOLCFG_SAM 0x20 via-velocity.h accept multicast case reset, default=0
11536
 WOLCFG_SABWOLCFG_SAB 0x10 via-velocity.h accept broadcast case reset, default=0
11537
 WOLCFG_SMIIACCWOLCFG_SMIIACC 0x08 via-velocity.h ??
11538
 WOLCFG_SGENWHWOLCFG_SGENWH 0x02 via-velocity.h 　
11539
 WOLCFG_PHYINTENWOLCFG_PHYINTEN 0x01 via-velocity.h 0:PHYINT trigger enable, 1:use internal MII
11540
 WOLSR_LINKOFF_INTWOLSR_LINKOFF_INT 0x0800 via-velocity.h 　
11541
 WOLSR_LINKON_INTWOLSR_LINKON_INT 0x0400 via-velocity.h 　
11542
 WOLSR_MAGIC_INTWOLSR_MAGIC_INT 0x0200 via-velocity.h 　
11543
 WOLSR_UNICAST_INTWOLSR_UNICAST_INT 0x0100 via-velocity.h 　
11544
 PKT_TYPE_NONEPKT_TYPE_NONE 0x0000 via-velocity.h Turn off receiver
11545
 PKT_TYPE_DIRECTEDPKT_TYPE_DIRECTED 0x0001 via-velocity.h obselete, directed address is always accepted
11546
 PKT_TYPE_MULTICASTPKT_TYPE_MULTICAST 0x0002 via-velocity.h 　
11547
 PKT_TYPE_ALL_MULTICASTPKT_TYPE_ALL_MULTICAST 0x0004 via-velocity.h 　
11548
 PKT_TYPE_BROADCASTPKT_TYPE_BROADCAST 0x0008 via-velocity.h 　
11549
 PKT_TYPE_PROMISCUOUSPKT_TYPE_PROMISCUOUS 0x0020 via-velocity.h 　
11550
 PKT_TYPE_LONGPKT_TYPE_LONG 0x2000 via-velocity.h NOTE.... the definition of LONG is >2048 bytes in our chip
11551
 PKT_TYPE_RUNTPKT_TYPE_RUNT 0x4000 via-velocity.h 　
11552
 PKT_TYPE_ERRORPKT_TYPE_ERROR 0x8000 via-velocity.h Accept error packets, e.g. CRC error
11553
 MAC_LB_NONEMAC_LB_NONE 0x00 via-velocity.h 　
11554
 MAC_LB_INTERNALMAC_LB_INTERNAL 0x01 via-velocity.h 　
11555
 MAC_LB_EXTERNALMAC_LB_EXTERNAL 0x02 via-velocity.h 　
11556
 IMR_MASK_VALUEIMR_MASK_VALUE 0x0033FF0FUL via-velocity.h initial value of IMR
11557
 IMR_MASK_VALUEIMR_MASK_VALUE 0x0013FB0FUL via-velocity.h initial value of IMR
11558
 REV_ID_VT3119_A0REV_ID_VT3119_A0 0x00 via-velocity.h 　
11559
 REV_ID_VT3119_A1REV_ID_VT3119_A1 0x01 via-velocity.h 　
11560
 REV_ID_VT3216_A0REV_ID_VT3216_A0 0x10 via-velocity.h 　
11561
 W_MAX_TIMEOUTW_MAX_TIMEOUT 0x0FFFU via-velocity.h 　
11562
 MII_REG_BMCRMII_REG_BMCR 0x00 via-velocity.h physical address
11563
 MII_REG_BMSRMII_REG_BMSR 0x01 via-velocity.h 　
11564
 MII_REG_PHYID1MII_REG_PHYID1 0x02 via-velocity.h OUI
11565
 MII_REG_PHYID2MII_REG_PHYID2 0x03 via-velocity.h OUI + Module ID + REV ID
11566
 MII_REG_ANARMII_REG_ANAR 0x04 via-velocity.h 　
11567
 MII_REG_ANLPARMII_REG_ANLPAR 0x05 via-velocity.h 　
11568
 MII_REG_G1000CRMII_REG_G1000CR 0x09 via-velocity.h 　
11569
 MII_REG_G1000SRMII_REG_G1000SR 0x0A via-velocity.h 　
11570
 MII_REG_MODCFGMII_REG_MODCFG 0x10 via-velocity.h 　
11571
 MII_REG_TCSRMII_REG_TCSR 0x16 via-velocity.h 　
11572
 MII_REG_PLEDMII_REG_PLED 0x1B via-velocity.h 　
11573
 MII_REG_PCRMII_REG_PCR 0x17 via-velocity.h 　
11574
 MII_REG_PCSRMII_REG_PCSR 0x17 via-velocity.h 　
11575
 MII_REG_AUXCRMII_REG_AUXCR 0x1C via-velocity.h 　
11576
 MII_REG_PSCRMII_REG_PSCR 0x10 via-velocity.h PHY specific control register
11577
 BMCR_RESETBMCR_RESET 0x8000 via-velocity.h 　
11578
 BMCR_LBKBMCR_LBK 0x4000 via-velocity.h 　
11579
 BMCR_SPEED100BMCR_SPEED100 0x2000 via-velocity.h 　
11580
 BMCR_AUTOBMCR_AUTO 0x1000 via-velocity.h 　
11581
 BMCR_PDBMCR_PD 0x0800 via-velocity.h 　
11582
 BMCR_ISOBMCR_ISO 0x0400 via-velocity.h 　
11583
 BMCR_REAUTOBMCR_REAUTO 0x0200 via-velocity.h 　
11584
 BMCR_FDXBMCR_FDX 0x0100 via-velocity.h 　
11585
 BMCR_SPEED1GBMCR_SPEED1G 0x0040 via-velocity.h 　
11586
 BMSR_AUTOCMBMSR_AUTOCM 0x0020 via-velocity.h 　
11587
 BMSR_LNKBMSR_LNK 0x0004 via-velocity.h 　
11588
 ANAR_ASMDIRANAR_ASMDIR 0x0800 via-velocity.h Asymmetric PAUSE support
11589
 ANAR_PAUSEANAR_PAUSE 0x0400 via-velocity.h Symmetric PAUSE Support
11590
 ANAR_T4ANAR_T4 0x0200 via-velocity.h 　
11591
 ANAR_TXFDANAR_TXFD 0x0100 via-velocity.h 　
11592
 ANAR_TXANAR_TX 0x0080 via-velocity.h 　
11593
 ANAR_10FDANAR_10FD 0x0040 via-velocity.h 　
11594
 ANAR_10ANAR_10 0x0020 via-velocity.h 　
11595
 ANLPAR_ASMDIRANLPAR_ASMDIR 0x0800 via-velocity.h Asymmetric PAUSE support
11596
 ANLPAR_PAUSEANLPAR_PAUSE 0x0400 via-velocity.h Symmetric PAUSE Support
11597
 ANLPAR_T4ANLPAR_T4 0x0200 via-velocity.h 　
11598
 ANLPAR_TXFDANLPAR_TXFD 0x0100 via-velocity.h 　
11599
 ANLPAR_TXANLPAR_TX 0x0080 via-velocity.h 　
11600
 ANLPAR_10FDANLPAR_10FD 0x0040 via-velocity.h 　
11601
 ANLPAR_10ANLPAR_10 0x0020 via-velocity.h 　
11602
 G1000CR_1000FDG1000CR_1000FD 0x0200 via-velocity.h PHY is 1000-T Full-duplex capable
11603
 G1000CR_1000G1000CR_1000 0x0100 via-velocity.h PHY is 1000-T Half-duplex capable
11604
 G1000SR_1000FDG1000SR_1000FD 0x0800 via-velocity.h LP PHY is 1000-T Full-duplex capable
11605
 G1000SR_1000G1000SR_1000 0x0400 via-velocity.h LP PHY is 1000-T Half-duplex capable
11606
 TCSR_ECHODISTCSR_ECHODIS 0x2000 via-velocity.h 　
11607
 AUXCR_MDPPSAUXCR_MDPPS 0x0004 via-velocity.h 　
11608
 PLED_LALBEPLED_LALBE 0x0004 via-velocity.h 　
11609
 PSCR_ACRSTXPSCR_ACRSTX 0x0800 via-velocity.h Assert CRS on Transmit
11610
 PHYID_CICADA_CS8201PHYID_CICADA_CS8201 0x000FC410UL via-velocity.h 　
11611
 PHYID_VT3216_32BITPHYID_VT3216_32BIT 0x000FC610UL via-velocity.h 　
11612
 PHYID_VT3216_64BITPHYID_VT3216_64BIT 0x000FC600UL via-velocity.h 　
11613
 PHYID_MARVELL_1000PHYID_MARVELL_1000 0x01410C50UL via-velocity.h 　
11614
 PHYID_MARVELL_1000SPHYID_MARVELL_1000S 0x01410C40UL via-velocity.h 　
11615
 PHYID_REV_ID_MASKPHYID_REV_ID_MASK 0x0000000FUL via-velocity.h 　
11616
 VELOCITY_WOL_MAGICVELOCITY_WOL_MAGIC 0x00000000UL via-velocity.h 　
11617
 VELOCITY_WOL_PHYVELOCITY_WOL_PHY 0x00000001UL via-velocity.h 　
11618
 VELOCITY_WOL_ARPVELOCITY_WOL_ARP 0x00000002UL via-velocity.h 　
11619
 VELOCITY_WOL_UCASTVELOCITY_WOL_UCAST 0x00000004UL via-velocity.h 　
11620
 VELOCITY_WOL_BCASTVELOCITY_WOL_BCAST 0x00000010UL via-velocity.h 　
11621
 VELOCITY_WOL_MCASTVELOCITY_WOL_MCAST 0x00000020UL via-velocity.h 　
11622
 VELOCITY_WOL_MAGIC_SECVELOCITY_WOL_MAGIC_SEC 0x00000040UL via-velocity.h 　
11623
 VELOCITY_FLAGS_TAGGINGVELOCITY_FLAGS_TAGGING 0x00000001UL via-velocity.h 　
11624
 VELOCITY_FLAGS_TX_CSUMVELOCITY_FLAGS_TX_CSUM 0x00000002UL via-velocity.h 　
11625
 VELOCITY_FLAGS_RX_CSUMVELOCITY_FLAGS_RX_CSUM 0x00000004UL via-velocity.h 　
11626
 VELOCITY_FLAGS_IP_ALIGNVELOCITY_FLAGS_IP_ALIGN 0x00000008UL via-velocity.h 　
11627
 VELOCITY_FLAGS_VAL_PKT_LENVELOCITY_FLAGS_VAL_PKT_LEN 0x00000010UL via-velocity.h 　
11628
 VELOCITY_FLAGS_FLOW_CTRLVELOCITY_FLAGS_FLOW_CTRL 0x01000000UL via-velocity.h 　
11629
 VELOCITY_FLAGS_OPENEDVELOCITY_FLAGS_OPENED 0x00010000UL via-velocity.h 　
11630
 VELOCITY_FLAGS_VMNS_CONNECTEDVELOCITY_FLAGS_VMNS_CONNECTED 0x00020000UL via-velocity.h 　
11631
 VELOCITY_FLAGS_VMNS_COMMITTEDVELOCITY_FLAGS_VMNS_COMMITTED 0x00040000UL via-velocity.h 　
11632
 VELOCITY_FLAGS_WOL_ENABLEDVELOCITY_FLAGS_WOL_ENABLED 0x00080000UL via-velocity.h 　
11633
 VELOCITY_LINK_FAILVELOCITY_LINK_FAIL 0x00000001UL via-velocity.h 　
11634
 VELOCITY_SPEED_10VELOCITY_SPEED_10 0x00000002UL via-velocity.h 　
11635
 VELOCITY_SPEED_100VELOCITY_SPEED_100 0x00000004UL via-velocity.h 　
11636
 VELOCITY_SPEED_1000VELOCITY_SPEED_1000 0x00000008UL via-velocity.h 　
11637
 VELOCITY_DUPLEX_FULLVELOCITY_DUPLEX_FULL 0x00000010UL via-velocity.h 　
11638
 VELOCITY_AUTONEG_ENABLEVELOCITY_AUTONEG_ENABLE 0x00000020UL via-velocity.h 　
11639
 VELOCITY_FORCED_BY_EEPROMVELOCITY_FORCED_BY_EEPROM 0x00000040UL via-velocity.h 　
11640
 VELOCITY_LINK_CHANGEVELOCITY_LINK_CHANGE 0x00000001UL via-velocity.h 　
11641
 RX_DESC_MINRX_DESC_MIN 4 via-velocity.h 　
11642
 RX_DESC_MAXRX_DESC_MAX 255 via-velocity.h 　
11643
 RX_DESC_DEFRX_DESC_DEF RX_DESC_MIN via-velocity.h 　
11644
 TX_DESC_MINTX_DESC_MIN 1 via-velocity.h 　
11645
 TX_DESC_MAXTX_DESC_MAX 256 via-velocity.h 　
11646
 TX_DESC_DEFTX_DESC_DEF TX_DESC_MIN via-velocity.h 　
11647
 VIRTIO_NET_F_CSUMVIRTIO_NET_F_CSUM 0 virtio-net.h Host handles pkts w/ partial csum
11648
 VIRTIO_NET_F_GUEST_CSUMVIRTIO_NET_F_GUEST_CSUM 1 virtio-net.h Guest handles pkts w/ partial csum
11649
 VIRTIO_NET_F_MACVIRTIO_NET_F_MAC 5 virtio-net.h Host has given MAC address.
11650
 VIRTIO_NET_F_GSOVIRTIO_NET_F_GSO 6 virtio-net.h Host handles pkts w/ any GSO type
11651
 VIRTIO_NET_F_GUEST_TSO4VIRTIO_NET_F_GUEST_TSO4 7 virtio-net.h Guest can handle TSOv4 in.
11652
 VIRTIO_NET_F_GUEST_TSO6VIRTIO_NET_F_GUEST_TSO6 8 virtio-net.h Guest can handle TSOv6 in.
11653
 VIRTIO_NET_F_GUEST_ECNVIRTIO_NET_F_GUEST_ECN 9 virtio-net.h Guest can handle TSO[6] w/ ECN in.
11654
 VIRTIO_NET_F_GUEST_UFOVIRTIO_NET_F_GUEST_UFO 10 virtio-net.h Guest can handle UFO in.
11655
 VIRTIO_NET_F_HOST_TSO4VIRTIO_NET_F_HOST_TSO4 11 virtio-net.h Host can handle TSOv4 in.
11656
 VIRTIO_NET_F_HOST_TSO6VIRTIO_NET_F_HOST_TSO6 12 virtio-net.h Host can handle TSOv6 in.
11657
 VIRTIO_NET_F_HOST_ECNVIRTIO_NET_F_HOST_ECN 13 virtio-net.h Host can handle TSO[6] w/ ECN in.
11658
 VIRTIO_NET_F_HOST_UFOVIRTIO_NET_F_HOST_UFO 14 virtio-net.h Host can handle UFO in.
11659
 WLAN_Ix86WLAN_Ix86 1 wlan_compat.h 　
11660
 WLAN_PPCWLAN_PPC 2 wlan_compat.h 　
11661
 WLAN_Ix96WLAN_Ix96 3 wlan_compat.h 　
11662
 WLAN_ARMWLAN_ARM 4 wlan_compat.h 　
11663
 WLAN_ALPHAWLAN_ALPHA 5 wlan_compat.h 　
11664
 WLAN_MIPSWLAN_MIPS 6 wlan_compat.h 　
11665
 WLAN_HPPAWLAN_HPPA 7 wlan_compat.h 　
11666
 WLAN_I386COREWLAN_I386CORE 1 wlan_compat.h 　
11667
 WLAN_PPCCOREWLAN_PPCCORE 2 wlan_compat.h 　
11668
 WLAN_I296WLAN_I296 3 wlan_compat.h 　
11669
 WLAN_ARMCOREWLAN_ARMCORE 4 wlan_compat.h 　
11670
 WLAN_ALPHACOREWLAN_ALPHACORE 5 wlan_compat.h 　
11671
 WLAN_MIPSCOREWLAN_MIPSCORE 6 wlan_compat.h 　
11672
 WLAN_HPPACOREWLAN_HPPACORE 7 wlan_compat.h 　
11673
 WLAN_I386PARTWLAN_I386PART 1 wlan_compat.h 　
11674
 WLAN_MPC860WLAN_MPC860 2 wlan_compat.h 　
11675
 WLAN_MPC823WLAN_MPC823 3 wlan_compat.h 　
11676
 WLAN_I296SAWLAN_I296SA 4 wlan_compat.h 　
11677
 WLAN_PPCPARTWLAN_PPCPART 5 wlan_compat.h 　
11678
 WLAN_ARMPARTWLAN_ARMPART 6 wlan_compat.h 　
11679
 WLAN_ALPHAPARTWLAN_ALPHAPART 7 wlan_compat.h 　
11680
 WLAN_MIPSPARTWLAN_MIPSPART 8 wlan_compat.h 　
11681
 WLAN_HPPAPARTWLAN_HPPAPART 9 wlan_compat.h 　
11682
 WLAN_PCATWLAN_PCAT 1 wlan_compat.h 　
11683
 WLAN_MBXWLAN_MBX 2 wlan_compat.h 　
11684
 WLAN_RPXWLAN_RPX 3 wlan_compat.h 　
11685
 WLAN_LWARCHWLAN_LWARCH 4 wlan_compat.h 　
11686
 WLAN_PMACWLAN_PMAC 5 wlan_compat.h 　
11687
 WLAN_SKIFFWLAN_SKIFF 6 wlan_compat.h 　
11688
 WLAN_BITSYWLAN_BITSY 7 wlan_compat.h 　
11689
 WLAN_ALPHAARCHWLAN_ALPHAARCH 7 wlan_compat.h 　
11690
 WLAN_MIPSARCHWLAN_MIPSARCH 9 wlan_compat.h 　
11691
 WLAN_HPPAARCHWLAN_HPPAARCH 10 wlan_compat.h 　
11692
 WLAN_LINUX_KERNELWLAN_LINUX_KERNEL 1 wlan_compat.h 　
11693
 WLAN_LINUX_USERWLAN_LINUX_USER 2 wlan_compat.h 　
11694
 WLAN_PCMCIAWLAN_PCMCIA 1 wlan_compat.h 　
11695
 WLAN_ISAWLAN_ISA 2 wlan_compat.h 　
11696
 WLAN_PCIWLAN_PCI 3 wlan_compat.h 　
11697
 WLAN_USBWLAN_USB 4 wlan_compat.h 　
11698
 WLAN_PLXWLAN_PLX 5 wlan_compat.h 　
11699
 WLAN_OSWLAN_OS WLAN_LINUX_KERNEL wlan_compat.h 　
11700
 WLAN_OSWLAN_OS WLAN_LINUX_USER wlan_compat.h 　
11701
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_Ix86 wlan_compat.h 　
11702
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_I386CORE wlan_compat.h 　
11703
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_I386PART wlan_compat.h 　
11704
 WLAN_SYSARCHWLAN_SYSARCH WLAN_PCAT wlan_compat.h 　
11705
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_PPC wlan_compat.h 　
11706
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_PPCCORE wlan_compat.h 　
11707
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_MPC860 wlan_compat.h 　
11708
 WLAN_SYSARCHWLAN_SYSARCH WLAN_MBX wlan_compat.h 　
11709
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_MPC823 wlan_compat.h 　
11710
 WLAN_SYSARCHWLAN_SYSARCH WLAN_RPX wlan_compat.h 　
11711
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_MPC860 wlan_compat.h 　
11712
 WLAN_SYSARCHWLAN_SYSARCH WLAN_RPX wlan_compat.h 　
11713
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_PPCPART wlan_compat.h 　
11714
 WLAN_SYSARCHWLAN_SYSARCH WLAN_PMAC wlan_compat.h 　
11715
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_ARM wlan_compat.h 　
11716
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_ARMCORE wlan_compat.h 　
11717
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_ARM_PART wlan_compat.h 　
11718
 WLAN_SYSARCHWLAN_SYSARCH WLAN_SKIFF wlan_compat.h 　
11719
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_ALPHA wlan_compat.h 　
11720
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_ALPHACORE wlan_compat.h 　
11721
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_ALPHAPART wlan_compat.h 　
11722
 WLAN_SYSARCHWLAN_SYSARCH WLAN_ALPHAARCH wlan_compat.h 　
11723
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_MIPS wlan_compat.h 　
11724
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_MIPSCORE wlan_compat.h 　
11725
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_MIPSPART wlan_compat.h 　
11726
 WLAN_SYSARCHWLAN_SYSARCH WLAN_MIPSARCH wlan_compat.h 　
11727
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_HPPA wlan_compat.h 　
11728
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_HPPACORE wlan_compat.h 　
11729
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_HPPAPART wlan_compat.h 　
11730
 WLAN_SYSARCHWLAN_SYSARCH WLAN_HPPAARCH wlan_compat.h 　
11731
 BIT0BIT0 0x00000001 wlan_compat.h 　
11732
 BIT1BIT1 0x00000002 wlan_compat.h 　
11733
 BIT2BIT2 0x00000004 wlan_compat.h 　
11734
 BIT3BIT3 0x00000008 wlan_compat.h 　
11735
 BIT4BIT4 0x00000010 wlan_compat.h 　
11736
 BIT5BIT5 0x00000020 wlan_compat.h 　
11737
 BIT6BIT6 0x00000040 wlan_compat.h 　
11738
 BIT7BIT7 0x00000080 wlan_compat.h 　
11739
 BIT8BIT8 0x00000100 wlan_compat.h 　
11740
 BIT9BIT9 0x00000200 wlan_compat.h 　
11741
 BIT10BIT10 0x00000400 wlan_compat.h 　
11742
 BIT11BIT11 0x00000800 wlan_compat.h 　
11743
 BIT12BIT12 0x00001000 wlan_compat.h 　
11744
 BIT13BIT13 0x00002000 wlan_compat.h 　
11745
 BIT14BIT14 0x00004000 wlan_compat.h 　
11746
 BIT15BIT15 0x00008000 wlan_compat.h 　
11747
 BIT16BIT16 0x00010000 wlan_compat.h 　
11748
 BIT17BIT17 0x00020000 wlan_compat.h 　
11749
 BIT18BIT18 0x00040000 wlan_compat.h 　
11750
 BIT19BIT19 0x00080000 wlan_compat.h 　
11751
 BIT20BIT20 0x00100000 wlan_compat.h 　
11752
 BIT21BIT21 0x00200000 wlan_compat.h 　
11753
 BIT22BIT22 0x00400000 wlan_compat.h 　
11754
 BIT23BIT23 0x00800000 wlan_compat.h 　
11755
 BIT24BIT24 0x01000000 wlan_compat.h 　
11756
 BIT25BIT25 0x02000000 wlan_compat.h 　
11757
 BIT26BIT26 0x04000000 wlan_compat.h 　
11758
 BIT27BIT27 0x08000000 wlan_compat.h 　
11759
 BIT28BIT28 0x10000000 wlan_compat.h 　
11760
 BIT29BIT29 0x20000000 wlan_compat.h 　
11761
 BIT30BIT30 0x40000000 wlan_compat.h 　
11762
 BIT31BIT31 0x80000000 wlan_compat.h 　
11763
 UINT8_MAXUINT8_MAX (0xffUL) wlan_compat.h 　
11764
 UINT16_MAXUINT16_MAX (0xffffUL) wlan_compat.h 　
11765
 UINT32_MAXUINT32_MAX (0xffffffffUL) wlan_compat.h 　
11766
 INT8_MAXINT8_MAX (0x7fL) wlan_compat.h 　
11767
 INT16_MAXINT16_MAX (0x7fffL) wlan_compat.h 　
11768
 INT32_MAXINT32_MAX (0x7fffffffL) wlan_compat.h 　
11769
 __WLAN_ATTRIB_PACK____WLAN_ATTRIB_PACK__ __attribute__ ((packed)) wlan_compat.h 　
11770
 __WLAN_INLINE____WLAN_INLINE__ inline wlan_compat.h 　
11771
 WLAN_MIN_ARRAYWLAN_MIN_ARRAY 0 wlan_compat.h 　
11772
 WLAN_DBVARWLAN_DBVAR wlan_debug wlan_compat.h 　
11773
 DBFENTERDBFENTER { if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Enter\n"); } } wlan_compat.h 　
11774
 DBFEXITDBFEXIT { if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Exit\n"); } } wlan_compat.h 　
11775
 wlan_ms_per_tickwlan_ms_per_tick (1000UL / (wlan_ticks_per_sec)) wlan_compat.h 　
11776
 MODVERSIONSMODVERSIONS 1 wlan_compat.h 　
11777
 __SMP____SMP__ 1 wlan_compat.h 　
11778
 CONFIG_NETLINKCONFIG_NETLINK 1 wlan_compat.h 　
11779
 ATH5K_CALIB_INTERVALATH5K_CALIB_INTERVAL 10 ath5k.c Calibrate PHY every 10 seconds
11780
 ATH5K_RETRIESATH5K_RETRIES 4 ath5k.c Number of times to retry packet sends
11781
 ATH5K_DESC_ALIGNATH5K_DESC_ALIGN 16 ath5k.c Alignment for TX/RX descriptors
11782
 ATH5K_SPMBL_NOATH5K_SPMBL_NO 1 ath5k.c 　
11783
 ATH5K_SPMBL_YESATH5K_SPMBL_YES 2 ath5k.c 　
11784
 ATH5K_SPMBL_BOTHATH5K_SPMBL_BOTH 3 ath5k.c 　
11785
 ATH5K_NR_RATESATH5K_NR_RATES 15 ath5k.c 　
11786
 FCS_LENFCS_LEN 4 ath5k_desc.c 　
11787
 ERRFILEERRFILE ERRFILE_ath5k ath5k.h 　
11788
 PCI_DEVICE_ID_ATHEROS_AR5210PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 ath5k.h AR5210
11789
 PCI_DEVICE_ID_ATHEROS_AR5311PCI_DEVICE_ID_ATHEROS_AR5311 0x0011 ath5k.h AR5311
11790
 PCI_DEVICE_ID_ATHEROS_AR5211PCI_DEVICE_ID_ATHEROS_AR5211 0x0012 ath5k.h AR5211
11791
 PCI_DEVICE_ID_ATHEROS_AR5212PCI_DEVICE_ID_ATHEROS_AR5212 0x0013 ath5k.h AR5212
11792
 PCI_DEVICE_ID_3COM_3CRDAG675PCI_DEVICE_ID_3COM_3CRDAG675 0x0013 ath5k.h 3CRDAG675 (Atheros AR5212)
11793
 PCI_DEVICE_ID_3COM_2_3CRPAG175PCI_DEVICE_ID_3COM_2_3CRPAG175 0x0013 ath5k.h 3CRPAG175 (Atheros AR5212)
11794
 PCI_DEVICE_ID_ATHEROS_AR5210_APPCI_DEVICE_ID_ATHEROS_AR5210_AP 0x0207 ath5k.h AR5210 (Early)
11795
 PCI_DEVICE_ID_ATHEROS_AR5212_IBPCI_DEVICE_ID_ATHEROS_AR5212_IB 0x1014 ath5k.h AR5212 (IBM MiniPCI)
11796
 PCI_DEVICE_ID_ATHEROS_AR5210_DEPCI_DEVICE_ID_ATHEROS_AR5210_DE 0x1107 ath5k.h AR5210 (no eeprom)
11797
 PCI_DEVICE_ID_ATHEROS_AR5212_DEPCI_DEVICE_ID_ATHEROS_AR5212_DE 0x1113 ath5k.h AR5212 (no eeprom)
11798
 PCI_DEVICE_ID_ATHEROS_AR5211_DEPCI_DEVICE_ID_ATHEROS_AR5211_DE 0x1112 ath5k.h AR5211 (no eeprom)
11799
 PCI_DEVICE_ID_ATHEROS_AR5212_FPPCI_DEVICE_ID_ATHEROS_AR5212_FP 0xf013 ath5k.h AR5212 (emulation board)
11800
 PCI_DEVICE_ID_ATHEROS_AR5211_LEPCI_DEVICE_ID_ATHEROS_AR5211_LE 0xff12 ath5k.h AR5211 (emulation board)
11801
 PCI_DEVICE_ID_ATHEROS_AR5211_FPPCI_DEVICE_ID_ATHEROS_AR5211_FP 0xf11b ath5k.h AR5211 (emulation board)
11802
 PCI_DEVICE_ID_ATHEROS_AR5312_REPCI_DEVICE_ID_ATHEROS_AR5312_RE 0x0052 ath5k.h AR5312 WMAC (AP31)
11803
 PCI_DEVICE_ID_ATHEROS_AR5312_REPCI_DEVICE_ID_ATHEROS_AR5312_RE 0x0057 ath5k.h AR5312 WMAC (AP30-040)
11804
 PCI_DEVICE_ID_ATHEROS_AR5312_REPCI_DEVICE_ID_ATHEROS_AR5312_RE 0x0058 ath5k.h AR5312 WMAC (AP43-030)
11805
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0014 ath5k.h AR5212 compatible
11806
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0015 ath5k.h AR5212 compatible
11807
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0016 ath5k.h AR5212 compatible
11808
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0017 ath5k.h AR5212 compatible
11809
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0018 ath5k.h AR5212 compatible
11810
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0019 ath5k.h AR5212 compatible
11811
 PCI_DEVICE_ID_ATHEROS_AR2413PCI_DEVICE_ID_ATHEROS_AR2413 0x001a ath5k.h AR2413 (Griffin-lite)
11812
 PCI_DEVICE_ID_ATHEROS_AR5413PCI_DEVICE_ID_ATHEROS_AR5413 0x001b ath5k.h AR5413 (Eagle)
11813
 PCI_DEVICE_ID_ATHEROS_AR5424PCI_DEVICE_ID_ATHEROS_AR5424 0x001c ath5k.h AR5424 (Condor PCI-E)
11814
 PCI_DEVICE_ID_ATHEROS_AR5416PCI_DEVICE_ID_ATHEROS_AR5416 0x0023 ath5k.h AR5416
11815
 PCI_DEVICE_ID_ATHEROS_AR5418PCI_DEVICE_ID_ATHEROS_AR5418 0x0024 ath5k.h AR5418
11816
 AR5K_INI_RFGAIN_5GHZAR5K_INI_RFGAIN_5GHZ 0 ath5k.h 　
11817
 AR5K_INI_RFGAIN_2GHZAR5K_INI_RFGAIN_2GHZ 1 ath5k.h 　
11818
 AR5K_INI_VAL_11AAR5K_INI_VAL_11A 0 ath5k.h 　
11819
 AR5K_INI_VAL_11A_TURBOAR5K_INI_VAL_11A_TURBO 1 ath5k.h 　
11820
 AR5K_INI_VAL_11BAR5K_INI_VAL_11B 2 ath5k.h 　
11821
 AR5K_INI_VAL_11GAR5K_INI_VAL_11G 3 ath5k.h 　
11822
 AR5K_INI_VAL_11G_TURBOAR5K_INI_VAL_11G_TURBO 4 ath5k.h 　
11823
 AR5K_INI_VAL_XRAR5K_INI_VAL_XR 0 ath5k.h 　
11824
 AR5K_INI_VAL_MAXAR5K_INI_VAL_MAX 5 ath5k.h 　
11825
 IEEE80211_MAX_LENIEEE80211_MAX_LEN 2352 ath5k.h 　
11826
 AR5K_TUNE_DMA_BEACON_RESPAR5K_TUNE_DMA_BEACON_RESP 2 ath5k.h 　
11827
 AR5K_TUNE_SW_BEACON_RESPAR5K_TUNE_SW_BEACON_RESP 10 ath5k.h 　
11828
 AR5K_TUNE_ADDITIONAL_SWBA_BACKOAR5K_TUNE_ADDITIONAL_SWBA_BACKO 0 ath5k.h 　
11829
 AR5K_TUNE_RADAR_ALERTAR5K_TUNE_RADAR_ALERT 0 ath5k.h 　
11830
 AR5K_TUNE_MIN_TX_FIFO_THRESAR5K_TUNE_MIN_TX_FIFO_THRES 1 ath5k.h 　
11831
 AR5K_TUNE_MAX_TX_FIFO_THRESAR5K_TUNE_MAX_TX_FIFO_THRES ((IEEE80211_MAX_LEN / 64) + 1) ath5k.h 　
11832
 AR5K_TUNE_REGISTER_TIMEOUTAR5K_TUNE_REGISTER_TIMEOUT 20000 ath5k.h 　
11833
 AR5K_TUNE_RSSI_THRESAR5K_TUNE_RSSI_THRES 129 ath5k.h 　
11834
 AR5K_TUNE_BMISS_THRESAR5K_TUNE_BMISS_THRES 7 ath5k.h 　
11835
 AR5K_TUNE_REGISTER_DWELL_TIMEAR5K_TUNE_REGISTER_DWELL_TIME 20000 ath5k.h 　
11836
 AR5K_TUNE_BEACON_INTERVALAR5K_TUNE_BEACON_INTERVAL 100 ath5k.h 　
11837
 AR5K_TUNE_AIFSAR5K_TUNE_AIFS 2 ath5k.h 　
11838
 AR5K_TUNE_AIFS_11BAR5K_TUNE_AIFS_11B 2 ath5k.h 　
11839
 AR5K_TUNE_AIFS_XRAR5K_TUNE_AIFS_XR 0 ath5k.h 　
11840
 AR5K_TUNE_CWMINAR5K_TUNE_CWMIN 15 ath5k.h 　
11841
 AR5K_TUNE_CWMIN_11BAR5K_TUNE_CWMIN_11B 31 ath5k.h 　
11842
 AR5K_TUNE_CWMIN_XRAR5K_TUNE_CWMIN_XR 3 ath5k.h 　
11843
 AR5K_TUNE_CWMAXAR5K_TUNE_CWMAX 1023 ath5k.h 　
11844
 AR5K_TUNE_CWMAX_11BAR5K_TUNE_CWMAX_11B 1023 ath5k.h 　
11845
 AR5K_TUNE_CWMAX_XRAR5K_TUNE_CWMAX_XR 7 ath5k.h 　
11846
 AR5K_TUNE_NOISE_FLOORAR5K_TUNE_NOISE_FLOOR -72 ath5k.h 　
11847
 AR5K_TUNE_MAX_TXPOWERAR5K_TUNE_MAX_TXPOWER 63 ath5k.h 　
11848
 AR5K_TUNE_DEFAULT_TXPOWERAR5K_TUNE_DEFAULT_TXPOWER 25 ath5k.h 　
11849
 AR5K_TUNE_TPC_TXPOWERAR5K_TUNE_TPC_TXPOWER 0 ath5k.h 　
11850
 AR5K_TUNE_ANT_DIVERSITYAR5K_TUNE_ANT_DIVERSITY 1 ath5k.h 　
11851
 AR5K_TUNE_HWTXTRIESAR5K_TUNE_HWTXTRIES 4 ath5k.h 　
11852
 AR5K_INIT_CARR_SENSE_ENAR5K_INIT_CARR_SENSE_EN 1 ath5k.h 　
11853
 AR5K_INIT_CFGAR5K_INIT_CFG ( \ AR5K_CFG_SWTD | AR5K_CFG_SWRD \ ) ath5k.h 　
11854
 AR5K_INIT_CFGAR5K_INIT_CFG 0x00000000 ath5k.h 　
11855
 AR5K_INIT_CYCRSSI_THR1AR5K_INIT_CYCRSSI_THR1 2 ath5k.h 　
11856
 AR5K_INIT_TX_LATENCYAR5K_INIT_TX_LATENCY 502 ath5k.h 　
11857
 AR5K_INIT_USECAR5K_INIT_USEC 39 ath5k.h 　
11858
 AR5K_INIT_USEC_TURBOAR5K_INIT_USEC_TURBO 79 ath5k.h 　
11859
 AR5K_INIT_USEC_32AR5K_INIT_USEC_32 31 ath5k.h 　
11860
 AR5K_INIT_SLOT_TIMEAR5K_INIT_SLOT_TIME 396 ath5k.h 　
11861
 AR5K_INIT_SLOT_TIME_TURBOAR5K_INIT_SLOT_TIME_TURBO 480 ath5k.h 　
11862
 AR5K_INIT_ACK_CTS_TIMEOUTAR5K_INIT_ACK_CTS_TIMEOUT 1024 ath5k.h 　
11863
 AR5K_INIT_ACK_CTS_TIMEOUT_TURBOAR5K_INIT_ACK_CTS_TIMEOUT_TURBO 0x08000800 ath5k.h 　
11864
 AR5K_INIT_PROG_IFSAR5K_INIT_PROG_IFS 920 ath5k.h 　
11865
 AR5K_INIT_PROG_IFS_TURBOAR5K_INIT_PROG_IFS_TURBO 960 ath5k.h 　
11866
 AR5K_INIT_EIFSAR5K_INIT_EIFS 3440 ath5k.h 　
11867
 AR5K_INIT_EIFS_TURBOAR5K_INIT_EIFS_TURBO 6880 ath5k.h 　
11868
 AR5K_INIT_SIFSAR5K_INIT_SIFS 560 ath5k.h 　
11869
 AR5K_INIT_SIFS_TURBOAR5K_INIT_SIFS_TURBO 480 ath5k.h 　
11870
 AR5K_INIT_SH_RETRYAR5K_INIT_SH_RETRY 10 ath5k.h 　
11871
 AR5K_INIT_LG_RETRYAR5K_INIT_LG_RETRY AR5K_INIT_SH_RETRY ath5k.h 　
11872
 AR5K_INIT_SSH_RETRYAR5K_INIT_SSH_RETRY 32 ath5k.h 　
11873
 AR5K_INIT_SLG_RETRYAR5K_INIT_SLG_RETRY AR5K_INIT_SSH_RETRY ath5k.h 　
11874
 AR5K_INIT_TX_RETRYAR5K_INIT_TX_RETRY 10 ath5k.h 　
11875
 AR5K_INIT_TRANSMIT_LATENCYAR5K_INIT_TRANSMIT_LATENCY ( \ (AR5K_INIT_TX_LATENCY << 14) | (AR5K_INIT_USEC_32 << 7) | \ (AR5K_INIT_USEC) \ ) ath5k.h 　
11876
 AR5K_INIT_TRANSMIT_LATENCY_TURBAR5K_INIT_TRANSMIT_LATENCY_TURB ( \ (AR5K_INIT_TX_LATENCY << 14) | (AR5K_INIT_USEC_32 << 7) | \ (AR5K_INIT_USEC_TURBO) \ ) ath5k.h 　
11877
 AR5K_INIT_PROTO_TIME_CNTRLAR5K_INIT_PROTO_TIME_CNTRL ( \ (AR5K_INIT_CARR_SENSE_EN << 26) | (AR5K_INIT_EIFS << 12) | \ (AR5K_INIT_PROG_IFS) \ ) ath5k.h 　
11878
 AR5K_INIT_PROTO_TIME_CNTRL_TURBAR5K_INIT_PROTO_TIME_CNTRL_TURB ( \ (AR5K_INIT_CARR_SENSE_EN << 26) | (AR5K_INIT_EIFS_TURBO << 12) | \ (AR5K_INIT_PROG_IFS_TURBO) \ ) ath5k.h 　
11879
 AR5K_TXQ_USEDEFAULTAR5K_TXQ_USEDEFAULT ((u32) -1) ath5k.h 　
11880
 AR5K_SREV_UNKNOWNAR5K_SREV_UNKNOWN 0xffff ath5k.h 　
11881
 AR5K_SREV_AR5210AR5K_SREV_AR5210 0x00 ath5k.h Crete
11882
 AR5K_SREV_AR5311AR5K_SREV_AR5311 0x10 ath5k.h Maui 1
11883
 AR5K_SREV_AR5311AAR5K_SREV_AR5311A 0x20 ath5k.h Maui 2
11884
 AR5K_SREV_AR5311BAR5K_SREV_AR5311B 0x30 ath5k.h Spirit
11885
 AR5K_SREV_AR5211AR5K_SREV_AR5211 0x40 ath5k.h Oahu
11886
 AR5K_SREV_AR5212AR5K_SREV_AR5212 0x50 ath5k.h Venice
11887
 AR5K_SREV_AR5213AR5K_SREV_AR5213 0x55 ath5k.h ???
11888
 AR5K_SREV_AR5213AAR5K_SREV_AR5213A 0x59 ath5k.h Hainan
11889
 AR5K_SREV_AR2413AR5K_SREV_AR2413 0x78 ath5k.h Griffin lite
11890
 AR5K_SREV_AR2414AR5K_SREV_AR2414 0x70 ath5k.h Griffin
11891
 AR5K_SREV_AR5424AR5K_SREV_AR5424 0x90 ath5k.h Condor
11892
 AR5K_SREV_AR5413AR5K_SREV_AR5413 0xa4 ath5k.h Eagle lite
11893
 AR5K_SREV_AR5414AR5K_SREV_AR5414 0xa0 ath5k.h Eagle
11894
 AR5K_SREV_AR2415AR5K_SREV_AR2415 0xb0 ath5k.h Talon
11895
 AR5K_SREV_AR5416AR5K_SREV_AR5416 0xc0 ath5k.h PCI-E
11896
 AR5K_SREV_AR5418AR5K_SREV_AR5418 0xca ath5k.h PCI-E
11897
 AR5K_SREV_AR2425AR5K_SREV_AR2425 0xe0 ath5k.h Swan
11898
 AR5K_SREV_AR2417AR5K_SREV_AR2417 0xf0 ath5k.h Nala
11899
 AR5K_SREV_RAD_5110AR5K_SREV_RAD_5110 0x00 ath5k.h 　
11900
 AR5K_SREV_RAD_5111AR5K_SREV_RAD_5111 0x10 ath5k.h 　
11901
 AR5K_SREV_RAD_5111AAR5K_SREV_RAD_5111A 0x15 ath5k.h 　
11902
 AR5K_SREV_RAD_2111AR5K_SREV_RAD_2111 0x20 ath5k.h 　
11903
 AR5K_SREV_RAD_5112AR5K_SREV_RAD_5112 0x30 ath5k.h 　
11904
 AR5K_SREV_RAD_5112AAR5K_SREV_RAD_5112A 0x35 ath5k.h 　
11905
 AR5K_SREV_RAD_5112BAR5K_SREV_RAD_5112B 0x36 ath5k.h 　
11906
 AR5K_SREV_RAD_2112AR5K_SREV_RAD_2112 0x40 ath5k.h 　
11907
 AR5K_SREV_RAD_2112AAR5K_SREV_RAD_2112A 0x45 ath5k.h 　
11908
 AR5K_SREV_RAD_2112BAR5K_SREV_RAD_2112B 0x46 ath5k.h 　
11909
 AR5K_SREV_RAD_2413AR5K_SREV_RAD_2413 0x50 ath5k.h 　
11910
 AR5K_SREV_RAD_5413AR5K_SREV_RAD_5413 0x60 ath5k.h 　
11911
 AR5K_SREV_RAD_2316AR5K_SREV_RAD_2316 0x70 ath5k.h Cobra SoC
11912
 AR5K_SREV_RAD_2317AR5K_SREV_RAD_2317 0x80 ath5k.h 　
11913
 AR5K_SREV_RAD_5424AR5K_SREV_RAD_5424 0xa0 ath5k.h Mostly same as 5413
11914
 AR5K_SREV_RAD_2425AR5K_SREV_RAD_2425 0xa2 ath5k.h 　
11915
 AR5K_SREV_RAD_5133AR5K_SREV_RAD_5133 0xc0 ath5k.h 　
11916
 AR5K_SREV_PHY_5211AR5K_SREV_PHY_5211 0x30 ath5k.h 　
11917
 AR5K_SREV_PHY_5212AR5K_SREV_PHY_5212 0x41 ath5k.h 　
11918
 AR5K_SREV_PHY_5212AAR5K_SREV_PHY_5212A 0x42 ath5k.h 　
11919
 AR5K_SREV_PHY_5212BAR5K_SREV_PHY_5212B 0x43 ath5k.h 　
11920
 AR5K_SREV_PHY_2413AR5K_SREV_PHY_2413 0x45 ath5k.h 　
11921
 AR5K_SREV_PHY_5413AR5K_SREV_PHY_5413 0x61 ath5k.h 　
11922
 AR5K_SREV_PHY_2425AR5K_SREV_PHY_2425 0x70 ath5k.h 　
11923
 MODULATION_XRMODULATION_XR 0x00000200 ath5k.h 　
11924
 MODULATION_TURBOMODULATION_TURBO 0x00000080 ath5k.h 　
11925
 AR5K_TXSTAT_ALTRATEAR5K_TXSTAT_ALTRATE 0x80 ath5k.h 　
11926
 AR5K_TXERR_XRETRYAR5K_TXERR_XRETRY 0x01 ath5k.h 　
11927
 AR5K_TXERR_FILTAR5K_TXERR_FILT 0x02 ath5k.h 　
11928
 AR5K_TXERR_FIFOAR5K_TXERR_FIFO 0x04 ath5k.h 　
11929
 AR5K_TXQ_FLAG_TXOKINT_ENABLEAR5K_TXQ_FLAG_TXOKINT_ENABLE 0x0001 ath5k.h Enable TXOK interrupt
11930
 AR5K_TXQ_FLAG_TXERRINT_ENABLEAR5K_TXQ_FLAG_TXERRINT_ENABLE 0x0002 ath5k.h Enable TXERR interrupt
11931
 AR5K_TXQ_FLAG_TXEOLINT_ENABLEAR5K_TXQ_FLAG_TXEOLINT_ENABLE 0x0004 ath5k.h Enable TXEOL interrupt -not used-
11932
 AR5K_TXQ_FLAG_TXDESCINT_ENABLEAR5K_TXQ_FLAG_TXDESCINT_ENABLE 0x0008 ath5k.h Enable TXDESC interrupt -not used-
11933
 AR5K_TXQ_FLAG_TXURNINT_ENABLEAR5K_TXQ_FLAG_TXURNINT_ENABLE 0x0010 ath5k.h Enable TXURN interrupt
11934
 AR5K_TXQ_FLAG_CBRORNINT_ENABLEAR5K_TXQ_FLAG_CBRORNINT_ENABLE 0x0020 ath5k.h Enable CBRORN interrupt
11935
 AR5K_TXQ_FLAG_CBRURNINT_ENABLEAR5K_TXQ_FLAG_CBRURNINT_ENABLE 0x0040 ath5k.h Enable CBRURN interrupt
11936
 AR5K_TXQ_FLAG_QTRIGINT_ENABLEAR5K_TXQ_FLAG_QTRIGINT_ENABLE 0x0080 ath5k.h Enable QTRIG interrupt
11937
 AR5K_TXQ_FLAG_TXNOFRMINT_ENABLEAR5K_TXQ_FLAG_TXNOFRMINT_ENABLE 0x0100 ath5k.h Enable TXNOFRM interrupt
11938
 AR5K_TXQ_FLAG_BACKOFF_DISABLEAR5K_TXQ_FLAG_BACKOFF_DISABLE 0x0200 ath5k.h Disable random post-backoff
11939
 AR5K_TXQ_FLAG_RDYTIME_EXP_POLICAR5K_TXQ_FLAG_RDYTIME_EXP_POLIC 0x0300 ath5k.h Enable ready time expiry policy (?)
11940
 AR5K_TXQ_FLAG_FRAG_BURST_BACKOFAR5K_TXQ_FLAG_FRAG_BURST_BACKOF 0x0800 ath5k.h Enable backoff while bursting
11941
 AR5K_TXQ_FLAG_POST_FR_BKOFF_DISAR5K_TXQ_FLAG_POST_FR_BKOFF_DIS 0x1000 ath5k.h Disable backoff while bursting
11942
 AR5K_TXQ_FLAG_COMPRESSION_ENABLAR5K_TXQ_FLAG_COMPRESSION_ENABL 0x2000 ath5k.h Enable hw compression -not implemented-
11943
 AR5K_RXERR_CRCAR5K_RXERR_CRC 0x01 ath5k.h 　
11944
 AR5K_RXERR_PHYAR5K_RXERR_PHY 0x02 ath5k.h 　
11945
 AR5K_RXERR_FIFOAR5K_RXERR_FIFO 0x04 ath5k.h 　
11946
 AR5K_RXERR_DECRYPTAR5K_RXERR_DECRYPT 0x08 ath5k.h 　
11947
 AR5K_RXERR_MICAR5K_RXERR_MIC 0x10 ath5k.h 　
11948
 AR5K_RXKEYIX_INVALIDAR5K_RXKEYIX_INVALID ((u8) - 1) ath5k.h 　
11949
 AR5K_TXKEYIX_INVALIDAR5K_TXKEYIX_INVALID ((u32) - 1) ath5k.h 　
11950
 AR5K_SLOT_TIME_9AR5K_SLOT_TIME_9 396 ath5k.h 　
11951
 AR5K_SLOT_TIME_20AR5K_SLOT_TIME_20 880 ath5k.h 　
11952
 AR5K_SLOT_TIME_MAXAR5K_SLOT_TIME_MAX 0xffff ath5k.h 　
11953
 CHANNEL_CW_INTCHANNEL_CW_INT 0x0008 ath5k.h Contention Window interference detected
11954
 CHANNEL_TURBOCHANNEL_TURBO 0x0010 ath5k.h Turbo Channel
11955
 CHANNEL_CCKCHANNEL_CCK 0x0020 ath5k.h CCK channel
11956
 CHANNEL_OFDMCHANNEL_OFDM 0x0040 ath5k.h OFDM channel
11957
 CHANNEL_2GHZCHANNEL_2GHZ 0x0080 ath5k.h 2GHz channel.
11958
 CHANNEL_5GHZCHANNEL_5GHZ 0x0100 ath5k.h 5GHz channel
11959
 CHANNEL_PASSIVECHANNEL_PASSIVE 0x0200 ath5k.h Only passive scan allowed
11960
 CHANNEL_DYNCHANNEL_DYN 0x0400 ath5k.h Dynamic CCK-OFDM channel (for g operation)
11961
 CHANNEL_XRCHANNEL_XR 0x0800 ath5k.h XR channel
11962
 CHANNEL_ACHANNEL_A (CHANNEL_5GHZ|CHANNEL_OFDM) ath5k.h 　
11963
 CHANNEL_BCHANNEL_B (CHANNEL_2GHZ|CHANNEL_CCK) ath5k.h 　
11964
 CHANNEL_GCHANNEL_G (CHANNEL_2GHZ|CHANNEL_OFDM) ath5k.h 　
11965
 CHANNEL_TCHANNEL_T (CHANNEL_5GHZ|CHANNEL_OFDM|CHANNEL_TURBO) ath5k.h 　
11966
 CHANNEL_TGCHANNEL_TG (CHANNEL_2GHZ|CHANNEL_OFDM|CHANNEL_TURBO) ath5k.h 　
11967
 CHANNEL_108ACHANNEL_108A CHANNEL_T ath5k.h 　
11968
 CHANNEL_108GCHANNEL_108G CHANNEL_TG ath5k.h 　
11969
 CHANNEL_XCHANNEL_X (CHANNEL_5GHZ|CHANNEL_OFDM|CHANNEL_XR) ath5k.h 　
11970
 CHANNEL_ALLCHANNEL_ALL (CHANNEL_OFDM|CHANNEL_CCK|CHANNEL_2GHZ|CHANNEL_5GHZ| \ CHANNEL_TURBO) ath5k.h 　
11971
 CHANNEL_ALL_NOTURBOCHANNEL_ALL_NOTURBO (CHANNEL_ALL & ~CHANNEL_TURBO) ath5k.h 　
11972
 CHANNEL_MODESCHANNEL_MODES CHANNEL_ALL ath5k.h 　
11973
 AR5K_MAX_RATESAR5K_MAX_RATES 32 ath5k.h 　
11974
 ATH5K_RATE_CODE_1MATH5K_RATE_CODE_1M 0x1B ath5k.h 　
11975
 ATH5K_RATE_CODE_2MATH5K_RATE_CODE_2M 0x1A ath5k.h 　
11976
 ATH5K_RATE_CODE_5_5MATH5K_RATE_CODE_5_5M 0x19 ath5k.h 　
11977
 ATH5K_RATE_CODE_11MATH5K_RATE_CODE_11M 0x18 ath5k.h 　
11978
 ATH5K_RATE_CODE_6MATH5K_RATE_CODE_6M 0x0B ath5k.h 　
11979
 ATH5K_RATE_CODE_9MATH5K_RATE_CODE_9M 0x0F ath5k.h 　
11980
 ATH5K_RATE_CODE_12MATH5K_RATE_CODE_12M 0x0A ath5k.h 　
11981
 ATH5K_RATE_CODE_18MATH5K_RATE_CODE_18M 0x0E ath5k.h 　
11982
 ATH5K_RATE_CODE_24MATH5K_RATE_CODE_24M 0x09 ath5k.h 　
11983
 ATH5K_RATE_CODE_36MATH5K_RATE_CODE_36M 0x0D ath5k.h 　
11984
 ATH5K_RATE_CODE_48MATH5K_RATE_CODE_48M 0x08 ath5k.h 　
11985
 ATH5K_RATE_CODE_54MATH5K_RATE_CODE_54M 0x0C ath5k.h 　
11986
 ATH5K_RATE_CODE_XR_500KATH5K_RATE_CODE_XR_500K 0x07 ath5k.h 　
11987
 ATH5K_RATE_CODE_XR_1MATH5K_RATE_CODE_XR_1M 0x02 ath5k.h 　
11988
 ATH5K_RATE_CODE_XR_2MATH5K_RATE_CODE_XR_2M 0x06 ath5k.h 　
11989
 ATH5K_RATE_CODE_XR_3MATH5K_RATE_CODE_XR_3M 0x01 ath5k.h 　
11990
 AR5K_SET_SHORT_PREAMBLEAR5K_SET_SHORT_PREAMBLE 0x04 ath5k.h 　
11991
 AR5K_KEYCACHE_SIZEAR5K_KEYCACHE_SIZE 8 ath5k.h 　
11992
 AR5K_RSSI_EP_MULTIPLIERAR5K_RSSI_EP_MULTIPLIER (1<<7) ath5k.h 　
11993
 AR5K_SOFTLED_PINAR5K_SOFTLED_PIN 0 ath5k.h 　
11994
 AR5K_SOFTLED_ONAR5K_SOFTLED_ON 0 ath5k.h 　
11995
 AR5K_SOFTLED_OFFAR5K_SOFTLED_OFF 1 ath5k.h 　
11996
 AR5K_MAX_GPIOAR5K_MAX_GPIO 10 ath5k.h 　
11997
 AR5K_MAX_RF_BANKSAR5K_MAX_RF_BANKS 8 ath5k.h 　
11998
 ATH_RXBUFATH_RXBUF 16 base.h number of RX buffers
11999
 ATH_TXBUFATH_TXBUF 16 base.h number of TX buffers
12000
 ATH_CHAN_MAXATH_CHAN_MAX (26+26+26+200+200) base.h 　
12001
 ATH_CHAN_MAXATH_CHAN_MAX (14+14+14+252+20) base.h 　
12002
 AR5K_DESC_RX_CTL0AR5K_DESC_RX_CTL0 0x00000000 desc.h 　
12003
 AR5K_DESC_RX_CTL1_BUF_LENAR5K_DESC_RX_CTL1_BUF_LEN 0x00000fff desc.h 　
12004
 AR5K_DESC_RX_CTL1_INTREQAR5K_DESC_RX_CTL1_INTREQ 0x00002000 desc.h 　
12005
 AR5K_5210_RX_DESC_STATUS0_DATA_AR5K_5210_RX_DESC_STATUS0_DATA_ 0x00000fff desc.h 　
12006
 AR5K_5210_RX_DESC_STATUS0_MOREAR5K_5210_RX_DESC_STATUS0_MORE 0x00001000 desc.h 　
12007
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 0x00078000 desc.h 　
12008
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 15 desc.h 　
12009
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 0x07f80000 desc.h 　
12010
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 19 desc.h 　
12011
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 0x38000000 desc.h 　
12012
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 27 desc.h 　
12013
 AR5K_5210_RX_DESC_STATUS1_DONEAR5K_5210_RX_DESC_STATUS1_DONE 0x00000001 desc.h 　
12014
 AR5K_5210_RX_DESC_STATUS1_FRAMEAR5K_5210_RX_DESC_STATUS1_FRAME 0x00000002 desc.h 　
12015
 AR5K_5210_RX_DESC_STATUS1_CRC_EAR5K_5210_RX_DESC_STATUS1_CRC_E 0x00000004 desc.h 　
12016
 AR5K_5210_RX_DESC_STATUS1_FIFO_AR5K_5210_RX_DESC_STATUS1_FIFO_ 0x00000008 desc.h 　
12017
 AR5K_5210_RX_DESC_STATUS1_DECRYAR5K_5210_RX_DESC_STATUS1_DECRY 0x00000010 desc.h 　
12018
 AR5K_5210_RX_DESC_STATUS1_PHY_EAR5K_5210_RX_DESC_STATUS1_PHY_E 0x000000e0 desc.h 　
12019
 AR5K_5210_RX_DESC_STATUS1_PHY_EAR5K_5210_RX_DESC_STATUS1_PHY_E 5 desc.h 　
12020
 AR5K_5210_RX_DESC_STATUS1_KEY_IAR5K_5210_RX_DESC_STATUS1_KEY_I 0x00000100 desc.h 　
12021
 AR5K_5210_RX_DESC_STATUS1_KEY_IAR5K_5210_RX_DESC_STATUS1_KEY_I 0x00007e00 desc.h 　
12022
 AR5K_5210_RX_DESC_STATUS1_KEY_IAR5K_5210_RX_DESC_STATUS1_KEY_I 9 desc.h 　
12023
 AR5K_5210_RX_DESC_STATUS1_RECEIAR5K_5210_RX_DESC_STATUS1_RECEI 0x0fff8000 desc.h 　
12024
 AR5K_5210_RX_DESC_STATUS1_RECEIAR5K_5210_RX_DESC_STATUS1_RECEI 15 desc.h 　
12025
 AR5K_5210_RX_DESC_STATUS1_KEY_CAR5K_5210_RX_DESC_STATUS1_KEY_C 0x10000000 desc.h 　
12026
 AR5K_5212_RX_DESC_STATUS0_DATA_AR5K_5212_RX_DESC_STATUS0_DATA_ 0x00000fff desc.h 　
12027
 AR5K_5212_RX_DESC_STATUS0_MOREAR5K_5212_RX_DESC_STATUS0_MORE 0x00001000 desc.h 　
12028
 AR5K_5212_RX_DESC_STATUS0_DECOMAR5K_5212_RX_DESC_STATUS0_DECOM 0x00002000 desc.h 　
12029
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 0x000f8000 desc.h 　
12030
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 15 desc.h 　
12031
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 0x0ff00000 desc.h 　
12032
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 20 desc.h 　
12033
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 0xf0000000 desc.h 　
12034
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 28 desc.h 　
12035
 AR5K_5212_RX_DESC_STATUS1_DONEAR5K_5212_RX_DESC_STATUS1_DONE 0x00000001 desc.h 　
12036
 AR5K_5212_RX_DESC_STATUS1_FRAMEAR5K_5212_RX_DESC_STATUS1_FRAME 0x00000002 desc.h 　
12037
 AR5K_5212_RX_DESC_STATUS1_CRC_EAR5K_5212_RX_DESC_STATUS1_CRC_E 0x00000004 desc.h 　
12038
 AR5K_5212_RX_DESC_STATUS1_DECRYAR5K_5212_RX_DESC_STATUS1_DECRY 0x00000008 desc.h 　
12039
 AR5K_5212_RX_DESC_STATUS1_PHY_EAR5K_5212_RX_DESC_STATUS1_PHY_E 0x00000010 desc.h 　
12040
 AR5K_5212_RX_DESC_STATUS1_MIC_EAR5K_5212_RX_DESC_STATUS1_MIC_E 0x00000020 desc.h 　
12041
 AR5K_5212_RX_DESC_STATUS1_KEY_IAR5K_5212_RX_DESC_STATUS1_KEY_I 0x00000100 desc.h 　
12042
 AR5K_5212_RX_DESC_STATUS1_KEY_IAR5K_5212_RX_DESC_STATUS1_KEY_I 0x0000fe00 desc.h 　
12043
 AR5K_5212_RX_DESC_STATUS1_KEY_IAR5K_5212_RX_DESC_STATUS1_KEY_I 9 desc.h 　
12044
 AR5K_5212_RX_DESC_STATUS1_RECEIAR5K_5212_RX_DESC_STATUS1_RECEI 0x7fff0000 desc.h 　
12045
 AR5K_5212_RX_DESC_STATUS1_RECEIAR5K_5212_RX_DESC_STATUS1_RECEI 16 desc.h 　
12046
 AR5K_5212_RX_DESC_STATUS1_KEY_CAR5K_5212_RX_DESC_STATUS1_KEY_C 0x80000000 desc.h 　
12047
 AR5K_RX_DESC_ERROR0AR5K_RX_DESC_ERROR0 0x00000000 desc.h 　
12048
 AR5K_RX_DESC_ERROR1_PHY_ERROR_CAR5K_RX_DESC_ERROR1_PHY_ERROR_C 0x0000ff00 desc.h 　
12049
 AR5K_RX_DESC_ERROR1_PHY_ERROR_CAR5K_RX_DESC_ERROR1_PHY_ERROR_C 8 desc.h 　
12050
 AR5K_DESC_RX_PHY_ERROR_NONEAR5K_DESC_RX_PHY_ERROR_NONE 0x00 desc.h 　
12051
 AR5K_DESC_RX_PHY_ERROR_TIMINGAR5K_DESC_RX_PHY_ERROR_TIMING 0x20 desc.h 　
12052
 AR5K_DESC_RX_PHY_ERROR_PARITYAR5K_DESC_RX_PHY_ERROR_PARITY 0x40 desc.h 　
12053
 AR5K_DESC_RX_PHY_ERROR_RATEAR5K_DESC_RX_PHY_ERROR_RATE 0x60 desc.h 　
12054
 AR5K_DESC_RX_PHY_ERROR_LENGTHAR5K_DESC_RX_PHY_ERROR_LENGTH 0x80 desc.h 　
12055
 AR5K_DESC_RX_PHY_ERROR_64QAMAR5K_DESC_RX_PHY_ERROR_64QAM 0xa0 desc.h 　
12056
 AR5K_DESC_RX_PHY_ERROR_SERVICEAR5K_DESC_RX_PHY_ERROR_SERVICE 0xc0 desc.h 　
12057
 AR5K_DESC_RX_PHY_ERROR_TRANSMITAR5K_DESC_RX_PHY_ERROR_TRANSMIT 0xe0 desc.h 　
12058
 AR5K_2W_TX_DESC_CTL0_FRAME_LENAR5K_2W_TX_DESC_CTL0_FRAME_LEN 0x00000fff desc.h 　
12059
 AR5K_2W_TX_DESC_CTL0_HEADER_LENAR5K_2W_TX_DESC_CTL0_HEADER_LEN 0x0003f000 desc.h [5210 ?]
12060
 AR5K_2W_TX_DESC_CTL0_HEADER_LENAR5K_2W_TX_DESC_CTL0_HEADER_LEN 12 desc.h 　
12061
 AR5K_2W_TX_DESC_CTL0_XMIT_RATEAR5K_2W_TX_DESC_CTL0_XMIT_RATE 0x003c0000 desc.h 　
12062
 AR5K_2W_TX_DESC_CTL0_XMIT_RATE_AR5K_2W_TX_DESC_CTL0_XMIT_RATE_ 18 desc.h 　
12063
 AR5K_2W_TX_DESC_CTL0_RTSENAAR5K_2W_TX_DESC_CTL0_RTSENA 0x00400000 desc.h 　
12064
 AR5K_2W_TX_DESC_CTL0_CLRDMASKAR5K_2W_TX_DESC_CTL0_CLRDMASK 0x01000000 desc.h 　
12065
 AR5K_2W_TX_DESC_CTL0_LONG_PACKEAR5K_2W_TX_DESC_CTL0_LONG_PACKE 0x00800000 desc.h [5210]
12066
 AR5K_2W_TX_DESC_CTL0_VEOLAR5K_2W_TX_DESC_CTL0_VEOL 0x00800000 desc.h [5211]
12067
 AR5K_2W_TX_DESC_CTL0_FRAME_TYPEAR5K_2W_TX_DESC_CTL0_FRAME_TYPE 0x1c000000 desc.h [5210]
12068
 AR5K_2W_TX_DESC_CTL0_FRAME_TYPEAR5K_2W_TX_DESC_CTL0_FRAME_TYPE 26 desc.h 　
12069
 AR5K_2W_TX_DESC_CTL0_ANT_MODE_XAR5K_2W_TX_DESC_CTL0_ANT_MODE_X 0x02000000 desc.h 　
12070
 AR5K_2W_TX_DESC_CTL0_ANT_MODE_XAR5K_2W_TX_DESC_CTL0_ANT_MODE_X 0x1e000000 desc.h 　
12071
 AR5K_2W_TX_DESC_CTL0_ANT_MODE_XAR5K_2W_TX_DESC_CTL0_ANT_MODE_X (ah->ah_version == AR5K_AR5210 ? \ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5210 : \ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5211) desc.h 　
12072
 AR5K_2W_TX_DESC_CTL0_ANT_MODE_XAR5K_2W_TX_DESC_CTL0_ANT_MODE_X 25 desc.h 　
12073
 AR5K_2W_TX_DESC_CTL0_INTREQAR5K_2W_TX_DESC_CTL0_INTREQ 0x20000000 desc.h 　
12074
 AR5K_2W_TX_DESC_CTL0_ENCRYPT_KEAR5K_2W_TX_DESC_CTL0_ENCRYPT_KE 0x40000000 desc.h 　
12075
 AR5K_2W_TX_DESC_CTL1_BUF_LENAR5K_2W_TX_DESC_CTL1_BUF_LEN 0x00000fff desc.h 　
12076
 AR5K_2W_TX_DESC_CTL1_MOREAR5K_2W_TX_DESC_CTL1_MORE 0x00001000 desc.h 　
12077
 AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE 0x0007e000 desc.h 　
12078
 AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE 0x000fe000 desc.h 　
12079
 AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE (ah->ah_version == AR5K_AR5210 ? \ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5210 : \ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_52 desc.h 　
12080
 AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE 13 desc.h 　
12081
 AR5K_2W_TX_DESC_CTL1_FRAME_TYPEAR5K_2W_TX_DESC_CTL1_FRAME_TYPE 0x00700000 desc.h [5211]
12082
 AR5K_2W_TX_DESC_CTL1_FRAME_TYPEAR5K_2W_TX_DESC_CTL1_FRAME_TYPE 20 desc.h 　
12083
 AR5K_2W_TX_DESC_CTL1_NOACKAR5K_2W_TX_DESC_CTL1_NOACK 0x00800000 desc.h [5211]
12084
 AR5K_2W_TX_DESC_CTL1_RTS_DURATIAR5K_2W_TX_DESC_CTL1_RTS_DURATI 0xfff80000 desc.h [5210 ?]
12085
 AR5K_AR5210_TX_DESC_FRAME_TYPE_AR5K_AR5210_TX_DESC_FRAME_TYPE_ 0x00 desc.h 　
12086
 AR5K_AR5210_TX_DESC_FRAME_TYPE_AR5K_AR5210_TX_DESC_FRAME_TYPE_ 0x04 desc.h 　
12087
 AR5K_AR5210_TX_DESC_FRAME_TYPE_AR5K_AR5210_TX_DESC_FRAME_TYPE_ 0x08 desc.h 　
12088
 AR5K_AR5210_TX_DESC_FRAME_TYPE_AR5K_AR5210_TX_DESC_FRAME_TYPE_ 0x0c desc.h 　
12089
 AR5K_AR5210_TX_DESC_FRAME_TYPE_AR5K_AR5210_TX_DESC_FRAME_TYPE_ 0x10 desc.h 　
12090
 AR5K_DESC_TX_STATUS0_FRAME_XMITAR5K_DESC_TX_STATUS0_FRAME_XMIT 0x00000001 desc.h 　
12091
 AR5K_DESC_TX_STATUS0_EXCESSIVE_AR5K_DESC_TX_STATUS0_EXCESSIVE_ 0x00000002 desc.h 　
12092
 AR5K_DESC_TX_STATUS0_FIFO_UNDERAR5K_DESC_TX_STATUS0_FIFO_UNDER 0x00000004 desc.h 　
12093
 AR5K_DESC_TX_STATUS0_FILTEREDAR5K_DESC_TX_STATUS0_FILTERED 0x00000008 desc.h 　
12094
 AR5K_DESC_TX_STATUS0_SHORT_RETRAR5K_DESC_TX_STATUS0_SHORT_RETR 0x000000f0 desc.h 　
12095
 AR5K_DESC_TX_STATUS0_SHORT_RETRAR5K_DESC_TX_STATUS0_SHORT_RETR 4 desc.h 　
12096
 AR5K_DESC_TX_STATUS0_LONG_RETRYAR5K_DESC_TX_STATUS0_LONG_RETRY 0x00000f00 desc.h 　
12097
 AR5K_DESC_TX_STATUS0_LONG_RETRYAR5K_DESC_TX_STATUS0_LONG_RETRY 8 desc.h 　
12098
 AR5K_DESC_TX_STATUS0_VIRT_COLL_AR5K_DESC_TX_STATUS0_VIRT_COLL_ 0x0000f000 desc.h 　
12099
 AR5K_DESC_TX_STATUS0_VIRT_COLL_AR5K_DESC_TX_STATUS0_VIRT_COLL_ 12 desc.h 　
12100
 AR5K_DESC_TX_STATUS0_SEND_TIMESAR5K_DESC_TX_STATUS0_SEND_TIMES 0xffff0000 desc.h 　
12101
 AR5K_DESC_TX_STATUS0_SEND_TIMESAR5K_DESC_TX_STATUS0_SEND_TIMES 16 desc.h 　
12102
 AR5K_DESC_TX_STATUS1_DONEAR5K_DESC_TX_STATUS1_DONE 0x00000001 desc.h 　
12103
 AR5K_DESC_TX_STATUS1_SEQ_NUMAR5K_DESC_TX_STATUS1_SEQ_NUM 0x00001ffe desc.h 　
12104
 AR5K_DESC_TX_STATUS1_SEQ_NUM_SAR5K_DESC_TX_STATUS1_SEQ_NUM_S 1 desc.h 　
12105
 AR5K_DESC_TX_STATUS1_ACK_SIG_STAR5K_DESC_TX_STATUS1_ACK_SIG_ST 0x001fe000 desc.h 　
12106
 AR5K_DESC_TX_STATUS1_ACK_SIG_STAR5K_DESC_TX_STATUS1_ACK_SIG_ST 13 desc.h 　
12107
 AR5K_DESC_TX_STATUS1_FINAL_TS_IAR5K_DESC_TX_STATUS1_FINAL_TS_I 0x00600000 desc.h 　
12108
 AR5K_DESC_TX_STATUS1_FINAL_TS_IAR5K_DESC_TX_STATUS1_FINAL_TS_I 21 desc.h 　
12109
 AR5K_DESC_TX_STATUS1_COMP_SUCCEAR5K_DESC_TX_STATUS1_COMP_SUCCE 0x00800000 desc.h 　
12110
 AR5K_DESC_TX_STATUS1_XMIT_ANTENAR5K_DESC_TX_STATUS1_XMIT_ANTEN 0x01000000 desc.h 　
12111
 AR5K_RXDESC_INTREQAR5K_RXDESC_INTREQ 0x0020 desc.h 　
12112
 AR5K_TXDESC_CLRDMASKAR5K_TXDESC_CLRDMASK 0x0001 desc.h 　
12113
 AR5K_TXDESC_NOACKAR5K_TXDESC_NOACK 0x0002 desc.h [5211+]
12114
 AR5K_TXDESC_RTSENAAR5K_TXDESC_RTSENA 0x0004 desc.h 　
12115
 AR5K_TXDESC_CTSENAAR5K_TXDESC_CTSENA 0x0008 desc.h 　
12116
 AR5K_TXDESC_INTREQAR5K_TXDESC_INTREQ 0x0010 desc.h 　
12117
 AR5K_TXDESC_VEOLAR5K_TXDESC_VEOL 0x0020 desc.h [5211+]
12118
 AR5K_EEPROM_MAGICAR5K_EEPROM_MAGIC 0x003d eeprom.h EEPROM Magic number
12119
 AR5K_EEPROM_MAGIC_VALUEAR5K_EEPROM_MAGIC_VALUE 0x5aa5 eeprom.h Default - found on EEPROM
12120
 AR5K_EEPROM_MAGIC_5212AR5K_EEPROM_MAGIC_5212 0x0000145c eeprom.h 5212
12121
 AR5K_EEPROM_MAGIC_5211AR5K_EEPROM_MAGIC_5211 0x0000145b eeprom.h 5211
12122
 AR5K_EEPROM_MAGIC_5210AR5K_EEPROM_MAGIC_5210 0x0000145a eeprom.h 5210
12123
 AR5K_EEPROM_IS_HB63AR5K_EEPROM_IS_HB63 0x000b eeprom.h Talon detect
12124
 AR5K_EEPROM_RFKILLAR5K_EEPROM_RFKILL 0x0f eeprom.h 　
12125
 AR5K_EEPROM_RFKILL_GPIO_SELAR5K_EEPROM_RFKILL_GPIO_SEL 0x0000001c eeprom.h 　
12126
 AR5K_EEPROM_RFKILL_GPIO_SEL_SAR5K_EEPROM_RFKILL_GPIO_SEL_S 2 eeprom.h 　
12127
 AR5K_EEPROM_RFKILL_POLARITYAR5K_EEPROM_RFKILL_POLARITY 0x00000002 eeprom.h 　
12128
 AR5K_EEPROM_RFKILL_POLARITY_SAR5K_EEPROM_RFKILL_POLARITY_S 1 eeprom.h 　
12129
 AR5K_EEPROM_REG_DOMAINAR5K_EEPROM_REG_DOMAIN 0x00bf eeprom.h EEPROM regdom
12130
 AR5K_EEPROM_CHECKSUMAR5K_EEPROM_CHECKSUM 0x00c0 eeprom.h EEPROM checksum
12131
 AR5K_EEPROM_INFO_BASEAR5K_EEPROM_INFO_BASE 0x00c0 eeprom.h EEPROM header
12132
 AR5K_EEPROM_INFO_MAXAR5K_EEPROM_INFO_MAX (0x400 - AR5K_EEPROM_INFO_BASE) eeprom.h 　
12133
 AR5K_EEPROM_INFO_CKSUMAR5K_EEPROM_INFO_CKSUM 0xffff eeprom.h 　
12134
 AR5K_EEPROM_VERSIONAR5K_EEPROM_VERSION AR5K_EEPROM_INFO(1) eeprom.h EEPROM Version
12135
 AR5K_EEPROM_VERSION_3_0AR5K_EEPROM_VERSION_3_0 0x3000 eeprom.h No idea what's going on before this version
12136
 AR5K_EEPROM_VERSION_3_1AR5K_EEPROM_VERSION_3_1 0x3001 eeprom.h ob/db values for 2Ghz (ar5211_rfregs)
12137
 AR5K_EEPROM_VERSION_3_2AR5K_EEPROM_VERSION_3_2 0x3002 eeprom.h different frequency representation (eeprom_bin2freq)
12138
 AR5K_EEPROM_VERSION_3_3AR5K_EEPROM_VERSION_3_3 0x3003 eeprom.h offsets changed, has 32 CTLs (see below) and ee_false_detect (eeprom_read_modes)
12139
 AR5K_EEPROM_VERSION_3_4AR5K_EEPROM_VERSION_3_4 0x3004 eeprom.h has ee_i_gain, ee_cck_ofdm_power_delta (eeprom_read_modes)
12140
 AR5K_EEPROM_VERSION_4_0AR5K_EEPROM_VERSION_4_0 0x4000 eeprom.h has ee_misc, ee_cal_pier, ee_turbo_max_power and ee_xr_power (eeprom_init)
12141
 AR5K_EEPROM_VERSION_4_1AR5K_EEPROM_VERSION_4_1 0x4001 eeprom.h has ee_margin_tx_rx (eeprom_init)
12142
 AR5K_EEPROM_VERSION_4_2AR5K_EEPROM_VERSION_4_2 0x4002 eeprom.h has ee_cck_ofdm_gain_delta (eeprom_init)
12143
 AR5K_EEPROM_VERSION_4_3AR5K_EEPROM_VERSION_4_3 0x4003 eeprom.h power calibration changes
12144
 AR5K_EEPROM_VERSION_4_4AR5K_EEPROM_VERSION_4_4 0x4004 eeprom.h 　
12145
 AR5K_EEPROM_VERSION_4_5AR5K_EEPROM_VERSION_4_5 0x4005 eeprom.h 　
12146
 AR5K_EEPROM_VERSION_4_6AR5K_EEPROM_VERSION_4_6 0x4006 eeprom.h has ee_scaled_cck_delta
12147
 AR5K_EEPROM_VERSION_4_7AR5K_EEPROM_VERSION_4_7 0x3007 eeprom.h 4007 ?
12148
 AR5K_EEPROM_VERSION_4_9AR5K_EEPROM_VERSION_4_9 0x4009 eeprom.h EAR futureproofing
12149
 AR5K_EEPROM_VERSION_5_0AR5K_EEPROM_VERSION_5_0 0x5000 eeprom.h Has 2413 PDADC calibration etc
12150
 AR5K_EEPROM_VERSION_5_1AR5K_EEPROM_VERSION_5_1 0x5001 eeprom.h Has capability values
12151
 AR5K_EEPROM_VERSION_5_3AR5K_EEPROM_VERSION_5_3 0x5003 eeprom.h Has spur mitigation tables
12152
 AR5K_EEPROM_MODE_11AAR5K_EEPROM_MODE_11A 0 eeprom.h 　
12153
 AR5K_EEPROM_MODE_11BAR5K_EEPROM_MODE_11B 1 eeprom.h 　
12154
 AR5K_EEPROM_MODE_11GAR5K_EEPROM_MODE_11G 2 eeprom.h 　
12155
 AR5K_EEPROM_HDRAR5K_EEPROM_HDR AR5K_EEPROM_INFO(2) eeprom.h Header that contains the device caps
12156
 AR5K_EEPROM_RFKILL_GPIO_SELAR5K_EEPROM_RFKILL_GPIO_SEL 0x0000001c eeprom.h 　
12157
 AR5K_EEPROM_RFKILL_GPIO_SEL_SAR5K_EEPROM_RFKILL_GPIO_SEL_S 2 eeprom.h 　
12158
 AR5K_EEPROM_RFKILL_POLARITYAR5K_EEPROM_RFKILL_POLARITY 0x00000002 eeprom.h 　
12159
 AR5K_EEPROM_RFKILL_POLARITY_SAR5K_EEPROM_RFKILL_POLARITY_S 1 eeprom.h 　
12160
 AR5K_EEPROM_MISC0AR5K_EEPROM_MISC0 AR5K_EEPROM_INFO(4) eeprom.h 　
12161
 AR5K_EEPROM_MISC1AR5K_EEPROM_MISC1 AR5K_EEPROM_INFO(5) eeprom.h 　
12162
 AR5K_EEPROM_MISC2AR5K_EEPROM_MISC2 AR5K_EEPROM_INFO(6) eeprom.h 　
12163
 AR5K_EEPROM_MISC3AR5K_EEPROM_MISC3 AR5K_EEPROM_INFO(7) eeprom.h 　
12164
 AR5K_EEPROM_MISC4AR5K_EEPROM_MISC4 AR5K_EEPROM_INFO(8) eeprom.h 　
12165
 AR5K_EEPROM_MISC5AR5K_EEPROM_MISC5 AR5K_EEPROM_INFO(9) eeprom.h 　
12166
 AR5K_EEPROM_MISC6AR5K_EEPROM_MISC6 AR5K_EEPROM_INFO(10) eeprom.h 　
12167
 AR5K_EEPROM_TX_CHAIN_DISAR5K_EEPROM_TX_CHAIN_DIS ((_v) & 0x8) eeprom.h 　
12168
 AR5K_EEPROM_RX_CHAIN_DISAR5K_EEPROM_RX_CHAIN_DIS (((_v) >> 3) & 0x8) eeprom.h 　
12169
 AR5K_EEPROM_FCC_MID_ENAR5K_EEPROM_FCC_MID_EN (((_v) >> 6) & 0x1) eeprom.h 　
12170
 AR5K_EEPROM_JAP_U1EVEN_ENAR5K_EEPROM_JAP_U1EVEN_EN (((_v) >> 7) & 0x1) eeprom.h 　
12171
 AR5K_EEPROM_JAP_U2_ENAR5K_EEPROM_JAP_U2_EN (((_v) >> 8) & 0x1) eeprom.h 　
12172
 AR5K_EEPROM_JAP_U1ODD_ENAR5K_EEPROM_JAP_U1ODD_EN (((_v) >> 9) & 0x1) eeprom.h 　
12173
 AR5K_EEPROM_JAP_11A_NEW_ENAR5K_EEPROM_JAP_11A_NEW_EN (((_v) >> 10) & 0x1) eeprom.h 　
12174
 AR5K_EEPROM_GROUP1_OFFSETAR5K_EEPROM_GROUP1_OFFSET 0x0 eeprom.h 　
12175
 AR5K_EEPROM_GROUP2_OFFSETAR5K_EEPROM_GROUP2_OFFSET 0x5 eeprom.h 　
12176
 AR5K_EEPROM_GROUP3_OFFSETAR5K_EEPROM_GROUP3_OFFSET 0x37 eeprom.h 　
12177
 AR5K_EEPROM_GROUP4_OFFSETAR5K_EEPROM_GROUP4_OFFSET 0x46 eeprom.h 　
12178
 AR5K_EEPROM_GROUP5_OFFSETAR5K_EEPROM_GROUP5_OFFSET 0x55 eeprom.h 　
12179
 AR5K_EEPROM_GROUP6_OFFSETAR5K_EEPROM_GROUP6_OFFSET 0x65 eeprom.h 　
12180
 AR5K_EEPROM_GROUP7_OFFSETAR5K_EEPROM_GROUP7_OFFSET 0x69 eeprom.h 　
12181
 AR5K_EEPROM_GROUP8_OFFSETAR5K_EEPROM_GROUP8_OFFSET 0x6f eeprom.h 　
12182
 AR5K_EEPROM_OBDB0_2GHZAR5K_EEPROM_OBDB0_2GHZ 0x00ec eeprom.h 　
12183
 AR5K_EEPROM_OBDB1_2GHZAR5K_EEPROM_OBDB1_2GHZ 0x00ed eeprom.h 　
12184
 AR5K_EEPROM_PROTECTAR5K_EEPROM_PROTECT 0x003f eeprom.h EEPROM protect status
12185
 AR5K_EEPROM_PROTECT_RD_0_31AR5K_EEPROM_PROTECT_RD_0_31 0x0001 eeprom.h Read protection bit for offsets 0x0 - 0x1f
12186
 AR5K_EEPROM_PROTECT_WR_0_31AR5K_EEPROM_PROTECT_WR_0_31 0x0002 eeprom.h Write protection bit for offsets 0x0 - 0x1f
12187
 AR5K_EEPROM_PROTECT_RD_32_63AR5K_EEPROM_PROTECT_RD_32_63 0x0004 eeprom.h 0x20 - 0x3f
12188
 AR5K_EEPROM_PROTECT_WR_32_63AR5K_EEPROM_PROTECT_WR_32_63 0x0008 eeprom.h 　
12189
 AR5K_EEPROM_PROTECT_RD_64_127AR5K_EEPROM_PROTECT_RD_64_127 0x0010 eeprom.h 0x40 - 0x7f
12190
 AR5K_EEPROM_PROTECT_WR_64_127AR5K_EEPROM_PROTECT_WR_64_127 0x0020 eeprom.h 　
12191
 AR5K_EEPROM_PROTECT_RD_128_191AR5K_EEPROM_PROTECT_RD_128_191 0x0040 eeprom.h 0x80 - 0xbf (regdom)
12192
 AR5K_EEPROM_PROTECT_WR_128_191AR5K_EEPROM_PROTECT_WR_128_191 0x0080 eeprom.h 　
12193
 AR5K_EEPROM_PROTECT_RD_192_207AR5K_EEPROM_PROTECT_RD_192_207 0x0100 eeprom.h 0xc0 - 0xcf
12194
 AR5K_EEPROM_PROTECT_WR_192_207AR5K_EEPROM_PROTECT_WR_192_207 0x0200 eeprom.h 　
12195
 AR5K_EEPROM_PROTECT_RD_208_223AR5K_EEPROM_PROTECT_RD_208_223 0x0400 eeprom.h 0xd0 - 0xdf
12196
 AR5K_EEPROM_PROTECT_WR_208_223AR5K_EEPROM_PROTECT_WR_208_223 0x0800 eeprom.h 　
12197
 AR5K_EEPROM_PROTECT_RD_224_239AR5K_EEPROM_PROTECT_RD_224_239 0x1000 eeprom.h 0xe0 - 0xef
12198
 AR5K_EEPROM_PROTECT_WR_224_239AR5K_EEPROM_PROTECT_WR_224_239 0x2000 eeprom.h 　
12199
 AR5K_EEPROM_PROTECT_RD_240_255AR5K_EEPROM_PROTECT_RD_240_255 0x4000 eeprom.h 0xf0 - 0xff
12200
 AR5K_EEPROM_PROTECT_WR_240_255AR5K_EEPROM_PROTECT_WR_240_255 0x8000 eeprom.h 　
12201
 AR5K_EEPROM_EEP_SCALEAR5K_EEPROM_EEP_SCALE 100 eeprom.h 　
12202
 AR5K_EEPROM_EEP_DELTAAR5K_EEPROM_EEP_DELTA 10 eeprom.h 　
12203
 AR5K_EEPROM_N_MODESAR5K_EEPROM_N_MODES 3 eeprom.h 　
12204
 AR5K_EEPROM_N_5GHZ_CHANAR5K_EEPROM_N_5GHZ_CHAN 10 eeprom.h 　
12205
 AR5K_EEPROM_N_2GHZ_CHANAR5K_EEPROM_N_2GHZ_CHAN 3 eeprom.h 　
12206
 AR5K_EEPROM_N_2GHZ_CHAN_2413AR5K_EEPROM_N_2GHZ_CHAN_2413 4 eeprom.h 　
12207
 AR5K_EEPROM_N_2GHZ_CHAN_MAXAR5K_EEPROM_N_2GHZ_CHAN_MAX 4 eeprom.h 　
12208
 AR5K_EEPROM_MAX_CHANAR5K_EEPROM_MAX_CHAN 10 eeprom.h 　
12209
 AR5K_EEPROM_N_PWR_POINTS_5111AR5K_EEPROM_N_PWR_POINTS_5111 11 eeprom.h 　
12210
 AR5K_EEPROM_N_PCDACAR5K_EEPROM_N_PCDAC 11 eeprom.h 　
12211
 AR5K_EEPROM_N_PHASE_CALAR5K_EEPROM_N_PHASE_CAL 5 eeprom.h 　
12212
 AR5K_EEPROM_N_TEST_FREQAR5K_EEPROM_N_TEST_FREQ 8 eeprom.h 　
12213
 AR5K_EEPROM_N_EDGESAR5K_EEPROM_N_EDGES 8 eeprom.h 　
12214
 AR5K_EEPROM_N_INTERCEPTSAR5K_EEPROM_N_INTERCEPTS 11 eeprom.h 　
12215
 AR5K_EEPROM_PCDAC_MAR5K_EEPROM_PCDAC_M 0x3f eeprom.h 　
12216
 AR5K_EEPROM_PCDAC_STARTAR5K_EEPROM_PCDAC_START 1 eeprom.h 　
12217
 AR5K_EEPROM_PCDAC_STOPAR5K_EEPROM_PCDAC_STOP 63 eeprom.h 　
12218
 AR5K_EEPROM_PCDAC_STEPAR5K_EEPROM_PCDAC_STEP 1 eeprom.h 　
12219
 AR5K_EEPROM_NON_EDGE_MAR5K_EEPROM_NON_EDGE_M 0x40 eeprom.h 　
12220
 AR5K_EEPROM_CHANNEL_POWERAR5K_EEPROM_CHANNEL_POWER 8 eeprom.h 　
12221
 AR5K_EEPROM_N_OBDBAR5K_EEPROM_N_OBDB 4 eeprom.h 　
12222
 AR5K_EEPROM_OBDB_DISAR5K_EEPROM_OBDB_DIS 0xffff eeprom.h 　
12223
 AR5K_EEPROM_CHANNEL_DISAR5K_EEPROM_CHANNEL_DIS 0xff eeprom.h 　
12224
 AR5K_EEPROM_MAX_CTLSAR5K_EEPROM_MAX_CTLS 32 eeprom.h 　
12225
 AR5K_EEPROM_N_PD_CURVESAR5K_EEPROM_N_PD_CURVES 4 eeprom.h 　
12226
 AR5K_EEPROM_N_XPD0_POINTSAR5K_EEPROM_N_XPD0_POINTS 4 eeprom.h 　
12227
 AR5K_EEPROM_N_XPD3_POINTSAR5K_EEPROM_N_XPD3_POINTS 3 eeprom.h 　
12228
 AR5K_EEPROM_N_PD_GAINSAR5K_EEPROM_N_PD_GAINS 4 eeprom.h 　
12229
 AR5K_EEPROM_N_PD_POINTSAR5K_EEPROM_N_PD_POINTS 5 eeprom.h 　
12230
 AR5K_EEPROM_N_INTERCEPT_10_2GHZAR5K_EEPROM_N_INTERCEPT_10_2GHZ 35 eeprom.h 　
12231
 AR5K_EEPROM_N_INTERCEPT_10_5GHZAR5K_EEPROM_N_INTERCEPT_10_5GHZ 55 eeprom.h 　
12232
 AR5K_EEPROM_POWER_MAR5K_EEPROM_POWER_M 0x3f eeprom.h 　
12233
 AR5K_EEPROM_POWER_MINAR5K_EEPROM_POWER_MIN 0 eeprom.h 　
12234
 AR5K_EEPROM_POWER_MAXAR5K_EEPROM_POWER_MAX 3150 eeprom.h 　
12235
 AR5K_EEPROM_POWER_STEPAR5K_EEPROM_POWER_STEP 50 eeprom.h 　
12236
 AR5K_EEPROM_POWER_TABLE_SIZEAR5K_EEPROM_POWER_TABLE_SIZE 64 eeprom.h 　
12237
 AR5K_EEPROM_N_POWER_LOC_11BAR5K_EEPROM_N_POWER_LOC_11B 4 eeprom.h 　
12238
 AR5K_EEPROM_N_POWER_LOC_11GAR5K_EEPROM_N_POWER_LOC_11G 6 eeprom.h 　
12239
 AR5K_EEPROM_I_GAINAR5K_EEPROM_I_GAIN 10 eeprom.h 　
12240
 AR5K_EEPROM_CCK_OFDM_DELTAAR5K_EEPROM_CCK_OFDM_DELTA 15 eeprom.h 　
12241
 AR5K_EEPROM_N_IQ_CALAR5K_EEPROM_N_IQ_CAL 2 eeprom.h 　
12242
 AR5K_CTL_FCCAR5K_CTL_FCC 0x10 eeprom.h 　
12243
 AR5K_CTL_CUSTOMAR5K_CTL_CUSTOM 0x20 eeprom.h 　
12244
 AR5K_CTL_ETSIAR5K_CTL_ETSI 0x30 eeprom.h 　
12245
 AR5K_CTL_MKKAR5K_CTL_MKK 0x40 eeprom.h 　
12246
 AR5K_CTL_NO_REGDOMAINAR5K_CTL_NO_REGDOMAIN 0xf0 eeprom.h 　
12247
 AR5K_CTL_NO_CTLAR5K_CTL_NO_CTL 0xff eeprom.h 　
12248
 AR5K_NOQCU_TXDP0AR5K_NOQCU_TXDP0 0x0000 reg.h Queue 0 - data
12249
 AR5K_NOQCU_TXDP1AR5K_NOQCU_TXDP1 0x0004 reg.h Queue 1 - beacons
12250
 AR5K_CRAR5K_CR 0x0008 reg.h Register Address
12251
 AR5K_CR_TXE0AR5K_CR_TXE0 0x00000001 reg.h TX Enable for queue 0 on 5210
12252
 AR5K_CR_TXE1AR5K_CR_TXE1 0x00000002 reg.h TX Enable for queue 1 on 5210
12253
 AR5K_CR_RXEAR5K_CR_RXE 0x00000004 reg.h RX Enable
12254
 AR5K_CR_TXD0AR5K_CR_TXD0 0x00000008 reg.h TX Disable for queue 0 on 5210
12255
 AR5K_CR_TXD1AR5K_CR_TXD1 0x00000010 reg.h TX Disable for queue 1 on 5210
12256
 AR5K_CR_RXDAR5K_CR_RXD 0x00000020 reg.h RX Disable
12257
 AR5K_CR_SWIAR5K_CR_SWI 0x00000040 reg.h Software Interrupt
12258
 AR5K_RXDPAR5K_RXDP 0x000c reg.h 　
12259
 AR5K_CFGAR5K_CFG 0x0014 reg.h Register Address
12260
 AR5K_CFG_SWTDAR5K_CFG_SWTD 0x00000001 reg.h Byte-swap TX descriptor (for big endian archs)
12261
 AR5K_CFG_SWTBAR5K_CFG_SWTB 0x00000002 reg.h Byte-swap TX buffer
12262
 AR5K_CFG_SWRDAR5K_CFG_SWRD 0x00000004 reg.h Byte-swap RX descriptor
12263
 AR5K_CFG_SWRBAR5K_CFG_SWRB 0x00000008 reg.h Byte-swap RX buffer
12264
 AR5K_CFG_SWRGAR5K_CFG_SWRG 0x00000010 reg.h Byte-swap Register access
12265
 AR5K_CFG_IBSSAR5K_CFG_IBSS 0x00000020 reg.h 0-BSS, 1-IBSS [5211+]
12266
 AR5K_CFG_PHY_OKAR5K_CFG_PHY_OK 0x00000100 reg.h [5211+]
12267
 AR5K_CFG_EEBSAR5K_CFG_EEBS 0x00000200 reg.h EEPROM is busy
12268
 AR5K_CFG_CLKGDAR5K_CFG_CLKGD 0x00000400 reg.h Clock gated (Disable dynamic clock)
12269
 AR5K_CFG_TXCNTAR5K_CFG_TXCNT 0x00007800 reg.h Tx frame count (?) [5210]
12270
 AR5K_CFG_TXCNT_SAR5K_CFG_TXCNT_S 11 reg.h 　
12271
 AR5K_CFG_TXFSTATAR5K_CFG_TXFSTAT 0x00008000 reg.h Tx frame status (?) [5210]
12272
 AR5K_CFG_TXFSTRTAR5K_CFG_TXFSTRT 0x00010000 reg.h [5210]
12273
 AR5K_CFG_PCI_THRESAR5K_CFG_PCI_THRES 0x00060000 reg.h PCI Master req q threshold [5211+]
12274
 AR5K_CFG_PCI_THRES_SAR5K_CFG_PCI_THRES_S 17 reg.h 　
12275
 AR5K_IERAR5K_IER 0x0024 reg.h Register Address
12276
 AR5K_IER_DISABLEAR5K_IER_DISABLE 0x00000000 reg.h Disable card interrupts
12277
 AR5K_IER_ENABLEAR5K_IER_ENABLE 0x00000001 reg.h Enable card interrupts
12278
 AR5K_BCRAR5K_BCR 0x0028 reg.h Register Address
12279
 AR5K_BCR_APAR5K_BCR_AP 0x00000000 reg.h AP mode
12280
 AR5K_BCR_ADHOCAR5K_BCR_ADHOC 0x00000001 reg.h Ad-Hoc mode
12281
 AR5K_BCR_BDMAEAR5K_BCR_BDMAE 0x00000002 reg.h DMA enable
12282
 AR5K_BCR_TQ1FVAR5K_BCR_TQ1FV 0x00000004 reg.h Use Queue1 for CAB traffic
12283
 AR5K_BCR_TQ1VAR5K_BCR_TQ1V 0x00000008 reg.h Use Queue1 for Beacon traffic
12284
 AR5K_BCR_BCGETAR5K_BCR_BCGET 0x00000010 reg.h 　
12285
 AR5K_RTSD0AR5K_RTSD0 0x0028 reg.h Register Address
12286
 AR5K_RTSD0_6AR5K_RTSD0_6 0x000000ff reg.h 6Mb RTS duration mask (?)
12287
 AR5K_RTSD0_6_SAR5K_RTSD0_6_S 0 reg.h 6Mb RTS duration shift (?)
12288
 AR5K_RTSD0_9AR5K_RTSD0_9 0x0000ff00 reg.h 9Mb
12289
 AR5K_RTSD0_9_SAR5K_RTSD0_9_S 8 reg.h 　
12290
 AR5K_RTSD0_12AR5K_RTSD0_12 0x00ff0000 reg.h 12Mb
12291
 AR5K_RTSD0_12_SAR5K_RTSD0_12_S 16 reg.h 　
12292
 AR5K_RTSD0_18AR5K_RTSD0_18 0xff000000 reg.h 16Mb
12293
 AR5K_RTSD0_18_SAR5K_RTSD0_18_S 24 reg.h 　
12294
 AR5K_BSRAR5K_BSR 0x002c reg.h Register Address
12295
 AR5K_BSR_BDLYSWAR5K_BSR_BDLYSW 0x00000001 reg.h SW Beacon delay (?)
12296
 AR5K_BSR_BDLYDMAAR5K_BSR_BDLYDMA 0x00000002 reg.h DMA Beacon delay (?)
12297
 AR5K_BSR_TXQ1FAR5K_BSR_TXQ1F 0x00000004 reg.h Beacon queue (1) finished
12298
 AR5K_BSR_ATIMDLYAR5K_BSR_ATIMDLY 0x00000008 reg.h ATIM delay (?)
12299
 AR5K_BSR_SNPADHOCAR5K_BSR_SNPADHOC 0x00000100 reg.h Ad-hoc mode set (?)
12300
 AR5K_BSR_SNPBDMAEAR5K_BSR_SNPBDMAE 0x00000200 reg.h Beacon DMA enabled (?)
12301
 AR5K_BSR_SNPTQ1FVAR5K_BSR_SNPTQ1FV 0x00000400 reg.h Queue1 is used for CAB traffic (?)
12302
 AR5K_BSR_SNPTQ1VAR5K_BSR_SNPTQ1V 0x00000800 reg.h Queue1 is used for Beacon traffic (?)
12303
 AR5K_BSR_SNAPSHOTSVALIDAR5K_BSR_SNAPSHOTSVALID 0x00001000 reg.h BCR snapshots are valid (?)
12304
 AR5K_BSR_SWBA_CNTAR5K_BSR_SWBA_CNT 0x00ff0000 reg.h 　
12305
 AR5K_RTSD1AR5K_RTSD1 0x002c reg.h Register Address
12306
 AR5K_RTSD1_24AR5K_RTSD1_24 0x000000ff reg.h 24Mb
12307
 AR5K_RTSD1_24_SAR5K_RTSD1_24_S 0 reg.h 　
12308
 AR5K_RTSD1_36AR5K_RTSD1_36 0x0000ff00 reg.h 36Mb
12309
 AR5K_RTSD1_36_SAR5K_RTSD1_36_S 8 reg.h 　
12310
 AR5K_RTSD1_48AR5K_RTSD1_48 0x00ff0000 reg.h 48Mb
12311
 AR5K_RTSD1_48_SAR5K_RTSD1_48_S 16 reg.h 　
12312
 AR5K_RTSD1_54AR5K_RTSD1_54 0xff000000 reg.h 54Mb
12313
 AR5K_RTSD1_54_SAR5K_RTSD1_54_S 24 reg.h 　
12314
 AR5K_TXCFGAR5K_TXCFG 0x0030 reg.h Register Address
12315
 AR5K_TXCFG_SDMAMRAR5K_TXCFG_SDMAMR 0x00000007 reg.h DMA size (read)
12316
 AR5K_TXCFG_SDMAMR_SAR5K_TXCFG_SDMAMR_S 0 reg.h 　
12317
 AR5K_TXCFG_B_MODEAR5K_TXCFG_B_MODE 0x00000008 reg.h Set b mode for 5111 (enable 2111)
12318
 AR5K_TXCFG_TXFSTPAR5K_TXCFG_TXFSTP 0x00000008 reg.h TX DMA full Stop [5210]
12319
 AR5K_TXCFG_TXFULLAR5K_TXCFG_TXFULL 0x000003f0 reg.h TX Triger level mask
12320
 AR5K_TXCFG_TXFULL_SAR5K_TXCFG_TXFULL_S 4 reg.h 　
12321
 AR5K_TXCFG_TXFULL_0BAR5K_TXCFG_TXFULL_0B 0x00000000 reg.h 　
12322
 AR5K_TXCFG_TXFULL_64BAR5K_TXCFG_TXFULL_64B 0x00000010 reg.h 　
12323
 AR5K_TXCFG_TXFULL_128BAR5K_TXCFG_TXFULL_128B 0x00000020 reg.h 　
12324
 AR5K_TXCFG_TXFULL_192BAR5K_TXCFG_TXFULL_192B 0x00000030 reg.h 　
12325
 AR5K_TXCFG_TXFULL_256BAR5K_TXCFG_TXFULL_256B 0x00000040 reg.h 　
12326
 AR5K_TXCFG_TXCONT_ENAR5K_TXCFG_TXCONT_EN 0x00000080 reg.h 　
12327
 AR5K_TXCFG_DMASIZEAR5K_TXCFG_DMASIZE 0x00000100 reg.h Flag for passing DMA size [5210]
12328
 AR5K_TXCFG_JUMBO_DESC_ENAR5K_TXCFG_JUMBO_DESC_EN 0x00000400 reg.h Enable jumbo tx descriptors [5211+]
12329
 AR5K_TXCFG_ADHOC_BCN_ATIMAR5K_TXCFG_ADHOC_BCN_ATIM 0x00000800 reg.h Adhoc Beacon ATIM Policy
12330
 AR5K_TXCFG_ATIM_WINDOW_DEF_DISAR5K_TXCFG_ATIM_WINDOW_DEF_DIS 0x00001000 reg.h Disable ATIM window defer [5211+]
12331
 AR5K_TXCFG_RTSRNDAR5K_TXCFG_RTSRND 0x00001000 reg.h [5211+]
12332
 AR5K_TXCFG_FRMPAD_DISAR5K_TXCFG_FRMPAD_DIS 0x00002000 reg.h [5211+]
12333
 AR5K_TXCFG_RDY_CBR_DISAR5K_TXCFG_RDY_CBR_DIS 0x00004000 reg.h Ready time CBR disable [5211+]
12334
 AR5K_TXCFG_JUMBO_FRM_MODEAR5K_TXCFG_JUMBO_FRM_MODE 0x00008000 reg.h Jumbo frame mode [5211+]
12335
 AR5K_TXCFG_DCU_DBL_BUF_DISAR5K_TXCFG_DCU_DBL_BUF_DIS 0x00008000 reg.h Disable double buffering on DCU
12336
 AR5K_TXCFG_DCU_CACHING_DISAR5K_TXCFG_DCU_CACHING_DIS 0x00010000 reg.h Disable DCU caching
12337
 AR5K_RXCFGAR5K_RXCFG 0x0034 reg.h Register Address
12338
 AR5K_RXCFG_SDMAMWAR5K_RXCFG_SDMAMW 0x00000007 reg.h DMA size (write)
12339
 AR5K_RXCFG_SDMAMW_SAR5K_RXCFG_SDMAMW_S 0 reg.h 　
12340
 AR5K_RXCFG_ZLFDMAAR5K_RXCFG_ZLFDMA 0x00000008 reg.h Enable Zero-length frame DMA
12341
 AR5K_RXCFG_DEF_ANTENNAAR5K_RXCFG_DEF_ANTENNA 0x00000010 reg.h Default antenna (?)
12342
 AR5K_RXCFG_JUMBO_RXEAR5K_RXCFG_JUMBO_RXE 0x00000020 reg.h Enable jumbo rx descriptors [5211+]
12343
 AR5K_RXCFG_JUMBO_WRAPAR5K_RXCFG_JUMBO_WRAP 0x00000040 reg.h Wrap jumbo frames [5211+]
12344
 AR5K_RXCFG_SLE_ENTRYAR5K_RXCFG_SLE_ENTRY 0x00000080 reg.h Sleep entry policy
12345
 AR5K_RXJLAAR5K_RXJLA 0x0038 reg.h 　
12346
 AR5K_MIBCAR5K_MIBC 0x0040 reg.h Register Address
12347
 AR5K_MIBC_COWAR5K_MIBC_COW 0x00000001 reg.h Warn test indicator
12348
 AR5K_MIBC_FMCAR5K_MIBC_FMC 0x00000002 reg.h Freeze MIB Counters
12349
 AR5K_MIBC_CMCAR5K_MIBC_CMC 0x00000004 reg.h Clean MIB Counters
12350
 AR5K_MIBC_MCSAR5K_MIBC_MCS 0x00000008 reg.h MIB counter strobe
12351
 AR5K_TOPSAR5K_TOPS 0x0044 reg.h 　
12352
 AR5K_TOPS_MAR5K_TOPS_M 0x0000ffff reg.h 　
12353
 AR5K_RXNOFRMAR5K_RXNOFRM 0x0048 reg.h 　
12354
 AR5K_RXNOFRM_MAR5K_RXNOFRM_M 0x000003ff reg.h 　
12355
 AR5K_TXNOFRMAR5K_TXNOFRM 0x004c reg.h 　
12356
 AR5K_TXNOFRM_MAR5K_TXNOFRM_M 0x000003ff reg.h 　
12357
 AR5K_TXNOFRM_QCUAR5K_TXNOFRM_QCU 0x000ffc00 reg.h 　
12358
 AR5K_TXNOFRM_QCU_SAR5K_TXNOFRM_QCU_S 10 reg.h 　
12359
 AR5K_RPGTOAR5K_RPGTO 0x0050 reg.h 　
12360
 AR5K_RPGTO_MAR5K_RPGTO_M 0x000003ff reg.h 　
12361
 AR5K_RFCNTAR5K_RFCNT 0x0054 reg.h 　
12362
 AR5K_RFCNT_MAR5K_RFCNT_M 0x0000001f reg.h [5211+] (?)
12363
 AR5K_RFCNT_RFCLAR5K_RFCNT_RFCL 0x0000000f reg.h [5210]
12364
 AR5K_MISCAR5K_MISC 0x0058 reg.h Register Address
12365
 AR5K_MISC_DMA_OBS_MAR5K_MISC_DMA_OBS_M 0x000001e0 reg.h 　
12366
 AR5K_MISC_DMA_OBS_SAR5K_MISC_DMA_OBS_S 5 reg.h 　
12367
 AR5K_MISC_MISC_OBS_MAR5K_MISC_MISC_OBS_M 0x00000e00 reg.h 　
12368
 AR5K_MISC_MISC_OBS_SAR5K_MISC_MISC_OBS_S 9 reg.h 　
12369
 AR5K_MISC_MAC_OBS_LSB_MAR5K_MISC_MAC_OBS_LSB_M 0x00007000 reg.h 　
12370
 AR5K_MISC_MAC_OBS_LSB_SAR5K_MISC_MAC_OBS_LSB_S 12 reg.h 　
12371
 AR5K_MISC_MAC_OBS_MSB_MAR5K_MISC_MAC_OBS_MSB_M 0x00038000 reg.h 　
12372
 AR5K_MISC_MAC_OBS_MSB_SAR5K_MISC_MAC_OBS_MSB_S 15 reg.h 　
12373
 AR5K_MISC_LED_DECAYAR5K_MISC_LED_DECAY 0x001c0000 reg.h [5210]
12374
 AR5K_MISC_LED_BLINKAR5K_MISC_LED_BLINK 0x00e00000 reg.h [5210]
12375
 AR5K_QCUDCU_CLKGTAR5K_QCUDCU_CLKGT 0x005c reg.h Register Address (?)
12376
 AR5K_QCUDCU_CLKGT_QCUAR5K_QCUDCU_CLKGT_QCU 0x0000ffff reg.h Mask for QCU clock
12377
 AR5K_QCUDCU_CLKGT_DCUAR5K_QCUDCU_CLKGT_DCU 0x07ff0000 reg.h Mask for DCU clock
12378
 AR5K_ISRAR5K_ISR 0x001c reg.h Register Address [5210]
12379
 AR5K_PISRAR5K_PISR 0x0080 reg.h Register Address [5211+]
12380
 AR5K_ISR_RXOKAR5K_ISR_RXOK 0x00000001 reg.h Frame successfuly recieved
12381
 AR5K_ISR_RXDESCAR5K_ISR_RXDESC 0x00000002 reg.h RX descriptor request
12382
 AR5K_ISR_RXERRAR5K_ISR_RXERR 0x00000004 reg.h Receive error
12383
 AR5K_ISR_RXNOFRMAR5K_ISR_RXNOFRM 0x00000008 reg.h No frame received (receive timeout)
12384
 AR5K_ISR_RXEOLAR5K_ISR_RXEOL 0x00000010 reg.h Empty RX descriptor
12385
 AR5K_ISR_RXORNAR5K_ISR_RXORN 0x00000020 reg.h Receive FIFO overrun
12386
 AR5K_ISR_TXOKAR5K_ISR_TXOK 0x00000040 reg.h Frame successfuly transmited
12387
 AR5K_ISR_TXDESCAR5K_ISR_TXDESC 0x00000080 reg.h TX descriptor request
12388
 AR5K_ISR_TXERRAR5K_ISR_TXERR 0x00000100 reg.h Transmit error
12389
 AR5K_ISR_TXNOFRMAR5K_ISR_TXNOFRM 0x00000200 reg.h No frame transmited (transmit timeout)
12390
 AR5K_ISR_TXEOLAR5K_ISR_TXEOL 0x00000400 reg.h Empty TX descriptor
12391
 AR5K_ISR_TXURNAR5K_ISR_TXURN 0x00000800 reg.h Transmit FIFO underrun
12392
 AR5K_ISR_MIBAR5K_ISR_MIB 0x00001000 reg.h Update MIB counters
12393
 AR5K_ISR_SWIAR5K_ISR_SWI 0x00002000 reg.h Software interrupt
12394
 AR5K_ISR_RXPHYAR5K_ISR_RXPHY 0x00004000 reg.h PHY error
12395
 AR5K_ISR_RXKCMAR5K_ISR_RXKCM 0x00008000 reg.h RX Key cache miss
12396
 AR5K_ISR_SWBAAR5K_ISR_SWBA 0x00010000 reg.h Software beacon alert
12397
 AR5K_ISR_BRSSIAR5K_ISR_BRSSI 0x00020000 reg.h Beacon rssi below threshold (?)
12398
 AR5K_ISR_BMISSAR5K_ISR_BMISS 0x00040000 reg.h Beacon missed
12399
 AR5K_ISR_HIUERRAR5K_ISR_HIUERR 0x00080000 reg.h Host Interface Unit error [5211+]
12400
 AR5K_ISR_BNRAR5K_ISR_BNR 0x00100000 reg.h Beacon not ready [5211+]
12401
 AR5K_ISR_MCABTAR5K_ISR_MCABT 0x00100000 reg.h Master Cycle Abort [5210]
12402
 AR5K_ISR_RXCHIRPAR5K_ISR_RXCHIRP 0x00200000 reg.h CHIRP Received [5212+]
12403
 AR5K_ISR_SSERRAR5K_ISR_SSERR 0x00200000 reg.h Signaled System Error [5210]
12404
 AR5K_ISR_DPERRAR5K_ISR_DPERR 0x00400000 reg.h Det par Error (?) [5210]
12405
 AR5K_ISR_RXDOPPLERAR5K_ISR_RXDOPPLER 0x00400000 reg.h Doppler chirp received [5212+]
12406
 AR5K_ISR_TIMAR5K_ISR_TIM 0x00800000 reg.h [5211+]
12407
 AR5K_ISR_BCNMISCAR5K_ISR_BCNMISC 0x00800000 reg.h 'or' of TIM, CAB_END, DTIM_SYNC, BCN_TIMEOUT,
12408
 AR5K_ISR_GPIOAR5K_ISR_GPIO 0x01000000 reg.h GPIO (rf kill)
12409
 AR5K_ISR_QCBRORNAR5K_ISR_QCBRORN 0x02000000 reg.h QCU CBR overrun [5211+]
12410
 AR5K_ISR_QCBRURNAR5K_ISR_QCBRURN 0x04000000 reg.h QCU CBR underrun [5211+]
12411
 AR5K_ISR_QTRIGAR5K_ISR_QTRIG 0x08000000 reg.h QCU scheduling trigger [5211+]
12412
 AR5K_SISR0AR5K_SISR0 0x0084 reg.h Register Address [5211+]
12413
 AR5K_SISR0_QCU_TXOKAR5K_SISR0_QCU_TXOK 0x000003ff reg.h Mask for QCU_TXOK
12414
 AR5K_SISR0_QCU_TXOK_SAR5K_SISR0_QCU_TXOK_S 0 reg.h 　
12415
 AR5K_SISR0_QCU_TXDESCAR5K_SISR0_QCU_TXDESC 0x03ff0000 reg.h Mask for QCU_TXDESC
12416
 AR5K_SISR0_QCU_TXDESC_SAR5K_SISR0_QCU_TXDESC_S 16 reg.h 　
12417
 AR5K_SISR1AR5K_SISR1 0x0088 reg.h Register Address [5211+]
12418
 AR5K_SISR1_QCU_TXERRAR5K_SISR1_QCU_TXERR 0x000003ff reg.h Mask for QCU_TXERR
12419
 AR5K_SISR1_QCU_TXERR_SAR5K_SISR1_QCU_TXERR_S 0 reg.h 　
12420
 AR5K_SISR1_QCU_TXEOLAR5K_SISR1_QCU_TXEOL 0x03ff0000 reg.h Mask for QCU_TXEOL
12421
 AR5K_SISR1_QCU_TXEOL_SAR5K_SISR1_QCU_TXEOL_S 16 reg.h 　
12422
 AR5K_SISR2AR5K_SISR2 0x008c reg.h Register Address [5211+]
12423
 AR5K_SISR2_QCU_TXURNAR5K_SISR2_QCU_TXURN 0x000003ff reg.h Mask for QCU_TXURN
12424
 AR5K_SISR2_QCU_TXURN_SAR5K_SISR2_QCU_TXURN_S 0 reg.h 　
12425
 AR5K_SISR2_MCABTAR5K_SISR2_MCABT 0x00100000 reg.h Master Cycle Abort
12426
 AR5K_SISR2_SSERRAR5K_SISR2_SSERR 0x00200000 reg.h Signaled System Error
12427
 AR5K_SISR2_DPERRAR5K_SISR2_DPERR 0x00400000 reg.h Bus parity error
12428
 AR5K_SISR2_TIMAR5K_SISR2_TIM 0x01000000 reg.h [5212+]
12429
 AR5K_SISR2_CAB_ENDAR5K_SISR2_CAB_END 0x02000000 reg.h [5212+]
12430
 AR5K_SISR2_DTIM_SYNCAR5K_SISR2_DTIM_SYNC 0x04000000 reg.h DTIM sync lost [5212+]
12431
 AR5K_SISR2_BCN_TIMEOUTAR5K_SISR2_BCN_TIMEOUT 0x08000000 reg.h Beacon Timeout [5212+]
12432
 AR5K_SISR2_CAB_TIMEOUTAR5K_SISR2_CAB_TIMEOUT 0x10000000 reg.h CAB Timeout [5212+]
12433
 AR5K_SISR2_DTIMAR5K_SISR2_DTIM 0x20000000 reg.h [5212+]
12434
 AR5K_SISR2_TSFOORAR5K_SISR2_TSFOOR 0x80000000 reg.h TSF OOR (?)
12435
 AR5K_SISR3AR5K_SISR3 0x0090 reg.h Register Address [5211+]
12436
 AR5K_SISR3_QCBRORNAR5K_SISR3_QCBRORN 0x000003ff reg.h Mask for QCBRORN
12437
 AR5K_SISR3_QCBRORN_SAR5K_SISR3_QCBRORN_S 0 reg.h 　
12438
 AR5K_SISR3_QCBRURNAR5K_SISR3_QCBRURN 0x03ff0000 reg.h Mask for QCBRURN
12439
 AR5K_SISR3_QCBRURN_SAR5K_SISR3_QCBRURN_S 16 reg.h 　
12440
 AR5K_SISR4AR5K_SISR4 0x0094 reg.h Register Address [5211+]
12441
 AR5K_SISR4_QTRIGAR5K_SISR4_QTRIG 0x000003ff reg.h Mask for QTRIG
12442
 AR5K_SISR4_QTRIG_SAR5K_SISR4_QTRIG_S 0 reg.h 　
12443
 AR5K_RAC_PISRAR5K_RAC_PISR 0x00c0 reg.h Read and clear PISR
12444
 AR5K_RAC_SISR0AR5K_RAC_SISR0 0x00c4 reg.h Read and clear SISR0
12445
 AR5K_RAC_SISR1AR5K_RAC_SISR1 0x00c8 reg.h Read and clear SISR1
12446
 AR5K_RAC_SISR2AR5K_RAC_SISR2 0x00cc reg.h Read and clear SISR2
12447
 AR5K_RAC_SISR3AR5K_RAC_SISR3 0x00d0 reg.h Read and clear SISR3
12448
 AR5K_RAC_SISR4AR5K_RAC_SISR4 0x00d4 reg.h Read and clear SISR4
12449
 AR5K_IMRAR5K_IMR 0x0020 reg.h Register Address [5210]
12450
 AR5K_PIMRAR5K_PIMR 0x00a0 reg.h Register Address [5211+]
12451
 AR5K_IMR_RXOKAR5K_IMR_RXOK 0x00000001 reg.h Frame successfuly recieved
12452
 AR5K_IMR_RXDESCAR5K_IMR_RXDESC 0x00000002 reg.h RX descriptor request
12453
 AR5K_IMR_RXERRAR5K_IMR_RXERR 0x00000004 reg.h Receive error
12454
 AR5K_IMR_RXNOFRMAR5K_IMR_RXNOFRM 0x00000008 reg.h No frame received (receive timeout)
12455
 AR5K_IMR_RXEOLAR5K_IMR_RXEOL 0x00000010 reg.h Empty RX descriptor
12456
 AR5K_IMR_RXORNAR5K_IMR_RXORN 0x00000020 reg.h Receive FIFO overrun
12457
 AR5K_IMR_TXOKAR5K_IMR_TXOK 0x00000040 reg.h Frame successfuly transmited
12458
 AR5K_IMR_TXDESCAR5K_IMR_TXDESC 0x00000080 reg.h TX descriptor request
12459
 AR5K_IMR_TXERRAR5K_IMR_TXERR 0x00000100 reg.h Transmit error
12460
 AR5K_IMR_TXNOFRMAR5K_IMR_TXNOFRM 0x00000200 reg.h No frame transmited (transmit timeout)
12461
 AR5K_IMR_TXEOLAR5K_IMR_TXEOL 0x00000400 reg.h Empty TX descriptor
12462
 AR5K_IMR_TXURNAR5K_IMR_TXURN 0x00000800 reg.h Transmit FIFO underrun
12463
 AR5K_IMR_MIBAR5K_IMR_MIB 0x00001000 reg.h Update MIB counters
12464
 AR5K_IMR_SWIAR5K_IMR_SWI 0x00002000 reg.h Software interrupt
12465
 AR5K_IMR_RXPHYAR5K_IMR_RXPHY 0x00004000 reg.h PHY error
12466
 AR5K_IMR_RXKCMAR5K_IMR_RXKCM 0x00008000 reg.h RX Key cache miss
12467
 AR5K_IMR_SWBAAR5K_IMR_SWBA 0x00010000 reg.h Software beacon alert
12468
 AR5K_IMR_BRSSIAR5K_IMR_BRSSI 0x00020000 reg.h Beacon rssi below threshold (?)
12469
 AR5K_IMR_BMISSAR5K_IMR_BMISS 0x00040000 reg.h Beacon missed
12470
 AR5K_IMR_HIUERRAR5K_IMR_HIUERR 0x00080000 reg.h Host Interface Unit error [5211+]
12471
 AR5K_IMR_BNRAR5K_IMR_BNR 0x00100000 reg.h Beacon not ready [5211+]
12472
 AR5K_IMR_MCABTAR5K_IMR_MCABT 0x00100000 reg.h Master Cycle Abort [5210]
12473
 AR5K_IMR_RXCHIRPAR5K_IMR_RXCHIRP 0x00200000 reg.h CHIRP Received [5212+]
12474
 AR5K_IMR_SSERRAR5K_IMR_SSERR 0x00200000 reg.h Signaled System Error [5210]
12475
 AR5K_IMR_DPERRAR5K_IMR_DPERR 0x00400000 reg.h Det par Error (?) [5210]
12476
 AR5K_IMR_RXDOPPLERAR5K_IMR_RXDOPPLER 0x00400000 reg.h Doppler chirp received [5212+]
12477
 AR5K_IMR_TIMAR5K_IMR_TIM 0x00800000 reg.h [5211+]
12478
 AR5K_IMR_BCNMISCAR5K_IMR_BCNMISC 0x00800000 reg.h 'or' of TIM, CAB_END, DTIM_SYNC, BCN_TIMEOUT,
12479
 AR5K_IMR_GPIOAR5K_IMR_GPIO 0x01000000 reg.h GPIO (rf kill)
12480
 AR5K_IMR_QCBRORNAR5K_IMR_QCBRORN 0x02000000 reg.h QCU CBR overrun (?) [5211+]
12481
 AR5K_IMR_QCBRURNAR5K_IMR_QCBRURN 0x04000000 reg.h QCU CBR underrun (?) [5211+]
12482
 AR5K_IMR_QTRIGAR5K_IMR_QTRIG 0x08000000 reg.h QCU scheduling trigger [5211+]
12483
 AR5K_SIMR0AR5K_SIMR0 0x00a4 reg.h Register Address [5211+]
12484
 AR5K_SIMR0_QCU_TXOKAR5K_SIMR0_QCU_TXOK 0x000003ff reg.h Mask for QCU_TXOK
12485
 AR5K_SIMR0_QCU_TXOK_SAR5K_SIMR0_QCU_TXOK_S 0 reg.h 　
12486
 AR5K_SIMR0_QCU_TXDESCAR5K_SIMR0_QCU_TXDESC 0x03ff0000 reg.h Mask for QCU_TXDESC
12487
 AR5K_SIMR0_QCU_TXDESC_SAR5K_SIMR0_QCU_TXDESC_S 16 reg.h 　
12488
 AR5K_SIMR1AR5K_SIMR1 0x00a8 reg.h Register Address [5211+]
12489
 AR5K_SIMR1_QCU_TXERRAR5K_SIMR1_QCU_TXERR 0x000003ff reg.h Mask for QCU_TXERR
12490
 AR5K_SIMR1_QCU_TXERR_SAR5K_SIMR1_QCU_TXERR_S 0 reg.h 　
12491
 AR5K_SIMR1_QCU_TXEOLAR5K_SIMR1_QCU_TXEOL 0x03ff0000 reg.h Mask for QCU_TXEOL
12492
 AR5K_SIMR1_QCU_TXEOL_SAR5K_SIMR1_QCU_TXEOL_S 16 reg.h 　
12493
 AR5K_SIMR2AR5K_SIMR2 0x00ac reg.h Register Address [5211+]
12494
 AR5K_SIMR2_QCU_TXURNAR5K_SIMR2_QCU_TXURN 0x000003ff reg.h Mask for QCU_TXURN
12495
 AR5K_SIMR2_QCU_TXURN_SAR5K_SIMR2_QCU_TXURN_S 0 reg.h 　
12496
 AR5K_SIMR2_MCABTAR5K_SIMR2_MCABT 0x00100000 reg.h Master Cycle Abort
12497
 AR5K_SIMR2_SSERRAR5K_SIMR2_SSERR 0x00200000 reg.h Signaled System Error
12498
 AR5K_SIMR2_DPERRAR5K_SIMR2_DPERR 0x00400000 reg.h Bus parity error
12499
 AR5K_SIMR2_TIMAR5K_SIMR2_TIM 0x01000000 reg.h [5212+]
12500
 AR5K_SIMR2_CAB_ENDAR5K_SIMR2_CAB_END 0x02000000 reg.h [5212+]
12501
 AR5K_SIMR2_DTIM_SYNCAR5K_SIMR2_DTIM_SYNC 0x04000000 reg.h DTIM Sync lost [5212+]
12502
 AR5K_SIMR2_BCN_TIMEOUTAR5K_SIMR2_BCN_TIMEOUT 0x08000000 reg.h Beacon Timeout [5212+]
12503
 AR5K_SIMR2_CAB_TIMEOUTAR5K_SIMR2_CAB_TIMEOUT 0x10000000 reg.h CAB Timeout [5212+]
12504
 AR5K_SIMR2_DTIMAR5K_SIMR2_DTIM 0x20000000 reg.h [5212+]
12505
 AR5K_SIMR2_TSFOORAR5K_SIMR2_TSFOOR 0x80000000 reg.h TSF OOR (?)
12506
 AR5K_SIMR3AR5K_SIMR3 0x00b0 reg.h Register Address [5211+]
12507
 AR5K_SIMR3_QCBRORNAR5K_SIMR3_QCBRORN 0x000003ff reg.h Mask for QCBRORN
12508
 AR5K_SIMR3_QCBRORN_SAR5K_SIMR3_QCBRORN_S 0 reg.h 　
12509
 AR5K_SIMR3_QCBRURNAR5K_SIMR3_QCBRURN 0x03ff0000 reg.h Mask for QCBRURN
12510
 AR5K_SIMR3_QCBRURN_SAR5K_SIMR3_QCBRURN_S 16 reg.h 　
12511
 AR5K_SIMR4AR5K_SIMR4 0x00b4 reg.h Register Address [5211+]
12512
 AR5K_SIMR4_QTRIGAR5K_SIMR4_QTRIG 0x000003ff reg.h Mask for QTRIG
12513
 AR5K_SIMR4_QTRIG_SAR5K_SIMR4_QTRIG_S 0 reg.h 　
12514
 AR5K_DCM_ADDRAR5K_DCM_ADDR 0x0400 reg.h Decompression mask address (index)
12515
 AR5K_DCM_DATAAR5K_DCM_DATA 0x0404 reg.h Decompression mask data
12516
 AR5K_WOW_PCFGAR5K_WOW_PCFG 0x0410 reg.h Register Address
12517
 AR5K_WOW_PCFG_PAT_MATCH_ENAR5K_WOW_PCFG_PAT_MATCH_EN 0x00000001 reg.h Pattern match enable
12518
 AR5K_WOW_PCFG_LONG_FRAME_POLAR5K_WOW_PCFG_LONG_FRAME_POL 0x00000002 reg.h Long frame policy
12519
 AR5K_WOW_PCFG_WOBMISSAR5K_WOW_PCFG_WOBMISS 0x00000004 reg.h Wake on bea(con) miss (?)
12520
 AR5K_WOW_PCFG_PAT_0_ENAR5K_WOW_PCFG_PAT_0_EN 0x00000100 reg.h Enable pattern 0
12521
 AR5K_WOW_PCFG_PAT_1_ENAR5K_WOW_PCFG_PAT_1_EN 0x00000200 reg.h Enable pattern 1
12522
 AR5K_WOW_PCFG_PAT_2_ENAR5K_WOW_PCFG_PAT_2_EN 0x00000400 reg.h Enable pattern 2
12523
 AR5K_WOW_PCFG_PAT_3_ENAR5K_WOW_PCFG_PAT_3_EN 0x00000800 reg.h Enable pattern 3
12524
 AR5K_WOW_PCFG_PAT_4_ENAR5K_WOW_PCFG_PAT_4_EN 0x00001000 reg.h Enable pattern 4
12525
 AR5K_WOW_PCFG_PAT_5_ENAR5K_WOW_PCFG_PAT_5_EN 0x00002000 reg.h Enable pattern 5
12526
 AR5K_WOW_PAT_IDXAR5K_WOW_PAT_IDX 0x0414 reg.h 　
12527
 AR5K_WOW_PAT_DATAAR5K_WOW_PAT_DATA 0x0418 reg.h Register Address
12528
 AR5K_WOW_PAT_DATA_0_3_VAR5K_WOW_PAT_DATA_0_3_V 0x00000001 reg.h Pattern 0, 3 value
12529
 AR5K_WOW_PAT_DATA_1_4_VAR5K_WOW_PAT_DATA_1_4_V 0x00000100 reg.h Pattern 1, 4 value
12530
 AR5K_WOW_PAT_DATA_2_5_VAR5K_WOW_PAT_DATA_2_5_V 0x00010000 reg.h Pattern 2, 5 value
12531
 AR5K_WOW_PAT_DATA_0_3_MAR5K_WOW_PAT_DATA_0_3_M 0x01000000 reg.h Pattern 0, 3 mask
12532
 AR5K_WOW_PAT_DATA_1_4_MAR5K_WOW_PAT_DATA_1_4_M 0x04000000 reg.h Pattern 1, 4 mask
12533
 AR5K_WOW_PAT_DATA_2_5_MAR5K_WOW_PAT_DATA_2_5_M 0x10000000 reg.h Pattern 2, 5 mask
12534
 AR5K_DCCFGAR5K_DCCFG 0x0420 reg.h Register Address
12535
 AR5K_DCCFG_GLOBAL_ENAR5K_DCCFG_GLOBAL_EN 0x00000001 reg.h Enable decompression on all queues
12536
 AR5K_DCCFG_BYPASS_ENAR5K_DCCFG_BYPASS_EN 0x00000002 reg.h Bypass decompression
12537
 AR5K_DCCFG_BCAST_ENAR5K_DCCFG_BCAST_EN 0x00000004 reg.h Enable decompression for bcast frames
12538
 AR5K_DCCFG_MCAST_ENAR5K_DCCFG_MCAST_EN 0x00000008 reg.h Enable decompression for mcast frames
12539
 AR5K_CCFGAR5K_CCFG 0x0600 reg.h Register Address
12540
 AR5K_CCFG_WINDOW_SIZEAR5K_CCFG_WINDOW_SIZE 0x00000007 reg.h Compression window size
12541
 AR5K_CCFG_CPC_ENAR5K_CCFG_CPC_EN 0x00000008 reg.h Enable performance counters
12542
 AR5K_CCFG_CCUAR5K_CCFG_CCU 0x0604 reg.h Register Address
12543
 AR5K_CCFG_CCU_CUP_ENAR5K_CCFG_CCU_CUP_EN 0x00000001 reg.h CCU Catchup enable
12544
 AR5K_CCFG_CCU_CREDITAR5K_CCFG_CCU_CREDIT 0x00000002 reg.h CCU Credit (field)
12545
 AR5K_CCFG_CCU_CD_THRESAR5K_CCFG_CCU_CD_THRES 0x00000080 reg.h CCU Cyc(lic?) debt threshold (field)
12546
 AR5K_CCFG_CCU_CUP_LCNTAR5K_CCFG_CCU_CUP_LCNT 0x00010000 reg.h CCU Catchup lit(?) count
12547
 AR5K_CCFG_CCU_INITAR5K_CCFG_CCU_INIT 0x00100200 reg.h Initial value during reset
12548
 AR5K_CPC0AR5K_CPC0 0x0610 reg.h Compression performance counter 0
12549
 AR5K_CPC1AR5K_CPC1 0x0614 reg.h Compression performance counter 1
12550
 AR5K_CPC2AR5K_CPC2 0x0618 reg.h Compression performance counter 2
12551
 AR5K_CPC3AR5K_CPC3 0x061c reg.h Compression performance counter 3
12552
 AR5K_CPCOVFAR5K_CPCOVF 0x0620 reg.h Compression performance overflow
12553
 AR5K_QCU_TXDP_BASEAR5K_QCU_TXDP_BASE 0x0800 reg.h Register Address - Queue0 TXDP
12554
 AR5K_QCU_TXEAR5K_QCU_TXE 0x0840 reg.h 　
12555
 AR5K_QCU_TXDAR5K_QCU_TXD 0x0880 reg.h 　
12556
 AR5K_QCU_CBRCFG_BASEAR5K_QCU_CBRCFG_BASE 0x08c0 reg.h Register Address - Queue0 CBRCFG
12557
 AR5K_QCU_CBRCFG_INTVALAR5K_QCU_CBRCFG_INTVAL 0x00ffffff reg.h CBR Interval mask
12558
 AR5K_QCU_CBRCFG_INTVAL_SAR5K_QCU_CBRCFG_INTVAL_S 0 reg.h 　
12559
 AR5K_QCU_CBRCFG_ORN_THRESAR5K_QCU_CBRCFG_ORN_THRES 0xff000000 reg.h CBR overrun threshold mask
12560
 AR5K_QCU_CBRCFG_ORN_THRES_SAR5K_QCU_CBRCFG_ORN_THRES_S 24 reg.h 　
12561
 AR5K_QCU_RDYTIMECFG_BASEAR5K_QCU_RDYTIMECFG_BASE 0x0900 reg.h Register Address - Queue0 RDYTIMECFG
12562
 AR5K_QCU_RDYTIMECFG_INTVALAR5K_QCU_RDYTIMECFG_INTVAL 0x00ffffff reg.h Ready time interval mask
12563
 AR5K_QCU_RDYTIMECFG_INTVAL_SAR5K_QCU_RDYTIMECFG_INTVAL_S 0 reg.h 　
12564
 AR5K_QCU_RDYTIMECFG_ENABLEAR5K_QCU_RDYTIMECFG_ENABLE 0x01000000 reg.h Ready time enable mask
12565
 AR5K_QCU_ONESHOTARM_SETAR5K_QCU_ONESHOTARM_SET 0x0940 reg.h Register Address -QCU "one shot arm set (?)"
12566
 AR5K_QCU_ONESHOTARM_SET_MAR5K_QCU_ONESHOTARM_SET_M 0x0000ffff reg.h 　
12567
 AR5K_QCU_ONESHOTARM_CLEARAR5K_QCU_ONESHOTARM_CLEAR 0x0980 reg.h Register Address -QCU "one shot arm clear (?)"
12568
 AR5K_QCU_ONESHOTARM_CLEAR_MAR5K_QCU_ONESHOTARM_CLEAR_M 0x0000ffff reg.h 　
12569
 AR5K_QCU_MISC_BASEAR5K_QCU_MISC_BASE 0x09c0 reg.h Register Address -Queue0 MISC
12570
 AR5K_QCU_MISC_FRSHED_MAR5K_QCU_MISC_FRSHED_M 0x0000000f reg.h Frame sheduling mask
12571
 AR5K_QCU_MISC_FRSHED_ASAPAR5K_QCU_MISC_FRSHED_ASAP 0 reg.h ASAP
12572
 AR5K_QCU_MISC_FRSHED_CBRAR5K_QCU_MISC_FRSHED_CBR 1 reg.h Constant Bit Rate
12573
 AR5K_QCU_MISC_FRSHED_DBA_GTAR5K_QCU_MISC_FRSHED_DBA_GT 2 reg.h DMA Beacon alert gated
12574
 AR5K_QCU_MISC_FRSHED_TIM_GTAR5K_QCU_MISC_FRSHED_TIM_GT 3 reg.h TIMT gated
12575
 AR5K_QCU_MISC_FRSHED_BCN_SENT_GAR5K_QCU_MISC_FRSHED_BCN_SENT_G 4 reg.h Beacon sent gated
12576
 AR5K_QCU_MISC_ONESHOT_ENABLEAR5K_QCU_MISC_ONESHOT_ENABLE 0x00000010 reg.h Oneshot enable
12577
 AR5K_QCU_MISC_CBREXP_DISAR5K_QCU_MISC_CBREXP_DIS 0x00000020 reg.h Disable CBR expired counter (normal queue)
12578
 AR5K_QCU_MISC_CBREXP_BCN_DISAR5K_QCU_MISC_CBREXP_BCN_DIS 0x00000040 reg.h Disable CBR expired counter (beacon queue)
12579
 AR5K_QCU_MISC_BCN_ENABLEAR5K_QCU_MISC_BCN_ENABLE 0x00000080 reg.h Enable Beacon use
12580
 AR5K_QCU_MISC_CBR_THRES_ENABLEAR5K_QCU_MISC_CBR_THRES_ENABLE 0x00000100 reg.h CBR expired threshold enabled
12581
 AR5K_QCU_MISC_RDY_VEOL_POLICYAR5K_QCU_MISC_RDY_VEOL_POLICY 0x00000200 reg.h TXE reset when RDYTIME expired or VEOL
12582
 AR5K_QCU_MISC_CBR_RESET_CNTAR5K_QCU_MISC_CBR_RESET_CNT 0x00000400 reg.h CBR threshold (counter) reset
12583
 AR5K_QCU_MISC_DCU_EARLYAR5K_QCU_MISC_DCU_EARLY 0x00000800 reg.h DCU early termination
12584
 AR5K_QCU_MISC_DCU_CMP_ENAR5K_QCU_MISC_DCU_CMP_EN 0x00001000 reg.h Enable frame compression
12585
 AR5K_QCU_STS_BASEAR5K_QCU_STS_BASE 0x0a00 reg.h Register Address - Queue0 STS
12586
 AR5K_QCU_STS_FRMPENDCNTAR5K_QCU_STS_FRMPENDCNT 0x00000003 reg.h Frames pending counter
12587
 AR5K_QCU_STS_CBREXPCNTAR5K_QCU_STS_CBREXPCNT 0x0000ff00 reg.h CBR expired counter
12588
 AR5K_QCU_RDYTIMESHDNAR5K_QCU_RDYTIMESHDN 0x0a40 reg.h 　
12589
 AR5K_QCU_RDYTIMESHDN_MAR5K_QCU_RDYTIMESHDN_M 0x000003ff reg.h 　
12590
 AR5K_QCU_CBB_SELECTAR5K_QCU_CBB_SELECT 0x0b00 reg.h 　
12591
 AR5K_QCU_CBB_ADDRAR5K_QCU_CBB_ADDR 0x0b04 reg.h 　
12592
 AR5K_QCU_CBB_ADDR_SAR5K_QCU_CBB_ADDR_S 9 reg.h 　
12593
 AR5K_QCU_CBCFGAR5K_QCU_CBCFG 0x0b08 reg.h 　
12594
 AR5K_DCU_QCUMASK_BASEAR5K_DCU_QCUMASK_BASE 0x1000 reg.h Register Address -Queue0 DCU_QCUMASK
12595
 AR5K_DCU_QCUMASK_MAR5K_DCU_QCUMASK_M 0x000003ff reg.h 　
12596
 AR5K_DCU_LCL_IFS_BASEAR5K_DCU_LCL_IFS_BASE 0x1040 reg.h Register Address -Queue0 DCU_LCL_IFS
12597
 AR5K_DCU_LCL_IFS_CW_MINAR5K_DCU_LCL_IFS_CW_MIN 0x000003ff reg.h Minimum Contention Window
12598
 AR5K_DCU_LCL_IFS_CW_MIN_SAR5K_DCU_LCL_IFS_CW_MIN_S 0 reg.h 　
12599
 AR5K_DCU_LCL_IFS_CW_MAXAR5K_DCU_LCL_IFS_CW_MAX 0x000ffc00 reg.h Maximum Contention Window
12600
 AR5K_DCU_LCL_IFS_CW_MAX_SAR5K_DCU_LCL_IFS_CW_MAX_S 10 reg.h 　
12601
 AR5K_DCU_LCL_IFS_AIFSAR5K_DCU_LCL_IFS_AIFS 0x0ff00000 reg.h Arbitrated Interframe Space
12602
 AR5K_DCU_LCL_IFS_AIFS_SAR5K_DCU_LCL_IFS_AIFS_S 20 reg.h 　
12603
 AR5K_DCU_LCL_IFS_AIFS_MAXAR5K_DCU_LCL_IFS_AIFS_MAX 0xfc reg.h Anything above that can cause DCU to hang
12604
 AR5K_DCU_RETRY_LMT_BASEAR5K_DCU_RETRY_LMT_BASE 0x1080 reg.h Register Address -Queue0 DCU_RETRY_LMT
12605
 AR5K_DCU_RETRY_LMT_SH_RETRYAR5K_DCU_RETRY_LMT_SH_RETRY 0x0000000f reg.h Short retry limit mask
12606
 AR5K_DCU_RETRY_LMT_SH_RETRY_SAR5K_DCU_RETRY_LMT_SH_RETRY_S 0 reg.h 　
12607
 AR5K_DCU_RETRY_LMT_LG_RETRYAR5K_DCU_RETRY_LMT_LG_RETRY 0x000000f0 reg.h Long retry limit mask
12608
 AR5K_DCU_RETRY_LMT_LG_RETRY_SAR5K_DCU_RETRY_LMT_LG_RETRY_S 4 reg.h 　
12609
 AR5K_DCU_RETRY_LMT_SSH_RETRYAR5K_DCU_RETRY_LMT_SSH_RETRY 0x00003f00 reg.h Station short retry limit mask (?)
12610
 AR5K_DCU_RETRY_LMT_SSH_RETRY_SAR5K_DCU_RETRY_LMT_SSH_RETRY_S 8 reg.h 　
12611
 AR5K_DCU_RETRY_LMT_SLG_RETRYAR5K_DCU_RETRY_LMT_SLG_RETRY 0x000fc000 reg.h Station long retry limit mask (?)
12612
 AR5K_DCU_RETRY_LMT_SLG_RETRY_SAR5K_DCU_RETRY_LMT_SLG_RETRY_S 14 reg.h 　
12613
 AR5K_DCU_CHAN_TIME_BASEAR5K_DCU_CHAN_TIME_BASE 0x10c0 reg.h Register Address -Queue0 DCU_CHAN_TIME
12614
 AR5K_DCU_CHAN_TIME_DURAR5K_DCU_CHAN_TIME_DUR 0x000fffff reg.h Channel time duration
12615
 AR5K_DCU_CHAN_TIME_DUR_SAR5K_DCU_CHAN_TIME_DUR_S 0 reg.h 　
12616
 AR5K_DCU_CHAN_TIME_ENABLEAR5K_DCU_CHAN_TIME_ENABLE 0x00100000 reg.h Enable channel time
12617
 AR5K_DCU_MISC_BASEAR5K_DCU_MISC_BASE 0x1100 reg.h Register Address -Queue0 DCU_MISC
12618
 AR5K_DCU_MISC_BACKOFFAR5K_DCU_MISC_BACKOFF 0x0000003f reg.h Mask for backoff threshold
12619
 AR5K_DCU_MISC_ETS_RTS_POLAR5K_DCU_MISC_ETS_RTS_POL 0x00000040 reg.h End of transmission series
12620
 AR5K_DCU_MISC_ETS_CW_POLAR5K_DCU_MISC_ETS_CW_POL 0x00000080 reg.h End of transmission series
12621
 AR5K_DCU_MISC_FRAG_WAITAR5K_DCU_MISC_FRAG_WAIT 0x00000100 reg.h Wait for next fragment
12622
 AR5K_DCU_MISC_BACKOFF_FRAGAR5K_DCU_MISC_BACKOFF_FRAG 0x00000200 reg.h Enable backoff while bursting
12623
 AR5K_DCU_MISC_HCFPOLL_ENABLEAR5K_DCU_MISC_HCFPOLL_ENABLE 0x00000800 reg.h CF - Poll enable
12624
 AR5K_DCU_MISC_BACKOFF_PERSISTAR5K_DCU_MISC_BACKOFF_PERSIST 0x00001000 reg.h Persistent backoff
12625
 AR5K_DCU_MISC_FRMPRFTCH_ENABLEAR5K_DCU_MISC_FRMPRFTCH_ENABLE 0x00002000 reg.h Enable frame pre-fetch
12626
 AR5K_DCU_MISC_VIRTCOLAR5K_DCU_MISC_VIRTCOL 0x0000c000 reg.h Mask for Virtual Collision (?)
12627
 AR5K_DCU_MISC_VIRTCOL_NORMALAR5K_DCU_MISC_VIRTCOL_NORMAL 0 reg.h 　
12628
 AR5K_DCU_MISC_VIRTCOL_IGNOREAR5K_DCU_MISC_VIRTCOL_IGNORE 1 reg.h 　
12629
 AR5K_DCU_MISC_BCN_ENABLEAR5K_DCU_MISC_BCN_ENABLE 0x00010000 reg.h Enable Beacon use
12630
 AR5K_DCU_MISC_ARBLOCK_CTLAR5K_DCU_MISC_ARBLOCK_CTL 0x00060000 reg.h Arbiter lockout control mask
12631
 AR5K_DCU_MISC_ARBLOCK_CTL_SAR5K_DCU_MISC_ARBLOCK_CTL_S 17 reg.h 　
12632
 AR5K_DCU_MISC_ARBLOCK_CTL_NONEAR5K_DCU_MISC_ARBLOCK_CTL_NONE 0 reg.h No arbiter lockout
12633
 AR5K_DCU_MISC_ARBLOCK_CTL_INTFRAR5K_DCU_MISC_ARBLOCK_CTL_INTFR 1 reg.h Intra-frame lockout
12634
 AR5K_DCU_MISC_ARBLOCK_CTL_GLOBAAR5K_DCU_MISC_ARBLOCK_CTL_GLOBA 2 reg.h Global lockout
12635
 AR5K_DCU_MISC_ARBLOCK_IGNOREAR5K_DCU_MISC_ARBLOCK_IGNORE 0x00080000 reg.h Ignore Arbiter lockout
12636
 AR5K_DCU_MISC_SEQ_NUM_INCR_DISAR5K_DCU_MISC_SEQ_NUM_INCR_DIS 0x00100000 reg.h Disable sequence number increment
12637
 AR5K_DCU_MISC_POST_FR_BKOFF_DISAR5K_DCU_MISC_POST_FR_BKOFF_DIS 0x00200000 reg.h Disable post-frame backoff
12638
 AR5K_DCU_MISC_VIRT_COLL_POLICYAR5K_DCU_MISC_VIRT_COLL_POLICY 0x00400000 reg.h Virtual Collision cw policy
12639
 AR5K_DCU_MISC_BLOWN_IFS_POLICYAR5K_DCU_MISC_BLOWN_IFS_POLICY 0x00800000 reg.h Blown IFS policy (?)
12640
 AR5K_DCU_MISC_SEQNUM_CTLAR5K_DCU_MISC_SEQNUM_CTL 0x01000000 reg.h Sequence number control (?)
12641
 AR5K_DCU_SEQNUM_BASEAR5K_DCU_SEQNUM_BASE 0x1140 reg.h 　
12642
 AR5K_DCU_SEQNUM_MAR5K_DCU_SEQNUM_M 0x00000fff reg.h 　
12643
 AR5K_DCU_GBL_IFS_SIFSAR5K_DCU_GBL_IFS_SIFS 0x1030 reg.h 　
12644
 AR5K_DCU_GBL_IFS_SIFS_MAR5K_DCU_GBL_IFS_SIFS_M 0x0000ffff reg.h 　
12645
 AR5K_DCU_GBL_IFS_SLOTAR5K_DCU_GBL_IFS_SLOT 0x1070 reg.h 　
12646
 AR5K_DCU_GBL_IFS_SLOT_MAR5K_DCU_GBL_IFS_SLOT_M 0x0000ffff reg.h 　
12647
 AR5K_DCU_GBL_IFS_EIFSAR5K_DCU_GBL_IFS_EIFS 0x10b0 reg.h 　
12648
 AR5K_DCU_GBL_IFS_EIFS_MAR5K_DCU_GBL_IFS_EIFS_M 0x0000ffff reg.h 　
12649
 AR5K_DCU_GBL_IFS_MISCAR5K_DCU_GBL_IFS_MISC 0x10f0 reg.h Register Address
12650
 AR5K_DCU_GBL_IFS_MISC_LFSR_SLICAR5K_DCU_GBL_IFS_MISC_LFSR_SLIC 0x00000007 reg.h LFSR Slice Select
12651
 AR5K_DCU_GBL_IFS_MISC_TURBO_MODAR5K_DCU_GBL_IFS_MISC_TURBO_MOD 0x00000008 reg.h Turbo mode
12652
 AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_ 0x000003f0 reg.h SIFS Duration mask
12653
 AR5K_DCU_GBL_IFS_MISC_USEC_DURAR5K_DCU_GBL_IFS_MISC_USEC_DUR 0x000ffc00 reg.h USEC Duration mask
12654
 AR5K_DCU_GBL_IFS_MISC_USEC_DUR_AR5K_DCU_GBL_IFS_MISC_USEC_DUR_ 10 reg.h 　
12655
 AR5K_DCU_GBL_IFS_MISC_DCU_ARB_DAR5K_DCU_GBL_IFS_MISC_DCU_ARB_D 0x00300000 reg.h DCU Arbiter delay mask
12656
 AR5K_DCU_GBL_IFS_MISC_SIFS_CNT_AR5K_DCU_GBL_IFS_MISC_SIFS_CNT_ 0x00400000 reg.h SIFS cnt reset policy (?)
12657
 AR5K_DCU_GBL_IFS_MISC_AIFS_CNT_AR5K_DCU_GBL_IFS_MISC_AIFS_CNT_ 0x00800000 reg.h AIFS cnt reset policy (?)
12658
 AR5K_DCU_GBL_IFS_MISC_RND_LFSR_AR5K_DCU_GBL_IFS_MISC_RND_LFSR_ 0x01000000 reg.h Disable random LFSR slice
12659
 AR5K_DCU_FPAR5K_DCU_FP 0x1230 reg.h Register Address
12660
 AR5K_DCU_FP_NOBURST_DCU_ENAR5K_DCU_FP_NOBURST_DCU_EN 0x00000001 reg.h Enable non-burst prefetch on DCU (?)
12661
 AR5K_DCU_FP_NOBURST_ENAR5K_DCU_FP_NOBURST_EN 0x00000010 reg.h Enable non-burst prefetch (?)
12662
 AR5K_DCU_FP_BURST_DCU_ENAR5K_DCU_FP_BURST_DCU_EN 0x00000020 reg.h Enable burst prefetch on DCU (?)
12663
 AR5K_DCU_TXPAR5K_DCU_TXP 0x1270 reg.h Register Address
12664
 AR5K_DCU_TXP_MAR5K_DCU_TXP_M 0x000003ff reg.h Tx pause mask
12665
 AR5K_DCU_TXP_STATUSAR5K_DCU_TXP_STATUS 0x00010000 reg.h Tx pause status
12666
 AR5K_DCU_TX_FILTER_0_BASEAR5K_DCU_TX_FILTER_0_BASE 0x1038 reg.h 　
12667
 AR5K_DCU_TX_FILTER_1_BASEAR5K_DCU_TX_FILTER_1_BASE 0x103c reg.h 　
12668
 AR5K_DCU_TX_FILTER_CLRAR5K_DCU_TX_FILTER_CLR 0x143c reg.h 　
12669
 AR5K_DCU_TX_FILTER_SETAR5K_DCU_TX_FILTER_SET 0x147c reg.h 　
12670
 AR5K_RESET_CTLAR5K_RESET_CTL 0x4000 reg.h Register Address
12671
 AR5K_RESET_CTL_PCUAR5K_RESET_CTL_PCU 0x00000001 reg.h Protocol Control Unit reset
12672
 AR5K_RESET_CTL_DMAAR5K_RESET_CTL_DMA 0x00000002 reg.h DMA (Rx/Tx) reset [5210]
12673
 AR5K_RESET_CTL_BASEBANDAR5K_RESET_CTL_BASEBAND 0x00000002 reg.h Baseband reset [5211+]
12674
 AR5K_RESET_CTL_MACAR5K_RESET_CTL_MAC 0x00000004 reg.h MAC reset (PCU+Baseband ?) [5210]
12675
 AR5K_RESET_CTL_PHYAR5K_RESET_CTL_PHY 0x00000008 reg.h PHY reset [5210]
12676
 AR5K_RESET_CTL_PCIAR5K_RESET_CTL_PCI 0x00000010 reg.h PCI Core reset (interrupts etc)
12677
 AR5K_SLEEP_CTLAR5K_SLEEP_CTL 0x4004 reg.h Register Address
12678
 AR5K_SLEEP_CTL_SLDURAR5K_SLEEP_CTL_SLDUR 0x0000ffff reg.h Sleep duration mask
12679
 AR5K_SLEEP_CTL_SLDUR_SAR5K_SLEEP_CTL_SLDUR_S 0 reg.h 　
12680
 AR5K_SLEEP_CTL_SLEAR5K_SLEEP_CTL_SLE 0x00030000 reg.h Sleep enable mask
12681
 AR5K_SLEEP_CTL_SLE_SAR5K_SLEEP_CTL_SLE_S 16 reg.h 　
12682
 AR5K_SLEEP_CTL_SLE_WAKEAR5K_SLEEP_CTL_SLE_WAKE 0x00000000 reg.h Force chip awake
12683
 AR5K_SLEEP_CTL_SLE_SLPAR5K_SLEEP_CTL_SLE_SLP 0x00010000 reg.h Force chip sleep
12684
 AR5K_SLEEP_CTL_SLE_ALLOWAR5K_SLEEP_CTL_SLE_ALLOW 0x00020000 reg.h Normal sleep policy
12685
 AR5K_SLEEP_CTL_SLE_UNITSAR5K_SLEEP_CTL_SLE_UNITS 0x00000008 reg.h [5211+]
12686
 AR5K_SLEEP_CTL_DUR_TIM_POLAR5K_SLEEP_CTL_DUR_TIM_POL 0x00040000 reg.h Sleep duration timing policy
12687
 AR5K_SLEEP_CTL_DUR_WRITE_POLAR5K_SLEEP_CTL_DUR_WRITE_POL 0x00080000 reg.h Sleep duration write policy
12688
 AR5K_SLEEP_CTL_SLE_POLAR5K_SLEEP_CTL_SLE_POL 0x00100000 reg.h Sleep policy mode
12689
 AR5K_INTPENDAR5K_INTPEND 0x4008 reg.h 　
12690
 AR5K_INTPEND_MAR5K_INTPEND_M 0x00000001 reg.h 　
12691
 AR5K_SFRAR5K_SFR 0x400c reg.h 　
12692
 AR5K_SFR_ENAR5K_SFR_EN 0x00000001 reg.h 　
12693
 AR5K_PCICFGAR5K_PCICFG 0x4010 reg.h Register Address
12694
 AR5K_PCICFG_EEAEAR5K_PCICFG_EEAE 0x00000001 reg.h Eeprom access enable [5210]
12695
 AR5K_PCICFG_SLEEP_CLOCK_ENAR5K_PCICFG_SLEEP_CLOCK_EN 0x00000002 reg.h Enable sleep clock
12696
 AR5K_PCICFG_CLKRUNENAR5K_PCICFG_CLKRUNEN 0x00000004 reg.h CLKRUN enable [5211+]
12697
 AR5K_PCICFG_EESIZEAR5K_PCICFG_EESIZE 0x00000018 reg.h Mask for EEPROM size [5211+]
12698
 AR5K_PCICFG_EESIZE_SAR5K_PCICFG_EESIZE_S 3 reg.h 　
12699
 AR5K_PCICFG_EESIZE_4KAR5K_PCICFG_EESIZE_4K 0 reg.h 4K
12700
 AR5K_PCICFG_EESIZE_8KAR5K_PCICFG_EESIZE_8K 1 reg.h 8K
12701
 AR5K_PCICFG_EESIZE_16KAR5K_PCICFG_EESIZE_16K 2 reg.h 16K
12702
 AR5K_PCICFG_EESIZE_FAILAR5K_PCICFG_EESIZE_FAIL 3 reg.h Failed to get size [5211+]
12703
 AR5K_PCICFG_LEDAR5K_PCICFG_LED 0x00000060 reg.h Led status [5211+]
12704
 AR5K_PCICFG_LED_NONEAR5K_PCICFG_LED_NONE 0x00000000 reg.h Default [5211+]
12705
 AR5K_PCICFG_LED_PENDAR5K_PCICFG_LED_PEND 0x00000020 reg.h Scan / Auth pending
12706
 AR5K_PCICFG_LED_ASSOCAR5K_PCICFG_LED_ASSOC 0x00000040 reg.h Associated
12707
 AR5K_PCICFG_BUS_SELAR5K_PCICFG_BUS_SEL 0x00000380 reg.h Mask for "bus select" [5211+] (?)
12708
 AR5K_PCICFG_CBEFIX_DISAR5K_PCICFG_CBEFIX_DIS 0x00000400 reg.h Disable CBE fix
12709
 AR5K_PCICFG_SL_INTENAR5K_PCICFG_SL_INTEN 0x00000800 reg.h Enable interrupts when asleep
12710
 AR5K_PCICFG_LED_BCTLAR5K_PCICFG_LED_BCTL 0x00001000 reg.h Led blink (?) [5210]
12711
 AR5K_PCICFG_RETRY_FIXAR5K_PCICFG_RETRY_FIX 0x00001000 reg.h Enable pci core retry fix
12712
 AR5K_PCICFG_SL_INPENAR5K_PCICFG_SL_INPEN 0x00002000 reg.h Sleep even whith pending interrupts
12713
 AR5K_PCICFG_SPWR_DNAR5K_PCICFG_SPWR_DN 0x00010000 reg.h Mask for power status
12714
 AR5K_PCICFG_LEDMODEAR5K_PCICFG_LEDMODE 0x000e0000 reg.h Ledmode [5211+]
12715
 AR5K_PCICFG_LEDMODE_PROPAR5K_PCICFG_LEDMODE_PROP 0x00000000 reg.h Blink on standard traffic [5211+]
12716
 AR5K_PCICFG_LEDMODE_PROMAR5K_PCICFG_LEDMODE_PROM 0x00020000 reg.h Default mode (blink on any traffic) [5211+]
12717
 AR5K_PCICFG_LEDMODE_PWRAR5K_PCICFG_LEDMODE_PWR 0x00040000 reg.h Some other blinking mode (?) [5211+]
12718
 AR5K_PCICFG_LEDMODE_RANDAR5K_PCICFG_LEDMODE_RAND 0x00060000 reg.h Random blinking (?) [5211+]
12719
 AR5K_PCICFG_LEDBLINKAR5K_PCICFG_LEDBLINK 0x00700000 reg.h Led blink rate
12720
 AR5K_PCICFG_LEDBLINK_SAR5K_PCICFG_LEDBLINK_S 20 reg.h 　
12721
 AR5K_PCICFG_LEDSLOWAR5K_PCICFG_LEDSLOW 0x00800000 reg.h Slowest led blink rate [5211+]
12722
 AR5K_PCICFG_LEDSTATEAR5K_PCICFG_LEDSTATE (AR5K_PCICFG_LED | AR5K_PCICFG_LEDMODE | \ AR5K_PCICFG_LEDBLINK | AR5K_PCICFG_LEDSLOW) reg.h 　
12723
 AR5K_PCICFG_SLEEP_CLOCK_RATEAR5K_PCICFG_SLEEP_CLOCK_RATE 0x03000000 reg.h Sleep clock rate
12724
 AR5K_PCICFG_SLEEP_CLOCK_RATE_SAR5K_PCICFG_SLEEP_CLOCK_RATE_S 24 reg.h 　
12725
 AR5K_NUM_GPIOAR5K_NUM_GPIO 6 reg.h 　
12726
 AR5K_GPIOCRAR5K_GPIOCR 0x4014 reg.h Register Address
12727
 AR5K_GPIOCR_INT_ENAAR5K_GPIOCR_INT_ENA 0x00008000 reg.h Enable GPIO interrupt
12728
 AR5K_GPIOCR_INT_SELLAR5K_GPIOCR_INT_SELL 0x00000000 reg.h Generate interrupt when pin is low
12729
 AR5K_GPIOCR_INT_SELHAR5K_GPIOCR_INT_SELH 0x00010000 reg.h Generate interrupt when pin is high
12730
 AR5K_GPIODOAR5K_GPIODO 0x4018 reg.h 　
12731
 AR5K_GPIODIAR5K_GPIODI 0x401c reg.h 　
12732
 AR5K_GPIODI_MAR5K_GPIODI_M 0x0000002f reg.h 　
12733
 AR5K_SREVAR5K_SREV 0x4020 reg.h Register Address
12734
 AR5K_SREV_REVAR5K_SREV_REV 0x0000000f reg.h Mask for revision
12735
 AR5K_SREV_REV_SAR5K_SREV_REV_S 0 reg.h 　
12736
 AR5K_SREV_VERAR5K_SREV_VER 0x000000ff reg.h Mask for version
12737
 AR5K_SREV_VER_SAR5K_SREV_VER_S 4 reg.h 　
12738
 AR5K_TXEPOSTAR5K_TXEPOST 0x4028 reg.h 　
12739
 AR5K_QCU_SLEEP_MASKAR5K_QCU_SLEEP_MASK 0x402c reg.h 　
12740
 AR5K_5414_CBCFGAR5K_5414_CBCFG 0x4068 reg.h 　
12741
 AR5K_5414_CBCFG_BUF_DISAR5K_5414_CBCFG_BUF_DIS 0x10 reg.h Disable buffer
12742
 AR5K_PCIE_PM_CTLAR5K_PCIE_PM_CTL 0x4068 reg.h Register address
12743
 AR5K_PCIE_PM_CTL_L1_WHEN_D2AR5K_PCIE_PM_CTL_L1_WHEN_D2 0x00000001 reg.h enable PCIe core enter L1
12744
 AR5K_PCIE_PM_CTL_L0_L0S_CLEARAR5K_PCIE_PM_CTL_L0_L0S_CLEAR 0x00000002 reg.h Clear L0 and L0S counters
12745
 AR5K_PCIE_PM_CTL_L0_L0S_ENAR5K_PCIE_PM_CTL_L0_L0S_EN 0x00000004 reg.h Start L0 nd L0S counters
12746
 AR5K_PCIE_PM_CTL_LDRESET_ENAR5K_PCIE_PM_CTL_LDRESET_EN 0x00000008 reg.h Enable reset when link goes
12747
 AR5K_PCIE_PM_CTL_PME_ENAR5K_PCIE_PM_CTL_PME_EN 0x00000010 reg.h PME Enable
12748
 AR5K_PCIE_PM_CTL_AUX_PWR_DETAR5K_PCIE_PM_CTL_AUX_PWR_DET 0x00000020 reg.h Aux power detect
12749
 AR5K_PCIE_PM_CTL_PME_CLEARAR5K_PCIE_PM_CTL_PME_CLEAR 0x00000040 reg.h Clear PME
12750
 AR5K_PCIE_PM_CTL_PSM_D0AR5K_PCIE_PM_CTL_PSM_D0 0x00000080 reg.h 　
12751
 AR5K_PCIE_PM_CTL_PSM_D1AR5K_PCIE_PM_CTL_PSM_D1 0x00000100 reg.h 　
12752
 AR5K_PCIE_PM_CTL_PSM_D2AR5K_PCIE_PM_CTL_PSM_D2 0x00000200 reg.h 　
12753
 AR5K_PCIE_PM_CTL_PSM_D3AR5K_PCIE_PM_CTL_PSM_D3 0x00000400 reg.h 　
12754
 AR5K_PCIE_WAENAR5K_PCIE_WAEN 0x407c reg.h 　
12755
 AR5K_PCIE_SERDESAR5K_PCIE_SERDES 0x4080 reg.h 　
12756
 AR5K_PCIE_SERDES_RESETAR5K_PCIE_SERDES_RESET 0x4084 reg.h 　
12757
 AR5K_EEPROM_BASEAR5K_EEPROM_BASE 0x6000 reg.h 　
12758
 AR5K_EEPROM_DATA_5211AR5K_EEPROM_DATA_5211 0x6004 reg.h 　
12759
 AR5K_EEPROM_DATA_5210AR5K_EEPROM_DATA_5210 0x6800 reg.h 　
12760
 AR5K_EEPROM_DATAAR5K_EEPROM_DATA (ah->ah_version == AR5K_AR5210 ? \ AR5K_EEPROM_DATA_5210 : AR5K_EEPROM_DATA_5211) reg.h 　
12761
 AR5K_EEPROM_CMDAR5K_EEPROM_CMD 0x6008 reg.h Register Addres
12762
 AR5K_EEPROM_CMD_READAR5K_EEPROM_CMD_READ 0x00000001 reg.h EEPROM read
12763
 AR5K_EEPROM_CMD_WRITEAR5K_EEPROM_CMD_WRITE 0x00000002 reg.h EEPROM write
12764
 AR5K_EEPROM_CMD_RESETAR5K_EEPROM_CMD_RESET 0x00000004 reg.h EEPROM reset
12765
 AR5K_EEPROM_STAT_5210AR5K_EEPROM_STAT_5210 0x6c00 reg.h Register Address [5210]
12766
 AR5K_EEPROM_STAT_5211AR5K_EEPROM_STAT_5211 0x600c reg.h Register Address [5211+]
12767
 AR5K_EEPROM_STATUSAR5K_EEPROM_STATUS (ah->ah_version == AR5K_AR5210 ? \ AR5K_EEPROM_STAT_5210 : AR5K_EEPROM_STAT_5211) reg.h 　
12768
 AR5K_EEPROM_STAT_RDERRAR5K_EEPROM_STAT_RDERR 0x00000001 reg.h EEPROM read failed
12769
 AR5K_EEPROM_STAT_RDDONEAR5K_EEPROM_STAT_RDDONE 0x00000002 reg.h EEPROM read successful
12770
 AR5K_EEPROM_STAT_WRERRAR5K_EEPROM_STAT_WRERR 0x00000004 reg.h EEPROM write failed
12771
 AR5K_EEPROM_STAT_WRDONEAR5K_EEPROM_STAT_WRDONE 0x00000008 reg.h EEPROM write successful
12772
 AR5K_EEPROM_CFGAR5K_EEPROM_CFG 0x6010 reg.h Register Addres
12773
 AR5K_EEPROM_CFG_SIZEAR5K_EEPROM_CFG_SIZE 0x00000003 reg.h Size determination override
12774
 AR5K_EEPROM_CFG_SIZE_AUTOAR5K_EEPROM_CFG_SIZE_AUTO 0 reg.h 　
12775
 AR5K_EEPROM_CFG_SIZE_4KBITAR5K_EEPROM_CFG_SIZE_4KBIT 1 reg.h 　
12776
 AR5K_EEPROM_CFG_SIZE_8KBITAR5K_EEPROM_CFG_SIZE_8KBIT 2 reg.h 　
12777
 AR5K_EEPROM_CFG_SIZE_16KBITAR5K_EEPROM_CFG_SIZE_16KBIT 3 reg.h 　
12778
 AR5K_EEPROM_CFG_WR_WAIT_DISAR5K_EEPROM_CFG_WR_WAIT_DIS 0x00000004 reg.h Disable write wait
12779
 AR5K_EEPROM_CFG_CLK_RATEAR5K_EEPROM_CFG_CLK_RATE 0x00000018 reg.h Clock rate
12780
 AR5K_EEPROM_CFG_CLK_RATE_SAR5K_EEPROM_CFG_CLK_RATE_S 3 reg.h 　
12781
 AR5K_EEPROM_CFG_CLK_RATE_156KHZAR5K_EEPROM_CFG_CLK_RATE_156KHZ 0 reg.h 　
12782
 AR5K_EEPROM_CFG_CLK_RATE_312KHZAR5K_EEPROM_CFG_CLK_RATE_312KHZ 1 reg.h 　
12783
 AR5K_EEPROM_CFG_CLK_RATE_625KHZAR5K_EEPROM_CFG_CLK_RATE_625KHZ 2 reg.h 　
12784
 AR5K_EEPROM_CFG_PROT_KEYAR5K_EEPROM_CFG_PROT_KEY 0x00ffff00 reg.h Protection key
12785
 AR5K_EEPROM_CFG_PROT_KEY_SAR5K_EEPROM_CFG_PROT_KEY_S 8 reg.h 　
12786
 AR5K_EEPROM_CFG_LIND_ENAR5K_EEPROM_CFG_LIND_EN 0x01000000 reg.h Enable length indicator (?)
12787
 AR5K_PCU_MINAR5K_PCU_MIN 0x8000 reg.h 　
12788
 AR5K_PCU_MAXAR5K_PCU_MAX 0x8fff reg.h 　
12789
 AR5K_STA_ID0AR5K_STA_ID0 0x8000 reg.h 　
12790
 AR5K_STA_ID0_ARRD_L32AR5K_STA_ID0_ARRD_L32 0xffffffff reg.h 　
12791
 AR5K_STA_ID1AR5K_STA_ID1 0x8004 reg.h Register Address
12792
 AR5K_STA_ID1_ADDR_U16AR5K_STA_ID1_ADDR_U16 0x0000ffff reg.h Upper 16 bits of MAC addres
12793
 AR5K_STA_ID1_APAR5K_STA_ID1_AP 0x00010000 reg.h Set AP mode
12794
 AR5K_STA_ID1_ADHOCAR5K_STA_ID1_ADHOC 0x00020000 reg.h Set Ad-Hoc mode
12795
 AR5K_STA_ID1_PWR_SVAR5K_STA_ID1_PWR_SV 0x00040000 reg.h Power save reporting
12796
 AR5K_STA_ID1_NO_KEYSRCHAR5K_STA_ID1_NO_KEYSRCH 0x00080000 reg.h No key search
12797
 AR5K_STA_ID1_NO_PSPOLLAR5K_STA_ID1_NO_PSPOLL 0x00100000 reg.h No power save polling [5210]
12798
 AR5K_STA_ID1_PCF_5211AR5K_STA_ID1_PCF_5211 0x00100000 reg.h Enable PCF on [5211+]
12799
 AR5K_STA_ID1_PCF_5210AR5K_STA_ID1_PCF_5210 0x00200000 reg.h Enable PCF on [5210]
12800
 AR5K_STA_ID1_PCFAR5K_STA_ID1_PCF (ah->ah_version == AR5K_AR5210 ? \ AR5K_STA_ID1_PCF_5210 : AR5K_STA_ID1_PCF_5211) reg.h 　
12801
 AR5K_STA_ID1_DEFAULT_ANTENNAAR5K_STA_ID1_DEFAULT_ANTENNA 0x00200000 reg.h Use default antenna
12802
 AR5K_STA_ID1_DESC_ANTENNAAR5K_STA_ID1_DESC_ANTENNA 0x00400000 reg.h Update antenna from descriptor
12803
 AR5K_STA_ID1_RTS_DEF_ANTENNAAR5K_STA_ID1_RTS_DEF_ANTENNA 0x00800000 reg.h Use default antenna for RTS
12804
 AR5K_STA_ID1_ACKCTS_6MBAR5K_STA_ID1_ACKCTS_6MB 0x01000000 reg.h Use 6Mbit/s for ACK/CTS
12805
 AR5K_STA_ID1_BASE_RATE_11BAR5K_STA_ID1_BASE_RATE_11B 0x02000000 reg.h Use 11b base rate for ACK/CTS [5211+]
12806
 AR5K_STA_ID1_SELFGEN_DEF_ANTAR5K_STA_ID1_SELFGEN_DEF_ANT 0x04000000 reg.h Use def. antenna for self generated frames
12807
 AR5K_STA_ID1_CRYPT_MIC_ENAR5K_STA_ID1_CRYPT_MIC_EN 0x08000000 reg.h Enable MIC
12808
 AR5K_STA_ID1_KEYSRCH_MODEAR5K_STA_ID1_KEYSRCH_MODE 0x10000000 reg.h Look up key when key id != 0
12809
 AR5K_STA_ID1_PRESERVE_SEQ_NUMAR5K_STA_ID1_PRESERVE_SEQ_NUM 0x20000000 reg.h Preserve sequence number
12810
 AR5K_STA_ID1_CBCIV_ENDIANAR5K_STA_ID1_CBCIV_ENDIAN 0x40000000 reg.h ???
12811
 AR5K_STA_ID1_KEYSRCH_MCASTAR5K_STA_ID1_KEYSRCH_MCAST 0x80000000 reg.h Do key cache search for mcast frames
12812
 AR5K_BSS_ID0AR5K_BSS_ID0 0x8008 reg.h 　
12813
 AR5K_BSS_ID1AR5K_BSS_ID1 0x800c reg.h 　
12814
 AR5K_BSS_ID1_AIDAR5K_BSS_ID1_AID 0xffff0000 reg.h 　
12815
 AR5K_BSS_ID1_AID_SAR5K_BSS_ID1_AID_S 16 reg.h 　
12816
 AR5K_SLOT_TIMEAR5K_SLOT_TIME 0x8010 reg.h 　
12817
 AR5K_TIME_OUTAR5K_TIME_OUT 0x8014 reg.h Register Address
12818
 AR5K_TIME_OUT_ACKAR5K_TIME_OUT_ACK 0x00001fff reg.h ACK timeout mask
12819
 AR5K_TIME_OUT_ACK_SAR5K_TIME_OUT_ACK_S 0 reg.h 　
12820
 AR5K_TIME_OUT_CTSAR5K_TIME_OUT_CTS 0x1fff0000 reg.h CTS timeout mask
12821
 AR5K_TIME_OUT_CTS_SAR5K_TIME_OUT_CTS_S 16 reg.h 　
12822
 AR5K_RSSI_THRAR5K_RSSI_THR 0x8018 reg.h Register Address
12823
 AR5K_RSSI_THR_MAR5K_RSSI_THR_M 0x000000ff reg.h Mask for RSSI threshold [5211+]
12824
 AR5K_RSSI_THR_BMISS_5210AR5K_RSSI_THR_BMISS_5210 0x00000700 reg.h Mask for Beacon Missed threshold [5210]
12825
 AR5K_RSSI_THR_BMISS_5210_SAR5K_RSSI_THR_BMISS_5210_S 8 reg.h 　
12826
 AR5K_RSSI_THR_BMISS_5211AR5K_RSSI_THR_BMISS_5211 0x0000ff00 reg.h Mask for Beacon Missed threshold [5211+]
12827
 AR5K_RSSI_THR_BMISS_5211_SAR5K_RSSI_THR_BMISS_5211_S 8 reg.h 　
12828
 AR5K_RSSI_THR_BMISSAR5K_RSSI_THR_BMISS (ah->ah_version == AR5K_AR5210 ? \ AR5K_RSSI_THR_BMISS_5210 : AR5K_RSSI_THR_BMISS_5211) reg.h 　
12829
 AR5K_RSSI_THR_BMISS_SAR5K_RSSI_THR_BMISS_S 8 reg.h 　
12830
 AR5K_NODCU_RETRY_LMTAR5K_NODCU_RETRY_LMT 0x801c reg.h Register Address
12831
 AR5K_NODCU_RETRY_LMT_SH_RETRYAR5K_NODCU_RETRY_LMT_SH_RETRY 0x0000000f reg.h Short retry limit mask
12832
 AR5K_NODCU_RETRY_LMT_SH_RETRY_SAR5K_NODCU_RETRY_LMT_SH_RETRY_S 0 reg.h 　
12833
 AR5K_NODCU_RETRY_LMT_LG_RETRYAR5K_NODCU_RETRY_LMT_LG_RETRY 0x000000f0 reg.h Long retry mask
12834
 AR5K_NODCU_RETRY_LMT_LG_RETRY_SAR5K_NODCU_RETRY_LMT_LG_RETRY_S 4 reg.h 　
12835
 AR5K_NODCU_RETRY_LMT_SSH_RETRYAR5K_NODCU_RETRY_LMT_SSH_RETRY 0x00003f00 reg.h Station short retry limit mask
12836
 AR5K_NODCU_RETRY_LMT_SSH_RETRY_AR5K_NODCU_RETRY_LMT_SSH_RETRY_ 8 reg.h 　
12837
 AR5K_NODCU_RETRY_LMT_SLG_RETRYAR5K_NODCU_RETRY_LMT_SLG_RETRY 0x000fc000 reg.h Station long retry limit mask
12838
 AR5K_NODCU_RETRY_LMT_SLG_RETRY_AR5K_NODCU_RETRY_LMT_SLG_RETRY_ 14 reg.h 　
12839
 AR5K_NODCU_RETRY_LMT_CW_MINAR5K_NODCU_RETRY_LMT_CW_MIN 0x3ff00000 reg.h Minimum contention window mask
12840
 AR5K_NODCU_RETRY_LMT_CW_MIN_SAR5K_NODCU_RETRY_LMT_CW_MIN_S 20 reg.h 　
12841
 AR5K_USEC_5210AR5K_USEC_5210 0x8020 reg.h Register Address [5210]
12842
 AR5K_USEC_5211AR5K_USEC_5211 0x801c reg.h Register Address [5211+]
12843
 AR5K_USECAR5K_USEC (ah->ah_version == AR5K_AR5210 ? \ AR5K_USEC_5210 : AR5K_USEC_5211) reg.h 　
12844
 AR5K_USEC_1AR5K_USEC_1 0x0000007f reg.h clock cycles for 1us
12845
 AR5K_USEC_1_SAR5K_USEC_1_S 0 reg.h 　
12846
 AR5K_USEC_32AR5K_USEC_32 0x00003f80 reg.h clock cycles for 1us while on 32Mhz clock
12847
 AR5K_USEC_32_SAR5K_USEC_32_S 7 reg.h 　
12848
 AR5K_USEC_TX_LATENCY_5211AR5K_USEC_TX_LATENCY_5211 0x007fc000 reg.h 　
12849
 AR5K_USEC_TX_LATENCY_5211_SAR5K_USEC_TX_LATENCY_5211_S 14 reg.h 　
12850
 AR5K_USEC_RX_LATENCY_5211AR5K_USEC_RX_LATENCY_5211 0x1f800000 reg.h 　
12851
 AR5K_USEC_RX_LATENCY_5211_SAR5K_USEC_RX_LATENCY_5211_S 23 reg.h 　
12852
 AR5K_USEC_TX_LATENCY_5210AR5K_USEC_TX_LATENCY_5210 0x000fc000 reg.h also for 5311
12853
 AR5K_USEC_TX_LATENCY_5210_SAR5K_USEC_TX_LATENCY_5210_S 14 reg.h 　
12854
 AR5K_USEC_RX_LATENCY_5210AR5K_USEC_RX_LATENCY_5210 0x03f00000 reg.h also for 5311
12855
 AR5K_USEC_RX_LATENCY_5210_SAR5K_USEC_RX_LATENCY_5210_S 20 reg.h 　
12856
 AR5K_BEACON_5210AR5K_BEACON_5210 0x8024 reg.h Register Address [5210]
12857
 AR5K_BEACON_5211AR5K_BEACON_5211 0x8020 reg.h Register Address [5211+]
12858
 AR5K_BEACONAR5K_BEACON (ah->ah_version == AR5K_AR5210 ? \ AR5K_BEACON_5210 : AR5K_BEACON_5211) reg.h 　
12859
 AR5K_BEACON_PERIODAR5K_BEACON_PERIOD 0x0000ffff reg.h Mask for beacon period
12860
 AR5K_BEACON_PERIOD_SAR5K_BEACON_PERIOD_S 0 reg.h 　
12861
 AR5K_BEACON_TIMAR5K_BEACON_TIM 0x007f0000 reg.h Mask for TIM offset
12862
 AR5K_BEACON_TIM_SAR5K_BEACON_TIM_S 16 reg.h 　
12863
 AR5K_BEACON_ENABLEAR5K_BEACON_ENABLE 0x00800000 reg.h Enable beacons
12864
 AR5K_BEACON_RESET_TSFAR5K_BEACON_RESET_TSF 0x01000000 reg.h Force TSF reset
12865
 AR5K_CFP_PERIOD_5210AR5K_CFP_PERIOD_5210 0x8028 reg.h 　
12866
 AR5K_CFP_PERIOD_5211AR5K_CFP_PERIOD_5211 0x8024 reg.h 　
12867
 AR5K_CFP_PERIODAR5K_CFP_PERIOD (ah->ah_version == AR5K_AR5210 ? \ AR5K_CFP_PERIOD_5210 : AR5K_CFP_PERIOD_5211) reg.h 　
12868
 AR5K_TIMER0_5210AR5K_TIMER0_5210 0x802c reg.h 　
12869
 AR5K_TIMER0_5211AR5K_TIMER0_5211 0x8028 reg.h 　
12870
 AR5K_TIMER0AR5K_TIMER0 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER0_5210 : AR5K_TIMER0_5211) reg.h 　
12871
 AR5K_TIMER1_5210AR5K_TIMER1_5210 0x8030 reg.h 　
12872
 AR5K_TIMER1_5211AR5K_TIMER1_5211 0x802c reg.h 　
12873
 AR5K_TIMER1AR5K_TIMER1 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER1_5210 : AR5K_TIMER1_5211) reg.h 　
12874
 AR5K_TIMER2_5210AR5K_TIMER2_5210 0x8034 reg.h 　
12875
 AR5K_TIMER2_5211AR5K_TIMER2_5211 0x8030 reg.h 　
12876
 AR5K_TIMER2AR5K_TIMER2 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER2_5210 : AR5K_TIMER2_5211) reg.h 　
12877
 AR5K_TIMER3_5210AR5K_TIMER3_5210 0x8038 reg.h 　
12878
 AR5K_TIMER3_5211AR5K_TIMER3_5211 0x8034 reg.h 　
12879
 AR5K_TIMER3AR5K_TIMER3 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER3_5210 : AR5K_TIMER3_5211) reg.h 　
12880
 AR5K_IFS0AR5K_IFS0 0x8040 reg.h 　
12881
 AR5K_IFS0_SIFSAR5K_IFS0_SIFS 0x000007ff reg.h 　
12882
 AR5K_IFS0_SIFS_SAR5K_IFS0_SIFS_S 0 reg.h 　
12883
 AR5K_IFS0_DIFSAR5K_IFS0_DIFS 0x007ff800 reg.h 　
12884
 AR5K_IFS0_DIFS_SAR5K_IFS0_DIFS_S 11 reg.h 　
12885
 AR5K_IFS1AR5K_IFS1 0x8044 reg.h 　
12886
 AR5K_IFS1_PIFSAR5K_IFS1_PIFS 0x00000fff reg.h 　
12887
 AR5K_IFS1_PIFS_SAR5K_IFS1_PIFS_S 0 reg.h 　
12888
 AR5K_IFS1_EIFSAR5K_IFS1_EIFS 0x03fff000 reg.h 　
12889
 AR5K_IFS1_EIFS_SAR5K_IFS1_EIFS_S 12 reg.h 　
12890
 AR5K_IFS1_CS_ENAR5K_IFS1_CS_EN 0x04000000 reg.h 　
12891
 AR5K_CFP_DUR_5210AR5K_CFP_DUR_5210 0x8048 reg.h 　
12892
 AR5K_CFP_DUR_5211AR5K_CFP_DUR_5211 0x8038 reg.h 　
12893
 AR5K_CFP_DURAR5K_CFP_DUR (ah->ah_version == AR5K_AR5210 ? \ AR5K_CFP_DUR_5210 : AR5K_CFP_DUR_5211) reg.h 　
12894
 AR5K_RX_FILTER_5210AR5K_RX_FILTER_5210 0x804c reg.h Register Address [5210]
12895
 AR5K_RX_FILTER_5211AR5K_RX_FILTER_5211 0x803c reg.h Register Address [5211+]
12896
 AR5K_RX_FILTERAR5K_RX_FILTER (ah->ah_version == AR5K_AR5210 ? \ AR5K_RX_FILTER_5210 : AR5K_RX_FILTER_5211) reg.h 　
12897
 AR5K_RX_FILTER_UCASTAR5K_RX_FILTER_UCAST 0x00000001 reg.h Don't filter unicast frames
12898
 AR5K_RX_FILTER_MCASTAR5K_RX_FILTER_MCAST 0x00000002 reg.h Don't filter multicast frames
12899
 AR5K_RX_FILTER_BCASTAR5K_RX_FILTER_BCAST 0x00000004 reg.h Don't filter broadcast frames
12900
 AR5K_RX_FILTER_CONTROLAR5K_RX_FILTER_CONTROL 0x00000008 reg.h Don't filter control frames
12901
 AR5K_RX_FILTER_BEACONAR5K_RX_FILTER_BEACON 0x00000010 reg.h Don't filter beacon frames
12902
 AR5K_RX_FILTER_PROMAR5K_RX_FILTER_PROM 0x00000020 reg.h Set promiscuous mode
12903
 AR5K_RX_FILTER_XRPOLLAR5K_RX_FILTER_XRPOLL 0x00000040 reg.h Don't filter XR poll frame [5212+]
12904
 AR5K_RX_FILTER_PROBEREQAR5K_RX_FILTER_PROBEREQ 0x00000080 reg.h Don't filter probe requests [5212+]
12905
 AR5K_RX_FILTER_PHYERR_5212AR5K_RX_FILTER_PHYERR_5212 0x00000100 reg.h Don't filter phy errors [5212+]
12906
 AR5K_RX_FILTER_RADARERR_5212AR5K_RX_FILTER_RADARERR_5212 0x00000200 reg.h Don't filter phy radar errors [5212+]
12907
 AR5K_RX_FILTER_PHYERR_5211AR5K_RX_FILTER_PHYERR_5211 0x00000040 reg.h [5211]
12908
 AR5K_RX_FILTER_RADARERR_5211AR5K_RX_FILTER_RADARERR_5211 0x00000080 reg.h [5211]
12909
 AR5K_RX_FILTER_PHYERRAR5K_RX_FILTER_PHYERR ((ah->ah_version == AR5K_AR5211 ? \ AR5K_RX_FILTER_PHYERR_5211 : AR5K_RX_FILTER_PHYERR_5212)) reg.h 　
12910
 AR5K_RX_FILTER_RADARERRAR5K_RX_FILTER_RADARERR ((ah->ah_version == AR5K_AR5211 ? \ AR5K_RX_FILTER_RADARERR_5211 : AR5K_RX_FILTER_RADARERR_5212)) reg.h 　
12911
 AR5K_MCAST_FILTER0_5210AR5K_MCAST_FILTER0_5210 0x8050 reg.h 　
12912
 AR5K_MCAST_FILTER0_5211AR5K_MCAST_FILTER0_5211 0x8040 reg.h 　
12913
 AR5K_MCAST_FILTER0AR5K_MCAST_FILTER0 (ah->ah_version == AR5K_AR5210 ? \ AR5K_MCAST_FILTER0_5210 : AR5K_MCAST_FILTER0_5211) reg.h 　
12914
 AR5K_MCAST_FILTER1_5210AR5K_MCAST_FILTER1_5210 0x8054 reg.h 　
12915
 AR5K_MCAST_FILTER1_5211AR5K_MCAST_FILTER1_5211 0x8044 reg.h 　
12916
 AR5K_MCAST_FILTER1AR5K_MCAST_FILTER1 (ah->ah_version == AR5K_AR5210 ? \ AR5K_MCAST_FILTER1_5210 : AR5K_MCAST_FILTER1_5211) reg.h 　
12917
 AR5K_TX_MASK0AR5K_TX_MASK0 0x8058 reg.h 　
12918
 AR5K_TX_MASK1AR5K_TX_MASK1 0x805c reg.h 　
12919
 AR5K_CLR_TMASKAR5K_CLR_TMASK 0x8060 reg.h 　
12920
 AR5K_TRIG_LVLAR5K_TRIG_LVL 0x8064 reg.h 　
12921
 AR5K_DIAG_SW_5210AR5K_DIAG_SW_5210 0x8068 reg.h Register Address [5210]
12922
 AR5K_DIAG_SW_5211AR5K_DIAG_SW_5211 0x8048 reg.h Register Address [5211+]
12923
 AR5K_DIAG_SWAR5K_DIAG_SW (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_5210 : AR5K_DIAG_SW_5211) reg.h 　
12924
 AR5K_DIAG_SW_DIS_WEP_ACKAR5K_DIAG_SW_DIS_WEP_ACK 0x00000001 reg.h Disable ACKs if WEP key is invalid
12925
 AR5K_DIAG_SW_DIS_ACKAR5K_DIAG_SW_DIS_ACK 0x00000002 reg.h Disable ACKs
12926
 AR5K_DIAG_SW_DIS_CTSAR5K_DIAG_SW_DIS_CTS 0x00000004 reg.h Disable CTSs
12927
 AR5K_DIAG_SW_DIS_ENCAR5K_DIAG_SW_DIS_ENC 0x00000008 reg.h Disable encryption
12928
 AR5K_DIAG_SW_DIS_DECAR5K_DIAG_SW_DIS_DEC 0x00000010 reg.h Disable decryption
12929
 AR5K_DIAG_SW_DIS_TXAR5K_DIAG_SW_DIS_TX 0x00000020 reg.h Disable transmit [5210]
12930
 AR5K_DIAG_SW_DIS_RX_5210AR5K_DIAG_SW_DIS_RX_5210 0x00000040 reg.h Disable recieve
12931
 AR5K_DIAG_SW_DIS_RX_5211AR5K_DIAG_SW_DIS_RX_5211 0x00000020 reg.h 　
12932
 AR5K_DIAG_SW_DIS_RXAR5K_DIAG_SW_DIS_RX (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_DIS_RX_5210 : AR5K_DIAG_SW_DIS_RX_5211) reg.h 　
12933
 AR5K_DIAG_SW_LOOP_BACK_5210AR5K_DIAG_SW_LOOP_BACK_5210 0x00000080 reg.h Loopback (i guess it goes with DIS_TX) [5210]
12934
 AR5K_DIAG_SW_LOOP_BACK_5211AR5K_DIAG_SW_LOOP_BACK_5211 0x00000040 reg.h 　
12935
 AR5K_DIAG_SW_LOOP_BACKAR5K_DIAG_SW_LOOP_BACK (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_LOOP_BACK_5210 : AR5K_DIAG_SW_LOOP_BACK_5211) reg.h 　
12936
 AR5K_DIAG_SW_CORR_FCS_5210AR5K_DIAG_SW_CORR_FCS_5210 0x00000100 reg.h Corrupted FCS
12937
 AR5K_DIAG_SW_CORR_FCS_5211AR5K_DIAG_SW_CORR_FCS_5211 0x00000080 reg.h 　
12938
 AR5K_DIAG_SW_CORR_FCSAR5K_DIAG_SW_CORR_FCS (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_CORR_FCS_5210 : AR5K_DIAG_SW_CORR_FCS_5211) reg.h 　
12939
 AR5K_DIAG_SW_CHAN_INFO_5210AR5K_DIAG_SW_CHAN_INFO_5210 0x00000200 reg.h Dump channel info
12940
 AR5K_DIAG_SW_CHAN_INFO_5211AR5K_DIAG_SW_CHAN_INFO_5211 0x00000100 reg.h 　
12941
 AR5K_DIAG_SW_CHAN_INFOAR5K_DIAG_SW_CHAN_INFO (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_CHAN_INFO_5210 : AR5K_DIAG_SW_CHAN_INFO_5211) reg.h 　
12942
 AR5K_DIAG_SW_EN_SCRAM_SEED_5210AR5K_DIAG_SW_EN_SCRAM_SEED_5210 0x00000400 reg.h Enable fixed scrambler seed
12943
 AR5K_DIAG_SW_EN_SCRAM_SEED_5211AR5K_DIAG_SW_EN_SCRAM_SEED_5211 0x00000200 reg.h 　
12944
 AR5K_DIAG_SW_EN_SCRAM_SEEDAR5K_DIAG_SW_EN_SCRAM_SEED (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_EN_SCRAM_SEED_5210 : AR5K_DIAG_SW_EN_SCRAM_SEED_5211) reg.h 　
12945
 AR5K_DIAG_SW_ECO_ENABLEAR5K_DIAG_SW_ECO_ENABLE 0x00000400 reg.h [5211+]
12946
 AR5K_DIAG_SW_SCVRAM_SEEDAR5K_DIAG_SW_SCVRAM_SEED 0x0003f800 reg.h [5210]
12947
 AR5K_DIAG_SW_SCRAM_SEED_MAR5K_DIAG_SW_SCRAM_SEED_M 0x0001fc00 reg.h Scrambler seed mask
12948
 AR5K_DIAG_SW_SCRAM_SEED_SAR5K_DIAG_SW_SCRAM_SEED_S 10 reg.h 　
12949
 AR5K_DIAG_SW_DIS_SEQ_INCAR5K_DIAG_SW_DIS_SEQ_INC 0x00040000 reg.h Disable seqnum increment (?)[5210]
12950
 AR5K_DIAG_SW_FRAME_NV0_5210AR5K_DIAG_SW_FRAME_NV0_5210 0x00080000 reg.h 　
12951
 AR5K_DIAG_SW_FRAME_NV0_5211AR5K_DIAG_SW_FRAME_NV0_5211 0x00020000 reg.h Accept frames of non-zero protocol number
12952
 AR5K_DIAG_SW_FRAME_NV0AR5K_DIAG_SW_FRAME_NV0 (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_FRAME_NV0_5210 : AR5K_DIAG_SW_FRAME_NV0_5211) reg.h 　
12953
 AR5K_DIAG_SW_OBSPT_MAR5K_DIAG_SW_OBSPT_M 0x000c0000 reg.h Observation point select (?)
12954
 AR5K_DIAG_SW_OBSPT_SAR5K_DIAG_SW_OBSPT_S 18 reg.h 　
12955
 AR5K_DIAG_SW_RX_CLEAR_HIGHAR5K_DIAG_SW_RX_CLEAR_HIGH 0x0010000 reg.h Force RX Clear high
12956
 AR5K_DIAG_SW_IGNORE_CARR_SENSEAR5K_DIAG_SW_IGNORE_CARR_SENSE 0x0020000 reg.h Ignore virtual carrier sense
12957
 AR5K_DIAG_SW_CHANEL_IDLE_HIGHAR5K_DIAG_SW_CHANEL_IDLE_HIGH 0x0040000 reg.h Force channel idle high
12958
 AR5K_DIAG_SW_PHEAR_MEAR5K_DIAG_SW_PHEAR_ME 0x0080000 reg.h ???
12959
 AR5K_TSF_L32_5210AR5K_TSF_L32_5210 0x806c reg.h 　
12960
 AR5K_TSF_L32_5211AR5K_TSF_L32_5211 0x804c reg.h 　
12961
 AR5K_TSF_L32AR5K_TSF_L32 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TSF_L32_5210 : AR5K_TSF_L32_5211) reg.h 　
12962
 AR5K_TSF_U32_5210AR5K_TSF_U32_5210 0x8070 reg.h 　
12963
 AR5K_TSF_U32_5211AR5K_TSF_U32_5211 0x8050 reg.h 　
12964
 AR5K_TSF_U32AR5K_TSF_U32 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TSF_U32_5210 : AR5K_TSF_U32_5211) reg.h 　
12965
 AR5K_LAST_TSTPAR5K_LAST_TSTP 0x8080 reg.h 　
12966
 AR5K_ADDAC_TESTAR5K_ADDAC_TEST 0x8054 reg.h Register Address
12967
 AR5K_ADDAC_TEST_TXCONTAR5K_ADDAC_TEST_TXCONT 0x00000001 reg.h Test continuous tx
12968
 AR5K_ADDAC_TEST_TST_MODEAR5K_ADDAC_TEST_TST_MODE 0x00000002 reg.h Test mode
12969
 AR5K_ADDAC_TEST_LOOP_ENAR5K_ADDAC_TEST_LOOP_EN 0x00000004 reg.h Enable loop
12970
 AR5K_ADDAC_TEST_LOOP_LENAR5K_ADDAC_TEST_LOOP_LEN 0x00000008 reg.h Loop length (field)
12971
 AR5K_ADDAC_TEST_USE_U8AR5K_ADDAC_TEST_USE_U8 0x00004000 reg.h Use upper 8 bits
12972
 AR5K_ADDAC_TEST_MSBAR5K_ADDAC_TEST_MSB 0x00008000 reg.h State of MSB
12973
 AR5K_ADDAC_TEST_TRIG_SELAR5K_ADDAC_TEST_TRIG_SEL 0x00010000 reg.h Trigger select
12974
 AR5K_ADDAC_TEST_TRIG_PTYAR5K_ADDAC_TEST_TRIG_PTY 0x00020000 reg.h Trigger polarity
12975
 AR5K_ADDAC_TEST_RXCONTAR5K_ADDAC_TEST_RXCONT 0x00040000 reg.h Continuous capture
12976
 AR5K_ADDAC_TEST_CAPTUREAR5K_ADDAC_TEST_CAPTURE 0x00080000 reg.h Begin capture
12977
 AR5K_ADDAC_TEST_TST_ARMAR5K_ADDAC_TEST_TST_ARM 0x00100000 reg.h ARM rx buffer for capture
12978
 AR5K_DEFAULT_ANTENNAAR5K_DEFAULT_ANTENNA 0x8058 reg.h 　
12979
 AR5K_FRAME_CTL_QOSMAR5K_FRAME_CTL_QOSM 0x805c reg.h 　
12980
 AR5K_SEQ_MASKAR5K_SEQ_MASK 0x8060 reg.h 　
12981
 AR5K_RETRY_CNTAR5K_RETRY_CNT 0x8084 reg.h Register Address [5210]
12982
 AR5K_RETRY_CNT_SSHAR5K_RETRY_CNT_SSH 0x0000003f reg.h Station short retry count (?)
12983
 AR5K_RETRY_CNT_SLGAR5K_RETRY_CNT_SLG 0x00000fc0 reg.h Station long retry count (?)
12984
 AR5K_BACKOFFAR5K_BACKOFF 0x8088 reg.h Register Address [5210]
12985
 AR5K_BACKOFF_CWAR5K_BACKOFF_CW 0x000003ff reg.h Backoff Contention Window (?)
12986
 AR5K_BACKOFF_CNTAR5K_BACKOFF_CNT 0x03ff0000 reg.h Backoff count (?)
12987
 AR5K_NAV_5210AR5K_NAV_5210 0x808c reg.h 　
12988
 AR5K_NAV_5211AR5K_NAV_5211 0x8084 reg.h 　
12989
 AR5K_NAVAR5K_NAV (ah->ah_version == AR5K_AR5210 ? \ AR5K_NAV_5210 : AR5K_NAV_5211) reg.h 　
12990
 AR5K_RTS_OK_5210AR5K_RTS_OK_5210 0x8090 reg.h 　
12991
 AR5K_RTS_OK_5211AR5K_RTS_OK_5211 0x8088 reg.h 　
12992
 AR5K_RTS_OKAR5K_RTS_OK (ah->ah_version == AR5K_AR5210 ? \ AR5K_RTS_OK_5210 : AR5K_RTS_OK_5211) reg.h 　
12993
 AR5K_RTS_FAIL_5210AR5K_RTS_FAIL_5210 0x8094 reg.h 　
12994
 AR5K_RTS_FAIL_5211AR5K_RTS_FAIL_5211 0x808c reg.h 　
12995
 AR5K_RTS_FAILAR5K_RTS_FAIL (ah->ah_version == AR5K_AR5210 ? \ AR5K_RTS_FAIL_5210 : AR5K_RTS_FAIL_5211) reg.h 　
12996
 AR5K_ACK_FAIL_5210AR5K_ACK_FAIL_5210 0x8098 reg.h 　
12997
 AR5K_ACK_FAIL_5211AR5K_ACK_FAIL_5211 0x8090 reg.h 　
12998
 AR5K_ACK_FAILAR5K_ACK_FAIL (ah->ah_version == AR5K_AR5210 ? \ AR5K_ACK_FAIL_5210 : AR5K_ACK_FAIL_5211) reg.h 　
12999
 AR5K_FCS_FAIL_5210AR5K_FCS_FAIL_5210 0x809c reg.h 　
13000
 AR5K_FCS_FAIL_5211AR5K_FCS_FAIL_5211 0x8094 reg.h 　
13001
 AR5K_FCS_FAILAR5K_FCS_FAIL (ah->ah_version == AR5K_AR5210 ? \ AR5K_FCS_FAIL_5210 : AR5K_FCS_FAIL_5211) reg.h 　
13002
 AR5K_BEACON_CNT_5210AR5K_BEACON_CNT_5210 0x80a0 reg.h 　
13003
 AR5K_BEACON_CNT_5211AR5K_BEACON_CNT_5211 0x8098 reg.h 　
13004
 AR5K_BEACON_CNTAR5K_BEACON_CNT (ah->ah_version == AR5K_AR5210 ? \ AR5K_BEACON_CNT_5210 : AR5K_BEACON_CNT_5211) reg.h 　
13005
 AR5K_TPCAR5K_TPC 0x80e8 reg.h 　
13006
 AR5K_TPC_ACKAR5K_TPC_ACK 0x0000003f reg.h ack frames
13007
 AR5K_TPC_ACK_SAR5K_TPC_ACK_S 0 reg.h 　
13008
 AR5K_TPC_CTSAR5K_TPC_CTS 0x00003f00 reg.h cts frames
13009
 AR5K_TPC_CTS_SAR5K_TPC_CTS_S 8 reg.h 　
13010
 AR5K_TPC_CHIRPAR5K_TPC_CHIRP 0x003f0000 reg.h chirp frames
13011
 AR5K_TPC_CHIRP_SAR5K_TPC_CHIRP_S 16 reg.h 　
13012
 AR5K_TPC_DOPPLERAR5K_TPC_DOPPLER 0x0f000000 reg.h doppler chirp span
13013
 AR5K_TPC_DOPPLER_SAR5K_TPC_DOPPLER_S 24 reg.h 　
13014
 AR5K_XRMODEAR5K_XRMODE 0x80c0 reg.h Register Address
13015
 AR5K_XRMODE_POLL_TYPE_MAR5K_XRMODE_POLL_TYPE_M 0x0000003f reg.h Mask for Poll type (?)
13016
 AR5K_XRMODE_POLL_TYPE_SAR5K_XRMODE_POLL_TYPE_S 0 reg.h 　
13017
 AR5K_XRMODE_POLL_SUBTYPE_MAR5K_XRMODE_POLL_SUBTYPE_M 0x0000003c reg.h Mask for Poll subtype (?)
13018
 AR5K_XRMODE_POLL_SUBTYPE_SAR5K_XRMODE_POLL_SUBTYPE_S 2 reg.h 　
13019
 AR5K_XRMODE_POLL_WAIT_ALLAR5K_XRMODE_POLL_WAIT_ALL 0x00000080 reg.h Wait for poll
13020
 AR5K_XRMODE_SIFS_DELAYAR5K_XRMODE_SIFS_DELAY 0x000fff00 reg.h Mask for SIFS delay
13021
 AR5K_XRMODE_FRAME_HOLD_MAR5K_XRMODE_FRAME_HOLD_M 0xfff00000 reg.h Mask for frame hold (?)
13022
 AR5K_XRMODE_FRAME_HOLD_SAR5K_XRMODE_FRAME_HOLD_S 20 reg.h 　
13023
 AR5K_XRDELAYAR5K_XRDELAY 0x80c4 reg.h Register Address
13024
 AR5K_XRDELAY_SLOT_DELAY_MAR5K_XRDELAY_SLOT_DELAY_M 0x0000ffff reg.h Mask for slot delay
13025
 AR5K_XRDELAY_SLOT_DELAY_SAR5K_XRDELAY_SLOT_DELAY_S 0 reg.h 　
13026
 AR5K_XRDELAY_CHIRP_DELAY_MAR5K_XRDELAY_CHIRP_DELAY_M 0xffff0000 reg.h Mask for CHIRP data delay
13027
 AR5K_XRDELAY_CHIRP_DELAY_SAR5K_XRDELAY_CHIRP_DELAY_S 16 reg.h 　
13028
 AR5K_XRTIMEOUTAR5K_XRTIMEOUT 0x80c8 reg.h Register Address
13029
 AR5K_XRTIMEOUT_CHIRP_MAR5K_XRTIMEOUT_CHIRP_M 0x0000ffff reg.h Mask for CHIRP timeout
13030
 AR5K_XRTIMEOUT_CHIRP_SAR5K_XRTIMEOUT_CHIRP_S 0 reg.h 　
13031
 AR5K_XRTIMEOUT_POLL_MAR5K_XRTIMEOUT_POLL_M 0xffff0000 reg.h Mask for Poll timeout
13032
 AR5K_XRTIMEOUT_POLL_SAR5K_XRTIMEOUT_POLL_S 16 reg.h 　
13033
 AR5K_XRCHIRPAR5K_XRCHIRP 0x80cc reg.h Register Address
13034
 AR5K_XRCHIRP_SENDAR5K_XRCHIRP_SEND 0x00000001 reg.h Send CHIRP
13035
 AR5K_XRCHIRP_GAPAR5K_XRCHIRP_GAP 0xffff0000 reg.h Mask for CHIRP gap (?)
13036
 AR5K_XRSTOMPAR5K_XRSTOMP 0x80d0 reg.h Register Address
13037
 AR5K_XRSTOMP_TXAR5K_XRSTOMP_TX 0x00000001 reg.h Stomp Tx (?)
13038
 AR5K_XRSTOMP_RXAR5K_XRSTOMP_RX 0x00000002 reg.h Stomp Rx (?)
13039
 AR5K_XRSTOMP_TX_RSSIAR5K_XRSTOMP_TX_RSSI 0x00000004 reg.h Stomp Tx RSSI (?)
13040
 AR5K_XRSTOMP_TX_BSSIDAR5K_XRSTOMP_TX_BSSID 0x00000008 reg.h Stomp Tx BSSID (?)
13041
 AR5K_XRSTOMP_DATAAR5K_XRSTOMP_DATA 0x00000010 reg.h Stomp data (?)
13042
 AR5K_XRSTOMP_RSSI_THRESAR5K_XRSTOMP_RSSI_THRES 0x0000ff00 reg.h Mask for XR RSSI threshold
13043
 AR5K_SLEEP0AR5K_SLEEP0 0x80d4 reg.h Register Address
13044
 AR5K_SLEEP0_NEXT_DTIMAR5K_SLEEP0_NEXT_DTIM 0x0007ffff reg.h Mask for next DTIM (?)
13045
 AR5K_SLEEP0_NEXT_DTIM_SAR5K_SLEEP0_NEXT_DTIM_S 0 reg.h 　
13046
 AR5K_SLEEP0_ASSUME_DTIMAR5K_SLEEP0_ASSUME_DTIM 0x00080000 reg.h Assume DTIM
13047
 AR5K_SLEEP0_ENH_SLEEP_ENAR5K_SLEEP0_ENH_SLEEP_EN 0x00100000 reg.h Enable enchanced sleep control
13048
 AR5K_SLEEP0_CABTOAR5K_SLEEP0_CABTO 0xff000000 reg.h Mask for CAB Time Out
13049
 AR5K_SLEEP0_CABTO_SAR5K_SLEEP0_CABTO_S 24 reg.h 　
13050
 AR5K_SLEEP1AR5K_SLEEP1 0x80d8 reg.h Register Address
13051
 AR5K_SLEEP1_NEXT_TIMAR5K_SLEEP1_NEXT_TIM 0x0007ffff reg.h Mask for next TIM (?)
13052
 AR5K_SLEEP1_NEXT_TIM_SAR5K_SLEEP1_NEXT_TIM_S 0 reg.h 　
13053
 AR5K_SLEEP1_BEACON_TOAR5K_SLEEP1_BEACON_TO 0xff000000 reg.h Mask for Beacon Time Out
13054
 AR5K_SLEEP1_BEACON_TO_SAR5K_SLEEP1_BEACON_TO_S 24 reg.h 　
13055
 AR5K_SLEEP2AR5K_SLEEP2 0x80dc reg.h Register Address
13056
 AR5K_SLEEP2_TIM_PERAR5K_SLEEP2_TIM_PER 0x0000ffff reg.h Mask for TIM period (?)
13057
 AR5K_SLEEP2_TIM_PER_SAR5K_SLEEP2_TIM_PER_S 0 reg.h 　
13058
 AR5K_SLEEP2_DTIM_PERAR5K_SLEEP2_DTIM_PER 0xffff0000 reg.h Mask for DTIM period (?)
13059
 AR5K_SLEEP2_DTIM_PER_SAR5K_SLEEP2_DTIM_PER_S 16 reg.h 　
13060
 AR5K_BSS_IDM0AR5K_BSS_IDM0 0x80e0 reg.h Upper bits
13061
 AR5K_BSS_IDM1AR5K_BSS_IDM1 0x80e4 reg.h Lower bits
13062
 AR5K_TXPCAR5K_TXPC 0x80e8 reg.h Register Address
13063
 AR5K_TXPC_ACK_MAR5K_TXPC_ACK_M 0x0000003f reg.h ACK tx power
13064
 AR5K_TXPC_ACK_SAR5K_TXPC_ACK_S 0 reg.h 　
13065
 AR5K_TXPC_CTS_MAR5K_TXPC_CTS_M 0x00003f00 reg.h CTS tx power
13066
 AR5K_TXPC_CTS_SAR5K_TXPC_CTS_S 8 reg.h 　
13067
 AR5K_TXPC_CHIRP_MAR5K_TXPC_CHIRP_M 0x003f0000 reg.h CHIRP tx power
13068
 AR5K_TXPC_CHIRP_SAR5K_TXPC_CHIRP_S 16 reg.h 　
13069
 AR5K_TXPC_DOPPLERAR5K_TXPC_DOPPLER 0x0f000000 reg.h Doppler chirp span (?)
13070
 AR5K_TXPC_DOPPLER_SAR5K_TXPC_DOPPLER_S 24 reg.h 　
13071
 AR5K_PROFCNT_TXAR5K_PROFCNT_TX 0x80ec reg.h Tx count
13072
 AR5K_PROFCNT_RXAR5K_PROFCNT_RX 0x80f0 reg.h Rx count
13073
 AR5K_PROFCNT_RXCLRAR5K_PROFCNT_RXCLR 0x80f4 reg.h Clear Rx count
13074
 AR5K_PROFCNT_CYCLEAR5K_PROFCNT_CYCLE 0x80f8 reg.h Cycle count (?)
13075
 AR5K_QUIET_CTL1AR5K_QUIET_CTL1 0x80fc reg.h Register Address
13076
 AR5K_QUIET_CTL1_NEXT_QT_TSFAR5K_QUIET_CTL1_NEXT_QT_TSF 0x0000ffff reg.h Next quiet period TSF (TU)
13077
 AR5K_QUIET_CTL1_NEXT_QT_TSF_SAR5K_QUIET_CTL1_NEXT_QT_TSF_S 0 reg.h 　
13078
 AR5K_QUIET_CTL1_QT_ENAR5K_QUIET_CTL1_QT_EN 0x00010000 reg.h Enable quiet period
13079
 AR5K_QUIET_CTL1_ACK_CTS_ENAR5K_QUIET_CTL1_ACK_CTS_EN 0x00020000 reg.h Send ACK/CTS during quiet period
13080
 AR5K_QUIET_CTL2AR5K_QUIET_CTL2 0x8100 reg.h Register Address
13081
 AR5K_QUIET_CTL2_QT_PERAR5K_QUIET_CTL2_QT_PER 0x0000ffff reg.h Mask for quiet period periodicity
13082
 AR5K_QUIET_CTL2_QT_PER_SAR5K_QUIET_CTL2_QT_PER_S 0 reg.h 　
13083
 AR5K_QUIET_CTL2_QT_DURAR5K_QUIET_CTL2_QT_DUR 0xffff0000 reg.h Mask for quiet period duration
13084
 AR5K_QUIET_CTL2_QT_DUR_SAR5K_QUIET_CTL2_QT_DUR_S 16 reg.h 　
13085
 AR5K_TSF_PARMAR5K_TSF_PARM 0x8104 reg.h Register Address
13086
 AR5K_TSF_PARM_INCAR5K_TSF_PARM_INC 0x000000ff reg.h Mask for TSF increment
13087
 AR5K_TSF_PARM_INC_SAR5K_TSF_PARM_INC_S 0 reg.h 　
13088
 AR5K_QOS_NOACKAR5K_QOS_NOACK 0x8108 reg.h Register Address
13089
 AR5K_QOS_NOACK_2BIT_VALUESAR5K_QOS_NOACK_2BIT_VALUES 0x0000000f reg.h ???
13090
 AR5K_QOS_NOACK_2BIT_VALUES_SAR5K_QOS_NOACK_2BIT_VALUES_S 0 reg.h 　
13091
 AR5K_QOS_NOACK_BIT_OFFSETAR5K_QOS_NOACK_BIT_OFFSET 0x00000070 reg.h ???
13092
 AR5K_QOS_NOACK_BIT_OFFSET_SAR5K_QOS_NOACK_BIT_OFFSET_S 4 reg.h 　
13093
 AR5K_QOS_NOACK_BYTE_OFFSETAR5K_QOS_NOACK_BYTE_OFFSET 0x00000180 reg.h ???
13094
 AR5K_QOS_NOACK_BYTE_OFFSET_SAR5K_QOS_NOACK_BYTE_OFFSET_S 7 reg.h 　
13095
 AR5K_PHY_ERR_FILAR5K_PHY_ERR_FIL 0x810c reg.h 　
13096
 AR5K_PHY_ERR_FIL_RADARAR5K_PHY_ERR_FIL_RADAR 0x00000020 reg.h Radar signal
13097
 AR5K_PHY_ERR_FIL_OFDMAR5K_PHY_ERR_FIL_OFDM 0x00020000 reg.h OFDM false detect (ANI)
13098
 AR5K_PHY_ERR_FIL_CCKAR5K_PHY_ERR_FIL_CCK 0x02000000 reg.h CCK false detect (ANI)
13099
 AR5K_XRLAT_TXAR5K_XRLAT_TX 0x8110 reg.h 　
13100
 AR5K_ACKSIFSAR5K_ACKSIFS 0x8114 reg.h Register Address
13101
 AR5K_ACKSIFS_INCAR5K_ACKSIFS_INC 0x00000000 reg.h ACK SIFS Increment (field)
13102
 AR5K_MIC_QOS_CTLAR5K_MIC_QOS_CTL 0x8118 reg.h Register Address
13103
 AR5K_MIC_QOS_CTL_MQ_ENAR5K_MIC_QOS_CTL_MQ_EN 0x00010000 reg.h Enable MIC QoS
13104
 AR5K_MIC_QOS_SELAR5K_MIC_QOS_SEL 0x811c reg.h 　
13105
 AR5K_MISC_MODEAR5K_MISC_MODE 0x8120 reg.h Register Address
13106
 AR5K_MISC_MODE_FBSSID_MATCHAR5K_MISC_MODE_FBSSID_MATCH 0x00000001 reg.h Force BSSID match
13107
 AR5K_MISC_MODE_ACKSIFS_MEMAR5K_MISC_MODE_ACKSIFS_MEM 0x00000002 reg.h ACK SIFS memory (?)
13108
 AR5K_MISC_MODE_COMBINED_MICAR5K_MISC_MODE_COMBINED_MIC 0x00000004 reg.h use rx/tx MIC key
13109
 AR5K_OFDM_FIL_CNTAR5K_OFDM_FIL_CNT 0x8124 reg.h 　
13110
 AR5K_CCK_FIL_CNTAR5K_CCK_FIL_CNT 0x8128 reg.h 　
13111
 AR5K_PHYERR_CNT1AR5K_PHYERR_CNT1 0x812c reg.h 　
13112
 AR5K_PHYERR_CNT1_MASKAR5K_PHYERR_CNT1_MASK 0x8130 reg.h 　
13113
 AR5K_PHYERR_CNT2AR5K_PHYERR_CNT2 0x8134 reg.h 　
13114
 AR5K_PHYERR_CNT2_MASKAR5K_PHYERR_CNT2_MASK 0x8138 reg.h 　
13115
 AR5K_TSF_THRESAR5K_TSF_THRES 0x813c reg.h 　
13116
 AR5K_RATE_ACKSIFS_BASEAR5K_RATE_ACKSIFS_BASE 0x8680 reg.h Register Address
13117
 AR5K_RATE_ACKSIFS_NORMALAR5K_RATE_ACKSIFS_NORMAL 0x00000001 reg.h Normal SIFS (field)
13118
 AR5K_RATE_ACKSIFS_TURBOAR5K_RATE_ACKSIFS_TURBO 0x00000400 reg.h Turbo SIFS (field)
13119
 AR5K_RATE_DUR_BASEAR5K_RATE_DUR_BASE 0x8700 reg.h 　
13120
 AR5K_RATE2DB_BASEAR5K_RATE2DB_BASE 0x87c0 reg.h 　
13121
 AR5K_DB2RATE_BASEAR5K_DB2RATE_BASE 0x87e0 reg.h 　
13122
 AR5K_KEYTABLE_0_5210AR5K_KEYTABLE_0_5210 0x9000 reg.h 　
13123
 AR5K_KEYTABLE_0_5211AR5K_KEYTABLE_0_5211 0x8800 reg.h 　
13124
 AR5K_KEYTABLE_TYPE_40AR5K_KEYTABLE_TYPE_40 0x00000000 reg.h 　
13125
 AR5K_KEYTABLE_TYPE_104AR5K_KEYTABLE_TYPE_104 0x00000001 reg.h 　
13126
 AR5K_KEYTABLE_TYPE_128AR5K_KEYTABLE_TYPE_128 0x00000003 reg.h 　
13127
 AR5K_KEYTABLE_TYPE_TKIPAR5K_KEYTABLE_TYPE_TKIP 0x00000004 reg.h [5212+]
13128
 AR5K_KEYTABLE_TYPE_AESAR5K_KEYTABLE_TYPE_AES 0x00000005 reg.h [5211+]
13129
 AR5K_KEYTABLE_TYPE_CCMAR5K_KEYTABLE_TYPE_CCM 0x00000006 reg.h [5212+]
13130
 AR5K_KEYTABLE_TYPE_NULLAR5K_KEYTABLE_TYPE_NULL 0x00000007 reg.h [5211+]
13131
 AR5K_KEYTABLE_ANTENNAAR5K_KEYTABLE_ANTENNA 0x00000008 reg.h [5212+]
13132
 AR5K_KEYTABLE_VALIDAR5K_KEYTABLE_VALID 0x00008000 reg.h 　
13133
 AR5K_KEYTABLE_MIC_OFFSETAR5K_KEYTABLE_MIC_OFFSET 64 reg.h 　
13134
 AR5K_KEYTABLE_SIZE_5210AR5K_KEYTABLE_SIZE_5210 64 reg.h 　
13135
 AR5K_KEYTABLE_SIZE_5211AR5K_KEYTABLE_SIZE_5211 128 reg.h 　
13136
 AR5K_KEYTABLE_SIZEAR5K_KEYTABLE_SIZE (ah->ah_version == AR5K_AR5210 ? \ AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211) reg.h 　
13137
 AR5K_PHY_BASEAR5K_PHY_BASE 0x9800 reg.h 　
13138
 AR5K_PHY_TST2AR5K_PHY_TST2 0x9800 reg.h Register Address
13139
 AR5K_PHY_TST2_TRIG_SELAR5K_PHY_TST2_TRIG_SEL 0x00000007 reg.h Trigger select (?)
13140
 AR5K_PHY_TST2_TRIGAR5K_PHY_TST2_TRIG 0x00000010 reg.h Trigger (?)
13141
 AR5K_PHY_TST2_CBUS_MODEAR5K_PHY_TST2_CBUS_MODE 0x00000060 reg.h Cardbus mode (?)
13142
 AR5K_PHY_TST2_CLK32AR5K_PHY_TST2_CLK32 0x00000400 reg.h CLK_OUT is CLK32 (32Khz external)
13143
 AR5K_PHY_TST2_CHANCOR_DUMP_ENAR5K_PHY_TST2_CHANCOR_DUMP_EN 0x00000800 reg.h Enable Chancor dump (?)
13144
 AR5K_PHY_TST2_EVEN_CHANCOR_DUMPAR5K_PHY_TST2_EVEN_CHANCOR_DUMP 0x00001000 reg.h Even Chancor dump (?)
13145
 AR5K_PHY_TST2_RFSILENT_ENAR5K_PHY_TST2_RFSILENT_EN 0x00002000 reg.h Enable RFSILENT
13146
 AR5K_PHY_TST2_ALT_RFDATAAR5K_PHY_TST2_ALT_RFDATA 0x00004000 reg.h Alternate RFDATA (5-2GHz switch ?)
13147
 AR5K_PHY_TST2_MINI_OBS_ENAR5K_PHY_TST2_MINI_OBS_EN 0x00008000 reg.h Enable mini OBS (?)
13148
 AR5K_PHY_TST2_RX2_IS_RX5_INVAR5K_PHY_TST2_RX2_IS_RX5_INV 0x00010000 reg.h 2GHz rx path is the 5GHz path inverted (?)
13149
 AR5K_PHY_TST2_SLOW_CLK160AR5K_PHY_TST2_SLOW_CLK160 0x00020000 reg.h Slow CLK160 (?)
13150
 AR5K_PHY_TST2_AGC_OBS_SEL_3AR5K_PHY_TST2_AGC_OBS_SEL_3 0x00040000 reg.h AGC OBS Select 3 (?)
13151
 AR5K_PHY_TST2_BBB_OBS_SELAR5K_PHY_TST2_BBB_OBS_SEL 0x00080000 reg.h BB OBS Select (field ?)
13152
 AR5K_PHY_TST2_ADC_OBS_SELAR5K_PHY_TST2_ADC_OBS_SEL 0x00800000 reg.h ADC OBS Select (field ?)
13153
 AR5K_PHY_TST2_RX_CLR_SELAR5K_PHY_TST2_RX_CLR_SEL 0x08000000 reg.h RX Clear Select (?)
13154
 AR5K_PHY_TST2_FORCE_AGC_CLRAR5K_PHY_TST2_FORCE_AGC_CLR 0x10000000 reg.h Force AGC clear (?)
13155
 AR5K_PHY_SHIFT_2GHZAR5K_PHY_SHIFT_2GHZ 0x00004007 reg.h Used to access 2GHz radios
13156
 AR5K_PHY_SHIFT_5GHZAR5K_PHY_SHIFT_5GHZ 0x00000007 reg.h Used to access 5GHz radios (default)
13157
 AR5K_PHY_TURBOAR5K_PHY_TURBO 0x9804 reg.h Register Address
13158
 AR5K_PHY_TURBO_MODEAR5K_PHY_TURBO_MODE 0x00000001 reg.h Enable turbo mode
13159
 AR5K_PHY_TURBO_SHORTAR5K_PHY_TURBO_SHORT 0x00000002 reg.h Set short symbols to turbo mode
13160
 AR5K_PHY_TURBO_MIMOAR5K_PHY_TURBO_MIMO 0x00000004 reg.h Set turbo for mimo mimo
13161
 AR5K_PHY_AGCAR5K_PHY_AGC 0x9808 reg.h Register Address
13162
 AR5K_PHY_TST1AR5K_PHY_TST1 0x9808 reg.h 　
13163
 AR5K_PHY_AGC_DISABLEAR5K_PHY_AGC_DISABLE 0x08000000 reg.h Disable AGC to A2 (?)
13164
 AR5K_PHY_TST1_TXHOLDAR5K_PHY_TST1_TXHOLD 0x00003800 reg.h Set tx hold (?)
13165
 AR5K_PHY_TST1_TXSRC_SRCAR5K_PHY_TST1_TXSRC_SRC 0x00000002 reg.h Used with bit 7 (?)
13166
 AR5K_PHY_TST1_TXSRC_SRC_SAR5K_PHY_TST1_TXSRC_SRC_S 1 reg.h 　
13167
 AR5K_PHY_TST1_TXSRC_ALTAR5K_PHY_TST1_TXSRC_ALT 0x00000080 reg.h Set input to tsdac (?)
13168
 AR5K_PHY_TST1_TXSRC_ALT_SAR5K_PHY_TST1_TXSRC_ALT_S 7 reg.h 　
13169
 AR5K_PHY_TIMING_3AR5K_PHY_TIMING_3 0x9814 reg.h 　
13170
 AR5K_PHY_TIMING_3_DSC_MANAR5K_PHY_TIMING_3_DSC_MAN 0xfffe0000 reg.h 　
13171
 AR5K_PHY_TIMING_3_DSC_MAN_SAR5K_PHY_TIMING_3_DSC_MAN_S 17 reg.h 　
13172
 AR5K_PHY_TIMING_3_DSC_EXPAR5K_PHY_TIMING_3_DSC_EXP 0x0001e000 reg.h 　
13173
 AR5K_PHY_TIMING_3_DSC_EXP_SAR5K_PHY_TIMING_3_DSC_EXP_S 13 reg.h 　
13174
 AR5K_PHY_CHIP_IDAR5K_PHY_CHIP_ID 0x9818 reg.h 　
13175
 AR5K_PHY_ACTAR5K_PHY_ACT 0x981c reg.h Register Address
13176
 AR5K_PHY_ACT_ENABLEAR5K_PHY_ACT_ENABLE 0x00000001 reg.h Activate PHY
13177
 AR5K_PHY_ACT_DISABLEAR5K_PHY_ACT_DISABLE 0x00000002 reg.h Deactivate PHY
13178
 AR5K_PHY_RF_CTL2AR5K_PHY_RF_CTL2 0x9824 reg.h Register Address
13179
 AR5K_PHY_RF_CTL2_TXF2TXD_STARTAR5K_PHY_RF_CTL2_TXF2TXD_START 0x0000000f reg.h TX frame to TX data start
13180
 AR5K_PHY_RF_CTL2_TXF2TXD_START_AR5K_PHY_RF_CTL2_TXF2TXD_START_ 0 reg.h 　
13181
 AR5K_PHY_RF_CTL3AR5K_PHY_RF_CTL3 0x9828 reg.h Register Address
13182
 AR5K_PHY_RF_CTL3_TXE2XLNA_ONAR5K_PHY_RF_CTL3_TXE2XLNA_ON 0x0000ff00 reg.h TX end to XLNA on
13183
 AR5K_PHY_RF_CTL3_TXE2XLNA_ON_SAR5K_PHY_RF_CTL3_TXE2XLNA_ON_S 8 reg.h 　
13184
 AR5K_PHY_ADC_CTLAR5K_PHY_ADC_CTL 0x982c reg.h 　
13185
 AR5K_PHY_ADC_CTL_INBUFGAIN_OFFAR5K_PHY_ADC_CTL_INBUFGAIN_OFF 0x00000003 reg.h 　
13186
 AR5K_PHY_ADC_CTL_INBUFGAIN_OFF_AR5K_PHY_ADC_CTL_INBUFGAIN_OFF_ 0 reg.h 　
13187
 AR5K_PHY_ADC_CTL_PWD_DAC_OFFAR5K_PHY_ADC_CTL_PWD_DAC_OFF 0x00002000 reg.h 　
13188
 AR5K_PHY_ADC_CTL_PWD_BAND_GAP_OAR5K_PHY_ADC_CTL_PWD_BAND_GAP_O 0x00004000 reg.h 　
13189
 AR5K_PHY_ADC_CTL_PWD_ADC_OFFAR5K_PHY_ADC_CTL_PWD_ADC_OFF 0x00008000 reg.h 　
13190
 AR5K_PHY_ADC_CTL_INBUFGAIN_ONAR5K_PHY_ADC_CTL_INBUFGAIN_ON 0x00030000 reg.h 　
13191
 AR5K_PHY_ADC_CTL_INBUFGAIN_ON_SAR5K_PHY_ADC_CTL_INBUFGAIN_ON_S 16 reg.h 　
13192
 AR5K_PHY_RF_CTL4AR5K_PHY_RF_CTL4 0x9834 reg.h Register Address
13193
 AR5K_PHY_RF_CTL4_TXF2XPA_A_ONAR5K_PHY_RF_CTL4_TXF2XPA_A_ON 0x00000001 reg.h TX frame to XPA A on (field)
13194
 AR5K_PHY_RF_CTL4_TXF2XPA_B_ONAR5K_PHY_RF_CTL4_TXF2XPA_B_ON 0x00000100 reg.h TX frame to XPA B on (field)
13195
 AR5K_PHY_RF_CTL4_TXE2XPA_A_OFFAR5K_PHY_RF_CTL4_TXE2XPA_A_OFF 0x00010000 reg.h TX end to XPA A off (field)
13196
 AR5K_PHY_RF_CTL4_TXE2XPA_B_OFFAR5K_PHY_RF_CTL4_TXE2XPA_B_OFF 0x01000000 reg.h TX end to XPA B off (field)
13197
 AR5K_PHY_PA_CTLAR5K_PHY_PA_CTL 0x9838 reg.h Register Address
13198
 AR5K_PHY_PA_CTL_XPA_A_HIAR5K_PHY_PA_CTL_XPA_A_HI 0x00000001 reg.h XPA A high (?)
13199
 AR5K_PHY_PA_CTL_XPA_B_HIAR5K_PHY_PA_CTL_XPA_B_HI 0x00000002 reg.h XPA B high (?)
13200
 AR5K_PHY_PA_CTL_XPA_A_ENAR5K_PHY_PA_CTL_XPA_A_EN 0x00000004 reg.h Enable XPA A
13201
 AR5K_PHY_PA_CTL_XPA_B_ENAR5K_PHY_PA_CTL_XPA_B_EN 0x00000008 reg.h Enable XPA B
13202
 AR5K_PHY_SETTLINGAR5K_PHY_SETTLING 0x9844 reg.h Register Address
13203
 AR5K_PHY_SETTLING_AGCAR5K_PHY_SETTLING_AGC 0x0000007f reg.h AGC settling time
13204
 AR5K_PHY_SETTLING_AGC_SAR5K_PHY_SETTLING_AGC_S 0 reg.h 　
13205
 AR5K_PHY_SETTLING_SWITCHAR5K_PHY_SETTLING_SWITCH 0x00003f80 reg.h Switch settlig time
13206
 AR5K_PHY_SETTLING_SWITCH_SAR5K_PHY_SETTLING_SWITCH_S 7 reg.h 　
13207
 AR5K_PHY_GAINAR5K_PHY_GAIN 0x9848 reg.h Register Address
13208
 AR5K_PHY_GAIN_TXRX_ATTENAR5K_PHY_GAIN_TXRX_ATTEN 0x0003f000 reg.h TX-RX Attenuation
13209
 AR5K_PHY_GAIN_TXRX_ATTEN_SAR5K_PHY_GAIN_TXRX_ATTEN_S 12 reg.h 　
13210
 AR5K_PHY_GAIN_TXRX_RF_MAXAR5K_PHY_GAIN_TXRX_RF_MAX 0x007c0000 reg.h 　
13211
 AR5K_PHY_GAIN_TXRX_RF_MAX_SAR5K_PHY_GAIN_TXRX_RF_MAX_S 18 reg.h 　
13212
 AR5K_PHY_GAIN_OFFSETAR5K_PHY_GAIN_OFFSET 0x984c reg.h Register Address
13213
 AR5K_PHY_GAIN_OFFSET_RXTX_FLAGAR5K_PHY_GAIN_OFFSET_RXTX_FLAG 0x00020000 reg.h RX-TX flag (?)
13214
 AR5K_PHY_DESIRED_SIZEAR5K_PHY_DESIRED_SIZE 0x9850 reg.h Register Address
13215
 AR5K_PHY_DESIRED_SIZE_ADCAR5K_PHY_DESIRED_SIZE_ADC 0x000000ff reg.h ADC desired size
13216
 AR5K_PHY_DESIRED_SIZE_ADC_SAR5K_PHY_DESIRED_SIZE_ADC_S 0 reg.h 　
13217
 AR5K_PHY_DESIRED_SIZE_PGAAR5K_PHY_DESIRED_SIZE_PGA 0x0000ff00 reg.h PGA desired size
13218
 AR5K_PHY_DESIRED_SIZE_PGA_SAR5K_PHY_DESIRED_SIZE_PGA_S 8 reg.h 　
13219
 AR5K_PHY_DESIRED_SIZE_TOTAR5K_PHY_DESIRED_SIZE_TOT 0x0ff00000 reg.h Total desired size
13220
 AR5K_PHY_DESIRED_SIZE_TOT_SAR5K_PHY_DESIRED_SIZE_TOT_S 20 reg.h 　
13221
 AR5K_PHY_SIGAR5K_PHY_SIG 0x9858 reg.h Register Address
13222
 AR5K_PHY_SIG_FIRSTEPAR5K_PHY_SIG_FIRSTEP 0x0003f000 reg.h FIRSTEP
13223
 AR5K_PHY_SIG_FIRSTEP_SAR5K_PHY_SIG_FIRSTEP_S 12 reg.h 　
13224
 AR5K_PHY_SIG_FIRPWRAR5K_PHY_SIG_FIRPWR 0x03fc0000 reg.h FIPWR
13225
 AR5K_PHY_SIG_FIRPWR_SAR5K_PHY_SIG_FIRPWR_S 18 reg.h 　
13226
 AR5K_PHY_AGCCOARSEAR5K_PHY_AGCCOARSE 0x985c reg.h Register Address
13227
 AR5K_PHY_AGCCOARSE_LOAR5K_PHY_AGCCOARSE_LO 0x00007f80 reg.h AGC Coarse low
13228
 AR5K_PHY_AGCCOARSE_LO_SAR5K_PHY_AGCCOARSE_LO_S 7 reg.h 　
13229
 AR5K_PHY_AGCCOARSE_HIAR5K_PHY_AGCCOARSE_HI 0x003f8000 reg.h AGC Coarse high
13230
 AR5K_PHY_AGCCOARSE_HI_SAR5K_PHY_AGCCOARSE_HI_S 15 reg.h 　
13231
 AR5K_PHY_AGCCTLAR5K_PHY_AGCCTL 0x9860 reg.h Register address
13232
 AR5K_PHY_AGCCTL_CALAR5K_PHY_AGCCTL_CAL 0x00000001 reg.h Enable PHY calibration
13233
 AR5K_PHY_AGCCTL_NFAR5K_PHY_AGCCTL_NF 0x00000002 reg.h Enable Noise Floor calibration
13234
 AR5K_PHY_AGCCTL_NF_ENAR5K_PHY_AGCCTL_NF_EN 0x00008000 reg.h Enable nf calibration to happen (?)
13235
 AR5K_PHY_AGCCTL_NF_NOUPDATEAR5K_PHY_AGCCTL_NF_NOUPDATE 0x00020000 reg.h Don't update nf automaticaly
13236
 AR5K_PHY_NFAR5K_PHY_NF 0x9864 reg.h Register address
13237
 AR5K_PHY_NF_MAR5K_PHY_NF_M 0x000001ff reg.h Noise floor mask
13238
 AR5K_PHY_NF_ACTIVEAR5K_PHY_NF_ACTIVE 0x00000100 reg.h Noise floor calibration still active
13239
 AR5K_PHY_NF_THRESH62AR5K_PHY_NF_THRESH62 0x0007f000 reg.h Thresh62 -check ANI patent- (field)
13240
 AR5K_PHY_NF_THRESH62_SAR5K_PHY_NF_THRESH62_S 12 reg.h 　
13241
 AR5K_PHY_NF_MINCCA_PWRAR5K_PHY_NF_MINCCA_PWR 0x0ff80000 reg.h ???
13242
 AR5K_PHY_NF_MINCCA_PWR_SAR5K_PHY_NF_MINCCA_PWR_S 19 reg.h 　
13243
 AR5K_PHY_ADCSATAR5K_PHY_ADCSAT 0x9868 reg.h 　
13244
 AR5K_PHY_ADCSAT_ICNTAR5K_PHY_ADCSAT_ICNT 0x0001f800 reg.h 　
13245
 AR5K_PHY_ADCSAT_ICNT_SAR5K_PHY_ADCSAT_ICNT_S 11 reg.h 　
13246
 AR5K_PHY_ADCSAT_THRAR5K_PHY_ADCSAT_THR 0x000007e0 reg.h 　
13247
 AR5K_PHY_ADCSAT_THR_SAR5K_PHY_ADCSAT_THR_S 5 reg.h 　
13248
 AR5K_PHY_WEAK_OFDM_HIGH_THRAR5K_PHY_WEAK_OFDM_HIGH_THR 0x9868 reg.h 　
13249
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_ 0x0000001f reg.h 　
13250
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_ 0 reg.h 　
13251
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M1AR5K_PHY_WEAK_OFDM_HIGH_THR_M1 0x00fe0000 reg.h 　
13252
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M1_AR5K_PHY_WEAK_OFDM_HIGH_THR_M1_ 17 reg.h 　
13253
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M2AR5K_PHY_WEAK_OFDM_HIGH_THR_M2 0x7f000000 reg.h 　
13254
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_ 24 reg.h 　
13255
 AR5K_PHY_WEAK_OFDM_LOW_THRAR5K_PHY_WEAK_OFDM_LOW_THR 0x986c reg.h 　
13256
 AR5K_PHY_WEAK_OFDM_LOW_THR_SELFAR5K_PHY_WEAK_OFDM_LOW_THR_SELF 0x00000001 reg.h 　
13257
 AR5K_PHY_WEAK_OFDM_LOW_THR_M2_CAR5K_PHY_WEAK_OFDM_LOW_THR_M2_C 0x00003f00 reg.h 　
13258
 AR5K_PHY_WEAK_OFDM_LOW_THR_M2_CAR5K_PHY_WEAK_OFDM_LOW_THR_M2_C 8 reg.h 　
13259
 AR5K_PHY_WEAK_OFDM_LOW_THR_M1AR5K_PHY_WEAK_OFDM_LOW_THR_M1 0x001fc000 reg.h 　
13260
 AR5K_PHY_WEAK_OFDM_LOW_THR_M1_SAR5K_PHY_WEAK_OFDM_LOW_THR_M1_S 14 reg.h 　
13261
 AR5K_PHY_WEAK_OFDM_LOW_THR_M2AR5K_PHY_WEAK_OFDM_LOW_THR_M2 0x0fe00000 reg.h 　
13262
 AR5K_PHY_WEAK_OFDM_LOW_THR_M2_SAR5K_PHY_WEAK_OFDM_LOW_THR_M2_S 21 reg.h 　
13263
 AR5K_PHY_SCRAR5K_PHY_SCR 0x9870 reg.h 　
13264
 AR5K_PHY_SLMTAR5K_PHY_SLMT 0x9874 reg.h 　
13265
 AR5K_PHY_SLMT_32MHZAR5K_PHY_SLMT_32MHZ 0x0000007f reg.h 　
13266
 AR5K_PHY_SCALAR5K_PHY_SCAL 0x9878 reg.h 　
13267
 AR5K_PHY_SCAL_32MHZAR5K_PHY_SCAL_32MHZ 0x0000000e reg.h 　
13268
 AR5K_PHY_SCAL_32MHZ_2417AR5K_PHY_SCAL_32MHZ_2417 0x0000000a reg.h 　
13269
 AR5K_PHY_SCAL_32MHZ_HB63AR5K_PHY_SCAL_32MHZ_HB63 0x00000032 reg.h 　
13270
 AR5K_PHY_PLLAR5K_PHY_PLL 0x987c reg.h 　
13271
 AR5K_PHY_PLL_20MHZAR5K_PHY_PLL_20MHZ 0x00000013 reg.h For half rate (?)
13272
 AR5K_PHY_PLL_40MHZ_5211AR5K_PHY_PLL_40MHZ_5211 0x00000018 reg.h 　
13273
 AR5K_PHY_PLL_40MHZ_5212AR5K_PHY_PLL_40MHZ_5212 0x000000aa reg.h 　
13274
 AR5K_PHY_PLL_40MHZ_5413AR5K_PHY_PLL_40MHZ_5413 0x00000004 reg.h 　
13275
 AR5K_PHY_PLL_40MHZAR5K_PHY_PLL_40MHZ (ah->ah_version == AR5K_AR5211 ? \ AR5K_PHY_PLL_40MHZ_5211 : AR5K_PHY_PLL_40MHZ_5212) reg.h 　
13276
 AR5K_PHY_PLL_44MHZ_5211AR5K_PHY_PLL_44MHZ_5211 0x00000019 reg.h 　
13277
 AR5K_PHY_PLL_44MHZ_5212AR5K_PHY_PLL_44MHZ_5212 0x000000ab reg.h 　
13278
 AR5K_PHY_PLL_44MHZAR5K_PHY_PLL_44MHZ (ah->ah_version == AR5K_AR5211 ? \ AR5K_PHY_PLL_44MHZ_5211 : AR5K_PHY_PLL_44MHZ_5212) reg.h 　
13279
 AR5K_PHY_PLL_RF5111AR5K_PHY_PLL_RF5111 0x00000000 reg.h 　
13280
 AR5K_PHY_PLL_RF5112AR5K_PHY_PLL_RF5112 0x00000040 reg.h 　
13281
 AR5K_PHY_PLL_HALF_RATEAR5K_PHY_PLL_HALF_RATE 0x00000100 reg.h 　
13282
 AR5K_PHY_PLL_QUARTER_RATEAR5K_PHY_PLL_QUARTER_RATE 0x00000200 reg.h 　
13283
 AR5K_RF_BUFFERAR5K_RF_BUFFER 0x989c reg.h 　
13284
 AR5K_RF_BUFFER_CONTROL_0AR5K_RF_BUFFER_CONTROL_0 0x98c0 reg.h Channel on 5110
13285
 AR5K_RF_BUFFER_CONTROL_1AR5K_RF_BUFFER_CONTROL_1 0x98c4 reg.h Bank 7 on 5112
13286
 AR5K_RF_BUFFER_CONTROL_2AR5K_RF_BUFFER_CONTROL_2 0x98cc reg.h Bank 7 on 5111
13287
 AR5K_RF_BUFFER_CONTROL_3AR5K_RF_BUFFER_CONTROL_3 0x98d0 reg.h Bank 2 on 5112
13288
 AR5K_RF_BUFFER_CONTROL_4AR5K_RF_BUFFER_CONTROL_4 0x98d4 reg.h RF Stage register on 5110
13289
 AR5K_RF_BUFFER_CONTROL_5AR5K_RF_BUFFER_CONTROL_5 0x98d8 reg.h Bank 3 on 5111
13290
 AR5K_RF_BUFFER_CONTROL_6AR5K_RF_BUFFER_CONTROL_6 0x98dc reg.h Bank 3 on 5112
13291
 AR5K_PHY_RFSTGAR5K_PHY_RFSTG 0x98d4 reg.h 　
13292
 AR5K_PHY_RFSTG_DISABLEAR5K_PHY_RFSTG_DISABLE 0x00000021 reg.h 　
13293
 AR5K_PHY_BIN_MASK_1AR5K_PHY_BIN_MASK_1 0x9900 reg.h 　
13294
 AR5K_PHY_BIN_MASK_2AR5K_PHY_BIN_MASK_2 0x9904 reg.h 　
13295
 AR5K_PHY_BIN_MASK_3AR5K_PHY_BIN_MASK_3 0x9908 reg.h 　
13296
 AR5K_PHY_BIN_MASK_CTLAR5K_PHY_BIN_MASK_CTL 0x990c reg.h 　
13297
 AR5K_PHY_BIN_MASK_CTL_MASK_4AR5K_PHY_BIN_MASK_CTL_MASK_4 0x00003fff reg.h 　
13298
 AR5K_PHY_BIN_MASK_CTL_MASK_4_SAR5K_PHY_BIN_MASK_CTL_MASK_4_S 0 reg.h 　
13299
 AR5K_PHY_BIN_MASK_CTL_RATEAR5K_PHY_BIN_MASK_CTL_RATE 0xff000000 reg.h 　
13300
 AR5K_PHY_BIN_MASK_CTL_RATE_SAR5K_PHY_BIN_MASK_CTL_RATE_S 24 reg.h 　
13301
 AR5K_PHY_ANT_CTLAR5K_PHY_ANT_CTL 0x9910 reg.h Register Address
13302
 AR5K_PHY_ANT_CTL_TXRX_ENAR5K_PHY_ANT_CTL_TXRX_EN 0x00000001 reg.h Enable TX/RX (?)
13303
 AR5K_PHY_ANT_CTL_SECTORED_ANTAR5K_PHY_ANT_CTL_SECTORED_ANT 0x00000004 reg.h Sectored Antenna
13304
 AR5K_PHY_ANT_CTL_HITUNE5AR5K_PHY_ANT_CTL_HITUNE5 0x00000008 reg.h Hitune5 (?)
13305
 AR5K_PHY_ANT_CTL_SWTABLE_IDLEAR5K_PHY_ANT_CTL_SWTABLE_IDLE 0x000003f0 reg.h Switch table idle (?)
13306
 AR5K_PHY_ANT_CTL_SWTABLE_IDLE_SAR5K_PHY_ANT_CTL_SWTABLE_IDLE_S 4 reg.h 　
13307
 AR5K_PHY_RX_DELAYAR5K_PHY_RX_DELAY 0x9914 reg.h Register Address
13308
 AR5K_PHY_RX_DELAY_MAR5K_PHY_RX_DELAY_M 0x00003fff reg.h Mask for RX activate to receive delay (/100ns)
13309
 AR5K_PHY_MAX_RX_LENAR5K_PHY_MAX_RX_LEN 0x991c reg.h 　
13310
 AR5K_PHY_IQAR5K_PHY_IQ 0x9920 reg.h Register Address
13311
 AR5K_PHY_IQ_CORR_Q_Q_COFFAR5K_PHY_IQ_CORR_Q_Q_COFF 0x0000001f reg.h Mask for q correction info
13312
 AR5K_PHY_IQ_CORR_Q_I_COFFAR5K_PHY_IQ_CORR_Q_I_COFF 0x000007e0 reg.h Mask for i correction info
13313
 AR5K_PHY_IQ_CORR_Q_I_COFF_SAR5K_PHY_IQ_CORR_Q_I_COFF_S 5 reg.h 　
13314
 AR5K_PHY_IQ_CORR_ENABLEAR5K_PHY_IQ_CORR_ENABLE 0x00000800 reg.h Enable i/q correction
13315
 AR5K_PHY_IQ_CAL_NUM_LOG_MAXAR5K_PHY_IQ_CAL_NUM_LOG_MAX 0x0000f000 reg.h Mask for max number of samples in log scale
13316
 AR5K_PHY_IQ_CAL_NUM_LOG_MAX_SAR5K_PHY_IQ_CAL_NUM_LOG_MAX_S 12 reg.h 　
13317
 AR5K_PHY_IQ_RUNAR5K_PHY_IQ_RUN 0x00010000 reg.h Run i/q calibration
13318
 AR5K_PHY_IQ_USE_PT_DFAR5K_PHY_IQ_USE_PT_DF 0x00020000 reg.h Use pilot track df (?)
13319
 AR5K_PHY_IQ_EARLY_TRIG_THRAR5K_PHY_IQ_EARLY_TRIG_THR 0x00200000 reg.h Early trigger threshold (?) (field)
13320
 AR5K_PHY_IQ_PILOT_MASK_ENAR5K_PHY_IQ_PILOT_MASK_EN 0x10000000 reg.h Enable pilot mask (?)
13321
 AR5K_PHY_IQ_CHAN_MASK_ENAR5K_PHY_IQ_CHAN_MASK_EN 0x20000000 reg.h Enable channel mask (?)
13322
 AR5K_PHY_IQ_SPUR_FILT_ENAR5K_PHY_IQ_SPUR_FILT_EN 0x40000000 reg.h Enable spur filter
13323
 AR5K_PHY_IQ_SPUR_RSSI_ENAR5K_PHY_IQ_SPUR_RSSI_EN 0x80000000 reg.h Enable spur rssi
13324
 AR5K_PHY_OFDM_SELFCORRAR5K_PHY_OFDM_SELFCORR 0x9924 reg.h Register Address
13325
 AR5K_PHY_OFDM_SELFCORR_CYPWR_THAR5K_PHY_OFDM_SELFCORR_CYPWR_TH 0x00000001 reg.h Enable cyclic RSSI thr 1
13326
 AR5K_PHY_OFDM_SELFCORR_CYPWR_THAR5K_PHY_OFDM_SELFCORR_CYPWR_TH 0x000000fe reg.h Mask for Cyclic RSSI threshold 1
13327
 AR5K_PHY_OFDM_SELFCORR_CYPWR_THAR5K_PHY_OFDM_SELFCORR_CYPWR_TH 1 reg.h 　
13328
 AR5K_PHY_OFDM_SELFCORR_CYPWR_THAR5K_PHY_OFDM_SELFCORR_CYPWR_TH 0x00000100 reg.h Cyclic RSSI threshold 3 (field) (?)
13329
 AR5K_PHY_OFDM_SELFCORR_RSSI_1ATAR5K_PHY_OFDM_SELFCORR_RSSI_1AT 0x00008000 reg.h Enable 1A RSSI threshold (?)
13330
 AR5K_PHY_OFDM_SELFCORR_RSSI_1ATAR5K_PHY_OFDM_SELFCORR_RSSI_1AT 0x00010000 reg.h 1A RSSI threshold (field) (?)
13331
 AR5K_PHY_OFDM_SELFCORR_LSCTHR_HAR5K_PHY_OFDM_SELFCORR_LSCTHR_H 0x00800000 reg.h Long sc threshold hi rssi (?)
13332
 AR5K_PHY_WARM_RESETAR5K_PHY_WARM_RESET 0x9928 reg.h 　
13333
 AR5K_PHY_CTLAR5K_PHY_CTL 0x992c reg.h Register Address
13334
 AR5K_PHY_CTL_RX_DRAIN_RATEAR5K_PHY_CTL_RX_DRAIN_RATE 0x00000001 reg.h RX drain rate (?)
13335
 AR5K_PHY_CTL_LATE_TX_SIG_SYMAR5K_PHY_CTL_LATE_TX_SIG_SYM 0x00000002 reg.h Late tx signal symbol (?)
13336
 AR5K_PHY_CTL_GEN_SCRAMBLERAR5K_PHY_CTL_GEN_SCRAMBLER 0x00000004 reg.h Generate scrambler
13337
 AR5K_PHY_CTL_TX_ANT_SELAR5K_PHY_CTL_TX_ANT_SEL 0x00000008 reg.h TX antenna select
13338
 AR5K_PHY_CTL_TX_ANT_STATICAR5K_PHY_CTL_TX_ANT_STATIC 0x00000010 reg.h Static TX antenna
13339
 AR5K_PHY_CTL_RX_ANT_SELAR5K_PHY_CTL_RX_ANT_SEL 0x00000020 reg.h RX antenna select
13340
 AR5K_PHY_CTL_RX_ANT_STATICAR5K_PHY_CTL_RX_ANT_STATIC 0x00000040 reg.h Static RX antenna
13341
 AR5K_PHY_CTL_LOW_FREQ_SLE_ENAR5K_PHY_CTL_LOW_FREQ_SLE_EN 0x00000080 reg.h Enable low freq sleep
13342
 AR5K_PHY_PAPD_PROBEAR5K_PHY_PAPD_PROBE 0x9930 reg.h 　
13343
 AR5K_PHY_PAPD_PROBE_SH_HI_PARAR5K_PHY_PAPD_PROBE_SH_HI_PAR 0x00000001 reg.h 　
13344
 AR5K_PHY_PAPD_PROBE_PCDAC_BIASAR5K_PHY_PAPD_PROBE_PCDAC_BIAS 0x00000002 reg.h 　
13345
 AR5K_PHY_PAPD_PROBE_COMP_GAINAR5K_PHY_PAPD_PROBE_COMP_GAIN 0x00000040 reg.h 　
13346
 AR5K_PHY_PAPD_PROBE_TXPOWERAR5K_PHY_PAPD_PROBE_TXPOWER 0x00007e00 reg.h 　
13347
 AR5K_PHY_PAPD_PROBE_TXPOWER_SAR5K_PHY_PAPD_PROBE_TXPOWER_S 9 reg.h 　
13348
 AR5K_PHY_PAPD_PROBE_TX_NEXTAR5K_PHY_PAPD_PROBE_TX_NEXT 0x00008000 reg.h 　
13349
 AR5K_PHY_PAPD_PROBE_PREDIST_ENAR5K_PHY_PAPD_PROBE_PREDIST_EN 0x00010000 reg.h 　
13350
 AR5K_PHY_PAPD_PROBE_TYPEAR5K_PHY_PAPD_PROBE_TYPE 0x01800000 reg.h [5112+]
13351
 AR5K_PHY_PAPD_PROBE_TYPE_SAR5K_PHY_PAPD_PROBE_TYPE_S 23 reg.h 　
13352
 AR5K_PHY_PAPD_PROBE_TYPE_OFDMAR5K_PHY_PAPD_PROBE_TYPE_OFDM 0 reg.h 　
13353
 AR5K_PHY_PAPD_PROBE_TYPE_XRAR5K_PHY_PAPD_PROBE_TYPE_XR 1 reg.h 　
13354
 AR5K_PHY_PAPD_PROBE_TYPE_CCKAR5K_PHY_PAPD_PROBE_TYPE_CCK 2 reg.h 　
13355
 AR5K_PHY_PAPD_PROBE_GAINFAR5K_PHY_PAPD_PROBE_GAINF 0xfe000000 reg.h 　
13356
 AR5K_PHY_PAPD_PROBE_GAINF_SAR5K_PHY_PAPD_PROBE_GAINF_S 25 reg.h 　
13357
 AR5K_PHY_PAPD_PROBE_INI_5111AR5K_PHY_PAPD_PROBE_INI_5111 0x00004883 reg.h [5212+]
13358
 AR5K_PHY_PAPD_PROBE_INI_5112AR5K_PHY_PAPD_PROBE_INI_5112 0x00004882 reg.h [5212+]
13359
 AR5K_PHY_TXPOWER_RATE1AR5K_PHY_TXPOWER_RATE1 0x9934 reg.h 　
13360
 AR5K_PHY_TXPOWER_RATE2AR5K_PHY_TXPOWER_RATE2 0x9938 reg.h 　
13361
 AR5K_PHY_TXPOWER_RATE_MAXAR5K_PHY_TXPOWER_RATE_MAX 0x993c reg.h 　
13362
 AR5K_PHY_TXPOWER_RATE_MAX_TPC_EAR5K_PHY_TXPOWER_RATE_MAX_TPC_E 0x00000040 reg.h 　
13363
 AR5K_PHY_TXPOWER_RATE3AR5K_PHY_TXPOWER_RATE3 0xa234 reg.h 　
13364
 AR5K_PHY_TXPOWER_RATE4AR5K_PHY_TXPOWER_RATE4 0xa238 reg.h 　
13365
 AR5K_PHY_FRAME_CTL_5210AR5K_PHY_FRAME_CTL_5210 0x9804 reg.h 　
13366
 AR5K_PHY_FRAME_CTL_5211AR5K_PHY_FRAME_CTL_5211 0x9944 reg.h 　
13367
 AR5K_PHY_FRAME_CTLAR5K_PHY_FRAME_CTL (ah->ah_version == AR5K_AR5210 ? \ AR5K_PHY_FRAME_CTL_5210 : AR5K_PHY_FRAME_CTL_5211) reg.h 　
13368
 AR5K_PHY_FRAME_CTL_TX_CLIPAR5K_PHY_FRAME_CTL_TX_CLIP 0x00000038 reg.h Mask for tx clip (?)
13369
 AR5K_PHY_FRAME_CTL_TX_CLIP_SAR5K_PHY_FRAME_CTL_TX_CLIP_S 3 reg.h 　
13370
 AR5K_PHY_FRAME_CTL_PREP_CHINFOAR5K_PHY_FRAME_CTL_PREP_CHINFO 0x00010000 reg.h Prepend chan info
13371
 AR5K_PHY_FRAME_CTL_EMUAR5K_PHY_FRAME_CTL_EMU 0x80000000 reg.h 　
13372
 AR5K_PHY_FRAME_CTL_EMU_SAR5K_PHY_FRAME_CTL_EMU_S 31 reg.h 　
13373
 AR5K_PHY_FRAME_CTL_TIMING_ERRAR5K_PHY_FRAME_CTL_TIMING_ERR 0x01000000 reg.h PHY timing error
13374
 AR5K_PHY_FRAME_CTL_PARITY_ERRAR5K_PHY_FRAME_CTL_PARITY_ERR 0x02000000 reg.h Parity error
13375
 AR5K_PHY_FRAME_CTL_ILLRATE_ERRAR5K_PHY_FRAME_CTL_ILLRATE_ERR 0x04000000 reg.h Illegal rate
13376
 AR5K_PHY_FRAME_CTL_ILLLEN_ERRAR5K_PHY_FRAME_CTL_ILLLEN_ERR 0x08000000 reg.h Illegal length
13377
 AR5K_PHY_FRAME_CTL_SERVICE_ERRAR5K_PHY_FRAME_CTL_SERVICE_ERR 0x20000000 reg.h 　
13378
 AR5K_PHY_FRAME_CTL_TXURN_ERRAR5K_PHY_FRAME_CTL_TXURN_ERR 0x40000000 reg.h TX underrun
13379
 AR5K_PHY_FRAME_CTL_INIAR5K_PHY_FRAME_CTL_INI AR5K_PHY_FRAME_CTL_SERVICE_ERR | \ AR5K_PHY_FRAME_CTL_TXURN_ERR | \ AR5K_PHY_FRAME_CTL_ILLLEN_ERR | \ AR5K_PHY_FRAME_CTL_ILLRAT reg.h 　
13380
 AR5K_PHY_TX_PWR_ADJAR5K_PHY_TX_PWR_ADJ 0x994c reg.h 　
13381
 AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DEAR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DE 0x00000fc0 reg.h 　
13382
 AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DEAR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DE 6 reg.h 　
13383
 AR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_IAR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_I 0x00fc0000 reg.h 　
13384
 AR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_IAR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_I 18 reg.h 　
13385
 AR5K_PHY_RADARAR5K_PHY_RADAR 0x9954 reg.h 　
13386
 AR5K_PHY_RADAR_ENABLEAR5K_PHY_RADAR_ENABLE 0x00000001 reg.h 　
13387
 AR5K_PHY_RADAR_DISABLEAR5K_PHY_RADAR_DISABLE 0x00000000 reg.h 　
13388
 AR5K_PHY_RADAR_INBANDTHRAR5K_PHY_RADAR_INBANDTHR 0x0000003e reg.h Inband threshold
13389
 AR5K_PHY_RADAR_INBANDTHR_SAR5K_PHY_RADAR_INBANDTHR_S 1 reg.h 　
13390
 AR5K_PHY_RADAR_PRSSI_THRAR5K_PHY_RADAR_PRSSI_THR 0x00000fc0 reg.h Pulse RSSI/SNR threshold
13391
 AR5K_PHY_RADAR_PRSSI_THR_SAR5K_PHY_RADAR_PRSSI_THR_S 6 reg.h 　
13392
 AR5K_PHY_RADAR_PHEIGHT_THRAR5K_PHY_RADAR_PHEIGHT_THR 0x0003f000 reg.h Pulse height threshold
13393
 AR5K_PHY_RADAR_PHEIGHT_THR_SAR5K_PHY_RADAR_PHEIGHT_THR_S 12 reg.h 　
13394
 AR5K_PHY_RADAR_RSSI_THRAR5K_PHY_RADAR_RSSI_THR 0x00fc0000 reg.h Radar RSSI/SNR threshold.
13395
 AR5K_PHY_RADAR_RSSI_THR_SAR5K_PHY_RADAR_RSSI_THR_S 18 reg.h 　
13396
 AR5K_PHY_RADAR_FIRPWR_THRAR5K_PHY_RADAR_FIRPWR_THR 0x7f000000 reg.h Finite Impulse Response
13397
 AR5K_PHY_RADAR_FIRPWR_THRSAR5K_PHY_RADAR_FIRPWR_THRS 24 reg.h 　
13398
 AR5K_PHY_ANT_SWITCH_TABLE_0AR5K_PHY_ANT_SWITCH_TABLE_0 0x9960 reg.h 　
13399
 AR5K_PHY_ANT_SWITCH_TABLE_1AR5K_PHY_ANT_SWITCH_TABLE_1 0x9964 reg.h 　
13400
 AR5K_PHY_NFTHRESAR5K_PHY_NFTHRES 0x9968 reg.h 　
13401
 AR5K_PHY_SIGMA_DELTAAR5K_PHY_SIGMA_DELTA 0x996C reg.h 　
13402
 AR5K_PHY_SIGMA_DELTA_ADC_SELAR5K_PHY_SIGMA_DELTA_ADC_SEL 0x00000003 reg.h 　
13403
 AR5K_PHY_SIGMA_DELTA_ADC_SEL_SAR5K_PHY_SIGMA_DELTA_ADC_SEL_S 0 reg.h 　
13404
 AR5K_PHY_SIGMA_DELTA_FILT2AR5K_PHY_SIGMA_DELTA_FILT2 0x000000f8 reg.h 　
13405
 AR5K_PHY_SIGMA_DELTA_FILT2_SAR5K_PHY_SIGMA_DELTA_FILT2_S 3 reg.h 　
13406
 AR5K_PHY_SIGMA_DELTA_FILT1AR5K_PHY_SIGMA_DELTA_FILT1 0x00001f00 reg.h 　
13407
 AR5K_PHY_SIGMA_DELTA_FILT1_SAR5K_PHY_SIGMA_DELTA_FILT1_S 8 reg.h 　
13408
 AR5K_PHY_SIGMA_DELTA_ADC_CLIPAR5K_PHY_SIGMA_DELTA_ADC_CLIP 0x01ffe000 reg.h 　
13409
 AR5K_PHY_SIGMA_DELTA_ADC_CLIP_SAR5K_PHY_SIGMA_DELTA_ADC_CLIP_S 13 reg.h 　
13410
 AR5K_PHY_RESTARTAR5K_PHY_RESTART 0x9970 reg.h restart
13411
 AR5K_PHY_RESTART_DIV_GCAR5K_PHY_RESTART_DIV_GC 0x001c0000 reg.h Fast diversity gc_limit (?)
13412
 AR5K_PHY_RESTART_DIV_GC_SAR5K_PHY_RESTART_DIV_GC_S 18 reg.h 　
13413
 AR5K_PHY_RFBUS_REQAR5K_PHY_RFBUS_REQ 0x997C reg.h 　
13414
 AR5K_PHY_RFBUS_REQ_REQUESTAR5K_PHY_RFBUS_REQ_REQUEST 0x00000001 reg.h 　
13415
 AR5K_PHY_TIMING_7AR5K_PHY_TIMING_7 0x9980 reg.h 　
13416
 AR5K_PHY_TIMING_8AR5K_PHY_TIMING_8 0x9984 reg.h 　
13417
 AR5K_PHY_TIMING_8_PILOT_MASK_2AR5K_PHY_TIMING_8_PILOT_MASK_2 0x000fffff reg.h 　
13418
 AR5K_PHY_TIMING_8_PILOT_MASK_2_AR5K_PHY_TIMING_8_PILOT_MASK_2_ 0 reg.h 　
13419
 AR5K_PHY_BIN_MASK2_1AR5K_PHY_BIN_MASK2_1 0x9988 reg.h 　
13420
 AR5K_PHY_BIN_MASK2_2AR5K_PHY_BIN_MASK2_2 0x998c reg.h 　
13421
 AR5K_PHY_BIN_MASK2_3AR5K_PHY_BIN_MASK2_3 0x9990 reg.h 　
13422
 AR5K_PHY_BIN_MASK2_4AR5K_PHY_BIN_MASK2_4 0x9994 reg.h 　
13423
 AR5K_PHY_BIN_MASK2_4_MASK_4AR5K_PHY_BIN_MASK2_4_MASK_4 0x00003fff reg.h 　
13424
 AR5K_PHY_BIN_MASK2_4_MASK_4_SAR5K_PHY_BIN_MASK2_4_MASK_4_S 0 reg.h 　
13425
 AR5K_PHY_TIMING_9AR5K_PHY_TIMING_9 0x9998 reg.h 　
13426
 AR5K_PHY_TIMING_10AR5K_PHY_TIMING_10 0x999c reg.h 　
13427
 AR5K_PHY_TIMING_10_PILOT_MASK_2AR5K_PHY_TIMING_10_PILOT_MASK_2 0x000fffff reg.h 　
13428
 AR5K_PHY_TIMING_10_PILOT_MASK_2AR5K_PHY_TIMING_10_PILOT_MASK_2 0 reg.h 　
13429
 AR5K_PHY_TIMING_11AR5K_PHY_TIMING_11 0x99a0 reg.h Register address
13430
 AR5K_PHY_TIMING_11_SPUR_DELTA_PAR5K_PHY_TIMING_11_SPUR_DELTA_P 0x000fffff reg.h Spur delta phase
13431
 AR5K_PHY_TIMING_11_SPUR_DELTA_PAR5K_PHY_TIMING_11_SPUR_DELTA_P 0 reg.h 　
13432
 AR5K_PHY_TIMING_11_SPUR_FREQ_SDAR5K_PHY_TIMING_11_SPUR_FREQ_SD 0x3ff00000 reg.h Freq sigma delta
13433
 AR5K_PHY_TIMING_11_SPUR_FREQ_SDAR5K_PHY_TIMING_11_SPUR_FREQ_SD 20 reg.h 　
13434
 AR5K_PHY_TIMING_11_USE_SPUR_IN_AR5K_PHY_TIMING_11_USE_SPUR_IN_ 0x40000000 reg.h Spur filter in AGC detector
13435
 AR5K_PHY_TIMING_11_USE_SPUR_IN_AR5K_PHY_TIMING_11_USE_SPUR_IN_ 0x80000000 reg.h Spur filter in OFDM self correlator
13436
 AR5K_BB_GAIN_BASEAR5K_BB_GAIN_BASE 0x9b00 reg.h BaseBand Amplifier Gain table base address
13437
 AR5K_RF_GAIN_BASEAR5K_RF_GAIN_BASE 0x9a00 reg.h RF Amplrifier Gain table base address
13438
 AR5K_PHY_IQRES_CAL_PWR_IAR5K_PHY_IQRES_CAL_PWR_I 0x9c10 reg.h I (Inphase) power value
13439
 AR5K_PHY_IQRES_CAL_PWR_QAR5K_PHY_IQRES_CAL_PWR_Q 0x9c14 reg.h Q (Quadrature) power value
13440
 AR5K_PHY_IQRES_CAL_CORRAR5K_PHY_IQRES_CAL_CORR 0x9c18 reg.h I/Q Correlation
13441
 AR5K_PHY_CURRENT_RSSIAR5K_PHY_CURRENT_RSSI 0x9c1c reg.h 　
13442
 AR5K_PHY_RFBUS_GRANTAR5K_PHY_RFBUS_GRANT 0x9c20 reg.h 　
13443
 AR5K_PHY_RFBUS_GRANT_OKAR5K_PHY_RFBUS_GRANT_OK 0x00000001 reg.h 　
13444
 AR5K_PHY_ADC_TESTAR5K_PHY_ADC_TEST 0x9c24 reg.h 　
13445
 AR5K_PHY_ADC_TEST_IAR5K_PHY_ADC_TEST_I 0x00000001 reg.h 　
13446
 AR5K_PHY_ADC_TEST_QAR5K_PHY_ADC_TEST_Q 0x00000200 reg.h 　
13447
 AR5K_PHY_DAC_TESTAR5K_PHY_DAC_TEST 0x9c28 reg.h 　
13448
 AR5K_PHY_DAC_TEST_IAR5K_PHY_DAC_TEST_I 0x00000001 reg.h 　
13449
 AR5K_PHY_DAC_TEST_QAR5K_PHY_DAC_TEST_Q 0x00000200 reg.h 　
13450
 AR5K_PHY_PTATAR5K_PHY_PTAT 0x9c2c reg.h 　
13451
 AR5K_PHY_BAD_TX_RATEAR5K_PHY_BAD_TX_RATE 0x9c30 reg.h 　
13452
 AR5K_PHY_SPUR_PWRAR5K_PHY_SPUR_PWR 0x9c34 reg.h Register Address
13453
 AR5K_PHY_SPUR_PWR_IAR5K_PHY_SPUR_PWR_I 0x00000001 reg.h SPUR Power estimate for I (field)
13454
 AR5K_PHY_SPUR_PWR_QAR5K_PHY_SPUR_PWR_Q 0x00000100 reg.h SPUR Power estimate for Q (field)
13455
 AR5K_PHY_SPUR_PWR_FILTAR5K_PHY_SPUR_PWR_FILT 0x00010000 reg.h Power with SPUR removed (field)
13456
 AR5K_PHY_CHAN_STATUSAR5K_PHY_CHAN_STATUS 0x9c38 reg.h 　
13457
 AR5K_PHY_CHAN_STATUS_BT_ACTAR5K_PHY_CHAN_STATUS_BT_ACT 0x00000001 reg.h 　
13458
 AR5K_PHY_CHAN_STATUS_RX_CLR_RAWAR5K_PHY_CHAN_STATUS_RX_CLR_RAW 0x00000002 reg.h 　
13459
 AR5K_PHY_CHAN_STATUS_RX_CLR_MACAR5K_PHY_CHAN_STATUS_RX_CLR_MAC 0x00000004 reg.h 　
13460
 AR5K_PHY_CHAN_STATUS_RX_CLR_PAPAR5K_PHY_CHAN_STATUS_RX_CLR_PAP 0x00000008 reg.h 　
13461
 AR5K_PHY_HEAVY_CLIP_ENABLEAR5K_PHY_HEAVY_CLIP_ENABLE 0x99e0 reg.h 　
13462
 AR5K_PHY_SCLOCKAR5K_PHY_SCLOCK 0x99f0 reg.h 　
13463
 AR5K_PHY_SCLOCK_32MHZAR5K_PHY_SCLOCK_32MHZ 0x0000000c reg.h 　
13464
 AR5K_PHY_SDELAYAR5K_PHY_SDELAY 0x99f4 reg.h 　
13465
 AR5K_PHY_SDELAY_32MHZAR5K_PHY_SDELAY_32MHZ 0x000000ff reg.h 　
13466
 AR5K_PHY_SPENDINGAR5K_PHY_SPENDING 0x99f8 reg.h 　
13467
 AR5K_PHY_PAPD_I_BASEAR5K_PHY_PAPD_I_BASE 0xa000 reg.h 　
13468
 AR5K_PHY_PCDAC_TXPOWER_BASEAR5K_PHY_PCDAC_TXPOWER_BASE 0xa180 reg.h 　
13469
 AR5K_PHY_MODEAR5K_PHY_MODE 0x0a200 reg.h Register Address
13470
 AR5K_PHY_MODE_MODAR5K_PHY_MODE_MOD 0x00000001 reg.h PHY Modulation bit
13471
 AR5K_PHY_MODE_MOD_OFDMAR5K_PHY_MODE_MOD_OFDM 0 reg.h 　
13472
 AR5K_PHY_MODE_MOD_CCKAR5K_PHY_MODE_MOD_CCK 1 reg.h 　
13473
 AR5K_PHY_MODE_FREQAR5K_PHY_MODE_FREQ 0x00000002 reg.h Freq mode bit
13474
 AR5K_PHY_MODE_FREQ_5GHZAR5K_PHY_MODE_FREQ_5GHZ 0 reg.h 　
13475
 AR5K_PHY_MODE_FREQ_2GHZAR5K_PHY_MODE_FREQ_2GHZ 2 reg.h 　
13476
 AR5K_PHY_MODE_MOD_DYNAR5K_PHY_MODE_MOD_DYN 0x00000004 reg.h Enable Dynamic OFDM/CCK mode [5112+]
13477
 AR5K_PHY_MODE_RADAR5K_PHY_MODE_RAD 0x00000008 reg.h [5212+]
13478
 AR5K_PHY_MODE_RAD_RF5111AR5K_PHY_MODE_RAD_RF5111 0 reg.h 　
13479
 AR5K_PHY_MODE_RAD_RF5112AR5K_PHY_MODE_RAD_RF5112 8 reg.h 　
13480
 AR5K_PHY_MODE_XRAR5K_PHY_MODE_XR 0x00000010 reg.h Enable XR mode [5112+]
13481
 AR5K_PHY_MODE_HALF_RATEAR5K_PHY_MODE_HALF_RATE 0x00000020 reg.h Enable Half rate (test)
13482
 AR5K_PHY_MODE_QUARTER_RATEAR5K_PHY_MODE_QUARTER_RATE 0x00000040 reg.h Enable Quarter rat (test)
13483
 AR5K_PHY_CCKTXCTLAR5K_PHY_CCKTXCTL 0xa204 reg.h 　
13484
 AR5K_PHY_CCKTXCTL_WORLDAR5K_PHY_CCKTXCTL_WORLD 0x00000000 reg.h 　
13485
 AR5K_PHY_CCKTXCTL_JAPANAR5K_PHY_CCKTXCTL_JAPAN 0x00000010 reg.h 　
13486
 AR5K_PHY_CCKTXCTL_SCRAMBLER_DISAR5K_PHY_CCKTXCTL_SCRAMBLER_DIS 0x00000001 reg.h 　
13487
 AR5K_PHY_CCKTXCTK_DAC_SCALEAR5K_PHY_CCKTXCTK_DAC_SCALE 0x00000004 reg.h 　
13488
 AR5K_PHY_CCK_CROSSCORRAR5K_PHY_CCK_CROSSCORR 0xa208 reg.h 　
13489
 AR5K_PHY_CCK_CROSSCORR_WEAK_SIGAR5K_PHY_CCK_CROSSCORR_WEAK_SIG 0x0000000f reg.h 　
13490
 AR5K_PHY_CCK_CROSSCORR_WEAK_SIGAR5K_PHY_CCK_CROSSCORR_WEAK_SIG 0 reg.h 　
13491
 AR5K_PHY_FAST_ANT_DIVAR5K_PHY_FAST_ANT_DIV 0xa208 reg.h 　
13492
 AR5K_PHY_FAST_ANT_DIV_ENAR5K_PHY_FAST_ANT_DIV_EN 0x00002000 reg.h 　
13493
 AR5K_PHY_GAIN_2GHZAR5K_PHY_GAIN_2GHZ 0xa20c reg.h 　
13494
 AR5K_PHY_GAIN_2GHZ_MARGIN_TXRXAR5K_PHY_GAIN_2GHZ_MARGIN_TXRX 0x00fc0000 reg.h 　
13495
 AR5K_PHY_GAIN_2GHZ_MARGIN_TXRX_AR5K_PHY_GAIN_2GHZ_MARGIN_TXRX_ 18 reg.h 　
13496
 AR5K_PHY_GAIN_2GHZ_INI_5111AR5K_PHY_GAIN_2GHZ_INI_5111 0x6480416c reg.h 　
13497
 AR5K_PHY_CCK_RX_CTL_4AR5K_PHY_CCK_RX_CTL_4 0xa21c reg.h 　
13498
 AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_ 0x01f80000 reg.h 　
13499
 AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_ 19 reg.h 　
13500
 AR5K_PHY_DAG_CCK_CTLAR5K_PHY_DAG_CCK_CTL 0xa228 reg.h 　
13501
 AR5K_PHY_DAG_CCK_CTL_EN_RSSI_THAR5K_PHY_DAG_CCK_CTL_EN_RSSI_TH 0x00000200 reg.h 　
13502
 AR5K_PHY_DAG_CCK_CTL_RSSI_THRAR5K_PHY_DAG_CCK_CTL_RSSI_THR 0x0001fc00 reg.h 　
13503
 AR5K_PHY_DAG_CCK_CTL_RSSI_THR_SAR5K_PHY_DAG_CCK_CTL_RSSI_THR_S 10 reg.h 　
13504
 AR5K_PHY_FAST_ADCAR5K_PHY_FAST_ADC 0xa24c reg.h 　
13505
 AR5K_PHY_BLUETOOTHAR5K_PHY_BLUETOOTH 0xa254 reg.h 　
13506
 AR5K_PHY_TPC_RG1AR5K_PHY_TPC_RG1 0xa258 reg.h 　
13507
 AR5K_PHY_TPC_RG1_NUM_PD_GAINAR5K_PHY_TPC_RG1_NUM_PD_GAIN 0x0000c000 reg.h 　
13508
 AR5K_PHY_TPC_RG1_NUM_PD_GAIN_SAR5K_PHY_TPC_RG1_NUM_PD_GAIN_S 14 reg.h 　
13509
 AR5K_PHY_TPC_RG1_PDGAIN_1AR5K_PHY_TPC_RG1_PDGAIN_1 0x00030000 reg.h 　
13510
 AR5K_PHY_TPC_RG1_PDGAIN_1_SAR5K_PHY_TPC_RG1_PDGAIN_1_S 16 reg.h 　
13511
 AR5K_PHY_TPC_RG1_PDGAIN_2AR5K_PHY_TPC_RG1_PDGAIN_2 0x000c0000 reg.h 　
13512
 AR5K_PHY_TPC_RG1_PDGAIN_2_SAR5K_PHY_TPC_RG1_PDGAIN_2_S 18 reg.h 　
13513
 AR5K_PHY_TPC_RG1_PDGAIN_3AR5K_PHY_TPC_RG1_PDGAIN_3 0x00300000 reg.h 　
13514
 AR5K_PHY_TPC_RG1_PDGAIN_3_SAR5K_PHY_TPC_RG1_PDGAIN_3_S 20 reg.h 　
13515
 AR5K_PHY_TPC_RG5AR5K_PHY_TPC_RG5 0xa26C reg.h 　
13516
 AR5K_PHY_TPC_RG5_PD_GAIN_OVERLAAR5K_PHY_TPC_RG5_PD_GAIN_OVERLA 0x0000000F reg.h 　
13517
 AR5K_PHY_TPC_RG5_PD_GAIN_OVERLAAR5K_PHY_TPC_RG5_PD_GAIN_OVERLA 0 reg.h 　
13518
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 0x000003F0 reg.h 　
13519
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 4 reg.h 　
13520
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 0x0000FC00 reg.h 　
13521
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 10 reg.h 　
13522
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 0x003F0000 reg.h 　
13523
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 16 reg.h 　
13524
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 0x0FC00000 reg.h 　
13525
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 22 reg.h 　
13526
 AR5K_PHY_PDADC_TXPOWER_BASEAR5K_PHY_PDADC_TXPOWER_BASE 0xa280 reg.h 　
13527
 AR5K_RF5111_OB_2GHZAR5K_RF5111_OB_2GHZ { 3, 119, 0 } rfbuffer.h 　
13528
 AR5K_RF5111_DB_2GHZAR5K_RF5111_DB_2GHZ { 3, 122, 0 } rfbuffer.h 　
13529
 AR5K_RF5111_OB_5GHZAR5K_RF5111_OB_5GHZ { 3, 104, 0 } rfbuffer.h 　
13530
 AR5K_RF5111_DB_5GHZAR5K_RF5111_DB_5GHZ { 3, 107, 0 } rfbuffer.h 　
13531
 AR5K_RF5111_PWD_XPDAR5K_RF5111_PWD_XPD { 1, 95, 0 } rfbuffer.h 　
13532
 AR5K_RF5111_XPD_GAINAR5K_RF5111_XPD_GAIN { 4, 96, 0 } rfbuffer.h 　
13533
 AR5K_RF5111_GAIN_IAR5K_RF5111_GAIN_I { 6, 29, 0 } rfbuffer.h 　
13534
 AR5K_RF5111_PLO_SELAR5K_RF5111_PLO_SEL { 1, 4, 0 } rfbuffer.h 　
13535
 AR5K_RF5111_RFGAIN_SELAR5K_RF5111_RFGAIN_SEL { 1, 36, 0 } rfbuffer.h 　
13536
 AR5K_RF5111_RFGAIN_STEPAR5K_RF5111_RFGAIN_STEP { 6, 37, 0 } rfbuffer.h 　
13537
 AR5K_RF5111_WAIT_SAR5K_RF5111_WAIT_S { 5, 19, 0 } rfbuffer.h 　
13538
 AR5K_RF5111_WAIT_IAR5K_RF5111_WAIT_I { 5, 24, 0 } rfbuffer.h 　
13539
 AR5K_RF5111_MAX_TIMEAR5K_RF5111_MAX_TIME { 2, 49, 0 } rfbuffer.h 　
13540
 AR5K_RF5112X_GAIN_IAR5K_RF5112X_GAIN_I { 6, 14, 0 } rfbuffer.h 　
13541
 AR5K_RF5112X_MIXVGA_OVRAR5K_RF5112X_MIXVGA_OVR { 1, 36, 0 } rfbuffer.h 　
13542
 AR5K_RF5112X_MIXGAIN_OVRAR5K_RF5112X_MIXGAIN_OVR { 2, 37, 0 } rfbuffer.h 　
13543
 AR5K_RF5112X_MIXGAIN_STEPAR5K_RF5112X_MIXGAIN_STEP { 4, 32, 0 } rfbuffer.h 　
13544
 AR5K_RF5112X_PD_DELAY_AAR5K_RF5112X_PD_DELAY_A { 4, 58, 0 } rfbuffer.h 　
13545
 AR5K_RF5112X_PD_DELAY_BAR5K_RF5112X_PD_DELAY_B { 4, 62, 0 } rfbuffer.h 　
13546
 AR5K_RF5112X_PD_DELAY_XRAR5K_RF5112X_PD_DELAY_XR { 4, 66, 0 } rfbuffer.h 　
13547
 AR5K_RF5112X_PD_PERIOD_AAR5K_RF5112X_PD_PERIOD_A { 4, 70, 0 } rfbuffer.h 　
13548
 AR5K_RF5112X_PD_PERIOD_BAR5K_RF5112X_PD_PERIOD_B { 4, 74, 0 } rfbuffer.h 　
13549
 AR5K_RF5112X_PD_PERIOD_XRAR5K_RF5112X_PD_PERIOD_XR { 4, 78, 0 } rfbuffer.h 　
13550
 AR5K_RF5112_OB_2GHZAR5K_RF5112_OB_2GHZ { 3, 269, 0 } rfbuffer.h 　
13551
 AR5K_RF5112_DB_2GHZAR5K_RF5112_DB_2GHZ { 3, 272, 0 } rfbuffer.h 　
13552
 AR5K_RF5112_OB_5GHZAR5K_RF5112_OB_5GHZ { 3, 261, 0 } rfbuffer.h 　
13553
 AR5K_RF5112_DB_5GHZAR5K_RF5112_DB_5GHZ { 3, 264, 0 } rfbuffer.h 　
13554
 AR5K_RF5112_FIXED_BIAS_AAR5K_RF5112_FIXED_BIAS_A { 1, 260, 0 } rfbuffer.h 　
13555
 AR5K_RF5112_FIXED_BIAS_BAR5K_RF5112_FIXED_BIAS_B { 1, 259, 0 } rfbuffer.h 　
13556
 AR5K_RF5112_XPD_SELAR5K_RF5112_XPD_SEL { 1, 284, 0 } rfbuffer.h 　
13557
 AR5K_RF5112_XPD_GAINAR5K_RF5112_XPD_GAIN { 2, 252, 0 } rfbuffer.h 　
13558
 AR5K_RF5112A_OB_2GHZAR5K_RF5112A_OB_2GHZ { 3, 287, 0 } rfbuffer.h 　
13559
 AR5K_RF5112A_DB_2GHZAR5K_RF5112A_DB_2GHZ { 3, 290, 0 } rfbuffer.h 　
13560
 AR5K_RF5112A_OB_5GHZAR5K_RF5112A_OB_5GHZ { 3, 279, 0 } rfbuffer.h 　
13561
 AR5K_RF5112A_DB_5GHZAR5K_RF5112A_DB_5GHZ { 3, 282, 0 } rfbuffer.h 　
13562
 AR5K_RF5112A_FIXED_BIAS_AAR5K_RF5112A_FIXED_BIAS_A { 1, 278, 0 } rfbuffer.h 　
13563
 AR5K_RF5112A_FIXED_BIAS_BAR5K_RF5112A_FIXED_BIAS_B { 1, 277, 0 } rfbuffer.h 　
13564
 AR5K_RF5112A_XPD_SELAR5K_RF5112A_XPD_SEL { 1, 302, 0 } rfbuffer.h 　
13565
 AR5K_RF5112A_PDGAINLOAR5K_RF5112A_PDGAINLO { 2, 270, 0 } rfbuffer.h 　
13566
 AR5K_RF5112A_PDGAINHIAR5K_RF5112A_PDGAINHI { 2, 257, 0 } rfbuffer.h 　
13567
 AR5K_RF5112A_HIGH_VC_CPAR5K_RF5112A_HIGH_VC_CP { 2, 90, 2 } rfbuffer.h 　
13568
 AR5K_RF5112A_MID_VC_CPAR5K_RF5112A_MID_VC_CP { 2, 92, 2 } rfbuffer.h 　
13569
 AR5K_RF5112A_LOW_VC_CPAR5K_RF5112A_LOW_VC_CP { 2, 94, 2 } rfbuffer.h 　
13570
 AR5K_RF5112A_PUSH_UPAR5K_RF5112A_PUSH_UP { 1, 254, 2 } rfbuffer.h 　
13571
 AR5K_RF5112A_PAD2GNDAR5K_RF5112A_PAD2GND { 1, 281, 1 } rfbuffer.h 　
13572
 AR5K_RF5112A_XB2_LVLAR5K_RF5112A_XB2_LVL { 2, 1, 3 } rfbuffer.h 　
13573
 AR5K_RF5112A_XB5_LVLAR5K_RF5112A_XB5_LVL { 2, 3, 3 } rfbuffer.h 　
13574
 AR5K_RF2413_OB_2GHZAR5K_RF2413_OB_2GHZ { 3, 168, 0 } rfbuffer.h 　
13575
 AR5K_RF2413_DB_2GHZAR5K_RF2413_DB_2GHZ { 3, 165, 0 } rfbuffer.h 　
13576
 AR5K_RF2316_OB_2GHZAR5K_RF2316_OB_2GHZ { 3, 178, 0 } rfbuffer.h 　
13577
 AR5K_RF2316_DB_2GHZAR5K_RF2316_DB_2GHZ { 3, 175, 0 } rfbuffer.h 　
13578
 AR5K_RF5413_OB_2GHZAR5K_RF5413_OB_2GHZ { 3, 241, 0 } rfbuffer.h 　
13579
 AR5K_RF5413_DB_2GHZAR5K_RF5413_DB_2GHZ { 3, 238, 0 } rfbuffer.h 　
13580
 AR5K_RF5413_OB_5GHZAR5K_RF5413_OB_5GHZ { 3, 247, 0 } rfbuffer.h 　
13581
 AR5K_RF5413_DB_5GHZAR5K_RF5413_DB_5GHZ { 3, 244, 0 } rfbuffer.h 　
13582
 AR5K_RF5413_PWD_ICLOBUF2GAR5K_RF5413_PWD_ICLOBUF2G { 3, 131, 3 } rfbuffer.h 　
13583
 AR5K_RF5413_DERBY_CHAN_SEL_MODEAR5K_RF5413_DERBY_CHAN_SEL_MODE { 1, 291, 2 } rfbuffer.h 　
13584
 AR5K_RF2425_OB_2GHZAR5K_RF2425_OB_2GHZ { 3, 193, 0 } rfbuffer.h 　
13585
 AR5K_RF2425_DB_2GHZAR5K_RF2425_DB_2GHZ { 3, 190, 0 } rfbuffer.h 　
13586
 AR5K_GAIN_CRN_FIX_BITS_5111AR5K_GAIN_CRN_FIX_BITS_5111 4 rfgain.h 　
13587
 AR5K_GAIN_CRN_FIX_BITS_5112AR5K_GAIN_CRN_FIX_BITS_5112 7 rfgain.h 　
13588
 AR5K_GAIN_CRN_MAX_FIX_BITSAR5K_GAIN_CRN_MAX_FIX_BITS AR5K_GAIN_CRN_FIX_BITS_5112 rfgain.h 　
13589
 AR5K_GAIN_DYN_ADJUST_HI_MARGINAR5K_GAIN_DYN_ADJUST_HI_MARGIN 15 rfgain.h 　
13590
 AR5K_GAIN_DYN_ADJUST_LO_MARGINAR5K_GAIN_DYN_ADJUST_LO_MARGIN 20 rfgain.h 　
13591
 AR5K_GAIN_CCK_PROBE_CORRAR5K_GAIN_CCK_PROBE_CORR 5 rfgain.h 　
13592
 AR5K_GAIN_CCK_OFDM_GAIN_DELTAAR5K_GAIN_CCK_OFDM_GAIN_DELTA 15 rfgain.h 　
13593
 AR5K_GAIN_STEP_COUNTAR5K_GAIN_STEP_COUNT 10 rfgain.h 　
13594
 BAR_0BAR_0 0 e1000.h 　
13595
 BAR_1BAR_1 1 e1000.h 　
13596
 BAR_5BAR_5 5 e1000.h 　
13597
 E1000_RXBUFFER_128E1000_RXBUFFER_128 128 e1000.h Used for packet split
13598
 E1000_RXBUFFER_256E1000_RXBUFFER_256 256 e1000.h Used for packet split
13599
 E1000_RXBUFFER_512E1000_RXBUFFER_512 512 e1000.h 　
13600
 E1000_RXBUFFER_1024E1000_RXBUFFER_1024 1024 e1000.h 　
13601
 E1000_RXBUFFER_2048E1000_RXBUFFER_2048 2048 e1000.h 　
13602
 E1000_RXBUFFER_4096E1000_RXBUFFER_4096 4096 e1000.h 　
13603
 E1000_RXBUFFER_8192E1000_RXBUFFER_8192 8192 e1000.h 　
13604
 E1000_RXBUFFER_16384E1000_RXBUFFER_16384 16384 e1000.h 　
13605
 E1000_SMARTSPEED_DOWNSHIFTE1000_SMARTSPEED_DOWNSHIFT 3 e1000.h 　
13606
 E1000_SMARTSPEED_MAXE1000_SMARTSPEED_MAX 15 e1000.h 　
13607
 E1000_PBA_BYTES_SHIFTE1000_PBA_BYTES_SHIFT 0xA e1000.h 　
13608
 E1000_TX_HEAD_ADDR_SHIFTE1000_TX_HEAD_ADDR_SHIFT 7 e1000.h 　
13609
 E1000_PBA_TX_MASKE1000_PBA_TX_MASK 0xFFFF0000 e1000.h 　
13610
 E1000_FC_HIGH_DIFFE1000_FC_HIGH_DIFF 0x1638 e1000.h High: 5688 bytes below Rx FIFO size
13611
 E1000_FC_LOW_DIFFE1000_FC_LOW_DIFF 0x1640 e1000.h Low: 5696 bytes below Rx FIFO size
13612
 E1000_FC_PAUSE_TIMEE1000_FC_PAUSE_TIME 0x0680 e1000.h 858 usec
13613
 MAXIMUM_ETHERNET_VLAN_SIZEMAXIMUM_ETHERNET_VLAN_SIZE 1522 e1000.h 　
13614
 E1000_TX_QUEUE_WAKEE1000_TX_QUEUE_WAKE 16 e1000.h 　
13615
 E1000_RX_BUFFER_WRITEE1000_RX_BUFFER_WRITE 16 e1000.h Must be power of 2
13616
 AUTO_ALL_MODESAUTO_ALL_MODES 0 e1000.h 　
13617
 E1000_EEPROM_82544_APME1000_EEPROM_82544_APM 0x0004 e1000.h 　
13618
 E1000_EEPROM_ICH8_APMEE1000_EEPROM_ICH8_APME 0x0004 e1000.h 　
13619
 E1000_EEPROM_APMEE1000_EEPROM_APME 0x0400 e1000.h 　
13620
 E1000_MASTER_SLAVEE1000_MASTER_SLAVE e1000_ms_hw_default e1000.h 　
13621
 E1000_MNG2HOST_PORT_623E1000_MNG2HOST_PORT_623 (1 << 5) e1000.h 　
13622
 E1000_MNG2HOST_PORT_664E1000_MNG2HOST_PORT_664 (1 << 6) e1000.h 　
13623
 E1000_ERT_2048E1000_ERT_2048 0x100 e1000.h 　
13624
 IORESOURCE_IOIORESOURCE_IO 0x00000100 e1000.h 　
13625
 IORESOURCE_MEMIORESOURCE_MEM 0x00000200 e1000.h 　
13626
 IORESOURCE_PREFETCHIORESOURCE_PREFETCH 0x00001000 e1000.h 　
13627
 E1000_HOST_IF_MAX_SIZEE1000_HOST_IF_MAX_SIZE 2048 e1000_hw.h 　
13628
 E1000_SUCCESSE1000_SUCCESS 0 e1000_hw.h 　
13629
 E1000_ERR_EEPROME1000_ERR_EEPROM 1 e1000_hw.h 　
13630
 E1000_ERR_PHYE1000_ERR_PHY 2 e1000_hw.h 　
13631
 E1000_ERR_CONFIGE1000_ERR_CONFIG 3 e1000_hw.h 　
13632
 E1000_ERR_PARAME1000_ERR_PARAM 4 e1000_hw.h 　
13633
 E1000_ERR_MAC_TYPEE1000_ERR_MAC_TYPE 5 e1000_hw.h 　
13634
 E1000_ERR_PHY_TYPEE1000_ERR_PHY_TYPE 6 e1000_hw.h 　
13635
 E1000_ERR_RESETE1000_ERR_RESET 9 e1000_hw.h 　
13636
 E1000_ERR_MASTER_REQUESTS_PENDIE1000_ERR_MASTER_REQUESTS_PENDI 10 e1000_hw.h 　
13637
 E1000_ERR_HOST_INTERFACE_COMMANE1000_ERR_HOST_INTERFACE_COMMAN 11 e1000_hw.h 　
13638
 E1000_BLK_PHY_RESETE1000_BLK_PHY_RESET 12 e1000_hw.h 　
13639
 E1000_ERR_SWFW_SYNCE1000_ERR_SWFW_SYNC 13 e1000_hw.h 　
13640
 E1000_MNG_DHCP_TX_PAYLOAD_CMDE1000_MNG_DHCP_TX_PAYLOAD_CMD 64 e1000_hw.h 　
13641
 E1000_HI_MAX_MNG_DATA_LENGTHE1000_HI_MAX_MNG_DATA_LENGTH 0x6F8 e1000_hw.h Host Interface data length
13642
 E1000_MNG_DHCP_COMMAND_TIMEOUTE1000_MNG_DHCP_COMMAND_TIMEOUT 10 e1000_hw.h Time in ms to process MNG command
13643
 E1000_MNG_DHCP_COOKIE_OFFSETE1000_MNG_DHCP_COOKIE_OFFSET 0x6F0 e1000_hw.h Cookie offset
13644
 E1000_MNG_DHCP_COOKIE_LENGTHE1000_MNG_DHCP_COOKIE_LENGTH 0x10 e1000_hw.h Cookie length
13645
 E1000_MNG_IAMT_MODEE1000_MNG_IAMT_MODE 0x3 e1000_hw.h 　
13646
 E1000_MNG_ICH_IAMT_MODEE1000_MNG_ICH_IAMT_MODE 0x2 e1000_hw.h 　
13647
 E1000_IAMT_SIGNATUREE1000_IAMT_SIGNATURE 0x544D4149 e1000_hw.h Intel(R) Active Management Technology signature
13648
 E1000_MNG_DHCP_COOKIE_STATUS_PAE1000_MNG_DHCP_COOKIE_STATUS_PA 0x1 e1000_hw.h DHCP parsing enabled
13649
 E1000_MNG_DHCP_COOKIE_STATUS_VLE1000_MNG_DHCP_COOKIE_STATUS_VL 0x2 e1000_hw.h DHCP parsing enabled
13650
 E1000_VFTA_ENTRY_SHIFTE1000_VFTA_ENTRY_SHIFT 0x5 e1000_hw.h 　
13651
 E1000_VFTA_ENTRY_MASKE1000_VFTA_ENTRY_MASK 0x7F e1000_hw.h 　
13652
 E1000_VFTA_ENTRY_BIT_SHIFT_MASKE1000_VFTA_ENTRY_BIT_SHIFT_MASK 0x1F e1000_hw.h 　
13653
 E1000_DEV_ID_82542E1000_DEV_ID_82542 0x1000 e1000_hw.h 　
13654
 E1000_DEV_ID_82543GC_FIBERE1000_DEV_ID_82543GC_FIBER 0x1001 e1000_hw.h 　
13655
 E1000_DEV_ID_82543GC_COPPERE1000_DEV_ID_82543GC_COPPER 0x1004 e1000_hw.h 　
13656
 E1000_DEV_ID_82544EI_COPPERE1000_DEV_ID_82544EI_COPPER 0x1008 e1000_hw.h 　
13657
 E1000_DEV_ID_82544EI_FIBERE1000_DEV_ID_82544EI_FIBER 0x1009 e1000_hw.h 　
13658
 E1000_DEV_ID_82544GC_COPPERE1000_DEV_ID_82544GC_COPPER 0x100C e1000_hw.h 　
13659
 E1000_DEV_ID_82544GC_LOME1000_DEV_ID_82544GC_LOM 0x100D e1000_hw.h 　
13660
 E1000_DEV_ID_82540EME1000_DEV_ID_82540EM 0x100E e1000_hw.h 　
13661
 E1000_DEV_ID_82540EM_LOME1000_DEV_ID_82540EM_LOM 0x1015 e1000_hw.h 　
13662
 E1000_DEV_ID_82540EP_LOME1000_DEV_ID_82540EP_LOM 0x1016 e1000_hw.h 　
13663
 E1000_DEV_ID_82540EPE1000_DEV_ID_82540EP 0x1017 e1000_hw.h 　
13664
 E1000_DEV_ID_82540EP_LPE1000_DEV_ID_82540EP_LP 0x101E e1000_hw.h 　
13665
 E1000_DEV_ID_82545EM_COPPERE1000_DEV_ID_82545EM_COPPER 0x100F e1000_hw.h 　
13666
 E1000_DEV_ID_82545EM_FIBERE1000_DEV_ID_82545EM_FIBER 0x1011 e1000_hw.h 　
13667
 E1000_DEV_ID_82545GM_COPPERE1000_DEV_ID_82545GM_COPPER 0x1026 e1000_hw.h 　
13668
 E1000_DEV_ID_82545GM_FIBERE1000_DEV_ID_82545GM_FIBER 0x1027 e1000_hw.h 　
13669
 E1000_DEV_ID_82545GM_SERDESE1000_DEV_ID_82545GM_SERDES 0x1028 e1000_hw.h 　
13670
 E1000_DEV_ID_82546EB_COPPERE1000_DEV_ID_82546EB_COPPER 0x1010 e1000_hw.h 　
13671
 E1000_DEV_ID_82546EB_FIBERE1000_DEV_ID_82546EB_FIBER 0x1012 e1000_hw.h 　
13672
 E1000_DEV_ID_82546EB_QUAD_COPPEE1000_DEV_ID_82546EB_QUAD_COPPE 0x101D e1000_hw.h 　
13673
 E1000_DEV_ID_82541EIE1000_DEV_ID_82541EI 0x1013 e1000_hw.h 　
13674
 E1000_DEV_ID_82541EI_MOBILEE1000_DEV_ID_82541EI_MOBILE 0x1018 e1000_hw.h 　
13675
 E1000_DEV_ID_82541ER_LOME1000_DEV_ID_82541ER_LOM 0x1014 e1000_hw.h 　
13676
 E1000_DEV_ID_82541ERE1000_DEV_ID_82541ER 0x1078 e1000_hw.h 　
13677
 E1000_DEV_ID_82547GIE1000_DEV_ID_82547GI 0x1075 e1000_hw.h 　
13678
 E1000_DEV_ID_82541GIE1000_DEV_ID_82541GI 0x1076 e1000_hw.h 　
13679
 E1000_DEV_ID_82541GI_MOBILEE1000_DEV_ID_82541GI_MOBILE 0x1077 e1000_hw.h 　
13680
 E1000_DEV_ID_82541GI_LFE1000_DEV_ID_82541GI_LF 0x107C e1000_hw.h 　
13681
 E1000_DEV_ID_82546GB_COPPERE1000_DEV_ID_82546GB_COPPER 0x1079 e1000_hw.h 　
13682
 E1000_DEV_ID_82546GB_FIBERE1000_DEV_ID_82546GB_FIBER 0x107A e1000_hw.h 　
13683
 E1000_DEV_ID_82546GB_SERDESE1000_DEV_ID_82546GB_SERDES 0x107B e1000_hw.h 　
13684
 E1000_DEV_ID_82546GB_PCIEE1000_DEV_ID_82546GB_PCIE 0x108A e1000_hw.h 　
13685
 E1000_DEV_ID_82546GB_QUAD_COPPEE1000_DEV_ID_82546GB_QUAD_COPPE 0x1099 e1000_hw.h 　
13686
 E1000_DEV_ID_82547EIE1000_DEV_ID_82547EI 0x1019 e1000_hw.h 　
13687
 E1000_DEV_ID_82547EI_MOBILEE1000_DEV_ID_82547EI_MOBILE 0x101A e1000_hw.h 　
13688
 E1000_DEV_ID_82571EB_COPPERE1000_DEV_ID_82571EB_COPPER 0x105E e1000_hw.h 　
13689
 E1000_DEV_ID_82571EB_FIBERE1000_DEV_ID_82571EB_FIBER 0x105F e1000_hw.h 　
13690
 E1000_DEV_ID_82571EB_SERDESE1000_DEV_ID_82571EB_SERDES 0x1060 e1000_hw.h 　
13691
 E1000_DEV_ID_82571EB_QUAD_COPPEE1000_DEV_ID_82571EB_QUAD_COPPE 0x10A4 e1000_hw.h 　
13692
 E1000_DEV_ID_82571EB_QUAD_FIBERE1000_DEV_ID_82571EB_QUAD_FIBER 0x10A5 e1000_hw.h 　
13693
 E1000_DEV_ID_82571EB_QUAD_COPPEE1000_DEV_ID_82571EB_QUAD_COPPE 0x10BC e1000_hw.h 　
13694
 E1000_DEV_ID_82571EB_SERDES_DUAE1000_DEV_ID_82571EB_SERDES_DUA 0x10D9 e1000_hw.h 　
13695
 E1000_DEV_ID_82571EB_SERDES_QUAE1000_DEV_ID_82571EB_SERDES_QUA 0x10DA e1000_hw.h 　
13696
 E1000_DEV_ID_82572EI_COPPERE1000_DEV_ID_82572EI_COPPER 0x107D e1000_hw.h 　
13697
 E1000_DEV_ID_82572EI_FIBERE1000_DEV_ID_82572EI_FIBER 0x107E e1000_hw.h 　
13698
 E1000_DEV_ID_82572EI_SERDESE1000_DEV_ID_82572EI_SERDES 0x107F e1000_hw.h 　
13699
 E1000_DEV_ID_82572EIE1000_DEV_ID_82572EI 0x10B9 e1000_hw.h 　
13700
 E1000_DEV_ID_82573EE1000_DEV_ID_82573E 0x108B e1000_hw.h 　
13701
 E1000_DEV_ID_82573E_IAMTE1000_DEV_ID_82573E_IAMT 0x108C e1000_hw.h 　
13702
 E1000_DEV_ID_82573LE1000_DEV_ID_82573L 0x109A e1000_hw.h 　
13703
 E1000_DEV_ID_82546GB_QUAD_COPPEE1000_DEV_ID_82546GB_QUAD_COPPE 0x10B5 e1000_hw.h 　
13704
 E1000_DEV_ID_80003ES2LAN_COPPERE1000_DEV_ID_80003ES2LAN_COPPER 0x1096 e1000_hw.h 　
13705
 E1000_DEV_ID_80003ES2LAN_SERDESE1000_DEV_ID_80003ES2LAN_SERDES 0x1098 e1000_hw.h 　
13706
 E1000_DEV_ID_80003ES2LAN_COPPERE1000_DEV_ID_80003ES2LAN_COPPER 0x10BA e1000_hw.h 　
13707
 E1000_DEV_ID_80003ES2LAN_SERDESE1000_DEV_ID_80003ES2LAN_SERDES 0x10BB e1000_hw.h 　
13708
 E1000_DEV_ID_ICH8_IGP_M_AMTE1000_DEV_ID_ICH8_IGP_M_AMT 0x1049 e1000_hw.h 　
13709
 E1000_DEV_ID_ICH8_IGP_AMTE1000_DEV_ID_ICH8_IGP_AMT 0x104A e1000_hw.h 　
13710
 E1000_DEV_ID_ICH8_IGP_CE1000_DEV_ID_ICH8_IGP_C 0x104B e1000_hw.h 　
13711
 E1000_DEV_ID_ICH8_IFEE1000_DEV_ID_ICH8_IFE 0x104C e1000_hw.h 　
13712
 E1000_DEV_ID_ICH8_IFE_GTE1000_DEV_ID_ICH8_IFE_GT 0x10C4 e1000_hw.h 　
13713
 E1000_DEV_ID_ICH8_IFE_GE1000_DEV_ID_ICH8_IFE_G 0x10C5 e1000_hw.h 　
13714
 E1000_DEV_ID_ICH8_IGP_ME1000_DEV_ID_ICH8_IGP_M 0x104D e1000_hw.h 　
13715
 E1000_DEV_ID_82576E1000_DEV_ID_82576 0x10C9 e1000_hw.h 　
13716
 NODE_ADDRESS_SIZENODE_ADDRESS_SIZE 6 e1000_hw.h 　
13717
 ETH_LENGTH_OF_ADDRESSETH_LENGTH_OF_ADDRESS 6 e1000_hw.h 　
13718
 MAC_DECODE_SIZEMAC_DECODE_SIZE (128 * 1024) e1000_hw.h 　
13719
 E1000_82542_2_0_REV_IDE1000_82542_2_0_REV_ID 2 e1000_hw.h 　
13720
 E1000_82542_2_1_REV_IDE1000_82542_2_1_REV_ID 3 e1000_hw.h 　
13721
 E1000_REVISION_0E1000_REVISION_0 0 e1000_hw.h 　
13722
 E1000_REVISION_1E1000_REVISION_1 1 e1000_hw.h 　
13723
 E1000_REVISION_2E1000_REVISION_2 2 e1000_hw.h 　
13724
 E1000_REVISION_3E1000_REVISION_3 3 e1000_hw.h 　
13725
 SPEED_10SPEED_10 10 e1000_hw.h 　
13726
 SPEED_100SPEED_100 100 e1000_hw.h 　
13727
 SPEED_1000SPEED_1000 1000 e1000_hw.h 　
13728
 HALF_DUPLEXHALF_DUPLEX 1 e1000_hw.h 　
13729
 FULL_DUPLEXFULL_DUPLEX 2 e1000_hw.h 　
13730
 ENET_HEADER_SIZEENET_HEADER_SIZE 14 e1000_hw.h 　
13731
 MAXIMUM_ETHERNET_FRAME_SIZEMAXIMUM_ETHERNET_FRAME_SIZE 1518 e1000_hw.h With FCS
13732
 MINIMUM_ETHERNET_FRAME_SIZEMINIMUM_ETHERNET_FRAME_SIZE 64 e1000_hw.h With FCS
13733
 ETHERNET_FCS_SIZEETHERNET_FCS_SIZE 4 e1000_hw.h 　
13734
 MAXIMUM_ETHERNET_PACKET_SIZEMAXIMUM_ETHERNET_PACKET_SIZE (MAXIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE) e1000_hw.h 　
13735
 MINIMUM_ETHERNET_PACKET_SIZEMINIMUM_ETHERNET_PACKET_SIZE (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE) e1000_hw.h 　
13736
 CRC_LENGTHCRC_LENGTH ETHERNET_FCS_SIZE e1000_hw.h 　
13737
 MAX_JUMBO_FRAME_SIZEMAX_JUMBO_FRAME_SIZE 0x3F00 e1000_hw.h 　
13738
 VLAN_TAG_SIZEVLAN_TAG_SIZE 4 e1000_hw.h 802.3ac tag (not DMAed)
13739
 ETHERNET_IEEE_VLAN_TYPEETHERNET_IEEE_VLAN_TYPE 0x8100 e1000_hw.h 802.3ac packet
13740
 ETHERNET_IP_TYPEETHERNET_IP_TYPE 0x0800 e1000_hw.h IP packets
13741
 ETHERNET_ARP_TYPEETHERNET_ARP_TYPE 0x0806 e1000_hw.h Address Resolution Protocol (ARP)
13742
 IP_PROTOCOL_TCPIP_PROTOCOL_TCP 6 e1000_hw.h 　
13743
 IP_PROTOCOL_UDPIP_PROTOCOL_UDP 0x11 e1000_hw.h 　
13744
 POLL_IMS_ENABLE_MASKPOLL_IMS_ENABLE_MASK ( \ E1000_IMS_RXDMT0 | \ E1000_IMS_RXSEQ) e1000_hw.h 　
13745
 IMS_ENABLE_MASKIMS_ENABLE_MASK ( \ E1000_IMS_RXT0 | \ E1000_IMS_TXDW | \ E1000_IMS_RXDMT0 | \ E1000_IMS_RXSEQ | \ E1000_IMS_LSC | \ E10 e1000_hw.h 　
13746
 IMS_ICH8LAN_ENABLE_MASKIMS_ICH8LAN_ENABLE_MASK (\ E1000_IMS_DSW | \ E1000_IMS_PHYINT | \ E1000_IMS_EPRST) e1000_hw.h 　
13747
 E1000_RAR_ENTRIESE1000_RAR_ENTRIES 15 e1000_hw.h 　
13748
 E1000_RAR_ENTRIES_ICH8LANE1000_RAR_ENTRIES_ICH8LAN 6 e1000_hw.h 　
13749
 MIN_NUMBER_OF_DESCRIPTORSMIN_NUMBER_OF_DESCRIPTORS 8 e1000_hw.h 　
13750
 MAX_NUMBER_OF_DESCRIPTORSMAX_NUMBER_OF_DESCRIPTORS 0xFFF8 e1000_hw.h 　
13751
 MAX_PS_BUFFERSMAX_PS_BUFFERS 4 e1000_hw.h 　
13752
 E1000_RXD_STAT_DDE1000_RXD_STAT_DD 0x01 e1000_hw.h Descriptor Done
13753
 E1000_RXD_STAT_EOPE1000_RXD_STAT_EOP 0x02 e1000_hw.h End of Packet
13754
 E1000_RXD_STAT_IXSME1000_RXD_STAT_IXSM 0x04 e1000_hw.h Ignore checksum
13755
 E1000_RXD_STAT_VPE1000_RXD_STAT_VP 0x08 e1000_hw.h IEEE VLAN Packet
13756
 E1000_RXD_STAT_UDPCSE1000_RXD_STAT_UDPCS 0x10 e1000_hw.h UDP xsum caculated
13757
 E1000_RXD_STAT_TCPCSE1000_RXD_STAT_TCPCS 0x20 e1000_hw.h TCP xsum calculated
13758
 E1000_RXD_STAT_IPCSE1000_RXD_STAT_IPCS 0x40 e1000_hw.h IP xsum calculated
13759
 E1000_RXD_STAT_PIFE1000_RXD_STAT_PIF 0x80 e1000_hw.h passed in-exact filter
13760
 E1000_RXD_STAT_IPIDVE1000_RXD_STAT_IPIDV 0x200 e1000_hw.h IP identification valid
13761
 E1000_RXD_STAT_UDPVE1000_RXD_STAT_UDPV 0x400 e1000_hw.h Valid UDP checksum
13762
 E1000_RXD_STAT_ACKE1000_RXD_STAT_ACK 0x8000 e1000_hw.h ACK Packet indication
13763
 E1000_RXD_ERR_CEE1000_RXD_ERR_CE 0x01 e1000_hw.h CRC Error
13764
 E1000_RXD_ERR_SEE1000_RXD_ERR_SE 0x02 e1000_hw.h Symbol Error
13765
 E1000_RXD_ERR_SEQE1000_RXD_ERR_SEQ 0x04 e1000_hw.h Sequence Error
13766
 E1000_RXD_ERR_CXEE1000_RXD_ERR_CXE 0x10 e1000_hw.h Carrier Extension Error
13767
 E1000_RXD_ERR_TCPEE1000_RXD_ERR_TCPE 0x20 e1000_hw.h TCP/UDP Checksum Error
13768
 E1000_RXD_ERR_IPEE1000_RXD_ERR_IPE 0x40 e1000_hw.h IP Checksum Error
13769
 E1000_RXD_ERR_RXEE1000_RXD_ERR_RXE 0x80 e1000_hw.h Rx Data Error
13770
 E1000_RXD_SPC_VLAN_MASKE1000_RXD_SPC_VLAN_MASK 0x0FFF e1000_hw.h VLAN ID is in lower 12 bits
13771
 E1000_RXD_SPC_PRI_MASKE1000_RXD_SPC_PRI_MASK 0xE000 e1000_hw.h Priority is in upper 3 bits
13772
 E1000_RXD_SPC_PRI_SHIFTE1000_RXD_SPC_PRI_SHIFT 13 e1000_hw.h 　
13773
 E1000_RXD_SPC_CFI_MASKE1000_RXD_SPC_CFI_MASK 0x1000 e1000_hw.h CFI is bit 12
13774
 E1000_RXD_SPC_CFI_SHIFTE1000_RXD_SPC_CFI_SHIFT 12 e1000_hw.h 　
13775
 E1000_RXDEXT_STATERR_CEE1000_RXDEXT_STATERR_CE 0x01000000 e1000_hw.h 　
13776
 E1000_RXDEXT_STATERR_SEE1000_RXDEXT_STATERR_SE 0x02000000 e1000_hw.h 　
13777
 E1000_RXDEXT_STATERR_SEQE1000_RXDEXT_STATERR_SEQ 0x04000000 e1000_hw.h 　
13778
 E1000_RXDEXT_STATERR_CXEE1000_RXDEXT_STATERR_CXE 0x10000000 e1000_hw.h 　
13779
 E1000_RXDEXT_STATERR_TCPEE1000_RXDEXT_STATERR_TCPE 0x20000000 e1000_hw.h 　
13780
 E1000_RXDEXT_STATERR_IPEE1000_RXDEXT_STATERR_IPE 0x40000000 e1000_hw.h 　
13781
 E1000_RXDEXT_STATERR_RXEE1000_RXDEXT_STATERR_RXE 0x80000000 e1000_hw.h 　
13782
 E1000_RXDPS_HDRSTAT_HDRSPE1000_RXDPS_HDRSTAT_HDRSP 0x00008000 e1000_hw.h 　
13783
 E1000_RXDPS_HDRSTAT_HDRLEN_MASKE1000_RXDPS_HDRSTAT_HDRLEN_MASK 0x000003FF e1000_hw.h 　
13784
 E1000_RXD_ERR_FRAME_ERR_MASKE1000_RXD_ERR_FRAME_ERR_MASK ( \ E1000_RXD_ERR_CE | \ E1000_RXD_ERR_SE | \ E1000_RXD_ERR_SEQ | \ E1000_RXD_ER e1000_hw.h 　
13785
 E1000_RXDEXT_ERR_FRAME_ERR_MASKE1000_RXDEXT_ERR_FRAME_ERR_MASK ( \ E1000_RXDEXT_STATERR_CE | \ E1000_RXDEXT_STATERR_SE | \ E1000_RXDEXT_STATERR_SEQ | \ E10 e1000_hw.h 　
13786
 E1000_TXD_DTYP_DE1000_TXD_DTYP_D 0x00100000 e1000_hw.h Data Descriptor
13787
 E1000_TXD_DTYP_CE1000_TXD_DTYP_C 0x00000000 e1000_hw.h Context Descriptor
13788
 E1000_TXD_POPTS_IXSME1000_TXD_POPTS_IXSM 0x01 e1000_hw.h Insert IP checksum
13789
 E1000_TXD_POPTS_TXSME1000_TXD_POPTS_TXSM 0x02 e1000_hw.h Insert TCP/UDP checksum
13790
 E1000_TXD_CMD_EOPE1000_TXD_CMD_EOP 0x01000000 e1000_hw.h End of Packet
13791
 E1000_TXD_CMD_IFCSE1000_TXD_CMD_IFCS 0x02000000 e1000_hw.h Insert FCS (Ethernet CRC)
13792
 E1000_TXD_CMD_ICE1000_TXD_CMD_IC 0x04000000 e1000_hw.h Insert Checksum
13793
 E1000_TXD_CMD_RSE1000_TXD_CMD_RS 0x08000000 e1000_hw.h Report Status
13794
 E1000_TXD_CMD_RPSE1000_TXD_CMD_RPS 0x10000000 e1000_hw.h Report Packet Sent
13795
 E1000_TXD_CMD_DEXTE1000_TXD_CMD_DEXT 0x20000000 e1000_hw.h Descriptor extension (0 = legacy)
13796
 E1000_TXD_CMD_VLEE1000_TXD_CMD_VLE 0x40000000 e1000_hw.h Add VLAN tag
13797
 E1000_TXD_CMD_IDEE1000_TXD_CMD_IDE 0x80000000 e1000_hw.h Enable Tidv register
13798
 E1000_TXD_STAT_DDE1000_TXD_STAT_DD 0x00000001 e1000_hw.h Descriptor Done
13799
 E1000_TXD_STAT_ECE1000_TXD_STAT_EC 0x00000002 e1000_hw.h Excess Collisions
13800
 E1000_TXD_STAT_LCE1000_TXD_STAT_LC 0x00000004 e1000_hw.h Late Collisions
13801
 E1000_TXD_STAT_TUE1000_TXD_STAT_TU 0x00000008 e1000_hw.h Transmit underrun
13802
 E1000_TXD_CMD_TCPE1000_TXD_CMD_TCP 0x01000000 e1000_hw.h TCP packet
13803
 E1000_TXD_CMD_IPE1000_TXD_CMD_IP 0x02000000 e1000_hw.h IP packet
13804
 E1000_TXD_CMD_TSEE1000_TXD_CMD_TSE 0x04000000 e1000_hw.h TCP Seg enable
13805
 E1000_TXD_STAT_TCE1000_TXD_STAT_TC 0x00000004 e1000_hw.h Tx Underrun
13806
 E1000_NUM_UNICASTE1000_NUM_UNICAST 16 e1000_hw.h Unicast filter entries
13807
 E1000_MC_TBL_SIZEE1000_MC_TBL_SIZE 128 e1000_hw.h Multicast Filter Table (4096 bits)
13808
 E1000_VLAN_FILTER_TBL_SIZEE1000_VLAN_FILTER_TBL_SIZE 128 e1000_hw.h VLAN Filter Table (4096 bits)
13809
 E1000_NUM_UNICAST_ICH8LANE1000_NUM_UNICAST_ICH8LAN 7 e1000_hw.h 　
13810
 E1000_MC_TBL_SIZE_ICH8LANE1000_MC_TBL_SIZE_ICH8LAN 32 e1000_hw.h 　
13811
 E1000_NUM_MTA_REGISTERSE1000_NUM_MTA_REGISTERS 128 e1000_hw.h 　
13812
 E1000_NUM_MTA_REGISTERS_ICH8LANE1000_NUM_MTA_REGISTERS_ICH8LAN 32 e1000_hw.h 　
13813
 E1000_WAKEUP_IP_ADDRESS_COUNT_ME1000_WAKEUP_IP_ADDRESS_COUNT_M 4 e1000_hw.h 　
13814
 E1000_IP4AT_SIZEE1000_IP4AT_SIZE E1000_WAKEUP_IP_ADDRESS_COUNT_MAX e1000_hw.h 　
13815
 E1000_IP4AT_SIZE_ICH8LANE1000_IP4AT_SIZE_ICH8LAN 3 e1000_hw.h 　
13816
 E1000_IP6AT_SIZEE1000_IP6AT_SIZE 1 e1000_hw.h 　
13817
 E1000_FLEXIBLE_FILTER_COUNT_MAXE1000_FLEXIBLE_FILTER_COUNT_MAX 4 e1000_hw.h 　
13818
 E1000_FLEXIBLE_FILTER_SIZE_MAXE1000_FLEXIBLE_FILTER_SIZE_MAX 128 e1000_hw.h 　
13819
 E1000_FFLT_SIZEE1000_FFLT_SIZE E1000_FLEXIBLE_FILTER_COUNT_MAX e1000_hw.h 　
13820
 E1000_FFMT_SIZEE1000_FFMT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX e1000_hw.h 　
13821
 E1000_FFVT_SIZEE1000_FFVT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX e1000_hw.h 　
13822
 E1000_DISABLE_SERDES_LOOPBACKE1000_DISABLE_SERDES_LOOPBACK 0x0400 e1000_hw.h 　
13823
 E1000_CTRLE1000_CTRL 0x00000 e1000_hw.h Device Control - RW
13824
 E1000_CTRL_DUPE1000_CTRL_DUP 0x00004 e1000_hw.h Device Control Duplicate (Shadow) - RW
13825
 E1000_STATUSE1000_STATUS 0x00008 e1000_hw.h Device Status - RO
13826
 E1000_EECDE1000_EECD 0x00010 e1000_hw.h EEPROM/Flash Control - RW
13827
 E1000_EERDE1000_EERD 0x00014 e1000_hw.h EEPROM Read - RW
13828
 E1000_CTRL_EXTE1000_CTRL_EXT 0x00018 e1000_hw.h Extended Device Control - RW
13829
 E1000_FLAE1000_FLA 0x0001C e1000_hw.h Flash Access - RW
13830
 E1000_MDICE1000_MDIC 0x00020 e1000_hw.h MDI Control - RW
13831
 E1000_SCTLE1000_SCTL 0x00024 e1000_hw.h SerDes Control - RW
13832
 E1000_FEXTNVME1000_FEXTNVM 0x00028 e1000_hw.h Future Extended NVM register
13833
 E1000_FCALE1000_FCAL 0x00028 e1000_hw.h Flow Control Address Low - RW
13834
 E1000_FCAHE1000_FCAH 0x0002C e1000_hw.h Flow Control Address High -RW
13835
 E1000_FCTE1000_FCT 0x00030 e1000_hw.h Flow Control Type - RW
13836
 E1000_VETE1000_VET 0x00038 e1000_hw.h VLAN Ether Type - RW
13837
 E1000_ICRE1000_ICR 0x000C0 e1000_hw.h Interrupt Cause Read - R/clr
13838
 E1000_ITRE1000_ITR 0x000C4 e1000_hw.h Interrupt Throttling Rate - RW
13839
 E1000_ICSE1000_ICS 0x000C8 e1000_hw.h Interrupt Cause Set - WO
13840
 E1000_IMSE1000_IMS 0x000D0 e1000_hw.h Interrupt Mask Set - RW
13841
 E1000_IMCE1000_IMC 0x000D8 e1000_hw.h Interrupt Mask Clear - WO
13842
 E1000_IAME1000_IAM 0x000E0 e1000_hw.h Interrupt Acknowledge Auto Mask
13843
 E1000_RCTLE1000_RCTL 0x00100 e1000_hw.h RX Control - RW
13844
 E1000_RDTR1E1000_RDTR1 0x02820 e1000_hw.h RX Delay Timer (1) - RW
13845
 E1000_RDBAL1E1000_RDBAL1 0x02900 e1000_hw.h RX Descriptor Base Address Low (1) - RW
13846
 E1000_RDBAH1E1000_RDBAH1 0x02904 e1000_hw.h RX Descriptor Base Address High (1) - RW
13847
 E1000_RDLEN1E1000_RDLEN1 0x02908 e1000_hw.h RX Descriptor Length (1) - RW
13848
 E1000_RDH1E1000_RDH1 0x02910 e1000_hw.h RX Descriptor Head (1) - RW
13849
 E1000_RDT1E1000_RDT1 0x02918 e1000_hw.h RX Descriptor Tail (1) - RW
13850
 E1000_FCTTVE1000_FCTTV 0x00170 e1000_hw.h Flow Control Transmit Timer Value - RW
13851
 E1000_TXCWE1000_TXCW 0x00178 e1000_hw.h TX Configuration Word - RW
13852
 E1000_RXCWE1000_RXCW 0x00180 e1000_hw.h RX Configuration Word - RO
13853
 E1000_TCTLE1000_TCTL 0x00400 e1000_hw.h TX Control - RW
13854
 E1000_TCTL_EXTE1000_TCTL_EXT 0x00404 e1000_hw.h Extended TX Control - RW
13855
 E1000_TIPGE1000_TIPG 0x00410 e1000_hw.h TX Inter-packet gap -RW
13856
 E1000_TBTE1000_TBT 0x00448 e1000_hw.h TX Burst Timer - RW
13857
 E1000_AITE1000_AIT 0x00458 e1000_hw.h Adaptive Interframe Spacing Throttle - RW
13858
 E1000_LEDCTLE1000_LEDCTL 0x00E00 e1000_hw.h LED Control - RW
13859
 E1000_EXTCNF_CTRLE1000_EXTCNF_CTRL 0x00F00 e1000_hw.h Extended Configuration Control
13860
 E1000_EXTCNF_SIZEE1000_EXTCNF_SIZE 0x00F08 e1000_hw.h Extended Configuration Size
13861
 E1000_PHY_CTRLE1000_PHY_CTRL 0x00F10 e1000_hw.h PHY Control Register in CSR
13862
 FEXTNVM_SW_CONFIGFEXTNVM_SW_CONFIG 0x0001 e1000_hw.h 　
13863
 E1000_PBAE1000_PBA 0x01000 e1000_hw.h Packet Buffer Allocation - RW
13864
 E1000_PBSE1000_PBS 0x01008 e1000_hw.h Packet Buffer Size
13865
 E1000_EEMNGCTLE1000_EEMNGCTL 0x01010 e1000_hw.h MNG EEprom Control
13866
 E1000_FLASH_UPDATESE1000_FLASH_UPDATES 1000 e1000_hw.h 　
13867
 E1000_EEARBCE1000_EEARBC 0x01024 e1000_hw.h EEPROM Auto Read Bus Control
13868
 E1000_FLASHTE1000_FLASHT 0x01028 e1000_hw.h FLASH Timer Register
13869
 E1000_EEWRE1000_EEWR 0x0102C e1000_hw.h EEPROM Write Register - RW
13870
 E1000_FLSWCTLE1000_FLSWCTL 0x01030 e1000_hw.h FLASH control register
13871
 E1000_FLSWDATAE1000_FLSWDATA 0x01034 e1000_hw.h FLASH data register
13872
 E1000_FLSWCNTE1000_FLSWCNT 0x01038 e1000_hw.h FLASH Access Counter
13873
 E1000_FLOPE1000_FLOP 0x0103C e1000_hw.h FLASH Opcode Register
13874
 E1000_ERTE1000_ERT 0x02008 e1000_hw.h Early Rx Threshold - RW
13875
 E1000_FCRTLE1000_FCRTL 0x02160 e1000_hw.h Flow Control Receive Threshold Low - RW
13876
 E1000_FCRTHE1000_FCRTH 0x02168 e1000_hw.h Flow Control Receive Threshold High - RW
13877
 E1000_PSRCTLE1000_PSRCTL 0x02170 e1000_hw.h Packet Split Receive Control - RW
13878
 E1000_RDBALE1000_RDBAL 0x02800 e1000_hw.h RX Descriptor Base Address Low - RW
13879
 E1000_RDBAHE1000_RDBAH 0x02804 e1000_hw.h RX Descriptor Base Address High - RW
13880
 E1000_RDLENE1000_RDLEN 0x02808 e1000_hw.h RX Descriptor Length - RW
13881
 E1000_RDHE1000_RDH 0x02810 e1000_hw.h RX Descriptor Head - RW
13882
 E1000_RDTE1000_RDT 0x02818 e1000_hw.h RX Descriptor Tail - RW
13883
 E1000_RDTRE1000_RDTR 0x02820 e1000_hw.h RX Delay Timer - RW
13884
 E1000_RDBAL0E1000_RDBAL0 E1000_RDBAL e1000_hw.h RX Desc Base Address Low (0) - RW
13885
 E1000_RDBAH0E1000_RDBAH0 E1000_RDBAH e1000_hw.h RX Desc Base Address High (0) - RW
13886
 E1000_RDLEN0E1000_RDLEN0 E1000_RDLEN e1000_hw.h RX Desc Length (0) - RW
13887
 E1000_RDH0E1000_RDH0 E1000_RDH e1000_hw.h RX Desc Head (0) - RW
13888
 E1000_RDT0E1000_RDT0 E1000_RDT e1000_hw.h RX Desc Tail (0) - RW
13889
 E1000_RDTR0E1000_RDTR0 E1000_RDTR e1000_hw.h RX Delay Timer (0) - RW
13890
 E1000_RXDCTLE1000_RXDCTL 0x02828 e1000_hw.h RX Descriptor Control queue 0 - RW
13891
 E1000_RXDCTL1E1000_RXDCTL1 0x02928 e1000_hw.h RX Descriptor Control queue 1 - RW
13892
 E1000_RADVE1000_RADV 0x0282C e1000_hw.h RX Interrupt Absolute Delay Timer - RW
13893
 E1000_RSRPDE1000_RSRPD 0x02C00 e1000_hw.h RX Small Packet Detect - RW
13894
 E1000_RAIDE1000_RAID 0x02C08 e1000_hw.h Receive Ack Interrupt Delay - RW
13895
 E1000_TXDMACE1000_TXDMAC 0x03000 e1000_hw.h TX DMA Control - RW
13896
 E1000_KABGTXDE1000_KABGTXD 0x03004 e1000_hw.h AFE Band Gap Transmit Ref Data
13897
 E1000_TDFHE1000_TDFH 0x03410 e1000_hw.h TX Data FIFO Head - RW
13898
 E1000_TDFTE1000_TDFT 0x03418 e1000_hw.h TX Data FIFO Tail - RW
13899
 E1000_TDFHSE1000_TDFHS 0x03420 e1000_hw.h TX Data FIFO Head Saved - RW
13900
 E1000_TDFTSE1000_TDFTS 0x03428 e1000_hw.h TX Data FIFO Tail Saved - RW
13901
 E1000_TDFPCE1000_TDFPC 0x03430 e1000_hw.h TX Data FIFO Packet Count - RW
13902
 E1000_TDBALE1000_TDBAL 0x03800 e1000_hw.h TX Descriptor Base Address Low - RW
13903
 E1000_TDBAHE1000_TDBAH 0x03804 e1000_hw.h TX Descriptor Base Address High - RW
13904
 E1000_TDLENE1000_TDLEN 0x03808 e1000_hw.h TX Descriptor Length - RW
13905
 E1000_TDHE1000_TDH 0x03810 e1000_hw.h TX Descriptor Head - RW
13906
 E1000_TDTE1000_TDT 0x03818 e1000_hw.h TX Descripotr Tail - RW
13907
 E1000_TIDVE1000_TIDV 0x03820 e1000_hw.h TX Interrupt Delay Value - RW
13908
 E1000_TXDCTLE1000_TXDCTL 0x03828 e1000_hw.h TX Descriptor Control - RW
13909
 E1000_TADVE1000_TADV 0x0382C e1000_hw.h TX Interrupt Absolute Delay Val - RW
13910
 E1000_TSPMTE1000_TSPMT 0x03830 e1000_hw.h TCP Segmentation PAD & Min Threshold - RW
13911
 E1000_TARC0E1000_TARC0 0x03840 e1000_hw.h TX Arbitration Count (0)
13912
 E1000_TDBAL1E1000_TDBAL1 0x03900 e1000_hw.h TX Desc Base Address Low (1) - RW
13913
 E1000_TDBAH1E1000_TDBAH1 0x03904 e1000_hw.h TX Desc Base Address High (1) - RW
13914
 E1000_TDLEN1E1000_TDLEN1 0x03908 e1000_hw.h TX Desc Length (1) - RW
13915
 E1000_TDH1E1000_TDH1 0x03910 e1000_hw.h TX Desc Head (1) - RW
13916
 E1000_TDT1E1000_TDT1 0x03918 e1000_hw.h TX Desc Tail (1) - RW
13917
 E1000_TXDCTL1E1000_TXDCTL1 0x03928 e1000_hw.h TX Descriptor Control (1) - RW
13918
 E1000_TARC1E1000_TARC1 0x03940 e1000_hw.h TX Arbitration Count (1)
13919
 E1000_CRCERRSE1000_CRCERRS 0x04000 e1000_hw.h CRC Error Count - R/clr
13920
 E1000_ALGNERRCE1000_ALGNERRC 0x04004 e1000_hw.h Alignment Error Count - R/clr
13921
 E1000_SYMERRSE1000_SYMERRS 0x04008 e1000_hw.h Symbol Error Count - R/clr
13922
 E1000_RXERRCE1000_RXERRC 0x0400C e1000_hw.h Receive Error Count - R/clr
13923
 E1000_MPCE1000_MPC 0x04010 e1000_hw.h Missed Packet Count - R/clr
13924
 E1000_SCCE1000_SCC 0x04014 e1000_hw.h Single Collision Count - R/clr
13925
 E1000_ECOLE1000_ECOL 0x04018 e1000_hw.h Excessive Collision Count - R/clr
13926
 E1000_MCCE1000_MCC 0x0401C e1000_hw.h Multiple Collision Count - R/clr
13927
 E1000_LATECOLE1000_LATECOL 0x04020 e1000_hw.h Late Collision Count - R/clr
13928
 E1000_COLCE1000_COLC 0x04028 e1000_hw.h Collision Count - R/clr
13929
 E1000_DCE1000_DC 0x04030 e1000_hw.h Defer Count - R/clr
13930
 E1000_TNCRSE1000_TNCRS 0x04034 e1000_hw.h TX-No CRS - R/clr
13931
 E1000_SECE1000_SEC 0x04038 e1000_hw.h Sequence Error Count - R/clr
13932
 E1000_CEXTERRE1000_CEXTERR 0x0403C e1000_hw.h Carrier Extension Error Count - R/clr
13933
 E1000_RLECE1000_RLEC 0x04040 e1000_hw.h Receive Length Error Count - R/clr
13934
 E1000_XONRXCE1000_XONRXC 0x04048 e1000_hw.h XON RX Count - R/clr
13935
 E1000_XONTXCE1000_XONTXC 0x0404C e1000_hw.h XON TX Count - R/clr
13936
 E1000_XOFFRXCE1000_XOFFRXC 0x04050 e1000_hw.h XOFF RX Count - R/clr
13937
 E1000_XOFFTXCE1000_XOFFTXC 0x04054 e1000_hw.h XOFF TX Count - R/clr
13938
 E1000_FCRUCE1000_FCRUC 0x04058 e1000_hw.h Flow Control RX Unsupported Count- R/clr
13939
 E1000_PRC64E1000_PRC64 0x0405C e1000_hw.h Packets RX (64 bytes) - R/clr
13940
 E1000_PRC127E1000_PRC127 0x04060 e1000_hw.h Packets RX (65-127 bytes) - R/clr
13941
 E1000_PRC255E1000_PRC255 0x04064 e1000_hw.h Packets RX (128-255 bytes) - R/clr
13942
 E1000_PRC511E1000_PRC511 0x04068 e1000_hw.h Packets RX (255-511 bytes) - R/clr
13943
 E1000_PRC1023E1000_PRC1023 0x0406C e1000_hw.h Packets RX (512-1023 bytes) - R/clr
13944
 E1000_PRC1522E1000_PRC1522 0x04070 e1000_hw.h Packets RX (1024-1522 bytes) - R/clr
13945
 E1000_GPRCE1000_GPRC 0x04074 e1000_hw.h Good Packets RX Count - R/clr
13946
 E1000_BPRCE1000_BPRC 0x04078 e1000_hw.h Broadcast Packets RX Count - R/clr
13947
 E1000_MPRCE1000_MPRC 0x0407C e1000_hw.h Multicast Packets RX Count - R/clr
13948
 E1000_GPTCE1000_GPTC 0x04080 e1000_hw.h Good Packets TX Count - R/clr
13949
 E1000_GORCLE1000_GORCL 0x04088 e1000_hw.h Good Octets RX Count Low - R/clr
13950
 E1000_GORCHE1000_GORCH 0x0408C e1000_hw.h Good Octets RX Count High - R/clr
13951
 E1000_GOTCLE1000_GOTCL 0x04090 e1000_hw.h Good Octets TX Count Low - R/clr
13952
 E1000_GOTCHE1000_GOTCH 0x04094 e1000_hw.h Good Octets TX Count High - R/clr
13953
 E1000_RNBCE1000_RNBC 0x040A0 e1000_hw.h RX No Buffers Count - R/clr
13954
 E1000_RUCE1000_RUC 0x040A4 e1000_hw.h RX Undersize Count - R/clr
13955
 E1000_RFCE1000_RFC 0x040A8 e1000_hw.h RX Fragment Count - R/clr
13956
 E1000_ROCE1000_ROC 0x040AC e1000_hw.h RX Oversize Count - R/clr
13957
 E1000_RJCE1000_RJC 0x040B0 e1000_hw.h RX Jabber Count - R/clr
13958
 E1000_MGTPRCE1000_MGTPRC 0x040B4 e1000_hw.h Management Packets RX Count - R/clr
13959
 E1000_MGTPDCE1000_MGTPDC 0x040B8 e1000_hw.h Management Packets Dropped Count - R/clr
13960
 E1000_MGTPTCE1000_MGTPTC 0x040BC e1000_hw.h Management Packets TX Count - R/clr
13961
 E1000_TORLE1000_TORL 0x040C0 e1000_hw.h Total Octets RX Low - R/clr
13962
 E1000_TORHE1000_TORH 0x040C4 e1000_hw.h Total Octets RX High - R/clr
13963
 E1000_TOTLE1000_TOTL 0x040C8 e1000_hw.h Total Octets TX Low - R/clr
13964
 E1000_TOTHE1000_TOTH 0x040CC e1000_hw.h Total Octets TX High - R/clr
13965
 E1000_TPRE1000_TPR 0x040D0 e1000_hw.h Total Packets RX - R/clr
13966
 E1000_TPTE1000_TPT 0x040D4 e1000_hw.h Total Packets TX - R/clr
13967
 E1000_PTC64E1000_PTC64 0x040D8 e1000_hw.h Packets TX (64 bytes) - R/clr
13968
 E1000_PTC127E1000_PTC127 0x040DC e1000_hw.h Packets TX (65-127 bytes) - R/clr
13969
 E1000_PTC255E1000_PTC255 0x040E0 e1000_hw.h Packets TX (128-255 bytes) - R/clr
13970
 E1000_PTC511E1000_PTC511 0x040E4 e1000_hw.h Packets TX (256-511 bytes) - R/clr
13971
 E1000_PTC1023E1000_PTC1023 0x040E8 e1000_hw.h Packets TX (512-1023 bytes) - R/clr
13972
 E1000_PTC1522E1000_PTC1522 0x040EC e1000_hw.h Packets TX (1024-1522 Bytes) - R/clr
13973
 E1000_MPTCE1000_MPTC 0x040F0 e1000_hw.h Multicast Packets TX Count - R/clr
13974
 E1000_BPTCE1000_BPTC 0x040F4 e1000_hw.h Broadcast Packets TX Count - R/clr
13975
 E1000_TSCTCE1000_TSCTC 0x040F8 e1000_hw.h TCP Segmentation Context TX - R/clr
13976
 E1000_TSCTFCE1000_TSCTFC 0x040FC e1000_hw.h TCP Segmentation Context TX Fail - R/clr
13977
 E1000_IACE1000_IAC 0x04100 e1000_hw.h Interrupt Assertion Count
13978
 E1000_ICRXPTCE1000_ICRXPTC 0x04104 e1000_hw.h Interrupt Cause Rx Packet Timer Expire Count
13979
 E1000_ICRXATCE1000_ICRXATC 0x04108 e1000_hw.h Interrupt Cause Rx Absolute Timer Expire Count
13980
 E1000_ICTXPTCE1000_ICTXPTC 0x0410C e1000_hw.h Interrupt Cause Tx Packet Timer Expire Count
13981
 E1000_ICTXATCE1000_ICTXATC 0x04110 e1000_hw.h Interrupt Cause Tx Absolute Timer Expire Count
13982
 E1000_ICTXQECE1000_ICTXQEC 0x04118 e1000_hw.h Interrupt Cause Tx Queue Empty Count
13983
 E1000_ICTXQMTCE1000_ICTXQMTC 0x0411C e1000_hw.h Interrupt Cause Tx Queue Minimum Threshold Count
13984
 E1000_ICRXDMTCE1000_ICRXDMTC 0x04120 e1000_hw.h Interrupt Cause Rx Descriptor Minimum Threshold Count
13985
 E1000_ICRXOCE1000_ICRXOC 0x04124 e1000_hw.h Interrupt Cause Receiver Overrun Count
13986
 E1000_RXCSUME1000_RXCSUM 0x05000 e1000_hw.h RX Checksum Control - RW
13987
 E1000_RFCTLE1000_RFCTL 0x05008 e1000_hw.h Receive Filter Control
13988
 E1000_MTAE1000_MTA 0x05200 e1000_hw.h Multicast Table Array - RW Array
13989
 E1000_RAE1000_RA 0x05400 e1000_hw.h Receive Address - RW Array
13990
 E1000_VFTAE1000_VFTA 0x05600 e1000_hw.h VLAN Filter Table Array - RW Array
13991
 E1000_WUCE1000_WUC 0x05800 e1000_hw.h Wakeup Control - RW
13992
 E1000_WUFCE1000_WUFC 0x05808 e1000_hw.h Wakeup Filter Control - RW
13993
 E1000_WUSE1000_WUS 0x05810 e1000_hw.h Wakeup Status - RO
13994
 E1000_MANCE1000_MANC 0x05820 e1000_hw.h Management Control - RW
13995
 E1000_IPAVE1000_IPAV 0x05838 e1000_hw.h IP Address Valid - RW
13996
 E1000_IP4ATE1000_IP4AT 0x05840 e1000_hw.h IPv4 Address Table - RW Array
13997
 E1000_IP6ATE1000_IP6AT 0x05880 e1000_hw.h IPv6 Address Table - RW Array
13998
 E1000_WUPLE1000_WUPL 0x05900 e1000_hw.h Wakeup Packet Length - RW
13999
 E1000_WUPME1000_WUPM 0x05A00 e1000_hw.h Wakeup Packet Memory - RO A
14000
 E1000_FFLTE1000_FFLT 0x05F00 e1000_hw.h Flexible Filter Length Table - RW Array
14001
 E1000_HOST_IFE1000_HOST_IF 0x08800 e1000_hw.h Host Interface
14002
 E1000_FFMTE1000_FFMT 0x09000 e1000_hw.h Flexible Filter Mask Table - RW Array
14003
 E1000_FFVTE1000_FFVT 0x09800 e1000_hw.h Flexible Filter Value Table - RW Array
14004
 E1000_KUMCTRLSTAE1000_KUMCTRLSTA 0x00034 e1000_hw.h MAC-PHY interface - RW
14005
 E1000_MDPHYAE1000_MDPHYA 0x0003C e1000_hw.h PHY address - RW
14006
 E1000_MANC2HE1000_MANC2H 0x05860 e1000_hw.h Managment Control To Host - RW
14007
 E1000_SW_FW_SYNCE1000_SW_FW_SYNC 0x05B5C e1000_hw.h Software-Firmware Synchronization - RW
14008
 E1000_GCRE1000_GCR 0x05B00 e1000_hw.h PCI-Ex Control
14009
 E1000_GSCL_1E1000_GSCL_1 0x05B10 e1000_hw.h PCI-Ex Statistic Control #1
14010
 E1000_GSCL_2E1000_GSCL_2 0x05B14 e1000_hw.h PCI-Ex Statistic Control #2
14011
 E1000_GSCL_3E1000_GSCL_3 0x05B18 e1000_hw.h PCI-Ex Statistic Control #3
14012
 E1000_GSCL_4E1000_GSCL_4 0x05B1C e1000_hw.h PCI-Ex Statistic Control #4
14013
 E1000_FACTPSE1000_FACTPS 0x05B30 e1000_hw.h Function Active and Power State to MNG
14014
 E1000_SWSME1000_SWSM 0x05B50 e1000_hw.h SW Semaphore
14015
 E1000_FWSME1000_FWSM 0x05B54 e1000_hw.h FW Semaphore
14016
 E1000_FFLT_DBGE1000_FFLT_DBG 0x05F04 e1000_hw.h Debug Register
14017
 E1000_HICRE1000_HICR 0x08F00 e1000_hw.h Host Inteface Control
14018
 E1000_CPUVECE1000_CPUVEC 0x02C10 e1000_hw.h CPU Vector Register - RW
14019
 E1000_MRQCE1000_MRQC 0x05818 e1000_hw.h Multiple Receive Control - RW
14020
 E1000_RETAE1000_RETA 0x05C00 e1000_hw.h Redirection Table - RW Array
14021
 E1000_RSSRKE1000_RSSRK 0x05C80 e1000_hw.h RSS Random Key - RW Array
14022
 E1000_RSSIME1000_RSSIM 0x05864 e1000_hw.h RSS Interrupt Mask
14023
 E1000_RSSIRE1000_RSSIR 0x05868 e1000_hw.h RSS Interrupt Request
14024
 E1000_82542_CTRLE1000_82542_CTRL E1000_CTRL e1000_hw.h 　
14025
 E1000_82542_CTRL_DUPE1000_82542_CTRL_DUP E1000_CTRL_DUP e1000_hw.h 　
14026
 E1000_82542_STATUSE1000_82542_STATUS E1000_STATUS e1000_hw.h 　
14027
 E1000_82542_EECDE1000_82542_EECD E1000_EECD e1000_hw.h 　
14028
 E1000_82542_EERDE1000_82542_EERD E1000_EERD e1000_hw.h 　
14029
 E1000_82542_CTRL_EXTE1000_82542_CTRL_EXT E1000_CTRL_EXT e1000_hw.h 　
14030
 E1000_82542_FLAE1000_82542_FLA E1000_FLA e1000_hw.h 　
14031
 E1000_82542_MDICE1000_82542_MDIC E1000_MDIC e1000_hw.h 　
14032
 E1000_82542_SCTLE1000_82542_SCTL E1000_SCTL e1000_hw.h 　
14033
 E1000_82542_FEXTNVME1000_82542_FEXTNVM E1000_FEXTNVM e1000_hw.h 　
14034
 E1000_82542_FCALE1000_82542_FCAL E1000_FCAL e1000_hw.h 　
14035
 E1000_82542_FCAHE1000_82542_FCAH E1000_FCAH e1000_hw.h 　
14036
 E1000_82542_FCTE1000_82542_FCT E1000_FCT e1000_hw.h 　
14037
 E1000_82542_VETE1000_82542_VET E1000_VET e1000_hw.h 　
14038
 E1000_82542_RAE1000_82542_RA 0x00040 e1000_hw.h 　
14039
 E1000_82542_ICRE1000_82542_ICR E1000_ICR e1000_hw.h 　
14040
 E1000_82542_ITRE1000_82542_ITR E1000_ITR e1000_hw.h 　
14041
 E1000_82542_ICSE1000_82542_ICS E1000_ICS e1000_hw.h 　
14042
 E1000_82542_IMSE1000_82542_IMS E1000_IMS e1000_hw.h 　
14043
 E1000_82542_IMCE1000_82542_IMC E1000_IMC e1000_hw.h 　
14044
 E1000_82542_RCTLE1000_82542_RCTL E1000_RCTL e1000_hw.h 　
14045
 E1000_82542_RDTRE1000_82542_RDTR 0x00108 e1000_hw.h 　
14046
 E1000_82542_RDBALE1000_82542_RDBAL 0x00110 e1000_hw.h 　
14047
 E1000_82542_RDBAHE1000_82542_RDBAH 0x00114 e1000_hw.h 　
14048
 E1000_82542_RDLENE1000_82542_RDLEN 0x00118 e1000_hw.h 　
14049
 E1000_82542_RDHE1000_82542_RDH 0x00120 e1000_hw.h 　
14050
 E1000_82542_RDTE1000_82542_RDT 0x00128 e1000_hw.h 　
14051
 E1000_82542_RDTR0E1000_82542_RDTR0 E1000_82542_RDTR e1000_hw.h 　
14052
 E1000_82542_RDBAL0E1000_82542_RDBAL0 E1000_82542_RDBAL e1000_hw.h 　
14053
 E1000_82542_RDBAH0E1000_82542_RDBAH0 E1000_82542_RDBAH e1000_hw.h 　
14054
 E1000_82542_RDLEN0E1000_82542_RDLEN0 E1000_82542_RDLEN e1000_hw.h 　
14055
 E1000_82542_RDH0E1000_82542_RDH0 E1000_82542_RDH e1000_hw.h 　
14056
 E1000_82542_RDT0E1000_82542_RDT0 E1000_82542_RDT e1000_hw.h 　
14057
 E1000_82542_RDBAH3E1000_82542_RDBAH3 0x02B04 e1000_hw.h RX Desc Base High Queue 3 - RW
14058
 E1000_82542_RDBAL3E1000_82542_RDBAL3 0x02B00 e1000_hw.h RX Desc Low Queue 3 - RW
14059
 E1000_82542_RDLEN3E1000_82542_RDLEN3 0x02B08 e1000_hw.h RX Desc Length Queue 3 - RW
14060
 E1000_82542_RDH3E1000_82542_RDH3 0x02B10 e1000_hw.h RX Desc Head Queue 3 - RW
14061
 E1000_82542_RDT3E1000_82542_RDT3 0x02B18 e1000_hw.h RX Desc Tail Queue 3 - RW
14062
 E1000_82542_RDBAL2E1000_82542_RDBAL2 0x02A00 e1000_hw.h RX Desc Base Low Queue 2 - RW
14063
 E1000_82542_RDBAH2E1000_82542_RDBAH2 0x02A04 e1000_hw.h RX Desc Base High Queue 2 - RW
14064
 E1000_82542_RDLEN2E1000_82542_RDLEN2 0x02A08 e1000_hw.h RX Desc Length Queue 2 - RW
14065
 E1000_82542_RDH2E1000_82542_RDH2 0x02A10 e1000_hw.h RX Desc Head Queue 2 - RW
14066
 E1000_82542_RDT2E1000_82542_RDT2 0x02A18 e1000_hw.h RX Desc Tail Queue 2 - RW
14067
 E1000_82542_RDTR1E1000_82542_RDTR1 0x00130 e1000_hw.h 　
14068
 E1000_82542_RDBAL1E1000_82542_RDBAL1 0x00138 e1000_hw.h 　
14069
 E1000_82542_RDBAH1E1000_82542_RDBAH1 0x0013C e1000_hw.h 　
14070
 E1000_82542_RDLEN1E1000_82542_RDLEN1 0x00140 e1000_hw.h 　
14071
 E1000_82542_RDH1E1000_82542_RDH1 0x00148 e1000_hw.h 　
14072
 E1000_82542_RDT1E1000_82542_RDT1 0x00150 e1000_hw.h 　
14073
 E1000_82542_FCRTHE1000_82542_FCRTH 0x00160 e1000_hw.h 　
14074
 E1000_82542_FCRTLE1000_82542_FCRTL 0x00168 e1000_hw.h 　
14075
 E1000_82542_FCTTVE1000_82542_FCTTV E1000_FCTTV e1000_hw.h 　
14076
 E1000_82542_TXCWE1000_82542_TXCW E1000_TXCW e1000_hw.h 　
14077
 E1000_82542_RXCWE1000_82542_RXCW E1000_RXCW e1000_hw.h 　
14078
 E1000_82542_MTAE1000_82542_MTA 0x00200 e1000_hw.h 　
14079
 E1000_82542_TCTLE1000_82542_TCTL E1000_TCTL e1000_hw.h 　
14080
 E1000_82542_TCTL_EXTE1000_82542_TCTL_EXT E1000_TCTL_EXT e1000_hw.h 　
14081
 E1000_82542_TIPGE1000_82542_TIPG E1000_TIPG e1000_hw.h 　
14082
 E1000_82542_TDBALE1000_82542_TDBAL 0x00420 e1000_hw.h 　
14083
 E1000_82542_TDBAHE1000_82542_TDBAH 0x00424 e1000_hw.h 　
14084
 E1000_82542_TDLENE1000_82542_TDLEN 0x00428 e1000_hw.h 　
14085
 E1000_82542_TDHE1000_82542_TDH 0x00430 e1000_hw.h 　
14086
 E1000_82542_TDTE1000_82542_TDT 0x00438 e1000_hw.h 　
14087
 E1000_82542_TIDVE1000_82542_TIDV 0x00440 e1000_hw.h 　
14088
 E1000_82542_TBTE1000_82542_TBT E1000_TBT e1000_hw.h 　
14089
 E1000_82542_AITE1000_82542_AIT E1000_AIT e1000_hw.h 　
14090
 E1000_82542_VFTAE1000_82542_VFTA 0x00600 e1000_hw.h 　
14091
 E1000_82542_LEDCTLE1000_82542_LEDCTL E1000_LEDCTL e1000_hw.h 　
14092
 E1000_82542_PBAE1000_82542_PBA E1000_PBA e1000_hw.h 　
14093
 E1000_82542_PBSE1000_82542_PBS E1000_PBS e1000_hw.h 　
14094
 E1000_82542_EEMNGCTLE1000_82542_EEMNGCTL E1000_EEMNGCTL e1000_hw.h 　
14095
 E1000_82542_EEARBCE1000_82542_EEARBC E1000_EEARBC e1000_hw.h 　
14096
 E1000_82542_FLASHTE1000_82542_FLASHT E1000_FLASHT e1000_hw.h 　
14097
 E1000_82542_EEWRE1000_82542_EEWR E1000_EEWR e1000_hw.h 　
14098
 E1000_82542_FLSWCTLE1000_82542_FLSWCTL E1000_FLSWCTL e1000_hw.h 　
14099
 E1000_82542_FLSWDATAE1000_82542_FLSWDATA E1000_FLSWDATA e1000_hw.h 　
14100
 E1000_82542_FLSWCNTE1000_82542_FLSWCNT E1000_FLSWCNT e1000_hw.h 　
14101
 E1000_82542_FLOPE1000_82542_FLOP E1000_FLOP e1000_hw.h 　
14102
 E1000_82542_EXTCNF_CTRLE1000_82542_EXTCNF_CTRL E1000_EXTCNF_CTRL e1000_hw.h 　
14103
 E1000_82542_EXTCNF_SIZEE1000_82542_EXTCNF_SIZE E1000_EXTCNF_SIZE e1000_hw.h 　
14104
 E1000_82542_PHY_CTRLE1000_82542_PHY_CTRL E1000_PHY_CTRL e1000_hw.h 　
14105
 E1000_82542_ERTE1000_82542_ERT E1000_ERT e1000_hw.h 　
14106
 E1000_82542_RXDCTLE1000_82542_RXDCTL E1000_RXDCTL e1000_hw.h 　
14107
 E1000_82542_RXDCTL1E1000_82542_RXDCTL1 E1000_RXDCTL1 e1000_hw.h 　
14108
 E1000_82542_RADVE1000_82542_RADV E1000_RADV e1000_hw.h 　
14109
 E1000_82542_RSRPDE1000_82542_RSRPD E1000_RSRPD e1000_hw.h 　
14110
 E1000_82542_TXDMACE1000_82542_TXDMAC E1000_TXDMAC e1000_hw.h 　
14111
 E1000_82542_KABGTXDE1000_82542_KABGTXD E1000_KABGTXD e1000_hw.h 　
14112
 E1000_82542_TDFHSE1000_82542_TDFHS E1000_TDFHS e1000_hw.h 　
14113
 E1000_82542_TDFTSE1000_82542_TDFTS E1000_TDFTS e1000_hw.h 　
14114
 E1000_82542_TDFPCE1000_82542_TDFPC E1000_TDFPC e1000_hw.h 　
14115
 E1000_82542_TXDCTLE1000_82542_TXDCTL E1000_TXDCTL e1000_hw.h 　
14116
 E1000_82542_TADVE1000_82542_TADV E1000_TADV e1000_hw.h 　
14117
 E1000_82542_TSPMTE1000_82542_TSPMT E1000_TSPMT e1000_hw.h 　
14118
 E1000_82542_CRCERRSE1000_82542_CRCERRS E1000_CRCERRS e1000_hw.h 　
14119
 E1000_82542_ALGNERRCE1000_82542_ALGNERRC E1000_ALGNERRC e1000_hw.h 　
14120
 E1000_82542_SYMERRSE1000_82542_SYMERRS E1000_SYMERRS e1000_hw.h 　
14121
 E1000_82542_RXERRCE1000_82542_RXERRC E1000_RXERRC e1000_hw.h 　
14122
 E1000_82542_MPCE1000_82542_MPC E1000_MPC e1000_hw.h 　
14123
 E1000_82542_SCCE1000_82542_SCC E1000_SCC e1000_hw.h 　
14124
 E1000_82542_ECOLE1000_82542_ECOL E1000_ECOL e1000_hw.h 　
14125
 E1000_82542_MCCE1000_82542_MCC E1000_MCC e1000_hw.h 　
14126
 E1000_82542_LATECOLE1000_82542_LATECOL E1000_LATECOL e1000_hw.h 　
14127
 E1000_82542_COLCE1000_82542_COLC E1000_COLC e1000_hw.h 　
14128
 E1000_82542_DCE1000_82542_DC E1000_DC e1000_hw.h 　
14129
 E1000_82542_TNCRSE1000_82542_TNCRS E1000_TNCRS e1000_hw.h 　
14130
 E1000_82542_SECE1000_82542_SEC E1000_SEC e1000_hw.h 　
14131
 E1000_82542_CEXTERRE1000_82542_CEXTERR E1000_CEXTERR e1000_hw.h 　
14132
 E1000_82542_RLECE1000_82542_RLEC E1000_RLEC e1000_hw.h 　
14133
 E1000_82542_XONRXCE1000_82542_XONRXC E1000_XONRXC e1000_hw.h 　
14134
 E1000_82542_XONTXCE1000_82542_XONTXC E1000_XONTXC e1000_hw.h 　
14135
 E1000_82542_XOFFRXCE1000_82542_XOFFRXC E1000_XOFFRXC e1000_hw.h 　
14136
 E1000_82542_XOFFTXCE1000_82542_XOFFTXC E1000_XOFFTXC e1000_hw.h 　
14137
 E1000_82542_FCRUCE1000_82542_FCRUC E1000_FCRUC e1000_hw.h 　
14138
 E1000_82542_PRC64E1000_82542_PRC64 E1000_PRC64 e1000_hw.h 　
14139
 E1000_82542_PRC127E1000_82542_PRC127 E1000_PRC127 e1000_hw.h 　
14140
 E1000_82542_PRC255E1000_82542_PRC255 E1000_PRC255 e1000_hw.h 　
14141
 E1000_82542_PRC511E1000_82542_PRC511 E1000_PRC511 e1000_hw.h 　
14142
 E1000_82542_PRC1023E1000_82542_PRC1023 E1000_PRC1023 e1000_hw.h 　
14143
 E1000_82542_PRC1522E1000_82542_PRC1522 E1000_PRC1522 e1000_hw.h 　
14144
 E1000_82542_GPRCE1000_82542_GPRC E1000_GPRC e1000_hw.h 　
14145
 E1000_82542_BPRCE1000_82542_BPRC E1000_BPRC e1000_hw.h 　
14146
 E1000_82542_MPRCE1000_82542_MPRC E1000_MPRC e1000_hw.h 　
14147
 E1000_82542_GPTCE1000_82542_GPTC E1000_GPTC e1000_hw.h 　
14148
 E1000_82542_GORCLE1000_82542_GORCL E1000_GORCL e1000_hw.h 　
14149
 E1000_82542_GORCHE1000_82542_GORCH E1000_GORCH e1000_hw.h 　
14150
 E1000_82542_GOTCLE1000_82542_GOTCL E1000_GOTCL e1000_hw.h 　
14151
 E1000_82542_GOTCHE1000_82542_GOTCH E1000_GOTCH e1000_hw.h 　
14152
 E1000_82542_RNBCE1000_82542_RNBC E1000_RNBC e1000_hw.h 　
14153
 E1000_82542_RUCE1000_82542_RUC E1000_RUC e1000_hw.h 　
14154
 E1000_82542_RFCE1000_82542_RFC E1000_RFC e1000_hw.h 　
14155
 E1000_82542_ROCE1000_82542_ROC E1000_ROC e1000_hw.h 　
14156
 E1000_82542_RJCE1000_82542_RJC E1000_RJC e1000_hw.h 　
14157
 E1000_82542_MGTPRCE1000_82542_MGTPRC E1000_MGTPRC e1000_hw.h 　
14158
 E1000_82542_MGTPDCE1000_82542_MGTPDC E1000_MGTPDC e1000_hw.h 　
14159
 E1000_82542_MGTPTCE1000_82542_MGTPTC E1000_MGTPTC e1000_hw.h 　
14160
 E1000_82542_TORLE1000_82542_TORL E1000_TORL e1000_hw.h 　
14161
 E1000_82542_TORHE1000_82542_TORH E1000_TORH e1000_hw.h 　
14162
 E1000_82542_TOTLE1000_82542_TOTL E1000_TOTL e1000_hw.h 　
14163
 E1000_82542_TOTHE1000_82542_TOTH E1000_TOTH e1000_hw.h 　
14164
 E1000_82542_TPRE1000_82542_TPR E1000_TPR e1000_hw.h 　
14165
 E1000_82542_TPTE1000_82542_TPT E1000_TPT e1000_hw.h 　
14166
 E1000_82542_PTC64E1000_82542_PTC64 E1000_PTC64 e1000_hw.h 　
14167
 E1000_82542_PTC127E1000_82542_PTC127 E1000_PTC127 e1000_hw.h 　
14168
 E1000_82542_PTC255E1000_82542_PTC255 E1000_PTC255 e1000_hw.h 　
14169
 E1000_82542_PTC511E1000_82542_PTC511 E1000_PTC511 e1000_hw.h 　
14170
 E1000_82542_PTC1023E1000_82542_PTC1023 E1000_PTC1023 e1000_hw.h 　
14171
 E1000_82542_PTC1522E1000_82542_PTC1522 E1000_PTC1522 e1000_hw.h 　
14172
 E1000_82542_MPTCE1000_82542_MPTC E1000_MPTC e1000_hw.h 　
14173
 E1000_82542_BPTCE1000_82542_BPTC E1000_BPTC e1000_hw.h 　
14174
 E1000_82542_TSCTCE1000_82542_TSCTC E1000_TSCTC e1000_hw.h 　
14175
 E1000_82542_TSCTFCE1000_82542_TSCTFC E1000_TSCTFC e1000_hw.h 　
14176
 E1000_82542_RXCSUME1000_82542_RXCSUM E1000_RXCSUM e1000_hw.h 　
14177
 E1000_82542_WUCE1000_82542_WUC E1000_WUC e1000_hw.h 　
14178
 E1000_82542_WUFCE1000_82542_WUFC E1000_WUFC e1000_hw.h 　
14179
 E1000_82542_WUSE1000_82542_WUS E1000_WUS e1000_hw.h 　
14180
 E1000_82542_MANCE1000_82542_MANC E1000_MANC e1000_hw.h 　
14181
 E1000_82542_IPAVE1000_82542_IPAV E1000_IPAV e1000_hw.h 　
14182
 E1000_82542_IP4ATE1000_82542_IP4AT E1000_IP4AT e1000_hw.h 　
14183
 E1000_82542_IP6ATE1000_82542_IP6AT E1000_IP6AT e1000_hw.h 　
14184
 E1000_82542_WUPLE1000_82542_WUPL E1000_WUPL e1000_hw.h 　
14185
 E1000_82542_WUPME1000_82542_WUPM E1000_WUPM e1000_hw.h 　
14186
 E1000_82542_FFLTE1000_82542_FFLT E1000_FFLT e1000_hw.h 　
14187
 E1000_82542_TDFHE1000_82542_TDFH 0x08010 e1000_hw.h 　
14188
 E1000_82542_TDFTE1000_82542_TDFT 0x08018 e1000_hw.h 　
14189
 E1000_82542_FFMTE1000_82542_FFMT E1000_FFMT e1000_hw.h 　
14190
 E1000_82542_FFVTE1000_82542_FFVT E1000_FFVT e1000_hw.h 　
14191
 E1000_82542_HOST_IFE1000_82542_HOST_IF E1000_HOST_IF e1000_hw.h 　
14192
 E1000_82542_IAME1000_82542_IAM E1000_IAM e1000_hw.h 　
14193
 E1000_82542_EEMNGCTLE1000_82542_EEMNGCTL E1000_EEMNGCTL e1000_hw.h 　
14194
 E1000_82542_PSRCTLE1000_82542_PSRCTL E1000_PSRCTL e1000_hw.h 　
14195
 E1000_82542_RAIDE1000_82542_RAID E1000_RAID e1000_hw.h 　
14196
 E1000_82542_TARC0E1000_82542_TARC0 E1000_TARC0 e1000_hw.h 　
14197
 E1000_82542_TDBAL1E1000_82542_TDBAL1 E1000_TDBAL1 e1000_hw.h 　
14198
 E1000_82542_TDBAH1E1000_82542_TDBAH1 E1000_TDBAH1 e1000_hw.h 　
14199
 E1000_82542_TDLEN1E1000_82542_TDLEN1 E1000_TDLEN1 e1000_hw.h 　
14200
 E1000_82542_TDH1E1000_82542_TDH1 E1000_TDH1 e1000_hw.h 　
14201
 E1000_82542_TDT1E1000_82542_TDT1 E1000_TDT1 e1000_hw.h 　
14202
 E1000_82542_TXDCTL1E1000_82542_TXDCTL1 E1000_TXDCTL1 e1000_hw.h 　
14203
 E1000_82542_TARC1E1000_82542_TARC1 E1000_TARC1 e1000_hw.h 　
14204
 E1000_82542_RFCTLE1000_82542_RFCTL E1000_RFCTL e1000_hw.h 　
14205
 E1000_82542_GCRE1000_82542_GCR E1000_GCR e1000_hw.h 　
14206
 E1000_82542_GSCL_1E1000_82542_GSCL_1 E1000_GSCL_1 e1000_hw.h 　
14207
 E1000_82542_GSCL_2E1000_82542_GSCL_2 E1000_GSCL_2 e1000_hw.h 　
14208
 E1000_82542_GSCL_3E1000_82542_GSCL_3 E1000_GSCL_3 e1000_hw.h 　
14209
 E1000_82542_GSCL_4E1000_82542_GSCL_4 E1000_GSCL_4 e1000_hw.h 　
14210
 E1000_82542_FACTPSE1000_82542_FACTPS E1000_FACTPS e1000_hw.h 　
14211
 E1000_82542_SWSME1000_82542_SWSM E1000_SWSM e1000_hw.h 　
14212
 E1000_82542_FWSME1000_82542_FWSM E1000_FWSM e1000_hw.h 　
14213
 E1000_82542_FFLT_DBGE1000_82542_FFLT_DBG E1000_FFLT_DBG e1000_hw.h 　
14214
 E1000_82542_IACE1000_82542_IAC E1000_IAC e1000_hw.h 　
14215
 E1000_82542_ICRXPTCE1000_82542_ICRXPTC E1000_ICRXPTC e1000_hw.h 　
14216
 E1000_82542_ICRXATCE1000_82542_ICRXATC E1000_ICRXATC e1000_hw.h 　
14217
 E1000_82542_ICTXPTCE1000_82542_ICTXPTC E1000_ICTXPTC e1000_hw.h 　
14218
 E1000_82542_ICTXATCE1000_82542_ICTXATC E1000_ICTXATC e1000_hw.h 　
14219
 E1000_82542_ICTXQECE1000_82542_ICTXQEC E1000_ICTXQEC e1000_hw.h 　
14220
 E1000_82542_ICTXQMTCE1000_82542_ICTXQMTC E1000_ICTXQMTC e1000_hw.h 　
14221
 E1000_82542_ICRXDMTCE1000_82542_ICRXDMTC E1000_ICRXDMTC e1000_hw.h 　
14222
 E1000_82542_ICRXOCE1000_82542_ICRXOC E1000_ICRXOC e1000_hw.h 　
14223
 E1000_82542_HICRE1000_82542_HICR E1000_HICR e1000_hw.h 　
14224
 E1000_82542_CPUVECE1000_82542_CPUVEC E1000_CPUVEC e1000_hw.h 　
14225
 E1000_82542_MRQCE1000_82542_MRQC E1000_MRQC e1000_hw.h 　
14226
 E1000_82542_RETAE1000_82542_RETA E1000_RETA e1000_hw.h 　
14227
 E1000_82542_RSSRKE1000_82542_RSSRK E1000_RSSRK e1000_hw.h 　
14228
 E1000_82542_RSSIME1000_82542_RSSIM E1000_RSSIM e1000_hw.h 　
14229
 E1000_82542_RSSIRE1000_82542_RSSIR E1000_RSSIR e1000_hw.h 　
14230
 E1000_82542_KUMCTRLSTAE1000_82542_KUMCTRLSTA E1000_KUMCTRLSTA e1000_hw.h 　
14231
 E1000_82542_SW_FW_SYNCE1000_82542_SW_FW_SYNC E1000_SW_FW_SYNC e1000_hw.h 　
14232
 E1000_82542_MANC2HE1000_82542_MANC2H E1000_MANC2H e1000_hw.h 　
14233
 E1000_EEPROM_SWDPIN0E1000_EEPROM_SWDPIN0 0x0001 e1000_hw.h SWDPIN 0 EEPROM Value
14234
 E1000_EEPROM_LED_LOGICE1000_EEPROM_LED_LOGIC 0x0020 e1000_hw.h Led Logic Word
14235
 E1000_EEPROM_RW_REG_DATAE1000_EEPROM_RW_REG_DATA 16 e1000_hw.h Offset to data in EEPROM read/write registers
14236
 E1000_EEPROM_RW_REG_DONEE1000_EEPROM_RW_REG_DONE 2 e1000_hw.h Offset to READ/WRITE done bit
14237
 E1000_EEPROM_RW_REG_STARTE1000_EEPROM_RW_REG_START 1 e1000_hw.h First bit for telling part to start operation
14238
 E1000_EEPROM_RW_ADDR_SHIFTE1000_EEPROM_RW_ADDR_SHIFT 2 e1000_hw.h Shift to the address bits
14239
 E1000_EEPROM_POLL_WRITEE1000_EEPROM_POLL_WRITE 1 e1000_hw.h Flag for polling for write complete
14240
 E1000_EEPROM_POLL_READE1000_EEPROM_POLL_READ 0 e1000_hw.h Flag for polling for read complete
14241
 E1000_CTRL_FDE1000_CTRL_FD 0x00000001 e1000_hw.h Full duplex.0=half; 1=full
14242
 E1000_CTRL_BEME1000_CTRL_BEM 0x00000002 e1000_hw.h Endian Mode.0=little,1=big
14243
 E1000_CTRL_PRIORE1000_CTRL_PRIOR 0x00000004 e1000_hw.h Priority on PCI. 0=rx,1=fair
14244
 E1000_CTRL_GIO_MASTER_DISABLEE1000_CTRL_GIO_MASTER_DISABLE 0x00000004 e1000_hw.h Blocks new Master requests
14245
 E1000_CTRL_LRSTE1000_CTRL_LRST 0x00000008 e1000_hw.h Link reset. 0=normal,1=reset
14246
 E1000_CTRL_TMEE1000_CTRL_TME 0x00000010 e1000_hw.h Test mode. 0=normal,1=test
14247
 E1000_CTRL_SLEE1000_CTRL_SLE 0x00000020 e1000_hw.h Serial Link on 0=dis,1=en
14248
 E1000_CTRL_ASDEE1000_CTRL_ASDE 0x00000020 e1000_hw.h Auto-speed detect enable
14249
 E1000_CTRL_SLUE1000_CTRL_SLU 0x00000040 e1000_hw.h Set link up (Force Link)
14250
 E1000_CTRL_ILOSE1000_CTRL_ILOS 0x00000080 e1000_hw.h Invert Loss-Of Signal
14251
 E1000_CTRL_SPD_SELE1000_CTRL_SPD_SEL 0x00000300 e1000_hw.h Speed Select Mask
14252
 E1000_CTRL_SPD_10E1000_CTRL_SPD_10 0x00000000 e1000_hw.h Force 10Mb
14253
 E1000_CTRL_SPD_100E1000_CTRL_SPD_100 0x00000100 e1000_hw.h Force 100Mb
14254
 E1000_CTRL_SPD_1000E1000_CTRL_SPD_1000 0x00000200 e1000_hw.h Force 1Gb
14255
 E1000_CTRL_BEM32E1000_CTRL_BEM32 0x00000400 e1000_hw.h Big Endian 32 mode
14256
 E1000_CTRL_FRCSPDE1000_CTRL_FRCSPD 0x00000800 e1000_hw.h Force Speed
14257
 E1000_CTRL_FRCDPXE1000_CTRL_FRCDPX 0x00001000 e1000_hw.h Force Duplex
14258
 E1000_CTRL_D_UD_ENE1000_CTRL_D_UD_EN 0x00002000 e1000_hw.h Dock/Undock enable
14259
 E1000_CTRL_D_UD_POLARITYE1000_CTRL_D_UD_POLARITY 0x00004000 e1000_hw.h Defined polarity of Dock/Undock indication in SDP[0]
14260
 E1000_CTRL_FORCE_PHY_RESETE1000_CTRL_FORCE_PHY_RESET 0x00008000 e1000_hw.h Reset both PHY ports, through PHYRST_N pin
14261
 E1000_CTRL_EXT_LINK_ENE1000_CTRL_EXT_LINK_EN 0x00010000 e1000_hw.h enable link status from external LINK_0 and LINK_1 pins
14262
 E1000_CTRL_SWDPIN0E1000_CTRL_SWDPIN0 0x00040000 e1000_hw.h SWDPIN 0 value
14263
 E1000_CTRL_SWDPIN1E1000_CTRL_SWDPIN1 0x00080000 e1000_hw.h SWDPIN 1 value
14264
 E1000_CTRL_SWDPIN2E1000_CTRL_SWDPIN2 0x00100000 e1000_hw.h SWDPIN 2 value
14265
 E1000_CTRL_SWDPIN3E1000_CTRL_SWDPIN3 0x00200000 e1000_hw.h SWDPIN 3 value
14266
 E1000_CTRL_SWDPIO0E1000_CTRL_SWDPIO0 0x00400000 e1000_hw.h SWDPIN 0 Input or output
14267
 E1000_CTRL_SWDPIO1E1000_CTRL_SWDPIO1 0x00800000 e1000_hw.h SWDPIN 1 input or output
14268
 E1000_CTRL_SWDPIO2E1000_CTRL_SWDPIO2 0x01000000 e1000_hw.h SWDPIN 2 input or output
14269
 E1000_CTRL_SWDPIO3E1000_CTRL_SWDPIO3 0x02000000 e1000_hw.h SWDPIN 3 input or output
14270
 E1000_CTRL_RSTE1000_CTRL_RST 0x04000000 e1000_hw.h Global reset
14271
 E1000_CTRL_RFCEE1000_CTRL_RFCE 0x08000000 e1000_hw.h Receive Flow Control enable
14272
 E1000_CTRL_TFCEE1000_CTRL_TFCE 0x10000000 e1000_hw.h Transmit flow control enable
14273
 E1000_CTRL_RTEE1000_CTRL_RTE 0x20000000 e1000_hw.h Routing tag enable
14274
 E1000_CTRL_VMEE1000_CTRL_VME 0x40000000 e1000_hw.h IEEE VLAN mode enable
14275
 E1000_CTRL_PHY_RSTE1000_CTRL_PHY_RST 0x80000000 e1000_hw.h PHY Reset
14276
 E1000_CTRL_SW2FW_INTE1000_CTRL_SW2FW_INT 0x02000000 e1000_hw.h Initiate an interrupt to manageability engine
14277
 E1000_STATUS_FDE1000_STATUS_FD 0x00000001 e1000_hw.h Full duplex.0=half,1=full
14278
 E1000_STATUS_LUE1000_STATUS_LU 0x00000002 e1000_hw.h Link up.0=no,1=link
14279
 E1000_STATUS_FUNC_MASKE1000_STATUS_FUNC_MASK 0x0000000C e1000_hw.h PCI Function Mask
14280
 E1000_STATUS_FUNC_SHIFTE1000_STATUS_FUNC_SHIFT 2 e1000_hw.h 　
14281
 E1000_STATUS_FUNC_0E1000_STATUS_FUNC_0 0x00000000 e1000_hw.h Function 0
14282
 E1000_STATUS_FUNC_1E1000_STATUS_FUNC_1 0x00000004 e1000_hw.h Function 1
14283
 E1000_STATUS_TXOFFE1000_STATUS_TXOFF 0x00000010 e1000_hw.h transmission paused
14284
 E1000_STATUS_TBIMODEE1000_STATUS_TBIMODE 0x00000020 e1000_hw.h TBI mode
14285
 E1000_STATUS_SPEED_MASKE1000_STATUS_SPEED_MASK 0x000000C0 e1000_hw.h 　
14286
 E1000_STATUS_SPEED_10E1000_STATUS_SPEED_10 0x00000000 e1000_hw.h Speed 10Mb/s
14287
 E1000_STATUS_SPEED_100E1000_STATUS_SPEED_100 0x00000040 e1000_hw.h Speed 100Mb/s
14288
 E1000_STATUS_SPEED_1000E1000_STATUS_SPEED_1000 0x00000080 e1000_hw.h Speed 1000Mb/s
14289
 E1000_STATUS_LAN_INIT_DONEE1000_STATUS_LAN_INIT_DONE 0x00000200 e1000_hw.h Lan Init Completion
14290
 E1000_STATUS_ASDVE1000_STATUS_ASDV 0x00000300 e1000_hw.h Auto speed detect value
14291
 E1000_STATUS_DOCK_CIE1000_STATUS_DOCK_CI 0x00000800 e1000_hw.h Change in Dock/Undock state. Clear on write '0'.
14292
 E1000_STATUS_GIO_MASTER_ENABLEE1000_STATUS_GIO_MASTER_ENABLE 0x00080000 e1000_hw.h Status of Master requests.
14293
 E1000_STATUS_MTXCKOKE1000_STATUS_MTXCKOK 0x00000400 e1000_hw.h MTX clock running OK
14294
 E1000_STATUS_PCI66E1000_STATUS_PCI66 0x00000800 e1000_hw.h In 66Mhz slot
14295
 E1000_STATUS_BUS64E1000_STATUS_BUS64 0x00001000 e1000_hw.h In 64 bit slot
14296
 E1000_STATUS_PCIX_MODEE1000_STATUS_PCIX_MODE 0x00002000 e1000_hw.h PCI-X mode
14297
 E1000_STATUS_PCIX_SPEEDE1000_STATUS_PCIX_SPEED 0x0000C000 e1000_hw.h PCI-X bus speed
14298
 E1000_STATUS_BMC_SKU_0E1000_STATUS_BMC_SKU_0 0x00100000 e1000_hw.h BMC USB redirect disabled
14299
 E1000_STATUS_BMC_SKU_1E1000_STATUS_BMC_SKU_1 0x00200000 e1000_hw.h BMC SRAM disabled
14300
 E1000_STATUS_BMC_SKU_2E1000_STATUS_BMC_SKU_2 0x00400000 e1000_hw.h BMC SDRAM disabled
14301
 E1000_STATUS_BMC_CRYPTOE1000_STATUS_BMC_CRYPTO 0x00800000 e1000_hw.h BMC crypto disabled
14302
 E1000_STATUS_BMC_LITEE1000_STATUS_BMC_LITE 0x01000000 e1000_hw.h BMC external code execution disabled
14303
 E1000_STATUS_RGMII_ENABLEE1000_STATUS_RGMII_ENABLE 0x02000000 e1000_hw.h RGMII disabled
14304
 E1000_STATUS_FUSE_8E1000_STATUS_FUSE_8 0x04000000 e1000_hw.h 　
14305
 E1000_STATUS_FUSE_9E1000_STATUS_FUSE_9 0x08000000 e1000_hw.h 　
14306
 E1000_STATUS_SERDES0_DISE1000_STATUS_SERDES0_DIS 0x10000000 e1000_hw.h SERDES disabled on port 0
14307
 E1000_STATUS_SERDES1_DISE1000_STATUS_SERDES1_DIS 0x20000000 e1000_hw.h SERDES disabled on port 1
14308
 E1000_STATUS_PCIX_SPEED_66E1000_STATUS_PCIX_SPEED_66 0x00000000 e1000_hw.h PCI-X bus speed 50-66 MHz
14309
 E1000_STATUS_PCIX_SPEED_100E1000_STATUS_PCIX_SPEED_100 0x00004000 e1000_hw.h PCI-X bus speed 66-100 MHz
14310
 E1000_STATUS_PCIX_SPEED_133E1000_STATUS_PCIX_SPEED_133 0x00008000 e1000_hw.h PCI-X bus speed 100-133 MHz
14311
 E1000_EECD_SKE1000_EECD_SK 0x00000001 e1000_hw.h EEPROM Clock
14312
 E1000_EECD_CSE1000_EECD_CS 0x00000002 e1000_hw.h EEPROM Chip Select
14313
 E1000_EECD_DIE1000_EECD_DI 0x00000004 e1000_hw.h EEPROM Data In
14314
 E1000_EECD_DOE1000_EECD_DO 0x00000008 e1000_hw.h EEPROM Data Out
14315
 E1000_EECD_FWE_MASKE1000_EECD_FWE_MASK 0x00000030 e1000_hw.h 　
14316
 E1000_EECD_FWE_DISE1000_EECD_FWE_DIS 0x00000010 e1000_hw.h Disable FLASH writes
14317
 E1000_EECD_FWE_ENE1000_EECD_FWE_EN 0x00000020 e1000_hw.h Enable FLASH writes
14318
 E1000_EECD_FWE_SHIFTE1000_EECD_FWE_SHIFT 4 e1000_hw.h 　
14319
 E1000_EECD_REQE1000_EECD_REQ 0x00000040 e1000_hw.h EEPROM Access Request
14320
 E1000_EECD_GNTE1000_EECD_GNT 0x00000080 e1000_hw.h EEPROM Access Grant
14321
 E1000_EECD_PRESE1000_EECD_PRES 0x00000100 e1000_hw.h EEPROM Present
14322
 E1000_EECD_SIZEE1000_EECD_SIZE 0x00000200 e1000_hw.h EEPROM Size (0=64 word 1=256 word)
14323
 E1000_EECD_ADDR_BITSE1000_EECD_ADDR_BITS 0x00000400 e1000_hw.h EEPROM Addressing bits based on type
14324
 E1000_EECD_TYPEE1000_EECD_TYPE 0x00002000 e1000_hw.h EEPROM Type (1-SPI, 0-Microwire)
14325
 E1000_EEPROM_GRANT_ATTEMPTSE1000_EEPROM_GRANT_ATTEMPTS 1000 e1000_hw.h EEPROM # attempts to gain grant
14326
 E1000_EECD_AUTO_RDE1000_EECD_AUTO_RD 0x00000200 e1000_hw.h EEPROM Auto Read done
14327
 E1000_EECD_SIZE_EX_MASKE1000_EECD_SIZE_EX_MASK 0x00007800 e1000_hw.h EEprom Size
14328
 E1000_EECD_SIZE_EX_SHIFTE1000_EECD_SIZE_EX_SHIFT 11 e1000_hw.h 　
14329
 E1000_EECD_NVADDSE1000_EECD_NVADDS 0x00018000 e1000_hw.h NVM Address Size
14330
 E1000_EECD_SELSHADE1000_EECD_SELSHAD 0x00020000 e1000_hw.h Select Shadow RAM
14331
 E1000_EECD_INITSRAME1000_EECD_INITSRAM 0x00040000 e1000_hw.h Initialize Shadow RAM
14332
 E1000_EECD_FLUPDE1000_EECD_FLUPD 0x00080000 e1000_hw.h Update FLASH
14333
 E1000_EECD_AUPDENE1000_EECD_AUPDEN 0x00100000 e1000_hw.h Enable Autonomous FLASH update
14334
 E1000_EECD_SHADVE1000_EECD_SHADV 0x00200000 e1000_hw.h Shadow RAM Data Valid
14335
 E1000_EECD_SEC1VALE1000_EECD_SEC1VAL 0x00400000 e1000_hw.h Sector One Valid
14336
 E1000_EECD_SECVAL_SHIFTE1000_EECD_SECVAL_SHIFT 22 e1000_hw.h 　
14337
 E1000_STM_OPCODEE1000_STM_OPCODE 0xDB00 e1000_hw.h 　
14338
 E1000_HICR_FW_RESETE1000_HICR_FW_RESET 0xC0 e1000_hw.h 　
14339
 E1000_SHADOW_RAM_WORDSE1000_SHADOW_RAM_WORDS 2048 e1000_hw.h 　
14340
 E1000_ICH_NVM_SIG_WORDE1000_ICH_NVM_SIG_WORD 0x13 e1000_hw.h 　
14341
 E1000_ICH_NVM_SIG_MASKE1000_ICH_NVM_SIG_MASK 0xC0 e1000_hw.h 　
14342
 E1000_EERD_STARTE1000_EERD_START 0x00000001 e1000_hw.h Start Read
14343
 E1000_EERD_DONEE1000_EERD_DONE 0x00000010 e1000_hw.h Read Done
14344
 E1000_EERD_ADDR_SHIFTE1000_EERD_ADDR_SHIFT 8 e1000_hw.h 　
14345
 E1000_EERD_ADDR_MASKE1000_EERD_ADDR_MASK 0x0000FF00 e1000_hw.h Read Address
14346
 E1000_EERD_DATA_SHIFTE1000_EERD_DATA_SHIFT 16 e1000_hw.h 　
14347
 E1000_EERD_DATA_MASKE1000_EERD_DATA_MASK 0xFFFF0000 e1000_hw.h Read Data
14348
 EEPROM_STATUS_RDY_SPIEEPROM_STATUS_RDY_SPI 0x01 e1000_hw.h 　
14349
 EEPROM_STATUS_WEN_SPIEEPROM_STATUS_WEN_SPI 0x02 e1000_hw.h 　
14350
 EEPROM_STATUS_BP0_SPIEEPROM_STATUS_BP0_SPI 0x04 e1000_hw.h 　
14351
 EEPROM_STATUS_BP1_SPIEEPROM_STATUS_BP1_SPI 0x08 e1000_hw.h 　
14352
 EEPROM_STATUS_WPEN_SPIEEPROM_STATUS_WPEN_SPI 0x80 e1000_hw.h 　
14353
 E1000_CTRL_EXT_GPI0_ENE1000_CTRL_EXT_GPI0_EN 0x00000001 e1000_hw.h Maps SDP4 to GPI0
14354
 E1000_CTRL_EXT_GPI1_ENE1000_CTRL_EXT_GPI1_EN 0x00000002 e1000_hw.h Maps SDP5 to GPI1
14355
 E1000_CTRL_EXT_PHYINT_ENE1000_CTRL_EXT_PHYINT_EN E1000_CTRL_EXT_GPI1_EN e1000_hw.h 　
14356
 E1000_CTRL_EXT_GPI2_ENE1000_CTRL_EXT_GPI2_EN 0x00000004 e1000_hw.h Maps SDP6 to GPI2
14357
 E1000_CTRL_EXT_GPI3_ENE1000_CTRL_EXT_GPI3_EN 0x00000008 e1000_hw.h Maps SDP7 to GPI3
14358
 E1000_CTRL_EXT_SDP4_DATAE1000_CTRL_EXT_SDP4_DATA 0x00000010 e1000_hw.h Value of SW Defineable Pin 4
14359
 E1000_CTRL_EXT_SDP5_DATAE1000_CTRL_EXT_SDP5_DATA 0x00000020 e1000_hw.h Value of SW Defineable Pin 5
14360
 E1000_CTRL_EXT_PHY_INTE1000_CTRL_EXT_PHY_INT E1000_CTRL_EXT_SDP5_DATA e1000_hw.h 　
14361
 E1000_CTRL_EXT_SDP6_DATAE1000_CTRL_EXT_SDP6_DATA 0x00000040 e1000_hw.h Value of SW Defineable Pin 6
14362
 E1000_CTRL_EXT_SDP7_DATAE1000_CTRL_EXT_SDP7_DATA 0x00000080 e1000_hw.h Value of SW Defineable Pin 7
14363
 E1000_CTRL_EXT_SDP4_DIRE1000_CTRL_EXT_SDP4_DIR 0x00000100 e1000_hw.h Direction of SDP4 0=in 1=out
14364
 E1000_CTRL_EXT_SDP5_DIRE1000_CTRL_EXT_SDP5_DIR 0x00000200 e1000_hw.h Direction of SDP5 0=in 1=out
14365
 E1000_CTRL_EXT_SDP6_DIRE1000_CTRL_EXT_SDP6_DIR 0x00000400 e1000_hw.h Direction of SDP6 0=in 1=out
14366
 E1000_CTRL_EXT_SDP7_DIRE1000_CTRL_EXT_SDP7_DIR 0x00000800 e1000_hw.h Direction of SDP7 0=in 1=out
14367
 E1000_CTRL_EXT_ASDCHKE1000_CTRL_EXT_ASDCHK 0x00001000 e1000_hw.h Initiate an ASD sequence
14368
 E1000_CTRL_EXT_EE_RSTE1000_CTRL_EXT_EE_RST 0x00002000 e1000_hw.h Reinitialize from EEPROM
14369
 E1000_CTRL_EXT_IPSE1000_CTRL_EXT_IPS 0x00004000 e1000_hw.h Invert Power State
14370
 E1000_CTRL_EXT_SPD_BYPSE1000_CTRL_EXT_SPD_BYPS 0x00008000 e1000_hw.h Speed Select Bypass
14371
 E1000_CTRL_EXT_RO_DISE1000_CTRL_EXT_RO_DIS 0x00020000 e1000_hw.h Relaxed Ordering disable
14372
 E1000_CTRL_EXT_LINK_MODE_MASKE1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 e1000_hw.h 　
14373
 E1000_CTRL_EXT_LINK_MODE_GMIIE1000_CTRL_EXT_LINK_MODE_GMII 0x00000000 e1000_hw.h 　
14374
 E1000_CTRL_EXT_LINK_MODE_TBIE1000_CTRL_EXT_LINK_MODE_TBI 0x00C00000 e1000_hw.h 　
14375
 E1000_CTRL_EXT_LINK_MODE_KMRNE1000_CTRL_EXT_LINK_MODE_KMRN 0x00000000 e1000_hw.h 　
14376
 E1000_CTRL_EXT_LINK_MODE_SERDESE1000_CTRL_EXT_LINK_MODE_SERDES 0x00C00000 e1000_hw.h 　
14377
 E1000_CTRL_EXT_LINK_MODE_SGMIIE1000_CTRL_EXT_LINK_MODE_SGMII 0x00800000 e1000_hw.h 　
14378
 E1000_CTRL_EXT_WR_WMARK_MASKE1000_CTRL_EXT_WR_WMARK_MASK 0x03000000 e1000_hw.h 　
14379
 E1000_CTRL_EXT_WR_WMARK_256E1000_CTRL_EXT_WR_WMARK_256 0x00000000 e1000_hw.h 　
14380
 E1000_CTRL_EXT_WR_WMARK_320E1000_CTRL_EXT_WR_WMARK_320 0x01000000 e1000_hw.h 　
14381
 E1000_CTRL_EXT_WR_WMARK_384E1000_CTRL_EXT_WR_WMARK_384 0x02000000 e1000_hw.h 　
14382
 E1000_CTRL_EXT_WR_WMARK_448E1000_CTRL_EXT_WR_WMARK_448 0x03000000 e1000_hw.h 　
14383
 E1000_CTRL_EXT_DRV_LOADE1000_CTRL_EXT_DRV_LOAD 0x10000000 e1000_hw.h Driver loaded bit for FW
14384
 E1000_CTRL_EXT_IAMEE1000_CTRL_EXT_IAME 0x08000000 e1000_hw.h Interrupt acknowledge Auto-mask
14385
 E1000_CTRL_EXT_INT_TIMER_CLRE1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 e1000_hw.h Clear Interrupt timers after IMS clear
14386
 E1000_CRTL_EXT_PB_PARENE1000_CRTL_EXT_PB_PAREN 0x01000000 e1000_hw.h packet buffer parity error detection enabled
14387
 E1000_CTRL_EXT_DF_PARENE1000_CTRL_EXT_DF_PAREN 0x02000000 e1000_hw.h descriptor FIFO parity error detection enable
14388
 E1000_CTRL_EXT_GHOST_PARENE1000_CTRL_EXT_GHOST_PAREN 0x40000000 e1000_hw.h 　
14389
 E1000_MDIC_DATA_MASKE1000_MDIC_DATA_MASK 0x0000FFFF e1000_hw.h 　
14390
 E1000_MDIC_REG_MASKE1000_MDIC_REG_MASK 0x001F0000 e1000_hw.h 　
14391
 E1000_MDIC_REG_SHIFTE1000_MDIC_REG_SHIFT 16 e1000_hw.h 　
14392
 E1000_MDIC_PHY_MASKE1000_MDIC_PHY_MASK 0x03E00000 e1000_hw.h 　
14393
 E1000_MDIC_PHY_SHIFTE1000_MDIC_PHY_SHIFT 21 e1000_hw.h 　
14394
 E1000_MDIC_OP_WRITEE1000_MDIC_OP_WRITE 0x04000000 e1000_hw.h 　
14395
 E1000_MDIC_OP_READE1000_MDIC_OP_READ 0x08000000 e1000_hw.h 　
14396
 E1000_MDIC_READYE1000_MDIC_READY 0x10000000 e1000_hw.h 　
14397
 E1000_MDIC_INT_ENE1000_MDIC_INT_EN 0x20000000 e1000_hw.h 　
14398
 E1000_MDIC_ERRORE1000_MDIC_ERROR 0x40000000 e1000_hw.h 　
14399
 E1000_KUMCTRLSTA_MASKE1000_KUMCTRLSTA_MASK 0x0000FFFF e1000_hw.h 　
14400
 E1000_KUMCTRLSTA_OFFSETE1000_KUMCTRLSTA_OFFSET 0x001F0000 e1000_hw.h 　
14401
 E1000_KUMCTRLSTA_OFFSET_SHIFTE1000_KUMCTRLSTA_OFFSET_SHIFT 16 e1000_hw.h 　
14402
 E1000_KUMCTRLSTA_RENE1000_KUMCTRLSTA_REN 0x00200000 e1000_hw.h 　
14403
 E1000_KUMCTRLSTA_OFFSET_FIFO_CTE1000_KUMCTRLSTA_OFFSET_FIFO_CT 0x00000000 e1000_hw.h 　
14404
 E1000_KUMCTRLSTA_OFFSET_CTRLE1000_KUMCTRLSTA_OFFSET_CTRL 0x00000001 e1000_hw.h 　
14405
 E1000_KUMCTRLSTA_OFFSET_INB_CTRE1000_KUMCTRLSTA_OFFSET_INB_CTR 0x00000002 e1000_hw.h 　
14406
 E1000_KUMCTRLSTA_OFFSET_DIAGE1000_KUMCTRLSTA_OFFSET_DIAG 0x00000003 e1000_hw.h 　
14407
 E1000_KUMCTRLSTA_OFFSET_TIMEOUTE1000_KUMCTRLSTA_OFFSET_TIMEOUT 0x00000004 e1000_hw.h 　
14408
 E1000_KUMCTRLSTA_OFFSET_INB_PARE1000_KUMCTRLSTA_OFFSET_INB_PAR 0x00000009 e1000_hw.h 　
14409
 E1000_KUMCTRLSTA_OFFSET_HD_CTRLE1000_KUMCTRLSTA_OFFSET_HD_CTRL 0x00000010 e1000_hw.h 　
14410
 E1000_KUMCTRLSTA_OFFSET_M2P_SERE1000_KUMCTRLSTA_OFFSET_M2P_SER 0x0000001E e1000_hw.h 　
14411
 E1000_KUMCTRLSTA_OFFSET_M2P_MODE1000_KUMCTRLSTA_OFFSET_M2P_MOD 0x0000001F e1000_hw.h 　
14412
 E1000_KUMCTRLSTA_FIFO_CTRL_RX_BE1000_KUMCTRLSTA_FIFO_CTRL_RX_B 0x00000008 e1000_hw.h 　
14413
 E1000_KUMCTRLSTA_FIFO_CTRL_TX_BE1000_KUMCTRLSTA_FIFO_CTRL_TX_B 0x00000800 e1000_hw.h 　
14414
 E1000_KUMCTRLSTA_INB_CTRL_LINK_E1000_KUMCTRLSTA_INB_CTRL_LINK_ 0x00000500 e1000_hw.h 　
14415
 E1000_KUMCTRLSTA_INB_CTRL_DIS_PE1000_KUMCTRLSTA_INB_CTRL_DIS_P 0x00000010 e1000_hw.h 　
14416
 E1000_KUMCTRLSTA_HD_CTRL_10_100E1000_KUMCTRLSTA_HD_CTRL_10_100 0x00000004 e1000_hw.h 　
14417
 E1000_KUMCTRLSTA_HD_CTRL_1000_DE1000_KUMCTRLSTA_HD_CTRL_1000_D 0x00000000 e1000_hw.h 　
14418
 E1000_KUMCTRLSTA_OFFSET_K0S_CTRE1000_KUMCTRLSTA_OFFSET_K0S_CTR 0x0000001E e1000_hw.h 　
14419
 E1000_KUMCTRLSTA_DIAG_FELPBKE1000_KUMCTRLSTA_DIAG_FELPBK 0x2000 e1000_hw.h 　
14420
 E1000_KUMCTRLSTA_DIAG_NELPBKE1000_KUMCTRLSTA_DIAG_NELPBK 0x1000 e1000_hw.h 　
14421
 E1000_KUMCTRLSTA_K0S_100_ENE1000_KUMCTRLSTA_K0S_100_EN 0x2000 e1000_hw.h 　
14422
 E1000_KUMCTRLSTA_K0S_GBE_ENE1000_KUMCTRLSTA_K0S_GBE_EN 0x1000 e1000_hw.h 　
14423
 E1000_KUMCTRLSTA_K0S_ENTRY_LATEE1000_KUMCTRLSTA_K0S_ENTRY_LATE 0x0003 e1000_hw.h 　
14424
 E1000_KABGTXD_BGSQLBIASE1000_KABGTXD_BGSQLBIAS 0x00050000 e1000_hw.h 　
14425
 E1000_PHY_CTRL_SPD_ENE1000_PHY_CTRL_SPD_EN 0x00000001 e1000_hw.h 　
14426
 E1000_PHY_CTRL_D0A_LPLUE1000_PHY_CTRL_D0A_LPLU 0x00000002 e1000_hw.h 　
14427
 E1000_PHY_CTRL_NOND0A_LPLUE1000_PHY_CTRL_NOND0A_LPLU 0x00000004 e1000_hw.h 　
14428
 E1000_PHY_CTRL_NOND0A_GBE_DISABE1000_PHY_CTRL_NOND0A_GBE_DISAB 0x00000008 e1000_hw.h 　
14429
 E1000_PHY_CTRL_GBE_DISABLEE1000_PHY_CTRL_GBE_DISABLE 0x00000040 e1000_hw.h 　
14430
 E1000_PHY_CTRL_B2B_ENE1000_PHY_CTRL_B2B_EN 0x00000080 e1000_hw.h 　
14431
 E1000_LEDCTL_LED0_MODE_MASKE1000_LEDCTL_LED0_MODE_MASK 0x0000000F e1000_hw.h 　
14432
 E1000_LEDCTL_LED0_MODE_SHIFTE1000_LEDCTL_LED0_MODE_SHIFT 0 e1000_hw.h 　
14433
 E1000_LEDCTL_LED0_BLINK_RATEE1000_LEDCTL_LED0_BLINK_RATE 0x0000020 e1000_hw.h 　
14434
 E1000_LEDCTL_LED0_IVRTE1000_LEDCTL_LED0_IVRT 0x00000040 e1000_hw.h 　
14435
 E1000_LEDCTL_LED0_BLINKE1000_LEDCTL_LED0_BLINK 0x00000080 e1000_hw.h 　
14436
 E1000_LEDCTL_LED1_MODE_MASKE1000_LEDCTL_LED1_MODE_MASK 0x00000F00 e1000_hw.h 　
14437
 E1000_LEDCTL_LED1_MODE_SHIFTE1000_LEDCTL_LED1_MODE_SHIFT 8 e1000_hw.h 　
14438
 E1000_LEDCTL_LED1_BLINK_RATEE1000_LEDCTL_LED1_BLINK_RATE 0x0002000 e1000_hw.h 　
14439
 E1000_LEDCTL_LED1_IVRTE1000_LEDCTL_LED1_IVRT 0x00004000 e1000_hw.h 　
14440
 E1000_LEDCTL_LED1_BLINKE1000_LEDCTL_LED1_BLINK 0x00008000 e1000_hw.h 　
14441
 E1000_LEDCTL_LED2_MODE_MASKE1000_LEDCTL_LED2_MODE_MASK 0x000F0000 e1000_hw.h 　
14442
 E1000_LEDCTL_LED2_MODE_SHIFTE1000_LEDCTL_LED2_MODE_SHIFT 16 e1000_hw.h 　
14443
 E1000_LEDCTL_LED2_BLINK_RATEE1000_LEDCTL_LED2_BLINK_RATE 0x00200000 e1000_hw.h 　
14444
 E1000_LEDCTL_LED2_IVRTE1000_LEDCTL_LED2_IVRT 0x00400000 e1000_hw.h 　
14445
 E1000_LEDCTL_LED2_BLINKE1000_LEDCTL_LED2_BLINK 0x00800000 e1000_hw.h 　
14446
 E1000_LEDCTL_LED3_MODE_MASKE1000_LEDCTL_LED3_MODE_MASK 0x0F000000 e1000_hw.h 　
14447
 E1000_LEDCTL_LED3_MODE_SHIFTE1000_LEDCTL_LED3_MODE_SHIFT 24 e1000_hw.h 　
14448
 E1000_LEDCTL_LED3_BLINK_RATEE1000_LEDCTL_LED3_BLINK_RATE 0x20000000 e1000_hw.h 　
14449
 E1000_LEDCTL_LED3_IVRTE1000_LEDCTL_LED3_IVRT 0x40000000 e1000_hw.h 　
14450
 E1000_LEDCTL_LED3_BLINKE1000_LEDCTL_LED3_BLINK 0x80000000 e1000_hw.h 　
14451
 E1000_LEDCTL_MODE_LINK_10_1000E1000_LEDCTL_MODE_LINK_10_1000 0x0 e1000_hw.h 　
14452
 E1000_LEDCTL_MODE_LINK_100_1000E1000_LEDCTL_MODE_LINK_100_1000 0x1 e1000_hw.h 　
14453
 E1000_LEDCTL_MODE_LINK_UPE1000_LEDCTL_MODE_LINK_UP 0x2 e1000_hw.h 　
14454
 E1000_LEDCTL_MODE_ACTIVITYE1000_LEDCTL_MODE_ACTIVITY 0x3 e1000_hw.h 　
14455
 E1000_LEDCTL_MODE_LINK_ACTIVITYE1000_LEDCTL_MODE_LINK_ACTIVITY 0x4 e1000_hw.h 　
14456
 E1000_LEDCTL_MODE_LINK_10E1000_LEDCTL_MODE_LINK_10 0x5 e1000_hw.h 　
14457
 E1000_LEDCTL_MODE_LINK_100E1000_LEDCTL_MODE_LINK_100 0x6 e1000_hw.h 　
14458
 E1000_LEDCTL_MODE_LINK_1000E1000_LEDCTL_MODE_LINK_1000 0x7 e1000_hw.h 　
14459
 E1000_LEDCTL_MODE_PCIX_MODEE1000_LEDCTL_MODE_PCIX_MODE 0x8 e1000_hw.h 　
14460
 E1000_LEDCTL_MODE_FULL_DUPLEXE1000_LEDCTL_MODE_FULL_DUPLEX 0x9 e1000_hw.h 　
14461
 E1000_LEDCTL_MODE_COLLISIONE1000_LEDCTL_MODE_COLLISION 0xA e1000_hw.h 　
14462
 E1000_LEDCTL_MODE_BUS_SPEEDE1000_LEDCTL_MODE_BUS_SPEED 0xB e1000_hw.h 　
14463
 E1000_LEDCTL_MODE_BUS_SIZEE1000_LEDCTL_MODE_BUS_SIZE 0xC e1000_hw.h 　
14464
 E1000_LEDCTL_MODE_PAUSEDE1000_LEDCTL_MODE_PAUSED 0xD e1000_hw.h 　
14465
 E1000_LEDCTL_MODE_LED_ONE1000_LEDCTL_MODE_LED_ON 0xE e1000_hw.h 　
14466
 E1000_LEDCTL_MODE_LED_OFFE1000_LEDCTL_MODE_LED_OFF 0xF e1000_hw.h 　
14467
 E1000_RAH_AVE1000_RAH_AV 0x80000000 e1000_hw.h Receive descriptor valid
14468
 E1000_RAH_POOL_1E1000_RAH_POOL_1 0x00040000 e1000_hw.h 　
14469
 E1000_ICR_TXDWE1000_ICR_TXDW 0x00000001 e1000_hw.h Transmit desc written back
14470
 E1000_ICR_TXQEE1000_ICR_TXQE 0x00000002 e1000_hw.h Transmit Queue empty
14471
 E1000_ICR_LSCE1000_ICR_LSC 0x00000004 e1000_hw.h Link Status Change
14472
 E1000_ICR_RXSEQE1000_ICR_RXSEQ 0x00000008 e1000_hw.h rx sequence error
14473
 E1000_ICR_RXDMT0E1000_ICR_RXDMT0 0x00000010 e1000_hw.h rx desc min. threshold (0)
14474
 E1000_ICR_DOUTSYNCE1000_ICR_DOUTSYNC 0x10000000 e1000_hw.h NIC DMA out of sync
14475
 E1000_ICR_RXOE1000_ICR_RXO 0x00000040 e1000_hw.h rx overrun
14476
 E1000_ICR_RXT0E1000_ICR_RXT0 0x00000080 e1000_hw.h rx timer intr (ring 0)
14477
 E1000_ICR_MDACE1000_ICR_MDAC 0x00000200 e1000_hw.h MDIO access complete
14478
 E1000_ICR_RXCFGE1000_ICR_RXCFG 0x00000400 e1000_hw.h RX /c/ ordered set
14479
 E1000_ICR_GPI_EN0E1000_ICR_GPI_EN0 0x00000800 e1000_hw.h GP Int 0
14480
 E1000_ICR_GPI_EN1E1000_ICR_GPI_EN1 0x00001000 e1000_hw.h GP Int 1
14481
 E1000_ICR_GPI_EN2E1000_ICR_GPI_EN2 0x00002000 e1000_hw.h GP Int 2
14482
 E1000_ICR_GPI_EN3E1000_ICR_GPI_EN3 0x00004000 e1000_hw.h GP Int 3
14483
 E1000_ICR_TXD_LOWE1000_ICR_TXD_LOW 0x00008000 e1000_hw.h 　
14484
 E1000_ICR_SRPDE1000_ICR_SRPD 0x00010000 e1000_hw.h 　
14485
 E1000_ICR_ACKE1000_ICR_ACK 0x00020000 e1000_hw.h Receive Ack frame
14486
 E1000_ICR_MNGE1000_ICR_MNG 0x00040000 e1000_hw.h Manageability event
14487
 E1000_ICR_DOCKE1000_ICR_DOCK 0x00080000 e1000_hw.h Dock/Undock
14488
 E1000_ICR_INT_ASSERTEDE1000_ICR_INT_ASSERTED 0x80000000 e1000_hw.h If this bit asserted, the driver should claim the interrupt
14489
 E1000_ICR_RXD_FIFO_PAR0E1000_ICR_RXD_FIFO_PAR0 0x00100000 e1000_hw.h queue 0 Rx descriptor FIFO parity error
14490
 E1000_ICR_TXD_FIFO_PAR0E1000_ICR_TXD_FIFO_PAR0 0x00200000 e1000_hw.h queue 0 Tx descriptor FIFO parity error
14491
 E1000_ICR_HOST_ARB_PARE1000_ICR_HOST_ARB_PAR 0x00400000 e1000_hw.h host arb read buffer parity error
14492
 E1000_ICR_PB_PARE1000_ICR_PB_PAR 0x00800000 e1000_hw.h packet buffer parity error
14493
 E1000_ICR_RXD_FIFO_PAR1E1000_ICR_RXD_FIFO_PAR1 0x01000000 e1000_hw.h queue 1 Rx descriptor FIFO parity error
14494
 E1000_ICR_TXD_FIFO_PAR1E1000_ICR_TXD_FIFO_PAR1 0x02000000 e1000_hw.h queue 1 Tx descriptor FIFO parity error
14495
 E1000_ICR_ALL_PARITYE1000_ICR_ALL_PARITY 0x03F00000 e1000_hw.h all parity error bits
14496
 E1000_ICR_DSWE1000_ICR_DSW 0x00000020 e1000_hw.h FW changed the status of DISSW bit in the FWSM
14497
 E1000_ICR_PHYINTE1000_ICR_PHYINT 0x00001000 e1000_hw.h LAN connected device generates an interrupt
14498
 E1000_ICR_EPRSTE1000_ICR_EPRST 0x00100000 e1000_hw.h ME handware reset occurs
14499
 E1000_ICS_TXDWE1000_ICS_TXDW E1000_ICR_TXDW e1000_hw.h Transmit desc written back
14500
 E1000_ICS_TXQEE1000_ICS_TXQE E1000_ICR_TXQE e1000_hw.h Transmit Queue empty
14501
 E1000_ICS_LSCE1000_ICS_LSC E1000_ICR_LSC e1000_hw.h Link Status Change
14502
 E1000_ICS_RXSEQE1000_ICS_RXSEQ E1000_ICR_RXSEQ e1000_hw.h rx sequence error
14503
 E1000_ICS_RXDMT0E1000_ICS_RXDMT0 E1000_ICR_RXDMT0 e1000_hw.h rx desc min. threshold
14504
 E1000_ICS_RXOE1000_ICS_RXO E1000_ICR_RXO e1000_hw.h rx overrun
14505
 E1000_ICS_RXT0E1000_ICS_RXT0 E1000_ICR_RXT0 e1000_hw.h rx timer intr
14506
 E1000_ICS_MDACE1000_ICS_MDAC E1000_ICR_MDAC e1000_hw.h MDIO access complete
14507
 E1000_ICS_RXCFGE1000_ICS_RXCFG E1000_ICR_RXCFG e1000_hw.h RX /c/ ordered set
14508
 E1000_ICS_GPI_EN0E1000_ICS_GPI_EN0 E1000_ICR_GPI_EN0 e1000_hw.h GP Int 0
14509
 E1000_ICS_GPI_EN1E1000_ICS_GPI_EN1 E1000_ICR_GPI_EN1 e1000_hw.h GP Int 1
14510
 E1000_ICS_GPI_EN2E1000_ICS_GPI_EN2 E1000_ICR_GPI_EN2 e1000_hw.h GP Int 2
14511
 E1000_ICS_GPI_EN3E1000_ICS_GPI_EN3 E1000_ICR_GPI_EN3 e1000_hw.h GP Int 3
14512
 E1000_ICS_TXD_LOWE1000_ICS_TXD_LOW E1000_ICR_TXD_LOW e1000_hw.h 　
14513
 E1000_ICS_SRPDE1000_ICS_SRPD E1000_ICR_SRPD e1000_hw.h 　
14514
 E1000_ICS_ACKE1000_ICS_ACK E1000_ICR_ACK e1000_hw.h Receive Ack frame
14515
 E1000_ICS_MNGE1000_ICS_MNG E1000_ICR_MNG e1000_hw.h Manageability event
14516
 E1000_ICS_DOCKE1000_ICS_DOCK E1000_ICR_DOCK e1000_hw.h Dock/Undock
14517
 E1000_ICS_RXD_FIFO_PAR0E1000_ICS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 e1000_hw.h queue 0 Rx descriptor FIFO parity error
14518
 E1000_ICS_TXD_FIFO_PAR0E1000_ICS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 e1000_hw.h queue 0 Tx descriptor FIFO parity error
14519
 E1000_ICS_HOST_ARB_PARE1000_ICS_HOST_ARB_PAR E1000_ICR_HOST_ARB_PAR e1000_hw.h host arb read buffer parity error
14520
 E1000_ICS_PB_PARE1000_ICS_PB_PAR E1000_ICR_PB_PAR e1000_hw.h packet buffer parity error
14521
 E1000_ICS_RXD_FIFO_PAR1E1000_ICS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 e1000_hw.h queue 1 Rx descriptor FIFO parity error
14522
 E1000_ICS_TXD_FIFO_PAR1E1000_ICS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 e1000_hw.h queue 1 Tx descriptor FIFO parity error
14523
 E1000_ICS_DSWE1000_ICS_DSW E1000_ICR_DSW e1000_hw.h 　
14524
 E1000_ICS_PHYINTE1000_ICS_PHYINT E1000_ICR_PHYINT e1000_hw.h 　
14525
 E1000_ICS_EPRSTE1000_ICS_EPRST E1000_ICR_EPRST e1000_hw.h 　
14526
 E1000_IMS_TXDWE1000_IMS_TXDW E1000_ICR_TXDW e1000_hw.h Transmit desc written back
14527
 E1000_IMS_TXQEE1000_IMS_TXQE E1000_ICR_TXQE e1000_hw.h Transmit Queue empty
14528
 E1000_IMS_LSCE1000_IMS_LSC E1000_ICR_LSC e1000_hw.h Link Status Change
14529
 E1000_IMS_RXSEQE1000_IMS_RXSEQ E1000_ICR_RXSEQ e1000_hw.h rx sequence error
14530
 E1000_IMS_RXDMT0E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 e1000_hw.h rx desc min. threshold
14531
 E1000_IMS_RXOE1000_IMS_RXO E1000_ICR_RXO e1000_hw.h rx overrun
14532
 E1000_IMS_DOUTSYNCE1000_IMS_DOUTSYNC E1000_ICR_DOUTSYNC e1000_hw.h NIC DMA out of sync
14533
 E1000_IMS_RXT0E1000_IMS_RXT0 E1000_ICR_RXT0 e1000_hw.h rx timer intr
14534
 E1000_IMS_MDACE1000_IMS_MDAC E1000_ICR_MDAC e1000_hw.h MDIO access complete
14535
 E1000_IMS_RXCFGE1000_IMS_RXCFG E1000_ICR_RXCFG e1000_hw.h RX /c/ ordered set
14536
 E1000_IMS_GPI_EN0E1000_IMS_GPI_EN0 E1000_ICR_GPI_EN0 e1000_hw.h GP Int 0
14537
 E1000_IMS_GPI_EN1E1000_IMS_GPI_EN1 E1000_ICR_GPI_EN1 e1000_hw.h GP Int 1
14538
 E1000_IMS_GPI_EN2E1000_IMS_GPI_EN2 E1000_ICR_GPI_EN2 e1000_hw.h GP Int 2
14539
 E1000_IMS_GPI_EN3E1000_IMS_GPI_EN3 E1000_ICR_GPI_EN3 e1000_hw.h GP Int 3
14540
 E1000_IMS_TXD_LOWE1000_IMS_TXD_LOW E1000_ICR_TXD_LOW e1000_hw.h 　
14541
 E1000_IMS_SRPDE1000_IMS_SRPD E1000_ICR_SRPD e1000_hw.h 　
14542
 E1000_IMS_ACKE1000_IMS_ACK E1000_ICR_ACK e1000_hw.h Receive Ack frame
14543
 E1000_IMS_MNGE1000_IMS_MNG E1000_ICR_MNG e1000_hw.h Manageability event
14544
 E1000_IMS_DOCKE1000_IMS_DOCK E1000_ICR_DOCK e1000_hw.h Dock/Undock
14545
 E1000_IMS_RXD_FIFO_PAR0E1000_IMS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 e1000_hw.h queue 0 Rx descriptor FIFO parity error
14546
 E1000_IMS_TXD_FIFO_PAR0E1000_IMS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 e1000_hw.h queue 0 Tx descriptor FIFO parity error
14547
 E1000_IMS_HOST_ARB_PARE1000_IMS_HOST_ARB_PAR E1000_ICR_HOST_ARB_PAR e1000_hw.h host arb read buffer parity error
14548
 E1000_IMS_PB_PARE1000_IMS_PB_PAR E1000_ICR_PB_PAR e1000_hw.h packet buffer parity error
14549
 E1000_IMS_RXD_FIFO_PAR1E1000_IMS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 e1000_hw.h queue 1 Rx descriptor FIFO parity error
14550
 E1000_IMS_TXD_FIFO_PAR1E1000_IMS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 e1000_hw.h queue 1 Tx descriptor FIFO parity error
14551
 E1000_IMS_DSWE1000_IMS_DSW E1000_ICR_DSW e1000_hw.h 　
14552
 E1000_IMS_PHYINTE1000_IMS_PHYINT E1000_ICR_PHYINT e1000_hw.h 　
14553
 E1000_IMS_EPRSTE1000_IMS_EPRST E1000_ICR_EPRST e1000_hw.h 　
14554
 E1000_IMC_TXDWE1000_IMC_TXDW E1000_ICR_TXDW e1000_hw.h Transmit desc written back
14555
 E1000_IMC_TXQEE1000_IMC_TXQE E1000_ICR_TXQE e1000_hw.h Transmit Queue empty
14556
 E1000_IMC_LSCE1000_IMC_LSC E1000_ICR_LSC e1000_hw.h Link Status Change
14557
 E1000_IMC_RXSEQE1000_IMC_RXSEQ E1000_ICR_RXSEQ e1000_hw.h rx sequence error
14558
 E1000_IMC_RXDMT0E1000_IMC_RXDMT0 E1000_ICR_RXDMT0 e1000_hw.h rx desc min. threshold
14559
 E1000_IMC_RXOE1000_IMC_RXO E1000_ICR_RXO e1000_hw.h rx overrun
14560
 E1000_IMC_RXT0E1000_IMC_RXT0 E1000_ICR_RXT0 e1000_hw.h rx timer intr
14561
 E1000_IMC_MDACE1000_IMC_MDAC E1000_ICR_MDAC e1000_hw.h MDIO access complete
14562
 E1000_IMC_RXCFGE1000_IMC_RXCFG E1000_ICR_RXCFG e1000_hw.h RX /c/ ordered set
14563
 E1000_IMC_GPI_EN0E1000_IMC_GPI_EN0 E1000_ICR_GPI_EN0 e1000_hw.h GP Int 0
14564
 E1000_IMC_GPI_EN1E1000_IMC_GPI_EN1 E1000_ICR_GPI_EN1 e1000_hw.h GP Int 1
14565
 E1000_IMC_GPI_EN2E1000_IMC_GPI_EN2 E1000_ICR_GPI_EN2 e1000_hw.h GP Int 2
14566
 E1000_IMC_GPI_EN3E1000_IMC_GPI_EN3 E1000_ICR_GPI_EN3 e1000_hw.h GP Int 3
14567
 E1000_IMC_TXD_LOWE1000_IMC_TXD_LOW E1000_ICR_TXD_LOW e1000_hw.h 　
14568
 E1000_IMC_SRPDE1000_IMC_SRPD E1000_ICR_SRPD e1000_hw.h 　
14569
 E1000_IMC_ACKE1000_IMC_ACK E1000_ICR_ACK e1000_hw.h Receive Ack frame
14570
 E1000_IMC_MNGE1000_IMC_MNG E1000_ICR_MNG e1000_hw.h Manageability event
14571
 E1000_IMC_DOCKE1000_IMC_DOCK E1000_ICR_DOCK e1000_hw.h Dock/Undock
14572
 E1000_IMC_RXD_FIFO_PAR0E1000_IMC_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 e1000_hw.h queue 0 Rx descriptor FIFO parity error
14573
 E1000_IMC_TXD_FIFO_PAR0E1000_IMC_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 e1000_hw.h queue 0 Tx descriptor FIFO parity error
14574
 E1000_IMC_HOST_ARB_PARE1000_IMC_HOST_ARB_PAR E1000_ICR_HOST_ARB_PAR e1000_hw.h host arb read buffer parity error
14575
 E1000_IMC_PB_PARE1000_IMC_PB_PAR E1000_ICR_PB_PAR e1000_hw.h packet buffer parity error
14576
 E1000_IMC_RXD_FIFO_PAR1E1000_IMC_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 e1000_hw.h queue 1 Rx descriptor FIFO parity error
14577
 E1000_IMC_TXD_FIFO_PAR1E1000_IMC_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 e1000_hw.h queue 1 Tx descriptor FIFO parity error
14578
 E1000_IMC_DSWE1000_IMC_DSW E1000_ICR_DSW e1000_hw.h 　
14579
 E1000_IMC_PHYINTE1000_IMC_PHYINT E1000_ICR_PHYINT e1000_hw.h 　
14580
 E1000_IMC_EPRSTE1000_IMC_EPRST E1000_ICR_EPRST e1000_hw.h 　
14581
 E1000_RCTL_RSTE1000_RCTL_RST 0x00000001 e1000_hw.h Software reset
14582
 E1000_RCTL_ENE1000_RCTL_EN 0x00000002 e1000_hw.h enable
14583
 E1000_RCTL_SBPE1000_RCTL_SBP 0x00000004 e1000_hw.h store bad packet
14584
 E1000_RCTL_UPEE1000_RCTL_UPE 0x00000008 e1000_hw.h unicast promiscuous enable
14585
 E1000_RCTL_MPEE1000_RCTL_MPE 0x00000010 e1000_hw.h multicast promiscuous enab
14586
 E1000_RCTL_LPEE1000_RCTL_LPE 0x00000020 e1000_hw.h long packet enable
14587
 E1000_RCTL_LBM_NOE1000_RCTL_LBM_NO 0x00000000 e1000_hw.h no loopback mode
14588
 E1000_RCTL_LBM_MACE1000_RCTL_LBM_MAC 0x00000040 e1000_hw.h MAC loopback mode
14589
 E1000_RCTL_LBM_SLPE1000_RCTL_LBM_SLP 0x00000080 e1000_hw.h serial link loopback mode
14590
 E1000_RCTL_LBM_TCVRE1000_RCTL_LBM_TCVR 0x000000C0 e1000_hw.h tcvr loopback mode
14591
 E1000_RCTL_DTYP_MASKE1000_RCTL_DTYP_MASK 0x00000C00 e1000_hw.h Descriptor type mask
14592
 E1000_RCTL_DTYP_PSE1000_RCTL_DTYP_PS 0x00000400 e1000_hw.h Packet Split descriptor
14593
 E1000_RCTL_RDMTS_HALFE1000_RCTL_RDMTS_HALF 0x00000000 e1000_hw.h rx desc min threshold size
14594
 E1000_RCTL_RDMTS_QUATE1000_RCTL_RDMTS_QUAT 0x00000100 e1000_hw.h rx desc min threshold size
14595
 E1000_RCTL_RDMTS_EIGTHE1000_RCTL_RDMTS_EIGTH 0x00000200 e1000_hw.h rx desc min threshold size
14596
 E1000_RCTL_MO_SHIFTE1000_RCTL_MO_SHIFT 12 e1000_hw.h multicast offset shift
14597
 E1000_RCTL_MO_0E1000_RCTL_MO_0 0x00000000 e1000_hw.h multicast offset 11:0
14598
 E1000_RCTL_MO_1E1000_RCTL_MO_1 0x00001000 e1000_hw.h multicast offset 12:1
14599
 E1000_RCTL_MO_2E1000_RCTL_MO_2 0x00002000 e1000_hw.h multicast offset 13:2
14600
 E1000_RCTL_MO_3E1000_RCTL_MO_3 0x00003000 e1000_hw.h multicast offset 15:4
14601
 E1000_RCTL_MDRE1000_RCTL_MDR 0x00004000 e1000_hw.h multicast desc ring 0
14602
 E1000_RCTL_BAME1000_RCTL_BAM 0x00008000 e1000_hw.h broadcast enable
14603
 E1000_RCTL_SZ_2048E1000_RCTL_SZ_2048 0x00000000 e1000_hw.h rx buffer size 2048
14604
 E1000_RCTL_SZ_1024E1000_RCTL_SZ_1024 0x00010000 e1000_hw.h rx buffer size 1024
14605
 E1000_RCTL_SZ_512E1000_RCTL_SZ_512 0x00020000 e1000_hw.h rx buffer size 512
14606
 E1000_RCTL_SZ_256E1000_RCTL_SZ_256 0x00030000 e1000_hw.h rx buffer size 256
14607
 E1000_RCTL_SZ_16384E1000_RCTL_SZ_16384 0x00010000 e1000_hw.h rx buffer size 16384
14608
 E1000_RCTL_SZ_8192E1000_RCTL_SZ_8192 0x00020000 e1000_hw.h rx buffer size 8192
14609
 E1000_RCTL_SZ_4096E1000_RCTL_SZ_4096 0x00030000 e1000_hw.h rx buffer size 4096
14610
 E1000_RCTL_VFEE1000_RCTL_VFE 0x00040000 e1000_hw.h vlan filter enable
14611
 E1000_RCTL_CFIENE1000_RCTL_CFIEN 0x00080000 e1000_hw.h canonical form enable
14612
 E1000_RCTL_CFIE1000_RCTL_CFI 0x00100000 e1000_hw.h canonical form indicator
14613
 E1000_RCTL_DPFE1000_RCTL_DPF 0x00400000 e1000_hw.h discard pause frames
14614
 E1000_RCTL_PMCFE1000_RCTL_PMCF 0x00800000 e1000_hw.h pass MAC control frames
14615
 E1000_RCTL_BSEXE1000_RCTL_BSEX 0x02000000 e1000_hw.h Buffer size extension
14616
 E1000_RCTL_SECRCE1000_RCTL_SECRC 0x04000000 e1000_hw.h Strip Ethernet CRC
14617
 E1000_RCTL_FLXBUF_MASKE1000_RCTL_FLXBUF_MASK 0x78000000 e1000_hw.h Flexible buffer size
14618
 E1000_RCTL_FLXBUF_SHIFTE1000_RCTL_FLXBUF_SHIFT 27 e1000_hw.h Flexible buffer shift
14619
 E1000_PSRCTL_BSIZE0_MASKE1000_PSRCTL_BSIZE0_MASK 0x0000007F e1000_hw.h 　
14620
 E1000_PSRCTL_BSIZE1_MASKE1000_PSRCTL_BSIZE1_MASK 0x00003F00 e1000_hw.h 　
14621
 E1000_PSRCTL_BSIZE2_MASKE1000_PSRCTL_BSIZE2_MASK 0x003F0000 e1000_hw.h 　
14622
 E1000_PSRCTL_BSIZE3_MASKE1000_PSRCTL_BSIZE3_MASK 0x3F000000 e1000_hw.h 　
14623
 E1000_PSRCTL_BSIZE0_SHIFTE1000_PSRCTL_BSIZE0_SHIFT 7 e1000_hw.h Shift _right_ 7
14624
 E1000_PSRCTL_BSIZE1_SHIFTE1000_PSRCTL_BSIZE1_SHIFT 2 e1000_hw.h Shift _right_ 2
14625
 E1000_PSRCTL_BSIZE2_SHIFTE1000_PSRCTL_BSIZE2_SHIFT 6 e1000_hw.h Shift _left_ 6
14626
 E1000_PSRCTL_BSIZE3_SHIFTE1000_PSRCTL_BSIZE3_SHIFT 14 e1000_hw.h Shift _left_ 14
14627
 E1000_SWFW_EEP_SME1000_SWFW_EEP_SM 0x0001 e1000_hw.h 　
14628
 E1000_SWFW_PHY0_SME1000_SWFW_PHY0_SM 0x0002 e1000_hw.h 　
14629
 E1000_SWFW_PHY1_SME1000_SWFW_PHY1_SM 0x0004 e1000_hw.h 　
14630
 E1000_SWFW_MAC_CSR_SME1000_SWFW_MAC_CSR_SM 0x0008 e1000_hw.h 　
14631
 E1000_RDT_DELAYE1000_RDT_DELAY 0x0000ffff e1000_hw.h Delay timer (1=1024us)
14632
 E1000_RDT_FPDBE1000_RDT_FPDB 0x80000000 e1000_hw.h Flush descriptor block
14633
 E1000_RDLEN_LENE1000_RDLEN_LEN 0x0007ff80 e1000_hw.h descriptor length
14634
 E1000_RDH_RDHE1000_RDH_RDH 0x0000ffff e1000_hw.h receive descriptor head
14635
 E1000_RDT_RDTE1000_RDT_RDT 0x0000ffff e1000_hw.h receive descriptor tail
14636
 E1000_FCRTH_RTHE1000_FCRTH_RTH 0x0000FFF8 e1000_hw.h Mask Bits[15:3] for RTH
14637
 E1000_FCRTH_XFCEE1000_FCRTH_XFCE 0x80000000 e1000_hw.h External Flow Control Enable
14638
 E1000_FCRTL_RTLE1000_FCRTL_RTL 0x0000FFF8 e1000_hw.h Mask Bits[15:3] for RTL
14639
 E1000_FCRTL_XONEE1000_FCRTL_XONE 0x80000000 e1000_hw.h Enable XON frame transmission
14640
 E1000_RFCTL_ISCSI_DISE1000_RFCTL_ISCSI_DIS 0x00000001 e1000_hw.h 　
14641
 E1000_RFCTL_ISCSI_DWC_MASKE1000_RFCTL_ISCSI_DWC_MASK 0x0000003E e1000_hw.h 　
14642
 E1000_RFCTL_ISCSI_DWC_SHIFTE1000_RFCTL_ISCSI_DWC_SHIFT 1 e1000_hw.h 　
14643
 E1000_RFCTL_NFSW_DISE1000_RFCTL_NFSW_DIS 0x00000040 e1000_hw.h 　
14644
 E1000_RFCTL_NFSR_DISE1000_RFCTL_NFSR_DIS 0x00000080 e1000_hw.h 　
14645
 E1000_RFCTL_NFS_VER_MASKE1000_RFCTL_NFS_VER_MASK 0x00000300 e1000_hw.h 　
14646
 E1000_RFCTL_NFS_VER_SHIFTE1000_RFCTL_NFS_VER_SHIFT 8 e1000_hw.h 　
14647
 E1000_RFCTL_IPV6_DISE1000_RFCTL_IPV6_DIS 0x00000400 e1000_hw.h 　
14648
 E1000_RFCTL_IPV6_XSUM_DISE1000_RFCTL_IPV6_XSUM_DIS 0x00000800 e1000_hw.h 　
14649
 E1000_RFCTL_ACK_DISE1000_RFCTL_ACK_DIS 0x00001000 e1000_hw.h 　
14650
 E1000_RFCTL_ACKD_DISE1000_RFCTL_ACKD_DIS 0x00002000 e1000_hw.h 　
14651
 E1000_RFCTL_IPFRSP_DISE1000_RFCTL_IPFRSP_DIS 0x00004000 e1000_hw.h 　
14652
 E1000_RFCTL_EXTENE1000_RFCTL_EXTEN 0x00008000 e1000_hw.h 　
14653
 E1000_RFCTL_IPV6_EX_DISE1000_RFCTL_IPV6_EX_DIS 0x00010000 e1000_hw.h 　
14654
 E1000_RFCTL_NEW_IPV6_EXT_DISE1000_RFCTL_NEW_IPV6_EXT_DIS 0x00020000 e1000_hw.h 　
14655
 E1000_RXDCTL_PTHRESHE1000_RXDCTL_PTHRESH 0x0000003F e1000_hw.h RXDCTL Prefetch Threshold
14656
 E1000_RXDCTL_HTHRESHE1000_RXDCTL_HTHRESH 0x00003F00 e1000_hw.h RXDCTL Host Threshold
14657
 E1000_RXDCTL_WTHRESHE1000_RXDCTL_WTHRESH 0x003F0000 e1000_hw.h RXDCTL Writeback Threshold
14658
 E1000_RXDCTL_GRANE1000_RXDCTL_GRAN 0x01000000 e1000_hw.h RXDCTL Granularity
14659
 E1000_RXDCTL_QUEUE_ENABLEE1000_RXDCTL_QUEUE_ENABLE 0x02000000 e1000_hw.h Enable specific Rx Queue
14660
 IGB_RX_PTHRESHIGB_RX_PTHRESH 16 e1000_hw.h 　
14661
 IGB_RX_HTHRESHIGB_RX_HTHRESH 8 e1000_hw.h 　
14662
 IGB_RX_WTHRESHIGB_RX_WTHRESH 1 e1000_hw.h 　
14663
 E1000_TXDCTL_PTHRESHE1000_TXDCTL_PTHRESH 0x0000003F e1000_hw.h TXDCTL Prefetch Threshold
14664
 E1000_TXDCTL_HTHRESHE1000_TXDCTL_HTHRESH 0x00003F00 e1000_hw.h TXDCTL Host Threshold
14665
 E1000_TXDCTL_WTHRESHE1000_TXDCTL_WTHRESH 0x003F0000 e1000_hw.h TXDCTL Writeback Threshold
14666
 E1000_TXDCTL_GRANE1000_TXDCTL_GRAN 0x01000000 e1000_hw.h TXDCTL Granularity
14667
 E1000_TXDCTL_LWTHRESHE1000_TXDCTL_LWTHRESH 0xFE000000 e1000_hw.h TXDCTL Low Threshold
14668
 E1000_TXDCTL_FULL_TX_DESC_WBE1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 e1000_hw.h GRAN=1, WTHRESH=1
14669
 E1000_TXDCTL_COUNT_DESCE1000_TXDCTL_COUNT_DESC 0x00400000 e1000_hw.h Enable the counting of desc.
14670
 E1000_TXDCTL_QUEUE_ENABLEE1000_TXDCTL_QUEUE_ENABLE 0x02000000 e1000_hw.h Enable specific Tx Queue
14671
 E1000_TXCW_FDE1000_TXCW_FD 0x00000020 e1000_hw.h TXCW full duplex
14672
 E1000_TXCW_HDE1000_TXCW_HD 0x00000040 e1000_hw.h TXCW half duplex
14673
 E1000_TXCW_PAUSEE1000_TXCW_PAUSE 0x00000080 e1000_hw.h TXCW sym pause request
14674
 E1000_TXCW_ASM_DIRE1000_TXCW_ASM_DIR 0x00000100 e1000_hw.h TXCW astm pause direction
14675
 E1000_TXCW_PAUSE_MASKE1000_TXCW_PAUSE_MASK 0x00000180 e1000_hw.h TXCW pause request mask
14676
 E1000_TXCW_RFE1000_TXCW_RF 0x00003000 e1000_hw.h TXCW remote fault
14677
 E1000_TXCW_NPE1000_TXCW_NP 0x00008000 e1000_hw.h TXCW next page
14678
 E1000_TXCW_CWE1000_TXCW_CW 0x0000ffff e1000_hw.h TxConfigWord mask
14679
 E1000_TXCW_TXCE1000_TXCW_TXC 0x40000000 e1000_hw.h Transmit Config control
14680
 E1000_TXCW_ANEE1000_TXCW_ANE 0x80000000 e1000_hw.h Auto-neg enable
14681
 E1000_RXCW_CWE1000_RXCW_CW 0x0000ffff e1000_hw.h RxConfigWord mask
14682
 E1000_RXCW_NCE1000_RXCW_NC 0x04000000 e1000_hw.h Receive config no carrier
14683
 E1000_RXCW_IVE1000_RXCW_IV 0x08000000 e1000_hw.h Receive config invalid
14684
 E1000_RXCW_CCE1000_RXCW_CC 0x10000000 e1000_hw.h Receive config change
14685
 E1000_RXCW_CE1000_RXCW_C 0x20000000 e1000_hw.h Receive config
14686
 E1000_RXCW_SYNCHE1000_RXCW_SYNCH 0x40000000 e1000_hw.h Receive config synch
14687
 E1000_RXCW_ANCE1000_RXCW_ANC 0x80000000 e1000_hw.h Auto-neg complete
14688
 E1000_TCTL_RSTE1000_TCTL_RST 0x00000001 e1000_hw.h software reset
14689
 E1000_TCTL_ENE1000_TCTL_EN 0x00000002 e1000_hw.h enable tx
14690
 E1000_TCTL_BCEE1000_TCTL_BCE 0x00000004 e1000_hw.h busy check enable
14691
 E1000_TCTL_PSPE1000_TCTL_PSP 0x00000008 e1000_hw.h pad short packets
14692
 E1000_TCTL_CTE1000_TCTL_CT 0x00000ff0 e1000_hw.h collision threshold
14693
 E1000_TCTL_COLDE1000_TCTL_COLD 0x003ff000 e1000_hw.h collision distance
14694
 E1000_TCTL_SWXOFFE1000_TCTL_SWXOFF 0x00400000 e1000_hw.h SW Xoff transmission
14695
 E1000_TCTL_PBEE1000_TCTL_PBE 0x00800000 e1000_hw.h Packet Burst Enable
14696
 E1000_TCTL_RTLCE1000_TCTL_RTLC 0x01000000 e1000_hw.h Re-transmit on late collision
14697
 E1000_TCTL_NRTUE1000_TCTL_NRTU 0x02000000 e1000_hw.h No Re-transmit on underrun
14698
 E1000_TCTL_MULRE1000_TCTL_MULR 0x10000000 e1000_hw.h Multiple request support
14699
 E1000_TCTL_EXT_BST_MASKE1000_TCTL_EXT_BST_MASK 0x000003FF e1000_hw.h Backoff Slot Time
14700
 E1000_TCTL_EXT_GCEX_MASKE1000_TCTL_EXT_GCEX_MASK 0x000FFC00 e1000_hw.h Gigabit Carry Extend Padding
14701
 DEFAULT_80003ES2LAN_TCTL_EXT_GCDEFAULT_80003ES2LAN_TCTL_EXT_GC 0x00010000 e1000_hw.h 　
14702
 E1000_RXCSUM_PCSS_MASKE1000_RXCSUM_PCSS_MASK 0x000000FF e1000_hw.h Packet Checksum Start
14703
 E1000_RXCSUM_IPOFLE1000_RXCSUM_IPOFL 0x00000100 e1000_hw.h IPv4 checksum offload
14704
 E1000_RXCSUM_TUOFLE1000_RXCSUM_TUOFL 0x00000200 e1000_hw.h TCP / UDP checksum offload
14705
 E1000_RXCSUM_IPV6OFLE1000_RXCSUM_IPV6OFL 0x00000400 e1000_hw.h IPv6 checksum offload
14706
 E1000_RXCSUM_IPPCSEE1000_RXCSUM_IPPCSE 0x00001000 e1000_hw.h IP payload checksum enable
14707
 E1000_RXCSUM_PCSDE1000_RXCSUM_PCSD 0x00002000 e1000_hw.h packet checksum disabled
14708
 E1000_MRQC_ENABLE_MASKE1000_MRQC_ENABLE_MASK 0x00000003 e1000_hw.h 　
14709
 E1000_MRQC_ENABLE_VMDQE1000_MRQC_ENABLE_VMDQ 0x00000003 e1000_hw.h 　
14710
 E1000_MRQC_ENABLE_RSS_2QE1000_MRQC_ENABLE_RSS_2Q 0x00000001 e1000_hw.h 　
14711
 E1000_MRQC_ENABLE_RSS_INTE1000_MRQC_ENABLE_RSS_INT 0x00000004 e1000_hw.h 　
14712
 E1000_MRQC_RSS_FIELD_MASKE1000_MRQC_RSS_FIELD_MASK 0xFFFF0000 e1000_hw.h 　
14713
 E1000_MRQC_RSS_FIELD_IPV4_TCPE1000_MRQC_RSS_FIELD_IPV4_TCP 0x00010000 e1000_hw.h 　
14714
 E1000_MRQC_RSS_FIELD_IPV4E1000_MRQC_RSS_FIELD_IPV4 0x00020000 e1000_hw.h 　
14715
 E1000_MRQC_RSS_FIELD_IPV6_TCP_EE1000_MRQC_RSS_FIELD_IPV6_TCP_E 0x00040000 e1000_hw.h 　
14716
 E1000_MRQC_RSS_FIELD_IPV6_EXE1000_MRQC_RSS_FIELD_IPV6_EX 0x00080000 e1000_hw.h 　
14717
 E1000_MRQC_RSS_FIELD_IPV6E1000_MRQC_RSS_FIELD_IPV6 0x00100000 e1000_hw.h 　
14718
 E1000_MRQC_RSS_FIELD_IPV6_TCPE1000_MRQC_RSS_FIELD_IPV6_TCP 0x00200000 e1000_hw.h 　
14719
 E1000_WUC_APMEE1000_WUC_APME 0x00000001 e1000_hw.h APM Enable
14720
 E1000_WUC_PME_ENE1000_WUC_PME_EN 0x00000002 e1000_hw.h PME Enable
14721
 E1000_WUC_PME_STATUSE1000_WUC_PME_STATUS 0x00000004 e1000_hw.h PME Status
14722
 E1000_WUC_APMPMEE1000_WUC_APMPME 0x00000008 e1000_hw.h Assert PME on APM Wakeup
14723
 E1000_WUC_SPME1000_WUC_SPM 0x80000000 e1000_hw.h Enable SPM
14724
 E1000_WUFC_LNKCE1000_WUFC_LNKC 0x00000001 e1000_hw.h Link Status Change Wakeup Enable
14725
 E1000_WUFC_MAGE1000_WUFC_MAG 0x00000002 e1000_hw.h Magic Packet Wakeup Enable
14726
 E1000_WUFC_EXE1000_WUFC_EX 0x00000004 e1000_hw.h Directed Exact Wakeup Enable
14727
 E1000_WUFC_MCE1000_WUFC_MC 0x00000008 e1000_hw.h Directed Multicast Wakeup Enable
14728
 E1000_WUFC_BCE1000_WUFC_BC 0x00000010 e1000_hw.h Broadcast Wakeup Enable
14729
 E1000_WUFC_ARPE1000_WUFC_ARP 0x00000020 e1000_hw.h ARP Request Packet Wakeup Enable
14730
 E1000_WUFC_IPV4E1000_WUFC_IPV4 0x00000040 e1000_hw.h Directed IPv4 Packet Wakeup Enable
14731
 E1000_WUFC_IPV6E1000_WUFC_IPV6 0x00000080 e1000_hw.h Directed IPv6 Packet Wakeup Enable
14732
 E1000_WUFC_IGNORE_TCOE1000_WUFC_IGNORE_TCO 0x00008000 e1000_hw.h Ignore WakeOn TCO packets
14733
 E1000_WUFC_FLX0E1000_WUFC_FLX0 0x00010000 e1000_hw.h Flexible Filter 0 Enable
14734
 E1000_WUFC_FLX1E1000_WUFC_FLX1 0x00020000 e1000_hw.h Flexible Filter 1 Enable
14735
 E1000_WUFC_FLX2E1000_WUFC_FLX2 0x00040000 e1000_hw.h Flexible Filter 2 Enable
14736
 E1000_WUFC_FLX3E1000_WUFC_FLX3 0x00080000 e1000_hw.h Flexible Filter 3 Enable
14737
 E1000_WUFC_ALL_FILTERSE1000_WUFC_ALL_FILTERS 0x000F00FF e1000_hw.h Mask for all wakeup filters
14738
 E1000_WUFC_FLX_OFFSETE1000_WUFC_FLX_OFFSET 16 e1000_hw.h Offset to the Flexible Filters bits
14739
 E1000_WUFC_FLX_FILTERSE1000_WUFC_FLX_FILTERS 0x000F0000 e1000_hw.h Mask for the 4 flexible filters
14740
 E1000_WUS_LNKCE1000_WUS_LNKC 0x00000001 e1000_hw.h Link Status Changed
14741
 E1000_WUS_MAGE1000_WUS_MAG 0x00000002 e1000_hw.h Magic Packet Received
14742
 E1000_WUS_EXE1000_WUS_EX 0x00000004 e1000_hw.h Directed Exact Received
14743
 E1000_WUS_MCE1000_WUS_MC 0x00000008 e1000_hw.h Directed Multicast Received
14744
 E1000_WUS_BCE1000_WUS_BC 0x00000010 e1000_hw.h Broadcast Received
14745
 E1000_WUS_ARPE1000_WUS_ARP 0x00000020 e1000_hw.h ARP Request Packet Received
14746
 E1000_WUS_IPV4E1000_WUS_IPV4 0x00000040 e1000_hw.h Directed IPv4 Packet Wakeup Received
14747
 E1000_WUS_IPV6E1000_WUS_IPV6 0x00000080 e1000_hw.h Directed IPv6 Packet Wakeup Received
14748
 E1000_WUS_FLX0E1000_WUS_FLX0 0x00010000 e1000_hw.h Flexible Filter 0 Match
14749
 E1000_WUS_FLX1E1000_WUS_FLX1 0x00020000 e1000_hw.h Flexible Filter 1 Match
14750
 E1000_WUS_FLX2E1000_WUS_FLX2 0x00040000 e1000_hw.h Flexible Filter 2 Match
14751
 E1000_WUS_FLX3E1000_WUS_FLX3 0x00080000 e1000_hw.h Flexible Filter 3 Match
14752
 E1000_WUS_FLX_FILTERSE1000_WUS_FLX_FILTERS 0x000F0000 e1000_hw.h Mask for the 4 flexible filters
14753
 E1000_MANC_SMBUS_ENE1000_MANC_SMBUS_EN 0x00000001 e1000_hw.h SMBus Enabled - RO
14754
 E1000_MANC_ASF_ENE1000_MANC_ASF_EN 0x00000002 e1000_hw.h ASF Enabled - RO
14755
 E1000_MANC_R_ON_FORCEE1000_MANC_R_ON_FORCE 0x00000004 e1000_hw.h Reset on Force TCO - RO
14756
 E1000_MANC_RMCP_ENE1000_MANC_RMCP_EN 0x00000100 e1000_hw.h Enable RCMP 026Fh Filtering
14757
 E1000_MANC_0298_ENE1000_MANC_0298_EN 0x00000200 e1000_hw.h Enable RCMP 0298h Filtering
14758
 E1000_MANC_IPV4_ENE1000_MANC_IPV4_EN 0x00000400 e1000_hw.h Enable IPv4
14759
 E1000_MANC_IPV6_ENE1000_MANC_IPV6_EN 0x00000800 e1000_hw.h Enable IPv6
14760
 E1000_MANC_SNAP_ENE1000_MANC_SNAP_EN 0x00001000 e1000_hw.h Accept LLC/SNAP
14761
 E1000_MANC_ARP_ENE1000_MANC_ARP_EN 0x00002000 e1000_hw.h Enable ARP Request Filtering
14762
 E1000_MANC_NEIGHBOR_ENE1000_MANC_NEIGHBOR_EN 0x00004000 e1000_hw.h Enable Neighbor Discovery
14763
 E1000_MANC_ARP_RES_ENE1000_MANC_ARP_RES_EN 0x00008000 e1000_hw.h Enable ARP response Filtering
14764
 E1000_MANC_TCO_RESETE1000_MANC_TCO_RESET 0x00010000 e1000_hw.h TCO Reset Occurred
14765
 E1000_MANC_RCV_TCO_ENE1000_MANC_RCV_TCO_EN 0x00020000 e1000_hw.h Receive TCO Packets Enabled
14766
 E1000_MANC_REPORT_STATUSE1000_MANC_REPORT_STATUS 0x00040000 e1000_hw.h Status Reporting Enabled
14767
 E1000_MANC_RCV_ALLE1000_MANC_RCV_ALL 0x00080000 e1000_hw.h Receive All Enabled
14768
 E1000_MANC_BLK_PHY_RST_ON_IDEE1000_MANC_BLK_PHY_RST_ON_IDE 0x00040000 e1000_hw.h Block phy resets
14769
 E1000_MANC_EN_MAC_ADDR_FILTERE1000_MANC_EN_MAC_ADDR_FILTER 0x00100000 e1000_hw.h Enable MAC address
14770
 E1000_MANC_EN_MNG2HOSTE1000_MANC_EN_MNG2HOST 0x00200000 e1000_hw.h Enable MNG packets to host
14771
 E1000_MANC_EN_IP_ADDR_FILTERE1000_MANC_EN_IP_ADDR_FILTER 0x00400000 e1000_hw.h Enable IP address
14772
 E1000_MANC_EN_XSUM_FILTERE1000_MANC_EN_XSUM_FILTER 0x00800000 e1000_hw.h Enable checksum filtering
14773
 E1000_MANC_BR_ENE1000_MANC_BR_EN 0x01000000 e1000_hw.h Enable broadcast filtering
14774
 E1000_MANC_SMB_REQE1000_MANC_SMB_REQ 0x01000000 e1000_hw.h SMBus Request
14775
 E1000_MANC_SMB_GNTE1000_MANC_SMB_GNT 0x02000000 e1000_hw.h SMBus Grant
14776
 E1000_MANC_SMB_CLK_INE1000_MANC_SMB_CLK_IN 0x04000000 e1000_hw.h SMBus Clock In
14777
 E1000_MANC_SMB_DATA_INE1000_MANC_SMB_DATA_IN 0x08000000 e1000_hw.h SMBus Data In
14778
 E1000_MANC_SMB_DATA_OUTE1000_MANC_SMB_DATA_OUT 0x10000000 e1000_hw.h SMBus Data Out
14779
 E1000_MANC_SMB_CLK_OUTE1000_MANC_SMB_CLK_OUT 0x20000000 e1000_hw.h SMBus Clock Out
14780
 E1000_MANC_SMB_DATA_OUT_SHIFTE1000_MANC_SMB_DATA_OUT_SHIFT 28 e1000_hw.h SMBus Data Out Shift
14781
 E1000_MANC_SMB_CLK_OUT_SHIFTE1000_MANC_SMB_CLK_OUT_SHIFT 29 e1000_hw.h SMBus Clock Out Shift
14782
 E1000_SWSM_SMBIE1000_SWSM_SMBI 0x00000001 e1000_hw.h Driver Semaphore bit
14783
 E1000_SWSM_SWESMBIE1000_SWSM_SWESMBI 0x00000002 e1000_hw.h FW Semaphore bit
14784
 E1000_SWSM_WMNGE1000_SWSM_WMNG 0x00000004 e1000_hw.h Wake MNG Clock
14785
 E1000_SWSM_DRV_LOADE1000_SWSM_DRV_LOAD 0x00000008 e1000_hw.h Driver Loaded Bit
14786
 E1000_FWSM_MODE_MASKE1000_FWSM_MODE_MASK 0x0000000E e1000_hw.h FW mode
14787
 E1000_FWSM_MODE_SHIFTE1000_FWSM_MODE_SHIFT 1 e1000_hw.h 　
14788
 E1000_FWSM_FW_VALIDE1000_FWSM_FW_VALID 0x00008000 e1000_hw.h FW established a valid mode
14789
 E1000_FWSM_RSPCIPHYE1000_FWSM_RSPCIPHY 0x00000040 e1000_hw.h Reset PHY on PCI reset
14790
 E1000_FWSM_DISSWE1000_FWSM_DISSW 0x10000000 e1000_hw.h FW disable SW Write Access
14791
 E1000_FWSM_SKUSEL_MASKE1000_FWSM_SKUSEL_MASK 0x60000000 e1000_hw.h LAN SKU select
14792
 E1000_FWSM_SKUEL_SHIFTE1000_FWSM_SKUEL_SHIFT 29 e1000_hw.h 　
14793
 E1000_FWSM_SKUSEL_EMBE1000_FWSM_SKUSEL_EMB 0x0 e1000_hw.h Embedded SKU
14794
 E1000_FWSM_SKUSEL_CONSE1000_FWSM_SKUSEL_CONS 0x1 e1000_hw.h Consumer SKU
14795
 E1000_FWSM_SKUSEL_PERF_100E1000_FWSM_SKUSEL_PERF_100 0x2 e1000_hw.h Perf & Corp 10/100 SKU
14796
 E1000_FWSM_SKUSEL_PERF_GBEE1000_FWSM_SKUSEL_PERF_GBE 0x3 e1000_hw.h Perf & Copr GbE SKU
14797
 E1000_FFLT_DBG_INVCE1000_FFLT_DBG_INVC 0x00100000 e1000_hw.h Invalid /C/ code handling
14798
 E1000_HICR_ENE1000_HICR_EN 0x00000001 e1000_hw.h Enable Bit - RO
14799
 E1000_HICR_CE1000_HICR_C 0x00000002 e1000_hw.h Driver sets this bit when done
14800
 E1000_HICR_SVE1000_HICR_SV 0x00000004 e1000_hw.h Status Validity
14801
 E1000_HICR_FWRE1000_HICR_FWR 0x00000080 e1000_hw.h FW reset. Set by the Host
14802
 E1000_HI_MAX_DATA_LENGTHE1000_HI_MAX_DATA_LENGTH 252 e1000_hw.h Host Interface data length
14803
 E1000_HI_MAX_BLOCK_BYTE_LENGTHE1000_HI_MAX_BLOCK_BYTE_LENGTH 1792 e1000_hw.h Number of bytes in range
14804
 E1000_HI_MAX_BLOCK_DWORD_LENGTHE1000_HI_MAX_BLOCK_DWORD_LENGTH 448 e1000_hw.h Number of dwords in range
14805
 E1000_HI_COMMAND_TIMEOUTE1000_HI_COMMAND_TIMEOUT 500 e1000_hw.h Time in ms to process HI command
14806
 E1000_HSMC0R_CLKINE1000_HSMC0R_CLKIN 0x00000001 e1000_hw.h SMB Clock in
14807
 E1000_HSMC0R_DATAINE1000_HSMC0R_DATAIN 0x00000002 e1000_hw.h SMB Data in
14808
 E1000_HSMC0R_DATAOUTE1000_HSMC0R_DATAOUT 0x00000004 e1000_hw.h SMB Data out
14809
 E1000_HSMC0R_CLKOUTE1000_HSMC0R_CLKOUT 0x00000008 e1000_hw.h SMB Clock out
14810
 E1000_HSMC1R_CLKINE1000_HSMC1R_CLKIN E1000_HSMC0R_CLKIN e1000_hw.h 　
14811
 E1000_HSMC1R_DATAINE1000_HSMC1R_DATAIN E1000_HSMC0R_DATAIN e1000_hw.h 　
14812
 E1000_HSMC1R_DATAOUTE1000_HSMC1R_DATAOUT E1000_HSMC0R_DATAOUT e1000_hw.h 　
14813
 E1000_HSMC1R_CLKOUTE1000_HSMC1R_CLKOUT E1000_HSMC0R_CLKOUT e1000_hw.h 　
14814
 E1000_FWSTS_FWS_MASKE1000_FWSTS_FWS_MASK 0x000000FF e1000_hw.h FW Status
14815
 E1000_WUPL_LENGTH_MASKE1000_WUPL_LENGTH_MASK 0x0FFF e1000_hw.h Only the lower 12 bits are valid
14816
 E1000_MDALIGNE1000_MDALIGN 4096 e1000_hw.h 　
14817
 E1000_GCR_RXD_NO_SNOOPE1000_GCR_RXD_NO_SNOOP 0x00000001 e1000_hw.h 　
14818
 E1000_GCR_RXDSCW_NO_SNOOPE1000_GCR_RXDSCW_NO_SNOOP 0x00000002 e1000_hw.h 　
14819
 E1000_GCR_RXDSCR_NO_SNOOPE1000_GCR_RXDSCR_NO_SNOOP 0x00000004 e1000_hw.h 　
14820
 E1000_GCR_TXD_NO_SNOOPE1000_GCR_TXD_NO_SNOOP 0x00000008 e1000_hw.h 　
14821
 E1000_GCR_TXDSCW_NO_SNOOPE1000_GCR_TXDSCW_NO_SNOOP 0x00000010 e1000_hw.h 　
14822
 E1000_GCR_TXDSCR_NO_SNOOPE1000_GCR_TXDSCR_NO_SNOOP 0x00000020 e1000_hw.h 　
14823
 PCI_EX_NO_SNOOP_ALLPCI_EX_NO_SNOOP_ALL (E1000_GCR_RXD_NO_SNOOP | \ E1000_GCR_RXDSCW_NO_SNOOP | \ E1000_GCR_RXDSCR_NO_SNOOP | \ E1000_GCR_TXD_NO_SNOO e1000_hw.h 　
14824
 PCI_EX_82566_SNOOP_ALLPCI_EX_82566_SNOOP_ALL PCI_EX_NO_SNOOP_ALL e1000_hw.h 　
14825
 E1000_GCR_L1_ACT_WITHOUT_L0S_RXE1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000 e1000_hw.h 　
14826
 E1000_FACTPS_FUNC0_POWER_STATE_E1000_FACTPS_FUNC0_POWER_STATE_ 0x00000003 e1000_hw.h 　
14827
 E1000_FACTPS_LAN0_VALIDE1000_FACTPS_LAN0_VALID 0x00000004 e1000_hw.h 　
14828
 E1000_FACTPS_FUNC0_AUX_ENE1000_FACTPS_FUNC0_AUX_EN 0x00000008 e1000_hw.h 　
14829
 E1000_FACTPS_FUNC1_POWER_STATE_E1000_FACTPS_FUNC1_POWER_STATE_ 0x000000C0 e1000_hw.h 　
14830
 E1000_FACTPS_FUNC1_POWER_STATE_E1000_FACTPS_FUNC1_POWER_STATE_ 6 e1000_hw.h 　
14831
 E1000_FACTPS_LAN1_VALIDE1000_FACTPS_LAN1_VALID 0x00000100 e1000_hw.h 　
14832
 E1000_FACTPS_FUNC1_AUX_ENE1000_FACTPS_FUNC1_AUX_EN 0x00000200 e1000_hw.h 　
14833
 E1000_FACTPS_FUNC2_POWER_STATE_E1000_FACTPS_FUNC2_POWER_STATE_ 0x00003000 e1000_hw.h 　
14834
 E1000_FACTPS_FUNC2_POWER_STATE_E1000_FACTPS_FUNC2_POWER_STATE_ 12 e1000_hw.h 　
14835
 E1000_FACTPS_IDE_ENABLEE1000_FACTPS_IDE_ENABLE 0x00004000 e1000_hw.h 　
14836
 E1000_FACTPS_FUNC2_AUX_ENE1000_FACTPS_FUNC2_AUX_EN 0x00008000 e1000_hw.h 　
14837
 E1000_FACTPS_FUNC3_POWER_STATE_E1000_FACTPS_FUNC3_POWER_STATE_ 0x000C0000 e1000_hw.h 　
14838
 E1000_FACTPS_FUNC3_POWER_STATE_E1000_FACTPS_FUNC3_POWER_STATE_ 18 e1000_hw.h 　
14839
 E1000_FACTPS_SP_ENABLEE1000_FACTPS_SP_ENABLE 0x00100000 e1000_hw.h 　
14840
 E1000_FACTPS_FUNC3_AUX_ENE1000_FACTPS_FUNC3_AUX_EN 0x00200000 e1000_hw.h 　
14841
 E1000_FACTPS_FUNC4_POWER_STATE_E1000_FACTPS_FUNC4_POWER_STATE_ 0x03000000 e1000_hw.h 　
14842
 E1000_FACTPS_FUNC4_POWER_STATE_E1000_FACTPS_FUNC4_POWER_STATE_ 24 e1000_hw.h 　
14843
 E1000_FACTPS_IPMI_ENABLEE1000_FACTPS_IPMI_ENABLE 0x04000000 e1000_hw.h 　
14844
 E1000_FACTPS_FUNC4_AUX_ENE1000_FACTPS_FUNC4_AUX_EN 0x08000000 e1000_hw.h 　
14845
 E1000_FACTPS_MNGCGE1000_FACTPS_MNGCG 0x20000000 e1000_hw.h 　
14846
 E1000_FACTPS_LAN_FUNC_SELE1000_FACTPS_LAN_FUNC_SEL 0x40000000 e1000_hw.h 　
14847
 E1000_FACTPS_PM_STATE_CHANGEDE1000_FACTPS_PM_STATE_CHANGED 0x80000000 e1000_hw.h 　
14848
 PCI_EX_LINK_STATUSPCI_EX_LINK_STATUS 0x12 e1000_hw.h 　
14849
 PCI_EX_LINK_WIDTH_MASKPCI_EX_LINK_WIDTH_MASK 0x3F0 e1000_hw.h 　
14850
 PCI_EX_LINK_WIDTH_SHIFTPCI_EX_LINK_WIDTH_SHIFT 4 e1000_hw.h 　
14851
 EEPROM_READ_OPCODE_MICROWIREEEPROM_READ_OPCODE_MICROWIRE 0x6 e1000_hw.h EEPROM read opcode
14852
 EEPROM_WRITE_OPCODE_MICROWIREEEPROM_WRITE_OPCODE_MICROWIRE 0x5 e1000_hw.h EEPROM write opcode
14853
 EEPROM_ERASE_OPCODE_MICROWIREEEPROM_ERASE_OPCODE_MICROWIRE 0x7 e1000_hw.h EEPROM erase opcode
14854
 EEPROM_EWEN_OPCODE_MICROWIREEEPROM_EWEN_OPCODE_MICROWIRE 0x13 e1000_hw.h EEPROM erase/write enable
14855
 EEPROM_EWDS_OPCODE_MICROWIREEEPROM_EWDS_OPCODE_MICROWIRE 0x10 e1000_hw.h EEPROM erast/write disable
14856
 EEPROM_MAX_RETRY_SPIEEPROM_MAX_RETRY_SPI 5000 e1000_hw.h Max wait of 5ms, for RDY signal
14857
 EEPROM_READ_OPCODE_SPIEEPROM_READ_OPCODE_SPI 0x03 e1000_hw.h EEPROM read opcode
14858
 EEPROM_WRITE_OPCODE_SPIEEPROM_WRITE_OPCODE_SPI 0x02 e1000_hw.h EEPROM write opcode
14859
 EEPROM_A8_OPCODE_SPIEEPROM_A8_OPCODE_SPI 0x08 e1000_hw.h opcode bit-3 = address bit-8
14860
 EEPROM_WREN_OPCODE_SPIEEPROM_WREN_OPCODE_SPI 0x06 e1000_hw.h EEPROM set Write Enable latch
14861
 EEPROM_WRDI_OPCODE_SPIEEPROM_WRDI_OPCODE_SPI 0x04 e1000_hw.h EEPROM reset Write Enable latch
14862
 EEPROM_RDSR_OPCODE_SPIEEPROM_RDSR_OPCODE_SPI 0x05 e1000_hw.h EEPROM read Status register
14863
 EEPROM_WRSR_OPCODE_SPIEEPROM_WRSR_OPCODE_SPI 0x01 e1000_hw.h EEPROM write Status register
14864
 EEPROM_ERASE4K_OPCODE_SPIEEPROM_ERASE4K_OPCODE_SPI 0x20 e1000_hw.h EEPROM ERASE 4KB
14865
 EEPROM_ERASE64K_OPCODE_SPIEEPROM_ERASE64K_OPCODE_SPI 0xD8 e1000_hw.h EEPROM ERASE 64KB
14866
 EEPROM_ERASE256_OPCODE_SPIEEPROM_ERASE256_OPCODE_SPI 0xDB e1000_hw.h EEPROM ERASE 256B
14867
 EEPROM_WORD_SIZE_SHIFTEEPROM_WORD_SIZE_SHIFT 6 e1000_hw.h 　
14868
 EEPROM_SIZE_SHIFTEEPROM_SIZE_SHIFT 10 e1000_hw.h 　
14869
 EEPROM_SIZE_MASKEEPROM_SIZE_MASK 0x1C00 e1000_hw.h 　
14870
 EEPROM_COMPATEEPROM_COMPAT 0x0003 e1000_hw.h 　
14871
 EEPROM_ID_LED_SETTINGSEEPROM_ID_LED_SETTINGS 0x0004 e1000_hw.h 　
14872
 EEPROM_VERSIONEEPROM_VERSION 0x0005 e1000_hw.h 　
14873
 EEPROM_SERDES_AMPLITUDEEEPROM_SERDES_AMPLITUDE 0x0006 e1000_hw.h For SERDES output amplitude adjustment.
14874
 EEPROM_PHY_CLASS_WORDEEPROM_PHY_CLASS_WORD 0x0007 e1000_hw.h 　
14875
 EEPROM_INIT_CONTROL1_REGEEPROM_INIT_CONTROL1_REG 0x000A e1000_hw.h 　
14876
 EEPROM_INIT_CONTROL2_REGEEPROM_INIT_CONTROL2_REG 0x000F e1000_hw.h 　
14877
 EEPROM_SWDEF_PINS_CTRL_PORT_1EEPROM_SWDEF_PINS_CTRL_PORT_1 0x0010 e1000_hw.h 　
14878
 EEPROM_INIT_CONTROL3_PORT_BEEPROM_INIT_CONTROL3_PORT_B 0x0014 e1000_hw.h 　
14879
 EEPROM_INIT_3GIO_3EEPROM_INIT_3GIO_3 0x001A e1000_hw.h 　
14880
 EEPROM_SWDEF_PINS_CTRL_PORT_0EEPROM_SWDEF_PINS_CTRL_PORT_0 0x0020 e1000_hw.h 　
14881
 EEPROM_INIT_CONTROL3_PORT_AEEPROM_INIT_CONTROL3_PORT_A 0x0024 e1000_hw.h 　
14882
 EEPROM_CFGEEPROM_CFG 0x0012 e1000_hw.h 　
14883
 EEPROM_FLASH_VERSIONEEPROM_FLASH_VERSION 0x0032 e1000_hw.h 　
14884
 EEPROM_CHECKSUM_REGEEPROM_CHECKSUM_REG 0x003F e1000_hw.h 　
14885
 E1000_EEPROM_CFG_DONEE1000_EEPROM_CFG_DONE 0x00040000 e1000_hw.h MNG config cycle done
14886
 E1000_EEPROM_CFG_DONE_PORT_1E1000_EEPROM_CFG_DONE_PORT_1 0x00080000 e1000_hw.h ...for second port
14887
 ID_LED_RESERVED_0000ID_LED_RESERVED_0000 0x0000 e1000_hw.h 　
14888
 ID_LED_RESERVED_FFFFID_LED_RESERVED_FFFF 0xFFFF e1000_hw.h 　
14889
 ID_LED_RESERVED_82573ID_LED_RESERVED_82573 0xF746 e1000_hw.h 　
14890
 ID_LED_DEFAULT_82573ID_LED_DEFAULT_82573 0x1811 e1000_hw.h 　
14891
 ID_LED_DEFAULTID_LED_DEFAULT ((ID_LED_OFF1_ON2 << 12) | \ (ID_LED_OFF1_OFF2 << 8) | \ (ID_LED_DEF1_DEF2 << 4) | \ (ID_LED_DEF1_DEF2)) e1000_hw.h 　
14892
 ID_LED_DEFAULT_ICH8LANID_LED_DEFAULT_ICH8LAN ((ID_LED_DEF1_DEF2 << 12) | \ (ID_LED_DEF1_OFF2 << 8) | \ (ID_LED_DEF1_ON2 << 4) | \ (ID_LED_DEF1_DEF2)) e1000_hw.h 　
14893
 ID_LED_DEF1_DEF2ID_LED_DEF1_DEF2 0x1 e1000_hw.h 　
14894
 ID_LED_DEF1_ON2ID_LED_DEF1_ON2 0x2 e1000_hw.h 　
14895
 ID_LED_DEF1_OFF2ID_LED_DEF1_OFF2 0x3 e1000_hw.h 　
14896
 ID_LED_ON1_DEF2ID_LED_ON1_DEF2 0x4 e1000_hw.h 　
14897
 ID_LED_ON1_ON2ID_LED_ON1_ON2 0x5 e1000_hw.h 　
14898
 ID_LED_ON1_OFF2ID_LED_ON1_OFF2 0x6 e1000_hw.h 　
14899
 ID_LED_OFF1_DEF2ID_LED_OFF1_DEF2 0x7 e1000_hw.h 　
14900
 ID_LED_OFF1_ON2ID_LED_OFF1_ON2 0x8 e1000_hw.h 　
14901
 ID_LED_OFF1_OFF2ID_LED_OFF1_OFF2 0x9 e1000_hw.h 　
14902
 IGP_ACTIVITY_LED_MASKIGP_ACTIVITY_LED_MASK 0xFFFFF0FF e1000_hw.h 　
14903
 IGP_ACTIVITY_LED_ENABLEIGP_ACTIVITY_LED_ENABLE 0x0300 e1000_hw.h 　
14904
 IGP_LED3_MODEIGP_LED3_MODE 0x07000000 e1000_hw.h 　
14905
 EEPROM_SERDES_AMPLITUDE_MASKEEPROM_SERDES_AMPLITUDE_MASK 0x000F e1000_hw.h 　
14906
 EEPROM_PHY_CLASS_AEEPROM_PHY_CLASS_A 0x8000 e1000_hw.h 　
14907
 EEPROM_WORD0A_ILOSEEPROM_WORD0A_ILOS 0x0010 e1000_hw.h 　
14908
 EEPROM_WORD0A_SWDPIOEEPROM_WORD0A_SWDPIO 0x01E0 e1000_hw.h 　
14909
 EEPROM_WORD0A_LRSTEEPROM_WORD0A_LRST 0x0200 e1000_hw.h 　
14910
 EEPROM_WORD0A_FDEEPROM_WORD0A_FD 0x0400 e1000_hw.h 　
14911
 EEPROM_WORD0A_66MHZEEPROM_WORD0A_66MHZ 0x0800 e1000_hw.h 　
14912
 EEPROM_WORD0F_PAUSE_MASKEEPROM_WORD0F_PAUSE_MASK 0x3000 e1000_hw.h 　
14913
 EEPROM_WORD0F_PAUSEEEPROM_WORD0F_PAUSE 0x1000 e1000_hw.h 　
14914
 EEPROM_WORD0F_ASM_DIREEPROM_WORD0F_ASM_DIR 0x2000 e1000_hw.h 　
14915
 EEPROM_WORD0F_ANEEEPROM_WORD0F_ANE 0x0800 e1000_hw.h 　
14916
 EEPROM_WORD0F_SWPDIO_EXTEEPROM_WORD0F_SWPDIO_EXT 0x00F0 e1000_hw.h 　
14917
 EEPROM_WORD0F_LPLUEEPROM_WORD0F_LPLU 0x0001 e1000_hw.h 　
14918
 EEPROM_WORD1020_GIGA_DISABLEEEPROM_WORD1020_GIGA_DISABLE 0x0010 e1000_hw.h 　
14919
 EEPROM_WORD1020_GIGA_DISABLE_NOEEPROM_WORD1020_GIGA_DISABLE_NO 0x0008 e1000_hw.h 　
14920
 EEPROM_WORD1A_ASPM_MASKEEPROM_WORD1A_ASPM_MASK 0x000C e1000_hw.h 　
14921
 EEPROM_SUMEEPROM_SUM 0xBABA e1000_hw.h 　
14922
 EEPROM_NODE_ADDRESS_BYTE_0EEPROM_NODE_ADDRESS_BYTE_0 0 e1000_hw.h 　
14923
 EEPROM_PBA_BYTE_1EEPROM_PBA_BYTE_1 8 e1000_hw.h 　
14924
 EEPROM_RESERVED_WORDEEPROM_RESERVED_WORD 0xFFFF e1000_hw.h 　
14925
 PBA_SIZEPBA_SIZE 4 e1000_hw.h 　
14926
 E1000_COLLISION_THRESHOLDE1000_COLLISION_THRESHOLD 15 e1000_hw.h 　
14927
 E1000_CT_SHIFTE1000_CT_SHIFT 4 e1000_hw.h 　
14928
 E1000_COLLISION_DISTANCEE1000_COLLISION_DISTANCE 63 e1000_hw.h 　
14929
 E1000_COLLISION_DISTANCE_82542E1000_COLLISION_DISTANCE_82542 64 e1000_hw.h 　
14930
 E1000_FDX_COLLISION_DISTANCEE1000_FDX_COLLISION_DISTANCE E1000_COLLISION_DISTANCE e1000_hw.h 　
14931
 E1000_HDX_COLLISION_DISTANCEE1000_HDX_COLLISION_DISTANCE E1000_COLLISION_DISTANCE e1000_hw.h 　
14932
 E1000_COLD_SHIFTE1000_COLD_SHIFT 12 e1000_hw.h 　
14933
 REQ_TX_DESCRIPTOR_MULTIPLEREQ_TX_DESCRIPTOR_MULTIPLE 8 e1000_hw.h 　
14934
 REQ_RX_DESCRIPTOR_MULTIPLEREQ_RX_DESCRIPTOR_MULTIPLE 8 e1000_hw.h 　
14935
 DEFAULT_82542_TIPG_IPGTDEFAULT_82542_TIPG_IPGT 10 e1000_hw.h 　
14936
 DEFAULT_82543_TIPG_IPGT_FIBERDEFAULT_82543_TIPG_IPGT_FIBER 9 e1000_hw.h 　
14937
 DEFAULT_82543_TIPG_IPGT_COPPERDEFAULT_82543_TIPG_IPGT_COPPER 8 e1000_hw.h 　
14938
 E1000_TIPG_IPGT_MASKE1000_TIPG_IPGT_MASK 0x000003FF e1000_hw.h 　
14939
 E1000_TIPG_IPGR1_MASKE1000_TIPG_IPGR1_MASK 0x000FFC00 e1000_hw.h 　
14940
 E1000_TIPG_IPGR2_MASKE1000_TIPG_IPGR2_MASK 0x3FF00000 e1000_hw.h 　
14941
 DEFAULT_82542_TIPG_IPGR1DEFAULT_82542_TIPG_IPGR1 2 e1000_hw.h 　
14942
 DEFAULT_82543_TIPG_IPGR1DEFAULT_82543_TIPG_IPGR1 8 e1000_hw.h 　
14943
 E1000_TIPG_IPGR1_SHIFTE1000_TIPG_IPGR1_SHIFT 10 e1000_hw.h 　
14944
 DEFAULT_82542_TIPG_IPGR2DEFAULT_82542_TIPG_IPGR2 10 e1000_hw.h 　
14945
 DEFAULT_82543_TIPG_IPGR2DEFAULT_82543_TIPG_IPGR2 6 e1000_hw.h 　
14946
 DEFAULT_80003ES2LAN_TIPG_IPGR2DEFAULT_80003ES2LAN_TIPG_IPGR2 7 e1000_hw.h 　
14947
 E1000_TIPG_IPGR2_SHIFTE1000_TIPG_IPGR2_SHIFT 20 e1000_hw.h 　
14948
 DEFAULT_80003ES2LAN_TIPG_IPGT_1DEFAULT_80003ES2LAN_TIPG_IPGT_1 0x00000009 e1000_hw.h 　
14949
 DEFAULT_80003ES2LAN_TIPG_IPGT_1DEFAULT_80003ES2LAN_TIPG_IPGT_1 0x00000008 e1000_hw.h 　
14950
 E1000_TXDMAC_DPPE1000_TXDMAC_DPP 0x00000001 e1000_hw.h 　
14951
 TX_THRESHOLD_STARTTX_THRESHOLD_START 8 e1000_hw.h 　
14952
 TX_THRESHOLD_INCREMENTTX_THRESHOLD_INCREMENT 10 e1000_hw.h 　
14953
 TX_THRESHOLD_DECREMENTTX_THRESHOLD_DECREMENT 1 e1000_hw.h 　
14954
 TX_THRESHOLD_STOPTX_THRESHOLD_STOP 190 e1000_hw.h 　
14955
 TX_THRESHOLD_DISABLETX_THRESHOLD_DISABLE 0 e1000_hw.h 　
14956
 TX_THRESHOLD_TIMER_MSTX_THRESHOLD_TIMER_MS 10000 e1000_hw.h 　
14957
 MIN_NUM_XMITSMIN_NUM_XMITS 1000 e1000_hw.h 　
14958
 IFS_MAXIFS_MAX 80 e1000_hw.h 　
14959
 IFS_STEPIFS_STEP 10 e1000_hw.h 　
14960
 IFS_MINIFS_MIN 40 e1000_hw.h 　
14961
 IFS_RATIOIFS_RATIO 4 e1000_hw.h 　
14962
 E1000_EXTCNF_CTRL_PCIE_WRITE_ENE1000_EXTCNF_CTRL_PCIE_WRITE_EN 0x00000001 e1000_hw.h 　
14963
 E1000_EXTCNF_CTRL_PHY_WRITE_ENAE1000_EXTCNF_CTRL_PHY_WRITE_ENA 0x00000002 e1000_hw.h 　
14964
 E1000_EXTCNF_CTRL_D_UD_ENABLEE1000_EXTCNF_CTRL_D_UD_ENABLE 0x00000004 e1000_hw.h 　
14965
 E1000_EXTCNF_CTRL_D_UD_LATENCYE1000_EXTCNF_CTRL_D_UD_LATENCY 0x00000008 e1000_hw.h 　
14966
 E1000_EXTCNF_CTRL_D_UD_OWNERE1000_EXTCNF_CTRL_D_UD_OWNER 0x00000010 e1000_hw.h 　
14967
 E1000_EXTCNF_CTRL_MDIO_SW_OWNERE1000_EXTCNF_CTRL_MDIO_SW_OWNER 0x00000020 e1000_hw.h 　
14968
 E1000_EXTCNF_CTRL_MDIO_HW_OWNERE1000_EXTCNF_CTRL_MDIO_HW_OWNER 0x00000040 e1000_hw.h 　
14969
 E1000_EXTCNF_CTRL_EXT_CNF_POINTE1000_EXTCNF_CTRL_EXT_CNF_POINT 0x0FFF0000 e1000_hw.h 　
14970
 E1000_EXTCNF_SIZE_EXT_PHY_LENGTE1000_EXTCNF_SIZE_EXT_PHY_LENGT 0x000000FF e1000_hw.h 　
14971
 E1000_EXTCNF_SIZE_EXT_DOCK_LENGE1000_EXTCNF_SIZE_EXT_DOCK_LENG 0x0000FF00 e1000_hw.h 　
14972
 E1000_EXTCNF_SIZE_EXT_PCIE_LENGE1000_EXTCNF_SIZE_EXT_PCIE_LENG 0x00FF0000 e1000_hw.h 　
14973
 E1000_EXTCNF_CTRL_LCD_WRITE_ENAE1000_EXTCNF_CTRL_LCD_WRITE_ENA 0x00000001 e1000_hw.h 　
14974
 E1000_EXTCNF_CTRL_SWFLAGE1000_EXTCNF_CTRL_SWFLAG 0x00000020 e1000_hw.h 　
14975
 E1000_PBA_8KE1000_PBA_8K 0x0008 e1000_hw.h 8KB, default Rx allocation
14976
 E1000_PBA_12KE1000_PBA_12K 0x000C e1000_hw.h 12KB, default Rx allocation
14977
 E1000_PBA_16KE1000_PBA_16K 0x0010 e1000_hw.h 16KB, default TX allocation
14978
 E1000_PBA_20KE1000_PBA_20K 0x0014 e1000_hw.h 　
14979
 E1000_PBA_22KE1000_PBA_22K 0x0016 e1000_hw.h 　
14980
 E1000_PBA_24KE1000_PBA_24K 0x0018 e1000_hw.h 　
14981
 E1000_PBA_30KE1000_PBA_30K 0x001E e1000_hw.h 　
14982
 E1000_PBA_32KE1000_PBA_32K 0x0020 e1000_hw.h 　
14983
 E1000_PBA_34KE1000_PBA_34K 0x0022 e1000_hw.h 　
14984
 E1000_PBA_38KE1000_PBA_38K 0x0026 e1000_hw.h 　
14985
 E1000_PBA_40KE1000_PBA_40K 0x0028 e1000_hw.h 　
14986
 E1000_PBA_48KE1000_PBA_48K 0x0030 e1000_hw.h 48KB, default RX allocation
14987
 E1000_PBA_64KE1000_PBA_64K 0x0040 e1000_hw.h 64KB
14988
 E1000_PBS_16KE1000_PBS_16K E1000_PBA_16K e1000_hw.h 　
14989
 FLOW_CONTROL_ADDRESS_LOWFLOW_CONTROL_ADDRESS_LOW 0x00C28001 e1000_hw.h 　
14990
 FLOW_CONTROL_ADDRESS_HIGHFLOW_CONTROL_ADDRESS_HIGH 0x00000100 e1000_hw.h 　
14991
 FLOW_CONTROL_TYPEFLOW_CONTROL_TYPE 0x8808 e1000_hw.h 　
14992
 FC_DEFAULT_HI_THRESHFC_DEFAULT_HI_THRESH (0x8000) e1000_hw.h 32KB
14993
 FC_DEFAULT_LO_THRESHFC_DEFAULT_LO_THRESH (0x4000) e1000_hw.h 16KB
14994
 FC_DEFAULT_TX_TIMERFC_DEFAULT_TX_TIMER (0x100) e1000_hw.h ~130 us
14995
 PCIX_COMMAND_REGISTERPCIX_COMMAND_REGISTER 0xE6 e1000_hw.h 　
14996
 PCIX_STATUS_REGISTER_LOPCIX_STATUS_REGISTER_LO 0xE8 e1000_hw.h 　
14997
 PCIX_STATUS_REGISTER_HIPCIX_STATUS_REGISTER_HI 0xEA e1000_hw.h 　
14998
 PCIX_COMMAND_MMRBC_MASKPCIX_COMMAND_MMRBC_MASK 0x000C e1000_hw.h 　
14999
 PCIX_COMMAND_MMRBC_SHIFTPCIX_COMMAND_MMRBC_SHIFT 0x2 e1000_hw.h 　
15000
 PCIX_STATUS_HI_MMRBC_MASKPCIX_STATUS_HI_MMRBC_MASK 0x0060 e1000_hw.h 　
15001
 PCIX_STATUS_HI_MMRBC_SHIFTPCIX_STATUS_HI_MMRBC_SHIFT 0x5 e1000_hw.h 　
15002
 PCIX_STATUS_HI_MMRBC_4KPCIX_STATUS_HI_MMRBC_4K 0x3 e1000_hw.h 　
15003
 PCIX_STATUS_HI_MMRBC_2KPCIX_STATUS_HI_MMRBC_2K 0x2 e1000_hw.h 　
15004
 PAUSE_SHIFTPAUSE_SHIFT 5 e1000_hw.h 　
15005
 SWDPIO_SHIFTSWDPIO_SHIFT 17 e1000_hw.h 　
15006
 SWDPIO__EXT_SHIFTSWDPIO__EXT_SHIFT 4 e1000_hw.h 　
15007
 ILOS_SHIFTILOS_SHIFT 3 e1000_hw.h 　
15008
 RECEIVE_BUFFER_ALIGN_SIZERECEIVE_BUFFER_ALIGN_SIZE (256) e1000_hw.h 　
15009
 LINK_UP_TIMEOUTLINK_UP_TIMEOUT 500 e1000_hw.h 　
15010
 MASTER_DISABLE_TIMEOUTMASTER_DISABLE_TIMEOUT 800 e1000_hw.h 　
15011
 AUTO_READ_DONE_TIMEOUTAUTO_READ_DONE_TIMEOUT 10 e1000_hw.h 　
15012
 PHY_CFG_TIMEOUTPHY_CFG_TIMEOUT 100 e1000_hw.h 　
15013
 E1000_TX_BUFFER_SIZEE1000_TX_BUFFER_SIZE ((uint32_t)1514) e1000_hw.h 　
15014
 CARRIER_EXTENSIONCARRIER_EXTENSION 0x0F e1000_hw.h 　
15015
 E1000_CTRL_PHY_RESET_DIRE1000_CTRL_PHY_RESET_DIR E1000_CTRL_SWDPIO0 e1000_hw.h 　
15016
 E1000_CTRL_PHY_RESETE1000_CTRL_PHY_RESET E1000_CTRL_SWDPIN0 e1000_hw.h 　
15017
 E1000_CTRL_MDIO_DIRE1000_CTRL_MDIO_DIR E1000_CTRL_SWDPIO2 e1000_hw.h 　
15018
 E1000_CTRL_MDIOE1000_CTRL_MDIO E1000_CTRL_SWDPIN2 e1000_hw.h 　
15019
 E1000_CTRL_MDC_DIRE1000_CTRL_MDC_DIR E1000_CTRL_SWDPIO3 e1000_hw.h 　
15020
 E1000_CTRL_MDCE1000_CTRL_MDC E1000_CTRL_SWDPIN3 e1000_hw.h 　
15021
 E1000_CTRL_PHY_RESET_DIR4E1000_CTRL_PHY_RESET_DIR4 E1000_CTRL_EXT_SDP4_DIR e1000_hw.h 　
15022
 E1000_CTRL_PHY_RESET4E1000_CTRL_PHY_RESET4 E1000_CTRL_EXT_SDP4_DATA e1000_hw.h 　
15023
 PHY_CTRLPHY_CTRL 0x00 e1000_hw.h Control Register
15024
 PHY_STATUSPHY_STATUS 0x01 e1000_hw.h Status Regiser
15025
 PHY_ID1PHY_ID1 0x02 e1000_hw.h Phy Id Reg (word 1)
15026
 PHY_ID2PHY_ID2 0x03 e1000_hw.h Phy Id Reg (word 2)
15027
 PHY_AUTONEG_ADVPHY_AUTONEG_ADV 0x04 e1000_hw.h Autoneg Advertisement
15028
 PHY_LP_ABILITYPHY_LP_ABILITY 0x05 e1000_hw.h Link Partner Ability (Base Page)
15029
 PHY_AUTONEG_EXPPHY_AUTONEG_EXP 0x06 e1000_hw.h Autoneg Expansion Reg
15030
 PHY_NEXT_PAGE_TXPHY_NEXT_PAGE_TX 0x07 e1000_hw.h Next Page TX
15031
 PHY_LP_NEXT_PAGEPHY_LP_NEXT_PAGE 0x08 e1000_hw.h Link Partner Next Page
15032
 PHY_1000T_CTRLPHY_1000T_CTRL 0x09 e1000_hw.h 1000Base-T Control Reg
15033
 PHY_1000T_STATUSPHY_1000T_STATUS 0x0A e1000_hw.h 1000Base-T Status Reg
15034
 PHY_EXT_STATUSPHY_EXT_STATUS 0x0F e1000_hw.h Extended Status Reg
15035
 MAX_PHY_REG_ADDRESSMAX_PHY_REG_ADDRESS 0x1F e1000_hw.h 5 bit address bus (0-0x1F)
15036
 MAX_PHY_MULTI_PAGE_REGMAX_PHY_MULTI_PAGE_REG 0xF e1000_hw.h Registers equal on all pages
15037
 M88E1000_PHY_SPEC_CTRLM88E1000_PHY_SPEC_CTRL 0x10 e1000_hw.h PHY Specific Control Register
15038
 M88E1000_PHY_SPEC_STATUSM88E1000_PHY_SPEC_STATUS 0x11 e1000_hw.h PHY Specific Status Register
15039
 M88E1000_INT_ENABLEM88E1000_INT_ENABLE 0x12 e1000_hw.h Interrupt Enable Register
15040
 M88E1000_INT_STATUSM88E1000_INT_STATUS 0x13 e1000_hw.h Interrupt Status Register
15041
 M88E1000_EXT_PHY_SPEC_CTRLM88E1000_EXT_PHY_SPEC_CTRL 0x14 e1000_hw.h Extended PHY Specific Control
15042
 M88E1000_RX_ERR_CNTRM88E1000_RX_ERR_CNTR 0x15 e1000_hw.h Receive Error Counter
15043
 M88E1000_PHY_EXT_CTRLM88E1000_PHY_EXT_CTRL 0x1A e1000_hw.h PHY extend control register
15044
 M88E1000_PHY_PAGE_SELECTM88E1000_PHY_PAGE_SELECT 0x1D e1000_hw.h Reg 29 for page number setting
15045
 M88E1000_PHY_GEN_CONTROLM88E1000_PHY_GEN_CONTROL 0x1E e1000_hw.h Its meaning depends on reg 29
15046
 M88E1000_PHY_VCO_REG_BIT8M88E1000_PHY_VCO_REG_BIT8 0x100 e1000_hw.h Bits 8 & 11 are adjusted for
15047
 M88E1000_PHY_VCO_REG_BIT11M88E1000_PHY_VCO_REG_BIT11 0x800 e1000_hw.h improved BER performance
15048
 IGP01E1000_IEEE_REGS_PAGEIGP01E1000_IEEE_REGS_PAGE 0x0000 e1000_hw.h 　
15049
 IGP01E1000_IEEE_RESTART_AUTONEGIGP01E1000_IEEE_RESTART_AUTONEG 0x3300 e1000_hw.h 　
15050
 IGP01E1000_IEEE_FORCE_GIGAIGP01E1000_IEEE_FORCE_GIGA 0x0140 e1000_hw.h 　
15051
 IGP01E1000_PHY_PORT_CONFIGIGP01E1000_PHY_PORT_CONFIG 0x10 e1000_hw.h PHY Specific Port Config Register
15052
 IGP01E1000_PHY_PORT_STATUSIGP01E1000_PHY_PORT_STATUS 0x11 e1000_hw.h PHY Specific Status Register
15053
 IGP01E1000_PHY_PORT_CTRLIGP01E1000_PHY_PORT_CTRL 0x12 e1000_hw.h PHY Specific Control Register
15054
 IGP01E1000_PHY_LINK_HEALTHIGP01E1000_PHY_LINK_HEALTH 0x13 e1000_hw.h PHY Link Health Register
15055
 IGP01E1000_GMII_FIFOIGP01E1000_GMII_FIFO 0x14 e1000_hw.h GMII FIFO Register
15056
 IGP01E1000_PHY_CHANNEL_QUALITYIGP01E1000_PHY_CHANNEL_QUALITY 0x15 e1000_hw.h PHY Channel Quality Register
15057
 IGP02E1000_PHY_POWER_MGMTIGP02E1000_PHY_POWER_MGMT 0x19 e1000_hw.h 　
15058
 IGP01E1000_PHY_PAGE_SELECTIGP01E1000_PHY_PAGE_SELECT 0x1F e1000_hw.h PHY Page Select Core Register
15059
 IGP01E1000_PHY_AGC_AIGP01E1000_PHY_AGC_A 0x1172 e1000_hw.h 　
15060
 IGP01E1000_PHY_AGC_BIGP01E1000_PHY_AGC_B 0x1272 e1000_hw.h 　
15061
 IGP01E1000_PHY_AGC_CIGP01E1000_PHY_AGC_C 0x1472 e1000_hw.h 　
15062
 IGP01E1000_PHY_AGC_DIGP01E1000_PHY_AGC_D 0x1872 e1000_hw.h 　
15063
 IGP02E1000_PHY_AGC_AIGP02E1000_PHY_AGC_A 0x11B1 e1000_hw.h 　
15064
 IGP02E1000_PHY_AGC_BIGP02E1000_PHY_AGC_B 0x12B1 e1000_hw.h 　
15065
 IGP02E1000_PHY_AGC_CIGP02E1000_PHY_AGC_C 0x14B1 e1000_hw.h 　
15066
 IGP02E1000_PHY_AGC_DIGP02E1000_PHY_AGC_D 0x18B1 e1000_hw.h 　
15067
 IGP01E1000_PHY_DSP_RESETIGP01E1000_PHY_DSP_RESET 0x1F33 e1000_hw.h 　
15068
 IGP01E1000_PHY_DSP_SETIGP01E1000_PHY_DSP_SET 0x1F71 e1000_hw.h 　
15069
 IGP01E1000_PHY_DSP_FFEIGP01E1000_PHY_DSP_FFE 0x1F35 e1000_hw.h 　
15070
 IGP01E1000_PHY_CHANNEL_NUMIGP01E1000_PHY_CHANNEL_NUM 4 e1000_hw.h 　
15071
 IGP02E1000_PHY_CHANNEL_NUMIGP02E1000_PHY_CHANNEL_NUM 4 e1000_hw.h 　
15072
 IGP01E1000_PHY_AGC_PARAM_AIGP01E1000_PHY_AGC_PARAM_A 0x1171 e1000_hw.h 　
15073
 IGP01E1000_PHY_AGC_PARAM_BIGP01E1000_PHY_AGC_PARAM_B 0x1271 e1000_hw.h 　
15074
 IGP01E1000_PHY_AGC_PARAM_CIGP01E1000_PHY_AGC_PARAM_C 0x1471 e1000_hw.h 　
15075
 IGP01E1000_PHY_AGC_PARAM_DIGP01E1000_PHY_AGC_PARAM_D 0x1871 e1000_hw.h 　
15076
 IGP01E1000_PHY_EDAC_MU_INDEXIGP01E1000_PHY_EDAC_MU_INDEX 0xC000 e1000_hw.h 　
15077
 IGP01E1000_PHY_EDAC_SIGN_EXT_9_IGP01E1000_PHY_EDAC_SIGN_EXT_9_ 0x8000 e1000_hw.h 　
15078
 IGP01E1000_PHY_ANALOG_TX_STATEIGP01E1000_PHY_ANALOG_TX_STATE 0x2890 e1000_hw.h 　
15079
 IGP01E1000_PHY_ANALOG_CLASS_AIGP01E1000_PHY_ANALOG_CLASS_A 0x2000 e1000_hw.h 　
15080
 IGP01E1000_PHY_FORCE_ANALOG_ENAIGP01E1000_PHY_FORCE_ANALOG_ENA 0x0004 e1000_hw.h 　
15081
 IGP01E1000_PHY_DSP_FFE_CM_CPIGP01E1000_PHY_DSP_FFE_CM_CP 0x0069 e1000_hw.h 　
15082
 IGP01E1000_PHY_DSP_FFE_DEFAULTIGP01E1000_PHY_DSP_FFE_DEFAULT 0x002A e1000_hw.h 　
15083
 IGP01E1000_PHY_PCS_INIT_REGIGP01E1000_PHY_PCS_INIT_REG 0x00B4 e1000_hw.h 　
15084
 IGP01E1000_PHY_PCS_CTRL_REGIGP01E1000_PHY_PCS_CTRL_REG 0x00B5 e1000_hw.h 　
15085
 IGP01E1000_ANALOG_REGS_PAGEIGP01E1000_ANALOG_REGS_PAGE 0x20C0 e1000_hw.h 　
15086
 GG82563_PAGE_SHIFTGG82563_PAGE_SHIFT 5 e1000_hw.h 　
15087
 GG82563_MIN_ALT_REGGG82563_MIN_ALT_REG 30 e1000_hw.h 　
15088
 GG82563_PHY_SPEC_CTRLGG82563_PHY_SPEC_CTRL GG82563_REG(0, 16) e1000_hw.h PHY Specific Control
15089
 GG82563_PHY_SPEC_STATUSGG82563_PHY_SPEC_STATUS GG82563_REG(0, 17) e1000_hw.h PHY Specific Status
15090
 GG82563_PHY_INT_ENABLEGG82563_PHY_INT_ENABLE GG82563_REG(0, 18) e1000_hw.h Interrupt Enable
15091
 GG82563_PHY_SPEC_STATUS_2GG82563_PHY_SPEC_STATUS_2 GG82563_REG(0, 19) e1000_hw.h PHY Specific Status 2
15092
 GG82563_PHY_RX_ERR_CNTRGG82563_PHY_RX_ERR_CNTR GG82563_REG(0, 21) e1000_hw.h Receive Error Counter
15093
 GG82563_PHY_PAGE_SELECTGG82563_PHY_PAGE_SELECT GG82563_REG(0, 22) e1000_hw.h Page Select
15094
 GG82563_PHY_SPEC_CTRL_2GG82563_PHY_SPEC_CTRL_2 GG82563_REG(0, 26) e1000_hw.h PHY Specific Control 2
15095
 GG82563_PHY_PAGE_SELECT_ALTGG82563_PHY_PAGE_SELECT_ALT GG82563_REG(0, 29) e1000_hw.h Alternate Page Select
15096
 GG82563_PHY_TEST_CLK_CTRLGG82563_PHY_TEST_CLK_CTRL GG82563_REG(0, 30) e1000_hw.h Test Clock Control (use reg. 29 to select)
15097
 GG82563_PHY_MAC_SPEC_CTRLGG82563_PHY_MAC_SPEC_CTRL GG82563_REG(2, 21) e1000_hw.h MAC Specific Control Register
15098
 GG82563_PHY_MAC_SPEC_CTRL_2GG82563_PHY_MAC_SPEC_CTRL_2 GG82563_REG(2, 26) e1000_hw.h MAC Specific Control 2
15099
 GG82563_PHY_DSP_DISTANCEGG82563_PHY_DSP_DISTANCE GG82563_REG(5, 26) e1000_hw.h DSP Distance
15100
 GG82563_PHY_KMRN_MODE_CTRLGG82563_PHY_KMRN_MODE_CTRL GG82563_REG(193, 16) e1000_hw.h Kumeran Mode Control
15101
 GG82563_PHY_PORT_RESETGG82563_PHY_PORT_RESET GG82563_REG(193, 17) e1000_hw.h Port Reset
15102
 GG82563_PHY_REVISION_IDGG82563_PHY_REVISION_ID GG82563_REG(193, 18) e1000_hw.h Revision ID
15103
 GG82563_PHY_DEVICE_IDGG82563_PHY_DEVICE_ID GG82563_REG(193, 19) e1000_hw.h Device ID
15104
 GG82563_PHY_PWR_MGMT_CTRLGG82563_PHY_PWR_MGMT_CTRL GG82563_REG(193, 20) e1000_hw.h Power Management Control
15105
 GG82563_PHY_RATE_ADAPT_CTRLGG82563_PHY_RATE_ADAPT_CTRL GG82563_REG(193, 25) e1000_hw.h Rate Adaptation Control
15106
 GG82563_PHY_KMRN_FIFO_CTRL_STATGG82563_PHY_KMRN_FIFO_CTRL_STAT GG82563_REG(194, 16) e1000_hw.h FIFO's Control/Status
15107
 GG82563_PHY_KMRN_CTRLGG82563_PHY_KMRN_CTRL GG82563_REG(194, 17) e1000_hw.h Control
15108
 GG82563_PHY_INBAND_CTRLGG82563_PHY_INBAND_CTRL GG82563_REG(194, 18) e1000_hw.h Inband Control
15109
 GG82563_PHY_KMRN_DIAGNOSTICGG82563_PHY_KMRN_DIAGNOSTIC GG82563_REG(194, 19) e1000_hw.h Diagnostic
15110
 GG82563_PHY_ACK_TIMEOUTSGG82563_PHY_ACK_TIMEOUTS GG82563_REG(194, 20) e1000_hw.h Acknowledge Timeouts
15111
 GG82563_PHY_ADV_ABILITYGG82563_PHY_ADV_ABILITY GG82563_REG(194, 21) e1000_hw.h Advertised Ability
15112
 GG82563_PHY_LINK_PARTNER_ADV_ABGG82563_PHY_LINK_PARTNER_ADV_AB GG82563_REG(194, 23) e1000_hw.h Link Partner Advertised Ability
15113
 GG82563_PHY_ADV_NEXT_PAGEGG82563_PHY_ADV_NEXT_PAGE GG82563_REG(194, 24) e1000_hw.h Advertised Next Page
15114
 GG82563_PHY_LINK_PARTNER_ADV_NEGG82563_PHY_LINK_PARTNER_ADV_NE GG82563_REG(194, 25) e1000_hw.h Link Partner Advertised Next page
15115
 GG82563_PHY_KMRN_MISCGG82563_PHY_KMRN_MISC GG82563_REG(194, 26) e1000_hw.h Misc.
15116
 MII_CR_SPEED_SELECT_MSBMII_CR_SPEED_SELECT_MSB 0x0040 e1000_hw.h bits 6,13: 10=1000, 01=100, 00=10
15117
 MII_CR_COLL_TEST_ENABLEMII_CR_COLL_TEST_ENABLE 0x0080 e1000_hw.h Collision test enable
15118
 MII_CR_FULL_DUPLEXMII_CR_FULL_DUPLEX 0x0100 e1000_hw.h FDX =1, half duplex =0
15119
 MII_CR_RESTART_AUTO_NEGMII_CR_RESTART_AUTO_NEG 0x0200 e1000_hw.h Restart auto negotiation
15120
 MII_CR_ISOLATEMII_CR_ISOLATE 0x0400 e1000_hw.h Isolate PHY from MII
15121
 MII_CR_POWER_DOWNMII_CR_POWER_DOWN 0x0800 e1000_hw.h Power down
15122
 MII_CR_AUTO_NEG_ENMII_CR_AUTO_NEG_EN 0x1000 e1000_hw.h Auto Neg Enable
15123
 MII_CR_SPEED_SELECT_LSBMII_CR_SPEED_SELECT_LSB 0x2000 e1000_hw.h bits 6,13: 10=1000, 01=100, 00=10
15124
 MII_CR_LOOPBACKMII_CR_LOOPBACK 0x4000 e1000_hw.h 0 = normal, 1 = loopback
15125
 MII_CR_RESETMII_CR_RESET 0x8000 e1000_hw.h 0 = normal, 1 = PHY reset
15126
 MII_SR_EXTENDED_CAPSMII_SR_EXTENDED_CAPS 0x0001 e1000_hw.h Extended register capabilities
15127
 MII_SR_JABBER_DETECTMII_SR_JABBER_DETECT 0x0002 e1000_hw.h Jabber Detected
15128
 MII_SR_LINK_STATUSMII_SR_LINK_STATUS 0x0004 e1000_hw.h Link Status 1 = link
15129
 MII_SR_AUTONEG_CAPSMII_SR_AUTONEG_CAPS 0x0008 e1000_hw.h Auto Neg Capable
15130
 MII_SR_REMOTE_FAULTMII_SR_REMOTE_FAULT 0x0010 e1000_hw.h Remote Fault Detect
15131
 MII_SR_AUTONEG_COMPLETEMII_SR_AUTONEG_COMPLETE 0x0020 e1000_hw.h Auto Neg Complete
15132
 MII_SR_PREAMBLE_SUPPRESSMII_SR_PREAMBLE_SUPPRESS 0x0040 e1000_hw.h Preamble may be suppressed
15133
 MII_SR_EXTENDED_STATUSMII_SR_EXTENDED_STATUS 0x0100 e1000_hw.h Ext. status info in Reg 0x0F
15134
 MII_SR_100T2_HD_CAPSMII_SR_100T2_HD_CAPS 0x0200 e1000_hw.h 100T2 Half Duplex Capable
15135
 MII_SR_100T2_FD_CAPSMII_SR_100T2_FD_CAPS 0x0400 e1000_hw.h 100T2 Full Duplex Capable
15136
 MII_SR_10T_HD_CAPSMII_SR_10T_HD_CAPS 0x0800 e1000_hw.h 10T Half Duplex Capable
15137
 MII_SR_10T_FD_CAPSMII_SR_10T_FD_CAPS 0x1000 e1000_hw.h 10T Full Duplex Capable
15138
 MII_SR_100X_HD_CAPSMII_SR_100X_HD_CAPS 0x2000 e1000_hw.h 100X Half Duplex Capable
15139
 MII_SR_100X_FD_CAPSMII_SR_100X_FD_CAPS 0x4000 e1000_hw.h 100X Full Duplex Capable
15140
 MII_SR_100T4_CAPSMII_SR_100T4_CAPS 0x8000 e1000_hw.h 100T4 Capable
15141
 NWAY_AR_SELECTOR_FIELDNWAY_AR_SELECTOR_FIELD 0x0001 e1000_hw.h indicates IEEE 802.3 CSMA/CD
15142
 NWAY_AR_10T_HD_CAPSNWAY_AR_10T_HD_CAPS 0x0020 e1000_hw.h 10T Half Duplex Capable
15143
 NWAY_AR_10T_FD_CAPSNWAY_AR_10T_FD_CAPS 0x0040 e1000_hw.h 10T Full Duplex Capable
15144
 NWAY_AR_100TX_HD_CAPSNWAY_AR_100TX_HD_CAPS 0x0080 e1000_hw.h 100TX Half Duplex Capable
15145
 NWAY_AR_100TX_FD_CAPSNWAY_AR_100TX_FD_CAPS 0x0100 e1000_hw.h 100TX Full Duplex Capable
15146
 NWAY_AR_100T4_CAPSNWAY_AR_100T4_CAPS 0x0200 e1000_hw.h 100T4 Capable
15147
 NWAY_AR_PAUSENWAY_AR_PAUSE 0x0400 e1000_hw.h Pause operation desired
15148
 NWAY_AR_ASM_DIRNWAY_AR_ASM_DIR 0x0800 e1000_hw.h Asymmetric Pause Direction bit
15149
 NWAY_AR_REMOTE_FAULTNWAY_AR_REMOTE_FAULT 0x2000 e1000_hw.h Remote Fault detected
15150
 NWAY_AR_NEXT_PAGENWAY_AR_NEXT_PAGE 0x8000 e1000_hw.h Next Page ability supported
15151
 NWAY_LPAR_SELECTOR_FIELDNWAY_LPAR_SELECTOR_FIELD 0x0000 e1000_hw.h LP protocol selector field
15152
 NWAY_LPAR_10T_HD_CAPSNWAY_LPAR_10T_HD_CAPS 0x0020 e1000_hw.h LP is 10T Half Duplex Capable
15153
 NWAY_LPAR_10T_FD_CAPSNWAY_LPAR_10T_FD_CAPS 0x0040 e1000_hw.h LP is 10T Full Duplex Capable
15154
 NWAY_LPAR_100TX_HD_CAPSNWAY_LPAR_100TX_HD_CAPS 0x0080 e1000_hw.h LP is 100TX Half Duplex Capable
15155
 NWAY_LPAR_100TX_FD_CAPSNWAY_LPAR_100TX_FD_CAPS 0x0100 e1000_hw.h LP is 100TX Full Duplex Capable
15156
 NWAY_LPAR_100T4_CAPSNWAY_LPAR_100T4_CAPS 0x0200 e1000_hw.h LP is 100T4 Capable
15157
 NWAY_LPAR_PAUSENWAY_LPAR_PAUSE 0x0400 e1000_hw.h LP Pause operation desired
15158
 NWAY_LPAR_ASM_DIRNWAY_LPAR_ASM_DIR 0x0800 e1000_hw.h LP Asymmetric Pause Direction bit
15159
 NWAY_LPAR_REMOTE_FAULTNWAY_LPAR_REMOTE_FAULT 0x2000 e1000_hw.h LP has detected Remote Fault
15160
 NWAY_LPAR_ACKNOWLEDGENWAY_LPAR_ACKNOWLEDGE 0x4000 e1000_hw.h LP has rx'd link code word
15161
 NWAY_LPAR_NEXT_PAGENWAY_LPAR_NEXT_PAGE 0x8000 e1000_hw.h Next Page ability supported
15162
 NWAY_ER_LP_NWAY_CAPSNWAY_ER_LP_NWAY_CAPS 0x0001 e1000_hw.h LP has Auto Neg Capability
15163
 NWAY_ER_PAGE_RXDNWAY_ER_PAGE_RXD 0x0002 e1000_hw.h LP is 10T Half Duplex Capable
15164
 NWAY_ER_NEXT_PAGE_CAPSNWAY_ER_NEXT_PAGE_CAPS 0x0004 e1000_hw.h LP is 10T Full Duplex Capable
15165
 NWAY_ER_LP_NEXT_PAGE_CAPSNWAY_ER_LP_NEXT_PAGE_CAPS 0x0008 e1000_hw.h LP is 100TX Half Duplex Capable
15166
 NWAY_ER_PAR_DETECT_FAULTNWAY_ER_PAR_DETECT_FAULT 0x0010 e1000_hw.h LP is 100TX Full Duplex Capable
15167
 NPTX_MSG_CODE_FIELDNPTX_MSG_CODE_FIELD 0x0001 e1000_hw.h NP msg code or unformatted data
15168
 NPTX_TOGGLENPTX_TOGGLE 0x0800 e1000_hw.h Toggles between exchanges
15169
 NPTX_ACKNOWLDGE2NPTX_ACKNOWLDGE2 0x1000 e1000_hw.h 1 = will comply with msg
15170
 NPTX_MSG_PAGENPTX_MSG_PAGE 0x2000 e1000_hw.h formatted(1)/unformatted(0) pg
15171
 NPTX_NEXT_PAGENPTX_NEXT_PAGE 0x8000 e1000_hw.h 1 = addition NP will follow
15172
 LP_RNPR_MSG_CODE_FIELDLP_RNPR_MSG_CODE_FIELD 0x0001 e1000_hw.h NP msg code or unformatted data
15173
 LP_RNPR_TOGGLELP_RNPR_TOGGLE 0x0800 e1000_hw.h Toggles between exchanges
15174
 LP_RNPR_ACKNOWLDGE2LP_RNPR_ACKNOWLDGE2 0x1000 e1000_hw.h 1 = will comply with msg
15175
 LP_RNPR_MSG_PAGELP_RNPR_MSG_PAGE 0x2000 e1000_hw.h formatted(1)/unformatted(0) pg
15176
 LP_RNPR_ACKNOWLDGELP_RNPR_ACKNOWLDGE 0x4000 e1000_hw.h 1 = ACK / 0 = NO ACK
15177
 LP_RNPR_NEXT_PAGELP_RNPR_NEXT_PAGE 0x8000 e1000_hw.h 1 = addition NP will follow
15178
 CR_1000T_ASYM_PAUSECR_1000T_ASYM_PAUSE 0x0080 e1000_hw.h Advertise asymmetric pause bit
15179
 CR_1000T_HD_CAPSCR_1000T_HD_CAPS 0x0100 e1000_hw.h Advertise 1000T HD capability
15180
 CR_1000T_FD_CAPSCR_1000T_FD_CAPS 0x0200 e1000_hw.h Advertise 1000T FD capability
15181
 CR_1000T_REPEATER_DTECR_1000T_REPEATER_DTE 0x0400 e1000_hw.h 1=Repeater/switch device port
15182
 CR_1000T_MS_VALUECR_1000T_MS_VALUE 0x0800 e1000_hw.h 1=Configure PHY as Master
15183
 CR_1000T_MS_ENABLECR_1000T_MS_ENABLE 0x1000 e1000_hw.h 1=Master/Slave manual config value
15184
 CR_1000T_TEST_MODE_NORMALCR_1000T_TEST_MODE_NORMAL 0x0000 e1000_hw.h Normal Operation
15185
 CR_1000T_TEST_MODE_1CR_1000T_TEST_MODE_1 0x2000 e1000_hw.h Transmit Waveform test
15186
 CR_1000T_TEST_MODE_2CR_1000T_TEST_MODE_2 0x4000 e1000_hw.h Master Transmit Jitter test
15187
 CR_1000T_TEST_MODE_3CR_1000T_TEST_MODE_3 0x6000 e1000_hw.h Slave Transmit Jitter test
15188
 CR_1000T_TEST_MODE_4CR_1000T_TEST_MODE_4 0x8000 e1000_hw.h Transmitter Distortion test
15189
 SR_1000T_IDLE_ERROR_CNTSR_1000T_IDLE_ERROR_CNT 0x00FF e1000_hw.h Num idle errors since last read
15190
 SR_1000T_ASYM_PAUSE_DIRSR_1000T_ASYM_PAUSE_DIR 0x0100 e1000_hw.h LP asymmetric pause direction bit
15191
 SR_1000T_LP_HD_CAPSSR_1000T_LP_HD_CAPS 0x0400 e1000_hw.h LP is 1000T HD capable
15192
 SR_1000T_LP_FD_CAPSSR_1000T_LP_FD_CAPS 0x0800 e1000_hw.h LP is 1000T FD capable
15193
 SR_1000T_REMOTE_RX_STATUSSR_1000T_REMOTE_RX_STATUS 0x1000 e1000_hw.h Remote receiver OK
15194
 SR_1000T_LOCAL_RX_STATUSSR_1000T_LOCAL_RX_STATUS 0x2000 e1000_hw.h Local receiver OK
15195
 SR_1000T_MS_CONFIG_RESSR_1000T_MS_CONFIG_RES 0x4000 e1000_hw.h 1=Local TX is Master, 0=Slave
15196
 SR_1000T_MS_CONFIG_FAULTSR_1000T_MS_CONFIG_FAULT 0x8000 e1000_hw.h Master/Slave config fault
15197
 SR_1000T_REMOTE_RX_STATUS_SHIFTSR_1000T_REMOTE_RX_STATUS_SHIFT 12 e1000_hw.h 　
15198
 SR_1000T_LOCAL_RX_STATUS_SHIFTSR_1000T_LOCAL_RX_STATUS_SHIFT 13 e1000_hw.h 　
15199
 SR_1000T_PHY_EXCESSIVE_IDLE_ERRSR_1000T_PHY_EXCESSIVE_IDLE_ERR 5 e1000_hw.h 　
15200
 FFE_IDLE_ERR_COUNT_TIMEOUT_20FFE_IDLE_ERR_COUNT_TIMEOUT_20 20 e1000_hw.h 　
15201
 FFE_IDLE_ERR_COUNT_TIMEOUT_100FFE_IDLE_ERR_COUNT_TIMEOUT_100 100 e1000_hw.h 　
15202
 IEEE_ESR_1000T_HD_CAPSIEEE_ESR_1000T_HD_CAPS 0x1000 e1000_hw.h 1000T HD capable
15203
 IEEE_ESR_1000T_FD_CAPSIEEE_ESR_1000T_FD_CAPS 0x2000 e1000_hw.h 1000T FD capable
15204
 IEEE_ESR_1000X_HD_CAPSIEEE_ESR_1000X_HD_CAPS 0x4000 e1000_hw.h 1000X HD capable
15205
 IEEE_ESR_1000X_FD_CAPSIEEE_ESR_1000X_FD_CAPS 0x8000 e1000_hw.h 1000X FD capable
15206
 PHY_TX_POLARITY_MASKPHY_TX_POLARITY_MASK 0x0100 e1000_hw.h register 10h bit 8 (polarity bit)
15207
 PHY_TX_NORMAL_POLARITYPHY_TX_NORMAL_POLARITY 0 e1000_hw.h register 10h bit 8 (normal polarity)
15208
 AUTO_POLARITY_DISABLEAUTO_POLARITY_DISABLE 0x0010 e1000_hw.h register 11h bit 4
15209
 M88E1000_PSCR_JABBER_DISABLEM88E1000_PSCR_JABBER_DISABLE 0x0001 e1000_hw.h 1=Jabber Function disabled
15210
 M88E1000_PSCR_POLARITY_REVERSALM88E1000_PSCR_POLARITY_REVERSAL 0x0002 e1000_hw.h 1=Polarity Reversal enabled
15211
 M88E1000_PSCR_SQE_TESTM88E1000_PSCR_SQE_TEST 0x0004 e1000_hw.h 1=SQE Test enabled
15212
 M88E1000_PSCR_CLK125_DISABLEM88E1000_PSCR_CLK125_DISABLE 0x0010 e1000_hw.h 1=CLK125 low,
15213
 M88E1000_PSCR_MDI_MANUAL_MODEM88E1000_PSCR_MDI_MANUAL_MODE 0x0000 e1000_hw.h MDI Crossover Mode bits 6:5
15214
 M88E1000_PSCR_MDIX_MANUAL_MODEM88E1000_PSCR_MDIX_MANUAL_MODE 0x0020 e1000_hw.h Manual MDIX configuration
15215
 M88E1000_PSCR_AUTO_X_1000TM88E1000_PSCR_AUTO_X_1000T 0x0040 e1000_hw.h 1000BASE-T: Auto crossover,
15216
 M88E1000_PSCR_AUTO_X_MODEM88E1000_PSCR_AUTO_X_MODE 0x0060 e1000_hw.h Auto crossover enabled
15217
 M88E1000_PSCR_10BT_EXT_DIST_ENAM88E1000_PSCR_10BT_EXT_DIST_ENA 0x0080 e1000_hw.h 　
15218
 M88E1000_PSCR_MII_5BIT_ENABLEM88E1000_PSCR_MII_5BIT_ENABLE 0x0100 e1000_hw.h 　
15219
 M88E1000_PSCR_SCRAMBLER_DISABLEM88E1000_PSCR_SCRAMBLER_DISABLE 0x0200 e1000_hw.h 1=Scrambler disable
15220
 M88E1000_PSCR_FORCE_LINK_GOODM88E1000_PSCR_FORCE_LINK_GOOD 0x0400 e1000_hw.h 1=Force link good
15221
 M88E1000_PSCR_ASSERT_CRS_ON_TXM88E1000_PSCR_ASSERT_CRS_ON_TX 0x0800 e1000_hw.h 1=Assert CRS on Transmit
15222
 M88E1000_PSCR_POLARITY_REVERSALM88E1000_PSCR_POLARITY_REVERSAL 1 e1000_hw.h 　
15223
 M88E1000_PSCR_AUTO_X_MODE_SHIFTM88E1000_PSCR_AUTO_X_MODE_SHIFT 5 e1000_hw.h 　
15224
 M88E1000_PSCR_10BT_EXT_DIST_ENAM88E1000_PSCR_10BT_EXT_DIST_ENA 7 e1000_hw.h 　
15225
 M88E1000_PSSR_JABBERM88E1000_PSSR_JABBER 0x0001 e1000_hw.h 1=Jabber
15226
 M88E1000_PSSR_REV_POLARITYM88E1000_PSSR_REV_POLARITY 0x0002 e1000_hw.h 1=Polarity reversed
15227
 M88E1000_PSSR_DOWNSHIFTM88E1000_PSSR_DOWNSHIFT 0x0020 e1000_hw.h 1=Downshifted
15228
 M88E1000_PSSR_MDIXM88E1000_PSSR_MDIX 0x0040 e1000_hw.h 1=MDIX; 0=MDI
15229
 M88E1000_PSSR_CABLE_LENGTHM88E1000_PSSR_CABLE_LENGTH 0x0380 e1000_hw.h 0=<50M;1=50-80M;2=80-110M;
15230
 M88E1000_PSSR_LINKM88E1000_PSSR_LINK 0x0400 e1000_hw.h 1=Link up, 0=Link down
15231
 M88E1000_PSSR_SPD_DPLX_RESOLVEDM88E1000_PSSR_SPD_DPLX_RESOLVED 0x0800 e1000_hw.h 1=Speed & Duplex resolved
15232
 M88E1000_PSSR_PAGE_RCVDM88E1000_PSSR_PAGE_RCVD 0x1000 e1000_hw.h 1=Page received
15233
 M88E1000_PSSR_DPLXM88E1000_PSSR_DPLX 0x2000 e1000_hw.h 1=Duplex 0=Half Duplex
15234
 M88E1000_PSSR_SPEEDM88E1000_PSSR_SPEED 0xC000 e1000_hw.h Speed, bits 14:15
15235
 M88E1000_PSSR_10MBSM88E1000_PSSR_10MBS 0x0000 e1000_hw.h 00=10Mbs
15236
 M88E1000_PSSR_100MBSM88E1000_PSSR_100MBS 0x4000 e1000_hw.h 01=100Mbs
15237
 M88E1000_PSSR_1000MBSM88E1000_PSSR_1000MBS 0x8000 e1000_hw.h 10=1000Mbs
15238
 M88E1000_PSSR_REV_POLARITY_SHIFM88E1000_PSSR_REV_POLARITY_SHIF 1 e1000_hw.h 　
15239
 M88E1000_PSSR_DOWNSHIFT_SHIFTM88E1000_PSSR_DOWNSHIFT_SHIFT 5 e1000_hw.h 　
15240
 M88E1000_PSSR_MDIX_SHIFTM88E1000_PSSR_MDIX_SHIFT 6 e1000_hw.h 　
15241
 M88E1000_PSSR_CABLE_LENGTH_SHIFM88E1000_PSSR_CABLE_LENGTH_SHIF 7 e1000_hw.h 　
15242
 M88E1000_EPSCR_FIBER_LOOPBACKM88E1000_EPSCR_FIBER_LOOPBACK 0x4000 e1000_hw.h 1=Fiber loopback
15243
 M88E1000_EPSCR_DOWN_NO_IDLEM88E1000_EPSCR_DOWN_NO_IDLE 0x8000 e1000_hw.h 1=Lost lock detect enabled.
15244
 M88E1000_EPSCR_MASTER_DOWNSHIFTM88E1000_EPSCR_MASTER_DOWNSHIFT 0x0C00 e1000_hw.h 　
15245
 M88E1000_EPSCR_MASTER_DOWNSHIFTM88E1000_EPSCR_MASTER_DOWNSHIFT 0x0000 e1000_hw.h 　
15246
 M88E1000_EPSCR_MASTER_DOWNSHIFTM88E1000_EPSCR_MASTER_DOWNSHIFT 0x0400 e1000_hw.h 　
15247
 M88E1000_EPSCR_MASTER_DOWNSHIFTM88E1000_EPSCR_MASTER_DOWNSHIFT 0x0800 e1000_hw.h 　
15248
 M88E1000_EPSCR_MASTER_DOWNSHIFTM88E1000_EPSCR_MASTER_DOWNSHIFT 0x0C00 e1000_hw.h 　
15249
 M88E1000_EPSCR_SLAVE_DOWNSHIFT_M88E1000_EPSCR_SLAVE_DOWNSHIFT_ 0x0300 e1000_hw.h 　
15250
 M88E1000_EPSCR_SLAVE_DOWNSHIFT_M88E1000_EPSCR_SLAVE_DOWNSHIFT_ 0x0000 e1000_hw.h 　
15251
 M88E1000_EPSCR_SLAVE_DOWNSHIFT_M88E1000_EPSCR_SLAVE_DOWNSHIFT_ 0x0100 e1000_hw.h 　
15252
 M88E1000_EPSCR_SLAVE_DOWNSHIFT_M88E1000_EPSCR_SLAVE_DOWNSHIFT_ 0x0200 e1000_hw.h 　
15253
 M88E1000_EPSCR_SLAVE_DOWNSHIFT_M88E1000_EPSCR_SLAVE_DOWNSHIFT_ 0x0300 e1000_hw.h 　
15254
 M88E1000_EPSCR_TX_CLK_2_5M88E1000_EPSCR_TX_CLK_2_5 0x0060 e1000_hw.h 2.5 MHz TX_CLK
15255
 M88E1000_EPSCR_TX_CLK_25M88E1000_EPSCR_TX_CLK_25 0x0070 e1000_hw.h 25 MHz TX_CLK
15256
 M88E1000_EPSCR_TX_CLK_0M88E1000_EPSCR_TX_CLK_0 0x0000 e1000_hw.h NO TX_CLK
15257
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0E00 e1000_hw.h 　
15258
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0000 e1000_hw.h 　
15259
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0200 e1000_hw.h 　
15260
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0400 e1000_hw.h 　
15261
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0600 e1000_hw.h 　
15262
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0800 e1000_hw.h 　
15263
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0A00 e1000_hw.h 　
15264
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0C00 e1000_hw.h 　
15265
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0E00 e1000_hw.h 　
15266
 IGP01E1000_PSCFR_AUTO_MDIX_PAR_IGP01E1000_PSCFR_AUTO_MDIX_PAR_ 0x0010 e1000_hw.h 　
15267
 IGP01E1000_PSCFR_PRE_ENIGP01E1000_PSCFR_PRE_EN 0x0020 e1000_hw.h 　
15268
 IGP01E1000_PSCFR_SMART_SPEEDIGP01E1000_PSCFR_SMART_SPEED 0x0080 e1000_hw.h 　
15269
 IGP01E1000_PSCFR_DISABLE_TPLOOPIGP01E1000_PSCFR_DISABLE_TPLOOP 0x0100 e1000_hw.h 　
15270
 IGP01E1000_PSCFR_DISABLE_JABBERIGP01E1000_PSCFR_DISABLE_JABBER 0x0400 e1000_hw.h 　
15271
 IGP01E1000_PSCFR_DISABLE_TRANSMIGP01E1000_PSCFR_DISABLE_TRANSM 0x2000 e1000_hw.h 　
15272
 IGP01E1000_PSSR_AUTONEG_FAILEDIGP01E1000_PSSR_AUTONEG_FAILED 0x0001 e1000_hw.h RO LH SC
15273
 IGP01E1000_PSSR_POLARITY_REVERSIGP01E1000_PSSR_POLARITY_REVERS 0x0002 e1000_hw.h 　
15274
 IGP01E1000_PSSR_CABLE_LENGTHIGP01E1000_PSSR_CABLE_LENGTH 0x007C e1000_hw.h 　
15275
 IGP01E1000_PSSR_FULL_DUPLEXIGP01E1000_PSSR_FULL_DUPLEX 0x0200 e1000_hw.h 　
15276
 IGP01E1000_PSSR_LINK_UPIGP01E1000_PSSR_LINK_UP 0x0400 e1000_hw.h 　
15277
 IGP01E1000_PSSR_MDIXIGP01E1000_PSSR_MDIX 0x0800 e1000_hw.h 　
15278
 IGP01E1000_PSSR_SPEED_MASKIGP01E1000_PSSR_SPEED_MASK 0xC000 e1000_hw.h speed bits mask
15279
 IGP01E1000_PSSR_SPEED_10MBPSIGP01E1000_PSSR_SPEED_10MBPS 0x4000 e1000_hw.h 　
15280
 IGP01E1000_PSSR_SPEED_100MBPSIGP01E1000_PSSR_SPEED_100MBPS 0x8000 e1000_hw.h 　
15281
 IGP01E1000_PSSR_SPEED_1000MBPSIGP01E1000_PSSR_SPEED_1000MBPS 0xC000 e1000_hw.h 　
15282
 IGP01E1000_PSSR_CABLE_LENGTH_SHIGP01E1000_PSSR_CABLE_LENGTH_SH 0x0002 e1000_hw.h shift right 2
15283
 IGP01E1000_PSSR_MDIX_SHIFTIGP01E1000_PSSR_MDIX_SHIFT 0x000B e1000_hw.h shift right 11
15284
 IGP01E1000_PSCR_TP_LOOPBACKIGP01E1000_PSCR_TP_LOOPBACK 0x0010 e1000_hw.h 　
15285
 IGP01E1000_PSCR_CORRECT_NC_SCMBIGP01E1000_PSCR_CORRECT_NC_SCMB 0x0200 e1000_hw.h 　
15286
 IGP01E1000_PSCR_TEN_CRS_SELECTIGP01E1000_PSCR_TEN_CRS_SELECT 0x0400 e1000_hw.h 　
15287
 IGP01E1000_PSCR_FLIP_CHIPIGP01E1000_PSCR_FLIP_CHIP 0x0800 e1000_hw.h 　
15288
 IGP01E1000_PSCR_AUTO_MDIXIGP01E1000_PSCR_AUTO_MDIX 0x1000 e1000_hw.h 　
15289
 IGP01E1000_PSCR_FORCE_MDI_MDIXIGP01E1000_PSCR_FORCE_MDI_MDIX 0x2000 e1000_hw.h 0-MDI, 1-MDIX
15290
 IGP01E1000_PLHR_SS_DOWNGRADEIGP01E1000_PLHR_SS_DOWNGRADE 0x8000 e1000_hw.h 　
15291
 IGP01E1000_PLHR_GIG_SCRAMBLER_EIGP01E1000_PLHR_GIG_SCRAMBLER_E 0x4000 e1000_hw.h 　
15292
 IGP01E1000_PLHR_MASTER_FAULTIGP01E1000_PLHR_MASTER_FAULT 0x2000 e1000_hw.h 　
15293
 IGP01E1000_PLHR_MASTER_RESOLUTIIGP01E1000_PLHR_MASTER_RESOLUTI 0x1000 e1000_hw.h 　
15294
 IGP01E1000_PLHR_GIG_REM_RCVR_NOIGP01E1000_PLHR_GIG_REM_RCVR_NO 0x0800 e1000_hw.h LH
15295
 IGP01E1000_PLHR_IDLE_ERROR_CNT_IGP01E1000_PLHR_IDLE_ERROR_CNT_ 0x0400 e1000_hw.h LH
15296
 IGP01E1000_PLHR_DATA_ERR_1IGP01E1000_PLHR_DATA_ERR_1 0x0200 e1000_hw.h LH
15297
 IGP01E1000_PLHR_DATA_ERR_0IGP01E1000_PLHR_DATA_ERR_0 0x0100 e1000_hw.h 　
15298
 IGP01E1000_PLHR_AUTONEG_FAULTIGP01E1000_PLHR_AUTONEG_FAULT 0x0040 e1000_hw.h 　
15299
 IGP01E1000_PLHR_AUTONEG_ACTIVEIGP01E1000_PLHR_AUTONEG_ACTIVE 0x0010 e1000_hw.h 　
15300
 IGP01E1000_PLHR_VALID_CHANNEL_DIGP01E1000_PLHR_VALID_CHANNEL_D 0x0008 e1000_hw.h 　
15301
 IGP01E1000_PLHR_VALID_CHANNEL_CIGP01E1000_PLHR_VALID_CHANNEL_C 0x0004 e1000_hw.h 　
15302
 IGP01E1000_PLHR_VALID_CHANNEL_BIGP01E1000_PLHR_VALID_CHANNEL_B 0x0002 e1000_hw.h 　
15303
 IGP01E1000_PLHR_VALID_CHANNEL_AIGP01E1000_PLHR_VALID_CHANNEL_A 0x0001 e1000_hw.h 　
15304
 IGP01E1000_MSE_CHANNEL_DIGP01E1000_MSE_CHANNEL_D 0x000F e1000_hw.h 　
15305
 IGP01E1000_MSE_CHANNEL_CIGP01E1000_MSE_CHANNEL_C 0x00F0 e1000_hw.h 　
15306
 IGP01E1000_MSE_CHANNEL_BIGP01E1000_MSE_CHANNEL_B 0x0F00 e1000_hw.h 　
15307
 IGP01E1000_MSE_CHANNEL_AIGP01E1000_MSE_CHANNEL_A 0xF000 e1000_hw.h 　
15308
 IGP02E1000_PM_SPDIGP02E1000_PM_SPD 0x0001 e1000_hw.h Smart Power Down
15309
 IGP02E1000_PM_D3_LPLUIGP02E1000_PM_D3_LPLU 0x0004 e1000_hw.h Enable LPLU in non-D0a modes
15310
 IGP02E1000_PM_D0_LPLUIGP02E1000_PM_D0_LPLU 0x0002 e1000_hw.h Enable LPLU in D0a mode
15311
 DSP_RESET_ENABLEDSP_RESET_ENABLE 0x0 e1000_hw.h 　
15312
 DSP_RESET_DISABLEDSP_RESET_DISABLE 0x2 e1000_hw.h 　
15313
 E1000_MAX_DSP_RESETSE1000_MAX_DSP_RESETS 10 e1000_hw.h 　
15314
 IGP01E1000_AGC_LENGTH_SHIFTIGP01E1000_AGC_LENGTH_SHIFT 7 e1000_hw.h Coarse - 13:11, Fine - 10:7
15315
 IGP02E1000_AGC_LENGTH_SHIFTIGP02E1000_AGC_LENGTH_SHIFT 9 e1000_hw.h Coarse - 15:13, Fine - 12:9
15316
 IGP02E1000_AGC_LENGTH_MASKIGP02E1000_AGC_LENGTH_MASK 0x7F e1000_hw.h 　
15317
 IGP01E1000_AGC_LENGTH_TABLE_SIZIGP01E1000_AGC_LENGTH_TABLE_SIZ 128 e1000_hw.h 　
15318
 IGP02E1000_AGC_LENGTH_TABLE_SIZIGP02E1000_AGC_LENGTH_TABLE_SIZ 113 e1000_hw.h 　
15319
 IGP01E1000_AGC_RANGEIGP01E1000_AGC_RANGE 10 e1000_hw.h 　
15320
 IGP02E1000_AGC_RANGEIGP02E1000_AGC_RANGE 15 e1000_hw.h 　
15321
 IGP01E1000_PHY_POLARITY_MASKIGP01E1000_PHY_POLARITY_MASK 0x0078 e1000_hw.h 　
15322
 IGP01E1000_GMII_FLEX_SPDIGP01E1000_GMII_FLEX_SPD 0x10 e1000_hw.h Enable flexible speed
15323
 IGP01E1000_GMII_SPDIGP01E1000_GMII_SPD 0x20 e1000_hw.h Enable SPD
15324
 IGP01E1000_ANALOG_SPARE_FUSE_STIGP01E1000_ANALOG_SPARE_FUSE_ST 0x20D1 e1000_hw.h 　
15325
 IGP01E1000_ANALOG_FUSE_STATUSIGP01E1000_ANALOG_FUSE_STATUS 0x20D0 e1000_hw.h 　
15326
 IGP01E1000_ANALOG_FUSE_CONTROLIGP01E1000_ANALOG_FUSE_CONTROL 0x20DC e1000_hw.h 　
15327
 IGP01E1000_ANALOG_FUSE_BYPASSIGP01E1000_ANALOG_FUSE_BYPASS 0x20DE e1000_hw.h 　
15328
 IGP01E1000_ANALOG_FUSE_POLY_MASIGP01E1000_ANALOG_FUSE_POLY_MAS 0xF000 e1000_hw.h 　
15329
 IGP01E1000_ANALOG_FUSE_FINE_MASIGP01E1000_ANALOG_FUSE_FINE_MAS 0x0F80 e1000_hw.h 　
15330
 IGP01E1000_ANALOG_FUSE_COARSE_MIGP01E1000_ANALOG_FUSE_COARSE_M 0x0070 e1000_hw.h 　
15331
 IGP01E1000_ANALOG_SPARE_FUSE_ENIGP01E1000_ANALOG_SPARE_FUSE_EN 0x0100 e1000_hw.h 　
15332
 IGP01E1000_ANALOG_FUSE_ENABLE_SIGP01E1000_ANALOG_FUSE_ENABLE_S 0x0002 e1000_hw.h 　
15333
 IGP01E1000_ANALOG_FUSE_COARSE_TIGP01E1000_ANALOG_FUSE_COARSE_T 0x0040 e1000_hw.h 　
15334
 IGP01E1000_ANALOG_FUSE_COARSE_1IGP01E1000_ANALOG_FUSE_COARSE_1 0x0010 e1000_hw.h 　
15335
 IGP01E1000_ANALOG_FUSE_FINE_1IGP01E1000_ANALOG_FUSE_FINE_1 0x0080 e1000_hw.h 　
15336
 IGP01E1000_ANALOG_FUSE_FINE_10IGP01E1000_ANALOG_FUSE_FINE_10 0x0500 e1000_hw.h 　
15337
 GG82563_PSCR_DISABLE_JABBERGG82563_PSCR_DISABLE_JABBER 0x0001 e1000_hw.h 1=Disable Jabber
15338
 GG82563_PSCR_POLARITY_REVERSAL_GG82563_PSCR_POLARITY_REVERSAL_ 0x0002 e1000_hw.h 1=Polarity Reversal Disabled
15339
 GG82563_PSCR_POWER_DOWNGG82563_PSCR_POWER_DOWN 0x0004 e1000_hw.h 1=Power Down
15340
 GG82563_PSCR_COPPER_TRANSMITER_GG82563_PSCR_COPPER_TRANSMITER_ 0x0008 e1000_hw.h 1=Transmitter Disabled
15341
 GG82563_PSCR_CROSSOVER_MODE_MASGG82563_PSCR_CROSSOVER_MODE_MAS 0x0060 e1000_hw.h 　
15342
 GG82563_PSCR_CROSSOVER_MODE_MDIGG82563_PSCR_CROSSOVER_MODE_MDI 0x0000 e1000_hw.h 00=Manual MDI configuration
15343
 GG82563_PSCR_CROSSOVER_MODE_MDIGG82563_PSCR_CROSSOVER_MODE_MDI 0x0020 e1000_hw.h 01=Manual MDIX configuration
15344
 GG82563_PSCR_CROSSOVER_MODE_AUTGG82563_PSCR_CROSSOVER_MODE_AUT 0x0060 e1000_hw.h 11=Automatic crossover
15345
 GG82563_PSCR_ENALBE_EXTENDED_DIGG82563_PSCR_ENALBE_EXTENDED_DI 0x0080 e1000_hw.h 1=Enable Extended Distance
15346
 GG82563_PSCR_ENERGY_DETECT_MASKGG82563_PSCR_ENERGY_DETECT_MASK 0x0300 e1000_hw.h 　
15347
 GG82563_PSCR_ENERGY_DETECT_OFFGG82563_PSCR_ENERGY_DETECT_OFF 0x0000 e1000_hw.h 00,01=Off
15348
 GG82563_PSCR_ENERGY_DETECT_RXGG82563_PSCR_ENERGY_DETECT_RX 0x0200 e1000_hw.h 10=Sense on Rx only (Energy Detect)
15349
 GG82563_PSCR_ENERGY_DETECT_RX_TGG82563_PSCR_ENERGY_DETECT_RX_T 0x0300 e1000_hw.h 11=Sense and Tx NLP
15350
 GG82563_PSCR_FORCE_LINK_GOODGG82563_PSCR_FORCE_LINK_GOOD 0x0400 e1000_hw.h 1=Force Link Good
15351
 GG82563_PSCR_DOWNSHIFT_ENABLEGG82563_PSCR_DOWNSHIFT_ENABLE 0x0800 e1000_hw.h 1=Enable Downshift
15352
 GG82563_PSCR_DOWNSHIFT_COUNTER_GG82563_PSCR_DOWNSHIFT_COUNTER_ 0x7000 e1000_hw.h 　
15353
 GG82563_PSCR_DOWNSHIFT_COUNTER_GG82563_PSCR_DOWNSHIFT_COUNTER_ 12 e1000_hw.h 　
15354
 GG82563_PSSR_JABBERGG82563_PSSR_JABBER 0x0001 e1000_hw.h 1=Jabber
15355
 GG82563_PSSR_POLARITYGG82563_PSSR_POLARITY 0x0002 e1000_hw.h 1=Polarity Reversed
15356
 GG82563_PSSR_LINKGG82563_PSSR_LINK 0x0008 e1000_hw.h 1=Link is Up
15357
 GG82563_PSSR_ENERGY_DETECTGG82563_PSSR_ENERGY_DETECT 0x0010 e1000_hw.h 1=Sleep, 0=Active
15358
 GG82563_PSSR_DOWNSHIFTGG82563_PSSR_DOWNSHIFT 0x0020 e1000_hw.h 1=Downshift
15359
 GG82563_PSSR_CROSSOVER_STATUSGG82563_PSSR_CROSSOVER_STATUS 0x0040 e1000_hw.h 1=MDIX, 0=MDI
15360
 GG82563_PSSR_RX_PAUSE_ENABLEDGG82563_PSSR_RX_PAUSE_ENABLED 0x0100 e1000_hw.h 1=Receive Pause Enabled
15361
 GG82563_PSSR_TX_PAUSE_ENABLEDGG82563_PSSR_TX_PAUSE_ENABLED 0x0200 e1000_hw.h 1=Transmit Pause Enabled
15362
 GG82563_PSSR_LINK_UPGG82563_PSSR_LINK_UP 0x0400 e1000_hw.h 1=Link Up
15363
 GG82563_PSSR_SPEED_DUPLEX_RESOLGG82563_PSSR_SPEED_DUPLEX_RESOL 0x0800 e1000_hw.h 1=Resolved
15364
 GG82563_PSSR_PAGE_RECEIVEDGG82563_PSSR_PAGE_RECEIVED 0x1000 e1000_hw.h 1=Page Received
15365
 GG82563_PSSR_DUPLEXGG82563_PSSR_DUPLEX 0x2000 e1000_hw.h 1-Full-Duplex
15366
 GG82563_PSSR_SPEED_MASKGG82563_PSSR_SPEED_MASK 0xC000 e1000_hw.h 　
15367
 GG82563_PSSR_SPEED_10MBPSGG82563_PSSR_SPEED_10MBPS 0x0000 e1000_hw.h 00=10Mbps
15368
 GG82563_PSSR_SPEED_100MBPSGG82563_PSSR_SPEED_100MBPS 0x4000 e1000_hw.h 01=100Mbps
15369
 GG82563_PSSR_SPEED_1000MBPSGG82563_PSSR_SPEED_1000MBPS 0x8000 e1000_hw.h 10=1000Mbps
15370
 GG82563_PSSR2_JABBERGG82563_PSSR2_JABBER 0x0001 e1000_hw.h 1=Jabber
15371
 GG82563_PSSR2_POLARITY_CHANGEDGG82563_PSSR2_POLARITY_CHANGED 0x0002 e1000_hw.h 1=Polarity Changed
15372
 GG82563_PSSR2_ENERGY_DETECT_CHAGG82563_PSSR2_ENERGY_DETECT_CHA 0x0010 e1000_hw.h 1=Energy Detect Changed
15373
 GG82563_PSSR2_DOWNSHIFT_INTERRUGG82563_PSSR2_DOWNSHIFT_INTERRU 0x0020 e1000_hw.h 1=Downshift Detected
15374
 GG82563_PSSR2_MDI_CROSSOVER_CHAGG82563_PSSR2_MDI_CROSSOVER_CHA 0x0040 e1000_hw.h 1=Crossover Changed
15375
 GG82563_PSSR2_FALSE_CARRIERGG82563_PSSR2_FALSE_CARRIER 0x0100 e1000_hw.h 1=False Carrier
15376
 GG82563_PSSR2_SYMBOL_ERRORGG82563_PSSR2_SYMBOL_ERROR 0x0200 e1000_hw.h 1=Symbol Error
15377
 GG82563_PSSR2_LINK_STATUS_CHANGGG82563_PSSR2_LINK_STATUS_CHANG 0x0400 e1000_hw.h 1=Link Status Changed
15378
 GG82563_PSSR2_AUTO_NEG_COMPLETEGG82563_PSSR2_AUTO_NEG_COMPLETE 0x0800 e1000_hw.h 1=Auto-Neg Completed
15379
 GG82563_PSSR2_PAGE_RECEIVEDGG82563_PSSR2_PAGE_RECEIVED 0x1000 e1000_hw.h 1=Page Received
15380
 GG82563_PSSR2_DUPLEX_CHANGEDGG82563_PSSR2_DUPLEX_CHANGED 0x2000 e1000_hw.h 1=Duplex Changed
15381
 GG82563_PSSR2_SPEED_CHANGEDGG82563_PSSR2_SPEED_CHANGED 0x4000 e1000_hw.h 1=Speed Changed
15382
 GG82563_PSSR2_AUTO_NEG_ERRORGG82563_PSSR2_AUTO_NEG_ERROR 0x8000 e1000_hw.h 1=Auto-Neg Error
15383
 GG82563_PSCR2_10BT_POLARITY_FORGG82563_PSCR2_10BT_POLARITY_FOR 0x0002 e1000_hw.h 1=Force Negative Polarity
15384
 GG82563_PSCR2_1000MB_TEST_SELECGG82563_PSCR2_1000MB_TEST_SELEC 0x000C e1000_hw.h 　
15385
 GG82563_PSCR2_1000MB_TEST_SELECGG82563_PSCR2_1000MB_TEST_SELEC 0x0000 e1000_hw.h 00,01=Normal Operation
15386
 GG82563_PSCR2_1000MB_TEST_SELECGG82563_PSCR2_1000MB_TEST_SELEC 0x0008 e1000_hw.h 10=Select 112ns Sequence
15387
 GG82563_PSCR2_1000MB_TEST_SELECGG82563_PSCR2_1000MB_TEST_SELEC 0x000C e1000_hw.h 11=Select 16ns Sequence
15388
 GG82563_PSCR2_REVERSE_AUTO_NEGGG82563_PSCR2_REVERSE_AUTO_NEG 0x2000 e1000_hw.h 1=Reverse Auto-Negotiation
15389
 GG82563_PSCR2_1000BT_DISABLEGG82563_PSCR2_1000BT_DISABLE 0x4000 e1000_hw.h 1=Disable 1000BASE-T
15390
 GG82563_PSCR2_TRANSMITER_TYPE_MGG82563_PSCR2_TRANSMITER_TYPE_M 0x8000 e1000_hw.h 　
15391
 GG82563_PSCR2_TRANSMITTER_TYPE_GG82563_PSCR2_TRANSMITTER_TYPE_ 0x0000 e1000_hw.h 0=Class B
15392
 GG82563_PSCR2_TRANSMITTER_TYPE_GG82563_PSCR2_TRANSMITTER_TYPE_ 0x8000 e1000_hw.h 1=Class A
15393
 GG82563_MSCR_TX_CLK_MASKGG82563_MSCR_TX_CLK_MASK 0x0007 e1000_hw.h 　
15394
 GG82563_MSCR_TX_CLK_10MBPS_2_5MGG82563_MSCR_TX_CLK_10MBPS_2_5M 0x0004 e1000_hw.h 　
15395
 GG82563_MSCR_TX_CLK_100MBPS_25MGG82563_MSCR_TX_CLK_100MBPS_25M 0x0005 e1000_hw.h 　
15396
 GG82563_MSCR_TX_CLK_1000MBPS_2_GG82563_MSCR_TX_CLK_1000MBPS_2_ 0x0006 e1000_hw.h 　
15397
 GG82563_MSCR_TX_CLK_1000MBPS_25GG82563_MSCR_TX_CLK_1000MBPS_25 0x0007 e1000_hw.h 　
15398
 GG82563_MSCR_ASSERT_CRS_ON_TXGG82563_MSCR_ASSERT_CRS_ON_TX 0x0010 e1000_hw.h 1=Assert
15399
 GG82563_DSPD_CABLE_LENGTHGG82563_DSPD_CABLE_LENGTH 0x0007 e1000_hw.h 0 = <50M;
15400
 GG82563_KMCR_PHY_LEDS_ENGG82563_KMCR_PHY_LEDS_EN 0x0020 e1000_hw.h 1=PHY LEDs, 0=Kumeran Inband LEDs
15401
 GG82563_KMCR_FORCE_LINK_UPGG82563_KMCR_FORCE_LINK_UP 0x0040 e1000_hw.h 1=Force Link Up
15402
 GG82563_KMCR_SUPPRESS_SGMII_EPDGG82563_KMCR_SUPPRESS_SGMII_EPD 0x0080 e1000_hw.h 　
15403
 GG82563_KMCR_MDIO_BUS_SPEED_SELGG82563_KMCR_MDIO_BUS_SPEED_SEL 0x0400 e1000_hw.h 　
15404
 GG82563_KMCR_MDIO_BUS_SPEED_SELGG82563_KMCR_MDIO_BUS_SPEED_SEL 0x0400 e1000_hw.h 1=6.25MHz, 0=0.8MHz
15405
 GG82563_KMCR_PASS_FALSE_CARRIERGG82563_KMCR_PASS_FALSE_CARRIER 0x0800 e1000_hw.h 　
15406
 GG82563_PMCR_ENABLE_ELECTRICAL_GG82563_PMCR_ENABLE_ELECTRICAL_ 0x0001 e1000_hw.h 1=Enalbe SERDES Electrical Idle
15407
 GG82563_PMCR_DISABLE_PORTGG82563_PMCR_DISABLE_PORT 0x0002 e1000_hw.h 1=Disable Port
15408
 GG82563_PMCR_DISABLE_SERDESGG82563_PMCR_DISABLE_SERDES 0x0004 e1000_hw.h 1=Disable SERDES
15409
 GG82563_PMCR_REVERSE_AUTO_NEGGG82563_PMCR_REVERSE_AUTO_NEG 0x0008 e1000_hw.h 1=Enable Reverse Auto-Negotiation
15410
 GG82563_PMCR_DISABLE_1000_NON_DGG82563_PMCR_DISABLE_1000_NON_D 0x0010 e1000_hw.h 1=Disable 1000Mbps Auto-Neg in non D0
15411
 GG82563_PMCR_DISABLE_1000GG82563_PMCR_DISABLE_1000 0x0020 e1000_hw.h 1=Disable 1000Mbps Auto-Neg Always
15412
 GG82563_PMCR_REVERSE_AUTO_NEG_DGG82563_PMCR_REVERSE_AUTO_NEG_D 0x0040 e1000_hw.h 1=Enable D0a Reverse Auto-Negotiation
15413
 GG82563_PMCR_FORCE_POWER_STATEGG82563_PMCR_FORCE_POWER_STATE 0x0080 e1000_hw.h 1=Force Power State
15414
 GG82563_PMCR_PROGRAMMED_POWER_SGG82563_PMCR_PROGRAMMED_POWER_S 0x0300 e1000_hw.h 　
15415
 GG82563_PMCR_PROGRAMMED_POWER_SGG82563_PMCR_PROGRAMMED_POWER_S 0x0000 e1000_hw.h 00=Dr
15416
 GG82563_PMCR_PROGRAMMED_POWER_SGG82563_PMCR_PROGRAMMED_POWER_S 0x0100 e1000_hw.h 01=D0u
15417
 GG82563_PMCR_PROGRAMMED_POWER_SGG82563_PMCR_PROGRAMMED_POWER_S 0x0200 e1000_hw.h 10=D0a
15418
 GG82563_PMCR_PROGRAMMED_POWER_SGG82563_PMCR_PROGRAMMED_POWER_S 0x0300 e1000_hw.h 11=D3
15419
 GG82563_ICR_DIS_PADDINGGG82563_ICR_DIS_PADDING 0x0010 e1000_hw.h Disable Padding Use
15420
 M88_VENDORM88_VENDOR 0x0141 e1000_hw.h 　
15421
 M88E1000_E_PHY_IDM88E1000_E_PHY_ID 0x01410C50 e1000_hw.h 　
15422
 M88E1000_I_PHY_IDM88E1000_I_PHY_ID 0x01410C30 e1000_hw.h 　
15423
 M88E1011_I_PHY_IDM88E1011_I_PHY_ID 0x01410C20 e1000_hw.h 　
15424
 IGP01E1000_I_PHY_IDIGP01E1000_I_PHY_ID 0x02A80380 e1000_hw.h 　
15425
 M88E1000_12_PHY_IDM88E1000_12_PHY_ID M88E1000_E_PHY_ID e1000_hw.h 　
15426
 M88E1000_14_PHY_IDM88E1000_14_PHY_ID M88E1000_E_PHY_ID e1000_hw.h 　
15427
 M88E1011_I_REV_4M88E1011_I_REV_4 0x04 e1000_hw.h 　
15428
 M88E1111_I_PHY_IDM88E1111_I_PHY_ID 0x01410CC0 e1000_hw.h 　
15429
 L1LXT971A_PHY_IDL1LXT971A_PHY_ID 0x001378E0 e1000_hw.h 　
15430
 GG82563_E_PHY_IDGG82563_E_PHY_ID 0x01410CA0 e1000_hw.h 　
15431
 PHY_PAGE_SHIFTPHY_PAGE_SHIFT 5 e1000_hw.h 　
15432
 IGP3_PHY_PORT_CTRLIGP3_PHY_PORT_CTRL PHY_REG(769, 17) e1000_hw.h Port General Configuration
15433
 IGP3_PHY_RATE_ADAPT_CTRLIGP3_PHY_RATE_ADAPT_CTRL PHY_REG(769, 25) e1000_hw.h Rate Adapter Control Register
15434
 IGP3_KMRN_FIFO_CTRL_STATSIGP3_KMRN_FIFO_CTRL_STATS PHY_REG(770, 16) e1000_hw.h KMRN FIFO's control/status register
15435
 IGP3_KMRN_POWER_MNG_CTRLIGP3_KMRN_POWER_MNG_CTRL PHY_REG(770, 17) e1000_hw.h KMRN Power Management Control Register
15436
 IGP3_KMRN_INBAND_CTRLIGP3_KMRN_INBAND_CTRL PHY_REG(770, 18) e1000_hw.h KMRN Inband Control Register
15437
 IGP3_KMRN_DIAGIGP3_KMRN_DIAG PHY_REG(770, 19) e1000_hw.h KMRN Diagnostic register
15438
 IGP3_KMRN_DIAG_PCS_LOCK_LOSSIGP3_KMRN_DIAG_PCS_LOCK_LOSS 0x0002 e1000_hw.h RX PCS is not synced
15439
 IGP3_KMRN_ACK_TIMEOUTIGP3_KMRN_ACK_TIMEOUT PHY_REG(770, 20) e1000_hw.h KMRN Acknowledge Timeouts register
15440
 IGP3_VR_CTRLIGP3_VR_CTRL PHY_REG(776, 18) e1000_hw.h Voltage regulator control register
15441
 IGP3_VR_CTRL_MODE_SHUTIGP3_VR_CTRL_MODE_SHUT 0x0200 e1000_hw.h Enter powerdown, shutdown VRs
15442
 IGP3_VR_CTRL_MODE_MASKIGP3_VR_CTRL_MODE_MASK 0x0300 e1000_hw.h Shutdown VR Mask
15443
 IGP3_CAPABILITYIGP3_CAPABILITY PHY_REG(776, 19) e1000_hw.h IGP3 Capability Register
15444
 IGP3_CAP_INITIATE_TEAMIGP3_CAP_INITIATE_TEAM 0x0001 e1000_hw.h Able to initiate a team
15445
 IGP3_CAP_WFMIGP3_CAP_WFM 0x0002 e1000_hw.h Support WoL and PXE
15446
 IGP3_CAP_ASFIGP3_CAP_ASF 0x0004 e1000_hw.h Support ASF
15447
 IGP3_CAP_LPLUIGP3_CAP_LPLU 0x0008 e1000_hw.h Support Low Power Link Up
15448
 IGP3_CAP_DC_AUTO_SPEEDIGP3_CAP_DC_AUTO_SPEED 0x0010 e1000_hw.h Support AC/DC Auto Link Speed
15449
 IGP3_CAP_SPDIGP3_CAP_SPD 0x0020 e1000_hw.h Support Smart Power Down
15450
 IGP3_CAP_MULT_QUEUEIGP3_CAP_MULT_QUEUE 0x0040 e1000_hw.h Support 2 tx & 2 rx queues
15451
 IGP3_CAP_RSSIGP3_CAP_RSS 0x0080 e1000_hw.h Support RSS
15452
 IGP3_CAP_8021PQIGP3_CAP_8021PQ 0x0100 e1000_hw.h Support 802.1Q & 802.1p
15453
 IGP3_CAP_AMT_CBIGP3_CAP_AMT_CB 0x0200 e1000_hw.h Support active manageability and circuit breaker
15454
 IGP3_PPC_JORDAN_ENIGP3_PPC_JORDAN_EN 0x0001 e1000_hw.h 　
15455
 IGP3_PPC_JORDAN_GIGA_SPEEDIGP3_PPC_JORDAN_GIGA_SPEED 0x0002 e1000_hw.h 　
15456
 IGP3_KMRN_PMC_EE_IDLE_LINK_DISIGP3_KMRN_PMC_EE_IDLE_LINK_DIS 0x0001 e1000_hw.h 　
15457
 IGP3_KMRN_PMC_K0S_ENTRY_LATENCYIGP3_KMRN_PMC_K0S_ENTRY_LATENCY 0x001E e1000_hw.h 　
15458
 IGP3_KMRN_PMC_K0S_MODE1_EN_GIGAIGP3_KMRN_PMC_K0S_MODE1_EN_GIGA 0x0020 e1000_hw.h 　
15459
 IGP3_KMRN_PMC_K0S_MODE1_EN_100IGP3_KMRN_PMC_K0S_MODE1_EN_100 0x0040 e1000_hw.h 　
15460
 IGP3E1000_PHY_MISC_CTRLIGP3E1000_PHY_MISC_CTRL 0x1B e1000_hw.h Misc. Ctrl register
15461
 IGP3_PHY_MISC_DUPLEX_MANUAL_SETIGP3_PHY_MISC_DUPLEX_MANUAL_SET 0x1000 e1000_hw.h Duplex Manual Set
15462
 IGP3_KMRN_EXT_CTRLIGP3_KMRN_EXT_CTRL PHY_REG(770, 18) e1000_hw.h 　
15463
 IGP3_KMRN_EC_DIS_INBANDIGP3_KMRN_EC_DIS_INBAND 0x0080 e1000_hw.h 　
15464
 IGP03E1000_E_PHY_IDIGP03E1000_E_PHY_ID 0x02A80390 e1000_hw.h 　
15465
 IFE_E_PHY_IDIFE_E_PHY_ID 0x02A80330 e1000_hw.h 10/100 PHY
15466
 IFE_PLUS_E_PHY_IDIFE_PLUS_E_PHY_ID 0x02A80320 e1000_hw.h 　
15467
 IFE_C_E_PHY_IDIFE_C_E_PHY_ID 0x02A80310 e1000_hw.h 　
15468
 IFE_PHY_EXTENDED_STATUS_CONTROLIFE_PHY_EXTENDED_STATUS_CONTROL 0x10 e1000_hw.h 100BaseTx Extended Status, Control and Address
15469
 IFE_PHY_SPECIAL_CONTROLIFE_PHY_SPECIAL_CONTROL 0x11 e1000_hw.h 100BaseTx PHY special control register
15470
 IFE_PHY_RCV_FALSE_CARRIERIFE_PHY_RCV_FALSE_CARRIER 0x13 e1000_hw.h 100BaseTx Receive False Carrier Counter
15471
 IFE_PHY_RCV_DISCONNECTIFE_PHY_RCV_DISCONNECT 0x14 e1000_hw.h 100BaseTx Receive Disconnet Counter
15472
 IFE_PHY_RCV_ERROT_FRAMEIFE_PHY_RCV_ERROT_FRAME 0x15 e1000_hw.h 100BaseTx Receive Error Frame Counter
15473
 IFE_PHY_RCV_SYMBOL_ERRIFE_PHY_RCV_SYMBOL_ERR 0x16 e1000_hw.h Receive Symbol Error Counter
15474
 IFE_PHY_PREM_EOF_ERRIFE_PHY_PREM_EOF_ERR 0x17 e1000_hw.h 100BaseTx Receive Premature End Of Frame Error Counter
15475
 IFE_PHY_RCV_EOF_ERRIFE_PHY_RCV_EOF_ERR 0x18 e1000_hw.h 10BaseT Receive End Of Frame Error Counter
15476
 IFE_PHY_TX_JABBER_DETECTIFE_PHY_TX_JABBER_DETECT 0x19 e1000_hw.h 10BaseT Transmit Jabber Detect Counter
15477
 IFE_PHY_EQUALIZERIFE_PHY_EQUALIZER 0x1A e1000_hw.h PHY Equalizer Control and Status
15478
 IFE_PHY_SPECIAL_CONTROL_LEDIFE_PHY_SPECIAL_CONTROL_LED 0x1B e1000_hw.h PHY special control and LED configuration
15479
 IFE_PHY_MDIX_CONTROLIFE_PHY_MDIX_CONTROL 0x1C e1000_hw.h MDI/MDI-X Control register
15480
 IFE_PHY_HWI_CONTROLIFE_PHY_HWI_CONTROL 0x1D e1000_hw.h Hardware Integrity Control (HWI)
15481
 IFE_PESC_REDUCED_POWER_DOWN_DISIFE_PESC_REDUCED_POWER_DOWN_DIS 0x2000 e1000_hw.h Defaut 1 = Disable auto reduced power down
15482
 IFE_PESC_100BTX_POWER_DOWNIFE_PESC_100BTX_POWER_DOWN 0x0400 e1000_hw.h Indicates the power state of 100BASE-TX
15483
 IFE_PESC_10BTX_POWER_DOWNIFE_PESC_10BTX_POWER_DOWN 0x0200 e1000_hw.h Indicates the power state of 10BASE-T
15484
 IFE_PESC_POLARITY_REVERSEDIFE_PESC_POLARITY_REVERSED 0x0100 e1000_hw.h Indicates 10BASE-T polarity
15485
 IFE_PESC_PHY_ADDR_MASKIFE_PESC_PHY_ADDR_MASK 0x007C e1000_hw.h Bit 6:2 for sampled PHY address
15486
 IFE_PESC_SPEEDIFE_PESC_SPEED 0x0002 e1000_hw.h Auto-negotiation speed result 1=100Mbs, 0=10Mbs
15487
 IFE_PESC_DUPLEXIFE_PESC_DUPLEX 0x0001 e1000_hw.h Auto-negotiation duplex result 1=Full, 0=Half
15488
 IFE_PESC_POLARITY_REVERSED_SHIFIFE_PESC_POLARITY_REVERSED_SHIF 8 e1000_hw.h 　
15489
 IFE_PSC_DISABLE_DYNAMIC_POWER_DIFE_PSC_DISABLE_DYNAMIC_POWER_D 0x0100 e1000_hw.h 1 = Dyanmic Power Down disabled
15490
 IFE_PSC_FORCE_POLARITYIFE_PSC_FORCE_POLARITY 0x0020 e1000_hw.h 1=Reversed Polarity, 0=Normal
15491
 IFE_PSC_AUTO_POLARITY_DISABLEIFE_PSC_AUTO_POLARITY_DISABLE 0x0010 e1000_hw.h 1=Auto Polarity Disabled, 0=Enabled
15492
 IFE_PSC_JABBER_FUNC_DISABLEIFE_PSC_JABBER_FUNC_DISABLE 0x0001 e1000_hw.h 1=Jabber Disabled, 0=Normal Jabber Operation
15493
 IFE_PSC_FORCE_POLARITY_SHIFTIFE_PSC_FORCE_POLARITY_SHIFT 5 e1000_hw.h 　
15494
 IFE_PSC_AUTO_POLARITY_DISABLE_SIFE_PSC_AUTO_POLARITY_DISABLE_S 4 e1000_hw.h 　
15495
 IFE_PMC_AUTO_MDIXIFE_PMC_AUTO_MDIX 0x0080 e1000_hw.h 1=enable MDI/MDI-X feature, default 0=disabled
15496
 IFE_PMC_FORCE_MDIXIFE_PMC_FORCE_MDIX 0x0040 e1000_hw.h 1=force MDIX-X, 0=force MDI
15497
 IFE_PMC_MDIX_STATUSIFE_PMC_MDIX_STATUS 0x0020 e1000_hw.h 1=MDI-X, 0=MDI
15498
 IFE_PMC_AUTO_MDIX_COMPLETEIFE_PMC_AUTO_MDIX_COMPLETE 0x0010 e1000_hw.h Resolution algorithm is completed
15499
 IFE_PMC_MDIX_MODE_SHIFTIFE_PMC_MDIX_MODE_SHIFT 6 e1000_hw.h 　
15500
 IFE_PHC_MDIX_RESET_ALL_MASKIFE_PHC_MDIX_RESET_ALL_MASK 0x0000 e1000_hw.h Disable auto MDI-X
15501
 IFE_PHC_HWI_ENABLEIFE_PHC_HWI_ENABLE 0x8000 e1000_hw.h Enable the HWI feature
15502
 IFE_PHC_ABILITY_CHECKIFE_PHC_ABILITY_CHECK 0x4000 e1000_hw.h 1= Test Passed, 0=failed
15503
 IFE_PHC_TEST_EXECIFE_PHC_TEST_EXEC 0x2000 e1000_hw.h PHY launch test pulses on the wire
15504
 IFE_PHC_HIGHZIFE_PHC_HIGHZ 0x0200 e1000_hw.h 1 = Open Circuit
15505
 IFE_PHC_LOWZIFE_PHC_LOWZ 0x0400 e1000_hw.h 1 = Short Circuit
15506
 IFE_PHC_LOW_HIGH_Z_MASKIFE_PHC_LOW_HIGH_Z_MASK 0x0600 e1000_hw.h Mask for indication type of problem on the line
15507
 IFE_PHC_DISTANCE_MASKIFE_PHC_DISTANCE_MASK 0x01FF e1000_hw.h Mask for distance to the cable problem, in 80cm granularity
15508
 IFE_PHC_RESET_ALL_MASKIFE_PHC_RESET_ALL_MASK 0x0000 e1000_hw.h Disable HWI
15509
 IFE_PSCL_PROBE_MODEIFE_PSCL_PROBE_MODE 0x0020 e1000_hw.h LED Probe mode
15510
 IFE_PSCL_PROBE_LEDS_OFFIFE_PSCL_PROBE_LEDS_OFF 0x0006 e1000_hw.h Force LEDs 0 and 2 off
15511
 IFE_PSCL_PROBE_LEDS_ONIFE_PSCL_PROBE_LEDS_ON 0x0007 e1000_hw.h Force LEDs 0 and 2 on
15512
 ICH_FLASH_COMMAND_TIMEOUTICH_FLASH_COMMAND_TIMEOUT 5000 e1000_hw.h 5000 uSecs - adjusted
15513
 ICH_FLASH_ERASE_TIMEOUTICH_FLASH_ERASE_TIMEOUT 3000000 e1000_hw.h Up to 3 seconds - worst case
15514
 ICH_FLASH_CYCLE_REPEAT_COUNTICH_FLASH_CYCLE_REPEAT_COUNT 10 e1000_hw.h 10 cycles
15515
 ICH_FLASH_SEG_SIZE_256ICH_FLASH_SEG_SIZE_256 256 e1000_hw.h 　
15516
 ICH_FLASH_SEG_SIZE_4KICH_FLASH_SEG_SIZE_4K 4096 e1000_hw.h 　
15517
 ICH_FLASH_SEG_SIZE_64KICH_FLASH_SEG_SIZE_64K 65536 e1000_hw.h 　
15518
 ICH_CYCLE_READICH_CYCLE_READ 0x0 e1000_hw.h 　
15519
 ICH_CYCLE_RESERVEDICH_CYCLE_RESERVED 0x1 e1000_hw.h 　
15520
 ICH_CYCLE_WRITEICH_CYCLE_WRITE 0x2 e1000_hw.h 　
15521
 ICH_CYCLE_ERASEICH_CYCLE_ERASE 0x3 e1000_hw.h 　
15522
 ICH_FLASH_GFPREGICH_FLASH_GFPREG 0x0000 e1000_hw.h 　
15523
 ICH_FLASH_HSFSTSICH_FLASH_HSFSTS 0x0004 e1000_hw.h 　
15524
 ICH_FLASH_HSFCTLICH_FLASH_HSFCTL 0x0006 e1000_hw.h 　
15525
 ICH_FLASH_FADDRICH_FLASH_FADDR 0x0008 e1000_hw.h 　
15526
 ICH_FLASH_FDATA0ICH_FLASH_FDATA0 0x0010 e1000_hw.h 　
15527
 ICH_FLASH_FRACCICH_FLASH_FRACC 0x0050 e1000_hw.h 　
15528
 ICH_FLASH_FREG0ICH_FLASH_FREG0 0x0054 e1000_hw.h 　
15529
 ICH_FLASH_FREG1ICH_FLASH_FREG1 0x0058 e1000_hw.h 　
15530
 ICH_FLASH_FREG2ICH_FLASH_FREG2 0x005C e1000_hw.h 　
15531
 ICH_FLASH_FREG3ICH_FLASH_FREG3 0x0060 e1000_hw.h 　
15532
 ICH_FLASH_FPR0ICH_FLASH_FPR0 0x0074 e1000_hw.h 　
15533
 ICH_FLASH_FPR1ICH_FLASH_FPR1 0x0078 e1000_hw.h 　
15534
 ICH_FLASH_SSFSTSICH_FLASH_SSFSTS 0x0090 e1000_hw.h 　
15535
 ICH_FLASH_SSFCTLICH_FLASH_SSFCTL 0x0092 e1000_hw.h 　
15536
 ICH_FLASH_PREOPICH_FLASH_PREOP 0x0094 e1000_hw.h 　
15537
 ICH_FLASH_OPTYPEICH_FLASH_OPTYPE 0x0096 e1000_hw.h 　
15538
 ICH_FLASH_OPMENUICH_FLASH_OPMENU 0x0098 e1000_hw.h 　
15539
 ICH_FLASH_REG_MAPSIZEICH_FLASH_REG_MAPSIZE 0x00A0 e1000_hw.h 　
15540
 ICH_FLASH_SECTOR_SIZEICH_FLASH_SECTOR_SIZE 4096 e1000_hw.h 　
15541
 ICH_GFPREG_BASE_MASKICH_GFPREG_BASE_MASK 0x1FFF e1000_hw.h 　
15542
 ICH_FLASH_LINEAR_ADDR_MASKICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF e1000_hw.h 　
15543
 PHY_PREAMBLEPHY_PREAMBLE 0xFFFFFFFF e1000_hw.h 　
15544
 PHY_SOFPHY_SOF 0x01 e1000_hw.h 　
15545
 PHY_OP_READPHY_OP_READ 0x02 e1000_hw.h 　
15546
 PHY_OP_WRITEPHY_OP_WRITE 0x01 e1000_hw.h 　
15547
 PHY_TURNAROUNDPHY_TURNAROUND 0x02 e1000_hw.h 　
15548
 PHY_PREAMBLE_SIZEPHY_PREAMBLE_SIZE 32 e1000_hw.h 　
15549
 MII_CR_SPEED_1000MII_CR_SPEED_1000 0x0040 e1000_hw.h 　
15550
 MII_CR_SPEED_100MII_CR_SPEED_100 0x2000 e1000_hw.h 　
15551
 MII_CR_SPEED_10MII_CR_SPEED_10 0x0000 e1000_hw.h 　
15552
 E1000_PHY_ADDRESSE1000_PHY_ADDRESS 0x01 e1000_hw.h 　
15553
 PHY_AUTO_NEG_TIMEPHY_AUTO_NEG_TIME 45 e1000_hw.h 4.5 Seconds
15554
 PHY_FORCE_TIMEPHY_FORCE_TIME 20 e1000_hw.h 2.0 Seconds
15555
 PHY_REVISION_MASKPHY_REVISION_MASK 0xFFFFFFF0 e1000_hw.h 　
15556
 DEVICE_SPEED_MASKDEVICE_SPEED_MASK 0x00000300 e1000_hw.h Device Ctrl Reg Speed Mask
15557
 REG4_SPEED_MASKREG4_SPEED_MASK 0x01E0 e1000_hw.h 　
15558
 REG9_SPEED_MASKREG9_SPEED_MASK 0x0300 e1000_hw.h 　
15559
 ADVERTISE_10_HALFADVERTISE_10_HALF 0x0001 e1000_hw.h 　
15560
 ADVERTISE_10_FULLADVERTISE_10_FULL 0x0002 e1000_hw.h 　
15561
 ADVERTISE_100_HALFADVERTISE_100_HALF 0x0004 e1000_hw.h 　
15562
 ADVERTISE_100_FULLADVERTISE_100_FULL 0x0008 e1000_hw.h 　
15563
 ADVERTISE_1000_HALFADVERTISE_1000_HALF 0x0010 e1000_hw.h 　
15564
 ADVERTISE_1000_FULLADVERTISE_1000_FULL 0x0020 e1000_hw.h 　
15565
 AUTONEG_ADVERTISE_SPEED_DEFAULTAUTONEG_ADVERTISE_SPEED_DEFAULT 0x002F e1000_hw.h Everything but 1000-Half
15566
 AUTONEG_ADVERTISE_10_100_ALLAUTONEG_ADVERTISE_10_100_ALL 0x000F e1000_hw.h All 10/100 speeds
15567
 AUTONEG_ADVERTISE_10_ALLAUTONEG_ADVERTISE_10_ALL 0x0003 e1000_hw.h 10Mbps Full & Half speeds
15568
 DEBUGOUT2DEBUGOUT2 DEBUGOUT1 e1000_osdep.h 　
15569
 DEBUGOUT3DEBUGOUT3 DEBUGOUT1 e1000_osdep.h 　
15570
 DEBUGOUT7DEBUGOUT7 DEBUGOUT1 e1000_osdep.h 　
15571
 E1000_READ_REG_ARRAY_DWORDE1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY e1000_osdep.h 　
15572
 E1000_WRITE_REG_ARRAY_DWORDE1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY e1000_osdep.h 　
15573
 PHN_MAX_NUM_PORTSPHN_MAX_NUM_PORTS 4 phantom.c 　
15574
 PHN_CMDPEG_INIT_TIMEOUT_SECPHN_CMDPEG_INIT_TIMEOUT_SEC 50 phantom.c 　
15575
 PHN_RCVPEG_INIT_TIMEOUT_SECPHN_RCVPEG_INIT_TIMEOUT_SEC 2 phantom.c 　
15576
 PHN_ISSUE_CMD_TIMEOUT_MSPHN_ISSUE_CMD_TIMEOUT_MS 2000 phantom.c 　
15577
 PHN_TEST_MEM_TIMEOUT_MSPHN_TEST_MEM_TIMEOUT_MS 100 phantom.c 　
15578
 PHN_CLP_CMD_TIMEOUT_MSPHN_CLP_CMD_TIMEOUT_MS 500 phantom.c 　
15579
 PHN_LINK_POLL_FREQUENCYPHN_LINK_POLL_FREQUENCY 4096 phantom.c 　
15580
 PHN_NUM_RDSPHN_NUM_RDS 32 phantom.c 　
15581
 PHN_RDS_MAX_FILLPHN_RDS_MAX_FILL 16 phantom.c 　
15582
 PHN_RX_BUFSIZEPHN_RX_BUFSIZE ( 32 + \ ETH_FRAME_LEN ) phantom.c 　
15583
 PHN_NUM_SDSPHN_NUM_SDS 32 phantom.c 　
15584
 PHN_NUM_CDSPHN_NUM_CDS 8 phantom.c 　
15585
 PHN_CLP_TAG_MAGICPHN_CLP_TAG_MAGIC 0xc19c1900UL phantom.c 　
15586
 PHN_CLP_TAG_MAGIC_MASKPHN_CLP_TAG_MAGIC_MASK 0xffffff00UL phantom.c 　
15587
 PHN_CLP_BLKSIZEPHN_CLP_BLKSIZE ( sizeof ( union phantom_clp_data ) ) phantom.c 　
15588
 NX_CDRP_CLEARNX_CDRP_CLEAR 0x00000000 nxhal_nic_interface.h 　
15589
 NX_CDRP_CMD_BITNX_CDRP_CMD_BIT 0x80000000 nxhal_nic_interface.h 　
15590
 NX_CDRP_RSP_OKNX_CDRP_RSP_OK 0x00000001 nxhal_nic_interface.h 　
15591
 NX_CDRP_RSP_FAILNX_CDRP_RSP_FAIL 0x00000002 nxhal_nic_interface.h 　
15592
 NX_CDRP_RSP_TIMEOUTNX_CDRP_RSP_TIMEOUT 0x00000003 nxhal_nic_interface.h 　
15593
 NX_CDRP_CMD_SUBMIT_CAPABILITIESNX_CDRP_CMD_SUBMIT_CAPABILITIES 0x00000001 nxhal_nic_interface.h 　
15594
 NX_CDRP_CMD_READ_MAX_RDS_PER_CTNX_CDRP_CMD_READ_MAX_RDS_PER_CT 0x00000002 nxhal_nic_interface.h 　
15595
 NX_CDRP_CMD_READ_MAX_SDS_PER_CTNX_CDRP_CMD_READ_MAX_SDS_PER_CT 0x00000003 nxhal_nic_interface.h 　
15596
 NX_CDRP_CMD_READ_MAX_RULES_PER_NX_CDRP_CMD_READ_MAX_RULES_PER_ 0x00000004 nxhal_nic_interface.h 　
15597
 NX_CDRP_CMD_READ_MAX_RX_CTXNX_CDRP_CMD_READ_MAX_RX_CTX 0x00000005 nxhal_nic_interface.h 　
15598
 NX_CDRP_CMD_READ_MAX_TX_CTXNX_CDRP_CMD_READ_MAX_TX_CTX 0x00000006 nxhal_nic_interface.h 　
15599
 NX_CDRP_CMD_CREATE_RX_CTXNX_CDRP_CMD_CREATE_RX_CTX 0x00000007 nxhal_nic_interface.h 　
15600
 NX_CDRP_CMD_DESTROY_RX_CTXNX_CDRP_CMD_DESTROY_RX_CTX 0x00000008 nxhal_nic_interface.h 　
15601
 NX_CDRP_CMD_CREATE_TX_CTXNX_CDRP_CMD_CREATE_TX_CTX 0x00000009 nxhal_nic_interface.h 　
15602
 NX_CDRP_CMD_DESTROY_TX_CTXNX_CDRP_CMD_DESTROY_TX_CTX 0x0000000a nxhal_nic_interface.h 　
15603
 NX_CDRP_CMD_SETUP_STATISTICSNX_CDRP_CMD_SETUP_STATISTICS 0x0000000e nxhal_nic_interface.h 　
15604
 NX_CDRP_CMD_GET_STATISTICSNX_CDRP_CMD_GET_STATISTICS 0x0000000f nxhal_nic_interface.h 　
15605
 NX_CDRP_CMD_DELETE_STATISTICSNX_CDRP_CMD_DELETE_STATISTICS 0x00000010 nxhal_nic_interface.h 　
15606
 NX_CDRP_CMD_MAXNX_CDRP_CMD_MAX 0x00000011 nxhal_nic_interface.h 　
15607
 NX_CAP0_LEGACY_CONTEXTNX_CAP0_LEGACY_CONTEXT NX_CAP_BIT(0, 0) nxhal_nic_interface.h 　
15608
 NX_CAP0_MULTI_CONTEXTNX_CAP0_MULTI_CONTEXT NX_CAP_BIT(0, 1) nxhal_nic_interface.h 　
15609
 NX_CAP0_LEGACY_MNNX_CAP0_LEGACY_MN NX_CAP_BIT(0, 2) nxhal_nic_interface.h 　
15610
 NX_CAP0_LEGACY_MSNX_CAP0_LEGACY_MS NX_CAP_BIT(0, 3) nxhal_nic_interface.h 　
15611
 NX_CAP0_CUT_THROUGHNX_CAP0_CUT_THROUGH NX_CAP_BIT(0, 4) nxhal_nic_interface.h 　
15612
 NX_CAP0_LRONX_CAP0_LRO NX_CAP_BIT(0, 5) nxhal_nic_interface.h 　
15613
 NX_CAP0_LSONX_CAP0_LSO NX_CAP_BIT(0, 6) nxhal_nic_interface.h 　
15614
 NX_CAP1_NICNX_CAP1_NIC NX_CAP_BIT(1, 0) nxhal_nic_interface.h 　
15615
 NX_CAP1_PXENX_CAP1_PXE NX_CAP_BIT(1, 1) nxhal_nic_interface.h 　
15616
 NX_CAP1_CHIMNEYNX_CAP1_CHIMNEY NX_CAP_BIT(1, 2) nxhal_nic_interface.h 　
15617
 NX_CAP1_LSANX_CAP1_LSA NX_CAP_BIT(1, 3) nxhal_nic_interface.h 　
15618
 NX_CAP1_RDMANX_CAP1_RDMA NX_CAP_BIT(1, 4) nxhal_nic_interface.h 　
15619
 NX_CAP1_ISCSINX_CAP1_ISCSI NX_CAP_BIT(1, 5) nxhal_nic_interface.h 　
15620
 NX_CAP1_FCOENX_CAP1_FCOE NX_CAP_BIT(1, 6) nxhal_nic_interface.h 　
15621
 NX_RX_RULETYPE_DEFAULTNX_RX_RULETYPE_DEFAULT 0 nxhal_nic_interface.h 　
15622
 NX_RX_RULETYPE_MACNX_RX_RULETYPE_MAC 1 nxhal_nic_interface.h 　
15623
 NX_RX_RULETYPE_MAC_VLANNX_RX_RULETYPE_MAC_VLAN 2 nxhal_nic_interface.h 　
15624
 NX_RX_RULETYPE_MAC_RSSNX_RX_RULETYPE_MAC_RSS 3 nxhal_nic_interface.h 　
15625
 NX_RX_RULETYPE_MAC_VLAN_RSSNX_RX_RULETYPE_MAC_VLAN_RSS 4 nxhal_nic_interface.h 　
15626
 NX_RX_RULETYPE_MAXNX_RX_RULETYPE_MAX 5 nxhal_nic_interface.h 　
15627
 NX_RX_RULECMD_ADDNX_RX_RULECMD_ADD 0 nxhal_nic_interface.h 　
15628
 NX_RX_RULECMD_REMOVENX_RX_RULECMD_REMOVE 1 nxhal_nic_interface.h 　
15629
 NX_RX_RULECMD_MAXNX_RX_RULECMD_MAX 2 nxhal_nic_interface.h 　
15630
 NX_HOST_CTX_STATE_FREEDNX_HOST_CTX_STATE_FREED 0 nxhal_nic_interface.h Invalid state
15631
 NX_HOST_CTX_STATE_ALLOCATEDNX_HOST_CTX_STATE_ALLOCATED 1 nxhal_nic_interface.h Not committed
15632
 NX_HOST_CTX_STATE_ACTIVENX_HOST_CTX_STATE_ACTIVE 2 nxhal_nic_interface.h 　
15633
 NX_HOST_CTX_STATE_DISABLEDNX_HOST_CTX_STATE_DISABLED 3 nxhal_nic_interface.h 　
15634
 NX_HOST_CTX_STATE_QUIESCEDNX_HOST_CTX_STATE_QUIESCED 4 nxhal_nic_interface.h 　
15635
 NX_HOST_CTX_STATE_MAXNX_HOST_CTX_STATE_MAX 5 nxhal_nic_interface.h 　
15636
 NX_HOST_INT_CRB_MODE_UNIQUENX_HOST_INT_CRB_MODE_UNIQUE 0 nxhal_nic_interface.h 　
15637
 NX_HOST_INT_CRB_MODE_SHAREDNX_HOST_INT_CRB_MODE_SHARED 1 nxhal_nic_interface.h <= LEGACY
15638
 NX_HOST_INT_CRB_MODE_NORXNX_HOST_INT_CRB_MODE_NORX 2 nxhal_nic_interface.h 　
15639
 NX_HOST_INT_CRB_MODE_NOTXNX_HOST_INT_CRB_MODE_NOTX 3 nxhal_nic_interface.h 　
15640
 NX_HOST_INT_CRB_MODE_NORXTXNX_HOST_INT_CRB_MODE_NORXTX 4 nxhal_nic_interface.h 　
15641
 NX_DESTROY_CTX_RESETNX_DESTROY_CTX_RESET 0 nxhal_nic_interface.h 　
15642
 NX_DESTROY_CTX_D3_RESETNX_DESTROY_CTX_D3_RESET 1 nxhal_nic_interface.h 　
15643
 NX_DESTROY_CTX_MAXNX_DESTROY_CTX_MAX 2 nxhal_nic_interface.h 　
15644
 NX_HOST_RDS_CRB_MODE_UNIQUENX_HOST_RDS_CRB_MODE_UNIQUE 0 nxhal_nic_interface.h <= LEGACY
15645
 NX_HOST_RDS_CRB_MODE_SHAREDNX_HOST_RDS_CRB_MODE_SHARED 1 nxhal_nic_interface.h 　
15646
 NX_HOST_RDS_CRB_MODE_CUSTOMNX_HOST_RDS_CRB_MODE_CUSTOM 2 nxhal_nic_interface.h 　
15647
 NX_HOST_RDS_CRB_MODE_MAXNX_HOST_RDS_CRB_MODE_MAX 3 nxhal_nic_interface.h 　
15648
 NX_RDS_RING_TYPE_NORMALNX_RDS_RING_TYPE_NORMAL 0 nxhal_nic_interface.h 　
15649
 NX_RDS_RING_TYPE_JUMBONX_RDS_RING_TYPE_JUMBO 1 nxhal_nic_interface.h 　
15650
 NX_RDS_RING_TYPE_LRONX_RDS_RING_TYPE_LRO 2 nxhal_nic_interface.h 　
15651
 NX_RDS_RING_TYPE_MAXNX_RDS_RING_TYPE_MAX 3 nxhal_nic_interface.h 　
15652
 NX_STATISTICS_MODE_INVALIDNX_STATISTICS_MODE_INVALID 0 nxhal_nic_interface.h 　
15653
 NX_STATISTICS_MODE_PULLNX_STATISTICS_MODE_PULL 1 nxhal_nic_interface.h 　
15654
 NX_STATISTICS_MODE_PUSHNX_STATISTICS_MODE_PUSH 2 nxhal_nic_interface.h 　
15655
 NX_STATISTICS_MODE_SINGLE_SHOTNX_STATISTICS_MODE_SINGLE_SHOT 3 nxhal_nic_interface.h 　
15656
 NX_STATISTICS_MODE_MAXNX_STATISTICS_MODE_MAX 4 nxhal_nic_interface.h 　
15657
 NX_STATISTICS_TYPE_INVALIDNX_STATISTICS_TYPE_INVALID 0 nxhal_nic_interface.h 　
15658
 NX_STATISTICS_TYPE_NIC_RX_CORENX_STATISTICS_TYPE_NIC_RX_CORE 1 nxhal_nic_interface.h 　
15659
 NX_STATISTICS_TYPE_NIC_TX_CORENX_STATISTICS_TYPE_NIC_TX_CORE 2 nxhal_nic_interface.h 　
15660
 NX_STATISTICS_TYPE_NIC_RX_ALLNX_STATISTICS_TYPE_NIC_RX_ALL 3 nxhal_nic_interface.h 　
15661
 NX_STATISTICS_TYPE_NIC_TX_ALLNX_STATISTICS_TYPE_NIC_TX_ALL 4 nxhal_nic_interface.h 　
15662
 NX_STATISTICS_TYPE_MAXNX_STATISTICS_TYPE_MAX 5 nxhal_nic_interface.h 　
15663
 NXHAL_VERSIONNXHAL_VERSION 1 phantom.h 　
15664
 UNM_DMA_BUFFER_ALIGNUNM_DMA_BUFFER_ALIGN 16 phantom.h 　
15665
 __unm_dma_aligned__unm_dma_aligned __attribute__ (( aligned ( UNM_DMA_BUFFER_ALIGN ) )) phantom.h 　
15666
 UNM_128M_CRB_WINDOWUNM_128M_CRB_WINDOW 0x6110210UL phantom.h 　
15667
 UNM_32M_CRB_WINDOWUNM_32M_CRB_WINDOW 0x0110210UL phantom.h 　
15668
 UNM_2M_CRB_WINDOWUNM_2M_CRB_WINDOW 0x0130060UL phantom.h 　
15669
 UNM_CRB_PCIEUNM_CRB_PCIE UNM_CRB_BASE ( UNM_CRB_BLK_PCIE ) phantom.h 　
15670
 UNM_PCIE_SEM2_LOCKUNM_PCIE_SEM2_LOCK ( UNM_CRB_PCIE + 0x1c010 ) phantom.h 　
15671
 UNM_PCIE_SEM2_UNLOCKUNM_PCIE_SEM2_UNLOCK ( UNM_CRB_PCIE + 0x1c014 ) phantom.h 　
15672
 UNM_CRB_CAMUNM_CRB_CAM UNM_CRB_BASE ( UNM_CRB_BLK_CAM ) phantom.h 　
15673
 UNM_CAM_RAMUNM_CAM_RAM ( UNM_CRB_CAM + 0x02000 ) phantom.h 　
15674
 UNM_CAM_RAM_PORT_MODEUNM_CAM_RAM_PORT_MODE ( UNM_CAM_RAM + 0x00024 ) phantom.h 　
15675
 UNM_CAM_RAM_PORT_MODE_AUTO_NEGUNM_CAM_RAM_PORT_MODE_AUTO_NEG 4 phantom.h 　
15676
 UNM_CAM_RAM_PORT_MODE_AUTO_NEG_UNM_CAM_RAM_PORT_MODE_AUTO_NEG_ 5 phantom.h 　
15677
 UNM_CAM_RAM_DMESG_SIG_MAGICUNM_CAM_RAM_DMESG_SIG_MAGIC 0xcafebabeUL phantom.h 　
15678
 UNM_CAM_RAM_NUM_DMESG_BUFFERSUNM_CAM_RAM_NUM_DMESG_BUFFERS 5 phantom.h 　
15679
 UNM_CAM_RAM_CLP_COMMANDUNM_CAM_RAM_CLP_COMMAND ( UNM_CAM_RAM + 0x000c0 ) phantom.h 　
15680
 UNM_CAM_RAM_CLP_COMMAND_LASTUNM_CAM_RAM_CLP_COMMAND_LAST 0x00000080UL phantom.h 　
15681
 UNM_CAM_RAM_CLP_DATA_LOUNM_CAM_RAM_CLP_DATA_LO ( UNM_CAM_RAM + 0x000c4 ) phantom.h 　
15682
 UNM_CAM_RAM_CLP_DATA_HIUNM_CAM_RAM_CLP_DATA_HI ( UNM_CAM_RAM + 0x000c8 ) phantom.h 　
15683
 UNM_CAM_RAM_CLP_STATUSUNM_CAM_RAM_CLP_STATUS ( UNM_CAM_RAM + 0x000cc ) phantom.h 　
15684
 UNM_CAM_RAM_CLP_STATUS_STARTUNM_CAM_RAM_CLP_STATUS_START 0x00000001UL phantom.h 　
15685
 UNM_CAM_RAM_CLP_STATUS_DONEUNM_CAM_RAM_CLP_STATUS_DONE 0x00000002UL phantom.h 　
15686
 UNM_CAM_RAM_CLP_STATUS_ERRORUNM_CAM_RAM_CLP_STATUS_ERROR 0x0000ff00UL phantom.h 　
15687
 UNM_CAM_RAM_CLP_STATUS_UNINITIAUNM_CAM_RAM_CLP_STATUS_UNINITIA 0xffffffffUL phantom.h 　
15688
 UNM_CAM_RAM_BOOT_ENABLEUNM_CAM_RAM_BOOT_ENABLE ( UNM_CAM_RAM + 0x000fc ) phantom.h 　
15689
 UNM_CAM_RAM_WOL_PORT_MODEUNM_CAM_RAM_WOL_PORT_MODE ( UNM_CAM_RAM + 0x00198 ) phantom.h 　
15690
 UNM_CAM_RAM_MAC_ADDRSUNM_CAM_RAM_MAC_ADDRS ( UNM_CAM_RAM + 0x001c0 ) phantom.h 　
15691
 UNM_CAM_RAM_COLD_BOOTUNM_CAM_RAM_COLD_BOOT ( UNM_CAM_RAM + 0x001fc ) phantom.h 　
15692
 UNM_CAM_RAM_COLD_BOOT_MAGICUNM_CAM_RAM_COLD_BOOT_MAGIC 0x55555555UL phantom.h 　
15693
 UNM_NIC_REGUNM_NIC_REG ( UNM_CRB_CAM + 0x02200 ) phantom.h 　
15694
 UNM_NIC_REG_NX_CDRPUNM_NIC_REG_NX_CDRP ( UNM_NIC_REG + 0x00018 ) phantom.h 　
15695
 UNM_NIC_REG_NX_ARG1UNM_NIC_REG_NX_ARG1 ( UNM_NIC_REG + 0x0001c ) phantom.h 　
15696
 UNM_NIC_REG_NX_ARG2UNM_NIC_REG_NX_ARG2 ( UNM_NIC_REG + 0x00020 ) phantom.h 　
15697
 UNM_NIC_REG_NX_ARG3UNM_NIC_REG_NX_ARG3 ( UNM_NIC_REG + 0x00024 ) phantom.h 　
15698
 UNM_NIC_REG_NX_SIGNUNM_NIC_REG_NX_SIGN ( UNM_NIC_REG + 0x00028 ) phantom.h 　
15699
 UNM_NIC_REG_DUMMY_BUF_ADDR_HIUNM_NIC_REG_DUMMY_BUF_ADDR_HI ( UNM_NIC_REG + 0x0003c ) phantom.h 　
15700
 UNM_NIC_REG_DUMMY_BUF_ADDR_LOUNM_NIC_REG_DUMMY_BUF_ADDR_LO ( UNM_NIC_REG + 0x00040 ) phantom.h 　
15701
 UNM_NIC_REG_CMDPEG_STATEUNM_NIC_REG_CMDPEG_STATE ( UNM_NIC_REG + 0x00050 ) phantom.h 　
15702
 UNM_NIC_REG_CMDPEG_STATE_INITIAUNM_NIC_REG_CMDPEG_STATE_INITIA 0xff01 phantom.h 　
15703
 UNM_NIC_REG_CMDPEG_STATE_INITIAUNM_NIC_REG_CMDPEG_STATE_INITIA 0xf00f phantom.h 　
15704
 UNM_NIC_REG_DUMMY_BUFUNM_NIC_REG_DUMMY_BUF ( UNM_NIC_REG + 0x000fc ) phantom.h 　
15705
 UNM_NIC_REG_DUMMY_BUF_INITUNM_NIC_REG_DUMMY_BUF_INIT 0 phantom.h 　
15706
 UNM_NIC_REG_XG_STATE_P3UNM_NIC_REG_XG_STATE_P3 ( UNM_NIC_REG + 0x00098 ) phantom.h 　
15707
 UNM_NIC_REG_XG_STATE_P3_LINK_UPUNM_NIC_REG_XG_STATE_P3_LINK_UP 0x01 phantom.h 　
15708
 UNM_NIC_REG_XG_STATE_P3_LINK_DOUNM_NIC_REG_XG_STATE_P3_LINK_DO 0x02 phantom.h 　
15709
 UNM_NIC_REG_RCVPEG_STATEUNM_NIC_REG_RCVPEG_STATE ( UNM_NIC_REG + 0x0013c ) phantom.h 　
15710
 UNM_NIC_REG_RCVPEG_STATE_INITIAUNM_NIC_REG_RCVPEG_STATE_INITIA 0xff01 phantom.h 　
15711
 UNM_NIC_REG_SW_INT_MASK_0UNM_NIC_REG_SW_INT_MASK_0 ( UNM_NIC_REG + 0x001d8 ) phantom.h 　
15712
 UNM_NIC_REG_SW_INT_MASK_1UNM_NIC_REG_SW_INT_MASK_1 ( UNM_NIC_REG + 0x001e0 ) phantom.h 　
15713
 UNM_NIC_REG_SW_INT_MASK_2UNM_NIC_REG_SW_INT_MASK_2 ( UNM_NIC_REG + 0x001e4 ) phantom.h 　
15714
 UNM_NIC_REG_SW_INT_MASK_3UNM_NIC_REG_SW_INT_MASK_3 ( UNM_NIC_REG + 0x001e8 ) phantom.h 　
15715
 UNM_CRB_ROMUSBUNM_CRB_ROMUSB UNM_CRB_BASE ( UNM_CRB_BLK_ROMUSB ) phantom.h 　
15716
 UNM_ROMUSB_GLBUNM_ROMUSB_GLB ( UNM_CRB_ROMUSB + 0x00000 ) phantom.h 　
15717
 UNM_ROMUSB_GLB_STATUSUNM_ROMUSB_GLB_STATUS ( UNM_ROMUSB_GLB + 0x00004 ) phantom.h 　
15718
 UNM_ROMUSB_GLB_STATUS_ROM_DONEUNM_ROMUSB_GLB_STATUS_ROM_DONE ( 1 << 1 ) phantom.h 　
15719
 UNM_ROMUSB_GLB_SW_RESETUNM_ROMUSB_GLB_SW_RESET ( UNM_ROMUSB_GLB + 0x00008 ) phantom.h 　
15720
 UNM_ROMUSB_GLB_SW_RESET_MAGICUNM_ROMUSB_GLB_SW_RESET_MAGIC 0x0080000fUL phantom.h 　
15721
 UNM_ROMUSB_GLB_PEGTUNE_DONEUNM_ROMUSB_GLB_PEGTUNE_DONE ( UNM_ROMUSB_GLB + 0x0005c ) phantom.h 　
15722
 UNM_ROMUSB_GLB_PEGTUNE_DONE_MAGUNM_ROMUSB_GLB_PEGTUNE_DONE_MAG 0x31 phantom.h 　
15723
 UNM_ROMUSB_ROMUNM_ROMUSB_ROM ( UNM_CRB_ROMUSB + 0x10000 ) phantom.h 　
15724
 UNM_ROMUSB_ROM_INSTR_OPCODEUNM_ROMUSB_ROM_INSTR_OPCODE ( UNM_ROMUSB_ROM + 0x00004 ) phantom.h 　
15725
 UNM_ROMUSB_ROM_ADDRESSUNM_ROMUSB_ROM_ADDRESS ( UNM_ROMUSB_ROM + 0x00008 ) phantom.h 　
15726
 UNM_ROMUSB_ROM_WDATAUNM_ROMUSB_ROM_WDATA ( UNM_ROMUSB_ROM + 0x0000c ) phantom.h 　
15727
 UNM_ROMUSB_ROM_ABYTE_CNTUNM_ROMUSB_ROM_ABYTE_CNT ( UNM_ROMUSB_ROM + 0x00010 ) phantom.h 　
15728
 UNM_ROMUSB_ROM_DUMMY_BYTE_CNTUNM_ROMUSB_ROM_DUMMY_BYTE_CNT ( UNM_ROMUSB_ROM + 0x00014 ) phantom.h 　
15729
 UNM_ROMUSB_ROM_RDATAUNM_ROMUSB_ROM_RDATA ( UNM_ROMUSB_ROM + 0x00018 ) phantom.h 　
15730
 UNM_CRB_TESTUNM_CRB_TEST UNM_CRB_BASE ( UNM_CRB_BLK_TEST ) phantom.h 　
15731
 UNM_TEST_CONTROLUNM_TEST_CONTROL ( UNM_CRB_TEST + 0x00090 ) phantom.h 　
15732
 UNM_TEST_CONTROL_STARTUNM_TEST_CONTROL_START 0x01 phantom.h 　
15733
 UNM_TEST_CONTROL_ENABLEUNM_TEST_CONTROL_ENABLE 0x02 phantom.h 　
15734
 UNM_TEST_CONTROL_BUSYUNM_TEST_CONTROL_BUSY 0x08 phantom.h 　
15735
 UNM_TEST_ADDR_LOUNM_TEST_ADDR_LO ( UNM_CRB_TEST + 0x00094 ) phantom.h 　
15736
 UNM_TEST_ADDR_HIUNM_TEST_ADDR_HI ( UNM_CRB_TEST + 0x00098 ) phantom.h 　
15737
 UNM_TEST_RDDATA_LOUNM_TEST_RDDATA_LO ( UNM_CRB_TEST + 0x000a8 ) phantom.h 　
15738
 UNM_TEST_RDDATA_HIUNM_TEST_RDDATA_HI ( UNM_CRB_TEST + 0x000ac ) phantom.h 　
15739
 UNM_CRB_PEG_0UNM_CRB_PEG_0 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_0 ) phantom.h 　
15740
 UNM_PEG_0_HALT_STATUSUNM_PEG_0_HALT_STATUS ( UNM_CRB_PEG_0 + 0x00030 ) phantom.h 　
15741
 UNM_PEG_0_HALTUNM_PEG_0_HALT ( UNM_CRB_PEG_0 + 0x0003c ) phantom.h 　
15742
 UNM_CRB_PEG_1UNM_CRB_PEG_1 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_1 ) phantom.h 　
15743
 UNM_PEG_1_HALT_STATUSUNM_PEG_1_HALT_STATUS ( UNM_CRB_PEG_1 + 0x00030 ) phantom.h 　
15744
 UNM_PEG_1_HALTUNM_PEG_1_HALT ( UNM_CRB_PEG_1 + 0x0003c ) phantom.h 　
15745
 UNM_CRB_PEG_2UNM_CRB_PEG_2 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_2 ) phantom.h 　
15746
 UNM_PEG_2_HALT_STATUSUNM_PEG_2_HALT_STATUS ( UNM_CRB_PEG_2 + 0x00030 ) phantom.h 　
15747
 UNM_PEG_2_HALTUNM_PEG_2_HALT ( UNM_CRB_PEG_2 + 0x0003c ) phantom.h 　
15748
 UNM_CRB_PEG_3UNM_CRB_PEG_3 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_3 ) phantom.h 　
15749
 UNM_PEG_3_HALT_STATUSUNM_PEG_3_HALT_STATUS ( UNM_CRB_PEG_3 + 0x00030 ) phantom.h 　
15750
 UNM_PEG_3_HALTUNM_PEG_3_HALT ( UNM_CRB_PEG_3 + 0x0003c ) phantom.h 　
15751
 UNM_CRB_PEG_4UNM_CRB_PEG_4 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_4 ) phantom.h 　
15752
 UNM_PEG_4_HALT_STATUSUNM_PEG_4_HALT_STATUS ( UNM_CRB_PEG_4 + 0x00030 ) phantom.h 　
15753
 UNM_PEG_4_HALTUNM_PEG_4_HALT ( UNM_CRB_PEG_4 + 0x0003c ) phantom.h 　
15754
 GRF5101_ANTENNAGRF5101_ANTENNA 0xA3 rtl8180_grf5101.c 　
15755
 MAXIM_ANTENNAMAXIM_ANTENNA 0xb3 rtl8180_max2820.c 　
15756
 SA2400_ANTENNASA2400_ANTENNA 0x91 rtl8180_sa2400.c 　
15757
 SA2400_DIG_ANAPARAM_PWR1_ONSA2400_DIG_ANAPARAM_PWR1_ON 0x8 rtl8180_sa2400.c 　
15758
 SA2400_ANA_ANAPARAM_PWR1_ONSA2400_ANA_ANAPARAM_PWR1_ON 0x28 rtl8180_sa2400.c 　
15759
 SA2400_ANAPARAM_PWR0_ONSA2400_ANAPARAM_PWR0_ON 0x3 rtl8180_sa2400.c 　
15760
 SA2400_MAX_SENSSA2400_MAX_SENS 85 rtl8180_sa2400.c 　
15761
 SA2400_REG4_FIRDAC_SHIFTSA2400_REG4_FIRDAC_SHIFT 7 rtl8180_sa2400.c 　
15762
 RTL8225_ANAPARAM_ONRTL8225_ANAPARAM_ON 0xa0000b59 rtl8185_rtl8225.c 　
15763
 RTL8225_ANAPARAM2_ONRTL8225_ANAPARAM2_ON 0x860dec11 rtl8185_rtl8225.c 　
15764
 RTL8225_ANAPARAM_OFFRTL8225_ANAPARAM_OFF 0xa00beb59 rtl8185_rtl8225.c 　
15765
 RTL8225_ANAPARAM2_OFFRTL8225_ANAPARAM2_OFF 0x840dec11 rtl8185_rtl8225.c 　
15766
 RTL818X_NR_B_RATESRTL818X_NR_B_RATES 4 rtl818x.c 　
15767
 RTL818X_NR_RATESRTL818X_NR_RATES 12 rtl818x.c 　
15768
 RTL818X_NR_RF_NAMESRTL818X_NR_RF_NAMES 11 rtl818x.c 　
15769
 RTL_ROMRTL_ROM PCI_ROM rtl818x.c 　
15770
 MAX_RX_SIZEMAX_RX_SIZE IEEE80211_MAX_FRAME_LEN rtl818x.h 　
15771
 RF_PARAM_ANALOGPHYRF_PARAM_ANALOGPHY (1 << 0) rtl818x.h 　
15772
 RF_PARAM_ANTBDEFAULTRF_PARAM_ANTBDEFAULT (1 << 1) rtl818x.h 　
15773
 RF_PARAM_CARRIERSENSE1RF_PARAM_CARRIERSENSE1 (1 << 2) rtl818x.h 　
15774
 RF_PARAM_CARRIERSENSE2RF_PARAM_CARRIERSENSE2 (1 << 3) rtl818x.h 　
15775
 BB_ANTATTEN_CHAN14BB_ANTATTEN_CHAN14 0x0C rtl818x.h 　
15776
 BB_ANTENNA_BBB_ANTENNA_B 0x40 rtl818x.h 　
15777
 BB_HOST_BANGBB_HOST_BANG (1 << 30) rtl818x.h 　
15778
 BB_HOST_BANG_ENBB_HOST_BANG_EN (1 << 2) rtl818x.h 　
15779
 BB_HOST_BANG_CLKBB_HOST_BANG_CLK (1 << 1) rtl818x.h 　
15780
 BB_HOST_BANG_DATABB_HOST_BANG_DATA 1 rtl818x.h 　
15781
 ANAPARAM_TXDACOFF_SHIFTANAPARAM_TXDACOFF_SHIFT 27 rtl818x.h 　
15782
 ANAPARAM_PWR0_SHIFTANAPARAM_PWR0_SHIFT 28 rtl818x.h 　
15783
 ANAPARAM_PWR0_MASKANAPARAM_PWR0_MASK (0x07 << ANAPARAM_PWR0_SHIFT) rtl818x.h 　
15784
 ANAPARAM_PWR1_SHIFTANAPARAM_PWR1_SHIFT 20 rtl818x.h 　
15785
 ANAPARAM_PWR1_MASKANAPARAM_PWR1_MASK (0x7F << ANAPARAM_PWR1_SHIFT) rtl818x.h 　
15786
 RTL818X_RX_RING_SIZERTL818X_RX_RING_SIZE 8 rtl818x.h doesn't have to be a power of 2
15787
 RTL818X_TX_RING_SIZERTL818X_TX_RING_SIZE 8 rtl818x.h nor this [but 2^n is very slightly faster]
15788
 RTL818X_RING_ALIGNRTL818X_RING_ALIGN 256 rtl818x.h 　
15789
 RTL818X_MAX_RETRIESRTL818X_MAX_RETRIES 4 rtl818x.h 　
15790
 RTL818X_RF_DRIVERSRTL818X_RF_DRIVERS __table(struct rtl818x_rf_ops, "rtl818x_rf_drivers") rtl818x.h 　
15791
 __rtl818x_rf_driver__rtl818x_rf_driver __table_entry(RTL818X_RF_DRIVERS, 01) rtl818x.h 　
15792
 READLINE_MAXREADLINE_MAX 256 readline.c 　
15793
 ERRFILEERRFILE 0 strerror.c 　
15794
 INPUT_DELAYINPUT_DELAY 200 kb.c half-blocking delay timer resolution (ms)
15795
 INPUT_DELAY_TIMEOUTINPUT_DELAY_TIMEOUT 1000 kb.c half-blocking delay timeout
15796
 MIN_SPACE_SIZEMIN_SPACE_SIZE 2 slk.c 　
15797
 SLK_MAX_LABEL_LENSLK_MAX_LABEL_LEN 8 slk.c 　
15798
 SLK_MAX_NUM_LABELSSLK_MAX_NUM_LABELS 12 slk.c 　
15799
 SLK_MAX_NUM_SPACESSLK_MAX_NUM_SPACES 2 slk.c 　
15800
 WRAPWRAP 0 mucurses.h 　
15801
 NOWRAPNOWRAP 1 mucurses.h 　
15802
 EDITBOX_MIN_CHARSEDITBOX_MIN_CHARS 3 editbox.c 　
15803
 CPAIR_NORMALCPAIR_NORMAL 1 login_ui.c 　
15804
 CPAIR_LABELCPAIR_LABEL 2 login_ui.c 　
15805
 CPAIR_EDITBOXCPAIR_EDITBOX 3 login_ui.c 　
15806
 USERNAME_LABEL_ROWUSERNAME_LABEL_ROW 8 login_ui.c 　
15807
 USERNAME_ROWUSERNAME_ROW 10 login_ui.c 　
15808
 PASSWORD_LABEL_ROWPASSWORD_LABEL_ROW 14 login_ui.c 　
15809
 PASSWORD_ROWPASSWORD_ROW 16 login_ui.c 　
15810
 LABEL_COLLABEL_COL 36 login_ui.c 　
15811
 EDITBOX_COLEDITBOX_COL 30 login_ui.c 　
15812
 EDITBOX_WIDTHEDITBOX_WIDTH 20 login_ui.c 　
15813
 CPAIR_NORMALCPAIR_NORMAL 1 settings_ui.c 　
15814
 CPAIR_SELECTCPAIR_SELECT 2 settings_ui.c 　
15815
 CPAIR_EDITCPAIR_EDIT 3 settings_ui.c 　
15816
 CPAIR_ALERTCPAIR_ALERT 4 settings_ui.c 　
15817
 TITLE_ROWTITLE_ROW 1 settings_ui.c 　
15818
 SETTINGS_LIST_ROWSETTINGS_LIST_ROW 3 settings_ui.c 　
15819
 SETTINGS_LIST_COLSETTINGS_LIST_COL 1 settings_ui.c 　
15820
 INFO_ROWINFO_ROW 20 settings_ui.c 　
15821
 ALERT_ROWALERT_ROW 20 settings_ui.c 　
15822
 INSTRUCTION_ROWINSTRUCTION_ROW 22 settings_ui.c 　
15823
 INSTRUCTION_PADINSTRUCTION_PAD " " settings_ui.c 　
15824
 NUM_SETTINGSNUM_SETTINGS table_num_entries ( SETTINGS ) settings_ui.c 　
15825
 ASSERTINGASSERTING 0 assert.h 　
15826
 ASSERTINGASSERTING 1 assert.h 　
15827
 NON_STANDARD_BOOTP_SERVERNON_STANDARD_BOOTP_SERVER 1067 bootp.h 　
15828
 NON_STANDARD_BOOTP_CLIENTNON_STANDARD_BOOTP_CLIENT 1068 bootp.h 　
15829
 BOOTP_SERVERBOOTP_SERVER NON_STANDARD_BOOTP_SERVER bootp.h 　
15830
 BOOTP_SERVERBOOTP_SERVER 67 bootp.h 　
15831
 BOOTP_CLIENTBOOTP_CLIENT NON_STANDARD_BOOTP_CLIENT bootp.h 　
15832
 BOOTP_CLIENTBOOTP_CLIENT 68 bootp.h 　
15833
 PROXYDHCP_SERVERPROXYDHCP_SERVER 4011 bootp.h For PXE
15834
 BOOTP_REQUESTBOOTP_REQUEST 1 bootp.h 　
15835
 BOOTP_REPLYBOOTP_REPLY 2 bootp.h 　
15836
 RFC1533_COOKIERFC1533_COOKIE 99, 130, 83, 99 bootp.h 　
15837
 RFC1533_PADRFC1533_PAD 0 bootp.h 　
15838
 RFC1533_NETMASKRFC1533_NETMASK 1 bootp.h 　
15839
 RFC1533_TIMEOFFSETRFC1533_TIMEOFFSET 2 bootp.h 　
15840
 RFC1533_GATEWAYRFC1533_GATEWAY 3 bootp.h 　
15841
 RFC1533_TIMESERVERRFC1533_TIMESERVER 4 bootp.h 　
15842
 RFC1533_IEN116NSRFC1533_IEN116NS 5 bootp.h 　
15843
 RFC1533_DNSRFC1533_DNS 6 bootp.h 　
15844
 RFC1533_LOGSERVERRFC1533_LOGSERVER 7 bootp.h 　
15845
 RFC1533_COOKIESERVERRFC1533_COOKIESERVER 8 bootp.h 　
15846
 RFC1533_LPRSERVERRFC1533_LPRSERVER 9 bootp.h 　
15847
 RFC1533_IMPRESSSERVERRFC1533_IMPRESSSERVER 10 bootp.h 　
15848
 RFC1533_RESOURCESERVERRFC1533_RESOURCESERVER 11 bootp.h 　
15849
 RFC1533_HOSTNAMERFC1533_HOSTNAME 12 bootp.h 　
15850
 RFC1533_BOOTFILESIZERFC1533_BOOTFILESIZE 13 bootp.h 　
15851
 RFC1533_MERITDUMPFILERFC1533_MERITDUMPFILE 14 bootp.h 　
15852
 RFC1533_DOMAINNAMERFC1533_DOMAINNAME 15 bootp.h 　
15853
 RFC1533_SWAPSERVERRFC1533_SWAPSERVER 16 bootp.h 　
15854
 RFC1533_ROOTPATHRFC1533_ROOTPATH 17 bootp.h 　
15855
 RFC1533_EXTENSIONPATHRFC1533_EXTENSIONPATH 18 bootp.h 　
15856
 RFC1533_IPFORWARDINGRFC1533_IPFORWARDING 19 bootp.h 　
15857
 RFC1533_IPSOURCEROUTINGRFC1533_IPSOURCEROUTING 20 bootp.h 　
15858
 RFC1533_IPPOLICYFILTERRFC1533_IPPOLICYFILTER 21 bootp.h 　
15859
 RFC1533_IPMAXREASSEMBLYRFC1533_IPMAXREASSEMBLY 22 bootp.h 　
15860
 RFC1533_IPTTLRFC1533_IPTTL 23 bootp.h 　
15861
 RFC1533_IPMTURFC1533_IPMTU 24 bootp.h 　
15862
 RFC1533_IPMTUPLATEAURFC1533_IPMTUPLATEAU 25 bootp.h 　
15863
 RFC1533_INTMTURFC1533_INTMTU 26 bootp.h 　
15864
 RFC1533_INTLOCALSUBNETSRFC1533_INTLOCALSUBNETS 27 bootp.h 　
15865
 RFC1533_INTBROADCASTRFC1533_INTBROADCAST 28 bootp.h 　
15866
 RFC1533_INTICMPDISCOVERRFC1533_INTICMPDISCOVER 29 bootp.h 　
15867
 RFC1533_INTICMPRESPONDRFC1533_INTICMPRESPOND 30 bootp.h 　
15868
 RFC1533_INTROUTEDISCOVERRFC1533_INTROUTEDISCOVER 31 bootp.h 　
15869
 RFC1533_INTROUTESOLICITRFC1533_INTROUTESOLICIT 32 bootp.h 　
15870
 RFC1533_INTSTATICROUTESRFC1533_INTSTATICROUTES 33 bootp.h 　
15871
 RFC1533_LLTRAILERENCAPRFC1533_LLTRAILERENCAP 34 bootp.h 　
15872
 RFC1533_LLARPCACHETMORFC1533_LLARPCACHETMO 35 bootp.h 　
15873
 RFC1533_LLETHERNETENCAPRFC1533_LLETHERNETENCAP 36 bootp.h 　
15874
 RFC1533_TCPTTLRFC1533_TCPTTL 37 bootp.h 　
15875
 RFC1533_TCPKEEPALIVETMORFC1533_TCPKEEPALIVETMO 38 bootp.h 　
15876
 RFC1533_TCPKEEPALIVEGBRFC1533_TCPKEEPALIVEGB 39 bootp.h 　
15877
 RFC1533_NISDOMAINRFC1533_NISDOMAIN 40 bootp.h 　
15878
 RFC1533_NISSERVERRFC1533_NISSERVER 41 bootp.h 　
15879
 RFC1533_NTPSERVERRFC1533_NTPSERVER 42 bootp.h 　
15880
 RFC1533_VENDORRFC1533_VENDOR 43 bootp.h 　
15881
 RFC1533_NBNSRFC1533_NBNS 44 bootp.h 　
15882
 RFC1533_NBDDRFC1533_NBDD 45 bootp.h 　
15883
 RFC1533_NBNTRFC1533_NBNT 46 bootp.h 　
15884
 RFC1533_NBSCOPERFC1533_NBSCOPE 47 bootp.h 　
15885
 RFC1533_XFSRFC1533_XFS 48 bootp.h 　
15886
 RFC1533_XDMRFC1533_XDM 49 bootp.h 　
15887
 RFC2132_REQ_ADDRRFC2132_REQ_ADDR 50 bootp.h 　
15888
 RFC2132_MSG_TYPERFC2132_MSG_TYPE 53 bootp.h 　
15889
 RFC2132_SRV_IDRFC2132_SRV_ID 54 bootp.h 　
15890
 RFC2132_PARAM_LISTRFC2132_PARAM_LIST 55 bootp.h 　
15891
 RFC2132_MAX_SIZERFC2132_MAX_SIZE 57 bootp.h 　
15892
 RFC2132_VENDOR_CLASS_IDRFC2132_VENDOR_CLASS_ID 60 bootp.h 　
15893
 RFC2132_CLIENT_IDRFC2132_CLIENT_ID 61 bootp.h 　
15894
 RFC2132_TFTP_SERVER_NAMERFC2132_TFTP_SERVER_NAME 66 bootp.h 　
15895
 RFC2132_BOOTFILE_NAMERFC2132_BOOTFILE_NAME 67 bootp.h 　
15896
 RFC3004_USER_CLASSRFC3004_USER_CLASS 77 bootp.h 　
15897
 RFC3679_PXE_CLIENT_ARCHRFC3679_PXE_CLIENT_ARCH 93 bootp.h 　
15898
 RFC3679_PXE_CLIENT_NDIRFC3679_PXE_CLIENT_NDI 94 bootp.h 　
15899
 RFC3679_PXE_CLIENT_UUIDRFC3679_PXE_CLIENT_UUID 97 bootp.h 　
15900
 RFC3679_PXE_CLIENT_ARCH_LENGTHRFC3679_PXE_CLIENT_ARCH_LENGTH 2 bootp.h 　
15901
 RFC3679_PXE_CLIENT_NDI_LENGTHRFC3679_PXE_CLIENT_NDI_LENGTH 3 bootp.h 　
15902
 RFC3679_PXE_CLIENT_UUID_LENGTHRFC3679_PXE_CLIENT_UUID_LENGTH 17 bootp.h 　
15903
 RFC3679_PXE_CLIENT_ARCH_IAX86PCRFC3679_PXE_CLIENT_ARCH_IAX86PC 0,0 bootp.h 　
15904
 RFC3679_PXE_CLIENT_ARCH_NECPC98RFC3679_PXE_CLIENT_ARCH_NECPC98 0,1 bootp.h 　
15905
 RFC3679_PXE_CLIENT_ARCH_IA64PCRFC3679_PXE_CLIENT_ARCH_IA64PC 0,2 bootp.h 　
15906
 RFC3679_PXE_CLIENT_ARCH_DECALPHRFC3679_PXE_CLIENT_ARCH_DECALPH 0,3 bootp.h 　
15907
 RFC3679_PXE_CLIENT_ARCH_ARCX86RFC3679_PXE_CLIENT_ARCH_ARCX86 0,4 bootp.h 　
15908
 RFC3679_PXE_CLIENT_ARCH_INTELLERFC3679_PXE_CLIENT_ARCH_INTELLE 0,5 bootp.h 　
15909
 RFC3679_PXE_CLIENT_NDI_21RFC3679_PXE_CLIENT_NDI_21 1,2,1 bootp.h 　
15910
 RFC3679_PXE_CLIENT_UUID_TYPERFC3679_PXE_CLIENT_UUID_TYPE 0 bootp.h 　
15911
 RFC3679_PXE_CLIENT_UUID_DEFAULTRFC3679_PXE_CLIENT_UUID_DEFAULT RFC3679_PXE_CLIENT_UUID_TYPE, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF, \ 0xDE,0xAD,0xBE,0xEF bootp.h 　
15912
 RFC2132_VENDOR_CLASS_ID_PXE_LENRFC2132_VENDOR_CLASS_ID_PXE_LEN 32 bootp.h 　
15913
 RFC2132_VENDOR_CLASS_ID_PXERFC2132_VENDOR_CLASS_ID_PXE 'P','X','E','C','l','i','e','n','t',':', \ 'A','r','c','h',':','0','0','0','0','0',':', \ 'U','N','D','I',':','0','0','2','0' bootp.h 　
15914
 RFC1533_VENDOR_PXE_OPT128RFC1533_VENDOR_PXE_OPT128 128 bootp.h 　
15915
 RFC1533_VENDOR_PXE_OPT129RFC1533_VENDOR_PXE_OPT129 129 bootp.h 　
15916
 RFC1533_VENDOR_PXE_OPT130RFC1533_VENDOR_PXE_OPT130 130 bootp.h 　
15917
 RFC1533_VENDOR_PXE_OPT131RFC1533_VENDOR_PXE_OPT131 131 bootp.h 　
15918
 RFC1533_VENDOR_PXE_OPT132RFC1533_VENDOR_PXE_OPT132 132 bootp.h 　
15919
 RFC1533_VENDOR_PXE_OPT133RFC1533_VENDOR_PXE_OPT133 133 bootp.h 　
15920
 RFC1533_VENDOR_PXE_OPT134RFC1533_VENDOR_PXE_OPT134 134 bootp.h 　
15921
 RFC1533_VENDOR_PXE_OPT135RFC1533_VENDOR_PXE_OPT135 135 bootp.h 　
15922
 DHCPDISCOVERDHCPDISCOVER 1 bootp.h 　
15923
 DHCPOFFERDHCPOFFER 2 bootp.h 　
15924
 DHCPREQUESTDHCPREQUEST 3 bootp.h 　
15925
 DHCPACKDHCPACK 5 bootp.h 　
15926
 RFC1533_VENDOR_MAJORRFC1533_VENDOR_MAJOR 0 bootp.h 　
15927
 RFC1533_VENDOR_MINORRFC1533_VENDOR_MINOR 0 bootp.h 　
15928
 RFC1533_VENDOR_MAGICRFC1533_VENDOR_MAGIC 128 bootp.h 　
15929
 RFC1533_VENDOR_ADDPARMRFC1533_VENDOR_ADDPARM 129 bootp.h 　
15930
 RFC1533_VENDOR_ETHDEVRFC1533_VENDOR_ETHDEV 130 bootp.h 　
15931
 RFC1533_VENDOR_ETHERBOOT_ENCAPRFC1533_VENDOR_ETHERBOOT_ENCAP 150 bootp.h 　
15932
 RFC1533_VENDOR_HOWTORFC1533_VENDOR_HOWTO 132 bootp.h 　
15933
 RFC1533_VENDOR_KERNEL_ENVRFC1533_VENDOR_KERNEL_ENV 133 bootp.h 　
15934
 RFC1533_VENDOR_NIC_DEV_IDRFC1533_VENDOR_NIC_DEV_ID 175 bootp.h 　
15935
 RFC1533_VENDOR_ARCHRFC1533_VENDOR_ARCH 177 bootp.h 　
15936
 RFC1533_ENDRFC1533_END 255 bootp.h 　
15937
 BOOTP_VENDOR_LENBOOTP_VENDOR_LEN 64 bootp.h 　
15938
 DHCP_OPT_LENDHCP_OPT_LEN 312 bootp.h 　
15939
 u32u32 unsigned int btext.h 　
15940
 u16u16 unsigned short btext.h 　
15941
 u8u8 unsigned char btext.h 　
15942
 BOOTX_COLORTABLE_SIZEBOOTX_COLORTABLE_SIZE (256UL*3UL*2UL) btext.h 　
15943
 CMDL_BUFFER_SIZECMDL_BUFFER_SIZE 256 cmdlinelib.h 　
15944
 CMDL_PROMPT_SIZECMDL_PROMPT_SIZE 8 cmdlinelib.h 　
15945
 CMDL_MAX_TAB_COMPLETE_RESULTCMDL_MAX_TAB_COMPLETE_RESULT 256 cmdlinelib.h 　
15946
 NULLNULL ((void *)0) cmdlinelib.h 　
15947
 F_RELFLGF_RELFLG 0x0001 coff.h If set, not reloc. info. Clear for executables
15948
 F_EXECF_EXEC 0x0002 coff.h No unresolved symbols. Executable file !
15949
 F_LNNOF_LNNO 0x0004 coff.h If set, line information numbers removed
15950
 F_LSYMSF_LSYMS 0x0008 coff.h If set, local symbols removed
15951
 F_AR32WRF_AR32WR 0x0100 coff.h Indicates little endian file
15952
 EM_E1EM_E1 0x17a coff.h Magic number for Hyperstone. Big endian format
15953
 O_MAGICO_MAGIC 0x017c coff.h Optional's header magic number for Hyperstone
15954
 S_TYPE_TEXTS_TYPE_TEXT 0x0020 coff.h If set, the section contains only executable
15955
 S_TYPE_DATAS_TYPE_DATA 0x0040 coff.h If set, the section contains only initialized data
15956
 S_TYPE_BSSS_TYPE_BSS 0x0080 coff.h If set, the section is BSS no data stored
15957
 OBJECT_SYMBOLOBJECT_SYMBOL PREFIX_OBJECT ( obj_ ) compiler.h 　
15958
 ERRFILEERRFILE PREFIX_OBJECT ( ERRFILE_ ) compiler.h 　
15959
 DEBUG_SYMBOLDEBUG_SYMBOL PREFIX_OBJECT ( debug_ ) compiler.h 　
15960
 DBGLVL_MAXDBGLVL_MAX DEBUG_SYMBOL compiler.h 　
15961
 DBGLVL_MAXDBGLVL_MAX 0 compiler.h 　
15962
 DBGLVLDBGLVL ( DBGLVL_MAX & ~__debug_disable ) compiler.h 　
15963
 DBGLVLDBGLVL 0 compiler.h 　
15964
 DBGLVL_LOGDBGLVL_LOG 1 compiler.h 　
15965
 DBG_LOGDBG_LOG ( DBGLVL & DBGLVL_LOG ) compiler.h 　
15966
 DBGLVL_EXTRADBGLVL_EXTRA 2 compiler.h 　
15967
 DBG_EXTRADBG_EXTRA ( DBGLVL & DBGLVL_EXTRA ) compiler.h 　
15968
 DBGLVL_PROFILEDBGLVL_PROFILE 4 compiler.h 　
15969
 DBG_PROFILEDBG_PROFILE ( DBGLVL & DBGLVL_PROFILE ) compiler.h 　
15970
 DBGLVL_IODBGLVL_IO 8 compiler.h 　
15971
 DBG_IODBG_IO ( DBGLVL & DBGLVL_IO ) compiler.h 　
15972
 PACKEDPACKED __attribute__ (( packed )) compiler.h 　
15973
 __unused__unused __attribute__ (( unused )) compiler.h 　
15974
 __pure__pure __attribute__ (( pure )) compiler.h 　
15975
 __const__const __attribute__ (( const )) compiler.h 　
15976
 __nonnull__nonnull __attribute__ (( nonnull )) compiler.h 　
15977
 __malloc__malloc __attribute__ (( malloc )) compiler.h 　
15978
 __used__used __attribute__ (( used )) compiler.h 　
15979
 __aligned__aligned __attribute__ (( aligned ( 16 ) )) compiler.h 　
15980
 __always_inline__always_inline __attribute__ (( always_inline )) compiler.h 　
15981
 __shared__shared __asm__ ( "_shared_bss" ) __aligned compiler.h 　
15982
 FILE_LICENCE_PUBLIC_DOMAINFILE_LICENCE_PUBLIC_DOMAIN PROVIDE_SYMBOL ( __licence_public_domain ) compiler.h 　
15983
 FILE_LICENCE_GPL2_OR_LATERFILE_LICENCE_GPL2_OR_LATER PROVIDE_SYMBOL ( __licence_gpl2_or_later ) compiler.h 　
15984
 FILE_LICENCE_GPL2_ONLYFILE_LICENCE_GPL2_ONLY PROVIDE_SYMBOL ( __licence_gpl2_only ) compiler.h 　
15985
 FILE_LICENCE_GPL_ANYFILE_LICENCE_GPL_ANY PROVIDE_SYMBOL ( __licence_gpl_any ) compiler.h 　
15986
 FILE_LICENCE_BSD3FILE_LICENCE_BSD3 PROVIDE_SYMBOL ( __licence_bsd3 ) compiler.h 　
15987
 FILE_LICENCE_BSD2FILE_LICENCE_BSD2 PROVIDE_SYMBOL ( __licence_bsd2 ) compiler.h 　
15988
 FILE_LICENCE_MITFILE_LICENCE_MIT PROVIDE_SYMBOL ( __licence_mit ) compiler.h 　
15989
 CONSOLESCONSOLES __table ( struct console_driver, "consoles" ) console.h 　
15990
 __console_driver__console_driver __table_entry ( CONSOLES, 01 ) console.h 　
15991
 ERRERR (-1) curses.h 　
15992
 FALSEFALSE (0) curses.h 　
15993
 OKOK (0) curses.h 　
15994
 TRUETRUE (1) curses.h 　
15995
 stdscrstdscr ( &_stdscr ) curses.h 　
15996
 COLSCOLS _COLS curses.h 　
15997
 LINESLINES _LINES curses.h 　
15998
 CPAIR_SHIFTCPAIR_SHIFT 8 curses.h 　
15999
 ATTRS_SHIFTATTRS_SHIFT 16 curses.h 　
16000
 WA_DEFAULTWA_DEFAULT ( 0x0000 << ATTRS_SHIFT ) curses.h 　
16001
 WA_ALTCHARSETWA_ALTCHARSET ( 0x0001 << ATTRS_SHIFT ) curses.h 　
16002
 WA_BLINKWA_BLINK ( 0x0002 << ATTRS_SHIFT ) curses.h 　
16003
 WA_BOLDWA_BOLD ( 0x0004 << ATTRS_SHIFT ) curses.h 　
16004
 WA_DIMWA_DIM ( 0x0008 << ATTRS_SHIFT ) curses.h 　
16005
 WA_INVISWA_INVIS ( 0x0010 << ATTRS_SHIFT ) curses.h 　
16006
 WA_PROTECTWA_PROTECT ( 0x0020 << ATTRS_SHIFT ) curses.h 　
16007
 WA_REVERSEWA_REVERSE ( 0x0040 << ATTRS_SHIFT ) curses.h 　
16008
 WA_STANDOUTWA_STANDOUT ( 0x0080 << ATTRS_SHIFT ) curses.h 　
16009
 WA_UNDERLINEWA_UNDERLINE ( 0x0100 << ATTRS_SHIFT ) curses.h 　
16010
 WA_HORIZONTALWA_HORIZONTAL ( 0x0200 << ATTRS_SHIFT ) curses.h 　
16011
 WA_VERTICALWA_VERTICAL ( 0x0400 << ATTRS_SHIFT ) curses.h 　
16012
 WA_LEFTWA_LEFT ( 0x0800 << ATTRS_SHIFT ) curses.h 　
16013
 WA_RIGHTWA_RIGHT ( 0x1000 << ATTRS_SHIFT ) curses.h 　
16014
 WA_LOWWA_LOW ( 0x2000 << ATTRS_SHIFT ) curses.h 　
16015
 WA_TOPWA_TOP ( 0x4000 << ATTRS_SHIFT ) curses.h 　
16016
 A_DEFAULTA_DEFAULT WA_DEFAULT curses.h 　
16017
 A_ALTCHARSETA_ALTCHARSET WA_ALTCHARSET curses.h 　
16018
 A_BLINKA_BLINK WA_BLINK curses.h 　
16019
 A_BOLDA_BOLD WA_BOLD curses.h 　
16020
 A_DIMA_DIM WA_DIM curses.h 　
16021
 A_INVISA_INVIS WA_INVIS curses.h 　
16022
 A_PROTECTA_PROTECT WA_PROTECT curses.h 　
16023
 A_REVERSEA_REVERSE WA_REVERSE curses.h 　
16024
 A_STANDOUTA_STANDOUT WA_STANDOUT curses.h 　
16025
 A_UNDERLINEA_UNDERLINE WA_UNDERLINE curses.h 　
16026
 A_ATTRIBUTESA_ATTRIBUTES ( 0xffff << ATTRS_SHIFT ) curses.h 　
16027
 A_CHARTEXTA_CHARTEXT ( 0xff ) curses.h 　
16028
 A_COLOURA_COLOUR ( 0xff << CPAIR_SHIFT ) curses.h 　
16029
 A_COLORA_COLOR A_COLOUR curses.h 　
16030
 COLOUR_PAIRSCOLOUR_PAIRS 8 curses.h Arbitrary limit
16031
 COLOR_PAIRSCOLOR_PAIRS COLOUR_PAIRS curses.h 　
16032
 ACS_ULCORNERACS_ULCORNER '+' curses.h 　
16033
 ACS_LLCORNERACS_LLCORNER '+' curses.h 　
16034
 ACS_URCORNERACS_URCORNER '+' curses.h 　
16035
 ACS_LRCORNERACS_LRCORNER '+' curses.h 　
16036
 ACS_RTEEACS_RTEE '+' curses.h 　
16037
 ACS_LTEEACS_LTEE '+' curses.h 　
16038
 ACS_BTEEACS_BTEE '+' curses.h 　
16039
 ACS_TTEEACS_TTEE '+' curses.h 　
16040
 ACS_HLINEACS_HLINE '-' curses.h 　
16041
 ACS_VLINEACS_VLINE '|' curses.h 　
16042
 ACS_PLUSACS_PLUS '+' curses.h 　
16043
 ACS_S1ACS_S1 '-' curses.h 　
16044
 ACS_S9ACS_S9 '_' curses.h 　
16045
 ACS_DIAMONDACS_DIAMOND '+' curses.h 　
16046
 ACS_CKBOARDACS_CKBOARD ':' curses.h 　
16047
 ACS_DEGREEACS_DEGREE '\'' curses.h 　
16048
 ACS_PLMINUSACS_PLMINUS '#' curses.h 　
16049
 ACS_BULLETACS_BULLET 'o' curses.h 　
16050
 ACS_LARROWACS_LARROW '<' curses.h 　
16051
 ACS_RARROWACS_RARROW '>' curses.h 　
16052
 ACS_DARROWACS_DARROW 'v' curses.h 　
16053
 ACS_UARROWACS_UARROW '^' curses.h 　
16054
 ACS_BOARDACS_BOARD '#' curses.h 　
16055
 ACS_LANTERNACS_LANTERN '#' curses.h 　
16056
 ACS_BLOCKACS_BLOCK '#' curses.h 　
16057
 COLOUR_BLACKCOLOUR_BLACK 0 curses.h 　
16058
 COLOUR_REDCOLOUR_RED 1 curses.h 　
16059
 COLOUR_GREENCOLOUR_GREEN 2 curses.h 　
16060
 COLOUR_YELLOWCOLOUR_YELLOW 3 curses.h 　
16061
 COLOUR_BLUECOLOUR_BLUE 4 curses.h 　
16062
 COLOUR_MAGENTACOLOUR_MAGENTA 5 curses.h 　
16063
 COLOUR_CYANCOLOUR_CYAN 6 curses.h 　
16064
 COLOUR_WHITECOLOUR_WHITE 7 curses.h 　
16065
 COLOURSCOLOURS 7 curses.h 　
16066
 COLOUR_FGCOLOUR_FG 30 curses.h 　
16067
 COLOUR_BGCOLOUR_BG 40 curses.h 　
16068
 COLOR_FGCOLOR_FG COLOUR_FG curses.h 　
16069
 COLOR_BGCOLOR_BG COLOUR_BG curses.h 　
16070
 COLOR_BLACKCOLOR_BLACK COLOUR_BLACK curses.h 　
16071
 COLOR_BLUECOLOR_BLUE COLOUR_BLUE curses.h 　
16072
 COLOR_GREENCOLOR_GREEN COLOUR_GREEN curses.h 　
16073
 COLOR_CYANCOLOR_CYAN COLOUR_CYAN curses.h 　
16074
 COLOR_REDCOLOR_RED COLOUR_RED curses.h 　
16075
 COLOR_MAGENTACOLOR_MAGENTA COLOUR_MAGENTA curses.h 　
16076
 COLOR_YELLOWCOLOR_YELLOW COLOUR_YELLOW curses.h 　
16077
 COLOR_WHITECOLOR_WHITE COLOUR_WHITE curses.h 　
16078
 COLORSCOLORS COLOURS curses.h 　
16079
 init_colorinit_color ( c, r, g, b ) init_colour ( (c), (r), (g), (b) ) curses.h 　
16080
 EI_NIDENTEI_NIDENT 16 elf.h Size of e_ident array.
16081
 ET_NONEET_NONE 0 elf.h No file type
16082
 ET_RELET_REL 1 elf.h Relocatable file
16083
 ET_EXECET_EXEC 2 elf.h Executable file
16084
 ET_DYNET_DYN 3 elf.h Shared object file
16085
 ET_COREET_CORE 4 elf.h Core file
16086
 EM_NONEEM_NONE 0 elf.h No machine
16087
 EM_M32EM_M32 1 elf.h AT&T WE 32100
16088
 EM_SPARCEM_SPARC 2 elf.h SUN SPARC
16089
 EM_386EM_386 3 elf.h Intel 80386+
16090
 EM_68KEM_68K 4 elf.h Motorola m68k family
16091
 EM_88KEM_88K 5 elf.h Motorola m88k family
16092
 EM_486EM_486 6 elf.h Perhaps disused
16093
 EM_860EM_860 7 elf.h Intel 80860
16094
 EM_MIPSEM_MIPS 8 elf.h MIPS R3000 big-endian
16095
 EM_S370EM_S370 9 elf.h IBM System/370
16096
 EM_MIPS_RS3_LEEM_MIPS_RS3_LE 10 elf.h MIPS R3000 little-endian
16097
 EM_PARISCEM_PARISC 15 elf.h HPPA
16098
 EM_VPP500EM_VPP500 17 elf.h Fujitsu VPP500
16099
 EM_SPARC32PLUSEM_SPARC32PLUS 18 elf.h Sun's "v8plus"
16100
 EM_960EM_960 19 elf.h Intel 80960
16101
 EM_PPCEM_PPC 20 elf.h PowerPC
16102
 EM_PPC64EM_PPC64 21 elf.h PowerPC 64-bit
16103
 EM_S390EM_S390 22 elf.h IBM S390
16104
 EM_V800EM_V800 36 elf.h NEC V800 series
16105
 EM_FR20EM_FR20 37 elf.h Fujitsu FR20
16106
 EM_RH32EM_RH32 38 elf.h TRW RH-32
16107
 EM_RCEEM_RCE 39 elf.h Motorola RCE
16108
 EM_ARMEM_ARM 40 elf.h ARM
16109
 EM_FAKE_ALPHAEM_FAKE_ALPHA 41 elf.h Digital Alpha
16110
 EM_SHEM_SH 42 elf.h Hitachi SH
16111
 EM_SPARCV9EM_SPARCV9 43 elf.h SPARC v9 64-bit
16112
 EM_TRICOREEM_TRICORE 44 elf.h Siemens Tricore
16113
 EM_ARCEM_ARC 45 elf.h Argonaut RISC Core
16114
 EM_H8_300EM_H8_300 46 elf.h Hitachi H8/300
16115
 EM_H8_300HEM_H8_300H 47 elf.h Hitachi H8/300H
16116
 EM_H8SEM_H8S 48 elf.h Hitachi H8S
16117
 EM_H8_500EM_H8_500 49 elf.h Hitachi H8/500
16118
 EM_IA_64EM_IA_64 50 elf.h Intel Merced
16119
 EM_MIPS_XEM_MIPS_X 51 elf.h Stanford MIPS-X
16120
 EM_COLDFIREEM_COLDFIRE 52 elf.h Motorola Coldfire
16121
 EM_68HC12EM_68HC12 53 elf.h Motorola M68HC12
16122
 EM_MMAEM_MMA 54 elf.h Fujitsu MMA Multimedia Accelerator
16123
 EM_PCPEM_PCP 55 elf.h Siemens PCP
16124
 EM_NCPUEM_NCPU 56 elf.h Sony nCPU embeeded RISC
16125
 EM_NDR1EM_NDR1 57 elf.h Denso NDR1 microprocessor
16126
 EM_STARCOREEM_STARCORE 58 elf.h Motorola Start*Core processor
16127
 EM_ME16EM_ME16 59 elf.h Toyota ME16 processor
16128
 EM_ST100EM_ST100 60 elf.h STMicroelectronic ST100 processor
16129
 EM_TINYJEM_TINYJ 61 elf.h Advanced Logic Corp. Tinyj emb.fam
16130
 EM_X86_64EM_X86_64 62 elf.h AMD x86-64 architecture
16131
 EM_PDSPEM_PDSP 63 elf.h Sony DSP Processor
16132
 EM_FX66EM_FX66 66 elf.h Siemens FX66 microcontroller
16133
 EM_ST9PLUSEM_ST9PLUS 67 elf.h STMicroelectronics ST9+ 8/16 mc
16134
 EM_ST7EM_ST7 68 elf.h STmicroelectronics ST7 8 bit mc
16135
 EM_68HC16EM_68HC16 69 elf.h Motorola MC68HC16 microcontroller
16136
 EM_68HC11EM_68HC11 70 elf.h Motorola MC68HC11 microcontroller
16137
 EM_68HC08EM_68HC08 71 elf.h Motorola MC68HC08 microcontroller
16138
 EM_68HC05EM_68HC05 72 elf.h Motorola MC68HC05 microcontroller
16139
 EM_SVXEM_SVX 73 elf.h Silicon Graphics SVx
16140
 EM_AT19EM_AT19 74 elf.h STMicroelectronics ST19 8 bit mc
16141
 EM_VAXEM_VAX 75 elf.h Digital VAX
16142
 EM_CRISEM_CRIS 76 elf.h Axis Communications 32-bit embedded processor
16143
 EM_JAVELINEM_JAVELIN 77 elf.h Infineon Technologies 32-bit embedded processor
16144
 EM_FIREPATHEM_FIREPATH 78 elf.h Element 14 64-bit DSP Processor
16145
 EM_ZSPEM_ZSP 79 elf.h LSI Logic 16-bit DSP Processor
16146
 EM_MMIXEM_MMIX 80 elf.h Donald Knuth's educational 64-bit processor
16147
 EM_HUANYEM_HUANY 81 elf.h Harvard University machine-independent object files
16148
 EM_PRISMEM_PRISM 82 elf.h SiTera Prism
16149
 EM_AVREM_AVR 83 elf.h Atmel AVR 8-bit microcontroller
16150
 EM_FR30EM_FR30 84 elf.h Fujitsu FR30
16151
 EM_D10VEM_D10V 85 elf.h Mitsubishi D10V
16152
 EM_D30VEM_D30V 86 elf.h Mitsubishi D30V
16153
 EM_V850EM_V850 87 elf.h NEC v850
16154
 EM_M32REM_M32R 88 elf.h Mitsubishi M32R
16155
 EM_MN10300EM_MN10300 89 elf.h Matsushita MN10300
16156
 EM_MN10200EM_MN10200 90 elf.h Matsushita MN10200
16157
 EM_PJEM_PJ 91 elf.h picoJava
16158
 EM_OPENRISCEM_OPENRISC 92 elf.h OpenRISC 32-bit embedded processor
16159
 EM_ARC_A5EM_ARC_A5 93 elf.h ARC Cores Tangent-A5
16160
 EM_XTENSAEM_XTENSA 94 elf.h Tensilica Xtensa Architecture
16161
 EM_NUMEM_NUM 95 elf.h 　
16162
 PT_NULLPT_NULL 0 elf.h Unused entry.
16163
 PT_LOADPT_LOAD 1 elf.h Loadable segment.
16164
 PT_DYNAMICPT_DYNAMIC 2 elf.h Dynamic linking information segment.
16165
 PT_INTERPPT_INTERP 3 elf.h Pathname of interpreter.
16166
 PT_NOTEPT_NOTE 4 elf.h Auxiliary information.
16167
 PT_SHLIBPT_SHLIB 5 elf.h Reserved (not used).
16168
 PT_PHDRPT_PHDR 6 elf.h Location of program header itself.
16169
 PF_XPF_X 0x1 elf.h Executable.
16170
 PF_WPF_W 0x2 elf.h Writable.
16171
 PF_RPF_R 0x4 elf.h Readable.
16172
 ELF_PROGRAM_RETURNS_BITELF_PROGRAM_RETURNS_BIT 0x8000000 elf.h e_flags bit 31
16173
 EI_MAG0EI_MAG0 0 elf.h 　
16174
 ELFMAG0ELFMAG0 0x7f elf.h 　
16175
 EI_MAG1EI_MAG1 1 elf.h 　
16176
 ELFMAG1ELFMAG1 'E' elf.h 　
16177
 EI_MAG2EI_MAG2 2 elf.h 　
16178
 ELFMAG2ELFMAG2 'L' elf.h 　
16179
 EI_MAG3EI_MAG3 3 elf.h 　
16180
 ELFMAG3ELFMAG3 'F' elf.h 　
16181
 ELFMAGELFMAG "\177ELF" elf.h 　
16182
 SELFMAGSELFMAG 4 elf.h 　
16183
 EI_CLASSEI_CLASS 4 elf.h File class byte index
16184
 ELFCLASSNONEELFCLASSNONE 0 elf.h Invalid class
16185
 ELFCLASS32ELFCLASS32 1 elf.h 32-bit objects
16186
 ELFCLASS64ELFCLASS64 2 elf.h 64-bit objects
16187
 EI_DATAEI_DATA 5 elf.h Data encodeing byte index
16188
 ELFDATANONEELFDATANONE 0 elf.h Invalid data encoding
16189
 ELFDATA2LSBELFDATA2LSB 1 elf.h 2's complement little endian
16190
 ELFDATA2MSBELFDATA2MSB 2 elf.h 2's complement big endian
16191
 EI_VERSIONEI_VERSION 6 elf.h File version byte index
16192
 EV_NONEEV_NONE 0 elf.h Invalid ELF Version
16193
 EV_CURRENTEV_CURRENT 1 elf.h Current version
16194
 ELF32_PHDR_SIZEELF32_PHDR_SIZE (8*4) elf.h Size of an elf program header
16195
 __LITTLE_ENDIAN__LITTLE_ENDIAN 1234 endian.h 　
16196
 __BIG_ENDIAN__BIG_ENDIAN 4321 endian.h 　
16197
 __PDP_ENDIAN__PDP_ENDIAN 3412 endian.h 　
16198
 ERRFILEERRFILE ( 0 * ( ( int ) missing_errfile_declaration ) ) errno.h 　
16199
 PXENV_STATUS_SUCCESSPXENV_STATUS_SUCCESS 0x0000 errno.h 　
16200
 PXENV_STATUS_FAILUREPXENV_STATUS_FAILURE 0x0001 errno.h 　
16201
 PXENV_STATUS_BAD_FUNCPXENV_STATUS_BAD_FUNC 0x0002 errno.h 　
16202
 PXENV_STATUS_UNSUPPORTEDPXENV_STATUS_UNSUPPORTED 0x0003 errno.h 　
16203
 PXENV_STATUS_KEEP_UNDIPXENV_STATUS_KEEP_UNDI 0x0004 errno.h 　
16204
 PXENV_STATUS_KEEP_ALLPXENV_STATUS_KEEP_ALL 0x0005 errno.h 　
16205
 PXENV_STATUS_OUT_OF_RESOURCESPXENV_STATUS_OUT_OF_RESOURCES 0x0006 errno.h 　
16206
 PXENV_STATUS_ARP_TIMEOUTPXENV_STATUS_ARP_TIMEOUT 0x0011 errno.h 　
16207
 PXENV_STATUS_UDP_CLOSEDPXENV_STATUS_UDP_CLOSED 0x0018 errno.h 　
16208
 PXENV_STATUS_UDP_OPENPXENV_STATUS_UDP_OPEN 0x0019 errno.h 　
16209
 PXENV_STATUS_TFTP_CLOSEDPXENV_STATUS_TFTP_CLOSED 0x001a errno.h 　
16210
 PXENV_STATUS_TFTP_OPENPXENV_STATUS_TFTP_OPEN 0x001b errno.h 　
16211
 PXENV_STATUS_MCOPY_PROBLEMPXENV_STATUS_MCOPY_PROBLEM 0x0020 errno.h 　
16212
 PXENV_STATUS_BIS_INTEGRITY_FAILPXENV_STATUS_BIS_INTEGRITY_FAIL 0x0021 errno.h 　
16213
 PXENV_STATUS_BIS_VALIDATE_FAILUPXENV_STATUS_BIS_VALIDATE_FAILU 0x0022 errno.h 　
16214
 PXENV_STATUS_BIS_INIT_FAILUREPXENV_STATUS_BIS_INIT_FAILURE 0x0023 errno.h 　
16215
 PXENV_STATUS_BIS_SHUTDOWN_FAILUPXENV_STATUS_BIS_SHUTDOWN_FAILU 0x0024 errno.h 　
16216
 PXENV_STATUS_BIS_GBOA_FAILUREPXENV_STATUS_BIS_GBOA_FAILURE 0x0025 errno.h 　
16217
 PXENV_STATUS_BIS_FREE_FAILUREPXENV_STATUS_BIS_FREE_FAILURE 0x0026 errno.h 　
16218
 PXENV_STATUS_BIS_GSI_FAILUREPXENV_STATUS_BIS_GSI_FAILURE 0x0027 errno.h 　
16219
 PXENV_STATUS_BIS_BAD_CKSUMPXENV_STATUS_BIS_BAD_CKSUM 0x0028 errno.h 　
16220
 PXENV_STATUS_TFTP_CANNOT_ARP_ADPXENV_STATUS_TFTP_CANNOT_ARP_AD 0x0030 errno.h 　
16221
 PXENV_STATUS_TFTP_OPEN_TIMEOUTPXENV_STATUS_TFTP_OPEN_TIMEOUT 0x0032 errno.h 　
16222
 PXENV_STATUS_TFTP_UNKNOWN_OPCODPXENV_STATUS_TFTP_UNKNOWN_OPCOD 0x0033 errno.h 　
16223
 PXENV_STATUS_TFTP_READ_TIMEOUTPXENV_STATUS_TFTP_READ_TIMEOUT 0x0035 errno.h 　
16224
 PXENV_STATUS_TFTP_ERROR_OPCODEPXENV_STATUS_TFTP_ERROR_OPCODE 0x0036 errno.h 　
16225
 PXENV_STATUS_TFTP_CANNOT_OPEN_CPXENV_STATUS_TFTP_CANNOT_OPEN_C 0x0038 errno.h 　
16226
 PXENV_STATUS_TFTP_CANNOT_READ_FPXENV_STATUS_TFTP_CANNOT_READ_F 0x0039 errno.h 　
16227
 PXENV_STATUS_TFTP_TOO_MANY_PACKPXENV_STATUS_TFTP_TOO_MANY_PACK 0x003a errno.h 　
16228
 PXENV_STATUS_TFTP_FILE_NOT_FOUNPXENV_STATUS_TFTP_FILE_NOT_FOUN 0x003b errno.h 　
16229
 PXENV_STATUS_TFTP_ACCESS_VIOLATPXENV_STATUS_TFTP_ACCESS_VIOLAT 0x003c errno.h 　
16230
 PXENV_STATUS_TFTP_NO_MCAST_ADDRPXENV_STATUS_TFTP_NO_MCAST_ADDR 0x003d errno.h 　
16231
 PXENV_STATUS_TFTP_NO_FILESIZEPXENV_STATUS_TFTP_NO_FILESIZE 0x003e errno.h 　
16232
 PXENV_STATUS_TFTP_INVALID_PACKEPXENV_STATUS_TFTP_INVALID_PACKE 0x003f errno.h 　
16233
 PXENV_STATUS_DHCP_TIMEOUTPXENV_STATUS_DHCP_TIMEOUT 0x0051 errno.h 　
16234
 PXENV_STATUS_DHCP_NO_IP_ADDRESSPXENV_STATUS_DHCP_NO_IP_ADDRESS 0x0052 errno.h 　
16235
 PXENV_STATUS_DHCP_NO_BOOTFILE_NPXENV_STATUS_DHCP_NO_BOOTFILE_N 0x0053 errno.h 　
16236
 PXENV_STATUS_DHCP_BAD_IP_ADDRESPXENV_STATUS_DHCP_BAD_IP_ADDRES 0x0054 errno.h 　
16237
 PXENV_STATUS_UNDI_INVALID_FUNCTPXENV_STATUS_UNDI_INVALID_FUNCT 0x0060 errno.h 　
16238
 PXENV_STATUS_UNDI_MEDIATEST_FAIPXENV_STATUS_UNDI_MEDIATEST_FAI 0x0061 errno.h 　
16239
 PXENV_STATUS_UNDI_CANNOT_INIT_NPXENV_STATUS_UNDI_CANNOT_INIT_N 0x0062 errno.h 　
16240
 PXENV_STATUS_UNDI_CANNOT_INITIAPXENV_STATUS_UNDI_CANNOT_INITIA 0x0063 errno.h 　
16241
 PXENV_STATUS_UNDI_CANNOT_INITIAPXENV_STATUS_UNDI_CANNOT_INITIA 0x0064 errno.h 　
16242
 PXENV_STATUS_UNDI_CANNOT_READ_CPXENV_STATUS_UNDI_CANNOT_READ_C 0x0065 errno.h 　
16243
 PXENV_STATUS_UNDI_CANNOT_READ_IPXENV_STATUS_UNDI_CANNOT_READ_I 0x0066 errno.h 　
16244
 PXENV_STATUS_UNDI_BAD_MAC_ADDREPXENV_STATUS_UNDI_BAD_MAC_ADDRE 0x0067 errno.h 　
16245
 PXENV_STATUS_UNDI_BAD_EEPROM_CHPXENV_STATUS_UNDI_BAD_EEPROM_CH 0x0068 errno.h 　
16246
 PXENV_STATUS_UNDI_ERROR_SETTINGPXENV_STATUS_UNDI_ERROR_SETTING 0x0069 errno.h 　
16247
 PXENV_STATUS_UNDI_INVALID_STATEPXENV_STATUS_UNDI_INVALID_STATE 0x006a errno.h 　
16248
 PXENV_STATUS_UNDI_TRANSMIT_ERROPXENV_STATUS_UNDI_TRANSMIT_ERRO 0x006b errno.h 　
16249
 PXENV_STATUS_UNDI_INVALID_PARAMPXENV_STATUS_UNDI_INVALID_PARAM 0x006c errno.h 　
16250
 PXENV_STATUS_BSTRAP_PROMPT_MENUPXENV_STATUS_BSTRAP_PROMPT_MENU 0x0074 errno.h 　
16251
 PXENV_STATUS_BSTRAP_MCAST_ADDRPXENV_STATUS_BSTRAP_MCAST_ADDR 0x0076 errno.h 　
16252
 PXENV_STATUS_BSTRAP_MISSING_LISPXENV_STATUS_BSTRAP_MISSING_LIS 0x0077 errno.h 　
16253
 PXENV_STATUS_BSTRAP_NO_RESPONSEPXENV_STATUS_BSTRAP_NO_RESPONSE 0x0078 errno.h 　
16254
 PXENV_STATUS_BSTRAP_FILE_TOO_BIPXENV_STATUS_BSTRAP_FILE_TOO_BI 0x0079 errno.h 　
16255
 PXENV_STATUS_BINL_CANCELED_BY_KPXENV_STATUS_BINL_CANCELED_BY_K 0x00a0 errno.h 　
16256
 PXENV_STATUS_BINL_NO_PXE_SERVERPXENV_STATUS_BINL_NO_PXE_SERVER 0x00a1 errno.h 　
16257
 PXENV_STATUS_NOT_AVAILABLE_IN_PPXENV_STATUS_NOT_AVAILABLE_IN_P 0x00a2 errno.h 　
16258
 PXENV_STATUS_NOT_AVAILABLE_IN_RPXENV_STATUS_NOT_AVAILABLE_IN_R 0x00a3 errno.h 　
16259
 PXENV_STATUS_BUSD_DEVICE_NOT_SUPXENV_STATUS_BUSD_DEVICE_NOT_SU 0x00b0 errno.h 　
16260
 PXENV_STATUS_LOADER_NO_FREE_BASPXENV_STATUS_LOADER_NO_FREE_BAS 0x00c0 errno.h 　
16261
 PXENV_STATUS_LOADER_NO_BC_ROMIDPXENV_STATUS_LOADER_NO_BC_ROMID 0x00c1 errno.h 　
16262
 PXENV_STATUS_LOADER_BAD_BC_ROMIPXENV_STATUS_LOADER_BAD_BC_ROMI 0x00c2 errno.h 　
16263
 PXENV_STATUS_LOADER_BAD_BC_RUNTPXENV_STATUS_LOADER_BAD_BC_RUNT 0x00c3 errno.h 　
16264
 PXENV_STATUS_LOADER_NO_UNDI_ROMPXENV_STATUS_LOADER_NO_UNDI_ROM 0x00c4 errno.h 　
16265
 PXENV_STATUS_LOADER_BAD_UNDI_ROPXENV_STATUS_LOADER_BAD_UNDI_RO 0x00c5 errno.h 　
16266
 PXENV_STATUS_LOADER_BAD_UNDI_DRPXENV_STATUS_LOADER_BAD_UNDI_DR 0x00c6 errno.h 　
16267
 PXENV_STATUS_LOADER_NO_PXE_STRUPXENV_STATUS_LOADER_NO_PXE_STRU 0x00c8 errno.h 　
16268
 PXENV_STATUS_LOADER_NO_PXENV_STPXENV_STATUS_LOADER_NO_PXENV_ST 0x00c9 errno.h 　
16269
 PXENV_STATUS_LOADER_UNDI_STARTPXENV_STATUS_LOADER_UNDI_START 0x00ca errno.h 　
16270
 PXENV_STATUS_LOADER_BC_STARTPXENV_STATUS_LOADER_BC_START 0x00cb errno.h 　
16271
 ENOERRENOERR ( ERRFILE | PXENV_STATUS_SUCCESS | 0x00000000 ) errno.h 　
16272
 E2BIGE2BIG ( ERRFILE | PXENV_STATUS_BAD_FUNC | 0x01000000 ) errno.h 　
16273
 EACCESEACCES ( ERRFILE | PXENV_STATUS_TFTP_ACCESS_VIOLATION | 0x02000000 ) errno.h 　
16274
 EADDRINUSEEADDRINUSE ( ERRFILE | PXENV_STATUS_UDP_OPEN | 0x03000000 ) errno.h 　
16275
 EADDRNOTAVAILEADDRNOTAVAIL ( ERRFILE | PXENV_STATUS_UDP_OPEN | 0x04000000 ) errno.h 　
16276
 EAFNOSUPPORTEAFNOSUPPORT ( ERRFILE | PXENV_STATUS_UNSUPPORTED | 0x05000000 ) errno.h 　
16277
 EAGAINEAGAIN ( ERRFILE | PXENV_STATUS_FAILURE | 0x06000000 ) errno.h 　
16278
 EALREADYEALREADY ( ERRFILE | PXENV_STATUS_UDP_OPEN | 0x07000000 ) errno.h 　
16279
 EBADFEBADF ( ERRFILE | PXENV_STATUS_TFTP_CLOSED | 0x08000000 ) errno.h 　
16280
 EBADMSGEBADMSG ( ERRFILE | PXENV_STATUS_FAILURE | 0x09000000 ) errno.h 　
16281
 EBUSYEBUSY ( ERRFILE | PXENV_STATUS_OUT_OF_RESOURCES | 0x0a000000 ) errno.h 　
16282
 ECANCELEDECANCELED ( ERRFILE | PXENV_STATUS_BINL_CANCELED_BY_KEYSTROKE | 0x0b000000 ) errno.h 　
16283
 ECHILDECHILD ( ERRFILE | PXENV_STATUS_TFTP_FILE_NOT_FOUND | 0x0c000000 ) errno.h 　
16284
 ECONNABORTEDECONNABORTED ( ERRFILE | PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION | 0x0d000000 ) errno.h 　
16285
 ECONNREFUSEDECONNREFUSED ( ERRFILE | PXENV_STATUS_TFTP_CANNOT_OPEN_CONNECTION | 0x0e000000 ) errno.h 　
16286
 ECONNRESETECONNRESET ( ERRFILE | PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION | 0x0f000000 ) errno.h 　
16287
 EDEADLKEDEADLK ( ERRFILE | PXENV_STATUS_FAILURE | 0x10000000 ) errno.h 　
16288
 EDESTADDRREQEDESTADDRREQ ( ERRFILE | PXENV_STATUS_BAD_FUNC | 0x11000000 ) errno.h 　
16289
 EDOMEDOM ( ERRFILE | PXENV_STATUS_FAILURE | 0x12000000 ) errno.h 　
16290
 EDQUOTEDQUOT ( ERRFILE | PXENV_STATUS_FAILURE | 0x13000000 ) errno.h 　
16291
 EEXISTEEXIST ( ERRFILE | PXENV_STATUS_FAILURE | 0x14000000 ) errno.h 　
16292
 EFAULTEFAULT ( ERRFILE | PXENV_STATUS_MCOPY_PROBLEM | 0x15000000 ) errno.h 　
16293
 EFBIGEFBIG ( ERRFILE | PXENV_STATUS_MCOPY_PROBLEM | 0x16000000 ) errno.h 　
16294
 EHOSTUNREACHEHOSTUNREACH ( ERRFILE | PXENV_STATUS_ARP_TIMEOUT | 0x17000000 ) errno.h 　
16295
 EIDRMEIDRM ( ERRFILE | PXENV_STATUS_FAILURE | 0x18000000 ) errno.h 　
16296
 EILSEQEILSEQ ( ERRFILE | PXENV_STATUS_FAILURE | 0x19000000 ) errno.h 　
16297
 EINPROGRESSEINPROGRESS ( ERRFILE | PXENV_STATUS_FAILURE | 0x1a000000 ) errno.h 　
16298
 EINTREINTR ( ERRFILE | PXENV_STATUS_FAILURE | 0x1b000000 ) errno.h 　
16299
 EINVALEINVAL ( ERRFILE | PXENV_STATUS_BAD_FUNC | 0x1c000000 ) errno.h 　
16300
 EIOEIO ( ERRFILE | PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION | 0x1d000000 ) errno.h 　
16301
 EISCONNEISCONN ( ERRFILE | PXENV_STATUS_UDP_OPEN | 0x1e000000 ) errno.h 　
16302
 EISDIREISDIR ( ERRFILE | PXENV_STATUS_FAILURE | 0x1f000000 ) errno.h 　
16303
 ELOOPELOOP ( ERRFILE | PXENV_STATUS_FAILURE | 0x20000000 ) errno.h 　
16304
 EMFILEEMFILE ( ERRFILE | PXENV_STATUS_OUT_OF_RESOURCES | 0x21000000 ) errno.h 　
16305
 EMLINKEMLINK ( ERRFILE | PXENV_STATUS_FAILURE | 0x22000000 ) errno.h 　
16306
 EMSGSIZEEMSGSIZE ( ERRFILE | PXENV_STATUS_BAD_FUNC | 0x23000000 ) errno.h 　
16307
 EMULTIHOPEMULTIHOP ( ERRFILE | PXENV_STATUS_FAILURE | 0x24000000 ) errno.h 　
16308
 ENAMETOOLONGENAMETOOLONG ( ERRFILE | PXENV_STATUS_FAILURE | 0x25000000 ) errno.h 　
16309
 ENETDOWNENETDOWN ( ERRFILE | PXENV_STATUS_ARP_TIMEOUT | 0x26000000 ) errno.h 　
16310
 ENETRESETENETRESET ( ERRFILE | PXENV_STATUS_FAILURE | 0x27000000 ) errno.h 　
16311
 ENETUNREACHENETUNREACH ( ERRFILE | PXENV_STATUS_ARP_TIMEOUT | 0x28000000 ) errno.h 　
16312
 ENFILEENFILE ( ERRFILE | PXENV_STATUS_OUT_OF_RESOURCES | 0x29000000 ) errno.h 　
16313
 ENOBUFSENOBUFS ( ERRFILE | PXENV_STATUS_OUT_OF_RESOURCES | 0x2a000000 ) errno.h 　
16314
 ENODATAENODATA ( ERRFILE | PXENV_STATUS_FAILURE | 0x2b000000 ) errno.h 　
16315
 ENODEVENODEV ( ERRFILE | PXENV_STATUS_TFTP_FILE_NOT_FOUND | 0x2c000000 ) errno.h 　
16316
 ENOENTENOENT ( ERRFILE | PXENV_STATUS_TFTP_FILE_NOT_FOUND | 0x2d000000 ) errno.h 　
16317
 ENOEXECENOEXEC ( ERRFILE | PXENV_STATUS_FAILURE | 0x2e000000 ) errno.h 　
16318
 ENOLCKENOLCK ( ERRFILE | PXENV_STATUS_FAILURE | 0x2f000000 ) errno.h 　
16319
 ENOLINKENOLINK ( ERRFILE | PXENV_STATUS_FAILURE | 0x30000000 ) errno.h 　
16320
 ENOMEMENOMEM ( ERRFILE | PXENV_STATUS_OUT_OF_RESOURCES | 0x31000000 ) errno.h 　
16321
 ENOMSGENOMSG ( ERRFILE | PXENV_STATUS_FAILURE | 0x32000000 ) errno.h 　
16322
 ENOPROTOOPTENOPROTOOPT ( ERRFILE | PXENV_STATUS_UNSUPPORTED | 0x33000000 ) errno.h 　
16323
 ENOSPCENOSPC ( ERRFILE | PXENV_STATUS_OUT_OF_RESOURCES | 0x34000000 ) errno.h 　
16324
 ENOSRENOSR ( ERRFILE | PXENV_STATUS_OUT_OF_RESOURCES | 0x35000000 ) errno.h 　
16325
 ENOSTRENOSTR ( ERRFILE | PXENV_STATUS_FAILURE | 0x36000000 ) errno.h 　
16326
 ENOSYSENOSYS ( ERRFILE | PXENV_STATUS_UNSUPPORTED | 0x37000000 ) errno.h 　
16327
 ENOTCONNENOTCONN ( ERRFILE | PXENV_STATUS_FAILURE | 0x38000000 ) errno.h 　
16328
 ENOTDIRENOTDIR ( ERRFILE | PXENV_STATUS_FAILURE | 0x39000000 ) errno.h 　
16329
 ENOTEMPTYENOTEMPTY ( ERRFILE | PXENV_STATUS_FAILURE | 0x3a000000 ) errno.h 　
16330
 ENOTSOCKENOTSOCK ( ERRFILE | PXENV_STATUS_FAILURE | 0x3b000000 ) errno.h 　
16331
 ENOTSUPENOTSUP ( ERRFILE | PXENV_STATUS_UNSUPPORTED | 0x3c000000 ) errno.h 　
16332
 ENOTTYENOTTY ( ERRFILE | PXENV_STATUS_FAILURE | 0x3d000000 ) errno.h 　
16333
 ENXIOENXIO ( ERRFILE | PXENV_STATUS_TFTP_FILE_NOT_FOUND | 0x3e000000 ) errno.h 　
16334
 EOPNOTSUPPEOPNOTSUPP ( ERRFILE | PXENV_STATUS_UNSUPPORTED | 0x3f000000 ) errno.h 　
16335
 EOVERFLOWEOVERFLOW ( ERRFILE | PXENV_STATUS_FAILURE | 0x40000000 ) errno.h 　
16336
 EPERMEPERM ( ERRFILE | PXENV_STATUS_TFTP_ACCESS_VIOLATION | 0x41000000 ) errno.h 　
16337
 EPIPEEPIPE ( ERRFILE | PXENV_STATUS_FAILURE | 0x42000000 ) errno.h 　
16338
 EPROTOEPROTO ( ERRFILE | PXENV_STATUS_FAILURE | 0x43000000 ) errno.h 　
16339
 EPROTONOSUPPORTEPROTONOSUPPORT ( ERRFILE | PXENV_STATUS_UNSUPPORTED | 0x44000000 ) errno.h 　
16340
 EPROTOTYPEEPROTOTYPE ( ERRFILE | PXENV_STATUS_FAILURE | 0x45000000 ) errno.h 　
16341
 ERANGEERANGE ( ERRFILE | PXENV_STATUS_FAILURE | 0x46000000 ) errno.h 　
16342
 EROFSEROFS ( ERRFILE | PXENV_STATUS_FAILURE | 0x47000000 ) errno.h 　
16343
 ESPIPEESPIPE ( ERRFILE | PXENV_STATUS_FAILURE | 0x48000000 ) errno.h 　
16344
 ESRCHESRCH ( ERRFILE | PXENV_STATUS_TFTP_FILE_NOT_FOUND | 0x49000000 ) errno.h 　
16345
 ESTALEESTALE ( ERRFILE | PXENV_STATUS_FAILURE | 0x4a000000 ) errno.h 　
16346
 ETIMEETIME ( ERRFILE | PXENV_STATUS_FAILURE | 0x4b000000 ) errno.h 　
16347
 ETIMEDOUTETIMEDOUT ( ERRFILE | PXENV_STATUS_TFTP_READ_TIMEOUT | 0x4c000000 ) errno.h 　
16348
 ETXTBSYETXTBSY ( ERRFILE | PXENV_STATUS_FAILURE | 0x4d000000 ) errno.h 　
16349
 EWOULDBLOCKEWOULDBLOCK ( ERRFILE | PXENV_STATUS_TFTP_OPEN | 0x4e000000 ) errno.h 　
16350
 EXDEVEXDEV ( ERRFILE | PXENV_STATUS_FAILURE | 0x4f000000 ) errno.h 　
16351
 EUNIQ_01EUNIQ_01 0x00000100 errno.h 　
16352
 EUNIQ_02EUNIQ_02 0x00000200 errno.h 　
16353
 EUNIQ_03EUNIQ_03 0x00000300 errno.h 　
16354
 EUNIQ_04EUNIQ_04 0x00000400 errno.h 　
16355
 EUNIQ_05EUNIQ_05 0x00000500 errno.h 　
16356
 EUNIQ_06EUNIQ_06 0x00000600 errno.h 　
16357
 EUNIQ_07EUNIQ_07 0x00000700 errno.h 　
16358
 EUNIQ_08EUNIQ_08 0x00000800 errno.h 　
16359
 EUNIQ_09EUNIQ_09 0x00000900 errno.h 　
16360
 EUNIQ_0AEUNIQ_0A 0x00000a00 errno.h 　
16361
 EUNIQ_0BEUNIQ_0B 0x00000b00 errno.h 　
16362
 EUNIQ_0CEUNIQ_0C 0x00000c00 errno.h 　
16363
 EUNIQ_0DEUNIQ_0D 0x00000d00 errno.h 　
16364
 EUNIQ_0EEUNIQ_0E 0x00000e00 errno.h 　
16365
 EUNIQ_0FEUNIQ_0F 0x00000f00 errno.h 　
16366
 EUNIQ_10EUNIQ_10 0x00001000 errno.h 　
16367
 EUNIQ_11EUNIQ_11 0x00001100 errno.h 　
16368
 EUNIQ_12EUNIQ_12 0x00001200 errno.h 　
16369
 EUNIQ_13EUNIQ_13 0x00001300 errno.h 　
16370
 EUNIQ_14EUNIQ_14 0x00001400 errno.h 　
16371
 EUNIQ_15EUNIQ_15 0x00001500 errno.h 　
16372
 EUNIQ_16EUNIQ_16 0x00001600 errno.h 　
16373
 EUNIQ_17EUNIQ_17 0x00001700 errno.h 　
16374
 EUNIQ_18EUNIQ_18 0x00001800 errno.h 　
16375
 EUNIQ_19EUNIQ_19 0x00001900 errno.h 　
16376
 EUNIQ_1AEUNIQ_1A 0x00001a00 errno.h 　
16377
 EUNIQ_1BEUNIQ_1B 0x00001b00 errno.h 　
16378
 EUNIQ_1CEUNIQ_1C 0x00001c00 errno.h 　
16379
 EUNIQ_1DEUNIQ_1D 0x00001d00 errno.h 　
16380
 EUNIQ_1EEUNIQ_1E 0x00001e00 errno.h 　
16381
 EUNIQ_1FEUNIQ_1F 0x00001f00 errno.h 　
16382
 PHN_MAX_NUM_PORTSPHN_MAX_NUM_PORTS 4 phantom.c 　
16383
 PHN_CMDPEG_INIT_TIMEOUT_SECPHN_CMDPEG_INIT_TIMEOUT_SEC 50 phantom.c 　
16384
 PHN_RCVPEG_INIT_TIMEOUT_SECPHN_RCVPEG_INIT_TIMEOUT_SEC 2 phantom.c 　
16385
 PHN_ISSUE_CMD_TIMEOUT_MSPHN_ISSUE_CMD_TIMEOUT_MS 2000 phantom.c 　
16386
 PHN_TEST_MEM_TIMEOUT_MSPHN_TEST_MEM_TIMEOUT_MS 100 phantom.c 　
16387
 PHN_CLP_CMD_TIMEOUT_MSPHN_CLP_CMD_TIMEOUT_MS 500 phantom.c 　
16388
 PHN_LINK_POLL_FREQUENCYPHN_LINK_POLL_FREQUENCY 4096 phantom.c 　
16389
 PHN_NUM_RDSPHN_NUM_RDS 32 phantom.c 　
16390
 PHN_RDS_MAX_FILLPHN_RDS_MAX_FILL 16 phantom.c 　
16391
 PHN_RX_BUFSIZEPHN_RX_BUFSIZE ( 32 + \ ETH_FRAME_LEN ) phantom.c 　
16392
 PHN_NUM_SDSPHN_NUM_SDS 32 phantom.c 　
16393
 PHN_NUM_CDSPHN_NUM_CDS 8 phantom.c 　
16394
 PHN_CLP_TAG_MAGICPHN_CLP_TAG_MAGIC 0xc19c1900UL phantom.c 　
16395
 PHN_CLP_TAG_MAGIC_MASKPHN_CLP_TAG_MAGIC_MASK 0xffffff00UL phantom.c 　
16396
 PHN_CLP_BLKSIZEPHN_CLP_BLKSIZE ( sizeof ( union phantom_clp_data ) ) phantom.c 　
16397
 NX_CDRP_CLEARNX_CDRP_CLEAR 0x00000000 nxhal_nic_interface.h 　
16398
 NX_CDRP_CMD_BITNX_CDRP_CMD_BIT 0x80000000 nxhal_nic_interface.h 　
16399
 NX_CDRP_RSP_OKNX_CDRP_RSP_OK 0x00000001 nxhal_nic_interface.h 　
16400
 NX_CDRP_RSP_FAILNX_CDRP_RSP_FAIL 0x00000002 nxhal_nic_interface.h 　
16401
 NX_CDRP_RSP_TIMEOUTNX_CDRP_RSP_TIMEOUT 0x00000003 nxhal_nic_interface.h 　
16402
 NX_CDRP_CMD_SUBMIT_CAPABILITIESNX_CDRP_CMD_SUBMIT_CAPABILITIES 0x00000001 nxhal_nic_interface.h 　
16403
 NX_CDRP_CMD_READ_MAX_RDS_PER_CTNX_CDRP_CMD_READ_MAX_RDS_PER_CT 0x00000002 nxhal_nic_interface.h 　
16404
 NX_CDRP_CMD_READ_MAX_SDS_PER_CTNX_CDRP_CMD_READ_MAX_SDS_PER_CT 0x00000003 nxhal_nic_interface.h 　
16405
 NX_CDRP_CMD_READ_MAX_RULES_PER_NX_CDRP_CMD_READ_MAX_RULES_PER_ 0x00000004 nxhal_nic_interface.h 　
16406
 NX_CDRP_CMD_READ_MAX_RX_CTXNX_CDRP_CMD_READ_MAX_RX_CTX 0x00000005 nxhal_nic_interface.h 　
16407
 NX_CDRP_CMD_READ_MAX_TX_CTXNX_CDRP_CMD_READ_MAX_TX_CTX 0x00000006 nxhal_nic_interface.h 　
16408
 NX_CDRP_CMD_CREATE_RX_CTXNX_CDRP_CMD_CREATE_RX_CTX 0x00000007 nxhal_nic_interface.h 　
16409
 NX_CDRP_CMD_DESTROY_RX_CTXNX_CDRP_CMD_DESTROY_RX_CTX 0x00000008 nxhal_nic_interface.h 　
16410
 NX_CDRP_CMD_CREATE_TX_CTXNX_CDRP_CMD_CREATE_TX_CTX 0x00000009 nxhal_nic_interface.h 　
16411
 NX_CDRP_CMD_DESTROY_TX_CTXNX_CDRP_CMD_DESTROY_TX_CTX 0x0000000a nxhal_nic_interface.h 　
16412
 NX_CDRP_CMD_SETUP_STATISTICSNX_CDRP_CMD_SETUP_STATISTICS 0x0000000e nxhal_nic_interface.h 　
16413
 NX_CDRP_CMD_GET_STATISTICSNX_CDRP_CMD_GET_STATISTICS 0x0000000f nxhal_nic_interface.h 　
16414
 NX_CDRP_CMD_DELETE_STATISTICSNX_CDRP_CMD_DELETE_STATISTICS 0x00000010 nxhal_nic_interface.h 　
16415
 NX_CDRP_CMD_MAXNX_CDRP_CMD_MAX 0x00000011 nxhal_nic_interface.h 　
16416
 NX_CAP0_LEGACY_CONTEXTNX_CAP0_LEGACY_CONTEXT NX_CAP_BIT(0, 0) nxhal_nic_interface.h 　
16417
 NX_CAP0_MULTI_CONTEXTNX_CAP0_MULTI_CONTEXT NX_CAP_BIT(0, 1) nxhal_nic_interface.h 　
16418
 NX_CAP0_LEGACY_MNNX_CAP0_LEGACY_MN NX_CAP_BIT(0, 2) nxhal_nic_interface.h 　
16419
 NX_CAP0_LEGACY_MSNX_CAP0_LEGACY_MS NX_CAP_BIT(0, 3) nxhal_nic_interface.h 　
16420
 NX_CAP0_CUT_THROUGHNX_CAP0_CUT_THROUGH NX_CAP_BIT(0, 4) nxhal_nic_interface.h 　
16421
 NX_CAP0_LRONX_CAP0_LRO NX_CAP_BIT(0, 5) nxhal_nic_interface.h 　
16422
 NX_CAP0_LSONX_CAP0_LSO NX_CAP_BIT(0, 6) nxhal_nic_interface.h 　
16423
 NX_CAP1_NICNX_CAP1_NIC NX_CAP_BIT(1, 0) nxhal_nic_interface.h 　
16424
 NX_CAP1_PXENX_CAP1_PXE NX_CAP_BIT(1, 1) nxhal_nic_interface.h 　
16425
 NX_CAP1_CHIMNEYNX_CAP1_CHIMNEY NX_CAP_BIT(1, 2) nxhal_nic_interface.h 　
16426
 NX_CAP1_LSANX_CAP1_LSA NX_CAP_BIT(1, 3) nxhal_nic_interface.h 　
16427
 NX_CAP1_RDMANX_CAP1_RDMA NX_CAP_BIT(1, 4) nxhal_nic_interface.h 　
16428
 NX_CAP1_ISCSINX_CAP1_ISCSI NX_CAP_BIT(1, 5) nxhal_nic_interface.h 　
16429
 NX_CAP1_FCOENX_CAP1_FCOE NX_CAP_BIT(1, 6) nxhal_nic_interface.h 　
16430
 NX_RX_RULETYPE_DEFAULTNX_RX_RULETYPE_DEFAULT 0 nxhal_nic_interface.h 　
16431
 NX_RX_RULETYPE_MACNX_RX_RULETYPE_MAC 1 nxhal_nic_interface.h 　
16432
 NX_RX_RULETYPE_MAC_VLANNX_RX_RULETYPE_MAC_VLAN 2 nxhal_nic_interface.h 　
16433
 NX_RX_RULETYPE_MAC_RSSNX_RX_RULETYPE_MAC_RSS 3 nxhal_nic_interface.h 　
16434
 NX_RX_RULETYPE_MAC_VLAN_RSSNX_RX_RULETYPE_MAC_VLAN_RSS 4 nxhal_nic_interface.h 　
16435
 NX_RX_RULETYPE_MAXNX_RX_RULETYPE_MAX 5 nxhal_nic_interface.h 　
16436
 NX_RX_RULECMD_ADDNX_RX_RULECMD_ADD 0 nxhal_nic_interface.h 　
16437
 NX_RX_RULECMD_REMOVENX_RX_RULECMD_REMOVE 1 nxhal_nic_interface.h 　
16438
 NX_RX_RULECMD_MAXNX_RX_RULECMD_MAX 2 nxhal_nic_interface.h 　
16439
 NX_HOST_CTX_STATE_FREEDNX_HOST_CTX_STATE_FREED 0 nxhal_nic_interface.h Invalid state
16440
 NX_HOST_CTX_STATE_ALLOCATEDNX_HOST_CTX_STATE_ALLOCATED 1 nxhal_nic_interface.h Not committed
16441
 NX_HOST_CTX_STATE_ACTIVENX_HOST_CTX_STATE_ACTIVE 2 nxhal_nic_interface.h 　
16442
 NX_HOST_CTX_STATE_DISABLEDNX_HOST_CTX_STATE_DISABLED 3 nxhal_nic_interface.h 　
16443
 NX_HOST_CTX_STATE_QUIESCEDNX_HOST_CTX_STATE_QUIESCED 4 nxhal_nic_interface.h 　
16444
 NX_HOST_CTX_STATE_MAXNX_HOST_CTX_STATE_MAX 5 nxhal_nic_interface.h 　
16445
 NX_HOST_INT_CRB_MODE_UNIQUENX_HOST_INT_CRB_MODE_UNIQUE 0 nxhal_nic_interface.h 　
16446
 NX_HOST_INT_CRB_MODE_SHAREDNX_HOST_INT_CRB_MODE_SHARED 1 nxhal_nic_interface.h <= LEGACY
16447
 NX_HOST_INT_CRB_MODE_NORXNX_HOST_INT_CRB_MODE_NORX 2 nxhal_nic_interface.h 　
16448
 NX_HOST_INT_CRB_MODE_NOTXNX_HOST_INT_CRB_MODE_NOTX 3 nxhal_nic_interface.h 　
16449
 NX_HOST_INT_CRB_MODE_NORXTXNX_HOST_INT_CRB_MODE_NORXTX 4 nxhal_nic_interface.h 　
16450
 NX_DESTROY_CTX_RESETNX_DESTROY_CTX_RESET 0 nxhal_nic_interface.h 　
16451
 NX_DESTROY_CTX_D3_RESETNX_DESTROY_CTX_D3_RESET 1 nxhal_nic_interface.h 　
16452
 NX_DESTROY_CTX_MAXNX_DESTROY_CTX_MAX 2 nxhal_nic_interface.h 　
16453
 NX_HOST_RDS_CRB_MODE_UNIQUENX_HOST_RDS_CRB_MODE_UNIQUE 0 nxhal_nic_interface.h <= LEGACY
16454
 NX_HOST_RDS_CRB_MODE_SHAREDNX_HOST_RDS_CRB_MODE_SHARED 1 nxhal_nic_interface.h 　
16455
 NX_HOST_RDS_CRB_MODE_CUSTOMNX_HOST_RDS_CRB_MODE_CUSTOM 2 nxhal_nic_interface.h 　
16456
 NX_HOST_RDS_CRB_MODE_MAXNX_HOST_RDS_CRB_MODE_MAX 3 nxhal_nic_interface.h 　
16457
 NX_RDS_RING_TYPE_NORMALNX_RDS_RING_TYPE_NORMAL 0 nxhal_nic_interface.h 　
16458
 NX_RDS_RING_TYPE_JUMBONX_RDS_RING_TYPE_JUMBO 1 nxhal_nic_interface.h 　
16459
 NX_RDS_RING_TYPE_LRONX_RDS_RING_TYPE_LRO 2 nxhal_nic_interface.h 　
16460
 NX_RDS_RING_TYPE_MAXNX_RDS_RING_TYPE_MAX 3 nxhal_nic_interface.h 　
16461
 NX_STATISTICS_MODE_INVALIDNX_STATISTICS_MODE_INVALID 0 nxhal_nic_interface.h 　
16462
 NX_STATISTICS_MODE_PULLNX_STATISTICS_MODE_PULL 1 nxhal_nic_interface.h 　
16463
 NX_STATISTICS_MODE_PUSHNX_STATISTICS_MODE_PUSH 2 nxhal_nic_interface.h 　
16464
 NX_STATISTICS_MODE_SINGLE_SHOTNX_STATISTICS_MODE_SINGLE_SHOT 3 nxhal_nic_interface.h 　
16465
 NX_STATISTICS_MODE_MAXNX_STATISTICS_MODE_MAX 4 nxhal_nic_interface.h 　
16466
 NX_STATISTICS_TYPE_INVALIDNX_STATISTICS_TYPE_INVALID 0 nxhal_nic_interface.h 　
16467
 NX_STATISTICS_TYPE_NIC_RX_CORENX_STATISTICS_TYPE_NIC_RX_CORE 1 nxhal_nic_interface.h 　
16468
 NX_STATISTICS_TYPE_NIC_TX_CORENX_STATISTICS_TYPE_NIC_TX_CORE 2 nxhal_nic_interface.h 　
16469
 NX_STATISTICS_TYPE_NIC_RX_ALLNX_STATISTICS_TYPE_NIC_RX_ALL 3 nxhal_nic_interface.h 　
16470
 NX_STATISTICS_TYPE_NIC_TX_ALLNX_STATISTICS_TYPE_NIC_TX_ALL 4 nxhal_nic_interface.h 　
16471
 NX_STATISTICS_TYPE_MAXNX_STATISTICS_TYPE_MAX 5 nxhal_nic_interface.h 　
16472
 NXHAL_VERSIONNXHAL_VERSION 1 phantom.h 　
16473
 UNM_DMA_BUFFER_ALIGNUNM_DMA_BUFFER_ALIGN 16 phantom.h 　
16474
 __unm_dma_aligned__unm_dma_aligned __attribute__ (( aligned ( UNM_DMA_BUFFER_ALIGN ) )) phantom.h 　
16475
 UNM_128M_CRB_WINDOWUNM_128M_CRB_WINDOW 0x6110210UL phantom.h 　
16476
 UNM_32M_CRB_WINDOWUNM_32M_CRB_WINDOW 0x0110210UL phantom.h 　
16477
 UNM_2M_CRB_WINDOWUNM_2M_CRB_WINDOW 0x0130060UL phantom.h 　
16478
 UNM_CRB_PCIEUNM_CRB_PCIE UNM_CRB_BASE ( UNM_CRB_BLK_PCIE ) phantom.h 　
16479
 UNM_PCIE_SEM2_LOCKUNM_PCIE_SEM2_LOCK ( UNM_CRB_PCIE + 0x1c010 ) phantom.h 　
16480
 UNM_PCIE_SEM2_UNLOCKUNM_PCIE_SEM2_UNLOCK ( UNM_CRB_PCIE + 0x1c014 ) phantom.h 　
16481
 UNM_CRB_CAMUNM_CRB_CAM UNM_CRB_BASE ( UNM_CRB_BLK_CAM ) phantom.h 　
16482
 UNM_CAM_RAMUNM_CAM_RAM ( UNM_CRB_CAM + 0x02000 ) phantom.h 　
16483
 UNM_CAM_RAM_PORT_MODEUNM_CAM_RAM_PORT_MODE ( UNM_CAM_RAM + 0x00024 ) phantom.h 　
16484
 UNM_CAM_RAM_PORT_MODE_AUTO_NEGUNM_CAM_RAM_PORT_MODE_AUTO_NEG 4 phantom.h 　
16485
 UNM_CAM_RAM_PORT_MODE_AUTO_NEG_UNM_CAM_RAM_PORT_MODE_AUTO_NEG_ 5 phantom.h 　
16486
 UNM_CAM_RAM_DMESG_SIG_MAGICUNM_CAM_RAM_DMESG_SIG_MAGIC 0xcafebabeUL phantom.h 　
16487
 UNM_CAM_RAM_NUM_DMESG_BUFFERSUNM_CAM_RAM_NUM_DMESG_BUFFERS 5 phantom.h 　
16488
 UNM_CAM_RAM_CLP_COMMANDUNM_CAM_RAM_CLP_COMMAND ( UNM_CAM_RAM + 0x000c0 ) phantom.h 　
16489
 UNM_CAM_RAM_CLP_COMMAND_LASTUNM_CAM_RAM_CLP_COMMAND_LAST 0x00000080UL phantom.h 　
16490
 UNM_CAM_RAM_CLP_DATA_LOUNM_CAM_RAM_CLP_DATA_LO ( UNM_CAM_RAM + 0x000c4 ) phantom.h 　
16491
 UNM_CAM_RAM_CLP_DATA_HIUNM_CAM_RAM_CLP_DATA_HI ( UNM_CAM_RAM + 0x000c8 ) phantom.h 　
16492
 UNM_CAM_RAM_CLP_STATUSUNM_CAM_RAM_CLP_STATUS ( UNM_CAM_RAM + 0x000cc ) phantom.h 　
16493
 UNM_CAM_RAM_CLP_STATUS_STARTUNM_CAM_RAM_CLP_STATUS_START 0x00000001UL phantom.h 　
16494
 UNM_CAM_RAM_CLP_STATUS_DONEUNM_CAM_RAM_CLP_STATUS_DONE 0x00000002UL phantom.h 　
16495
 UNM_CAM_RAM_CLP_STATUS_ERRORUNM_CAM_RAM_CLP_STATUS_ERROR 0x0000ff00UL phantom.h 　
16496
 UNM_CAM_RAM_CLP_STATUS_UNINITIAUNM_CAM_RAM_CLP_STATUS_UNINITIA 0xffffffffUL phantom.h 　
16497
 UNM_CAM_RAM_BOOT_ENABLEUNM_CAM_RAM_BOOT_ENABLE ( UNM_CAM_RAM + 0x000fc ) phantom.h 　
16498
 UNM_CAM_RAM_WOL_PORT_MODEUNM_CAM_RAM_WOL_PORT_MODE ( UNM_CAM_RAM + 0x00198 ) phantom.h 　
16499
 UNM_CAM_RAM_MAC_ADDRSUNM_CAM_RAM_MAC_ADDRS ( UNM_CAM_RAM + 0x001c0 ) phantom.h 　
16500
 UNM_CAM_RAM_COLD_BOOTUNM_CAM_RAM_COLD_BOOT ( UNM_CAM_RAM + 0x001fc ) phantom.h 　
16501
 UNM_CAM_RAM_COLD_BOOT_MAGICUNM_CAM_RAM_COLD_BOOT_MAGIC 0x55555555UL phantom.h 　
16502
 UNM_NIC_REGUNM_NIC_REG ( UNM_CRB_CAM + 0x02200 ) phantom.h 　
16503
 UNM_NIC_REG_NX_CDRPUNM_NIC_REG_NX_CDRP ( UNM_NIC_REG + 0x00018 ) phantom.h 　
16504
 UNM_NIC_REG_NX_ARG1UNM_NIC_REG_NX_ARG1 ( UNM_NIC_REG + 0x0001c ) phantom.h 　
16505
 UNM_NIC_REG_NX_ARG2UNM_NIC_REG_NX_ARG2 ( UNM_NIC_REG + 0x00020 ) phantom.h 　
16506
 UNM_NIC_REG_NX_ARG3UNM_NIC_REG_NX_ARG3 ( UNM_NIC_REG + 0x00024 ) phantom.h 　
16507
 UNM_NIC_REG_NX_SIGNUNM_NIC_REG_NX_SIGN ( UNM_NIC_REG + 0x00028 ) phantom.h 　
16508
 UNM_NIC_REG_DUMMY_BUF_ADDR_HIUNM_NIC_REG_DUMMY_BUF_ADDR_HI ( UNM_NIC_REG + 0x0003c ) phantom.h 　
16509
 UNM_NIC_REG_DUMMY_BUF_ADDR_LOUNM_NIC_REG_DUMMY_BUF_ADDR_LO ( UNM_NIC_REG + 0x00040 ) phantom.h 　
16510
 UNM_NIC_REG_CMDPEG_STATEUNM_NIC_REG_CMDPEG_STATE ( UNM_NIC_REG + 0x00050 ) phantom.h 　
16511
 UNM_NIC_REG_CMDPEG_STATE_INITIAUNM_NIC_REG_CMDPEG_STATE_INITIA 0xff01 phantom.h 　
16512
 UNM_NIC_REG_CMDPEG_STATE_INITIAUNM_NIC_REG_CMDPEG_STATE_INITIA 0xf00f phantom.h 　
16513
 UNM_NIC_REG_DUMMY_BUFUNM_NIC_REG_DUMMY_BUF ( UNM_NIC_REG + 0x000fc ) phantom.h 　
16514
 UNM_NIC_REG_DUMMY_BUF_INITUNM_NIC_REG_DUMMY_BUF_INIT 0 phantom.h 　
16515
 UNM_NIC_REG_XG_STATE_P3UNM_NIC_REG_XG_STATE_P3 ( UNM_NIC_REG + 0x00098 ) phantom.h 　
16516
 UNM_NIC_REG_XG_STATE_P3_LINK_UPUNM_NIC_REG_XG_STATE_P3_LINK_UP 0x01 phantom.h 　
16517
 UNM_NIC_REG_XG_STATE_P3_LINK_DOUNM_NIC_REG_XG_STATE_P3_LINK_DO 0x02 phantom.h 　
16518
 UNM_NIC_REG_RCVPEG_STATEUNM_NIC_REG_RCVPEG_STATE ( UNM_NIC_REG + 0x0013c ) phantom.h 　
16519
 UNM_NIC_REG_RCVPEG_STATE_INITIAUNM_NIC_REG_RCVPEG_STATE_INITIA 0xff01 phantom.h 　
16520
 UNM_NIC_REG_SW_INT_MASK_0UNM_NIC_REG_SW_INT_MASK_0 ( UNM_NIC_REG + 0x001d8 ) phantom.h 　
16521
 UNM_NIC_REG_SW_INT_MASK_1UNM_NIC_REG_SW_INT_MASK_1 ( UNM_NIC_REG + 0x001e0 ) phantom.h 　
16522
 UNM_NIC_REG_SW_INT_MASK_2UNM_NIC_REG_SW_INT_MASK_2 ( UNM_NIC_REG + 0x001e4 ) phantom.h 　
16523
 UNM_NIC_REG_SW_INT_MASK_3UNM_NIC_REG_SW_INT_MASK_3 ( UNM_NIC_REG + 0x001e8 ) phantom.h 　
16524
 UNM_CRB_ROMUSBUNM_CRB_ROMUSB UNM_CRB_BASE ( UNM_CRB_BLK_ROMUSB ) phantom.h 　
16525
 UNM_ROMUSB_GLBUNM_ROMUSB_GLB ( UNM_CRB_ROMUSB + 0x00000 ) phantom.h 　
16526
 UNM_ROMUSB_GLB_STATUSUNM_ROMUSB_GLB_STATUS ( UNM_ROMUSB_GLB + 0x00004 ) phantom.h 　
16527
 UNM_ROMUSB_GLB_STATUS_ROM_DONEUNM_ROMUSB_GLB_STATUS_ROM_DONE ( 1 << 1 ) phantom.h 　
16528
 UNM_ROMUSB_GLB_SW_RESETUNM_ROMUSB_GLB_SW_RESET ( UNM_ROMUSB_GLB + 0x00008 ) phantom.h 　
16529
 UNM_ROMUSB_GLB_SW_RESET_MAGICUNM_ROMUSB_GLB_SW_RESET_MAGIC 0x0080000fUL phantom.h 　
16530
 UNM_ROMUSB_GLB_PEGTUNE_DONEUNM_ROMUSB_GLB_PEGTUNE_DONE ( UNM_ROMUSB_GLB + 0x0005c ) phantom.h 　
16531
 UNM_ROMUSB_GLB_PEGTUNE_DONE_MAGUNM_ROMUSB_GLB_PEGTUNE_DONE_MAG 0x31 phantom.h 　
16532
 UNM_ROMUSB_ROMUNM_ROMUSB_ROM ( UNM_CRB_ROMUSB + 0x10000 ) phantom.h 　
16533
 UNM_ROMUSB_ROM_INSTR_OPCODEUNM_ROMUSB_ROM_INSTR_OPCODE ( UNM_ROMUSB_ROM + 0x00004 ) phantom.h 　
16534
 UNM_ROMUSB_ROM_ADDRESSUNM_ROMUSB_ROM_ADDRESS ( UNM_ROMUSB_ROM + 0x00008 ) phantom.h 　
16535
 UNM_ROMUSB_ROM_WDATAUNM_ROMUSB_ROM_WDATA ( UNM_ROMUSB_ROM + 0x0000c ) phantom.h 　
16536
 UNM_ROMUSB_ROM_ABYTE_CNTUNM_ROMUSB_ROM_ABYTE_CNT ( UNM_ROMUSB_ROM + 0x00010 ) phantom.h 　
16537
 UNM_ROMUSB_ROM_DUMMY_BYTE_CNTUNM_ROMUSB_ROM_DUMMY_BYTE_CNT ( UNM_ROMUSB_ROM + 0x00014 ) phantom.h 　
16538
 UNM_ROMUSB_ROM_RDATAUNM_ROMUSB_ROM_RDATA ( UNM_ROMUSB_ROM + 0x00018 ) phantom.h 　
16539
 UNM_CRB_TESTUNM_CRB_TEST UNM_CRB_BASE ( UNM_CRB_BLK_TEST ) phantom.h 　
16540
 UNM_TEST_CONTROLUNM_TEST_CONTROL ( UNM_CRB_TEST + 0x00090 ) phantom.h 　
16541
 UNM_TEST_CONTROL_STARTUNM_TEST_CONTROL_START 0x01 phantom.h 　
16542
 UNM_TEST_CONTROL_ENABLEUNM_TEST_CONTROL_ENABLE 0x02 phantom.h 　
16543
 UNM_TEST_CONTROL_BUSYUNM_TEST_CONTROL_BUSY 0x08 phantom.h 　
16544
 UNM_TEST_ADDR_LOUNM_TEST_ADDR_LO ( UNM_CRB_TEST + 0x00094 ) phantom.h 　
16545
 UNM_TEST_ADDR_HIUNM_TEST_ADDR_HI ( UNM_CRB_TEST + 0x00098 ) phantom.h 　
16546
 UNM_TEST_RDDATA_LOUNM_TEST_RDDATA_LO ( UNM_CRB_TEST + 0x000a8 ) phantom.h 　
16547
 UNM_TEST_RDDATA_HIUNM_TEST_RDDATA_HI ( UNM_CRB_TEST + 0x000ac ) phantom.h 　
16548
 UNM_CRB_PEG_0UNM_CRB_PEG_0 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_0 ) phantom.h 　
16549
 UNM_PEG_0_HALT_STATUSUNM_PEG_0_HALT_STATUS ( UNM_CRB_PEG_0 + 0x00030 ) phantom.h 　
16550
 UNM_PEG_0_HALTUNM_PEG_0_HALT ( UNM_CRB_PEG_0 + 0x0003c ) phantom.h 　
16551
 UNM_CRB_PEG_1UNM_CRB_PEG_1 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_1 ) phantom.h 　
16552
 UNM_PEG_1_HALT_STATUSUNM_PEG_1_HALT_STATUS ( UNM_CRB_PEG_1 + 0x00030 ) phantom.h 　
16553
 UNM_PEG_1_HALTUNM_PEG_1_HALT ( UNM_CRB_PEG_1 + 0x0003c ) phantom.h 　
16554
 UNM_CRB_PEG_2UNM_CRB_PEG_2 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_2 ) phantom.h 　
16555
 UNM_PEG_2_HALT_STATUSUNM_PEG_2_HALT_STATUS ( UNM_CRB_PEG_2 + 0x00030 ) phantom.h 　
16556
 UNM_PEG_2_HALTUNM_PEG_2_HALT ( UNM_CRB_PEG_2 + 0x0003c ) phantom.h 　
16557
 UNM_CRB_PEG_3UNM_CRB_PEG_3 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_3 ) phantom.h 　
16558
 UNM_PEG_3_HALT_STATUSUNM_PEG_3_HALT_STATUS ( UNM_CRB_PEG_3 + 0x00030 ) phantom.h 　
16559
 UNM_PEG_3_HALTUNM_PEG_3_HALT ( UNM_CRB_PEG_3 + 0x0003c ) phantom.h 　
16560
 UNM_CRB_PEG_4UNM_CRB_PEG_4 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_4 ) phantom.h 　
16561
 UNM_PEG_4_HALT_STATUSUNM_PEG_4_HALT_STATUS ( UNM_CRB_PEG_4 + 0x00030 ) phantom.h 　
16562
 UNM_PEG_4_HALTUNM_PEG_4_HALT ( UNM_CRB_PEG_4 + 0x0003c ) phantom.h 　
16563
 READLINE_MAXREADLINE_MAX 256 readline.c 　
16564
 ERRFILEERRFILE 0 strerror.c 　
16565
 VALID_LINK_TIMEOUTVALID_LINK_TIMEOUT 100 etherboot.h 10.0 seconds
16566
 DISK_IDEDISK_IDE 1 fs.h 　
16567
 DISK_MEMDISK_MEM 2 fs.h 　
16568
 DISK_USBDISK_USB 3 fs.h 　
16569
 PARTITION_UNKNOWNPARTITION_UNKNOWN 0xbad6a7 fs.h 　
16570
 I365_IDENTI365_IDENT 0x00 i82365.h Identification and revision
16571
 I365_STATUSI365_STATUS 0x01 i82365.h Interface status
16572
 I365_POWERI365_POWER 0x02 i82365.h Power and RESETDRV control
16573
 I365_INTCTLI365_INTCTL 0x03 i82365.h Interrupt and general control
16574
 I365_CSCI365_CSC 0x04 i82365.h Card status change
16575
 I365_CSCINTI365_CSCINT 0x05 i82365.h Card status change interrupt control
16576
 I365_ADDRWINI365_ADDRWIN 0x06 i82365.h Address window enable
16577
 I365_IOCTLI365_IOCTL 0x07 i82365.h I/O control
16578
 I365_GENCTLI365_GENCTL 0x16 i82365.h Card detect and general control
16579
 I365_GBLCTLI365_GBLCTL 0x1E i82365.h Global control register
16580
 I365_W_STARTI365_W_START 0 i82365.h 　
16581
 I365_W_STOPI365_W_STOP 2 i82365.h 　
16582
 I365_W_OFFI365_W_OFF 4 i82365.h 　
16583
 I365_CS_BVD1I365_CS_BVD1 0x01 i82365.h 　
16584
 I365_CS_STSCHGI365_CS_STSCHG 0x01 i82365.h 　
16585
 I365_CS_BVD2I365_CS_BVD2 0x02 i82365.h 　
16586
 I365_CS_SPKRI365_CS_SPKR 0x02 i82365.h 　
16587
 I365_CS_DETECTI365_CS_DETECT 0x0C i82365.h 　
16588
 I365_CS_WRPROTI365_CS_WRPROT 0x10 i82365.h 　
16589
 I365_CS_READYI365_CS_READY 0x20 i82365.h Inverted
16590
 I365_CS_POWERONI365_CS_POWERON 0x40 i82365.h 　
16591
 I365_CS_GPII365_CS_GPI 0x80 i82365.h 　
16592
 I365_PWR_OFFI365_PWR_OFF 0x00 i82365.h Turn off the socket
16593
 I365_PWR_OUTI365_PWR_OUT 0x80 i82365.h Output enable
16594
 I365_PWR_NORESETI365_PWR_NORESET 0x40 i82365.h Disable RESETDRV on resume
16595
 I365_PWR_AUTOI365_PWR_AUTO 0x20 i82365.h Auto pwr switch enable
16596
 I365_VCC_MASKI365_VCC_MASK 0x18 i82365.h Mask for turning off Vcc
16597
 I365_VCC_5VI365_VCC_5V 0x10 i82365.h Vcc = 5.0v
16598
 I365_VCC_3VI365_VCC_3V 0x18 i82365.h Vcc = 3.3v
16599
 I365_VPP2_MASKI365_VPP2_MASK 0x0c i82365.h Mask for turning off Vpp2
16600
 I365_VPP2_5VI365_VPP2_5V 0x04 i82365.h Vpp2 = 5.0v
16601
 I365_VPP2_12VI365_VPP2_12V 0x08 i82365.h Vpp2 = 12.0v
16602
 I365_VPP1_MASKI365_VPP1_MASK 0x03 i82365.h Mask for turning off Vpp1
16603
 I365_VPP1_5VI365_VPP1_5V 0x01 i82365.h Vpp2 = 5.0v
16604
 I365_VPP1_12VI365_VPP1_12V 0x02 i82365.h Vpp2 = 12.0v
16605
 I365_RING_ENAI365_RING_ENA 0x80 i82365.h 　
16606
 I365_PC_RESETI365_PC_RESET 0x40 i82365.h 　
16607
 I365_PC_IOCARDI365_PC_IOCARD 0x20 i82365.h 　
16608
 I365_INTR_ENAI365_INTR_ENA 0x10 i82365.h 　
16609
 I365_IRQ_MASKI365_IRQ_MASK 0x0F i82365.h 　
16610
 I365_CSC_BVD1I365_CSC_BVD1 0x01 i82365.h 　
16611
 I365_CSC_STSCHGI365_CSC_STSCHG 0x01 i82365.h 　
16612
 I365_CSC_BVD2I365_CSC_BVD2 0x02 i82365.h 　
16613
 I365_CSC_READYI365_CSC_READY 0x04 i82365.h 　
16614
 I365_CSC_DETECTI365_CSC_DETECT 0x08 i82365.h 　
16615
 I365_CSC_ANYI365_CSC_ANY 0x0F i82365.h 　
16616
 I365_CSC_GPII365_CSC_GPI 0x10 i82365.h 　
16617
 I365_CTL_16DELAYI365_CTL_16DELAY 0x01 i82365.h 　
16618
 I365_CTL_RESETI365_CTL_RESET 0x02 i82365.h 　
16619
 I365_CTL_GPI_ENAI365_CTL_GPI_ENA 0x04 i82365.h 　
16620
 I365_CTL_GPI_CTLI365_CTL_GPI_CTL 0x08 i82365.h 　
16621
 I365_CTL_RESUMEI365_CTL_RESUME 0x10 i82365.h 　
16622
 I365_CTL_SW_IRQI365_CTL_SW_IRQ 0x20 i82365.h 　
16623
 I365_GBL_PWRDOWNI365_GBL_PWRDOWN 0x01 i82365.h 　
16624
 I365_GBL_CSC_LEVI365_GBL_CSC_LEV 0x02 i82365.h 　
16625
 I365_GBL_WRBACKI365_GBL_WRBACK 0x04 i82365.h 　
16626
 I365_GBL_IRQ_0_LEVI365_GBL_IRQ_0_LEV 0x08 i82365.h 　
16627
 I365_GBL_IRQ_1_LEVI365_GBL_IRQ_1_LEV 0x10 i82365.h 　
16628
 I365_MEM_16BITI365_MEM_16BIT 0x8000 i82365.h In memory start high byte
16629
 I365_MEM_0WSI365_MEM_0WS 0x4000 i82365.h 　
16630
 I365_MEM_WS1I365_MEM_WS1 0x8000 i82365.h In memory stop high byte
16631
 I365_MEM_WS0I365_MEM_WS0 0x4000 i82365.h 　
16632
 I365_MEM_WRPROTI365_MEM_WRPROT 0x8000 i82365.h In offset high byte
16633
 I365_MEM_REGI365_MEM_REG 0x4000 i82365.h 　
16634
 I365_IDENT_VADEMI365_IDENT_VADEM 0x08 i82365.h 　
16635
 VG468_VPP2_MASKVG468_VPP2_MASK 0x0c i82365.h 　
16636
 VG468_VPP2_5VVG468_VPP2_5V 0x04 i82365.h 　
16637
 VG468_VPP2_12VVG468_VPP2_12V 0x08 i82365.h 　
16638
 VG469_VSENSEVG469_VSENSE 0x1f i82365.h Card voltage sense
16639
 VG469_VSELECTVG469_VSELECT 0x2f i82365.h Card voltage select
16640
 VG468_CTLVG468_CTL 0x38 i82365.h Control register
16641
 VG468_TIMERVG468_TIMER 0x39 i82365.h Timer control
16642
 VG468_MISCVG468_MISC 0x3a i82365.h Miscellaneous
16643
 VG468_GPIO_CFGVG468_GPIO_CFG 0x3b i82365.h GPIO configuration
16644
 VG469_EXT_MODEVG469_EXT_MODE 0x3c i82365.h Extended mode register
16645
 VG468_SELECTVG468_SELECT 0x3d i82365.h Programmable chip select
16646
 VG468_SELECT_CFGVG468_SELECT_CFG 0x3e i82365.h Chip select configuration
16647
 VG468_ATAVG468_ATA 0x3f i82365.h ATA control
16648
 VG469_VSENSE_A_VS1VG469_VSENSE_A_VS1 0x01 i82365.h 　
16649
 VG469_VSENSE_A_VS2VG469_VSENSE_A_VS2 0x02 i82365.h 　
16650
 VG469_VSENSE_B_VS1VG469_VSENSE_B_VS1 0x04 i82365.h 　
16651
 VG469_VSENSE_B_VS2VG469_VSENSE_B_VS2 0x08 i82365.h 　
16652
 VG469_VSEL_VCCVG469_VSEL_VCC 0x03 i82365.h 　
16653
 VG469_VSEL_5VVG469_VSEL_5V 0x00 i82365.h 　
16654
 VG469_VSEL_3VVG469_VSEL_3V 0x03 i82365.h 　
16655
 VG469_VSEL_MAXVG469_VSEL_MAX 0x0c i82365.h 　
16656
 VG469_VSEL_EXT_STATVG469_VSEL_EXT_STAT 0x10 i82365.h 　
16657
 VG469_VSEL_EXT_BUSVG469_VSEL_EXT_BUS 0x20 i82365.h 　
16658
 VG469_VSEL_MIXEDVG469_VSEL_MIXED 0x40 i82365.h 　
16659
 VG469_VSEL_ISAVG469_VSEL_ISA 0x80 i82365.h 　
16660
 VG468_CTL_SLOWVG468_CTL_SLOW 0x01 i82365.h 600ns memory timing
16661
 VG468_CTL_ASYNCVG468_CTL_ASYNC 0x02 i82365.h Asynchronous bus clocking
16662
 VG468_CTL_TSSIVG468_CTL_TSSI 0x08 i82365.h Tri-state some outputs
16663
 VG468_CTL_DELAYVG468_CTL_DELAY 0x10 i82365.h Card detect debounce
16664
 VG468_CTL_INPACKVG468_CTL_INPACK 0x20 i82365.h Obey INPACK signal?
16665
 VG468_CTL_POLARITYVG468_CTL_POLARITY 0x40 i82365.h VCCEN polarity
16666
 VG468_CTL_COMPATVG468_CTL_COMPAT 0x80 i82365.h Compatibility stuff
16667
 VG469_CTL_WS_COMPATVG469_CTL_WS_COMPAT 0x04 i82365.h Wait state compatibility
16668
 VG469_CTL_STRETCHVG469_CTL_STRETCH 0x10 i82365.h LED stretch
16669
 VG468_TIMER_ZEROPWRVG468_TIMER_ZEROPWR 0x10 i82365.h Zero power control
16670
 VG468_TIMER_SIGENVG468_TIMER_SIGEN 0x20 i82365.h Power up
16671
 VG468_TIMER_STATUSVG468_TIMER_STATUS 0x40 i82365.h Activity timer status
16672
 VG468_TIMER_RESVG468_TIMER_RES 0x80 i82365.h Timer resolution
16673
 VG468_TIMER_MASKVG468_TIMER_MASK 0x0f i82365.h Activity timer timeout
16674
 VG468_MISC_GPIOVG468_MISC_GPIO 0x04 i82365.h General-purpose IO
16675
 VG468_MISC_DMAWSBVG468_MISC_DMAWSB 0x08 i82365.h DMA wait state control
16676
 VG469_MISC_LEDENAVG469_MISC_LEDENA 0x10 i82365.h LED enable
16677
 VG468_MISC_VADEMREVVG468_MISC_VADEMREV 0x40 i82365.h Vadem revision control
16678
 VG468_MISC_UNLOCKVG468_MISC_UNLOCK 0x80 i82365.h Unique register lock
16679
 VG469_MODE_VPPSTVG469_MODE_VPPST 0x03 i82365.h Vpp steering control
16680
 VG469_MODE_INT_SENSEVG469_MODE_INT_SENSE 0x04 i82365.h Internal voltage sense
16681
 VG469_MODE_CABLEVG469_MODE_CABLE 0x08 i82365.h 　
16682
 VG469_MODE_COMPATVG469_MODE_COMPAT 0x10 i82365.h i82365sl B or DF step
16683
 VG469_MODE_TESTVG469_MODE_TEST 0x20 i82365.h 　
16684
 VG469_MODE_RIOVG469_MODE_RIO 0x40 i82365.h Steer RIO to INTR?
16685
 VG469_MODE_B_3VVG469_MODE_B_3V 0x01 i82365.h 3.3v for socket B
16686
 RF5C_MODE_CTLRF5C_MODE_CTL 0x1f i82365.h Mode control
16687
 RF5C_PWR_CTLRF5C_PWR_CTL 0x2f i82365.h Mixed voltage control
16688
 RF5C_CHIP_IDRF5C_CHIP_ID 0x3a i82365.h Chip identification
16689
 RF5C_MODE_CTL_3RF5C_MODE_CTL_3 0x3b i82365.h Mode control 3
16690
 RF5C_MODE_ATARF5C_MODE_ATA 0x01 i82365.h ATA mode
16691
 RF5C_MODE_LED_ENARF5C_MODE_LED_ENA 0x02 i82365.h IRQ 12 is LED
16692
 RF5C_MODE_CA21RF5C_MODE_CA21 0x04 i82365.h 　
16693
 RF5C_MODE_CA22RF5C_MODE_CA22 0x08 i82365.h 　
16694
 RF5C_MODE_CA23RF5C_MODE_CA23 0x10 i82365.h 　
16695
 RF5C_MODE_CA24RF5C_MODE_CA24 0x20 i82365.h 　
16696
 RF5C_MODE_CA25RF5C_MODE_CA25 0x40 i82365.h 　
16697
 RF5C_MODE_3STATE_BIT7RF5C_MODE_3STATE_BIT7 0x80 i82365.h 　
16698
 RF5C_PWR_VCC_3VRF5C_PWR_VCC_3V 0x01 i82365.h 　
16699
 RF5C_PWR_IREQ_HIGHRF5C_PWR_IREQ_HIGH 0x02 i82365.h 　
16700
 RF5C_PWR_INPACK_ENARF5C_PWR_INPACK_ENA 0x04 i82365.h 　
16701
 RF5C_PWR_5V_DETRF5C_PWR_5V_DET 0x08 i82365.h 　
16702
 RF5C_PWR_TC_SELRF5C_PWR_TC_SEL 0x10 i82365.h Terminal Count: irq 11 or 15
16703
 RF5C_PWR_DREQ_LOWRF5C_PWR_DREQ_LOW 0x20 i82365.h 　
16704
 RF5C_PWR_DREQ_OFFRF5C_PWR_DREQ_OFF 0x00 i82365.h DREQ steering control
16705
 RF5C_PWR_DREQ_INPACKRF5C_PWR_DREQ_INPACK 0x40 i82365.h 　
16706
 RF5C_PWR_DREQ_SPKRRF5C_PWR_DREQ_SPKR 0x80 i82365.h 　
16707
 RF5C_PWR_DREQ_IOIS16RF5C_PWR_DREQ_IOIS16 0xc0 i82365.h 　
16708
 RF5C_CHIP_RF5C296RF5C_CHIP_RF5C296 0x32 i82365.h 　
16709
 RF5C_CHIP_RF5C396RF5C_CHIP_RF5C396 0xb2 i82365.h 　
16710
 RF5C_MCTL3_DISABLERF5C_MCTL3_DISABLE 0x01 i82365.h Disable PCMCIA interface
16711
 RF5C_MCTL3_DMA_ENARF5C_MCTL3_DMA_ENA 0x02 i82365.h 　
16712
 RL5C46X_BCR_3E0_ENARL5C46X_BCR_3E0_ENA 0x0800 i82365.h 　
16713
 RL5C46X_BCR_3E2_ENARL5C46X_BCR_3E2_ENA 0x1000 i82365.h 　
16714
 RL5C4XX_CONFIGRL5C4XX_CONFIG 0x80 i82365.h 16 bit
16715
 RL5C4XX_CONFIG_IO_1_MODERL5C4XX_CONFIG_IO_1_MODE 0x0200 i82365.h 　
16716
 RL5C4XX_CONFIG_IO_0_MODERL5C4XX_CONFIG_IO_0_MODE 0x0100 i82365.h 　
16717
 RL5C4XX_CONFIG_PREFETCHRL5C4XX_CONFIG_PREFETCH 0x0001 i82365.h 　
16718
 RL5C4XX_MISCRL5C4XX_MISC 0x0082 i82365.h 16 bit
16719
 RL5C4XX_MISC_HW_SUSPEND_ENARL5C4XX_MISC_HW_SUSPEND_ENA 0x0002 i82365.h 　
16720
 RL5C4XX_MISC_VCCEN_POLRL5C4XX_MISC_VCCEN_POL 0x0100 i82365.h 　
16721
 RL5C4XX_MISC_VPPEN_POLRL5C4XX_MISC_VPPEN_POL 0x0200 i82365.h 　
16722
 RL5C46X_MISC_SUSPENDRL5C46X_MISC_SUSPEND 0x0001 i82365.h 　
16723
 RL5C46X_MISC_PWR_SAVE_2RL5C46X_MISC_PWR_SAVE_2 0x0004 i82365.h 　
16724
 RL5C46X_MISC_IFACE_BUSYRL5C46X_MISC_IFACE_BUSY 0x0008 i82365.h 　
16725
 RL5C46X_MISC_B_LOCKRL5C46X_MISC_B_LOCK 0x0010 i82365.h 　
16726
 RL5C46X_MISC_A_LOCKRL5C46X_MISC_A_LOCK 0x0020 i82365.h 　
16727
 RL5C46X_MISC_PCI_LOCKRL5C46X_MISC_PCI_LOCK 0x0040 i82365.h 　
16728
 RL5C47X_MISC_IFACE_BUSYRL5C47X_MISC_IFACE_BUSY 0x0004 i82365.h 　
16729
 RL5C47X_MISC_PCI_INT_MASKRL5C47X_MISC_PCI_INT_MASK 0x0018 i82365.h 　
16730
 RL5C47X_MISC_PCI_INT_DISRL5C47X_MISC_PCI_INT_DIS 0x0020 i82365.h 　
16731
 RL5C47X_MISC_SUBSYS_WRRL5C47X_MISC_SUBSYS_WR 0x0040 i82365.h 　
16732
 RL5C47X_MISC_SRIRQ_ENARL5C47X_MISC_SRIRQ_ENA 0x0080 i82365.h 　
16733
 RL5C47X_MISC_5V_DISABLERL5C47X_MISC_5V_DISABLE 0x0400 i82365.h 　
16734
 RL5C47X_MISC_LED_POLRL5C47X_MISC_LED_POL 0x0800 i82365.h 　
16735
 RL5C4XX_16BIT_CTLRL5C4XX_16BIT_CTL 0x0084 i82365.h 16 bit
16736
 RL5C4XX_16CTL_IO_TIMINGRL5C4XX_16CTL_IO_TIMING 0x0100 i82365.h 　
16737
 RL5C4XX_16CTL_MEM_TIMINGRL5C4XX_16CTL_MEM_TIMING 0x0200 i82365.h 　
16738
 RL5C46X_16CTL_LEVEL_1RL5C46X_16CTL_LEVEL_1 0x0010 i82365.h 　
16739
 RL5C46X_16CTL_LEVEL_2RL5C46X_16CTL_LEVEL_2 0x0020 i82365.h 　
16740
 RL5C4XX_16BIT_IO_0RL5C4XX_16BIT_IO_0 0x0088 i82365.h 16 bit
16741
 RL5C4XX_16BIT_MEM_0RL5C4XX_16BIT_MEM_0 0x0088 i82365.h 16 bit
16742
 RL5C4XX_SETUP_MASKRL5C4XX_SETUP_MASK 0x0007 i82365.h 　
16743
 RL5C4XX_SETUP_SHIFTRL5C4XX_SETUP_SHIFT 0 i82365.h 　
16744
 RL5C4XX_CMD_MASKRL5C4XX_CMD_MASK 0x01f0 i82365.h 　
16745
 RL5C4XX_CMD_SHIFTRL5C4XX_CMD_SHIFT 4 i82365.h 　
16746
 RL5C4XX_HOLD_MASKRL5C4XX_HOLD_MASK 0x1c00 i82365.h 　
16747
 RL5C4XX_HOLD_SHIFTRL5C4XX_HOLD_SHIFT 10 i82365.h 　
16748
 RL5C4XX_MISC_CONTROLRL5C4XX_MISC_CONTROL 0x2F i82365.h 8 bit
16749
 RL5C4XX_ZV_ENABLERL5C4XX_ZV_ENABLE 0x08 i82365.h 　
16750
 PCI_VENDOR_ID_CIRRUSPCI_VENDOR_ID_CIRRUS 0x1013 i82365.h 　
16751
 PCI_DEVICE_ID_CIRRUS_6729PCI_DEVICE_ID_CIRRUS_6729 0x1100 i82365.h 　
16752
 PCI_DEVICE_ID_CIRRUS_6832PCI_DEVICE_ID_CIRRUS_6832 0x1110 i82365.h 　
16753
 PD67_MISC_CTL_1PD67_MISC_CTL_1 0x16 i82365.h Misc control 1
16754
 PD67_FIFO_CTLPD67_FIFO_CTL 0x17 i82365.h FIFO control
16755
 PD67_MISC_CTL_2PD67_MISC_CTL_2 0x1E i82365.h Misc control 2
16756
 PD67_CHIP_INFOPD67_CHIP_INFO 0x1f i82365.h Chip information
16757
 PD67_ATA_CTLPD67_ATA_CTL 0x026 i82365.h 6730: ATA control
16758
 PD67_EXT_INDEXPD67_EXT_INDEX 0x2e i82365.h Extension index
16759
 PD67_EXT_DATAPD67_EXT_DATA 0x2f i82365.h Extension data
16760
 PD67_DATA_MASK0PD67_DATA_MASK0 0x01 i82365.h Data mask 0
16761
 PD67_DATA_MASK1PD67_DATA_MASK1 0x02 i82365.h Data mask 1
16762
 PD67_DMA_CTLPD67_DMA_CTL 0x03 i82365.h DMA control
16763
 PD67_EXT_CTL_1PD67_EXT_CTL_1 0x03 i82365.h Extension control 1
16764
 PD67_EXTERN_DATAPD67_EXTERN_DATA 0x0a i82365.h 　
16765
 PD67_MISC_CTL_3PD67_MISC_CTL_3 0x25 i82365.h 　
16766
 PD67_SMB_PWR_CTLPD67_SMB_PWR_CTL 0x26 i82365.h 　
16767
 PD67_MC1_5V_DETPD67_MC1_5V_DET 0x01 i82365.h 5v detect
16768
 PD67_MC1_MEDIA_ENAPD67_MC1_MEDIA_ENA 0x01 i82365.h 6730: Multimedia enable
16769
 PD67_MC1_VCC_3VPD67_MC1_VCC_3V 0x02 i82365.h 3.3v Vcc
16770
 PD67_MC1_PULSE_MGMTPD67_MC1_PULSE_MGMT 0x04 i82365.h 　
16771
 PD67_MC1_PULSE_IRQPD67_MC1_PULSE_IRQ 0x08 i82365.h 　
16772
 PD67_MC1_SPKR_ENAPD67_MC1_SPKR_ENA 0x10 i82365.h 　
16773
 PD67_MC1_INPACK_ENAPD67_MC1_INPACK_ENA 0x80 i82365.h 　
16774
 PD67_FIFO_EMPTYPD67_FIFO_EMPTY 0x80 i82365.h 　
16775
 PD67_MC2_FREQ_BYPASSPD67_MC2_FREQ_BYPASS 0x01 i82365.h 　
16776
 PD67_MC2_DYNAMIC_MODEPD67_MC2_DYNAMIC_MODE 0x02 i82365.h 　
16777
 PD67_MC2_SUSPENDPD67_MC2_SUSPEND 0x04 i82365.h 　
16778
 PD67_MC2_5V_COREPD67_MC2_5V_CORE 0x08 i82365.h 　
16779
 PD67_MC2_LED_ENAPD67_MC2_LED_ENA 0x10 i82365.h IRQ 12 is LED enable
16780
 PD67_MC2_FAST_PCIPD67_MC2_FAST_PCI 0x10 i82365.h 6729: PCI bus > 25 MHz
16781
 PD67_MC2_3STATE_BIT7PD67_MC2_3STATE_BIT7 0x20 i82365.h Floppy change bit
16782
 PD67_MC2_DMA_MODEPD67_MC2_DMA_MODE 0x40 i82365.h 　
16783
 PD67_MC2_IRQ15_RIPD67_MC2_IRQ15_RI 0x80 i82365.h IRQ 15 is ring enable
16784
 PD67_INFO_SLOTSPD67_INFO_SLOTS 0x20 i82365.h 0 = 1 slot, 1 = 2 slots
16785
 PD67_INFO_CHIP_IDPD67_INFO_CHIP_ID 0xc0 i82365.h 　
16786
 PD67_INFO_REVPD67_INFO_REV 0x1c i82365.h 　
16787
 PD67_TIME_SCALEPD67_TIME_SCALE 0xc0 i82365.h 　
16788
 PD67_TIME_SCALE_1PD67_TIME_SCALE_1 0x00 i82365.h 　
16789
 PD67_TIME_SCALE_16PD67_TIME_SCALE_16 0x40 i82365.h 　
16790
 PD67_TIME_SCALE_256PD67_TIME_SCALE_256 0x80 i82365.h 　
16791
 PD67_TIME_SCALE_4096PD67_TIME_SCALE_4096 0xc0 i82365.h 　
16792
 PD67_TIME_MULTPD67_TIME_MULT 0x3f i82365.h 　
16793
 PD67_DMA_MODEPD67_DMA_MODE 0xc0 i82365.h 　
16794
 PD67_DMA_OFFPD67_DMA_OFF 0x00 i82365.h 　
16795
 PD67_DMA_DREQ_INPACKPD67_DMA_DREQ_INPACK 0x40 i82365.h 　
16796
 PD67_DMA_DREQ_WPPD67_DMA_DREQ_WP 0x80 i82365.h 　
16797
 PD67_DMA_DREQ_BVD2PD67_DMA_DREQ_BVD2 0xc0 i82365.h 　
16798
 PD67_DMA_PULLUPPD67_DMA_PULLUP 0x20 i82365.h Disable socket pullups?
16799
 PD67_EC1_VCC_PWR_LOCKPD67_EC1_VCC_PWR_LOCK 0x01 i82365.h 　
16800
 PD67_EC1_AUTO_PWR_CLEARPD67_EC1_AUTO_PWR_CLEAR 0x02 i82365.h 　
16801
 PD67_EC1_LED_ENAPD67_EC1_LED_ENA 0x04 i82365.h 　
16802
 PD67_EC1_INV_CARD_IRQPD67_EC1_INV_CARD_IRQ 0x08 i82365.h 　
16803
 PD67_EC1_INV_MGMT_IRQPD67_EC1_INV_MGMT_IRQ 0x10 i82365.h 　
16804
 PD67_EC1_PULLUP_CTLPD67_EC1_PULLUP_CTL 0x20 i82365.h 　
16805
 PD67_MC3_IRQ_MASKPD67_MC3_IRQ_MASK 0x03 i82365.h 　
16806
 PD67_MC3_IRQ_PCPCIPD67_MC3_IRQ_PCPCI 0x00 i82365.h 　
16807
 PD67_MC3_IRQ_EXTERNPD67_MC3_IRQ_EXTERN 0x01 i82365.h 　
16808
 PD67_MC3_IRQ_PCIWAYPD67_MC3_IRQ_PCIWAY 0x02 i82365.h 　
16809
 PD67_MC3_IRQ_PCIPD67_MC3_IRQ_PCI 0x03 i82365.h 　
16810
 PD67_MC3_PWR_MASKPD67_MC3_PWR_MASK 0x0c i82365.h 　
16811
 PD67_MC3_PWR_SERIALPD67_MC3_PWR_SERIAL 0x00 i82365.h 　
16812
 PD67_MC3_PWR_TI2202PD67_MC3_PWR_TI2202 0x08 i82365.h 　
16813
 PD67_MC3_PWR_SMBPD67_MC3_PWR_SMB 0x0c i82365.h 　
16814
 PD68_EXT_CTL_2PD68_EXT_CTL_2 0x0b i82365.h 　
16815
 PD68_PCI_SPACEPD68_PCI_SPACE 0x22 i82365.h 　
16816
 PD68_PCCARD_SPACEPD68_PCCARD_SPACE 0x23 i82365.h 　
16817
 PD68_WINDOW_TYPEPD68_WINDOW_TYPE 0x24 i82365.h 　
16818
 PD68_EXT_CSCPD68_EXT_CSC 0x2e i82365.h 　
16819
 PD68_MISC_CTL_4PD68_MISC_CTL_4 0x2f i82365.h 　
16820
 PD68_MISC_CTL_5PD68_MISC_CTL_5 0x30 i82365.h 　
16821
 PD68_MISC_CTL_6PD68_MISC_CTL_6 0x31 i82365.h 　
16822
 PD68_MC3_HW_SUSPPD68_MC3_HW_SUSP 0x10 i82365.h 　
16823
 PD68_MC3_MM_EXPANDPD68_MC3_MM_EXPAND 0x40 i82365.h 　
16824
 PD68_MC3_MM_ARMPD68_MC3_MM_ARM 0x80 i82365.h 　
16825
 PD6832_BCR_MGMT_IRQ_ENAPD6832_BCR_MGMT_IRQ_ENA 0x0800 i82365.h 　
16826
 PD6832_SOCKET_NUMBERPD6832_SOCKET_NUMBER 0x004c i82365.h 8 bit
16827
 IGMP_QUERYIGMP_QUERY 0x11 igmp.h 　
16828
 IGMPv1_REPORTIGMPv1_REPORT 0x12 igmp.h 　
16829
 IGMPv2_REPORTIGMPv2_REPORT 0x16 igmp.h 　
16830
 IGMP_LEAVEIGMP_LEAVE 0x17 igmp.h 　
16831
 GROUP_ALL_HOSTSGROUP_ALL_HOSTS 0xe0000001 igmp.h 224.0.0.1 Host byte order
16832
 MULTICAST_MASKMULTICAST_MASK 0xf0000000 igmp.h 　
16833
 MULTICAST_NETWORKMULTICAST_NETWORK 0xe0000000 igmp.h 　
16834
 MII_BMCRMII_BMCR 0x00 mii.h Basic mode control register
16835
 MII_BMSRMII_BMSR 0x01 mii.h Basic mode status register
16836
 MII_PHYSID1MII_PHYSID1 0x02 mii.h PHYS ID 1
16837
 MII_PHYSID2MII_PHYSID2 0x03 mii.h PHYS ID 2
16838
 MII_ADVERTISEMII_ADVERTISE 0x04 mii.h Advertisement control reg
16839
 MII_LPAMII_LPA 0x05 mii.h Link partner ability reg
16840
 MII_EXPANSIONMII_EXPANSION 0x06 mii.h Expansion register
16841
 MII_CTRL1000MII_CTRL1000 0x09 mii.h 1000BASE-T control
16842
 MII_STAT1000MII_STAT1000 0x0a mii.h 1000BASE-T status
16843
 MII_ESTATUSMII_ESTATUS 0x0f mii.h Extended Status
16844
 MII_DCOUNTERMII_DCOUNTER 0x12 mii.h Disconnect counter
16845
 MII_FCSCOUNTERMII_FCSCOUNTER 0x13 mii.h False carrier counter
16846
 MII_NWAYTESTMII_NWAYTEST 0x14 mii.h N-way auto-neg test reg
16847
 MII_RERRCOUNTERMII_RERRCOUNTER 0x15 mii.h Receive error counter
16848
 MII_SREVISIONMII_SREVISION 0x16 mii.h Silicon revision
16849
 MII_RESV1MII_RESV1 0x17 mii.h Reserved...
16850
 MII_LBRERRORMII_LBRERROR 0x18 mii.h Lpback, rx, bypass error
16851
 MII_PHYADDRMII_PHYADDR 0x19 mii.h PHY address
16852
 MII_RESV2MII_RESV2 0x1a mii.h Reserved...
16853
 MII_TPISTATUSMII_TPISTATUS 0x1b mii.h TPI status for 10mbps
16854
 MII_NCONFIGMII_NCONFIG 0x1c mii.h Network interface config
16855
 BMCR_RESVBMCR_RESV 0x003f mii.h Unused...
16856
 BMCR_SPEED1000BMCR_SPEED1000 0x0040 mii.h MSB of Speed (1000)
16857
 BMCR_CTSTBMCR_CTST 0x0080 mii.h Collision test
16858
 BMCR_FULLDPLXBMCR_FULLDPLX 0x0100 mii.h Full duplex
16859
 BMCR_ANRESTARTBMCR_ANRESTART 0x0200 mii.h Auto negotiation restart
16860
 BMCR_ISOLATEBMCR_ISOLATE 0x0400 mii.h Disconnect DP83840 from MII
16861
 BMCR_PDOWNBMCR_PDOWN 0x0800 mii.h Powerdown the DP83840
16862
 BMCR_ANENABLEBMCR_ANENABLE 0x1000 mii.h Enable auto negotiation
16863
 BMCR_SPEED100BMCR_SPEED100 0x2000 mii.h Select 100Mbps
16864
 BMCR_LOOPBACKBMCR_LOOPBACK 0x4000 mii.h TXD loopback bits
16865
 BMCR_RESETBMCR_RESET 0x8000 mii.h Reset the DP83840
16866
 BMSR_ERCAPBMSR_ERCAP 0x0001 mii.h Ext-reg capability
16867
 BMSR_JCDBMSR_JCD 0x0002 mii.h Jabber detected
16868
 BMSR_LSTATUSBMSR_LSTATUS 0x0004 mii.h Link status
16869
 BMSR_ANEGCAPABLEBMSR_ANEGCAPABLE 0x0008 mii.h Able to do auto-negotiation
16870
 BMSR_RFAULTBMSR_RFAULT 0x0010 mii.h Remote fault detected
16871
 BMSR_ANEGCOMPLETEBMSR_ANEGCOMPLETE 0x0020 mii.h Auto-negotiation complete
16872
 BMSR_RESVBMSR_RESV 0x00c0 mii.h Unused...
16873
 BMSR_ESTATENBMSR_ESTATEN 0x0100 mii.h Extended Status in R15
16874
 BMSR_100HALF2BMSR_100HALF2 0x0200 mii.h Can do 100BASE-T2 HDX
16875
 BMSR_100FULL2BMSR_100FULL2 0x0400 mii.h Can do 100BASE-T2 FDX
16876
 BMSR_10HALFBMSR_10HALF 0x0800 mii.h Can do 10mbps, half-duplex
16877
 BMSR_10FULLBMSR_10FULL 0x1000 mii.h Can do 10mbps, full-duplex
16878
 BMSR_100HALFBMSR_100HALF 0x2000 mii.h Can do 100mbps, half-duplex
16879
 BMSR_100FULLBMSR_100FULL 0x4000 mii.h Can do 100mbps, full-duplex
16880
 BMSR_100BASE4BMSR_100BASE4 0x8000 mii.h Can do 100mbps, 4k packets
16881
 ADVERTISE_SLCTADVERTISE_SLCT 0x001f mii.h Selector bits
16882
 ADVERTISE_CSMAADVERTISE_CSMA 0x0001 mii.h Only selector supported
16883
 ADVERTISE_10HALFADVERTISE_10HALF 0x0020 mii.h Try for 10mbps half-duplex
16884
 ADVERTISE_1000XFULLADVERTISE_1000XFULL 0x0020 mii.h Try for 1000BASE-X full-duplex
16885
 ADVERTISE_10FULLADVERTISE_10FULL 0x0040 mii.h Try for 10mbps full-duplex
16886
 ADVERTISE_1000XHALFADVERTISE_1000XHALF 0x0040 mii.h Try for 1000BASE-X half-duplex
16887
 ADVERTISE_100HALFADVERTISE_100HALF 0x0080 mii.h Try for 100mbps half-duplex
16888
 ADVERTISE_1000XPAUSEADVERTISE_1000XPAUSE 0x0080 mii.h Try for 1000BASE-X pause
16889
 ADVERTISE_100FULLADVERTISE_100FULL 0x0100 mii.h Try for 100mbps full-duplex
16890
 ADVERTISE_1000XPSE_ASYMADVERTISE_1000XPSE_ASYM 0x0100 mii.h Try for 1000BASE-X asym pause
16891
 ADVERTISE_100BASE4ADVERTISE_100BASE4 0x0200 mii.h Try for 100mbps 4k packets
16892
 ADVERTISE_PAUSE_CAPADVERTISE_PAUSE_CAP 0x0400 mii.h Try for pause
16893
 ADVERTISE_PAUSE_ASYMADVERTISE_PAUSE_ASYM 0x0800 mii.h Try for asymetric pause
16894
 ADVERTISE_RESVADVERTISE_RESV 0x1000 mii.h Unused...
16895
 ADVERTISE_RFAULTADVERTISE_RFAULT 0x2000 mii.h Say we can detect faults
16896
 ADVERTISE_LPACKADVERTISE_LPACK 0x4000 mii.h Ack link partners response
16897
 ADVERTISE_NPAGEADVERTISE_NPAGE 0x8000 mii.h Next page bit
16898
 ADVERTISE_FULLADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ ADVERTISE_CSMA) mii.h 　
16899
 ADVERTISE_ALLADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ ADVERTISE_100HALF | ADVERTISE_100FULL) mii.h 　
16900
 LPA_SLCTLPA_SLCT 0x001f mii.h Same as advertise selector
16901
 LPA_10HALFLPA_10HALF 0x0020 mii.h Can do 10mbps half-duplex
16902
 LPA_1000XFULLLPA_1000XFULL 0x0020 mii.h Can do 1000BASE-X full-duplex
16903
 LPA_10FULLLPA_10FULL 0x0040 mii.h Can do 10mbps full-duplex
16904
 LPA_1000XHALFLPA_1000XHALF 0x0040 mii.h Can do 1000BASE-X half-duplex
16905
 LPA_100HALFLPA_100HALF 0x0080 mii.h Can do 100mbps half-duplex
16906
 LPA_1000XPAUSELPA_1000XPAUSE 0x0080 mii.h Can do 1000BASE-X pause
16907
 LPA_100FULLLPA_100FULL 0x0100 mii.h Can do 100mbps full-duplex
16908
 LPA_1000XPAUSE_ASYMLPA_1000XPAUSE_ASYM 0x0100 mii.h Can do 1000BASE-X pause asym
16909
 LPA_100BASE4LPA_100BASE4 0x0200 mii.h Can do 100mbps 4k packets
16910
 LPA_PAUSE_CAPLPA_PAUSE_CAP 0x0400 mii.h Can pause
16911
 LPA_PAUSE_ASYMLPA_PAUSE_ASYM 0x0800 mii.h Can pause asymetrically
16912
 LPA_RESVLPA_RESV 0x1000 mii.h Unused...
16913
 LPA_RFAULTLPA_RFAULT 0x2000 mii.h Link partner faulted
16914
 LPA_LPACKLPA_LPACK 0x4000 mii.h Link partner acked us
16915
 LPA_NPAGELPA_NPAGE 0x8000 mii.h Next page bit
16916
 LPA_DUPLEXLPA_DUPLEX (LPA_10FULL | LPA_100FULL) mii.h 　
16917
 LPA_100LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) mii.h 　
16918
 EXPANSION_NWAYEXPANSION_NWAY 0x0001 mii.h Can do N-way auto-nego
16919
 EXPANSION_LCWPEXPANSION_LCWP 0x0002 mii.h Got new RX page code word
16920
 EXPANSION_ENABLENPAGEEXPANSION_ENABLENPAGE 0x0004 mii.h This enables npage words
16921
 EXPANSION_NPCAPABLEEXPANSION_NPCAPABLE 0x0008 mii.h Link partner supports npage
16922
 EXPANSION_MFAULTSEXPANSION_MFAULTS 0x0010 mii.h Multiple faults detected
16923
 EXPANSION_RESVEXPANSION_RESV 0xffe0 mii.h Unused...
16924
 ESTATUS_1000_TFULLESTATUS_1000_TFULL 0x2000 mii.h Can do 1000BT Full
16925
 ESTATUS_1000_THALFESTATUS_1000_THALF 0x1000 mii.h Can do 1000BT Half
16926
 NWAYTEST_RESV1NWAYTEST_RESV1 0x00ff mii.h Unused...
16927
 NWAYTEST_LOOPBACKNWAYTEST_LOOPBACK 0x0100 mii.h Enable loopback for N-way
16928
 NWAYTEST_RESV2NWAYTEST_RESV2 0xfe00 mii.h Unused...
16929
 ADVERTISE_1000FULLADVERTISE_1000FULL 0x0200 mii.h Advertise 1000BASE-T full duplex
16930
 ADVERTISE_1000HALFADVERTISE_1000HALF 0x0100 mii.h Advertise 1000BASE-T half duplex
16931
 LPA_1000LOCALRXOKLPA_1000LOCALRXOK 0x2000 mii.h Link partner local receiver status
16932
 LPA_1000REMRXOKLPA_1000REMRXOK 0x1000 mii.h Link partner remote receiver status
16933
 LPA_1000FULLLPA_1000FULL 0x0800 mii.h Link partner 1000BASE-T full duplex
16934
 LPA_1000HALFLPA_1000HALF 0x0400 mii.h Link partner 1000BASE-T half duplex
16935
 SUNRPC_PORTSUNRPC_PORT 111 nfs.h 　
16936
 PROG_PORTMAPPROG_PORTMAP 100000 nfs.h 　
16937
 PROG_NFSPROG_NFS 100003 nfs.h 　
16938
 PROG_MOUNTPROG_MOUNT 100005 nfs.h 　
16939
 MSG_CALLMSG_CALL 0 nfs.h 　
16940
 MSG_REPLYMSG_REPLY 1 nfs.h 　
16941
 PORTMAP_GETPORTPORTMAP_GETPORT 3 nfs.h 　
16942
 MOUNT_ADDENTRYMOUNT_ADDENTRY 1 nfs.h 　
16943
 MOUNT_UMOUNTALLMOUNT_UMOUNTALL 4 nfs.h 　
16944
 NFS_LOOKUPNFS_LOOKUP 4 nfs.h 　
16945
 NFS_READLINKNFS_READLINK 5 nfs.h 　
16946
 NFS_READNFS_READ 6 nfs.h 　
16947
 NFS_FHSIZENFS_FHSIZE 32 nfs.h 　
16948
 NFSERR_PERMNFSERR_PERM 1 nfs.h 　
16949
 NFSERR_NOENTNFSERR_NOENT 2 nfs.h 　
16950
 NFSERR_ACCESNFSERR_ACCES 13 nfs.h 　
16951
 NFSERR_ISDIRNFSERR_ISDIR 21 nfs.h 　
16952
 NFSERR_INVALNFSERR_INVAL 22 nfs.h 　
16953
 NFS_READ_SIZENFS_READ_SIZE 1024 nfs.h 　
16954
 NFS_MAXLINKDEPTHNFS_MAXLINKDEPTH 16 nfs.h 　
16955
 DNS_TYPE_NBDNS_TYPE_NB 0x20 nmb.h 　
16956
 DNS_FLAG_BROADCASTDNS_FLAG_BROADCAST ( 0x01 << 4 ) nmb.h 　
16957
 NBNS_UDP_PORTNBNS_UDP_PORT 137 nmb.h 　
16958
 TCP_INITIAL_TIMEOUTTCP_INITIAL_TIMEOUT (3*TICKS_PER_SEC) old_tcp.h 　
16959
 TCP_MAX_TIMEOUTTCP_MAX_TIMEOUT (60*TICKS_PER_SEC) old_tcp.h 　
16960
 TCP_MIN_TIMEOUTTCP_MIN_TIMEOUT (TICKS_PER_SEC) old_tcp.h 　
16961
 TCP_MAX_RETRYTCP_MAX_RETRY 10 old_tcp.h 　
16962
 TCP_MAX_HEADERTCP_MAX_HEADER ((int)sizeof(struct iphdr)+64) old_tcp.h 　
16963
 TCP_MIN_WINDOWTCP_MIN_WINDOW (1500-TCP_MAX_HEADER) old_tcp.h 　
16964
 TCP_MAX_WINDOWTCP_MAX_WINDOW (65535-TCP_MAX_HEADER) old_tcp.h 　
16965
 FINFIN 1 old_tcp.h 　
16966
 SYNSYN 2 old_tcp.h 　
16967
 RSTRST 4 old_tcp.h 　
16968
 PSHPSH 8 old_tcp.h 　
16969
 ACKACK 16 old_tcp.h 　
16970
 URGURG 32 old_tcp.h 　
16971
 _yes__yes_ 1 pcmcia-opts.h 　
16972
 _no__no_ 0 pcmcia-opts.h 　
16973
 SUPPORT_I82365SUPPORT_I82365 (_yes_) pcmcia-opts.h 　
16974
 PCMCIA_SHUTDOWNPCMCIA_SHUTDOWN (_yes_) pcmcia-opts.h 　
16975
 MAP_ATTRMEM_TOMAP_ATTRMEM_TO 0xd0000 pcmcia-opts.h 　
16976
 MAP_ATTRMEM_LENMAP_ATTRMEM_LEN 0x02000 pcmcia-opts.h 　
16977
 PDEBUGPDEBUG 3 pcmcia-opts.h 　
16978
 MAXPCCSOCKSMAXPCCSOCKS 8 pcmcia.h 　
16979
 MAXPCCCONFIGSMAXPCCCONFIGS 8 pcmcia.h 　
16980
 EINVALEINVAL 22 pcmcia.h 　
16981
 SS_WRPROTSS_WRPROT 0x0001 pcmcia.h 　
16982
 SS_CARDLOCKSS_CARDLOCK 0x0002 pcmcia.h 　
16983
 SS_EJECTIONSS_EJECTION 0x0004 pcmcia.h 　
16984
 SS_INSERTIONSS_INSERTION 0x0008 pcmcia.h 　
16985
 SS_BATDEADSS_BATDEAD 0x0010 pcmcia.h 　
16986
 SS_BATWARNSS_BATWARN 0x0020 pcmcia.h 　
16987
 SS_READYSS_READY 0x0040 pcmcia.h 　
16988
 SS_DETECTSS_DETECT 0x0080 pcmcia.h 　
16989
 SS_POWERONSS_POWERON 0x0100 pcmcia.h 　
16990
 SS_GPISS_GPI 0x0200 pcmcia.h 　
16991
 SS_STSCHGSS_STSCHG 0x0400 pcmcia.h 　
16992
 SS_CARDBUSSS_CARDBUS 0x0800 pcmcia.h 　
16993
 SS_3VCARDSS_3VCARD 0x1000 pcmcia.h 　
16994
 SS_XVCARDSS_XVCARD 0x2000 pcmcia.h 　
16995
 SS_PENDINGSS_PENDING 0x4000 pcmcia.h 　
16996
 SS_CAP_PAGE_REGSSS_CAP_PAGE_REGS 0x0001 pcmcia.h 　
16997
 SS_CAP_VIRTUAL_BUSSS_CAP_VIRTUAL_BUS 0x0002 pcmcia.h 　
16998
 SS_CAP_MEM_ALIGNSS_CAP_MEM_ALIGN 0x0004 pcmcia.h 　
16999
 SS_CAP_STATIC_MAPSS_CAP_STATIC_MAP 0x0008 pcmcia.h 　
17000
 SS_CAP_PCCARDSS_CAP_PCCARD 0x4000 pcmcia.h 　
17001
 SS_CAP_CARDBUSSS_CAP_CARDBUS 0x8000 pcmcia.h 　
17002
 SS_PWR_AUTOSS_PWR_AUTO 0x0010 pcmcia.h 　
17003
 SS_IOCARDSS_IOCARD 0x0020 pcmcia.h 　
17004
 SS_RESETSS_RESET 0x0040 pcmcia.h 　
17005
 SS_DMA_MODESS_DMA_MODE 0x0080 pcmcia.h 　
17006
 SS_SPKR_ENASS_SPKR_ENA 0x0100 pcmcia.h 　
17007
 SS_OUTPUT_ENASS_OUTPUT_ENA 0x0200 pcmcia.h 　
17008
 SS_DEBOUNCEDSS_DEBOUNCED 0x0400 pcmcia.h Tell driver that the debounce delay has ended
17009
 SS_ZVCARDSS_ZVCARD 0x0800 pcmcia.h 　
17010
 MAP_ACTIVEMAP_ACTIVE 0x01 pcmcia.h 　
17011
 MAP_16BITMAP_16BIT 0x02 pcmcia.h 　
17012
 MAP_AUTOSZMAP_AUTOSZ 0x04 pcmcia.h 　
17013
 MAP_0WSMAP_0WS 0x08 pcmcia.h 　
17014
 MAP_WRPROTMAP_WRPROT 0x10 pcmcia.h 　
17015
 MAP_ATTRIBMAP_ATTRIB 0x20 pcmcia.h 　
17016
 MAP_USE_WAITMAP_USE_WAIT 0x40 pcmcia.h 　
17017
 MAP_PREFETCHMAP_PREFETCH 0x80 pcmcia.h 　
17018
 MAP_IOSPACEMAP_IOSPACE 0x20 pcmcia.h 　
17019
 NULLNULL ((void *)0) stddef.h 　
17020
 __WCHAR_TYPE____WCHAR_TYPE__ long int stddef.h 　
17021
 __SIZE_TYPE____SIZE_TYPE__ unsigned long stdint.h safe choice on most systems
17022
 ANSIESC_MAX_PARAMSANSIESC_MAX_PARAMS 4 ansiesc.h 　
17023
 ESCESC 0x1b ansiesc.h 　
17024
 CSICSI "\033[" ansiesc.h 　
17025
 ANSIESC_CUPANSIESC_CUP 'H' ansiesc.h 　
17026
 ANSIESC_EDANSIESC_ED 'J' ansiesc.h 　
17027
 ANSIESC_ED_TO_ENDANSIESC_ED_TO_END 0 ansiesc.h 　
17028
 ANSIESC_ED_FROM_STARTANSIESC_ED_FROM_START 1 ansiesc.h 　
17029
 ANSIESC_ED_ALLANSIESC_ED_ALL 2 ansiesc.h 　
17030
 ANSIESC_SGRANSIESC_SGR 'm' ansiesc.h 　
17031
 AOE_FL_EXTENDEDAOE_FL_EXTENDED 0x40 aoe.h *< LBA48 extended addressing
17032
 AOE_FL_DEV_HEADAOE_FL_DEV_HEAD 0x10 aoe.h *< Device/head flag
17033
 AOE_FL_ASYNCAOE_FL_ASYNC 0x02 aoe.h *< Asynchronous write
17034
 AOE_FL_WRITEAOE_FL_WRITE 0x01 aoe.h *< Write command
17035
 AOE_VERSIONAOE_VERSION 0x10 aoe.h *< Version 1
17036
 AOE_VERSION_MASKAOE_VERSION_MASK 0xf0 aoe.h *< Version part of ver_flags field
17037
 AOE_FL_RESPONSEAOE_FL_RESPONSE 0x08 aoe.h *< Message is a response
17038
 AOE_FL_ERRORAOE_FL_ERROR 0x04 aoe.h *< Command generated an error
17039
 AOE_MAJOR_BROADCASTAOE_MAJOR_BROADCAST 0xffff aoe.h 　
17040
 AOE_MINOR_BROADCASTAOE_MINOR_BROADCAST 0xff aoe.h 　
17041
 AOE_CMD_ATAAOE_CMD_ATA 0x00 aoe.h *< Issue ATA command
17042
 AOE_CMD_CONFIGAOE_CMD_CONFIG 0x01 aoe.h *< Query Config Information
17043
 AOE_TAG_MAGICAOE_TAG_MAGIC 0xebeb0000 aoe.h 　
17044
 AOE_ERR_BAD_COMMANDAOE_ERR_BAD_COMMAND 1 aoe.h *< Unrecognised command code
17045
 AOE_ERR_BAD_PARAMETERAOE_ERR_BAD_PARAMETER 2 aoe.h *< Bad argument parameter
17046
 AOE_ERR_UNAVAILABLEAOE_ERR_UNAVAILABLE 3 aoe.h *< Device unavailable
17047
 AOE_ERR_CONFIG_EXISTSAOE_ERR_CONFIG_EXISTS 4 aoe.h *< Config string present
17048
 AOE_ERR_BAD_VERSIONAOE_ERR_BAD_VERSION 5 aoe.h *< Unsupported version
17049
 AOE_STATUS_ERR_MASKAOE_STATUS_ERR_MASK 0x0f aoe.h *< Error portion of status code
17050
 AOE_STATUS_PENDINGAOE_STATUS_PENDING 0x80 aoe.h *< Command pending
17051
 AOE_MAX_COUNTAOE_MAX_COUNT 2 aoe.h 　
17052
 ARP_NET_PROTOCOLSARP_NET_PROTOCOLS __table ( struct arp_net_protocol, "arp_net_protocols" ) arp.h 　
17053
 __arp_net_protocol__arp_net_protocol __table_entry ( ARP_NET_PROTOCOLS, 01 ) arp.h 　
17054
 ASN1_INTEGERASN1_INTEGER 0x02 asn1.h 　
17055
 ASN1_BIT_STRINGASN1_BIT_STRING 0x03 asn1.h 　
17056
 ASN1_OCTET_STRINGASN1_OCTET_STRING 0x04 asn1.h 　
17057
 ASN1_NULLASN1_NULL 0x05 asn1.h 　
17058
 ASN1_OIDASN1_OID 0x06 asn1.h 　
17059
 ASN1_SEQUENCEASN1_SEQUENCE 0x30 asn1.h 　
17060
 ASN1_IP_ADDRESSASN1_IP_ADDRESS 0x40 asn1.h 　
17061
 ASN1_EXPLICIT_TAGASN1_EXPLICIT_TAG 0xa0 asn1.h 　
17062
 ATA_DEV_OBSOLETEATA_DEV_OBSOLETE 0xa0 ata.h 　
17063
 ATA_DEV_LBAATA_DEV_LBA 0x40 ata.h 　
17064
 ATA_DEV_SLAVEATA_DEV_SLAVE 0x10 ata.h 　
17065
 ATA_DEV_MASTERATA_DEV_MASTER 0x00 ata.h 　
17066
 ATA_DEV_MASKATA_DEV_MASK 0xf0 ata.h 　
17067
 ATA_CMD_READATA_CMD_READ 0x20 ata.h 　
17068
 ATA_CMD_READ_EXTATA_CMD_READ_EXT 0x24 ata.h 　
17069
 ATA_CMD_WRITEATA_CMD_WRITE 0x30 ata.h 　
17070
 ATA_CMD_WRITE_EXTATA_CMD_WRITE_EXT 0x34 ata.h 　
17071
 ATA_CMD_IDENTIFYATA_CMD_IDENTIFY 0xec ata.h 　
17072
 ATA_SUPPORTS_LBA48ATA_SUPPORTS_LBA48 ( 1 << 10 ) ata.h 　
17073
 ATA_SECTOR_SIZEATA_SECTOR_SIZE 512 ata.h 　
17074
 BITMAP_BLKSIZEBITMAP_BLKSIZE ( sizeof ( bitmap_block_t ) * 8 ) bitmap.h 　
17075
 cpu_to_BIT64cpu_to_BIT64 cpu_to_le64 bitops.h 　
17076
 cpu_to_BIT32cpu_to_BIT32 cpu_to_le32 bitops.h 　
17077
 BIT64_to_cpuBIT64_to_cpu le64_to_cpu bitops.h 　
17078
 BIT32_to_cpuBIT32_to_cpu le32_to_cpu bitops.h 　
17079
 cpu_to_BIT64cpu_to_BIT64 cpu_to_be64 bitops.h 　
17080
 cpu_to_BIT32cpu_to_BIT32 cpu_to_be32 bitops.h 　
17081
 BIT64_to_cpuBIT64_to_cpu be64_to_cpu bitops.h 　
17082
 BIT32_to_cpuBIT32_to_cpu be32_to_cpu bitops.h 　
17083
 COMMANDSCOMMANDS __table ( struct command, "commands" ) command.h 　
17084
 __command__command __table_entry ( COMMANDS, 01 ) command.h 　
17085
 CPIO_MAGICCPIO_MAGIC "070701" cpio.h 　
17086
 BUS_TYPE_PCIBUS_TYPE_PCI 1 device.h 　
17087
 BUS_TYPE_ISAPNPBUS_TYPE_ISAPNP 2 device.h 　
17088
 BUS_TYPE_EISABUS_TYPE_EISA 3 device.h 　
17089
 BUS_TYPE_MCABUS_TYPE_MCA 4 device.h 　
17090
 BUS_TYPE_ISABUS_TYPE_ISA 5 device.h 　
17091
 ROOT_DEVICESROOT_DEVICES __table ( struct root_device, "root_devices" ) device.h 　
17092
 __root_device__root_device __table_entry ( ROOT_DEVICES, 01 ) device.h 　
17093
 BOOTPS_PORTBOOTPS_PORT 67 dhcp.h 　
17094
 BOOTPC_PORTBOOTPC_PORT 68 dhcp.h 　
17095
 PXE_PORTPXE_PORT 4011 dhcp.h 　
17096
 DHCP_PADDHCP_PAD 0 dhcp.h 　
17097
 DHCP_MIN_OPTIONDHCP_MIN_OPTION 1 dhcp.h 　
17098
 DHCP_SUBNET_MASKDHCP_SUBNET_MASK 1 dhcp.h 　
17099
 DHCP_ROUTERSDHCP_ROUTERS 3 dhcp.h 　
17100
 DHCP_DNS_SERVERSDHCP_DNS_SERVERS 6 dhcp.h 　
17101
 DHCP_LOG_SERVERSDHCP_LOG_SERVERS 7 dhcp.h 　
17102
 DHCP_HOST_NAMEDHCP_HOST_NAME 12 dhcp.h 　
17103
 DHCP_DOMAIN_NAMEDHCP_DOMAIN_NAME 15 dhcp.h 　
17104
 DHCP_ROOT_PATHDHCP_ROOT_PATH 17 dhcp.h 　
17105
 DHCP_VENDOR_ENCAPDHCP_VENDOR_ENCAP 43 dhcp.h 　
17106
 DHCP_PXE_DISCOVERY_CONTROLDHCP_PXE_DISCOVERY_CONTROL DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 6 ) dhcp.h 　
17107
 DHCP_PXE_BOOT_SERVER_MCASTDHCP_PXE_BOOT_SERVER_MCAST DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 7 ) dhcp.h 　
17108
 DHCP_PXE_BOOT_SERVERSDHCP_PXE_BOOT_SERVERS DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 8 ) dhcp.h 　
17109
 DHCP_PXE_BOOT_MENUDHCP_PXE_BOOT_MENU DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 9 ) dhcp.h 　
17110
 DHCP_PXE_BOOT_MENU_PROMPTDHCP_PXE_BOOT_MENU_PROMPT DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 10 ) dhcp.h 　
17111
 DHCP_PXE_BOOT_MENU_ITEMDHCP_PXE_BOOT_MENU_ITEM DHCP_ENCAP_OPT ( DHCP_VENDOR_ENCAP, 71 ) dhcp.h 　
17112
 DHCP_REQUESTED_ADDRESSDHCP_REQUESTED_ADDRESS 50 dhcp.h 　
17113
 DHCP_LEASE_TIMEDHCP_LEASE_TIME 51 dhcp.h 　
17114
 DHCP_OPTION_OVERLOADDHCP_OPTION_OVERLOAD 52 dhcp.h 　
17115
 DHCP_OPTION_OVERLOAD_FILEDHCP_OPTION_OVERLOAD_FILE 1 dhcp.h 　
17116
 DHCP_OPTION_OVERLOAD_SNAMEDHCP_OPTION_OVERLOAD_SNAME 2 dhcp.h 　
17117
 DHCP_MESSAGE_TYPEDHCP_MESSAGE_TYPE 53 dhcp.h 　
17118
 DHCPNONEDHCPNONE 0 dhcp.h 　
17119
 DHCPDISCOVERDHCPDISCOVER 1 dhcp.h 　
17120
 DHCPOFFERDHCPOFFER 2 dhcp.h 　
17121
 DHCPREQUESTDHCPREQUEST 3 dhcp.h 　
17122
 DHCPDECLINEDHCPDECLINE 4 dhcp.h 　
17123
 DHCPACKDHCPACK 5 dhcp.h 　
17124
 DHCPNAKDHCPNAK 6 dhcp.h 　
17125
 DHCPRELEASEDHCPRELEASE 7 dhcp.h 　
17126
 DHCPINFORMDHCPINFORM 8 dhcp.h 　
17127
 DHCP_SERVER_IDENTIFIERDHCP_SERVER_IDENTIFIER 54 dhcp.h 　
17128
 DHCP_PARAMETER_REQUEST_LISTDHCP_PARAMETER_REQUEST_LIST 55 dhcp.h 　
17129
 DHCP_MAX_MESSAGE_SIZEDHCP_MAX_MESSAGE_SIZE 57 dhcp.h 　
17130
 DHCP_VENDOR_CLASS_IDDHCP_VENDOR_CLASS_ID 60 dhcp.h 　
17131
 DHCP_CLIENT_IDDHCP_CLIENT_ID 61 dhcp.h 　
17132
 DHCP_TFTP_SERVER_NAMEDHCP_TFTP_SERVER_NAME 66 dhcp.h 　
17133
 DHCP_BOOTFILE_NAMEDHCP_BOOTFILE_NAME 67 dhcp.h 　
17134
 DHCP_USER_CLASS_IDDHCP_USER_CLASS_ID 77 dhcp.h 　
17135
 DHCP_CLIENT_ARCHITECTUREDHCP_CLIENT_ARCHITECTURE 93 dhcp.h 　
17136
 DHCP_CLIENT_NDIDHCP_CLIENT_NDI 94 dhcp.h 　
17137
 DHCP_CLIENT_UUIDDHCP_CLIENT_UUID 97 dhcp.h 　
17138
 DHCP_CLIENT_UUID_TYPEDHCP_CLIENT_UUID_TYPE 0 dhcp.h 　
17139
 DHCP_EB_ENCAPDHCP_EB_ENCAP 175 dhcp.h 　
17140
 DHCP_EB_PRIORITYDHCP_EB_PRIORITY DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x01 ) dhcp.h 　
17141
 DHCP_EB_YIADDRDHCP_EB_YIADDR DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x02 ) dhcp.h 　
17142
 DHCP_EB_SIADDRDHCP_EB_SIADDR DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x03 ) dhcp.h 　
17143
 DHCP_EB_KEEP_SANDHCP_EB_KEEP_SAN DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x08 ) dhcp.h 　
17144
 DHCP_EB_NO_PXEDHCPDHCP_EB_NO_PXEDHCP DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb0 ) dhcp.h 　
17145
 DHCP_EB_BUS_IDDHCP_EB_BUS_ID DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb1 ) dhcp.h 　
17146
 DHCP_EB_BIOS_DRIVEDHCP_EB_BIOS_DRIVE DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbd ) dhcp.h 　
17147
 DHCP_EB_USERNAMEDHCP_EB_USERNAME DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbe ) dhcp.h 　
17148
 DHCP_EB_PASSWORDDHCP_EB_PASSWORD DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xbf ) dhcp.h 　
17149
 DHCP_EB_REVERSE_USERNAMEDHCP_EB_REVERSE_USERNAME DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc0 ) dhcp.h 　
17150
 DHCP_EB_REVERSE_PASSWORDDHCP_EB_REVERSE_PASSWORD DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc1 ) dhcp.h 　
17151
 DHCP_EB_VERSIONDHCP_EB_VERSION DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xeb ) dhcp.h 　
17152
 DHCP_ISCSI_PRIMARY_TARGET_IQNDHCP_ISCSI_PRIMARY_TARGET_IQN 201 dhcp.h 　
17153
 DHCP_ISCSI_SECONDARY_TARGET_IQNDHCP_ISCSI_SECONDARY_TARGET_IQN 202 dhcp.h 　
17154
 DHCP_ISCSI_INITIATOR_IQNDHCP_ISCSI_INITIATOR_IQN 203 dhcp.h 　
17155
 DHCP_MAX_OPTIONDHCP_MAX_OPTION 254 dhcp.h 　
17156
 DHCP_ENDDHCP_END 255 dhcp.h 　
17157
 DHCP_OPTION_HEADER_LENDHCP_OPTION_HEADER_LEN ( offsetof ( struct dhcp_option, data ) ) dhcp.h 　
17158
 DHCP_MAX_LENDHCP_MAX_LEN 0xff dhcp.h 　
17159
 BOOTP_REQUESTBOOTP_REQUEST 1 dhcp.h 　
17160
 BOOTP_REPLYBOOTP_REPLY 2 dhcp.h 　
17161
 BOOTP_FL_BROADCASTBOOTP_FL_BROADCAST 0x8000 dhcp.h 　
17162
 DHCP_MAGIC_COOKIEDHCP_MAGIC_COOKIE 0x63825363UL dhcp.h 　
17163
 DHCP_MIN_LENDHCP_MIN_LEN 552 dhcp.h 　
17164
 DHCP_MIN_TIMEOUTDHCP_MIN_TIMEOUT ( 1 * TICKS_PER_SEC ) dhcp.h 　
17165
 DHCP_MAX_TIMEOUTDHCP_MAX_TIMEOUT ( 10 * TICKS_PER_SEC ) dhcp.h 　
17166
 PROXYDHCP_MAX_TIMEOUTPROXYDHCP_MAX_TIMEOUT ( 2 * TICKS_PER_SEC ) dhcp.h 　
17167
 PXEBS_MAX_TIMEOUTPXEBS_MAX_TIMEOUT ( 3 * TICKS_PER_SEC ) dhcp.h 　
17168
 DHCP_SETTINGS_NAMEDHCP_SETTINGS_NAME "dhcp" dhcp.h 　
17169
 PROXYDHCP_SETTINGS_NAMEPROXYDHCP_SETTINGS_NAME "proxydhcp" dhcp.h 　
17170
 PXEBS_SETTINGS_NAMEPXEBS_SETTINGS_NAME "pxebs" dhcp.h 　
17171
 DNS_TYPE_ADNS_TYPE_A 1 dns.h 　
17172
 DNS_TYPE_CNAMEDNS_TYPE_CNAME 5 dns.h 　
17173
 DNS_TYPE_ANYDNS_TYPE_ANY 255 dns.h 　
17174
 DNS_CLASS_INDNS_CLASS_IN 1 dns.h 　
17175
 DNS_CLASS_CSDNS_CLASS_CS 2 dns.h 　
17176
 DNS_CLASS_CHDNS_CLASS_CH 3 dns.h 　
17177
 DNS_CLASS_HSDNS_CLASS_HS 4 dns.h 　
17178
 DNS_FLAG_QUERYDNS_FLAG_QUERY ( 0x00 << 15 ) dns.h 　
17179
 DNS_FLAG_RESPONSEDNS_FLAG_RESPONSE ( 0x01 << 15 ) dns.h 　
17180
 DNS_FLAG_OPCODE_QUERYDNS_FLAG_OPCODE_QUERY ( 0x00 << 11 ) dns.h 　
17181
 DNS_FLAG_OPCODE_IQUERYDNS_FLAG_OPCODE_IQUERY ( 0x01 << 11 ) dns.h 　
17182
 DNS_FLAG_OPCODE_STATUSDNS_FLAG_OPCODE_STATUS ( 0x02 << 11 ) dns.h 　
17183
 DNS_FLAG_RDDNS_FLAG_RD ( 0x01 << 8 ) dns.h 　
17184
 DNS_FLAG_RADNS_FLAG_RA ( 0x01 << 7 ) dns.h 　
17185
 DNS_FLAG_RCODE_OKDNS_FLAG_RCODE_OK ( 0x00 << 0 ) dns.h 　
17186
 DNS_FLAG_RCODE_NXDNS_FLAG_RCODE_NX ( 0x03 << 0 ) dns.h 　
17187
 DNS_PORTDNS_PORT 53 dns.h 　
17188
 DNS_MAX_RETRIESDNS_MAX_RETRIES 3 dns.h 　
17189
 DNS_MAX_CNAME_RECURSIONDNS_MAX_CNAME_RECURSION 0x30 dns.h 　
17190
 EISA_MIN_SLOTEISA_MIN_SLOT (0x1) eisa.h 　
17191
 EISA_MAX_SLOTEISA_MAX_SLOT (0xf) eisa.h Must be 2^n - 1
17192
 EISA_VENDOR_IDEISA_VENDOR_ID ( 0xc80 ) eisa.h 　
17193
 EISA_PROD_IDEISA_PROD_ID ( 0xc82 ) eisa.h 　
17194
 EISA_GLOBAL_CONFIGEISA_GLOBAL_CONFIG ( 0xc84 ) eisa.h 　
17195
 EISA_CMD_RESETEISA_CMD_RESET ( 1 << 2 ) eisa.h 　
17196
 EISA_CMD_ENABLEEISA_CMD_ENABLE ( 1 << 0 ) eisa.h 　
17197
 EISA_DRIVERSEISA_DRIVERS __table ( struct eisa_driver, "eisa_drivers" ) eisa.h 　
17198
 __eisa_driver__eisa_driver __table_entry ( EISA_DRIVERS, 01 ) eisa.h 　
17199
 ERRFILE_COREERRFILE_CORE 0x00002000 errfile.h *< Core code
17200
 ERRFILE_DRIVERERRFILE_DRIVER 0x00004000 errfile.h *< Driver code
17201
 ERRFILE_NETERRFILE_NET 0x00006000 errfile.h *< Networking code
17202
 ERRFILE_IMAGEERRFILE_IMAGE 0x00008000 errfile.h *< Image code
17203
 ERRFILE_OTHERERRFILE_OTHER 0x0000e000 errfile.h *< Any other code
17204
 ERRFILE_ARCHERRFILE_ARCH 0x00800000 errfile.h 　
17205
 ERRFILE_asprintfERRFILE_asprintf ( ERRFILE_CORE | 0x00000000 ) errfile.h 　
17206
 ERRFILE_downloaderERRFILE_downloader ( ERRFILE_CORE | 0x00010000 ) errfile.h 　
17207
 ERRFILE_execERRFILE_exec ( ERRFILE_CORE | 0x00020000 ) errfile.h 　
17208
 ERRFILE_hwERRFILE_hw ( ERRFILE_CORE | 0x00030000 ) errfile.h 　
17209
 ERRFILE_iobufERRFILE_iobuf ( ERRFILE_CORE | 0x00040000 ) errfile.h 　
17210
 ERRFILE_jobERRFILE_job ( ERRFILE_CORE | 0x00050000 ) errfile.h 　
17211
 ERRFILE_linebufERRFILE_linebuf ( ERRFILE_CORE | 0x00060000 ) errfile.h 　
17212
 ERRFILE_monojobERRFILE_monojob ( ERRFILE_CORE | 0x00070000 ) errfile.h 　
17213
 ERRFILE_nvoERRFILE_nvo ( ERRFILE_CORE | 0x00080000 ) errfile.h 　
17214
 ERRFILE_openERRFILE_open ( ERRFILE_CORE | 0x00090000 ) errfile.h 　
17215
 ERRFILE_posix_ioERRFILE_posix_io ( ERRFILE_CORE | 0x000a0000 ) errfile.h 　
17216
 ERRFILE_resolvERRFILE_resolv ( ERRFILE_CORE | 0x000b0000 ) errfile.h 　
17217
 ERRFILE_settingsERRFILE_settings ( ERRFILE_CORE | 0x000c0000 ) errfile.h 　
17218
 ERRFILE_vsprintfERRFILE_vsprintf ( ERRFILE_CORE | 0x000d0000 ) errfile.h 　
17219
 ERRFILE_xferERRFILE_xfer ( ERRFILE_CORE | 0x000e0000 ) errfile.h 　
17220
 ERRFILE_bitmapERRFILE_bitmap ( ERRFILE_CORE | 0x000f0000 ) errfile.h 　
17221
 ERRFILE_eisaERRFILE_eisa ( ERRFILE_DRIVER | 0x00000000 ) errfile.h 　
17222
 ERRFILE_isaERRFILE_isa ( ERRFILE_DRIVER | 0x00010000 ) errfile.h 　
17223
 ERRFILE_isapnpERRFILE_isapnp ( ERRFILE_DRIVER | 0x00020000 ) errfile.h 　
17224
 ERRFILE_mcaERRFILE_mca ( ERRFILE_DRIVER | 0x00030000 ) errfile.h 　
17225
 ERRFILE_pciERRFILE_pci ( ERRFILE_DRIVER | 0x00040000 ) errfile.h 　
17226
 ERRFILE_nvsERRFILE_nvs ( ERRFILE_DRIVER | 0x00100000 ) errfile.h 　
17227
 ERRFILE_spiERRFILE_spi ( ERRFILE_DRIVER | 0x00110000 ) errfile.h 　
17228
 ERRFILE_i2c_bitERRFILE_i2c_bit ( ERRFILE_DRIVER | 0x00120000 ) errfile.h 　
17229
 ERRFILE_spi_bitERRFILE_spi_bit ( ERRFILE_DRIVER | 0x00130000 ) errfile.h 　
17230
 ERRFILE_3c509ERRFILE_3c509 ( ERRFILE_DRIVER | 0x00200000 ) errfile.h 　
17231
 ERRFILE_bnx2ERRFILE_bnx2 ( ERRFILE_DRIVER | 0x00210000 ) errfile.h 　
17232
 ERRFILE_cs89x0ERRFILE_cs89x0 ( ERRFILE_DRIVER | 0x00220000 ) errfile.h 　
17233
 ERRFILE_eeproERRFILE_eepro ( ERRFILE_DRIVER | 0x00230000 ) errfile.h 　
17234
 ERRFILE_etherfabricERRFILE_etherfabric ( ERRFILE_DRIVER | 0x00240000 ) errfile.h 　
17235
 ERRFILE_legacyERRFILE_legacy ( ERRFILE_DRIVER | 0x00250000 ) errfile.h 　
17236
 ERRFILE_natsemiERRFILE_natsemi ( ERRFILE_DRIVER | 0x00260000 ) errfile.h 　
17237
 ERRFILE_pnicERRFILE_pnic ( ERRFILE_DRIVER | 0x00270000 ) errfile.h 　
17238
 ERRFILE_prism2_pciERRFILE_prism2_pci ( ERRFILE_DRIVER | 0x00280000 ) errfile.h 　
17239
 ERRFILE_prism2_plxERRFILE_prism2_plx ( ERRFILE_DRIVER | 0x00290000 ) errfile.h 　
17240
 ERRFILE_rtl8139ERRFILE_rtl8139 ( ERRFILE_DRIVER | 0x002a0000 ) errfile.h 　
17241
 ERRFILE_smc9000ERRFILE_smc9000 ( ERRFILE_DRIVER | 0x002b0000 ) errfile.h 　
17242
 ERRFILE_tg3ERRFILE_tg3 ( ERRFILE_DRIVER | 0x002c0000 ) errfile.h 　
17243
 ERRFILE_3c509_eisaERRFILE_3c509_eisa ( ERRFILE_DRIVER | 0x002d0000 ) errfile.h 　
17244
 ERRFILE_3c515ERRFILE_3c515 ( ERRFILE_DRIVER | 0x002e0000 ) errfile.h 　
17245
 ERRFILE_3c529ERRFILE_3c529 ( ERRFILE_DRIVER | 0x002f0000 ) errfile.h 　
17246
 ERRFILE_3c595ERRFILE_3c595 ( ERRFILE_DRIVER | 0x00300000 ) errfile.h 　
17247
 ERRFILE_3c5x9ERRFILE_3c5x9 ( ERRFILE_DRIVER | 0x00310000 ) errfile.h 　
17248
 ERRFILE_3c90xERRFILE_3c90x ( ERRFILE_DRIVER | 0x00320000 ) errfile.h 　
17249
 ERRFILE_amd8111eERRFILE_amd8111e ( ERRFILE_DRIVER | 0x00330000 ) errfile.h 　
17250
 ERRFILE_davicomERRFILE_davicom ( ERRFILE_DRIVER | 0x00340000 ) errfile.h 　
17251
 ERRFILE_depcaERRFILE_depca ( ERRFILE_DRIVER | 0x00350000 ) errfile.h 　
17252
 ERRFILE_dmfeERRFILE_dmfe ( ERRFILE_DRIVER | 0x00360000 ) errfile.h 　
17253
 ERRFILE_eepro100ERRFILE_eepro100 ( ERRFILE_DRIVER | 0x00380000 ) errfile.h 　
17254
 ERRFILE_epic100ERRFILE_epic100 ( ERRFILE_DRIVER | 0x00390000 ) errfile.h 　
17255
 ERRFILE_forcedethERRFILE_forcedeth ( ERRFILE_DRIVER | 0x003a0000 ) errfile.h 　
17256
 ERRFILE_mtd80xERRFILE_mtd80x ( ERRFILE_DRIVER | 0x003b0000 ) errfile.h 　
17257
 ERRFILE_ns83820ERRFILE_ns83820 ( ERRFILE_DRIVER | 0x003c0000 ) errfile.h 　
17258
 ERRFILE_ns8390ERRFILE_ns8390 ( ERRFILE_DRIVER | 0x003d0000 ) errfile.h 　
17259
 ERRFILE_pcnet32ERRFILE_pcnet32 ( ERRFILE_DRIVER | 0x003e0000 ) errfile.h 　
17260
 ERRFILE_r8169ERRFILE_r8169 ( ERRFILE_DRIVER | 0x003f0000 ) errfile.h 　
17261
 ERRFILE_sis900ERRFILE_sis900 ( ERRFILE_DRIVER | 0x00400000 ) errfile.h 　
17262
 ERRFILE_sundanceERRFILE_sundance ( ERRFILE_DRIVER | 0x00410000 ) errfile.h 　
17263
 ERRFILE_tlanERRFILE_tlan ( ERRFILE_DRIVER | 0x00420000 ) errfile.h 　
17264
 ERRFILE_tulipERRFILE_tulip ( ERRFILE_DRIVER | 0x00430000 ) errfile.h 　
17265
 ERRFILE_via_rhineERRFILE_via_rhine ( ERRFILE_DRIVER | 0x00440000 ) errfile.h 　
17266
 ERRFILE_via_velocityERRFILE_via_velocity ( ERRFILE_DRIVER | 0x00450000 ) errfile.h 　
17267
 ERRFILE_w89c840ERRFILE_w89c840 ( ERRFILE_DRIVER | 0x00460000 ) errfile.h 　
17268
 ERRFILE_ipoibERRFILE_ipoib ( ERRFILE_DRIVER | 0x00470000 ) errfile.h 　
17269
 ERRFILE_e1000ERRFILE_e1000 ( ERRFILE_DRIVER | 0x00480000 ) errfile.h 　
17270
 ERRFILE_e1000_hwERRFILE_e1000_hw ( ERRFILE_DRIVER | 0x00490000 ) errfile.h 　
17271
 ERRFILE_mtnicERRFILE_mtnic ( ERRFILE_DRIVER | 0x004a0000 ) errfile.h 　
17272
 ERRFILE_phantomERRFILE_phantom ( ERRFILE_DRIVER | 0x004b0000 ) errfile.h 　
17273
 ERRFILE_ne2k_isaERRFILE_ne2k_isa ( ERRFILE_DRIVER | 0x004c0000 ) errfile.h 　
17274
 ERRFILE_b44ERRFILE_b44 ( ERRFILE_DRIVER | 0x004d0000 ) errfile.h 　
17275
 ERRFILE_rtl818xERRFILE_rtl818x ( ERRFILE_DRIVER | 0x004e0000 ) errfile.h 　
17276
 ERRFILE_sky2ERRFILE_sky2 ( ERRFILE_DRIVER | 0x004f0000 ) errfile.h 　
17277
 ERRFILE_ath5kERRFILE_ath5k ( ERRFILE_DRIVER | 0x00500000 ) errfile.h 　
17278
 ERRFILE_atl1eERRFILE_atl1e ( ERRFILE_DRIVER | 0x00510000 ) errfile.h 　
17279
 ERRFILE_sis190ERRFILE_sis190 ( ERRFILE_DRIVER | 0x00520000 ) errfile.h 　
17280
 ERRFILE_scsiERRFILE_scsi ( ERRFILE_DRIVER | 0x00700000 ) errfile.h 　
17281
 ERRFILE_arbelERRFILE_arbel ( ERRFILE_DRIVER | 0x00710000 ) errfile.h 　
17282
 ERRFILE_hermonERRFILE_hermon ( ERRFILE_DRIVER | 0x00720000 ) errfile.h 　
17283
 ERRFILE_lindaERRFILE_linda ( ERRFILE_DRIVER | 0x00730000 ) errfile.h 　
17284
 ERRFILE_ataERRFILE_ata ( ERRFILE_DRIVER | 0x00740000 ) errfile.h 　
17285
 ERRFILE_srpERRFILE_srp ( ERRFILE_DRIVER | 0x00750000 ) errfile.h 　
17286
 ERRFILE_aoeERRFILE_aoe ( ERRFILE_NET | 0x00000000 ) errfile.h 　
17287
 ERRFILE_arpERRFILE_arp ( ERRFILE_NET | 0x00010000 ) errfile.h 　
17288
 ERRFILE_dhcpoptsERRFILE_dhcpopts ( ERRFILE_NET | 0x00020000 ) errfile.h 　
17289
 ERRFILE_ethernetERRFILE_ethernet ( ERRFILE_NET | 0x00030000 ) errfile.h 　
17290
 ERRFILE_icmpv6ERRFILE_icmpv6 ( ERRFILE_NET | 0x00040000 ) errfile.h 　
17291
 ERRFILE_ipv4ERRFILE_ipv4 ( ERRFILE_NET | 0x00050000 ) errfile.h 　
17292
 ERRFILE_ipv6ERRFILE_ipv6 ( ERRFILE_NET | 0x00060000 ) errfile.h 　
17293
 ERRFILE_ndpERRFILE_ndp ( ERRFILE_NET | 0x00070000 ) errfile.h 　
17294
 ERRFILE_netdeviceERRFILE_netdevice ( ERRFILE_NET | 0x00080000 ) errfile.h 　
17295
 ERRFILE_nullnetERRFILE_nullnet ( ERRFILE_NET | 0x00090000 ) errfile.h 　
17296
 ERRFILE_tcpERRFILE_tcp ( ERRFILE_NET | 0x000a0000 ) errfile.h 　
17297
 ERRFILE_ftpERRFILE_ftp ( ERRFILE_NET | 0x000b0000 ) errfile.h 　
17298
 ERRFILE_httpERRFILE_http ( ERRFILE_NET | 0x000c0000 ) errfile.h 　
17299
 ERRFILE_iscsiERRFILE_iscsi ( ERRFILE_NET | 0x000d0000 ) errfile.h 　
17300
 ERRFILE_tcpipERRFILE_tcpip ( ERRFILE_NET | 0x000e0000 ) errfile.h 　
17301
 ERRFILE_udpERRFILE_udp ( ERRFILE_NET | 0x000f0000 ) errfile.h 　
17302
 ERRFILE_dhcpERRFILE_dhcp ( ERRFILE_NET | 0x00100000 ) errfile.h 　
17303
 ERRFILE_dnsERRFILE_dns ( ERRFILE_NET | 0x00110000 ) errfile.h 　
17304
 ERRFILE_tftpERRFILE_tftp ( ERRFILE_NET | 0x00120000 ) errfile.h 　
17305
 ERRFILE_infinibandERRFILE_infiniband ( ERRFILE_NET | 0x00130000 ) errfile.h 　
17306
 ERRFILE_netdev_settingsERRFILE_netdev_settings ( ERRFILE_NET | 0x00140000 ) errfile.h 　
17307
 ERRFILE_dhcppktERRFILE_dhcppkt ( ERRFILE_NET | 0x00150000 ) errfile.h 　
17308
 ERRFILE_slamERRFILE_slam ( ERRFILE_NET | 0x00160000 ) errfile.h 　
17309
 ERRFILE_ib_smaERRFILE_ib_sma ( ERRFILE_NET | 0x00170000 ) errfile.h 　
17310
 ERRFILE_ib_packetERRFILE_ib_packet ( ERRFILE_NET | 0x00180000 ) errfile.h 　
17311
 ERRFILE_icmpERRFILE_icmp ( ERRFILE_NET | 0x00190000 ) errfile.h 　
17312
 ERRFILE_ib_qsetERRFILE_ib_qset ( ERRFILE_NET | 0x001a0000 ) errfile.h 　
17313
 ERRFILE_ib_gmaERRFILE_ib_gma ( ERRFILE_NET | 0x001b0000 ) errfile.h 　
17314
 ERRFILE_ib_pathrecERRFILE_ib_pathrec ( ERRFILE_NET | 0x001c0000 ) errfile.h 　
17315
 ERRFILE_ib_mcastERRFILE_ib_mcast ( ERRFILE_NET | 0x001d0000 ) errfile.h 　
17316
 ERRFILE_ib_cmERRFILE_ib_cm ( ERRFILE_NET | 0x001e0000 ) errfile.h 　
17317
 ERRFILE_net80211ERRFILE_net80211 ( ERRFILE_NET | 0x001f0000 ) errfile.h 　
17318
 ERRFILE_ib_miERRFILE_ib_mi ( ERRFILE_NET | 0x00200000 ) errfile.h 　
17319
 ERRFILE_ib_cmrcERRFILE_ib_cmrc ( ERRFILE_NET | 0x00210000 ) errfile.h 　
17320
 ERRFILE_ib_srpERRFILE_ib_srp ( ERRFILE_NET | 0x00220000 ) errfile.h 　
17321
 ERRFILE_imageERRFILE_image ( ERRFILE_IMAGE | 0x00000000 ) errfile.h 　
17322
 ERRFILE_elfERRFILE_elf ( ERRFILE_IMAGE | 0x00010000 ) errfile.h 　
17323
 ERRFILE_scriptERRFILE_script ( ERRFILE_IMAGE | 0x00020000 ) errfile.h 　
17324
 ERRFILE_segmentERRFILE_segment ( ERRFILE_IMAGE | 0x00030000 ) errfile.h 　
17325
 ERRFILE_efi_imageERRFILE_efi_image ( ERRFILE_IMAGE | 0x00040000 ) errfile.h 　
17326
 ERRFILE_embeddedERRFILE_embedded ( ERRFILE_IMAGE | 0x00050000 ) errfile.h 　
17327
 ERRFILE_asn1ERRFILE_asn1 ( ERRFILE_OTHER | 0x00000000 ) errfile.h 　
17328
 ERRFILE_chapERRFILE_chap ( ERRFILE_OTHER | 0x00010000 ) errfile.h 　
17329
 ERRFILE_aoebootERRFILE_aoeboot ( ERRFILE_OTHER | 0x00020000 ) errfile.h 　
17330
 ERRFILE_autobootERRFILE_autoboot ( ERRFILE_OTHER | 0x00030000 ) errfile.h 　
17331
 ERRFILE_dhcpmgmtERRFILE_dhcpmgmt ( ERRFILE_OTHER | 0x00040000 ) errfile.h 　
17332
 ERRFILE_imgmgmtERRFILE_imgmgmt ( ERRFILE_OTHER | 0x00050000 ) errfile.h 　
17333
 ERRFILE_pxe_tftpERRFILE_pxe_tftp ( ERRFILE_OTHER | 0x00060000 ) errfile.h 　
17334
 ERRFILE_pxe_udpERRFILE_pxe_udp ( ERRFILE_OTHER | 0x00070000 ) errfile.h 　
17335
 ERRFILE_axtls_aesERRFILE_axtls_aes ( ERRFILE_OTHER | 0x00080000 ) errfile.h 　
17336
 ERRFILE_cipherERRFILE_cipher ( ERRFILE_OTHER | 0x00090000 ) errfile.h 　
17337
 ERRFILE_image_cmdERRFILE_image_cmd ( ERRFILE_OTHER | 0x000a0000 ) errfile.h 　
17338
 ERRFILE_uri_testERRFILE_uri_test ( ERRFILE_OTHER | 0x000b0000 ) errfile.h 　
17339
 ERRFILE_ibftERRFILE_ibft ( ERRFILE_OTHER | 0x000c0000 ) errfile.h 　
17340
 ERRFILE_tlsERRFILE_tls ( ERRFILE_OTHER | 0x000d0000 ) errfile.h 　
17341
 ERRFILE_ifmgmtERRFILE_ifmgmt ( ERRFILE_OTHER | 0x000e0000 ) errfile.h 　
17342
 ERRFILE_iscsibootERRFILE_iscsiboot ( ERRFILE_OTHER | 0x000f0000 ) errfile.h 　
17343
 ERRFILE_efi_pciERRFILE_efi_pci ( ERRFILE_OTHER | 0x00100000 ) errfile.h 　
17344
 ERRFILE_efi_snpERRFILE_efi_snp ( ERRFILE_OTHER | 0x00110000 ) errfile.h 　
17345
 ERRFILE_smbiosERRFILE_smbios ( ERRFILE_OTHER | 0x00120000 ) errfile.h 　
17346
 ERRFILE_smbios_settingsERRFILE_smbios_settings ( ERRFILE_OTHER | 0x00130000 ) errfile.h 　
17347
 ERRFILE_efi_smbiosERRFILE_efi_smbios ( ERRFILE_OTHER | 0x00140000 ) errfile.h 　
17348
 ERRFILE_pxemenuERRFILE_pxemenu ( ERRFILE_OTHER | 0x00150000 ) errfile.h 　
17349
 ERRFILE_x509ERRFILE_x509 ( ERRFILE_OTHER | 0x00160000 ) errfile.h 　
17350
 ERRFILE_login_uiERRFILE_login_ui ( ERRFILE_OTHER | 0x00170000 ) errfile.h 　
17351
 ERRFILE_ib_srpbootERRFILE_ib_srpboot ( ERRFILE_OTHER | 0x00180000 ) errfile.h 　
17352
 ERRORTABERRORTAB __table ( struct errortab, "errortab" ) errortab.h 　
17353
 __errortab__errortab __table_entry ( ERRORTAB, 01 ) errortab.h 　
17354
 FEATURE_PROTOCOLFEATURE_PROTOCOL 01 features.h *< Network protocols
17355
 FEATURE_IMAGEFEATURE_IMAGE 02 features.h *< Image formats
17356
 FEATURE_MISCFEATURE_MISC 03 features.h *< Miscellaneous
17357
 DHCP_EB_FEATURE_PXE_EXTDHCP_EB_FEATURE_PXE_EXT 0x10 features.h *< PXE API extensions
17358
 DHCP_EB_FEATURE_ISCSIDHCP_EB_FEATURE_ISCSI 0x11 features.h *< iSCSI protocol
17359
 DHCP_EB_FEATURE_AOEDHCP_EB_FEATURE_AOE 0x12 features.h *< AoE protocol
17360
 DHCP_EB_FEATURE_HTTPDHCP_EB_FEATURE_HTTP 0x13 features.h *< HTTP protocol
17361
 DHCP_EB_FEATURE_HTTPSDHCP_EB_FEATURE_HTTPS 0x14 features.h *< HTTPS protocol
17362
 DHCP_EB_FEATURE_TFTPDHCP_EB_FEATURE_TFTP 0x15 features.h *< TFTP protocol
17363
 DHCP_EB_FEATURE_FTPDHCP_EB_FEATURE_FTP 0x16 features.h *< FTP protocol
17364
 DHCP_EB_FEATURE_DNSDHCP_EB_FEATURE_DNS 0x17 features.h *< DNS protocol
17365
 DHCP_EB_FEATURE_BZIMAGEDHCP_EB_FEATURE_BZIMAGE 0x18 features.h *< bzImage format
17366
 DHCP_EB_FEATURE_MULTIBOOTDHCP_EB_FEATURE_MULTIBOOT 0x19 features.h *< Multiboot format
17367
 DHCP_EB_FEATURE_SLAMDHCP_EB_FEATURE_SLAM 0x1a features.h *< SLAM protocol
17368
 DHCP_EB_FEATURE_SRPDHCP_EB_FEATURE_SRP 0x1b features.h *< SRP protocol
17369
 DHCP_EB_FEATURE_NBIDHCP_EB_FEATURE_NBI 0x20 features.h *< NBI format
17370
 DHCP_EB_FEATURE_PXEDHCP_EB_FEATURE_PXE 0x21 features.h *< PXE format
17371
 DHCP_EB_FEATURE_ELFDHCP_EB_FEATURE_ELF 0x22 features.h *< ELF format
17372
 DHCP_EB_FEATURE_COMBOOTDHCP_EB_FEATURE_COMBOOT 0x23 features.h *< COMBOOT format
17373
 DHCP_EB_FEATURE_EFIDHCP_EB_FEATURE_EFI 0x24 features.h *< EFI format
17374
 DHCP_FEATURESDHCP_FEATURES __table ( uint8_t, "dhcp_features" ) features.h 　
17375
 __dhcp_feature__dhcp_feature __table_entry ( DHCP_FEATURES, 01 ) features.h 　
17376
 FEATURESFEATURES __table ( struct feature, "features" ) features.h 　
17377
 FTP_PORTFTP_PORT 21 ftp.h 　
17378
 GDB_TRANSPORTSGDB_TRANSPORTS __table ( struct gdb_transport, "gdb_transports" ) gdbstub.h 　
17379
 __gdb_transport__gdb_transport __table_entry ( GDB_TRANSPORTS, 01 ) gdbstub.h 　
17380
 HTTP_PORTHTTP_PORT 80 http.h 　
17381
 HTTPS_PORTHTTPS_PORT 443 http.h 　
17382
 I2C_TENBIT_ADDRESSI2C_TENBIT_ADDRESS 0x7800 i2c.h 　
17383
 I2C_WRITEI2C_WRITE 0 i2c.h 　
17384
 I2C_READI2C_READ 1 i2c.h 　
17385
 I2C_UDELAYI2C_UDELAY 5 i2c.h 　
17386
 I2C_RESET_MAX_CYCLESI2C_RESET_MAX_CYCLES 32 i2c.h 　
17387
 IB_SMP_CLASS_VERSIONIB_SMP_CLASS_VERSION 1 ib_mad.h 　
17388
 IB_SMP_STATUS_D_INBOUNDIB_SMP_STATUS_D_INBOUND 0x8000 ib_mad.h 　
17389
 IB_SMP_ATTR_NOTICEIB_SMP_ATTR_NOTICE 0x0002 ib_mad.h 　
17390
 IB_SMP_ATTR_NODE_DESCIB_SMP_ATTR_NODE_DESC 0x0010 ib_mad.h 　
17391
 IB_SMP_ATTR_NODE_INFOIB_SMP_ATTR_NODE_INFO 0x0011 ib_mad.h 　
17392
 IB_SMP_ATTR_SWITCH_INFOIB_SMP_ATTR_SWITCH_INFO 0x0012 ib_mad.h 　
17393
 IB_SMP_ATTR_GUID_INFOIB_SMP_ATTR_GUID_INFO 0x0014 ib_mad.h 　
17394
 IB_SMP_ATTR_PORT_INFOIB_SMP_ATTR_PORT_INFO 0x0015 ib_mad.h 　
17395
 IB_SMP_ATTR_PKEY_TABLEIB_SMP_ATTR_PKEY_TABLE 0x0016 ib_mad.h 　
17396
 IB_SMP_ATTR_SL_TO_VL_TABLEIB_SMP_ATTR_SL_TO_VL_TABLE 0x0017 ib_mad.h 　
17397
 IB_SMP_ATTR_VL_ARB_TABLEIB_SMP_ATTR_VL_ARB_TABLE 0x0018 ib_mad.h 　
17398
 IB_SMP_ATTR_LINEAR_FORWARD_TABLIB_SMP_ATTR_LINEAR_FORWARD_TABL 0x0019 ib_mad.h 　
17399
 IB_SMP_ATTR_RANDOM_FORWARD_TABLIB_SMP_ATTR_RANDOM_FORWARD_TABL 0x001A ib_mad.h 　
17400
 IB_SMP_ATTR_MCAST_FORWARD_TABLEIB_SMP_ATTR_MCAST_FORWARD_TABLE 0x001B ib_mad.h 　
17401
 IB_SMP_ATTR_SM_INFOIB_SMP_ATTR_SM_INFO 0x0020 ib_mad.h 　
17402
 IB_SMP_ATTR_VENDOR_DIAGIB_SMP_ATTR_VENDOR_DIAG 0x0030 ib_mad.h 　
17403
 IB_SMP_ATTR_LED_INFOIB_SMP_ATTR_LED_INFO 0x0031 ib_mad.h 　
17404
 IB_SMP_ATTR_VENDOR_MASKIB_SMP_ATTR_VENDOR_MASK 0xFF00 ib_mad.h 　
17405
 IB_NODE_TYPE_HCAIB_NODE_TYPE_HCA 0x01 ib_mad.h 　
17406
 IB_NODE_TYPE_SWITCHIB_NODE_TYPE_SWITCH 0x02 ib_mad.h 　
17407
 IB_NODE_TYPE_ROUTERIB_NODE_TYPE_ROUTER 0x03 ib_mad.h 　
17408
 IB_LINK_WIDTH_1XIB_LINK_WIDTH_1X 0x01 ib_mad.h 　
17409
 IB_LINK_WIDTH_4XIB_LINK_WIDTH_4X 0x02 ib_mad.h 　
17410
 IB_LINK_WIDTH_8XIB_LINK_WIDTH_8X 0x04 ib_mad.h 　
17411
 IB_LINK_WIDTH_12XIB_LINK_WIDTH_12X 0x08 ib_mad.h 　
17412
 IB_LINK_SPEED_SDRIB_LINK_SPEED_SDR 0x01 ib_mad.h 　
17413
 IB_LINK_SPEED_DDRIB_LINK_SPEED_DDR 0x02 ib_mad.h 　
17414
 IB_LINK_SPEED_QDRIB_LINK_SPEED_QDR 0x04 ib_mad.h 　
17415
 IB_PORT_STATE_DOWNIB_PORT_STATE_DOWN 0x01 ib_mad.h 　
17416
 IB_PORT_STATE_INITIB_PORT_STATE_INIT 0x02 ib_mad.h 　
17417
 IB_PORT_STATE_ARMEDIB_PORT_STATE_ARMED 0x03 ib_mad.h 　
17418
 IB_PORT_STATE_ACTIVEIB_PORT_STATE_ACTIVE 0x04 ib_mad.h 　
17419
 IB_PORT_PHYS_STATE_SLEEPIB_PORT_PHYS_STATE_SLEEP 0x01 ib_mad.h 　
17420
 IB_PORT_PHYS_STATE_POLLINGIB_PORT_PHYS_STATE_POLLING 0x02 ib_mad.h 　
17421
 IB_MTU_256IB_MTU_256 0x01 ib_mad.h 　
17422
 IB_MTU_512IB_MTU_512 0x02 ib_mad.h 　
17423
 IB_MTU_1024IB_MTU_1024 0x03 ib_mad.h 　
17424
 IB_MTU_2048IB_MTU_2048 0x04 ib_mad.h 　
17425
 IB_MTU_4096IB_MTU_4096 0x05 ib_mad.h 　
17426
 IB_VL_0IB_VL_0 0x01 ib_mad.h 　
17427
 IB_VL_0_1IB_VL_0_1 0x02 ib_mad.h 　
17428
 IB_VL_0_3IB_VL_0_3 0x03 ib_mad.h 　
17429
 IB_VL_0_7IB_VL_0_7 0x04 ib_mad.h 　
17430
 IB_VL_0_14IB_VL_0_14 0x05 ib_mad.h 　
17431
 IB_SA_CLASS_VERSIONIB_SA_CLASS_VERSION 2 ib_mad.h 　
17432
 IB_SA_METHOD_DELETE_RESPIB_SA_METHOD_DELETE_RESP 0x95 ib_mad.h 　
17433
 IB_SA_ATTR_MC_MEMBER_RECIB_SA_ATTR_MC_MEMBER_REC 0x38 ib_mad.h 　
17434
 IB_SA_ATTR_PATH_RECIB_SA_ATTR_PATH_REC 0x35 ib_mad.h 　
17435
 IB_SA_PATH_REC_DGIDIB_SA_PATH_REC_DGID (1<<2) ib_mad.h 　
17436
 IB_SA_PATH_REC_SGIDIB_SA_PATH_REC_SGID (1<<3) ib_mad.h 　
17437
 IB_SA_MCMEMBER_REC_MGIDIB_SA_MCMEMBER_REC_MGID (1<<0) ib_mad.h 　
17438
 IB_SA_MCMEMBER_REC_PORT_GIDIB_SA_MCMEMBER_REC_PORT_GID (1<<1) ib_mad.h 　
17439
 IB_SA_MCMEMBER_REC_QKEYIB_SA_MCMEMBER_REC_QKEY (1<<2) ib_mad.h 　
17440
 IB_SA_MCMEMBER_REC_MLIDIB_SA_MCMEMBER_REC_MLID (1<<3) ib_mad.h 　
17441
 IB_SA_MCMEMBER_REC_MTU_SELECTORIB_SA_MCMEMBER_REC_MTU_SELECTOR (1<<4) ib_mad.h 　
17442
 IB_SA_MCMEMBER_REC_MTUIB_SA_MCMEMBER_REC_MTU (1<<5) ib_mad.h 　
17443
 IB_SA_MCMEMBER_REC_TRAFFIC_CLASIB_SA_MCMEMBER_REC_TRAFFIC_CLAS (1<<6) ib_mad.h 　
17444
 IB_SA_MCMEMBER_REC_PKEYIB_SA_MCMEMBER_REC_PKEY (1<<7) ib_mad.h 　
17445
 IB_SA_MCMEMBER_REC_RATE_SELECTOIB_SA_MCMEMBER_REC_RATE_SELECTO (1<<8) ib_mad.h 　
17446
 IB_SA_MCMEMBER_REC_RATEIB_SA_MCMEMBER_REC_RATE (1<<9) ib_mad.h 　
17447
 IB_SA_MCMEMBER_REC_PACKET_LIFE_IB_SA_MCMEMBER_REC_PACKET_LIFE_ (1<<10) ib_mad.h 　
17448
 IB_SA_MCMEMBER_REC_PACKET_LIFE_IB_SA_MCMEMBER_REC_PACKET_LIFE_ (1<<11) ib_mad.h 　
17449
 IB_SA_MCMEMBER_REC_SLIB_SA_MCMEMBER_REC_SL (1<<12) ib_mad.h 　
17450
 IB_SA_MCMEMBER_REC_FLOW_LABELIB_SA_MCMEMBER_REC_FLOW_LABEL (1<<13) ib_mad.h 　
17451
 IB_SA_MCMEMBER_REC_HOP_LIMITIB_SA_MCMEMBER_REC_HOP_LIMIT (1<<14) ib_mad.h 　
17452
 IB_SA_MCMEMBER_REC_SCOPEIB_SA_MCMEMBER_REC_SCOPE (1<<15) ib_mad.h 　
17453
 IB_SA_MCMEMBER_REC_JOIN_STATEIB_SA_MCMEMBER_REC_JOIN_STATE (1<<16) ib_mad.h 　
17454
 IB_SA_MCMEMBER_REC_PROXY_JOINIB_SA_MCMEMBER_REC_PROXY_JOIN (1<<17) ib_mad.h 　
17455
 IB_CM_CLASS_VERSIONIB_CM_CLASS_VERSION 2 ib_mad.h 　
17456
 IB_CM_ATTR_CLASS_PORT_INFOIB_CM_ATTR_CLASS_PORT_INFO 0x0001 ib_mad.h 　
17457
 IB_CM_ATTR_CONNECT_REQUESTIB_CM_ATTR_CONNECT_REQUEST 0x0010 ib_mad.h 　
17458
 IB_CM_ATTR_MSG_RCPT_ACKIB_CM_ATTR_MSG_RCPT_ACK 0x0011 ib_mad.h 　
17459
 IB_CM_ATTR_CONNECT_REJECTIB_CM_ATTR_CONNECT_REJECT 0x0012 ib_mad.h 　
17460
 IB_CM_ATTR_CONNECT_REPLYIB_CM_ATTR_CONNECT_REPLY 0x0013 ib_mad.h 　
17461
 IB_CM_ATTR_READY_TO_USEIB_CM_ATTR_READY_TO_USE 0x0014 ib_mad.h 　
17462
 IB_CM_ATTR_DISCONNECT_REQUESTIB_CM_ATTR_DISCONNECT_REQUEST 0x0015 ib_mad.h 　
17463
 IB_CM_ATTR_DISCONNECT_REPLYIB_CM_ATTR_DISCONNECT_REPLY 0x0016 ib_mad.h 　
17464
 IB_CM_ATTR_SERVICE_ID_RES_REQIB_CM_ATTR_SERVICE_ID_RES_REQ 0x0016 ib_mad.h 　
17465
 IB_CM_ATTR_SERVICE_ID_RES_REQ_RIB_CM_ATTR_SERVICE_ID_RES_REQ_R 0x0018 ib_mad.h 　
17466
 IB_CM_ATTR_LOAD_ALTERNATE_PATHIB_CM_ATTR_LOAD_ALTERNATE_PATH 0x0019 ib_mad.h 　
17467
 IB_CM_ATTR_ALTERNATE_PATH_RESPOIB_CM_ATTR_ALTERNATE_PATH_RESPO 0x001a ib_mad.h 　
17468
 IB_CM_TRANSPORT_RCIB_CM_TRANSPORT_RC 0 ib_mad.h 　
17469
 IB_CM_TRANSPORT_UCIB_CM_TRANSPORT_UC 1 ib_mad.h 　
17470
 IB_CM_TRANSPORT_RDIB_CM_TRANSPORT_RD 2 ib_mad.h 　
17471
 IB_CM_REJECT_BAD_SERVICE_IDIB_CM_REJECT_BAD_SERVICE_ID 8 ib_mad.h 　
17472
 IB_CM_REJECT_STALE_CONNIB_CM_REJECT_STALE_CONN 10 ib_mad.h 　
17473
 IB_CM_REJECT_CONSUMERIB_CM_REJECT_CONSUMER 28 ib_mad.h 　
17474
 IB_MGMT_BASE_VERSIONIB_MGMT_BASE_VERSION 1 ib_mad.h 　
17475
 IB_MGMT_CLASS_SUBN_LID_ROUTEDIB_MGMT_CLASS_SUBN_LID_ROUTED 0x01 ib_mad.h 　
17476
 IB_MGMT_CLASS_SUBN_DIRECTED_ROUIB_MGMT_CLASS_SUBN_DIRECTED_ROU 0x81 ib_mad.h 　
17477
 IB_MGMT_CLASS_SUBN_ADMIB_MGMT_CLASS_SUBN_ADM 0x03 ib_mad.h 　
17478
 IB_MGMT_CLASS_PERF_MGMTIB_MGMT_CLASS_PERF_MGMT 0x04 ib_mad.h 　
17479
 IB_MGMT_CLASS_BMIB_MGMT_CLASS_BM 0x05 ib_mad.h 　
17480
 IB_MGMT_CLASS_DEVICE_MGMTIB_MGMT_CLASS_DEVICE_MGMT 0x06 ib_mad.h 　
17481
 IB_MGMT_CLASS_CMIB_MGMT_CLASS_CM 0x07 ib_mad.h 　
17482
 IB_MGMT_CLASS_SNMPIB_MGMT_CLASS_SNMP 0x08 ib_mad.h 　
17483
 IB_MGMT_CLASS_VENDOR_RANGE2_STAIB_MGMT_CLASS_VENDOR_RANGE2_STA 0x30 ib_mad.h 　
17484
 IB_MGMT_CLASS_VENDOR_RANGE2_ENDIB_MGMT_CLASS_VENDOR_RANGE2_END 0x4f ib_mad.h 　
17485
 IB_MGMT_CLASS_MASKIB_MGMT_CLASS_MASK 0x7f ib_mad.h 　
17486
 IB_MGMT_METHOD_GETIB_MGMT_METHOD_GET 0x01 ib_mad.h 　
17487
 IB_MGMT_METHOD_SETIB_MGMT_METHOD_SET 0x02 ib_mad.h 　
17488
 IB_MGMT_METHOD_GET_RESPIB_MGMT_METHOD_GET_RESP 0x81 ib_mad.h 　
17489
 IB_MGMT_METHOD_SENDIB_MGMT_METHOD_SEND 0x03 ib_mad.h 　
17490
 IB_MGMT_METHOD_TRAPIB_MGMT_METHOD_TRAP 0x05 ib_mad.h 　
17491
 IB_MGMT_METHOD_REPORTIB_MGMT_METHOD_REPORT 0x06 ib_mad.h 　
17492
 IB_MGMT_METHOD_REPORT_RESPIB_MGMT_METHOD_REPORT_RESP 0x86 ib_mad.h 　
17493
 IB_MGMT_METHOD_TRAP_REPRESSIB_MGMT_METHOD_TRAP_REPRESS 0x07 ib_mad.h 　
17494
 IB_MGMT_METHOD_DELETEIB_MGMT_METHOD_DELETE 0x15 ib_mad.h 　
17495
 IB_MGMT_STATUS_OKIB_MGMT_STATUS_OK 0x0000 ib_mad.h 　
17496
 IB_MGMT_STATUS_BAD_VERSIONIB_MGMT_STATUS_BAD_VERSION 0x0001 ib_mad.h 　
17497
 IB_MGMT_STATUS_UNSUPPORTED_METHIB_MGMT_STATUS_UNSUPPORTED_METH 0x0002 ib_mad.h 　
17498
 IB_MGMT_STATUS_UNSUPPORTED_METHIB_MGMT_STATUS_UNSUPPORTED_METH 0x0003 ib_mad.h 　
17499
 IB_MGMT_STATUS_INVALID_VALUEIB_MGMT_STATUS_INVALID_VALUE 0x0004 ib_mad.h 　
17500
 IB_MAD_AGENTSIB_MAD_AGENTS __table ( struct ib_mad_agent, "ib_mad_agents" ) ib_mi.h 　
17501
 __ib_mad_agent__ib_mad_agent __table_entry ( IB_MAD_AGENTS, 01 ) ib_mi.h 　
17502
 IB_LID_NONEIB_LID_NONE 0xffff ib_packet.h 　
17503
 IB_GRH_IPVER_IPv6IB_GRH_IPVER_IPv6 0x06 ib_packet.h 　
17504
 IB_GRH_NXTHDR_IBAIB_GRH_NXTHDR_IBA 0x1b ib_packet.h 　
17505
 IB_MAX_HEADER_SIZEIB_MAX_HEADER_SIZE sizeof ( union ib_headers ) ib_packet.h 　
17506
 ICMP_ECHO_RESPONSEICMP_ECHO_RESPONSE 0 icmp.h 　
17507
 ICMP_ECHO_REQUESTICMP_ECHO_REQUEST 8 icmp.h 　
17508
 ICMP6_NSOLICITICMP6_NSOLICIT 135 icmp6.h 　
17509
 ICMP6_NADVERTICMP6_NADVERT 136 icmp6.h 　
17510
 ICMP6_FLAGS_ROUTERICMP6_FLAGS_ROUTER 0x80 icmp6.h 　
17511
 ICMP6_FLAGS_SOLICITEDICMP6_FLAGS_SOLICITED 0x40 icmp6.h 　
17512
 ICMP6_FLAGS_OVERRIDEICMP6_FLAGS_OVERRIDE 0x20 icmp6.h 　
17513
 IEEE80211_MAX_DATA_LENIEEE80211_MAX_DATA_LEN 2304 ieee80211.h 　
17514
 IEEE80211_LLC_HEADER_LENIEEE80211_LLC_HEADER_LEN 8 ieee80211.h 　
17515
 IEEE80211_MAX_CRYPTO_HEADERIEEE80211_MAX_CRYPTO_HEADER 8 ieee80211.h 　
17516
 IEEE80211_MAX_CRYPTO_TRAILERIEEE80211_MAX_CRYPTO_TRAILER 8 ieee80211.h 　
17517
 IEEE80211_MAX_CRYPTO_OVERHEADIEEE80211_MAX_CRYPTO_OVERHEAD 16 ieee80211.h 　
17518
 IEEE80211_MAX_FRAME_DATAIEEE80211_MAX_FRAME_DATA 2296 ieee80211.h 　
17519
 IEEE80211_TYP_FRAME_HEADER_LENIEEE80211_TYP_FRAME_HEADER_LEN 24 ieee80211.h 　
17520
 IEEE80211_MAX_FRAME_HEADER_LENIEEE80211_MAX_FRAME_HEADER_LEN 32 ieee80211.h 　
17521
 IEEE80211_MAX_FRAME_LENIEEE80211_MAX_FRAME_LEN 2352 ieee80211.h 　
17522
 IEEE80211_MAX_SSID_LENIEEE80211_MAX_SSID_LEN 32 ieee80211.h 　
17523
 IEEE80211_FC_VERSIONIEEE80211_FC_VERSION 0x0003 ieee80211.h 　
17524
 IEEE80211_THIS_VERSIONIEEE80211_THIS_VERSION 0x0000 ieee80211.h 　
17525
 IEEE80211_FC_TYPEIEEE80211_FC_TYPE 0x000C ieee80211.h 　
17526
 IEEE80211_TYPE_MGMTIEEE80211_TYPE_MGMT 0x0000 ieee80211.h 　
17527
 IEEE80211_TYPE_CTRLIEEE80211_TYPE_CTRL 0x0004 ieee80211.h 　
17528
 IEEE80211_TYPE_DATAIEEE80211_TYPE_DATA 0x0008 ieee80211.h 　
17529
 IEEE80211_FC_SUBTYPEIEEE80211_FC_SUBTYPE 0x00F0 ieee80211.h 　
17530
 IEEE80211_STYPE_ASSOC_REQIEEE80211_STYPE_ASSOC_REQ 0x0000 ieee80211.h 　
17531
 IEEE80211_STYPE_ASSOC_RESPIEEE80211_STYPE_ASSOC_RESP 0x0010 ieee80211.h 　
17532
 IEEE80211_STYPE_REASSOC_REQIEEE80211_STYPE_REASSOC_REQ 0x0020 ieee80211.h 　
17533
 IEEE80211_STYPE_REASSOC_RESPIEEE80211_STYPE_REASSOC_RESP 0x0030 ieee80211.h 　
17534
 IEEE80211_STYPE_PROBE_REQIEEE80211_STYPE_PROBE_REQ 0x0040 ieee80211.h 　
17535
 IEEE80211_STYPE_PROBE_RESPIEEE80211_STYPE_PROBE_RESP 0x0050 ieee80211.h 　
17536
 IEEE80211_STYPE_BEACONIEEE80211_STYPE_BEACON 0x0080 ieee80211.h 　
17537
 IEEE80211_STYPE_DISASSOCIEEE80211_STYPE_DISASSOC 0x00A0 ieee80211.h 　
17538
 IEEE80211_STYPE_AUTHIEEE80211_STYPE_AUTH 0x00B0 ieee80211.h 　
17539
 IEEE80211_STYPE_DEAUTHIEEE80211_STYPE_DEAUTH 0x00C0 ieee80211.h 　
17540
 IEEE80211_STYPE_ACTIONIEEE80211_STYPE_ACTION 0x00D0 ieee80211.h 　
17541
 IEEE80211_STYPE_RTSIEEE80211_STYPE_RTS 0x00B0 ieee80211.h 　
17542
 IEEE80211_STYPE_CTSIEEE80211_STYPE_CTS 0x00C0 ieee80211.h 　
17543
 IEEE80211_STYPE_ACKIEEE80211_STYPE_ACK 0x00D0 ieee80211.h 　
17544
 IEEE80211_STYPE_DATAIEEE80211_STYPE_DATA 0x0000 ieee80211.h 　
17545
 IEEE80211_STYPE_NODATAIEEE80211_STYPE_NODATA 0x0040 ieee80211.h 　
17546
 IEEE80211_FC_TODSIEEE80211_FC_TODS 0x0100 ieee80211.h 　
17547
 IEEE80211_FC_FROMDSIEEE80211_FC_FROMDS 0x0200 ieee80211.h 　
17548
 IEEE80211_FC_MORE_FRAGIEEE80211_FC_MORE_FRAG 0x0400 ieee80211.h 　
17549
 IEEE80211_FC_RETRYIEEE80211_FC_RETRY 0x0800 ieee80211.h 　
17550
 IEEE80211_FC_PWR_MGMTIEEE80211_FC_PWR_MGMT 0x1000 ieee80211.h 　
17551
 IEEE80211_FC_MORE_DATAIEEE80211_FC_MORE_DATA 0x2000 ieee80211.h 　
17552
 IEEE80211_FC_PROTECTEDIEEE80211_FC_PROTECTED 0x4000 ieee80211.h 　
17553
 IEEE80211_FC_ORDERIEEE80211_FC_ORDER 0x8000 ieee80211.h 　
17554
 IEEE80211_LLC_DSAPIEEE80211_LLC_DSAP 0xAA ieee80211.h 　
17555
 IEEE80211_LLC_SSAPIEEE80211_LLC_SSAP 0xAA ieee80211.h 　
17556
 IEEE80211_LLC_CTRLIEEE80211_LLC_CTRL 0x03 ieee80211.h 　
17557
 IEEE80211_RTS_LENIEEE80211_RTS_LEN 16 ieee80211.h 　
17558
 ieee80211_ctsieee80211_cts ieee80211_cts_or_ack ieee80211.h 　
17559
 ieee80211_ackieee80211_ack ieee80211_cts_or_ack ieee80211.h 　
17560
 IEEE80211_CTS_LENIEEE80211_CTS_LEN 10 ieee80211.h 　
17561
 IEEE80211_ACK_LENIEEE80211_ACK_LEN 10 ieee80211.h 　
17562
 IEEE80211_CAPAB_MANAGEDIEEE80211_CAPAB_MANAGED 0x0001 ieee80211.h 　
17563
 IEEE80211_CAPAB_ADHOCIEEE80211_CAPAB_ADHOC 0x0002 ieee80211.h 　
17564
 IEEE80211_CAPAB_CFPOLLIEEE80211_CAPAB_CFPOLL 0x0004 ieee80211.h 　
17565
 IEEE80211_CAPAB_CFPRIEEE80211_CAPAB_CFPR 0x0008 ieee80211.h 　
17566
 IEEE80211_CAPAB_PRIVACYIEEE80211_CAPAB_PRIVACY 0x0010 ieee80211.h 　
17567
 IEEE80211_CAPAB_SHORT_PMBLIEEE80211_CAPAB_SHORT_PMBL 0x0020 ieee80211.h 　
17568
 IEEE80211_CAPAB_PBCCIEEE80211_CAPAB_PBCC 0x0040 ieee80211.h 　
17569
 IEEE80211_CAPAB_CHAN_AGILITYIEEE80211_CAPAB_CHAN_AGILITY 0x0080 ieee80211.h 　
17570
 IEEE80211_CAPAB_SPECTRUM_MGMTIEEE80211_CAPAB_SPECTRUM_MGMT 0x0100 ieee80211.h 　
17571
 IEEE80211_CAPAB_QOSIEEE80211_CAPAB_QOS 0x0200 ieee80211.h 　
17572
 IEEE80211_CAPAB_SHORT_SLOTIEEE80211_CAPAB_SHORT_SLOT 0x0400 ieee80211.h 　
17573
 IEEE80211_CAPAB_APSDIEEE80211_CAPAB_APSD 0x0800 ieee80211.h 　
17574
 IEEE80211_CAPAB_DSSS_OFDMIEEE80211_CAPAB_DSSS_OFDM 0x2000 ieee80211.h 　
17575
 IEEE80211_CAPAB_DELAYED_BACKIEEE80211_CAPAB_DELAYED_BACK 0x4000 ieee80211.h 　
17576
 IEEE80211_CAPAB_IMMED_BACKIEEE80211_CAPAB_IMMED_BACK 0x8000 ieee80211.h 　
17577
 IEEE80211_STATUS_SUCCESSIEEE80211_STATUS_SUCCESS 0 ieee80211.h 　
17578
 IEEE80211_STATUS_FAILUREIEEE80211_STATUS_FAILURE 1 ieee80211.h 　
17579
 IEEE80211_STATUS_CAPAB_UNSUPPIEEE80211_STATUS_CAPAB_UNSUPP 10 ieee80211.h 　
17580
 IEEE80211_STATUS_REASSOC_INVALIIEEE80211_STATUS_REASSOC_INVALI 11 ieee80211.h 　
17581
 IEEE80211_STATUS_ASSOC_DENIEDIEEE80211_STATUS_ASSOC_DENIED 12 ieee80211.h 　
17582
 IEEE80211_STATUS_AUTH_ALGO_UNSUIEEE80211_STATUS_AUTH_ALGO_UNSU 13 ieee80211.h 　
17583
 IEEE80211_STATUS_AUTH_SEQ_INVALIEEE80211_STATUS_AUTH_SEQ_INVAL 14 ieee80211.h 　
17584
 IEEE80211_STATUS_AUTH_CHALL_INVIEEE80211_STATUS_AUTH_CHALL_INV 15 ieee80211.h 　
17585
 IEEE80211_STATUS_AUTH_TIMEOUTIEEE80211_STATUS_AUTH_TIMEOUT 16 ieee80211.h 　
17586
 IEEE80211_STATUS_ASSOC_NO_ROOMIEEE80211_STATUS_ASSOC_NO_ROOM 17 ieee80211.h 　
17587
 IEEE80211_STATUS_ASSOC_NEED_RATIEEE80211_STATUS_ASSOC_NEED_RAT 18 ieee80211.h 　
17588
 IEEE80211_STATUS_ASSOC_NEED_SHOIEEE80211_STATUS_ASSOC_NEED_SHO 19 ieee80211.h 　
17589
 IEEE80211_STATUS_ASSOC_NEED_PBCIEEE80211_STATUS_ASSOC_NEED_PBC 20 ieee80211.h 　
17590
 IEEE80211_STATUS_ASSOC_NEED_CHAIEEE80211_STATUS_ASSOC_NEED_CHA 21 ieee80211.h 　
17591
 IEEE80211_STATUS_ASSOC_NEED_SPEIEEE80211_STATUS_ASSOC_NEED_SPE 22 ieee80211.h 　
17592
 IEEE80211_STATUS_ASSOC_BAD_POWEIEEE80211_STATUS_ASSOC_BAD_POWE 23 ieee80211.h 　
17593
 IEEE80211_STATUS_ASSOC_BAD_CHANIEEE80211_STATUS_ASSOC_BAD_CHAN 24 ieee80211.h 　
17594
 IEEE80211_STATUS_ASSOC_NEED_SHOIEEE80211_STATUS_ASSOC_NEED_SHO 25 ieee80211.h 　
17595
 IEEE80211_STATUS_ASSOC_NEED_DSSIEEE80211_STATUS_ASSOC_NEED_DSS 26 ieee80211.h 　
17596
 IEEE80211_STATUS_QOS_FAILUREIEEE80211_STATUS_QOS_FAILURE 32 ieee80211.h 　
17597
 IEEE80211_STATUS_QOS_NO_ROOMIEEE80211_STATUS_QOS_NO_ROOM 33 ieee80211.h 　
17598
 IEEE80211_STATUS_LINK_IS_HORRIBIEEE80211_STATUS_LINK_IS_HORRIB 34 ieee80211.h 　
17599
 IEEE80211_STATUS_ASSOC_NEED_QOSIEEE80211_STATUS_ASSOC_NEED_QOS 35 ieee80211.h 　
17600
 IEEE80211_STATUS_REQUEST_DECLINIEEE80211_STATUS_REQUEST_DECLIN 37 ieee80211.h 　
17601
 IEEE80211_STATUS_REQUEST_INVALIIEEE80211_STATUS_REQUEST_INVALI 38 ieee80211.h 　
17602
 IEEE80211_STATUS_TS_NOT_CREATEDIEEE80211_STATUS_TS_NOT_CREATED 39 ieee80211.h 　
17603
 IEEE80211_STATUS_INVALID_IEIEEE80211_STATUS_INVALID_IE 40 ieee80211.h 　
17604
 IEEE80211_STATUS_GROUP_CIPHER_IIEEE80211_STATUS_GROUP_CIPHER_I 41 ieee80211.h 　
17605
 IEEE80211_STATUS_PAIR_CIPHER_INIEEE80211_STATUS_PAIR_CIPHER_IN 42 ieee80211.h 　
17606
 IEEE80211_STATUS_AKMP_INVALIDIEEE80211_STATUS_AKMP_INVALID 43 ieee80211.h 　
17607
 IEEE80211_STATUS_RSN_VERSION_UNIEEE80211_STATUS_RSN_VERSION_UN 44 ieee80211.h 　
17608
 IEEE80211_STATUS_RSN_CAPAB_INVAIEEE80211_STATUS_RSN_CAPAB_INVA 45 ieee80211.h 　
17609
 IEEE80211_STATUS_CIPHER_REJECTEIEEE80211_STATUS_CIPHER_REJECTE 46 ieee80211.h 　
17610
 IEEE80211_STATUS_TS_NOT_CREATEDIEEE80211_STATUS_TS_NOT_CREATED 47 ieee80211.h 　
17611
 IEEE80211_STATUS_DIRECT_LINK_FOIEEE80211_STATUS_DIRECT_LINK_FO 48 ieee80211.h 　
17612
 IEEE80211_STATUS_DEST_NOT_PRESEIEEE80211_STATUS_DEST_NOT_PRESE 49 ieee80211.h 　
17613
 IEEE80211_STATUS_DEST_NOT_QOSIEEE80211_STATUS_DEST_NOT_QOS 50 ieee80211.h 　
17614
 IEEE80211_STATUS_ASSOC_LISTEN_TIEEE80211_STATUS_ASSOC_LISTEN_T 51 ieee80211.h 　
17615
 IEEE80211_REASON_NONEIEEE80211_REASON_NONE 0 ieee80211.h 　
17616
 IEEE80211_REASON_UNSPECIFIEDIEEE80211_REASON_UNSPECIFIED 1 ieee80211.h 　
17617
 IEEE80211_REASON_AUTH_NO_LONGERIEEE80211_REASON_AUTH_NO_LONGER 2 ieee80211.h 　
17618
 IEEE80211_REASON_LEAVINGIEEE80211_REASON_LEAVING 3 ieee80211.h 　
17619
 IEEE80211_REASON_INACTIVITYIEEE80211_REASON_INACTIVITY 4 ieee80211.h 　
17620
 IEEE80211_REASON_OUT_OF_RESOURCIEEE80211_REASON_OUT_OF_RESOURC 5 ieee80211.h 　
17621
 IEEE80211_REASON_NEED_AUTHIEEE80211_REASON_NEED_AUTH 6 ieee80211.h 　
17622
 IEEE80211_REASON_NEED_ASSOCIEEE80211_REASON_NEED_ASSOC 7 ieee80211.h 　
17623
 IEEE80211_REASON_LEAVING_TO_ROAIEEE80211_REASON_LEAVING_TO_ROA 8 ieee80211.h 　
17624
 IEEE80211_REASON_REASSOC_INVALIIEEE80211_REASON_REASSOC_INVALI 9 ieee80211.h 　
17625
 IEEE80211_REASON_BAD_POWERIEEE80211_REASON_BAD_POWER 10 ieee80211.h 　
17626
 IEEE80211_REASON_BAD_CHANNELSIEEE80211_REASON_BAD_CHANNELS 11 ieee80211.h 　
17627
 IEEE80211_REASON_INVALID_IEIEEE80211_REASON_INVALID_IE 13 ieee80211.h 　
17628
 IEEE80211_REASON_MIC_FAILUREIEEE80211_REASON_MIC_FAILURE 14 ieee80211.h 　
17629
 IEEE80211_REASON_4WAY_TIMEOUTIEEE80211_REASON_4WAY_TIMEOUT 15 ieee80211.h 　
17630
 IEEE80211_REASON_GROUPKEY_TIMEOIEEE80211_REASON_GROUPKEY_TIMEO 16 ieee80211.h 　
17631
 IEEE80211_REASON_4WAY_INVALIDIEEE80211_REASON_4WAY_INVALID 17 ieee80211.h 　
17632
 IEEE80211_REASON_GROUP_CIPHER_IIEEE80211_REASON_GROUP_CIPHER_I 18 ieee80211.h 　
17633
 IEEE80211_REASON_PAIR_CIPHER_INIEEE80211_REASON_PAIR_CIPHER_IN 19 ieee80211.h 　
17634
 IEEE80211_REASON_AKMP_INVALIDIEEE80211_REASON_AKMP_INVALID 20 ieee80211.h 　
17635
 IEEE80211_REASON_RSN_VERSION_INIEEE80211_REASON_RSN_VERSION_IN 21 ieee80211.h 　
17636
 IEEE80211_REASON_RSN_CAPAB_INVAIEEE80211_REASON_RSN_CAPAB_INVA 22 ieee80211.h 　
17637
 IEEE80211_REASON_8021X_FAILUREIEEE80211_REASON_8021X_FAILURE 23 ieee80211.h 　
17638
 IEEE80211_REASON_CIPHER_REJECTEIEEE80211_REASON_CIPHER_REJECTE 24 ieee80211.h 　
17639
 IEEE80211_REASON_QOS_UNSPECIFIEIEEE80211_REASON_QOS_UNSPECIFIE 32 ieee80211.h 　
17640
 IEEE80211_REASON_QOS_OUT_OF_RESIEEE80211_REASON_QOS_OUT_OF_RES 33 ieee80211.h 　
17641
 IEEE80211_REASON_LINK_IS_HORRIBIEEE80211_REASON_LINK_IS_HORRIB 34 ieee80211.h 　
17642
 IEEE80211_REASON_INVALID_TXOPIEEE80211_REASON_INVALID_TXOP 35 ieee80211.h 　
17643
 IEEE80211_REASON_REQUESTED_LEAVIEEE80211_REASON_REQUESTED_LEAV 36 ieee80211.h 　
17644
 IEEE80211_REASON_REQUESTED_NO_UIEEE80211_REASON_REQUESTED_NO_U 37 ieee80211.h 　
17645
 IEEE80211_REASON_REQUESTED_NEEDIEEE80211_REASON_REQUESTED_NEED 38 ieee80211.h 　
17646
 IEEE80211_REASON_REQUESTED_TIMEIEEE80211_REASON_REQUESTED_TIME 39 ieee80211.h 　
17647
 IEEE80211_REASON_CIPHER_UNSUPPOIEEE80211_REASON_CIPHER_UNSUPPO 45 ieee80211.h 　
17648
 IEEE80211_IE_SSIDIEEE80211_IE_SSID 0 ieee80211.h 　
17649
 IEEE80211_IE_RATESIEEE80211_IE_RATES 1 ieee80211.h 　
17650
 IEEE80211_IE_EXT_RATESIEEE80211_IE_EXT_RATES 50 ieee80211.h 　
17651
 IEEE80211_IE_DS_PARAMIEEE80211_IE_DS_PARAM 3 ieee80211.h 　
17652
 IEEE80211_IE_COUNTRYIEEE80211_IE_COUNTRY 7 ieee80211.h 　
17653
 IEEE80211_IE_REQUESTIEEE80211_IE_REQUEST 10 ieee80211.h 　
17654
 IEEE80211_IE_CHALLENGE_TEXTIEEE80211_IE_CHALLENGE_TEXT 16 ieee80211.h 　
17655
 IEEE80211_IE_POWER_CONSTRAINTIEEE80211_IE_POWER_CONSTRAINT 52 ieee80211.h 　
17656
 IEEE80211_IE_POWER_CAPABIEEE80211_IE_POWER_CAPAB 33 ieee80211.h 　
17657
 IEEE80211_IE_CHANNELSIEEE80211_IE_CHANNELS 36 ieee80211.h 　
17658
 IEEE80211_IE_ERP_INFOIEEE80211_IE_ERP_INFO 42 ieee80211.h 　
17659
 IEEE80211_ERP_NONERP_PRESENTIEEE80211_ERP_NONERP_PRESENT 0x01 ieee80211.h 　
17660
 IEEE80211_ERP_USE_PROTECTIONIEEE80211_ERP_USE_PROTECTION 0x02 ieee80211.h 　
17661
 IEEE80211_ERP_BARKER_LONGIEEE80211_ERP_BARKER_LONG 0x04 ieee80211.h 　
17662
 IEEE80211_IE_RSNIEEE80211_IE_RSN 48 ieee80211.h 　
17663
 IEEE80211_RSN_OUIIEEE80211_RSN_OUI "\x00\x0F\xAC" ieee80211.h 　
17664
 IEEE80211_RSN_VERSIONIEEE80211_RSN_VERSION 1 ieee80211.h 　
17665
 IEEE80211_RSN_CTYPE_WEP40IEEE80211_RSN_CTYPE_WEP40 1 ieee80211.h 　
17666
 IEEE80211_RSN_CTYPE_WEP104IEEE80211_RSN_CTYPE_WEP104 5 ieee80211.h 　
17667
 IEEE80211_RSN_CTYPE_TKIPIEEE80211_RSN_CTYPE_TKIP 2 ieee80211.h 　
17668
 IEEE80211_RSN_CTYPE_CCMPIEEE80211_RSN_CTYPE_CCMP 4 ieee80211.h 　
17669
 IEEE80211_RSN_CTYPE_USEGROUPIEEE80211_RSN_CTYPE_USEGROUP 0 ieee80211.h 　
17670
 IEEE80211_RSN_ATYPE_8021XIEEE80211_RSN_ATYPE_8021X 1 ieee80211.h 　
17671
 IEEE80211_RSN_ATYPE_PSKIEEE80211_RSN_ATYPE_PSK 2 ieee80211.h 　
17672
 IEEE80211_RSN_CAPAB_PREAUTHIEEE80211_RSN_CAPAB_PREAUTH 0x001 ieee80211.h 　
17673
 IEEE80211_RSN_CAPAB_NO_PAIRWISEIEEE80211_RSN_CAPAB_NO_PAIRWISE 0x002 ieee80211.h 　
17674
 IEEE80211_RSN_CAPAB_PTKSA_REPLAIEEE80211_RSN_CAPAB_PTKSA_REPLA 0x00C ieee80211.h 　
17675
 IEEE80211_RSN_CAPAB_GTKSA_REPLAIEEE80211_RSN_CAPAB_GTKSA_REPLA 0x030 ieee80211.h 　
17676
 IEEE80211_RSN_CAPAB_PEERKEYIEEE80211_RSN_CAPAB_PEERKEY 0x200 ieee80211.h 　
17677
 ieee80211_beaconieee80211_beacon ieee80211_beacon_or_probe_resp ieee80211.h 　
17678
 ieee80211_probe_respieee80211_probe_resp ieee80211_beacon_or_probe_resp ieee80211.h 　
17679
 ieee80211_disassocieee80211_disassoc ieee80211_disassoc_or_deauth ieee80211.h 　
17680
 ieee80211_deauthieee80211_deauth ieee80211_disassoc_or_deauth ieee80211.h 　
17681
 ieee80211_assoc_respieee80211_assoc_resp ieee80211_assoc_or_reassoc_resp ieee80211.h 　
17682
 ieee80211_reassoc_respieee80211_reassoc_resp ieee80211_assoc_or_reassoc_resp ieee80211.h 　
17683
 IEEE80211_AUTH_OPEN_SYSTEMIEEE80211_AUTH_OPEN_SYSTEM 0 ieee80211.h 　
17684
 IEEE80211_AUTH_SHARED_KEYIEEE80211_AUTH_SHARED_KEY 1 ieee80211.h 　
17685
 ARPHRD_NETROMARPHRD_NETROM 0 if_arp.h *< from KA9Q: NET/ROM pseudo
17686
 ARPHRD_ETHERARPHRD_ETHER 1 if_arp.h *< Ethernet 10Mbps
17687
 ARPHRD_EETHERARPHRD_EETHER 2 if_arp.h *< Experimental Ethernet
17688
 ARPHRD_AX25ARPHRD_AX25 3 if_arp.h *< AX.25 Level 2
17689
 ARPHRD_PRONETARPHRD_PRONET 4 if_arp.h *< PROnet token ring
17690
 ARPHRD_CHAOSARPHRD_CHAOS 5 if_arp.h *< Chaosnet
17691
 ARPHRD_IEEE802ARPHRD_IEEE802 6 if_arp.h *< IEEE 802.2 Ethernet/TR/TB
17692
 ARPHRD_ARCNETARPHRD_ARCNET 7 if_arp.h *< ARCnet
17693
 ARPHRD_APPLETLKARPHRD_APPLETLK 8 if_arp.h *< APPLEtalk
17694
 ARPHRD_DLCIARPHRD_DLCI 15 if_arp.h *< Frame Relay DLCI
17695
 ARPHRD_ATMARPHRD_ATM 19 if_arp.h *< ATM
17696
 ARPHRD_METRICOMARPHRD_METRICOM 23 if_arp.h *< Metricom STRIP (new IANA id)
17697
 ARPHRD_IEEE1394ARPHRD_IEEE1394 24 if_arp.h *< IEEE 1394 IPv4 - RFC 2734
17698
 ARPHRD_EUI64ARPHRD_EUI64 27 if_arp.h *< EUI-64
17699
 ARPHRD_INFINIBANDARPHRD_INFINIBAND 32 if_arp.h *< InfiniBand
17700
 ARPOP_REQUESTARPOP_REQUEST 1 if_arp.h *< ARP request
17701
 ARPOP_REPLYARPOP_REPLY 2 if_arp.h *< ARP reply
17702
 ARPOP_RREQUESTARPOP_RREQUEST 3 if_arp.h *< RARP request
17703
 ARPOP_RREPLYARPOP_RREPLY 4 if_arp.h *< RARP reply
17704
 ARPOP_InREQUESTARPOP_InREQUEST 8 if_arp.h *< InARP request
17705
 ARPOP_InREPLYARPOP_InREPLY 9 if_arp.h *< InARP reply
17706
 ARPOP_NAKARPOP_NAK 10 if_arp.h *< (ATM)ARP NAK
17707
 ETH_ALENETH_ALEN 6 if_ether.h Size of Ethernet address
17708
 ETH_HLENETH_HLEN 14 if_ether.h Size of ethernet header
17709
 ETH_ZLENETH_ZLEN 60 if_ether.h Minimum packet
17710
 ETH_FRAME_LENETH_FRAME_LEN 1514 if_ether.h Maximum packet
17711
 ETH_DATA_ALIGNETH_DATA_ALIGN 2 if_ether.h Amount needed to align the data after an ethernet header
17712
 ETH_MAX_MTUETH_MAX_MTU (ETH_FRAME_LEN-ETH_HLEN) if_ether.h 　
17713
 ETH_P_RAWETH_P_RAW 0x0000 if_ether.h Raw packet
17714
 ETH_P_IPETH_P_IP 0x0800 if_ether.h Internet Protocl Packet
17715
 ETH_P_ARPETH_P_ARP 0x0806 if_ether.h Address Resolution Protocol
17716
 ETH_P_RARPETH_P_RARP 0x8035 if_ether.h Reverse Address resolution Protocol
17717
 ETH_P_IPV6ETH_P_IPV6 0x86DD if_ether.h IPv6 over blueblook
17718
 ETH_P_SLOWETH_P_SLOW 0x8809 if_ether.h Ethernet slow protocols
17719
 ETH_P_AOEETH_P_AOE 0x88A2 if_ether.h ATA over Ethernet
17720
 IMAGE_LOADEDIMAGE_LOADED 0x0001 image.h 　
17721
 PROBE_MULTIBOOTPROBE_MULTIBOOT 01 image.h 　
17722
 PROBE_NORMALPROBE_NORMAL 02 image.h 　
17723
 PROBE_PXEPROBE_PXE 03 image.h 　
17724
 IMAGE_TYPESIMAGE_TYPES __table ( struct image_type, "image_types" ) image.h 　
17725
 IP_ICMPIP_ICMP 1 in.h 　
17726
 IP_IGMPIP_IGMP 2 in.h 　
17727
 IP_TCPIP_TCP 6 in.h 　
17728
 IP_UDPIP_UDP 17 in.h 　
17729
 IP_ICMP6IP_ICMP6 58 in.h 　
17730
 INADDR_NONEINADDR_NONE 0xffffffff in.h 　
17731
 INADDR_BROADCASTINADDR_BROADCAST 0xffffffff in.h 　
17732
 IN_CLASSA_NETIN_CLASSA_NET 0xff000000 in.h 　
17733
 IN_CLASSB_NETIN_CLASSB_NET 0xffff0000 in.h 　
17734
 IN_CLASSC_NETIN_CLASSC_NET 0xffffff00 in.h 　
17735
 IB_QPN_SMIIB_QPN_SMI 0 infiniband.h 　
17736
 IB_QKEY_SMIIB_QKEY_SMI 0 infiniband.h 　
17737
 IB_QPN_GSIIB_QPN_GSI 1 infiniband.h 　
17738
 IB_QKEY_GSIIB_QKEY_GSI 0x80010000UL infiniband.h 　
17739
 IB_QPN_BROADCASTIB_QPN_BROADCAST 0xffffffUL infiniband.h 　
17740
 IB_PKEY_NONEIB_PKEY_NONE 0xffff infiniband.h 　
17741
 IB_MAX_PAYLOAD_SIZEIB_MAX_PAYLOAD_SIZE 2048 infiniband.h 　
17742
 INIT_FNSINIT_FNS __table ( struct init_fn, "init_fns" ) init.h 　
17743
 INIT_EARLYINIT_EARLY 01 init.h *< Early initialisation
17744
 INIT_SERIALINIT_SERIAL 02 init.h *< Serial driver initialisation
17745
 INIT_CONSOLEINIT_CONSOLE 03 init.h *< Console initialisation
17746
 INIT_NORMALINIT_NORMAL 04 init.h *< Normal initialisation
17747
 STARTUP_FNSSTARTUP_FNS __table ( struct startup_fn, "startup_fns" ) init.h 　
17748
 STARTUP_EARLYSTARTUP_EARLY 01 init.h *< Early startup
17749
 STARTUP_NORMALSTARTUP_NORMAL 02 init.h *< Normal startup
17750
 STARTUP_LATESTARTUP_LATE 03 init.h *< Late startup
17751
 IOB_ALIGNIOB_ALIGN 2048 iobuf.h 　
17752
 IOB_ZLENIOB_ZLEN 64 iobuf.h 　
17753
 IP_VERIP_VER 0x40U ip.h 　
17754
 IP_MASK_VERIP_MASK_VER 0xf0U ip.h 　
17755
 IP_MASK_HLENIP_MASK_HLEN 0x0fU ip.h 　
17756
 IP_MASK_OFFSETIP_MASK_OFFSET 0x1fffU ip.h 　
17757
 IP_MASK_DONOTFRAGIP_MASK_DONOTFRAG 0x4000U ip.h 　
17758
 IP_MASK_MOREFRAGSIP_MASK_MOREFRAGS 0x2000U ip.h 　
17759
 IP_PSHLENIP_PSHLEN 12 ip.h 　
17760
 IP_TOSIP_TOS 0 ip.h 　
17761
 IP_TTLIP_TTL 64 ip.h 　
17762
 IP_FRAG_IOB_SIZEIP_FRAG_IOB_SIZE 1500 ip.h 　
17763
 IP_FRAG_TIMEOUTIP_FRAG_TIMEOUT 50 ip.h 　
17764
 IP6_VERSIONIP6_VERSION 0x6 ip6.h 　
17765
 IP6_HOP_LIMITIP6_HOP_LIMIT 255 ip6.h 　
17766
 MAX_HDR_LENMAX_HDR_LEN 100 ip6.h 　
17767
 MAX_IOB_LENMAX_IOB_LEN 1500 ip6.h 　
17768
 MIN_IOB_LENMIN_IOB_LEN MAX_HDR_LEN + 100 ip6.h To account for padding by LL
17769
 IP6_HOPBYHOPIP6_HOPBYHOP 0x00 ip6.h 　
17770
 IP6_ROUTINGIP6_ROUTING 0x43 ip6.h 　
17771
 IP6_FRAGMENTIP6_FRAGMENT 0x44 ip6.h 　
17772
 IP6_AUTHENTICATIONIP6_AUTHENTICATION 0x51 ip6.h 　
17773
 IP6_DEST_OPTSIP6_DEST_OPTS 0x60 ip6.h 　
17774
 IP6_ESPIP6_ESP 0x50 ip6.h 　
17775
 IP6_ICMP6IP6_ICMP6 0x58 ip6.h 　
17776
 IP6_NO_HEADERIP6_NO_HEADER 0x59 ip6.h 　
17777
 IPOIB_ALENIPOIB_ALEN 20 ipoib.h 　
17778
 IPOIB_HLENIPOIB_HLEN 4 ipoib.h 　
17779
 ISA_DRIVERSISA_DRIVERS __table ( struct isa_driver, "isa_drivers" ) isa.h 　
17780
 __isa_driver__isa_driver __table_entry ( ISA_DRIVERS, 01 ) isa.h 　
17781
 ISAPNP_ADDRESSISAPNP_ADDRESS 0x279 isapnp.h 　
17782
 ISAPNP_WRITE_DATAISAPNP_WRITE_DATA 0xa79 isapnp.h 　
17783
 ISAPNP_READ_PORT_MINISAPNP_READ_PORT_MIN 0x203 isapnp.h 　
17784
 ISAPNP_READ_PORT_STARTISAPNP_READ_PORT_START 0x213 isapnp.h ISAPnP spec says 0x203, but
17785
 ISAPNP_READ_PORT_MAXISAPNP_READ_PORT_MAX 0x3ff isapnp.h 　
17786
 ISAPNP_READ_PORT_STEPISAPNP_READ_PORT_STEP 0x10 isapnp.h Can be any multiple of 4
17787
 ISAPNP_CSN_MINISAPNP_CSN_MIN 0x01 isapnp.h 　
17788
 ISAPNP_CSN_MAXISAPNP_CSN_MAX 0x0f isapnp.h 　
17789
 ISAPNP_READPORTISAPNP_READPORT 0x00 isapnp.h 　
17790
 ISAPNP_SERIALISOLATIONISAPNP_SERIALISOLATION 0x01 isapnp.h 　
17791
 ISAPNP_CONFIGCONTROLISAPNP_CONFIGCONTROL 0x02 isapnp.h 　
17792
 ISAPNP_WAKEISAPNP_WAKE 0x03 isapnp.h 　
17793
 ISAPNP_RESOURCEDATAISAPNP_RESOURCEDATA 0x04 isapnp.h 　
17794
 ISAPNP_STATUSISAPNP_STATUS 0x05 isapnp.h 　
17795
 ISAPNP_CARDSELECTNUMBERISAPNP_CARDSELECTNUMBER 0x06 isapnp.h 　
17796
 ISAPNP_LOGICALDEVICENUMBERISAPNP_LOGICALDEVICENUMBER 0x07 isapnp.h 　
17797
 ISAPNP_ACTIVATEISAPNP_ACTIVATE 0x30 isapnp.h 　
17798
 ISAPNP_IORANGECHECKISAPNP_IORANGECHECK 0x31 isapnp.h 　
17799
 ISAPNP_CONFIG_RESETISAPNP_CONFIG_RESET ( 1 << 0 ) isapnp.h 　
17800
 ISAPNP_CONFIG_WAIT_FOR_KEYISAPNP_CONFIG_WAIT_FOR_KEY ( 1 << 1 ) isapnp.h 　
17801
 ISAPNP_CONFIG_RESET_CSNISAPNP_CONFIG_RESET_CSN ( 1 << 2 ) isapnp.h 　
17802
 ISAPNP_CONFIG_RESET_DRVISAPNP_CONFIG_RESET_DRV ( ISAPNP_CONFIG_RESET | \ ISAPNP_CONFIG_WAIT_FOR_KEY | \ ISAPNP_CONFIG_RESET_CSN ) isapnp.h 　
17803
 ISAPNP_LFSR_SEEDISAPNP_LFSR_SEED 0x6a isapnp.h 　
17804
 ISAPNP_TAG_PNPVERNOISAPNP_TAG_PNPVERNO 0x01 isapnp.h 　
17805
 ISAPNP_TAG_LOGDEVIDISAPNP_TAG_LOGDEVID 0x02 isapnp.h 　
17806
 ISAPNP_TAG_COMPATDEVIDISAPNP_TAG_COMPATDEVID 0x03 isapnp.h 　
17807
 ISAPNP_TAG_IRQISAPNP_TAG_IRQ 0x04 isapnp.h 　
17808
 ISAPNP_TAG_DMAISAPNP_TAG_DMA 0x05 isapnp.h 　
17809
 ISAPNP_TAG_STARTDEPISAPNP_TAG_STARTDEP 0x06 isapnp.h 　
17810
 ISAPNP_TAG_ENDDEPISAPNP_TAG_ENDDEP 0x07 isapnp.h 　
17811
 ISAPNP_TAG_IOPORTISAPNP_TAG_IOPORT 0x08 isapnp.h 　
17812
 ISAPNP_TAG_FIXEDIOISAPNP_TAG_FIXEDIO 0x09 isapnp.h 　
17813
 ISAPNP_TAG_RSVDSHORTAISAPNP_TAG_RSVDSHORTA 0x0A isapnp.h 　
17814
 ISAPNP_TAG_RSVDSHORTBISAPNP_TAG_RSVDSHORTB 0x0B isapnp.h 　
17815
 ISAPNP_TAG_RSVDSHORTCISAPNP_TAG_RSVDSHORTC 0x0C isapnp.h 　
17816
 ISAPNP_TAG_RSVDSHORTDISAPNP_TAG_RSVDSHORTD 0x0D isapnp.h 　
17817
 ISAPNP_TAG_VENDORSHORTISAPNP_TAG_VENDORSHORT 0x0E isapnp.h 　
17818
 ISAPNP_TAG_ENDISAPNP_TAG_END 0x0F isapnp.h 　
17819
 ISAPNP_TAG_MEMRANGEISAPNP_TAG_MEMRANGE 0x81 isapnp.h 　
17820
 ISAPNP_TAG_ANSISTRISAPNP_TAG_ANSISTR 0x82 isapnp.h 　
17821
 ISAPNP_TAG_UNICODESTRISAPNP_TAG_UNICODESTR 0x83 isapnp.h 　
17822
 ISAPNP_TAG_VENDORLONGISAPNP_TAG_VENDORLONG 0x84 isapnp.h 　
17823
 ISAPNP_TAG_MEM32RANGEISAPNP_TAG_MEM32RANGE 0x85 isapnp.h 　
17824
 ISAPNP_TAG_FIXEDMEM32RANGEISAPNP_TAG_FIXEDMEM32RANGE 0x86 isapnp.h 　
17825
 ISAPNP_TAG_RSVDLONG0ISAPNP_TAG_RSVDLONG0 0xF0 isapnp.h 　
17826
 ISAPNP_TAG_RSVDLONG1ISAPNP_TAG_RSVDLONG1 0xF1 isapnp.h 　
17827
 ISAPNP_TAG_RSVDLONG2ISAPNP_TAG_RSVDLONG2 0xF2 isapnp.h 　
17828
 ISAPNP_TAG_RSVDLONG3ISAPNP_TAG_RSVDLONG3 0xF3 isapnp.h 　
17829
 ISAPNP_TAG_RSVDLONG4ISAPNP_TAG_RSVDLONG4 0xF4 isapnp.h 　
17830
 ISAPNP_TAG_RSVDLONG5ISAPNP_TAG_RSVDLONG5 0xF5 isapnp.h 　
17831
 ISAPNP_TAG_RSVDLONG6ISAPNP_TAG_RSVDLONG6 0xF6 isapnp.h 　
17832
 ISAPNP_TAG_RSVDLONG7ISAPNP_TAG_RSVDLONG7 0xF7 isapnp.h 　
17833
 ISAPNP_TAG_RSVDLONG8ISAPNP_TAG_RSVDLONG8 0xF8 isapnp.h 　
17834
 ISAPNP_TAG_RSVDLONG9ISAPNP_TAG_RSVDLONG9 0xF9 isapnp.h 　
17835
 ISAPNP_TAG_RSVDLONGAISAPNP_TAG_RSVDLONGA 0xFA isapnp.h 　
17836
 ISAPNP_TAG_RSVDLONGBISAPNP_TAG_RSVDLONGB 0xFB isapnp.h 　
17837
 ISAPNP_TAG_RSVDLONGCISAPNP_TAG_RSVDLONGC 0xFC isapnp.h 　
17838
 ISAPNP_TAG_RSVDLONGDISAPNP_TAG_RSVDLONGD 0xFD isapnp.h 　
17839
 ISAPNP_TAG_RSVDLONGEISAPNP_TAG_RSVDLONGE 0xFE isapnp.h 　
17840
 ISAPNP_TAG_RSVDLONGFISAPNP_TAG_RSVDLONGF 0xFF isapnp.h 　
17841
 ISAPNP_TAG_PSEUDO_NEWBOARDISAPNP_TAG_PSEUDO_NEWBOARD 0x100 isapnp.h 　
17842
 ISAPNP_DRIVERSISAPNP_DRIVERS __table ( struct isapnp_driver, "isapnp_drivers" ) isapnp.h 　
17843
 __isapnp_driver__isapnp_driver __table_entry ( ISAPNP_DRIVERS, 01 ) isapnp.h 　
17844
 GENERIC_ISAPNP_VENDORGENERIC_ISAPNP_VENDOR ISAPNP_VENDOR ( 'P','N','P' ) isa_ids.h 　
17845
 ISA_PROD_ID_MASKISA_PROD_ID_MASK ( 0xf0ff ) isa_ids.h 　
17846
 ISCSI_PORTISCSI_PORT 3260 iscsi.h 　
17847
 ISCSI_OPCODE_MASKISCSI_OPCODE_MASK 0x3f iscsi.h 　
17848
 ISCSI_FLAG_IMMEDIATEISCSI_FLAG_IMMEDIATE 0x40 iscsi.h 　
17849
 ISCSI_FLAG_FINALISCSI_FLAG_FINAL 0x80 iscsi.h 　
17850
 ISCSI_OPCODE_LOGIN_REQUESTISCSI_OPCODE_LOGIN_REQUEST 0x03 iscsi.h 　
17851
 ISCSI_LOGIN_FLAG_TRANSITIONISCSI_LOGIN_FLAG_TRANSITION 0x80 iscsi.h 　
17852
 ISCSI_LOGIN_FLAG_CONTINUEISCSI_LOGIN_FLAG_CONTINUE 0x40 iscsi.h 　
17853
 ISCSI_LOGIN_CSG_MASKISCSI_LOGIN_CSG_MASK 0x0c iscsi.h 　
17854
 ISCSI_LOGIN_CSG_SECURITY_NEGOTIISCSI_LOGIN_CSG_SECURITY_NEGOTI 0x00 iscsi.h 　
17855
 ISCSI_LOGIN_CSG_OPERATIONAL_NEGISCSI_LOGIN_CSG_OPERATIONAL_NEG 0x04 iscsi.h 　
17856
 ISCSI_LOGIN_CSG_FULL_FEATURE_PHISCSI_LOGIN_CSG_FULL_FEATURE_PH 0x0c iscsi.h 　
17857
 ISCSI_LOGIN_NSG_MASKISCSI_LOGIN_NSG_MASK 0x03 iscsi.h 　
17858
 ISCSI_LOGIN_NSG_SECURITY_NEGOTIISCSI_LOGIN_NSG_SECURITY_NEGOTI 0x00 iscsi.h 　
17859
 ISCSI_LOGIN_NSG_OPERATIONAL_NEGISCSI_LOGIN_NSG_OPERATIONAL_NEG 0x01 iscsi.h 　
17860
 ISCSI_LOGIN_NSG_FULL_FEATURE_PHISCSI_LOGIN_NSG_FULL_FEATURE_PH 0x03 iscsi.h 　
17861
 ISCSI_ISID_IANAISCSI_ISID_IANA 0x40000000 iscsi.h 　
17862
 IANA_EN_FEN_SYSTEMSIANA_EN_FEN_SYSTEMS 10019 iscsi.h 　
17863
 ISCSI_OPCODE_LOGIN_RESPONSEISCSI_OPCODE_LOGIN_RESPONSE 0x23 iscsi.h 　
17864
 ISCSI_STATUS_SUCCESSISCSI_STATUS_SUCCESS 0x00 iscsi.h 　
17865
 ISCSI_STATUS_REDIRECTISCSI_STATUS_REDIRECT 0x01 iscsi.h 　
17866
 ISCSI_STATUS_INITIATOR_ERRORISCSI_STATUS_INITIATOR_ERROR 0x02 iscsi.h 　
17867
 ISCSI_STATUS_INITIATOR_ERROR_AUISCSI_STATUS_INITIATOR_ERROR_AU 0x01 iscsi.h 　
17868
 ISCSI_STATUS_INITIATOR_ERROR_AUISCSI_STATUS_INITIATOR_ERROR_AU 0x02 iscsi.h 　
17869
 ISCSI_STATUS_INITIATOR_ERROR_NOISCSI_STATUS_INITIATOR_ERROR_NO 0x03 iscsi.h 　
17870
 ISCSI_STATUS_INITIATOR_ERROR_REISCSI_STATUS_INITIATOR_ERROR_RE 0x04 iscsi.h 　
17871
 ISCSI_STATUS_TARGET_ERRORISCSI_STATUS_TARGET_ERROR 0x03 iscsi.h 　
17872
 ISCSI_OPCODE_SCSI_COMMANDISCSI_OPCODE_SCSI_COMMAND 0x01 iscsi.h 　
17873
 ISCSI_COMMAND_FLAG_READISCSI_COMMAND_FLAG_READ 0x40 iscsi.h 　
17874
 ISCSI_COMMAND_FLAG_WRITEISCSI_COMMAND_FLAG_WRITE 0x20 iscsi.h 　
17875
 ISCSI_COMMAND_ATTR_UNTAGGEDISCSI_COMMAND_ATTR_UNTAGGED 0x00 iscsi.h 　
17876
 ISCSI_COMMAND_ATTR_SIMPLEISCSI_COMMAND_ATTR_SIMPLE 0x01 iscsi.h 　
17877
 ISCSI_COMMAND_ATTR_ORDEREDISCSI_COMMAND_ATTR_ORDERED 0x02 iscsi.h 　
17878
 ISCSI_COMMAND_ATTR_HEAD_OF_QUEUISCSI_COMMAND_ATTR_HEAD_OF_QUEU 0x03 iscsi.h 　
17879
 ISCSI_COMMAND_ATTR_ACAISCSI_COMMAND_ATTR_ACA 0x04 iscsi.h 　
17880
 ISCSI_OPCODE_SCSI_RESPONSEISCSI_OPCODE_SCSI_RESPONSE 0x21 iscsi.h 　
17881
 ISCSI_RESPONSE_COMMAND_COMPLETEISCSI_RESPONSE_COMMAND_COMPLETE 0x00 iscsi.h 　
17882
 ISCSI_RESPONSE_TARGET_FAILUREISCSI_RESPONSE_TARGET_FAILURE 0x01 iscsi.h 　
17883
 ISCSI_SENSE_RESPONSE_CODE_OFFSEISCSI_SENSE_RESPONSE_CODE_OFFSE 2 iscsi.h 　
17884
 ISCSI_OPCODE_DATA_INISCSI_OPCODE_DATA_IN 0x25 iscsi.h 　
17885
 ISCSI_DATA_FLAG_ACKNOWLEDGEISCSI_DATA_FLAG_ACKNOWLEDGE 0x40 iscsi.h 　
17886
 ISCSI_DATA_FLAG_OVERFLOWISCSI_DATA_FLAG_OVERFLOW 0x04 iscsi.h 　
17887
 ISCSI_DATA_FLAG_UNDERFLOWISCSI_DATA_FLAG_UNDERFLOW 0x02 iscsi.h 　
17888
 ISCSI_DATA_FLAG_STATUSISCSI_DATA_FLAG_STATUS 0x01 iscsi.h 　
17889
 ISCSI_OPCODE_DATA_OUTISCSI_OPCODE_DATA_OUT 0x05 iscsi.h 　
17890
 ISCSI_OPCODE_R2TISCSI_OPCODE_R2T 0x31 iscsi.h 　
17891
 ISCSI_STATUS_SECURITY_NEGOTIATIISCSI_STATUS_SECURITY_NEGOTIATI ( ISCSI_LOGIN_CSG_SECURITY_NEGOTIATION | \ ISCSI_LOGIN_NSG_OPERATIONAL_NEGOTIATION ) iscsi.h 　
17892
 ISCSI_STATUS_OPERATIONAL_NEGOTIISCSI_STATUS_OPERATIONAL_NEGOTI ( ISCSI_LOGIN_CSG_OPERATIONAL_NEGOTIATION | \ ISCSI_LOGIN_NSG_FULL_FEATURE_PHASE ) iscsi.h 　
17893
 ISCSI_STATUS_FULL_FEATURE_PHASEISCSI_STATUS_FULL_FEATURE_PHASE ISCSI_LOGIN_CSG_FULL_FEATURE_PHASE iscsi.h 　
17894
 ISCSI_STATUS_PHASE_MASKISCSI_STATUS_PHASE_MASK ( ISCSI_LOGIN_CSG_MASK | ISCSI_LOGIN_NSG_MASK ) iscsi.h 　
17895
 ISCSI_STATUS_STRINGS_SECURITYISCSI_STATUS_STRINGS_SECURITY 0x0100 iscsi.h 　
17896
 ISCSI_STATUS_STRINGS_CHAP_ALGORISCSI_STATUS_STRINGS_CHAP_ALGOR 0x0200 iscsi.h 　
17897
 ISCSI_STATUS_STRINGS_CHAP_RESPOISCSI_STATUS_STRINGS_CHAP_RESPO 0x0400 iscsi.h 　
17898
 ISCSI_STATUS_STRINGS_CHAP_CHALLISCSI_STATUS_STRINGS_CHAP_CHALL 0x0800 iscsi.h 　
17899
 ISCSI_STATUS_STRINGS_OPERATIONAISCSI_STATUS_STRINGS_OPERATIONA 0x1000 iscsi.h 　
17900
 ISCSI_STATUS_STRINGS_MASKISCSI_STATUS_STRINGS_MASK 0xff00 iscsi.h 　
17901
 ISCSI_STATUS_AUTH_FORWARD_REQUIISCSI_STATUS_AUTH_FORWARD_REQUI 0x00010000 iscsi.h 　
17902
 ISCSI_STATUS_AUTH_REVERSE_REQUIISCSI_STATUS_AUTH_REVERSE_REQUI 0x00020000 iscsi.h 　
17903
 ISCSI_STATUS_AUTH_REVERSE_OKISCSI_STATUS_AUTH_REVERSE_OK 0x00040000 iscsi.h 　
17904
 ISCSI_MAX_RETRIESISCSI_MAX_RETRIES 2 iscsi.h 　
17905
 NULNUL 0x00 keys.h 　
17906
 CTRL_ACTRL_A 0x01 keys.h 　
17907
 CTRL_BCTRL_B 0x02 keys.h 　
17908
 CTRL_CCTRL_C 0x03 keys.h 　
17909
 CTRL_DCTRL_D 0x04 keys.h 　
17910
 CTRL_ECTRL_E 0x05 keys.h 　
17911
 CTRL_FCTRL_F 0x06 keys.h 　
17912
 CTRL_GCTRL_G 0x07 keys.h 　
17913
 CTRL_HCTRL_H 0x08 keys.h 　
17914
 CTRL_ICTRL_I 0x09 keys.h 　
17915
 CTRL_JCTRL_J 0x0a keys.h 　
17916
 CTRL_KCTRL_K 0x0b keys.h 　
17917
 CTRL_LCTRL_L 0x0c keys.h 　
17918
 CTRL_MCTRL_M 0x0d keys.h 　
17919
 CTRL_NCTRL_N 0x0e keys.h 　
17920
 CTRL_OCTRL_O 0x0f keys.h 　
17921
 CTRL_PCTRL_P 0x10 keys.h 　
17922
 CTRL_QCTRL_Q 0x11 keys.h 　
17923
 CTRL_RCTRL_R 0x12 keys.h 　
17924
 CTRL_SCTRL_S 0x13 keys.h 　
17925
 CTRL_TCTRL_T 0x14 keys.h 　
17926
 CTRL_UCTRL_U 0x15 keys.h 　
17927
 CTRL_VCTRL_V 0x16 keys.h 　
17928
 CTRL_WCTRL_W 0x17 keys.h 　
17929
 CTRL_XCTRL_X 0x18 keys.h 　
17930
 CTRL_YCTRL_Y 0x19 keys.h 　
17931
 CTRL_ZCTRL_Z 0x1a keys.h 　
17932
 BACKSPACEBACKSPACE CTRL_H keys.h 　
17933
 TABTAB CTRL_I keys.h 　
17934
 LFLF CTRL_J keys.h 　
17935
 CRCR CTRL_M keys.h 　
17936
 ESCESC 0x1b keys.h 　
17937
 KEY_MINKEY_MIN 0x101 keys.h 　
17938
 KEY_UPKEY_UP KEY_ANSI ( 0, 'A' ) keys.h *< Up arrow
17939
 KEY_DOWNKEY_DOWN KEY_ANSI ( 0, 'B' ) keys.h *< Down arrow
17940
 KEY_RIGHTKEY_RIGHT KEY_ANSI ( 0, 'C' ) keys.h *< Right arrow
17941
 KEY_LEFTKEY_LEFT KEY_ANSI ( 0, 'D' ) keys.h *< Left arrow
17942
 KEY_ENDKEY_END KEY_ANSI ( 0, 'F' ) keys.h *< End
17943
 KEY_HOMEKEY_HOME KEY_ANSI ( 0, 'H' ) keys.h *< Home
17944
 KEY_ICKEY_IC KEY_ANSI ( 2, '~' ) keys.h *< Insert
17945
 KEY_DCKEY_DC KEY_ANSI ( 3, '~' ) keys.h *< Delete
17946
 KEY_PPAGEKEY_PPAGE KEY_ANSI ( 5, '~' ) keys.h *< Page up
17947
 KEY_NPAGEKEY_NPAGE KEY_ANSI ( 6, '~' ) keys.h *< Page down
17948
 KEY_F8KEY_F8 KEY_ANSI ( 19, '~' ) keys.h *< F8 (for PXE)
17949
 KEY_BACKSPACEKEY_BACKSPACE BACKSPACE keys.h 　
17950
 KEY_ENTERKEY_ENTER LF keys.h 　
17951
 printkprintk printf linux_compat.h 　
17952
 MCA_MOTHERBOARD_SETUP_REGMCA_MOTHERBOARD_SETUP_REG 0x94 mca.h 　
17953
 MCA_ADAPTER_SETUP_REGMCA_ADAPTER_SETUP_REG 0x96 mca.h 　
17954
 MCA_MAX_SLOT_NRMCA_MAX_SLOT_NR 0x07 mca.h Must be 2^n - 1
17955
 GENERIC_MCA_VENDORGENERIC_MCA_VENDOR ISA_VENDOR ( 'M', 'C', 'A' ) mca.h 　
17956
 MCA_DRIVERSMCA_DRIVERS __table ( struct mca_driver, "mca_drivers" ) mca.h 　
17957
 __mca_driver__mca_driver __table_entry ( MCA_DRIVERS, 01 ) mca.h 　
17958
 MD5_DIGEST_SIZEMD5_DIGEST_SIZE 16 md5.h 　
17959
 MD5_BLOCK_WORDSMD5_BLOCK_WORDS 16 md5.h 　
17960
 MD5_HASH_WORDSMD5_HASH_WORDS 4 md5.h 　
17961
 MD5_CTX_SIZEMD5_CTX_SIZE sizeof ( struct md5_ctx ) md5.h 　
17962
 MAX_MEMORY_REGIONSMAX_MEMORY_REGIONS 8 memmap.h 　
17963
 NDP_STATE_INVALIDNDP_STATE_INVALID 0 ndp.h 　
17964
 NDP_STATE_INCOMPLETENDP_STATE_INCOMPLETE 1 ndp.h 　
17965
 NDP_STATE_REACHABLENDP_STATE_REACHABLE 2 ndp.h 　
17966
 NDP_STATE_DELAYNDP_STATE_DELAY 3 ndp.h 　
17967
 NDP_STATE_PROBENDP_STATE_PROBE 4 ndp.h 　
17968
 NDP_STATE_STALENDP_STATE_STALE 5 ndp.h 　
17969
 NET80211_BAND_2GHZNET80211_BAND_2GHZ 0 net80211.h 　
17970
 NET80211_BAND_5GHZNET80211_BAND_5GHZ 1 net80211.h 　
17971
 NET80211_NR_BANDSNET80211_NR_BANDS 2 net80211.h 　
17972
 NET80211_BAND_BIT_2GHZNET80211_BAND_BIT_2GHZ (1 << 0) net80211.h 　
17973
 NET80211_BAND_BIT_5GHZNET80211_BAND_BIT_5GHZ (1 << 1) net80211.h 　
17974
 NET80211_MODE_ANET80211_MODE_A (1 << 0) net80211.h 　
17975
 NET80211_MODE_BNET80211_MODE_B (1 << 1) net80211.h 　
17976
 NET80211_MODE_GNET80211_MODE_G (1 << 2) net80211.h 　
17977
 NET80211_MODE_NNET80211_MODE_N (1 << 3) net80211.h 　
17978
 NET80211_CFG_CHANNELNET80211_CFG_CHANNEL (1 << 0) net80211.h 　
17979
 NET80211_CFG_RATENET80211_CFG_RATE (1 << 1) net80211.h 　
17980
 NET80211_CFG_ASSOCNET80211_CFG_ASSOC (1 << 2) net80211.h 　
17981
 NET80211_CFG_PHY_PARAMSNET80211_CFG_PHY_PARAMS (1 << 3) net80211.h 　
17982
 NET80211_STATUS_MASKNET80211_STATUS_MASK 0x7F net80211.h 　
17983
 NET80211_IS_REASONNET80211_IS_REASON 0x80 net80211.h 　
17984
 NET80211_PROBEDNET80211_PROBED (1 << 8) net80211.h 　
17985
 NET80211_AUTHENTICATEDNET80211_AUTHENTICATED (1 << 9) net80211.h 　
17986
 NET80211_ASSOCIATEDNET80211_ASSOCIATED (1 << 10) net80211.h 　
17987
 NET80211_CRYPTO_SYNCEDNET80211_CRYPTO_SYNCED (1 << 11) net80211.h 　
17988
 NET80211_WORKINGNET80211_WORKING (1 << 12) net80211.h 　
17989
 NET80211_WAITINGNET80211_WAITING (1 << 13) net80211.h 　
17990
 NET80211_NO_ASSOCNET80211_NO_ASSOC (1 << 14) net80211.h 　
17991
 NET80211_AUTO_SSIDNET80211_AUTO_SSID (1 << 15) net80211.h 　
17992
 NET80211_PHY_USE_PROTECTIONNET80211_PHY_USE_PROTECTION (1 << 1) net80211.h 　
17993
 NET80211_PHY_USE_SHORT_PREAMBLENET80211_PHY_USE_SHORT_PREAMBLE (1 << 2) net80211.h 　
17994
 NET80211_PHY_USE_SHORT_SLOTNET80211_PHY_USE_SHORT_SLOT (1 << 3) net80211.h 　
17995
 NET80211_MAX_RATESNET80211_MAX_RATES 16 net80211.h 　
17996
 NET80211_MAX_CHANNELSNET80211_MAX_CHANNELS 32 net80211.h 　
17997
 NET80211_FRAG_TIMEOUTNET80211_FRAG_TIMEOUT 2 net80211.h 　
17998
 NET80211_NR_CONCURRENT_FRAGSNET80211_NR_CONCURRENT_FRAGS 3 net80211.h 　
17999
 NET80211_REG_TXPOWERNET80211_REG_TXPOWER 20 net80211.h 　
18000
 MAX_HW_ADDR_LENMAX_HW_ADDR_LEN 8 netdevice.h 　
18001
 MAX_LL_ADDR_LENMAX_LL_ADDR_LEN 20 netdevice.h 　
18002
 MAX_LL_HEADER_LENMAX_LL_HEADER_LEN 32 netdevice.h 　
18003
 MAX_NET_ADDR_LENMAX_NET_ADDR_LEN 4 netdevice.h 　
18004
 NETDEV_MAX_UNIQUE_ERRORSNETDEV_MAX_UNIQUE_ERRORS 4 netdevice.h 　
18005
 NETDEV_OPENNETDEV_OPEN 0x0001 netdevice.h 　
18006
 LL_PROTOCOLSLL_PROTOCOLS __table ( struct ll_protocol, "ll_protocols" ) netdevice.h 　
18007
 __ll_protocol__ll_protocol __table_entry ( LL_PROTOCOLS, 01 ) netdevice.h 　
18008
 NET_PROTOCOLSNET_PROTOCOLS __table ( struct net_protocol, "net_protocols" ) netdevice.h 　
18009
 __net_protocol__net_protocol __table_entry ( NET_PROTOCOLS, 01 ) netdevice.h 　
18010
 NAP_PREFIX_nullNAP_PREFIX_null __null_ null_nap.h 　
18011
 URI_OPENERSURI_OPENERS __table ( struct uri_opener, "uri_openers" ) open.h 　
18012
 __uri_opener__uri_opener __table_entry ( URI_OPENERS, 01 ) open.h 　
18013
 SOCKET_OPENERSSOCKET_OPENERS __table ( struct socket_opener, "socket_openers" ) open.h 　
18014
 __socket_opener__socket_opener __table_entry ( SOCKET_OPENERS, 01 ) open.h 　
18015
 PCI_COMMAND_IOPCI_COMMAND_IO 0x1 pci.h Enable response in I/O space
18016
 PCI_COMMAND_MEMPCI_COMMAND_MEM 0x2 pci.h Enable response in mem space
18017
 PCI_COMMAND_MASTERPCI_COMMAND_MASTER 0x4 pci.h Enable bus mastering
18018
 PCI_CACHE_LINE_SIZEPCI_CACHE_LINE_SIZE 0x0c pci.h 8 bits
18019
 PCI_LATENCY_TIMERPCI_LATENCY_TIMER 0x0d pci.h 8 bits
18020
 PCI_COMMAND_SPECIALPCI_COMMAND_SPECIAL 0x8 pci.h Enable response to special cycles
18021
 PCI_COMMAND_INVALIDATEPCI_COMMAND_INVALIDATE 0x10 pci.h Use memory write and invalidate
18022
 PCI_COMMAND_VGA_PALETTEPCI_COMMAND_VGA_PALETTE 0x20 pci.h Enable palette snooping
18023
 PCI_COMMAND_PARITYPCI_COMMAND_PARITY 0x40 pci.h Enable parity checking
18024
 PCI_COMMAND_WAITPCI_COMMAND_WAIT 0x80 pci.h Enable address/data stepping
18025
 PCI_COMMAND_SERRPCI_COMMAND_SERR 0x100 pci.h Enable SERR
18026
 PCI_COMMAND_FAST_BACKPCI_COMMAND_FAST_BACK 0x200 pci.h Enable back-to-back writes
18027
 PCI_VENDOR_IDPCI_VENDOR_ID 0x00 pci.h 16 bits
18028
 PCI_DEVICE_IDPCI_DEVICE_ID 0x02 pci.h 16 bits
18029
 PCI_COMMANDPCI_COMMAND 0x04 pci.h 16 bits
18030
 PCI_STATUSPCI_STATUS 0x06 pci.h 16 bits
18031
 PCI_STATUS_CAP_LISTPCI_STATUS_CAP_LIST 0x10 pci.h Support Capability List
18032
 PCI_STATUS_66MHZPCI_STATUS_66MHZ 0x20 pci.h Support 66 Mhz PCI 2.1 bus
18033
 PCI_STATUS_UDFPCI_STATUS_UDF 0x40 pci.h Support User Definable Features [obsolete]
18034
 PCI_STATUS_FAST_BACKPCI_STATUS_FAST_BACK 0x80 pci.h Accept fast-back to back
18035
 PCI_STATUS_PARITYPCI_STATUS_PARITY 0x100 pci.h Detected parity error
18036
 PCI_STATUS_DEVSEL_MASKPCI_STATUS_DEVSEL_MASK 0x600 pci.h DEVSEL timing
18037
 PCI_STATUS_DEVSEL_FASTPCI_STATUS_DEVSEL_FAST 0x000 pci.h 　
18038
 PCI_STATUS_DEVSEL_MEDIUMPCI_STATUS_DEVSEL_MEDIUM 0x200 pci.h 　
18039
 PCI_STATUS_DEVSEL_SLOWPCI_STATUS_DEVSEL_SLOW 0x400 pci.h 　
18040
 PCI_STATUS_SIG_TARGET_ABORTPCI_STATUS_SIG_TARGET_ABORT 0x800 pci.h Set on target abort
18041
 PCI_STATUS_REC_TARGET_ABORTPCI_STATUS_REC_TARGET_ABORT 0x1000 pci.h Master ack of "
18042
 PCI_STATUS_REC_MASTER_ABORTPCI_STATUS_REC_MASTER_ABORT 0x2000 pci.h Set on master abort
18043
 PCI_STATUS_SIG_SYSTEM_ERRORPCI_STATUS_SIG_SYSTEM_ERROR 0x4000 pci.h Set when we drive SERR
18044
 PCI_STATUS_DETECTED_PARITYPCI_STATUS_DETECTED_PARITY 0x8000 pci.h Set on parity error
18045
 PCI_REVISIONPCI_REVISION 0x08 pci.h 8 bits
18046
 PCI_REVISION_IDPCI_REVISION_ID 0x08 pci.h 8 bits
18047
 PCI_CLASS_REVISIONPCI_CLASS_REVISION 0x08 pci.h 32 bits
18048
 PCI_CLASS_CODEPCI_CLASS_CODE 0x0b pci.h 8 bits
18049
 PCI_SUBCLASS_CODEPCI_SUBCLASS_CODE 0x0a pci.h 8 bits
18050
 PCI_HEADER_TYPEPCI_HEADER_TYPE 0x0e pci.h 8 bits
18051
 PCI_HEADER_TYPE_NORMALPCI_HEADER_TYPE_NORMAL 0 pci.h 　
18052
 PCI_HEADER_TYPE_BRIDGEPCI_HEADER_TYPE_BRIDGE 1 pci.h 　
18053
 PCI_HEADER_TYPE_CARDBUSPCI_HEADER_TYPE_CARDBUS 2 pci.h 　
18054
 PCI_CARDBUS_CISPCI_CARDBUS_CIS 0x28 pci.h 　
18055
 PCI_SUBSYSTEM_VENDOR_IDPCI_SUBSYSTEM_VENDOR_ID 0x2c pci.h 　
18056
 PCI_SUBSYSTEM_IDPCI_SUBSYSTEM_ID 0x2e pci.h 　
18057
 PCI_BASE_ADDRESS_0PCI_BASE_ADDRESS_0 0x10 pci.h 32 bits
18058
 PCI_BASE_ADDRESS_1PCI_BASE_ADDRESS_1 0x14 pci.h 32 bits
18059
 PCI_BASE_ADDRESS_2PCI_BASE_ADDRESS_2 0x18 pci.h 32 bits
18060
 PCI_BASE_ADDRESS_3PCI_BASE_ADDRESS_3 0x1c pci.h 32 bits
18061
 PCI_BASE_ADDRESS_4PCI_BASE_ADDRESS_4 0x20 pci.h 32 bits
18062
 PCI_BASE_ADDRESS_5PCI_BASE_ADDRESS_5 0x24 pci.h 32 bits
18063
 PCI_BASE_ADDRESS_SPACEPCI_BASE_ADDRESS_SPACE 0x01 pci.h 0 = memory, 1 = I/O
18064
 PCI_BASE_ADDRESS_SPACE_IOPCI_BASE_ADDRESS_SPACE_IO 0x01 pci.h 　
18065
 PCI_BASE_ADDRESS_SPACE_MEMORYPCI_BASE_ADDRESS_SPACE_MEMORY 0x00 pci.h 　
18066
 PCI_BASE_ADDRESS_MEM_TYPE_MASKPCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06 pci.h 　
18067
 PCI_BASE_ADDRESS_MEM_TYPE_32PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 pci.h 32 bit address
18068
 PCI_BASE_ADDRESS_MEM_TYPE_1MPCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 pci.h Below 1M [obsolete]
18069
 PCI_BASE_ADDRESS_MEM_TYPE_64PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 pci.h 64 bit address
18070
 PCI_BASE_ADDRESS_MEM_MASKPCI_BASE_ADDRESS_MEM_MASK (~0x0f) pci.h 　
18071
 PCI_BASE_ADDRESS_IO_MASKPCI_BASE_ADDRESS_IO_MASK (~0x03) pci.h 　
18072
 PCI_ROM_ADDRESSPCI_ROM_ADDRESS 0x30 pci.h 32 bits
18073
 PCI_ROM_ADDRESS_ENABLEPCI_ROM_ADDRESS_ENABLE 0x01 pci.h Write 1 to enable ROM,
18074
 PCI_CAPABILITY_LISTPCI_CAPABILITY_LIST 0x34 pci.h Offset of first capability list entry
18075
 PCI_INTERRUPT_LINEPCI_INTERRUPT_LINE 0x3c pci.h IRQ number (0-15)
18076
 PCI_INTERRUPT_PINPCI_INTERRUPT_PIN 0x3d pci.h IRQ pin on PCI bus (A-D)
18077
 PCI_PRIMARY_BUSPCI_PRIMARY_BUS 0x18 pci.h Primary bus number
18078
 PCI_SECONDARY_BUSPCI_SECONDARY_BUS 0x19 pci.h Secondary bus number
18079
 PCI_SUBORDINATE_BUSPCI_SUBORDINATE_BUS 0x1a pci.h Highest bus number behind the bridge
18080
 PCI_SEC_LATENCY_TIMERPCI_SEC_LATENCY_TIMER 0x1b pci.h Latency timer for secondary interface
18081
 PCI_IO_BASEPCI_IO_BASE 0x1c pci.h I/O range behind the bridge
18082
 PCI_IO_LIMITPCI_IO_LIMIT 0x1d pci.h 　
18083
 PCI_IO_RANGE_TYPE_MASKPCI_IO_RANGE_TYPE_MASK 0x0f pci.h I/O bridging type
18084
 PCI_IO_RANGE_TYPE_16PCI_IO_RANGE_TYPE_16 0x00 pci.h 　
18085
 PCI_IO_RANGE_TYPE_32PCI_IO_RANGE_TYPE_32 0x01 pci.h 　
18086
 PCI_IO_RANGE_MASKPCI_IO_RANGE_MASK ~0x0f pci.h 　
18087
 PCI_SEC_STATUSPCI_SEC_STATUS 0x1e pci.h Secondary status register, only bit 14 used
18088
 PCI_MEMORY_BASEPCI_MEMORY_BASE 0x20 pci.h Memory range behind
18089
 PCI_MEMORY_LIMITPCI_MEMORY_LIMIT 0x22 pci.h 　
18090
 PCI_MEMORY_RANGE_TYPE_MASKPCI_MEMORY_RANGE_TYPE_MASK 0x0f pci.h 　
18091
 PCI_MEMORY_RANGE_MASKPCI_MEMORY_RANGE_MASK ~0x0f pci.h 　
18092
 PCI_PREF_MEMORY_BASEPCI_PREF_MEMORY_BASE 0x24 pci.h Prefetchable memory range behind
18093
 PCI_PREF_MEMORY_LIMITPCI_PREF_MEMORY_LIMIT 0x26 pci.h 　
18094
 PCI_PREF_RANGE_TYPE_MASKPCI_PREF_RANGE_TYPE_MASK 0x0f pci.h 　
18095
 PCI_PREF_RANGE_TYPE_32PCI_PREF_RANGE_TYPE_32 0x00 pci.h 　
18096
 PCI_PREF_RANGE_TYPE_64PCI_PREF_RANGE_TYPE_64 0x01 pci.h 　
18097
 PCI_PREF_RANGE_MASKPCI_PREF_RANGE_MASK ~0x0f pci.h 　
18098
 PCI_PREF_BASE_UPPER32PCI_PREF_BASE_UPPER32 0x28 pci.h Upper half of prefetchable memory range
18099
 PCI_PREF_LIMIT_UPPER32PCI_PREF_LIMIT_UPPER32 0x2c pci.h 　
18100
 PCI_IO_BASE_UPPER16PCI_IO_BASE_UPPER16 0x30 pci.h Upper half of I/O addresses
18101
 PCI_IO_LIMIT_UPPER16PCI_IO_LIMIT_UPPER16 0x32 pci.h 　
18102
 PCI_ROM_ADDRESS1PCI_ROM_ADDRESS1 0x38 pci.h Same as PCI_ROM_ADDRESS, but for htype 1
18103
 PCI_BRIDGE_CONTROLPCI_BRIDGE_CONTROL 0x3e pci.h 　
18104
 PCI_BRIDGE_CTL_PARITYPCI_BRIDGE_CTL_PARITY 0x01 pci.h Enable parity detection on secondary interface
18105
 PCI_BRIDGE_CTL_SERRPCI_BRIDGE_CTL_SERR 0x02 pci.h The same for SERR forwarding
18106
 PCI_BRIDGE_CTL_NO_ISAPCI_BRIDGE_CTL_NO_ISA 0x04 pci.h Disable bridging of ISA ports
18107
 PCI_BRIDGE_CTL_VGAPCI_BRIDGE_CTL_VGA 0x08 pci.h Forward VGA addresses
18108
 PCI_BRIDGE_CTL_MASTER_ABORTPCI_BRIDGE_CTL_MASTER_ABORT 0x20 pci.h Report master aborts
18109
 PCI_BRIDGE_CTL_BUS_RESETPCI_BRIDGE_CTL_BUS_RESET 0x40 pci.h Secondary bus reset
18110
 PCI_BRIDGE_CTL_FAST_BACKPCI_BRIDGE_CTL_FAST_BACK 0x80 pci.h Fast Back2Back enabled on secondary interface
18111
 PCI_CB_CAPABILITY_LISTPCI_CB_CAPABILITY_LIST 0x14 pci.h 　
18112
 PCI_CAP_LIST_IDPCI_CAP_LIST_ID 0 pci.h Capability ID
18113
 PCI_CAP_ID_PMPCI_CAP_ID_PM 0x01 pci.h Power Management
18114
 PCI_CAP_ID_AGPPCI_CAP_ID_AGP 0x02 pci.h Accelerated Graphics Port
18115
 PCI_CAP_ID_VPDPCI_CAP_ID_VPD 0x03 pci.h Vital Product Data
18116
 PCI_CAP_ID_SLOTIDPCI_CAP_ID_SLOTID 0x04 pci.h Slot Identification
18117
 PCI_CAP_ID_MSIPCI_CAP_ID_MSI 0x05 pci.h Message Signalled Interrupts
18118
 PCI_CAP_ID_CHSWPPCI_CAP_ID_CHSWP 0x06 pci.h CompactPCI HotSwap
18119
 PCI_CAP_ID_EXPPCI_CAP_ID_EXP 0x10 pci.h PCI Express
18120
 PCI_CAP_LIST_NEXTPCI_CAP_LIST_NEXT 1 pci.h Next capability in the list
18121
 PCI_CAP_FLAGSPCI_CAP_FLAGS 2 pci.h Capability defined flags (16 bits)
18122
 PCI_CAP_SIZEOFPCI_CAP_SIZEOF 4 pci.h 　
18123
 PCI_PM_PMCPCI_PM_PMC 2 pci.h PM Capabilities Register
18124
 PCI_PM_CAP_VER_MASKPCI_PM_CAP_VER_MASK 0x0007 pci.h Version
18125
 PCI_PM_CAP_PME_CLOCKPCI_PM_CAP_PME_CLOCK 0x0008 pci.h PME clock required
18126
 PCI_PM_CAP_RESERVEDPCI_PM_CAP_RESERVED 0x0010 pci.h Reserved field
18127
 PCI_PM_CAP_DSIPCI_PM_CAP_DSI 0x0020 pci.h Device specific initialization
18128
 PCI_PM_CAP_AUX_POWERPCI_PM_CAP_AUX_POWER 0x01C0 pci.h Auxilliary power support mask
18129
 PCI_PM_CAP_D1PCI_PM_CAP_D1 0x0200 pci.h D1 power state support
18130
 PCI_PM_CAP_D2PCI_PM_CAP_D2 0x0400 pci.h D2 power state support
18131
 PCI_PM_CAP_PMEPCI_PM_CAP_PME 0x0800 pci.h PME pin supported
18132
 PCI_PM_CAP_PME_MASKPCI_PM_CAP_PME_MASK 0xF800 pci.h PME Mask of all supported states
18133
 PCI_PM_CAP_PME_D0PCI_PM_CAP_PME_D0 0x0800 pci.h PME# from D0
18134
 PCI_PM_CAP_PME_D1PCI_PM_CAP_PME_D1 0x1000 pci.h PME# from D1
18135
 PCI_PM_CAP_PME_D2PCI_PM_CAP_PME_D2 0x2000 pci.h PME# from D2
18136
 PCI_PM_CAP_PME_D3PCI_PM_CAP_PME_D3 0x4000 pci.h PME# from D3 (hot)
18137
 PCI_PM_CAP_PME_D3coldPCI_PM_CAP_PME_D3cold 0x8000 pci.h PME# from D3 (cold)
18138
 PCI_PM_CTRLPCI_PM_CTRL 4 pci.h PM control and status register
18139
 PCI_PM_CTRL_STATE_MASKPCI_PM_CTRL_STATE_MASK 0x0003 pci.h Current power state (D0 to D3)
18140
 PCI_PM_CTRL_PME_ENABLEPCI_PM_CTRL_PME_ENABLE 0x0100 pci.h PME pin enable
18141
 PCI_PM_CTRL_DATA_SEL_MASKPCI_PM_CTRL_DATA_SEL_MASK 0x1e00 pci.h Data select (??)
18142
 PCI_PM_CTRL_DATA_SCALE_MASKPCI_PM_CTRL_DATA_SCALE_MASK 0x6000 pci.h Data scale (??)
18143
 PCI_PM_CTRL_PME_STATUSPCI_PM_CTRL_PME_STATUS 0x8000 pci.h PME pin status
18144
 PCI_PM_PPB_EXTENSIONSPCI_PM_PPB_EXTENSIONS 6 pci.h PPB support extensions (??)
18145
 PCI_PM_PPB_B2_B3PCI_PM_PPB_B2_B3 0x40 pci.h Stop clock when in D3hot (??)
18146
 PCI_PM_BPCC_ENABLEPCI_PM_BPCC_ENABLE 0x80 pci.h Bus power/clock control enable (??)
18147
 PCI_PM_DATA_REGISTERPCI_PM_DATA_REGISTER 7 pci.h (??)
18148
 PCI_PM_SIZEOFPCI_PM_SIZEOF 8 pci.h 　
18149
 PCI_AGP_VERSIONPCI_AGP_VERSION 2 pci.h BCD version number
18150
 PCI_AGP_RFUPCI_AGP_RFU 3 pci.h Rest of capability flags
18151
 PCI_AGP_STATUSPCI_AGP_STATUS 4 pci.h Status register
18152
 PCI_AGP_STATUS_RQ_MASKPCI_AGP_STATUS_RQ_MASK 0xff000000 pci.h Maximum number of requests - 1
18153
 PCI_AGP_STATUS_SBAPCI_AGP_STATUS_SBA 0x0200 pci.h Sideband addressing supported
18154
 PCI_AGP_STATUS_64BITPCI_AGP_STATUS_64BIT 0x0020 pci.h 64-bit addressing supported
18155
 PCI_AGP_STATUS_FWPCI_AGP_STATUS_FW 0x0010 pci.h FW transfers supported
18156
 PCI_AGP_STATUS_RATE4PCI_AGP_STATUS_RATE4 0x0004 pci.h 4x transfer rate supported
18157
 PCI_AGP_STATUS_RATE2PCI_AGP_STATUS_RATE2 0x0002 pci.h 2x transfer rate supported
18158
 PCI_AGP_STATUS_RATE1PCI_AGP_STATUS_RATE1 0x0001 pci.h 1x transfer rate supported
18159
 PCI_AGP_COMMANDPCI_AGP_COMMAND 8 pci.h Control register
18160
 PCI_AGP_COMMAND_RQ_MASKPCI_AGP_COMMAND_RQ_MASK 0xff000000 pci.h Master: Maximum number of requests
18161
 PCI_AGP_COMMAND_SBAPCI_AGP_COMMAND_SBA 0x0200 pci.h Sideband addressing enabled
18162
 PCI_AGP_COMMAND_AGPPCI_AGP_COMMAND_AGP 0x0100 pci.h Allow processing of AGP transactions
18163
 PCI_AGP_COMMAND_64BITPCI_AGP_COMMAND_64BIT 0x0020 pci.h Allow processing of 64-bit addresses
18164
 PCI_AGP_COMMAND_FWPCI_AGP_COMMAND_FW 0x0010 pci.h Force FW transfers
18165
 PCI_AGP_COMMAND_RATE4PCI_AGP_COMMAND_RATE4 0x0004 pci.h Use 4x rate
18166
 PCI_AGP_COMMAND_RATE2PCI_AGP_COMMAND_RATE2 0x0002 pci.h Use 2x rate
18167
 PCI_AGP_COMMAND_RATE1PCI_AGP_COMMAND_RATE1 0x0001 pci.h Use 1x rate
18168
 PCI_AGP_SIZEOFPCI_AGP_SIZEOF 12 pci.h 　
18169
 PCI_SID_ESRPCI_SID_ESR 2 pci.h Expansion Slot Register
18170
 PCI_SID_ESR_NSLOTSPCI_SID_ESR_NSLOTS 0x1f pci.h Number of expansion slots available
18171
 PCI_SID_ESR_FICPCI_SID_ESR_FIC 0x20 pci.h First In Chassis Flag
18172
 PCI_SID_CHASSIS_NRPCI_SID_CHASSIS_NR 3 pci.h Chassis Number
18173
 PCI_MSI_FLAGSPCI_MSI_FLAGS 2 pci.h Various flags
18174
 PCI_MSI_FLAGS_64BITPCI_MSI_FLAGS_64BIT 0x80 pci.h 64-bit addresses allowed
18175
 PCI_MSI_FLAGS_QSIZEPCI_MSI_FLAGS_QSIZE 0x70 pci.h Message queue size configured
18176
 PCI_MSI_FLAGS_QMASKPCI_MSI_FLAGS_QMASK 0x0e pci.h Maximum queue size available
18177
 PCI_MSI_FLAGS_ENABLEPCI_MSI_FLAGS_ENABLE 0x01 pci.h MSI feature enabled
18178
 PCI_MSI_RFUPCI_MSI_RFU 3 pci.h Rest of capability flags
18179
 PCI_MSI_ADDRESS_LOPCI_MSI_ADDRESS_LO 4 pci.h Lower 32 bits
18180
 PCI_MSI_ADDRESS_HIPCI_MSI_ADDRESS_HI 8 pci.h Upper 32 bits (if PCI_MSI_FLAGS_64BIT set)
18181
 PCI_MSI_DATA_32PCI_MSI_DATA_32 8 pci.h 16 bits of data for 32-bit devices
18182
 PCI_MSI_DATA_64PCI_MSI_DATA_64 12 pci.h 16 bits of data for 64-bit devices
18183
 PCI_ERR_UNCOR_STATUSPCI_ERR_UNCOR_STATUS 4 pci.h Uncorrectable Error Status
18184
 PCI_ERR_UNC_TRAINPCI_ERR_UNC_TRAIN 0x00000001 pci.h Training
18185
 PCI_ERR_UNC_DLPPCI_ERR_UNC_DLP 0x00000010 pci.h Data Link Protocol
18186
 PCI_ERR_UNC_POISON_TLPPCI_ERR_UNC_POISON_TLP 0x00001000 pci.h Poisoned TLP
18187
 PCI_ERR_UNC_FCPPCI_ERR_UNC_FCP 0x00002000 pci.h Flow Control Protocol
18188
 PCI_ERR_UNC_COMP_TIMEPCI_ERR_UNC_COMP_TIME 0x00004000 pci.h Completion Timeout
18189
 PCI_ERR_UNC_COMP_ABORTPCI_ERR_UNC_COMP_ABORT 0x00008000 pci.h Completer Abort
18190
 PCI_ERR_UNC_UNX_COMPPCI_ERR_UNC_UNX_COMP 0x00010000 pci.h Unexpected Completion
18191
 PCI_ERR_UNC_RX_OVERPCI_ERR_UNC_RX_OVER 0x00020000 pci.h Receiver Overflow
18192
 PCI_ERR_UNC_MALF_TLPPCI_ERR_UNC_MALF_TLP 0x00040000 pci.h Malformed TLP
18193
 PCI_ERR_UNC_ECRCPCI_ERR_UNC_ECRC 0x00080000 pci.h ECRC Error Status
18194
 PCI_ERR_UNC_UNSUPPCI_ERR_UNC_UNSUP 0x00100000 pci.h Unsupported Request
18195
 PCI_ERR_UNCOR_MASKPCI_ERR_UNCOR_MASK 8 pci.h Uncorrectable Error Mask
18196
 PCI_ERR_UNCOR_SEVERPCI_ERR_UNCOR_SEVER 12 pci.h Uncorrectable Error Severity
18197
 PCI_ERR_COR_STATUSPCI_ERR_COR_STATUS 16 pci.h Correctable Error Status
18198
 PCI_ERR_COR_RCVRPCI_ERR_COR_RCVR 0x00000001 pci.h Receiver Error Status
18199
 PCI_ERR_COR_BAD_TLPPCI_ERR_COR_BAD_TLP 0x00000040 pci.h Bad TLP Status
18200
 PCI_ERR_COR_BAD_DLLPPCI_ERR_COR_BAD_DLLP 0x00000080 pci.h Bad DLLP Status
18201
 PCI_ERR_COR_REP_ROLLPCI_ERR_COR_REP_ROLL 0x00000100 pci.h REPLAY_NUM Rollover
18202
 PCI_ERR_COR_REP_TIMERPCI_ERR_COR_REP_TIMER 0x00001000 pci.h Replay Timer Timeout
18203
 PCI_ERR_COR_MASKPCI_ERR_COR_MASK 20 pci.h Correctable Error Mask
18204
 PCI_ANY_IDPCI_ANY_ID 0xffff pci.h 　
18205
 PCI_DRIVERSPCI_DRIVERS __table ( struct pci_driver, "pci_drivers" ) pci.h 　
18206
 __pci_driver__pci_driver __table_entry ( PCI_DRIVERS, 01 ) pci.h 　
18207
 PCI_CONFIG_BACKUP_EXCLUDE_ENDPCI_CONFIG_BACKUP_EXCLUDE_END 0xff pcibackup.h 　
18208
 PCI_CLASS_NOT_DEFINEDPCI_CLASS_NOT_DEFINED 0x0000 pci_ids.h 　
18209
 PCI_CLASS_NOT_DEFINED_VGAPCI_CLASS_NOT_DEFINED_VGA 0x0001 pci_ids.h 　
18210
 PCI_BASE_CLASS_STORAGEPCI_BASE_CLASS_STORAGE 0x01 pci_ids.h 　
18211
 PCI_CLASS_STORAGE_SCSIPCI_CLASS_STORAGE_SCSI 0x0100 pci_ids.h 　
18212
 PCI_CLASS_STORAGE_IDEPCI_CLASS_STORAGE_IDE 0x0101 pci_ids.h 　
18213
 PCI_CLASS_STORAGE_FLOPPYPCI_CLASS_STORAGE_FLOPPY 0x0102 pci_ids.h 　
18214
 PCI_CLASS_STORAGE_IPIPCI_CLASS_STORAGE_IPI 0x0103 pci_ids.h 　
18215
 PCI_CLASS_STORAGE_RAIDPCI_CLASS_STORAGE_RAID 0x0104 pci_ids.h 　
18216
 PCI_CLASS_STORAGE_OTHERPCI_CLASS_STORAGE_OTHER 0x0180 pci_ids.h 　
18217
 PCI_BASE_CLASS_NETWORKPCI_BASE_CLASS_NETWORK 0x02 pci_ids.h 　
18218
 PCI_CLASS_NETWORK_ETHERNETPCI_CLASS_NETWORK_ETHERNET 0x0200 pci_ids.h 　
18219
 PCI_CLASS_NETWORK_TOKEN_RINGPCI_CLASS_NETWORK_TOKEN_RING 0x0201 pci_ids.h 　
18220
 PCI_CLASS_NETWORK_FDDIPCI_CLASS_NETWORK_FDDI 0x0202 pci_ids.h 　
18221
 PCI_CLASS_NETWORK_ATMPCI_CLASS_NETWORK_ATM 0x0203 pci_ids.h 　
18222
 PCI_CLASS_NETWORK_OTHERPCI_CLASS_NETWORK_OTHER 0x0280 pci_ids.h 　
18223
 PCI_BASE_CLASS_DISPLAYPCI_BASE_CLASS_DISPLAY 0x03 pci_ids.h 　
18224
 PCI_CLASS_DISPLAY_VGAPCI_CLASS_DISPLAY_VGA 0x0300 pci_ids.h 　
18225
 PCI_CLASS_DISPLAY_XGAPCI_CLASS_DISPLAY_XGA 0x0301 pci_ids.h 　
18226
 PCI_CLASS_DISPLAY_3DPCI_CLASS_DISPLAY_3D 0x0302 pci_ids.h 　
18227
 PCI_CLASS_DISPLAY_OTHERPCI_CLASS_DISPLAY_OTHER 0x0380 pci_ids.h 　
18228
 PCI_BASE_CLASS_MULTIMEDIAPCI_BASE_CLASS_MULTIMEDIA 0x04 pci_ids.h 　
18229
 PCI_CLASS_MULTIMEDIA_VIDEOPCI_CLASS_MULTIMEDIA_VIDEO 0x0400 pci_ids.h 　
18230
 PCI_CLASS_MULTIMEDIA_AUDIOPCI_CLASS_MULTIMEDIA_AUDIO 0x0401 pci_ids.h 　
18231
 PCI_CLASS_MULTIMEDIA_PHONEPCI_CLASS_MULTIMEDIA_PHONE 0x0402 pci_ids.h 　
18232
 PCI_CLASS_MULTIMEDIA_OTHERPCI_CLASS_MULTIMEDIA_OTHER 0x0480 pci_ids.h 　
18233
 PCI_BASE_CLASS_MEMORYPCI_BASE_CLASS_MEMORY 0x05 pci_ids.h 　
18234
 PCI_CLASS_MEMORY_RAMPCI_CLASS_MEMORY_RAM 0x0500 pci_ids.h 　
18235
 PCI_CLASS_MEMORY_FLASHPCI_CLASS_MEMORY_FLASH 0x0501 pci_ids.h 　
18236
 PCI_CLASS_MEMORY_OTHERPCI_CLASS_MEMORY_OTHER 0x0580 pci_ids.h 　
18237
 PCI_BASE_CLASS_BRIDGEPCI_BASE_CLASS_BRIDGE 0x06 pci_ids.h 　
18238
 PCI_CLASS_BRIDGE_HOSTPCI_CLASS_BRIDGE_HOST 0x0600 pci_ids.h 　
18239
 PCI_CLASS_BRIDGE_ISAPCI_CLASS_BRIDGE_ISA 0x0601 pci_ids.h 　
18240
 PCI_CLASS_BRIDGE_EISAPCI_CLASS_BRIDGE_EISA 0x0602 pci_ids.h 　
18241
 PCI_CLASS_BRIDGE_MCPCI_CLASS_BRIDGE_MC 0x0603 pci_ids.h 　
18242
 PCI_CLASS_BRIDGE_PCIPCI_CLASS_BRIDGE_PCI 0x0604 pci_ids.h 　
18243
 PCI_CLASS_BRIDGE_PCMCIAPCI_CLASS_BRIDGE_PCMCIA 0x0605 pci_ids.h 　
18244
 PCI_CLASS_BRIDGE_NUBUSPCI_CLASS_BRIDGE_NUBUS 0x0606 pci_ids.h 　
18245
 PCI_CLASS_BRIDGE_CARDBUSPCI_CLASS_BRIDGE_CARDBUS 0x0607 pci_ids.h 　
18246
 PCI_CLASS_BRIDGE_RACEWAYPCI_CLASS_BRIDGE_RACEWAY 0x0608 pci_ids.h 　
18247
 PCI_CLASS_BRIDGE_OTHERPCI_CLASS_BRIDGE_OTHER 0x0680 pci_ids.h 　
18248
 PCI_BASE_CLASS_COMMUNICATIONPCI_BASE_CLASS_COMMUNICATION 0x07 pci_ids.h 　
18249
 PCI_CLASS_COMMUNICATION_SERIALPCI_CLASS_COMMUNICATION_SERIAL 0x0700 pci_ids.h 　
18250
 PCI_CLASS_COMMUNICATION_PARALLEPCI_CLASS_COMMUNICATION_PARALLE 0x0701 pci_ids.h 　
18251
 PCI_CLASS_COMMUNICATION_MULTISEPCI_CLASS_COMMUNICATION_MULTISE 0x0702 pci_ids.h 　
18252
 PCI_CLASS_COMMUNICATION_MODEMPCI_CLASS_COMMUNICATION_MODEM 0x0703 pci_ids.h 　
18253
 PCI_CLASS_COMMUNICATION_OTHERPCI_CLASS_COMMUNICATION_OTHER 0x0780 pci_ids.h 　
18254
 PCI_BASE_CLASS_SYSTEMPCI_BASE_CLASS_SYSTEM 0x08 pci_ids.h 　
18255
 PCI_CLASS_SYSTEM_PICPCI_CLASS_SYSTEM_PIC 0x0800 pci_ids.h 　
18256
 PCI_CLASS_SYSTEM_DMAPCI_CLASS_SYSTEM_DMA 0x0801 pci_ids.h 　
18257
 PCI_CLASS_SYSTEM_TIMERPCI_CLASS_SYSTEM_TIMER 0x0802 pci_ids.h 　
18258
 PCI_CLASS_SYSTEM_RTCPCI_CLASS_SYSTEM_RTC 0x0803 pci_ids.h 　
18259
 PCI_CLASS_SYSTEM_PCI_HOTPLUGPCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 pci_ids.h 　
18260
 PCI_CLASS_SYSTEM_OTHERPCI_CLASS_SYSTEM_OTHER 0x0880 pci_ids.h 　
18261
 PCI_BASE_CLASS_INPUTPCI_BASE_CLASS_INPUT 0x09 pci_ids.h 　
18262
 PCI_CLASS_INPUT_KEYBOARDPCI_CLASS_INPUT_KEYBOARD 0x0900 pci_ids.h 　
18263
 PCI_CLASS_INPUT_PENPCI_CLASS_INPUT_PEN 0x0901 pci_ids.h 　
18264
 PCI_CLASS_INPUT_MOUSEPCI_CLASS_INPUT_MOUSE 0x0902 pci_ids.h 　
18265
 PCI_CLASS_INPUT_SCANNERPCI_CLASS_INPUT_SCANNER 0x0903 pci_ids.h 　
18266
 PCI_CLASS_INPUT_GAMEPORTPCI_CLASS_INPUT_GAMEPORT 0x0904 pci_ids.h 　
18267
 PCI_CLASS_INPUT_OTHERPCI_CLASS_INPUT_OTHER 0x0980 pci_ids.h 　
18268
 PCI_BASE_CLASS_DOCKINGPCI_BASE_CLASS_DOCKING 0x0a pci_ids.h 　
18269
 PCI_CLASS_DOCKING_GENERICPCI_CLASS_DOCKING_GENERIC 0x0a00 pci_ids.h 　
18270
 PCI_CLASS_DOCKING_OTHERPCI_CLASS_DOCKING_OTHER 0x0a80 pci_ids.h 　
18271
 PCI_BASE_CLASS_PROCESSORPCI_BASE_CLASS_PROCESSOR 0x0b pci_ids.h 　
18272
 PCI_CLASS_PROCESSOR_386PCI_CLASS_PROCESSOR_386 0x0b00 pci_ids.h 　
18273
 PCI_CLASS_PROCESSOR_486PCI_CLASS_PROCESSOR_486 0x0b01 pci_ids.h 　
18274
 PCI_CLASS_PROCESSOR_PENTIUMPCI_CLASS_PROCESSOR_PENTIUM 0x0b02 pci_ids.h 　
18275
 PCI_CLASS_PROCESSOR_ALPHAPCI_CLASS_PROCESSOR_ALPHA 0x0b10 pci_ids.h 　
18276
 PCI_CLASS_PROCESSOR_POWERPCPCI_CLASS_PROCESSOR_POWERPC 0x0b20 pci_ids.h 　
18277
 PCI_CLASS_PROCESSOR_MIPSPCI_CLASS_PROCESSOR_MIPS 0x0b30 pci_ids.h 　
18278
 PCI_CLASS_PROCESSOR_COPCI_CLASS_PROCESSOR_CO 0x0b40 pci_ids.h 　
18279
 PCI_BASE_CLASS_SERIALPCI_BASE_CLASS_SERIAL 0x0c pci_ids.h 　
18280
 PCI_CLASS_SERIAL_FIREWIREPCI_CLASS_SERIAL_FIREWIRE 0x0c00 pci_ids.h 　
18281
 PCI_CLASS_SERIAL_ACCESSPCI_CLASS_SERIAL_ACCESS 0x0c01 pci_ids.h 　
18282
 PCI_CLASS_SERIAL_SSAPCI_CLASS_SERIAL_SSA 0x0c02 pci_ids.h 　
18283
 PCI_CLASS_SERIAL_USBPCI_CLASS_SERIAL_USB 0x0c03 pci_ids.h 　
18284
 PCI_CLASS_SERIAL_FIBERPCI_CLASS_SERIAL_FIBER 0x0c04 pci_ids.h 　
18285
 PCI_CLASS_SERIAL_SMBUSPCI_CLASS_SERIAL_SMBUS 0x0c05 pci_ids.h 　
18286
 PCI_BASE_CLASS_INTELLIGENTPCI_BASE_CLASS_INTELLIGENT 0x0e pci_ids.h 　
18287
 PCI_CLASS_INTELLIGENT_I2OPCI_CLASS_INTELLIGENT_I2O 0x0e00 pci_ids.h 　
18288
 PCI_BASE_CLASS_SATELLITEPCI_BASE_CLASS_SATELLITE 0x0f pci_ids.h 　
18289
 PCI_CLASS_SATELLITE_TVPCI_CLASS_SATELLITE_TV 0x0f00 pci_ids.h 　
18290
 PCI_CLASS_SATELLITE_AUDIOPCI_CLASS_SATELLITE_AUDIO 0x0f01 pci_ids.h 　
18291
 PCI_CLASS_SATELLITE_VOICEPCI_CLASS_SATELLITE_VOICE 0x0f03 pci_ids.h 　
18292
 PCI_CLASS_SATELLITE_DATAPCI_CLASS_SATELLITE_DATA 0x0f04 pci_ids.h 　
18293
 PCI_BASE_CLASS_CRYPTPCI_BASE_CLASS_CRYPT 0x10 pci_ids.h 　
18294
 PCI_CLASS_CRYPT_NETWORKPCI_CLASS_CRYPT_NETWORK 0x1000 pci_ids.h 　
18295
 PCI_CLASS_CRYPT_ENTERTAINMENTPCI_CLASS_CRYPT_ENTERTAINMENT 0x1001 pci_ids.h 　
18296
 PCI_CLASS_CRYPT_OTHERPCI_CLASS_CRYPT_OTHER 0x1080 pci_ids.h 　
18297
 PCI_BASE_CLASS_SIGNAL_PROCESSINPCI_BASE_CLASS_SIGNAL_PROCESSIN 0x11 pci_ids.h 　
18298
 PCI_CLASS_SP_DPIOPCI_CLASS_SP_DPIO 0x1100 pci_ids.h 　
18299
 PCI_CLASS_SP_OTHERPCI_CLASS_SP_OTHER 0x1180 pci_ids.h 　
18300
 PCI_CLASS_OTHERSPCI_CLASS_OTHERS 0xff pci_ids.h 　
18301
 PCI_VENDOR_ID_DYNALINKPCI_VENDOR_ID_DYNALINK 0x0675 pci_ids.h 　
18302
 PCI_VENDOR_ID_BERKOMPCI_VENDOR_ID_BERKOM 0x0871 pci_ids.h 　
18303
 PCI_VENDOR_ID_COMPAQPCI_VENDOR_ID_COMPAQ 0x0e11 pci_ids.h 　
18304
 PCI_VENDOR_ID_NCRPCI_VENDOR_ID_NCR 0x1000 pci_ids.h 　
18305
 PCI_VENDOR_ID_LSI_LOGICPCI_VENDOR_ID_LSI_LOGIC 0x1000 pci_ids.h 　
18306
 PCI_VENDOR_ID_ATIPCI_VENDOR_ID_ATI 0x1002 pci_ids.h 　
18307
 PCI_VENDOR_ID_VLSIPCI_VENDOR_ID_VLSI 0x1004 pci_ids.h 　
18308
 PCI_VENDOR_ID_ADLPCI_VENDOR_ID_ADL 0x1005 pci_ids.h 　
18309
 PCI_VENDOR_ID_NSPCI_VENDOR_ID_NS 0x100b pci_ids.h 　
18310
 PCI_VENDOR_ID_TSENGPCI_VENDOR_ID_TSENG 0x100c pci_ids.h 　
18311
 PCI_VENDOR_ID_WEITEKPCI_VENDOR_ID_WEITEK 0x100e pci_ids.h 　
18312
 PCI_VENDOR_ID_DECPCI_VENDOR_ID_DEC 0x1011 pci_ids.h 　
18313
 PCI_VENDOR_ID_CIRRUSPCI_VENDOR_ID_CIRRUS 0x1013 pci_ids.h 　
18314
 PCI_VENDOR_ID_IBMPCI_VENDOR_ID_IBM 0x1014 pci_ids.h 　
18315
 PCI_VENDOR_ID_COMPEX2PCI_VENDOR_ID_COMPEX2 0x101a pci_ids.h 　
18316
 PCI_VENDOR_ID_WDPCI_VENDOR_ID_WD 0x101c pci_ids.h 　
18317
 PCI_VENDOR_ID_AMIPCI_VENDOR_ID_AMI 0x101e pci_ids.h 　
18318
 PCI_VENDOR_ID_AMDPCI_VENDOR_ID_AMD 0x1022 pci_ids.h 　
18319
 PCI_VENDOR_ID_TRIDENTPCI_VENDOR_ID_TRIDENT 0x1023 pci_ids.h 　
18320
 PCI_VENDOR_ID_AIPCI_VENDOR_ID_AI 0x1025 pci_ids.h 　
18321
 PCI_VENDOR_ID_DELLPCI_VENDOR_ID_DELL 0x1028 pci_ids.h 　
18322
 PCI_VENDOR_ID_MATROXPCI_VENDOR_ID_MATROX 0x102B pci_ids.h 　
18323
 PCI_VENDOR_ID_CTPCI_VENDOR_ID_CT 0x102c pci_ids.h 　
18324
 PCI_VENDOR_ID_MIROPCI_VENDOR_ID_MIRO 0x1031 pci_ids.h 　
18325
 PCI_VENDOR_ID_NECPCI_VENDOR_ID_NEC 0x1033 pci_ids.h 　
18326
 PCI_VENDOR_ID_FDPCI_VENDOR_ID_FD 0x1036 pci_ids.h 　
18327
 PCI_VENDOR_ID_SISPCI_VENDOR_ID_SIS 0x1039 pci_ids.h 　
18328
 PCI_VENDOR_ID_SIPCI_VENDOR_ID_SI 0x1039 pci_ids.h 　
18329
 PCI_VENDOR_ID_HPPCI_VENDOR_ID_HP 0x103c pci_ids.h 　
18330
 PCI_VENDOR_ID_PCTECHPCI_VENDOR_ID_PCTECH 0x1042 pci_ids.h 　
18331
 PCI_VENDOR_ID_ASUSTEKPCI_VENDOR_ID_ASUSTEK 0x1043 pci_ids.h 　
18332
 PCI_VENDOR_ID_DPTPCI_VENDOR_ID_DPT 0x1044 pci_ids.h 　
18333
 PCI_VENDOR_ID_OPTIPCI_VENDOR_ID_OPTI 0x1045 pci_ids.h 　
18334
 PCI_VENDOR_ID_ELSAPCI_VENDOR_ID_ELSA 0x1048 pci_ids.h 　
18335
 PCI_VENDOR_ID_ELSAPCI_VENDOR_ID_ELSA 0x1048 pci_ids.h 　
18336
 PCI_VENDOR_ID_SGSPCI_VENDOR_ID_SGS 0x104a pci_ids.h 　
18337
 PCI_VENDOR_ID_BUSLOGICPCI_VENDOR_ID_BUSLOGIC 0x104B pci_ids.h 　
18338
 PCI_VENDOR_ID_TIPCI_VENDOR_ID_TI 0x104c pci_ids.h 　
18339
 PCI_VENDOR_ID_SONYPCI_VENDOR_ID_SONY 0x104d pci_ids.h 　
18340
 PCI_VENDOR_ID_OAKPCI_VENDOR_ID_OAK 0x104e pci_ids.h 　
18341
 PCI_VENDOR_ID_WINBOND2PCI_VENDOR_ID_WINBOND2 0x1050 pci_ids.h 　
18342
 PCI_VENDOR_ID_ANIGMAPCI_VENDOR_ID_ANIGMA 0x1051 pci_ids.h 　
18343
 PCI_VENDOR_ID_EFARPCI_VENDOR_ID_EFAR 0x1055 pci_ids.h 　
18344
 PCI_VENDOR_ID_MOTOROLAPCI_VENDOR_ID_MOTOROLA 0x1057 pci_ids.h 　
18345
 PCI_VENDOR_ID_MOTOROLA_OOPSPCI_VENDOR_ID_MOTOROLA_OOPS 0x1507 pci_ids.h 　
18346
 PCI_VENDOR_ID_PROMISEPCI_VENDOR_ID_PROMISE 0x105a pci_ids.h 　
18347
 PCI_VENDOR_ID_N9PCI_VENDOR_ID_N9 0x105d pci_ids.h 　
18348
 PCI_VENDOR_ID_UMCPCI_VENDOR_ID_UMC 0x1060 pci_ids.h 　
18349
 PCI_VENDOR_ID_XPCI_VENDOR_ID_X 0x1061 pci_ids.h 　
18350
 PCI_VENDOR_ID_MYLEXPCI_VENDOR_ID_MYLEX 0x1069 pci_ids.h 　
18351
 PCI_VENDOR_ID_PICOPPCI_VENDOR_ID_PICOP 0x1066 pci_ids.h 　
18352
 PCI_VENDOR_ID_APPLEPCI_VENDOR_ID_APPLE 0x106b pci_ids.h 　
18353
 PCI_VENDOR_ID_YAMAHAPCI_VENDOR_ID_YAMAHA 0x1073 pci_ids.h 　
18354
 PCI_VENDOR_ID_NEXGENPCI_VENDOR_ID_NEXGEN 0x1074 pci_ids.h 　
18355
 PCI_VENDOR_ID_QLOGICPCI_VENDOR_ID_QLOGIC 0x1077 pci_ids.h 　
18356
 PCI_VENDOR_ID_CYRIXPCI_VENDOR_ID_CYRIX 0x1078 pci_ids.h 　
18357
 PCI_VENDOR_ID_LEADTEKPCI_VENDOR_ID_LEADTEK 0x107d pci_ids.h 　
18358
 PCI_VENDOR_ID_INTERPHASEPCI_VENDOR_ID_INTERPHASE 0x107e pci_ids.h 　
18359
 PCI_VENDOR_ID_CONTAQPCI_VENDOR_ID_CONTAQ 0x1080 pci_ids.h 　
18360
 PCI_VENDOR_ID_FOREXPCI_VENDOR_ID_FOREX 0x1083 pci_ids.h 　
18361
 PCI_VENDOR_ID_OLICOMPCI_VENDOR_ID_OLICOM 0x108d pci_ids.h 　
18362
 PCI_VENDOR_ID_SUNPCI_VENDOR_ID_SUN 0x108e pci_ids.h 　
18363
 PCI_VENDOR_ID_CMDPCI_VENDOR_ID_CMD 0x1095 pci_ids.h 　
18364
 PCI_VENDOR_ID_VISIONPCI_VENDOR_ID_VISION 0x1098 pci_ids.h 　
18365
 PCI_VENDOR_ID_BROOKTREEPCI_VENDOR_ID_BROOKTREE 0x109e pci_ids.h 　
18366
 PCI_VENDOR_ID_SIERRAPCI_VENDOR_ID_SIERRA 0x10a8 pci_ids.h 　
18367
 PCI_VENDOR_ID_SGIPCI_VENDOR_ID_SGI 0x10a9 pci_ids.h 　
18368
 PCI_VENDOR_ID_ACCPCI_VENDOR_ID_ACC 0x10aa pci_ids.h 　
18369
 PCI_VENDOR_ID_WINBONDPCI_VENDOR_ID_WINBOND 0x10ad pci_ids.h 　
18370
 PCI_VENDOR_ID_DATABOOKPCI_VENDOR_ID_DATABOOK 0x10b3 pci_ids.h 　
18371
 PCI_VENDOR_ID_PLXPCI_VENDOR_ID_PLX 0x10b5 pci_ids.h 　
18372
 PCI_VENDOR_ID_MADGEPCI_VENDOR_ID_MADGE 0x10b6 pci_ids.h 　
18373
 PCI_VENDOR_ID_3COMPCI_VENDOR_ID_3COM 0x10b7 pci_ids.h 　
18374
 PCI_VENDOR_ID_SMCPCI_VENDOR_ID_SMC 0x10b8 pci_ids.h 　
18375
 PCI_VENDOR_ID_SUNDANCEPCI_VENDOR_ID_SUNDANCE 0x13F0 pci_ids.h 　
18376
 PCI_VENDOR_ID_ALPCI_VENDOR_ID_AL 0x10b9 pci_ids.h 　
18377
 PCI_VENDOR_ID_MITSUBISHIPCI_VENDOR_ID_MITSUBISHI 0x10ba pci_ids.h 　
18378
 PCI_VENDOR_ID_SURECOMPCI_VENDOR_ID_SURECOM 0x10bd pci_ids.h 　
18379
 PCI_VENDOR_ID_NEOMAGICPCI_VENDOR_ID_NEOMAGIC 0x10c8 pci_ids.h 　
18380
 PCI_VENDOR_ID_ASPPCI_VENDOR_ID_ASP 0x10cd pci_ids.h 　
18381
 PCI_VENDOR_ID_MACRONIXPCI_VENDOR_ID_MACRONIX 0x10d9 pci_ids.h 　
18382
 PCI_VENDOR_ID_TCONRADPCI_VENDOR_ID_TCONRAD 0x10da pci_ids.h 　
18383
 PCI_VENDOR_ID_CERNPCI_VENDOR_ID_CERN 0x10dc pci_ids.h 　
18384
 PCI_VENDOR_ID_NVIDIAPCI_VENDOR_ID_NVIDIA 0x10de pci_ids.h 　
18385
 PCI_VENDOR_ID_IMSPCI_VENDOR_ID_IMS 0x10e0 pci_ids.h 　
18386
 PCI_VENDOR_ID_TEKRAM2PCI_VENDOR_ID_TEKRAM2 0x10e1 pci_ids.h 　
18387
 PCI_VENDOR_ID_TUNDRAPCI_VENDOR_ID_TUNDRA 0x10e3 pci_ids.h 　
18388
 PCI_VENDOR_ID_AMCCPCI_VENDOR_ID_AMCC 0x10e8 pci_ids.h 　
18389
 PCI_VENDOR_ID_INTERGPCI_VENDOR_ID_INTERG 0x10ea pci_ids.h 　
18390
 PCI_VENDOR_ID_REALTEKPCI_VENDOR_ID_REALTEK 0x10ec pci_ids.h 　
18391
 PCI_VENDOR_ID_XILINXPCI_VENDOR_ID_XILINX 0x10ee pci_ids.h 　
18392
 PCI_VENDOR_ID_TRUEVISIONPCI_VENDOR_ID_TRUEVISION 0x10fa pci_ids.h 　
18393
 PCI_VENDOR_ID_INITPCI_VENDOR_ID_INIT 0x1101 pci_ids.h 　
18394
 PCI_VENDOR_ID_CREATIVEPCI_VENDOR_ID_CREATIVE 0x1102 pci_ids.h 　
18395
 PCI_VENDOR_ID_ECTIVAPCI_VENDOR_ID_ECTIVA 0x1102 pci_ids.h 　
18396
 PCI_VENDOR_ID_TTIPCI_VENDOR_ID_TTI 0x1103 pci_ids.h 　
18397
 PCI_VENDOR_ID_VIAPCI_VENDOR_ID_VIA 0x1106 pci_ids.h 　
18398
 PCI_VENDOR_ID_VIATECPCI_VENDOR_ID_VIATEC 0x1106 pci_ids.h 　
18399
 PCI_VENDOR_ID_SIEMENSPCI_VENDOR_ID_SIEMENS 0x110A pci_ids.h 　
18400
 PCI_VENDOR_ID_SMC2PCI_VENDOR_ID_SMC2 0x1113 pci_ids.h 　
18401
 PCI_VENDOR_ID_VORTEXPCI_VENDOR_ID_VORTEX 0x1119 pci_ids.h 　
18402
 PCI_VENDOR_ID_EFPCI_VENDOR_ID_EF 0x111a pci_ids.h 　
18403
 PCI_VENDOR_ID_IDTPCI_VENDOR_ID_IDT 0x111d pci_ids.h 　
18404
 PCI_VENDOR_ID_FOREPCI_VENDOR_ID_FORE 0x1127 pci_ids.h 　
18405
 PCI_VENDOR_ID_IMAGINGTECHPCI_VENDOR_ID_IMAGINGTECH 0x112f pci_ids.h 　
18406
 PCI_VENDOR_ID_PHILIPSPCI_VENDOR_ID_PHILIPS 0x1131 pci_ids.h 　
18407
 PCI_VENDOR_ID_EICONPCI_VENDOR_ID_EICON 0x1133 pci_ids.h 　
18408
 PCI_VENDOR_ID_CYCLONEPCI_VENDOR_ID_CYCLONE 0x113c pci_ids.h 　
18409
 PCI_VENDOR_ID_ALLIANCEPCI_VENDOR_ID_ALLIANCE 0x1142 pci_ids.h 　
18410
 PCI_VENDOR_ID_SYSKONNECTPCI_VENDOR_ID_SYSKONNECT 0x1148 pci_ids.h 　
18411
 PCI_VENDOR_ID_VMICPCI_VENDOR_ID_VMIC 0x114a pci_ids.h 　
18412
 PCI_VENDOR_ID_DIGIPCI_VENDOR_ID_DIGI 0x114f pci_ids.h 　
18413
 PCI_VENDOR_ID_MUTECHPCI_VENDOR_ID_MUTECH 0x1159 pci_ids.h 　
18414
 PCI_VENDOR_ID_XIRCOMPCI_VENDOR_ID_XIRCOM 0x115d pci_ids.h 　
18415
 PCI_VENDOR_ID_RENDITIONPCI_VENDOR_ID_RENDITION 0x1163 pci_ids.h 　
18416
 PCI_VENDOR_ID_SERVERWORKSPCI_VENDOR_ID_SERVERWORKS 0x1166 pci_ids.h 　
18417
 PCI_VENDOR_ID_SBEPCI_VENDOR_ID_SBE 0x1176 pci_ids.h 　
18418
 PCI_VENDOR_ID_TOSHIBAPCI_VENDOR_ID_TOSHIBA 0x1179 pci_ids.h 　
18419
 PCI_VENDOR_ID_RICOHPCI_VENDOR_ID_RICOH 0x1180 pci_ids.h 　
18420
 PCI_VENDOR_ID_DLINKPCI_VENDOR_ID_DLINK 0x1186 pci_ids.h 　
18421
 PCI_VENDOR_ID_ARTOPPCI_VENDOR_ID_ARTOP 0x1191 pci_ids.h 　
18422
 PCI_VENDOR_ID_ZEITNETPCI_VENDOR_ID_ZEITNET 0x1193 pci_ids.h 　
18423
 PCI_VENDOR_ID_OMEGAPCI_VENDOR_ID_OMEGA 0x119b pci_ids.h 　
18424
 PCI_VENDOR_ID_FUJITSU_MEPCI_VENDOR_ID_FUJITSU_ME 0x119e pci_ids.h 　
18425
 PCI_SUBVENDOR_ID_KEYSPANPCI_SUBVENDOR_ID_KEYSPAN 0x11a9 pci_ids.h 　
18426
 PCI_VENDOR_ID_GALILEOPCI_VENDOR_ID_GALILEO 0x11ab pci_ids.h 　
18427
 PCI_VENDOR_ID_LINKSYSPCI_VENDOR_ID_LINKSYS 0x11ad pci_ids.h 　
18428
 PCI_VENDOR_ID_LITEONPCI_VENDOR_ID_LITEON 0x11ad pci_ids.h 　
18429
 PCI_VENDOR_ID_V3PCI_VENDOR_ID_V3 0x11b0 pci_ids.h 　
18430
 PCI_VENDOR_ID_NPPCI_VENDOR_ID_NP 0x11bc pci_ids.h 　
18431
 PCI_VENDOR_ID_ATTPCI_VENDOR_ID_ATT 0x11c1 pci_ids.h 　
18432
 PCI_VENDOR_ID_SPECIALIXPCI_VENDOR_ID_SPECIALIX 0x11cb pci_ids.h 　
18433
 PCI_VENDOR_ID_AURAVISIONPCI_VENDOR_ID_AURAVISION 0x11d1 pci_ids.h 　
18434
 PCI_VENDOR_ID_ANALOG_DEVICESPCI_VENDOR_ID_ANALOG_DEVICES 0x11d4 pci_ids.h 　
18435
 PCI_VENDOR_ID_IKONPCI_VENDOR_ID_IKON 0x11d5 pci_ids.h 　
18436
 PCI_VENDOR_ID_ZORANPCI_VENDOR_ID_ZORAN 0x11de pci_ids.h 　
18437
 PCI_VENDOR_ID_KINETICPCI_VENDOR_ID_KINETIC 0x11f4 pci_ids.h 　
18438
 PCI_VENDOR_ID_COMPEXPCI_VENDOR_ID_COMPEX 0x11f6 pci_ids.h 　
18439
 PCI_VENDOR_ID_RPPCI_VENDOR_ID_RP 0x11fe pci_ids.h 　
18440
 PCI_VENDOR_ID_CYCLADESPCI_VENDOR_ID_CYCLADES 0x120e pci_ids.h 　
18441
 PCI_VENDOR_ID_ESSENTIALPCI_VENDOR_ID_ESSENTIAL 0x120f pci_ids.h 　
18442
 PCI_VENDOR_ID_O2PCI_VENDOR_ID_O2 0x1217 pci_ids.h 　
18443
 PCI_VENDOR_ID_3DFXPCI_VENDOR_ID_3DFX 0x121a pci_ids.h 　
18444
 PCI_VENDOR_ID_SIGMADESPCI_VENDOR_ID_SIGMADES 0x1236 pci_ids.h 　
18445
 PCI_VENDOR_ID_CCUBEPCI_VENDOR_ID_CCUBE 0x123f pci_ids.h 　
18446
 PCI_VENDOR_ID_AVMPCI_VENDOR_ID_AVM 0x1244 pci_ids.h 　
18447
 PCI_VENDOR_ID_DIPIXPCI_VENDOR_ID_DIPIX 0x1246 pci_ids.h 　
18448
 PCI_VENDOR_ID_STALLIONPCI_VENDOR_ID_STALLION 0x124d pci_ids.h 　
18449
 PCI_VENDOR_ID_OPTIBASEPCI_VENDOR_ID_OPTIBASE 0x1255 pci_ids.h 　
18450
 PCI_VENDOR_ID_ESSPCI_VENDOR_ID_ESS 0x125d pci_ids.h 　
18451
 PCI_VENDOR_ID_HARRISPCI_VENDOR_ID_HARRIS 0x1260 pci_ids.h 　
18452
 PCI_VENDOR_ID_SATSAGEMPCI_VENDOR_ID_SATSAGEM 0x1267 pci_ids.h 　
18453
 PCI_VENDOR_ID_HUGHESPCI_VENDOR_ID_HUGHES 0x1273 pci_ids.h 　
18454
 PCI_VENDOR_ID_ENSONIQPCI_VENDOR_ID_ENSONIQ 0x1274 pci_ids.h 　
18455
 PCI_VENDOR_ID_ROCKWELLPCI_VENDOR_ID_ROCKWELL 0x127A pci_ids.h 　
18456
 PCI_VENDOR_ID_DAVICOMPCI_VENDOR_ID_DAVICOM 0x1282 pci_ids.h 　
18457
 PCI_VENDOR_ID_ITEPCI_VENDOR_ID_ITE 0x1283 pci_ids.h 　
18458
 PCI_VENDOR_ID_ESS_OLDPCI_VENDOR_ID_ESS_OLD 0x1285 pci_ids.h 　
18459
 PCI_VENDOR_ID_ALTEONPCI_VENDOR_ID_ALTEON 0x12ae pci_ids.h 　
18460
 PCI_VENDOR_ID_USRPCI_VENDOR_ID_USR 0x12B9 pci_ids.h 　
18461
 PCI_VENDOR_ID_HOLTEKPCI_VENDOR_ID_HOLTEK 0x12c3 pci_ids.h 　
18462
 PCI_SUBVENDOR_ID_CONNECT_TECHPCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4 pci_ids.h 　
18463
 PCI_VENDOR_ID_PICTURELPCI_VENDOR_ID_PICTUREL 0x12c5 pci_ids.h 　
18464
 PCI_VENDOR_ID_NVIDIA_SGSPCI_VENDOR_ID_NVIDIA_SGS 0x12d2 pci_ids.h 　
18465
 PCI_SUBVENDOR_ID_CHASE_PCIFASTPCI_SUBVENDOR_ID_CHASE_PCIFAST 0x12E0 pci_ids.h 　
18466
 PCI_SUBVENDOR_ID_CHASE_PCIRASPCI_SUBVENDOR_ID_CHASE_PCIRAS 0x124D pci_ids.h 　
18467
 PCI_VENDOR_ID_AUREALPCI_VENDOR_ID_AUREAL 0x12eb pci_ids.h 　
18468
 PCI_VENDOR_ID_CBOARDSPCI_VENDOR_ID_CBOARDS 0x1307 pci_ids.h 　
18469
 PCI_VENDOR_ID_SIIGPCI_VENDOR_ID_SIIG 0x131f pci_ids.h 　
18470
 PCI_VENDOR_ID_ADMTEKPCI_VENDOR_ID_ADMTEK 0x1317 pci_ids.h 　
18471
 PCI_VENDOR_ID_DOMEXPCI_VENDOR_ID_DOMEX 0x134a pci_ids.h 　
18472
 PCI_VENDOR_ID_QUATECHPCI_VENDOR_ID_QUATECH 0x135C pci_ids.h 　
18473
 PCI_VENDOR_ID_SEALEVELPCI_VENDOR_ID_SEALEVEL 0x135e pci_ids.h 　
18474
 PCI_VENDOR_ID_HYPERCOPEPCI_VENDOR_ID_HYPERCOPE 0x1365 pci_ids.h 　
18475
 PCI_VENDOR_ID_KAWASAKIPCI_VENDOR_ID_KAWASAKI 0x136b pci_ids.h 　
18476
 PCI_VENDOR_ID_LMCPCI_VENDOR_ID_LMC 0x1376 pci_ids.h 　
18477
 PCI_VENDOR_ID_NETGEARPCI_VENDOR_ID_NETGEAR 0x1385 pci_ids.h 　
18478
 PCI_VENDOR_ID_APPLICOMPCI_VENDOR_ID_APPLICOM 0x1389 pci_ids.h 　
18479
 PCI_VENDOR_ID_MOXAPCI_VENDOR_ID_MOXA 0x1393 pci_ids.h 　
18480
 PCI_VENDOR_ID_CCDPCI_VENDOR_ID_CCD 0x1397 pci_ids.h 　
18481
 PCI_VENDOR_ID_MICROGATEPCI_VENDOR_ID_MICROGATE 0x13c0 pci_ids.h 　
18482
 PCI_VENDOR_ID_3WAREPCI_VENDOR_ID_3WARE 0x13C1 pci_ids.h 　
18483
 PCI_VENDOR_ID_ABOCOMPCI_VENDOR_ID_ABOCOM 0x13D1 pci_ids.h 　
18484
 PCI_VENDOR_ID_CMEDIAPCI_VENDOR_ID_CMEDIA 0x13f6 pci_ids.h 　
18485
 PCI_VENDOR_ID_LAVAPCI_VENDOR_ID_LAVA 0x1407 pci_ids.h 　
18486
 PCI_VENDOR_ID_TIMEDIAPCI_VENDOR_ID_TIMEDIA 0x1409 pci_ids.h 　
18487
 PCI_VENDOR_ID_OXSEMIPCI_VENDOR_ID_OXSEMI 0x1415 pci_ids.h 　
18488
 PCI_VENDOR_ID_AIRONETPCI_VENDOR_ID_AIRONET 0x14b9 pci_ids.h 　
18489
 PCI_VENDOR_ID_TITANPCI_VENDOR_ID_TITAN 0x14D2 pci_ids.h 　
18490
 PCI_VENDOR_ID_PANACOMPCI_VENDOR_ID_PANACOM 0x14d4 pci_ids.h 　
18491
 PCI_VENDOR_ID_BROADCOMPCI_VENDOR_ID_BROADCOM 0x14e4 pci_ids.h 　
18492
 PCI_VENDOR_ID_SYBAPCI_VENDOR_ID_SYBA 0x1592 pci_ids.h 　
18493
 PCI_VENDOR_ID_MORETONPCI_VENDOR_ID_MORETON 0x15aa pci_ids.h 　
18494
 PCI_VENDOR_ID_ZOLTRIXPCI_VENDOR_ID_ZOLTRIX 0x15b0 pci_ids.h 　
18495
 PCI_VENDOR_ID_PDCPCI_VENDOR_ID_PDC 0x15e9 pci_ids.h 　
18496
 PCI_VENDOR_ID_FSCPCI_VENDOR_ID_FSC 0x1734 pci_ids.h 　
18497
 PCI_VENDOR_ID_SYMPHONYPCI_VENDOR_ID_SYMPHONY 0x1c1c pci_ids.h 　
18498
 PCI_VENDOR_ID_TEKRAMPCI_VENDOR_ID_TEKRAM 0x1de1 pci_ids.h 　
18499
 PCI_VENDOR_ID_3DLABSPCI_VENDOR_ID_3DLABS 0x3d3d pci_ids.h 　
18500
 PCI_VENDOR_ID_AVANCEPCI_VENDOR_ID_AVANCE 0x4005 pci_ids.h 　
18501
 PCI_VENDOR_ID_AKSPCI_VENDOR_ID_AKS 0x416c pci_ids.h 　
18502
 PCI_VENDOR_ID_NETVINPCI_VENDOR_ID_NETVIN 0x4a14 pci_ids.h 　
18503
 PCI_VENDOR_ID_S3PCI_VENDOR_ID_S3 0x5333 pci_ids.h 　
18504
 PCI_VENDOR_ID_DCIPCI_VENDOR_ID_DCI 0x6666 pci_ids.h 　
18505
 PCI_VENDOR_ID_GENROCOPCI_VENDOR_ID_GENROCO 0x5555 pci_ids.h 　
18506
 PCI_VENDOR_ID_INTELPCI_VENDOR_ID_INTEL 0x8086 pci_ids.h 　
18507
 PCI_VENDOR_ID_COMPUTONEPCI_VENDOR_ID_COMPUTONE 0x8e0e pci_ids.h 　
18508
 PCI_SUBVENDOR_ID_COMPUTONEPCI_SUBVENDOR_ID_COMPUTONE 0x8e0e pci_ids.h 　
18509
 PCI_VENDOR_ID_KTIPCI_VENDOR_ID_KTI 0x8e2e pci_ids.h 　
18510
 PCI_VENDOR_ID_ADAPTECPCI_VENDOR_ID_ADAPTEC 0x9004 pci_ids.h 　
18511
 PCI_VENDOR_ID_ADAPTEC2PCI_VENDOR_ID_ADAPTEC2 0x9005 pci_ids.h 　
18512
 PCI_VENDOR_ID_ATRONICSPCI_VENDOR_ID_ATRONICS 0x907f pci_ids.h 　
18513
 PCI_VENDOR_ID_HOLTEK2PCI_VENDOR_ID_HOLTEK2 0x9412 pci_ids.h 　
18514
 PCI_VENDOR_ID_NETMOSPCI_VENDOR_ID_NETMOS 0x9710 pci_ids.h 　
18515
 PCI_SUBVENDOR_ID_EXSYSPCI_SUBVENDOR_ID_EXSYS 0xd84d pci_ids.h 　
18516
 PCI_VENDOR_ID_TIGERJETPCI_VENDOR_ID_TIGERJET 0xe159 pci_ids.h 　
18517
 PCI_VENDOR_ID_ARKPCI_VENDOR_ID_ARK 0xedd8 pci_ids.h 　
18518
 POSIX_FD_MINPOSIX_FD_MIN ( 1 ) posix_io.h 　
18519
 POSIX_FD_MAXPOSIX_FD_MAX ( 31 ) posix_io.h 　
18520
 RESOLV_NUMERICRESOLV_NUMERIC 01 resolv.h 　
18521
 RESOLV_NORMALRESOLV_NORMAL 02 resolv.h 　
18522
 RESOLVERSRESOLVERS __table ( struct resolver, "resolvers" ) resolv.h 　
18523
 DEFAULT_MIN_TIMEOUTDEFAULT_MIN_TIMEOUT ( TICKS_PER_SEC / 4 ) retry.h 　
18524
 DEFAULT_MAX_TIMEOUTDEFAULT_MAX_TIMEOUT ( 10 * TICKS_PER_SEC ) retry.h 　
18525
 SANBOOT_PROTOCOLSSANBOOT_PROTOCOLS __table ( struct sanboot_protocol, "sanboot_protocols" ) sanboot.h 　
18526
 __sanboot_protocol__sanboot_protocol __table_entry ( SANBOOT_PROTOCOLS, 01 ) sanboot.h 　
18527
 SCSI_OPCODE_READ_10SCSI_OPCODE_READ_10 0x28 scsi.h *< READ (10)
18528
 SCSI_OPCODE_READ_16SCSI_OPCODE_READ_16 0x88 scsi.h *< READ (16)
18529
 SCSI_OPCODE_WRITE_10SCSI_OPCODE_WRITE_10 0x2a scsi.h *< WRITE (10)
18530
 SCSI_OPCODE_WRITE_16SCSI_OPCODE_WRITE_16 0x8a scsi.h *< WRITE (16)
18531
 SCSI_OPCODE_READ_CAPACITY_10SCSI_OPCODE_READ_CAPACITY_10 0x25 scsi.h *< READ CAPACITY (10)
18532
 SCSI_OPCODE_SERVICE_ACTION_INSCSI_OPCODE_SERVICE_ACTION_IN 0x9e scsi.h *< SERVICE ACTION IN
18533
 SCSI_SERVICE_ACTION_READ_CAPACISCSI_SERVICE_ACTION_READ_CAPACI 0x10 scsi.h *< READ CAPACITY (16)
18534
 SCSI_FL_FUA_NVSCSI_FL_FUA_NV 0x02 scsi.h *< Force unit access to NVS
18535
 SCSI_FL_FUASCSI_FL_FUA 0x08 scsi.h *< Force unit access
18536
 SCSI_FL_DPOSCSI_FL_DPO 0x10 scsi.h *< Disable cache page out
18537
 SCSI_CDB_FORMATSCSI_CDB_FORMAT "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:" \ "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x" scsi.h 　
18538
 SETTINGSSETTINGS __table ( struct setting, "settings" ) settings.h 　
18539
 __setting__setting __table_entry ( SETTINGS, 01 ) settings.h 　
18540
 SETTING_TYPESSETTING_TYPES __table ( struct setting_type, "setting_types" ) settings.h 　
18541
 __setting_type__setting_type __table_entry ( SETTING_TYPES, 01 ) settings.h 　
18542
 SETTINGS_APPLICATORSSETTINGS_APPLICATORS __table ( struct settings_applicator, "settings_applicators" ) settings.h 　
18543
 __settings_applicator__settings_applicator __table_entry ( SETTINGS_APPLICATORS, 01 ) settings.h 　
18544
 SHA1_CTX_SIZESHA1_CTX_SIZE sizeof ( SHA1_CTX ) sha1.h 　
18545
 SHA1_DIGEST_SIZESHA1_DIGEST_SIZE SHA1_SIZE sha1.h 　
18546
 SMBIOS_SIGNATURESMBIOS_SIGNATURE ( ( '_' << 0 ) + ( 'S' << 8 ) + ( 'M' << 16 ) + ( '_' << 24 ) ) smbios.h 　
18547
 SMBIOS_TYPE_SYSTEM_INFORMATIONSMBIOS_TYPE_SYSTEM_INFORMATION 1 smbios.h 　
18548
 SMBIOS_TYPE_ENCLOSURE_INFORMATISMBIOS_TYPE_ENCLOSURE_INFORMATI 3 smbios.h 　
18549
 TCP_SOCK_STREAMTCP_SOCK_STREAM 0x1 socket.h 　
18550
 SOCK_STREAMSOCK_STREAM tcp_sock_stream socket.h 　
18551
 UDP_SOCK_DGRAMUDP_SOCK_DGRAM 0x2 socket.h 　
18552
 SOCK_DGRAMSOCK_DGRAM udp_sock_dgram socket.h 　
18553
 AF_INETAF_INET 1 socket.h *< IPv4 Internet addresses
18554
 AF_INET6AF_INET6 2 socket.h *< IPv6 Internet addresses
18555
 SA_LENSA_LEN 32 socket.h 　
18556
 SPI_WRSRSPI_WRSR 0x01 spi.h 　
18557
 SPI_WRITESPI_WRITE 0x02 spi.h 　
18558
 SPI_READSPI_READ 0x03 spi.h 　
18559
 SPI_WRDISPI_WRDI 0x04 spi.h 　
18560
 SPI_RDSRSPI_RDSR 0x05 spi.h 　
18561
 SPI_WRENSPI_WREN 0x06 spi.h 　
18562
 ATMEL_SECTOR_ERASEATMEL_SECTOR_ERASE 0x52 spi.h 　
18563
 ATMEL_CHIP_ERASEATMEL_CHIP_ERASE 0x62 spi.h 　
18564
 ATMEL_RDIDATMEL_RDID 0x15 spi.h 　
18565
 SPI_STATUS_WPENSPI_STATUS_WPEN 0x80 spi.h 　
18566
 SPI_STATUS_BP2SPI_STATUS_BP2 0x10 spi.h 　
18567
 SPI_STATUS_BP1SPI_STATUS_BP1 0x08 spi.h 　
18568
 SPI_STATUS_BP0SPI_STATUS_BP0 0x04 spi.h 　
18569
 SPI_STATUS_WENSPI_STATUS_WEN 0x02 spi.h 　
18570
 SPI_STATUS_NRDYSPI_STATUS_NRDY 0x01 spi.h 　
18571
 SPI_AUTODETECT_ADDRESS_LENSPI_AUTODETECT_ADDRESS_LEN 0 spi.h 　
18572
 SPI_MODE_CPHASPI_MODE_CPHA 0x01 spi.h 　
18573
 SPI_MODE_CPOLSPI_MODE_CPOL 0x02 spi.h 　
18574
 SPI_MODE_SSPOLSPI_MODE_SSPOL 0x10 spi.h 　
18575
 SPI_MODE_MICROWIRESPI_MODE_MICROWIRE 1 spi.h 　
18576
 SPI_MODE_MICROWIRE_PLUSSPI_MODE_MICROWIRE_PLUS 0 spi.h 　
18577
 SPI_MODE_THREEWIRESPI_MODE_THREEWIRE ( SPI_MODE_MICROWIRE_PLUS | SPI_MODE_SSPOL ) spi.h 　
18578
 SPI_BIT_UDELAYSPI_BIT_UDELAY 1 spi_bit.h 　
18579
 SPI_BIT_BIG_ENDIANSPI_BIT_BIG_ENDIAN 0 spi_bit.h 　
18580
 SPI_BIT_LITTLE_ENDIANSPI_BIT_LITTLE_ENDIAN 1 spi_bit.h 　
18581
 SRP_LOGIN_REQSRP_LOGIN_REQ 0x00 srp.h 　
18582
 SRP_LOGIN_REQ_FMT_IDBDSRP_LOGIN_REQ_FMT_IDBD 0x04 srp.h 　
18583
 SRP_LOGIN_REQ_FMT_DDBDSRP_LOGIN_REQ_FMT_DDBD 0x02 srp.h 　
18584
 SRP_LOGIN_REQ_FLAG_AESOLNTSRP_LOGIN_REQ_FLAG_AESOLNT 0x40 srp.h 　
18585
 SRP_LOGIN_REQ_FLAG_CRSOLNTSRP_LOGIN_REQ_FLAG_CRSOLNT 0x20 srp.h 　
18586
 SRP_LOGIN_REQ_FLAG_LOSOLNTSRP_LOGIN_REQ_FLAG_LOSOLNT 0x10 srp.h 　
18587
 SRP_LOGIN_REQ_MCA_MASKSRP_LOGIN_REQ_MCA_MASK 0x03 srp.h 　
18588
 SRP_LOGIN_REQ_MCA_SINGLE_CHANNESRP_LOGIN_REQ_MCA_SINGLE_CHANNE 0x00 srp.h 　
18589
 SRP_LOGIN_REQ_MCA_MULTIPLE_CHANSRP_LOGIN_REQ_MCA_MULTIPLE_CHAN 0x01 srp.h 　
18590
 SRP_LOGIN_RSPSRP_LOGIN_RSP 0xc0 srp.h 　
18591
 SRP_LOGIN_RSP_FMT_IDBDSRP_LOGIN_RSP_FMT_IDBD 0x04 srp.h 　
18592
 SRP_LOGIN_RSP_FMT_DDBDSRP_LOGIN_RSP_FMT_DDBD 0x02 srp.h 　
18593
 SRP_LOGIN_RSP_FLAG_SOLNTSUPSRP_LOGIN_RSP_FLAG_SOLNTSUP 0x10 srp.h 　
18594
 SRP_LOGIN_RSP_MCR_MASKSRP_LOGIN_RSP_MCR_MASK 0x03 srp.h 　
18595
 SRP_LOGIN_RSP_MCR_NO_EXISTING_CSRP_LOGIN_RSP_MCR_NO_EXISTING_C 0x00 srp.h 　
18596
 SRP_LOGIN_RSP_MCR_EXISTING_CHANSRP_LOGIN_RSP_MCR_EXISTING_CHAN 0x01 srp.h 　
18597
 SRP_LOGIN_RSP_MCR_EXISTING_CHANSRP_LOGIN_RSP_MCR_EXISTING_CHAN 0x02 srp.h 　
18598
 SRP_LOGIN_REJSRP_LOGIN_REJ 0xc2 srp.h 　
18599
 SRP_LOGIN_REJ_REASON_UNKNOWNSRP_LOGIN_REJ_REASON_UNKNOWN 0x00010000UL srp.h 　
18600
 SRP_LOGIN_REJ_REASON_INSUFFICIESRP_LOGIN_REJ_REASON_INSUFFICIE 0x00010001UL srp.h 　
18601
 SRP_LOGIN_REJ_REASON_BAD_MAX_I_SRP_LOGIN_REJ_REASON_BAD_MAX_I_ 0x00010002UL srp.h 　
18602
 SRP_LOGIN_REJ_REASON_CANNOT_ASSSRP_LOGIN_REJ_REASON_CANNOT_ASS 0x00010003UL srp.h 　
18603
 SRP_LOGIN_REJ_REASON_UNSUPPORTESRP_LOGIN_REJ_REASON_UNSUPPORTE 0x00010004UL srp.h 　
18604
 SRP_LOGIN_REJ_REASON_NO_MULTIPLSRP_LOGIN_REJ_REASON_NO_MULTIPL 0x00010005UL srp.h 　
18605
 SRP_LOGIN_REJ_REASON_NO_MORE_CHSRP_LOGIN_REJ_REASON_NO_MORE_CH 0x00010006UL srp.h 　
18606
 SRP_LOGIN_REJ_FMT_IDBDSRP_LOGIN_REJ_FMT_IDBD 0x04 srp.h 　
18607
 SRP_LOGIN_REJ_FMT_DDBDSRP_LOGIN_REJ_FMT_DDBD 0x02 srp.h 　
18608
 SRP_I_LOGOUTSRP_I_LOGOUT 0x03 srp.h 　
18609
 SRP_T_LOGOUTSRP_T_LOGOUT 0x80 srp.h 　
18610
 SRP_T_LOGOUT_FLAG_SOLNTSRP_T_LOGOUT_FLAG_SOLNT 0x01 srp.h 　
18611
 SRP_T_LOGOUT_REASON_UNKNOWNSRP_T_LOGOUT_REASON_UNKNOWN 0x00000000UL srp.h 　
18612
 SRP_T_LOGOUT_REASON_INACTIVESRP_T_LOGOUT_REASON_INACTIVE 0x00000001UL srp.h 　
18613
 SRP_T_LOGOUT_REASON_INVALID_TYPSRP_T_LOGOUT_REASON_INVALID_TYP 0x00000002UL srp.h 　
18614
 SRP_T_LOGOUT_REASON_SPURIOUS_RESRP_T_LOGOUT_REASON_SPURIOUS_RE 0x00000003UL srp.h 　
18615
 SRP_T_LOGOUT_REASON_MCASRP_T_LOGOUT_REASON_MCA 0x00000004UL srp.h 　
18616
 SRP_T_LOGOUT_UNSUPPORTED_DATA_OSRP_T_LOGOUT_UNSUPPORTED_DATA_O 0x00000005UL srp.h 　
18617
 SRP_T_LOGOUT_UNSUPPORTED_DATA_ISRP_T_LOGOUT_UNSUPPORTED_DATA_I 0x00000006UL srp.h 　
18618
 SRP_T_LOGOUT_INVALID_IU_LENSRP_T_LOGOUT_INVALID_IU_LEN 0x00000008UL srp.h 　
18619
 SRP_TSK_MGMTSRP_TSK_MGMT 0x01 srp.h 　
18620
 SRP_TSK_MGMT_FLAG_UCSOLNTSRP_TSK_MGMT_FLAG_UCSOLNT 0x04 srp.h 　
18621
 SRP_TSK_MGMT_FLAG_SCSOLNTSRP_TSK_MGMT_FLAG_SCSOLNT 0x02 srp.h 　
18622
 SRP_TSK_MGMT_FUNC_ABORT_TASKSRP_TSK_MGMT_FUNC_ABORT_TASK 0x01 srp.h 　
18623
 SRP_TSK_MGMT_FUNC_ABORT_TASK_SESRP_TSK_MGMT_FUNC_ABORT_TASK_SE 0x02 srp.h 　
18624
 SRP_TSK_MGMT_FUNC_CLEAR_TASK_SESRP_TSK_MGMT_FUNC_CLEAR_TASK_SE 0x04 srp.h 　
18625
 SRP_TSK_MGMT_FUNC_LOGICAL_UNIT_SRP_TSK_MGMT_FUNC_LOGICAL_UNIT_ 0x08 srp.h 　
18626
 SRP_TSK_MGMT_FUNC_CLEAR_ACASRP_TSK_MGMT_FUNC_CLEAR_ACA 0x40 srp.h 　
18627
 SRP_CMDSRP_CMD 0x02 srp.h 　
18628
 SRP_CMD_FLAG_UCSOLNTSRP_CMD_FLAG_UCSOLNT 0x04 srp.h 　
18629
 SRP_CMD_FLAG_SCSOLNTSRP_CMD_FLAG_SCSOLNT 0x02 srp.h 　
18630
 SRP_CMD_DO_FMT_MASKSRP_CMD_DO_FMT_MASK 0xf0 srp.h 　
18631
 SRP_CMD_DO_FMT_DIRECTSRP_CMD_DO_FMT_DIRECT 0x10 srp.h 　
18632
 SRP_CMD_DO_FMT_INDIRECTSRP_CMD_DO_FMT_INDIRECT 0x20 srp.h 　
18633
 SRP_CMD_DI_FMT_MASKSRP_CMD_DI_FMT_MASK 0x0f srp.h 　
18634
 SRP_CMD_DI_FMT_DIRECTSRP_CMD_DI_FMT_DIRECT 0x01 srp.h 　
18635
 SRP_CMD_DI_FMT_INDIRECTSRP_CMD_DI_FMT_INDIRECT 0x02 srp.h 　
18636
 SRP_CMD_TASK_ATTR_SIMPLESRP_CMD_TASK_ATTR_SIMPLE 0x00 srp.h 　
18637
 SRP_CMD_TASK_ATTR_QUEUE_HEADSRP_CMD_TASK_ATTR_QUEUE_HEAD 0x01 srp.h 　
18638
 SRP_CMD_TASK_ATTR_ORDEREDSRP_CMD_TASK_ATTR_ORDERED 0x02 srp.h 　
18639
 SRP_CMD_TASK_ATTR_AUTOMATIC_CONSRP_CMD_TASK_ATTR_AUTOMATIC_CON 0x08 srp.h 　
18640
 SRP_RSPSRP_RSP 0xc1 srp.h 　
18641
 SRP_RSP_FLAG_SOLNTSRP_RSP_FLAG_SOLNT 0x01 srp.h 　
18642
 SRP_RSP_VALID_DIUNDERSRP_RSP_VALID_DIUNDER 0x20 srp.h 　
18643
 SRP_RSP_VALID_DIOVERSRP_RSP_VALID_DIOVER 0x10 srp.h 　
18644
 SRP_RSP_VALID_DOUNDERSRP_RSP_VALID_DOUNDER 0x08 srp.h 　
18645
 SRP_RSP_VALID_DOOVERSRP_RSP_VALID_DOOVER 0x04 srp.h 　
18646
 SRP_RSP_VALID_SNSVALIDSRP_RSP_VALID_SNSVALID 0x02 srp.h 　
18647
 SRP_RSP_VALID_RSPVALIDSRP_RSP_VALID_RSPVALID 0x01 srp.h 　
18648
 SRP_CRED_REQSRP_CRED_REQ 0x81 srp.h 　
18649
 SRP_CRED_REQ_FLAG_SOLNTSRP_CRED_REQ_FLAG_SOLNT 0x01 srp.h 　
18650
 SRP_CRED_RSPSRP_CRED_RSP 0x41 srp.h 　
18651
 SRP_AER_REQSRP_AER_REQ 0x82 srp.h 　
18652
 SRP_AER_REQ_FLAG_SOLNTSRP_AER_REQ_FLAG_SOLNT 0x01 srp.h 　
18653
 SRP_AER_RSPSRP_AER_RSP 0x42 srp.h 　
18654
 SRP_MAX_I_T_IU_LENSRP_MAX_I_T_IU_LEN 80 srp.h 　
18655
 SRP_MAX_RETRIESSRP_MAX_RETRIES 3 srp.h 　
18656
 ICC_ALIGN_HACK_FACTORICC_ALIGN_HACK_FACTOR 128 tables.h 　
18657
 TCP_OPTION_ENDTCP_OPTION_END 0 tcp.h 　
18658
 TCP_OPTION_NOPTCP_OPTION_NOP 1 tcp.h 　
18659
 TCP_OPTION_MSSTCP_OPTION_MSS 2 tcp.h 　
18660
 TCP_OPTION_TSTCP_OPTION_TS 8 tcp.h 　
18661
 TCP_CWRTCP_CWR 0x80 tcp.h 　
18662
 TCP_ECETCP_ECE 0x40 tcp.h 　
18663
 TCP_URGTCP_URG 0x20 tcp.h 　
18664
 TCP_ACKTCP_ACK 0x10 tcp.h 　
18665
 TCP_PSHTCP_PSH 0x08 tcp.h 　
18666
 TCP_RSTTCP_RST 0x04 tcp.h 　
18667
 TCP_SYNTCP_SYN 0x02 tcp.h 　
18668
 TCP_FINTCP_FIN 0x01 tcp.h 　
18669
 TCP_CLOSEDTCP_CLOSED TCP_RST tcp.h 　
18670
 TCP_LISTENTCP_LISTEN 0 tcp.h 　
18671
 TCP_SYN_SENTTCP_SYN_SENT ( TCP_STATE_SENT ( TCP_SYN ) ) tcp.h 　
18672
 TCP_SYN_RCVDTCP_SYN_RCVD ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK ) | \ TCP_STATE_RCVD ( TCP_SYN ) ) tcp.h 　
18673
 TCP_ESTABLISHEDTCP_ESTABLISHED ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK ) | \ TCP_STATE_ACKED ( TCP_SYN ) | \ TCP_STATE_RCVD ( TCP_SYN ) ) tcp.h 　
18674
 TCP_FIN_WAIT_1TCP_FIN_WAIT_1 ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK | TCP_FIN ) | \ TCP_STATE_ACKED ( TCP_SYN ) | \ TCP_STATE_RCVD ( TCP_SYN ) ) tcp.h 　
18675
 TCP_FIN_WAIT_2TCP_FIN_WAIT_2 ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK | TCP_FIN ) | \ TCP_STATE_ACKED ( TCP_SYN | TCP_FIN ) | \ TCP_STATE_RCVD ( TCP_SYN ) tcp.h 　
18676
 TCP_CLOSING_OR_LAST_ACKTCP_CLOSING_OR_LAST_ACK ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK | TCP_FIN ) | \ TCP_STATE_ACKED ( TCP_SYN ) | \ TCP_STATE_RCVD ( TCP_SYN | TCP_FI tcp.h 　
18677
 TCP_TIME_WAITTCP_TIME_WAIT ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK | TCP_FIN ) | \ TCP_STATE_ACKED ( TCP_SYN | TCP_FIN ) | \ TCP_STATE_RCVD ( TCP_SYN | tcp.h 　
18678
 TCP_CLOSE_WAITTCP_CLOSE_WAIT ( TCP_STATE_SENT ( TCP_SYN | TCP_ACK ) | \ TCP_STATE_ACKED ( TCP_SYN ) | \ TCP_STATE_RCVD ( TCP_SYN | TCP_FIN ) ) tcp.h 　
18679
 TCP_MASK_HLENTCP_MASK_HLEN 0xf0 tcp.h 　
18680
 TCP_MIN_PORTTCP_MIN_PORT 1 tcp.h 　
18681
 MAX_HDR_LENMAX_HDR_LEN 100 tcp.h 　
18682
 MAX_IOB_LENMAX_IOB_LEN 1500 tcp.h 　
18683
 MIN_IOB_LENMIN_IOB_LEN MAX_HDR_LEN + 100 tcp.h To account for padding by LL
18684
 TCP_MAX_WINDOW_SIZETCP_MAX_WINDOW_SIZE 4096 tcp.h 　
18685
 TCP_PATH_MTUTCP_PATH_MTU 1460 tcp.h 　
18686
 TCP_MSSTCP_MSS 1460 tcp.h 　
18687
 TCP_MSLTCP_MSL ( 2 * 60 * TICKS_PER_SEC ) tcp.h 　
18688
 TCPIP_EMPTY_CSUMTCPIP_EMPTY_CSUM 0xffff tcpip.h 　
18689
 TCPIP_PROTOCOLSTCPIP_PROTOCOLS __table ( struct tcpip_protocol, "tcpip_protocols" ) tcpip.h 　
18690
 __tcpip_protocol__tcpip_protocol __table_entry ( TCPIP_PROTOCOLS, 01 ) tcpip.h 　
18691
 TCPIP_NET_PROTOCOLSTCPIP_NET_PROTOCOLS __table ( struct tcpip_net_protocol, "tcpip_net_protocols" ) tcpip.h 　
18692
 __tcpip_net_protocol__tcpip_net_protocol __table_entry ( TCPIP_NET_PROTOCOLS, 01 ) tcpip.h 　
18693
 TFTP_PORTTFTP_PORT 69 tftp.h *< Default TFTP server port
18694
 TFTP_DEFAULT_BLKSIZETFTP_DEFAULT_BLKSIZE 512 tftp.h *< Default TFTP data block size
18695
 TFTP_MAX_BLKSIZETFTP_MAX_BLKSIZE 1432 tftp.h 　
18696
 TFTP_RRQTFTP_RRQ 1 tftp.h *< Read request opcode
18697
 TFTP_WRQTFTP_WRQ 2 tftp.h *< Write request opcode
18698
 TFTP_DATATFTP_DATA 3 tftp.h *< Data block opcode
18699
 TFTP_ACKTFTP_ACK 4 tftp.h *< Data block acknowledgement opcode
18700
 TFTP_ERRORTFTP_ERROR 5 tftp.h *< Error opcode
18701
 TFTP_OACKTFTP_OACK 6 tftp.h *< Options acknowledgement opcode
18702
 TFTP_ERR_FILE_NOT_FOUNDTFTP_ERR_FILE_NOT_FOUND 1 tftp.h *< File not found
18703
 TFTP_ERR_ACCESS_DENIEDTFTP_ERR_ACCESS_DENIED 2 tftp.h *< Access violation
18704
 TFTP_ERR_DISK_FULLTFTP_ERR_DISK_FULL 3 tftp.h *< Disk full or allocation exceeded
18705
 TFTP_ERR_ILLEGAL_OPTFTP_ERR_ILLEGAL_OP 4 tftp.h *< Illegal TFTP operation
18706
 TFTP_ERR_UNKNOWN_TIDTFTP_ERR_UNKNOWN_TID 5 tftp.h *< Unknown transfer ID
18707
 TFTP_ERR_FILE_EXISTSTFTP_ERR_FILE_EXISTS 6 tftp.h *< File already exists
18708
 TFTP_ERR_UNKNOWN_USERTFTP_ERR_UNKNOWN_USER 7 tftp.h *< No such user
18709
 TFTP_ERR_BAD_OPTSTFTP_ERR_BAD_OPTS 8 tftp.h *< Option negotiation failed
18710
 MTFTP_PORTMTFTP_PORT 1759 tftp.h *< Default MTFTP server port
18711
 THREEWIRE_READTHREEWIRE_READ 0x6 threewire.h 　
18712
 THREEWIRE_WRITETHREEWIRE_WRITE 0x5 threewire.h 　
18713
 THREEWIRE_EWENTHREEWIRE_EWEN 0x4 threewire.h 　
18714
 THREEWIRE_EWEN_ADDRESSTHREEWIRE_EWEN_ADDRESS INT_MAX threewire.h 　
18715
 THREEWIRE_WRITE_MDELAYTHREEWIRE_WRITE_MDELAY 10 threewire.h 　
18716
 TICKS_PER_SECTICKS_PER_SEC ( ticks_per_sec() ) timer.h 　
18717
 TLS_VERSION_TLS_1_0TLS_VERSION_TLS_1_0 0x0301 tls.h 　
18718
 TLS_VERSION_TLS_1_1TLS_VERSION_TLS_1_1 0x0302 tls.h 　
18719
 TLS_TYPE_CHANGE_CIPHERTLS_TYPE_CHANGE_CIPHER 20 tls.h 　
18720
 TLS_TYPE_ALERTTLS_TYPE_ALERT 21 tls.h 　
18721
 TLS_TYPE_HANDSHAKETLS_TYPE_HANDSHAKE 22 tls.h 　
18722
 TLS_TYPE_DATATLS_TYPE_DATA 23 tls.h 　
18723
 TLS_HELLO_REQUESTTLS_HELLO_REQUEST 0 tls.h 　
18724
 TLS_CLIENT_HELLOTLS_CLIENT_HELLO 1 tls.h 　
18725
 TLS_SERVER_HELLOTLS_SERVER_HELLO 2 tls.h 　
18726
 TLS_CERTIFICATETLS_CERTIFICATE 11 tls.h 　
18727
 TLS_SERVER_KEY_EXCHANGETLS_SERVER_KEY_EXCHANGE 12 tls.h 　
18728
 TLS_CERTIFICATE_REQUESTTLS_CERTIFICATE_REQUEST 13 tls.h 　
18729
 TLS_SERVER_HELLO_DONETLS_SERVER_HELLO_DONE 14 tls.h 　
18730
 TLS_CERTIFICATE_VERIFYTLS_CERTIFICATE_VERIFY 15 tls.h 　
18731
 TLS_CLIENT_KEY_EXCHANGETLS_CLIENT_KEY_EXCHANGE 16 tls.h 　
18732
 TLS_FINISHEDTLS_FINISHED 20 tls.h 　
18733
 TLS_ALERT_WARNINGTLS_ALERT_WARNING 1 tls.h 　
18734
 TLS_ALERT_FATALTLS_ALERT_FATAL 2 tls.h 　
18735
 TLS_RSA_WITH_NULL_MD5TLS_RSA_WITH_NULL_MD5 0x0001 tls.h 　
18736
 TLS_RSA_WITH_NULL_SHATLS_RSA_WITH_NULL_SHA 0x0002 tls.h 　
18737
 TLS_RSA_WITH_AES_128_CBC_SHATLS_RSA_WITH_AES_128_CBC_SHA 0x002f tls.h 　
18738
 TLS_RSA_WITH_AES_256_CBC_SHATLS_RSA_WITH_AES_256_CBC_SHA 0x0035 tls.h 　
18739
 UNULLUNULL ( ( userptr_t ) 0 ) uaccess.h 　
18740
 UDP_MAX_HLENUDP_MAX_HLEN 72 udp.h 　
18741
 UDP_MAX_TXIOBUDP_MAX_TXIOB ETH_MAX_MTU udp.h 　
18742
 UDP_MIN_TXIOBUDP_MIN_TXIOB ETH_ZLEN udp.h 　
18743
 VIRTIO_PCI_HOST_FEATURESVIRTIO_PCI_HOST_FEATURES 0 virtio-pci.h 　
18744
 VIRTIO_PCI_GUEST_FEATURESVIRTIO_PCI_GUEST_FEATURES 4 virtio-pci.h 　
18745
 VIRTIO_PCI_QUEUE_PFNVIRTIO_PCI_QUEUE_PFN 8 virtio-pci.h 　
18746
 VIRTIO_PCI_QUEUE_NUMVIRTIO_PCI_QUEUE_NUM 12 virtio-pci.h 　
18747
 VIRTIO_PCI_QUEUE_SELVIRTIO_PCI_QUEUE_SEL 14 virtio-pci.h 　
18748
 VIRTIO_PCI_QUEUE_NOTIFYVIRTIO_PCI_QUEUE_NOTIFY 16 virtio-pci.h 　
18749
 VIRTIO_PCI_STATUSVIRTIO_PCI_STATUS 18 virtio-pci.h 　
18750
 VIRTIO_PCI_ISRVIRTIO_PCI_ISR 19 virtio-pci.h 　
18751
 VIRTIO_PCI_ISR_CONFIGVIRTIO_PCI_ISR_CONFIG 0x2 virtio-pci.h 　
18752
 VIRTIO_PCI_CONFIGVIRTIO_PCI_CONFIG 20 virtio-pci.h 　
18753
 VIRTIO_PCI_ABI_VERSIONVIRTIO_PCI_ABI_VERSION 0 virtio-pci.h 　
18754
 PAGE_SHIFTPAGE_SHIFT (12) virtio-ring.h 　
18755
 PAGE_SIZEPAGE_SIZE (1<<PAGE_SHIFT) virtio-ring.h 　
18756
 PAGE_MASKPAGE_MASK (PAGE_SIZE-1) virtio-ring.h 　
18757
 VIRTIO_CONFIG_S_ACKNOWLEDGEVIRTIO_CONFIG_S_ACKNOWLEDGE 1 virtio-ring.h 　
18758
 VIRTIO_CONFIG_S_DRIVERVIRTIO_CONFIG_S_DRIVER 2 virtio-ring.h 　
18759
 VIRTIO_CONFIG_S_DRIVER_OKVIRTIO_CONFIG_S_DRIVER_OK 4 virtio-ring.h 　
18760
 VIRTIO_CONFIG_S_FAILEDVIRTIO_CONFIG_S_FAILED 0x80 virtio-ring.h 　
18761
 MAX_QUEUE_NUMMAX_QUEUE_NUM (512) virtio-ring.h 　
18762
 VRING_DESC_F_NEXTVRING_DESC_F_NEXT 1 virtio-ring.h 　
18763
 VRING_DESC_F_WRITEVRING_DESC_F_WRITE 2 virtio-ring.h 　
18764
 VRING_AVAIL_F_NO_INTERRUPTVRING_AVAIL_F_NO_INTERRUPT 1 virtio-ring.h 　
18765
 VRING_USED_F_NO_NOTIFYVRING_USED_F_NO_NOTIFY 1 virtio-ring.h 　
18766
 CONSTCONST const Base.h 　
18767
 STATICSTATIC static Base.h 　
18768
 VOIDVOID void Base.h 　
18769
 TRUETRUE ((BOOLEAN)(1==1)) Base.h 　
18770
 FALSEFALSE ((BOOLEAN)(0==1)) Base.h 　
18771
 NULLNULL ((VOID *) 0) Base.h 　
18772
 BIT0BIT0 0x00000001 Base.h 　
18773
 BIT1BIT1 0x00000002 Base.h 　
18774
 BIT2BIT2 0x00000004 Base.h 　
18775
 BIT3BIT3 0x00000008 Base.h 　
18776
 BIT4BIT4 0x00000010 Base.h 　
18777
 BIT5BIT5 0x00000020 Base.h 　
18778
 BIT6BIT6 0x00000040 Base.h 　
18779
 BIT7BIT7 0x00000080 Base.h 　
18780
 BIT8BIT8 0x00000100 Base.h 　
18781
 BIT9BIT9 0x00000200 Base.h 　
18782
 BIT10BIT10 0x00000400 Base.h 　
18783
 BIT11BIT11 0x00000800 Base.h 　
18784
 BIT12BIT12 0x00001000 Base.h 　
18785
 BIT13BIT13 0x00002000 Base.h 　
18786
 BIT14BIT14 0x00004000 Base.h 　
18787
 BIT15BIT15 0x00008000 Base.h 　
18788
 BIT16BIT16 0x00010000 Base.h 　
18789
 BIT17BIT17 0x00020000 Base.h 　
18790
 BIT18BIT18 0x00040000 Base.h 　
18791
 BIT19BIT19 0x00080000 Base.h 　
18792
 BIT20BIT20 0x00100000 Base.h 　
18793
 BIT21BIT21 0x00200000 Base.h 　
18794
 BIT22BIT22 0x00400000 Base.h 　
18795
 BIT23BIT23 0x00800000 Base.h 　
18796
 BIT24BIT24 0x01000000 Base.h 　
18797
 BIT25BIT25 0x02000000 Base.h 　
18798
 BIT26BIT26 0x04000000 Base.h 　
18799
 BIT27BIT27 0x08000000 Base.h 　
18800
 BIT28BIT28 0x10000000 Base.h 　
18801
 BIT29BIT29 0x20000000 Base.h 　
18802
 BIT30BIT30 0x40000000 Base.h 　
18803
 BIT31BIT31 0x80000000 Base.h 　
18804
 BIT32BIT32 0x0000000100000000UL Base.h 　
18805
 BIT33BIT33 0x0000000200000000UL Base.h 　
18806
 BIT34BIT34 0x0000000400000000UL Base.h 　
18807
 BIT35BIT35 0x0000000800000000UL Base.h 　
18808
 BIT36BIT36 0x0000001000000000UL Base.h 　
18809
 BIT37BIT37 0x0000002000000000UL Base.h 　
18810
 BIT38BIT38 0x0000004000000000UL Base.h 　
18811
 BIT39BIT39 0x0000008000000000UL Base.h 　
18812
 BIT40BIT40 0x0000010000000000UL Base.h 　
18813
 BIT41BIT41 0x0000020000000000UL Base.h 　
18814
 BIT42BIT42 0x0000040000000000UL Base.h 　
18815
 BIT43BIT43 0x0000080000000000UL Base.h 　
18816
 BIT44BIT44 0x0000100000000000UL Base.h 　
18817
 BIT45BIT45 0x0000200000000000UL Base.h 　
18818
 BIT46BIT46 0x0000400000000000UL Base.h 　
18819
 BIT47BIT47 0x0000800000000000UL Base.h 　
18820
 BIT48BIT48 0x0001000000000000UL Base.h 　
18821
 BIT49BIT49 0x0002000000000000UL Base.h 　
18822
 BIT50BIT50 0x0004000000000000UL Base.h 　
18823
 BIT51BIT51 0x0008000000000000UL Base.h 　
18824
 BIT52BIT52 0x0010000000000000UL Base.h 　
18825
 BIT53BIT53 0x0020000000000000UL Base.h 　
18826
 BIT54BIT54 0x0040000000000000UL Base.h 　
18827
 BIT55BIT55 0x0080000000000000UL Base.h 　
18828
 BIT56BIT56 0x0100000000000000UL Base.h 　
18829
 BIT57BIT57 0x0200000000000000UL Base.h 　
18830
 BIT58BIT58 0x0400000000000000UL Base.h 　
18831
 BIT59BIT59 0x0800000000000000UL Base.h 　
18832
 BIT60BIT60 0x1000000000000000UL Base.h 　
18833
 BIT61BIT61 0x2000000000000000UL Base.h 　
18834
 BIT62BIT62 0x4000000000000000UL Base.h 　
18835
 BIT63BIT63 0x8000000000000000UL Base.h 　
18836
 RETURN_SUCCESSRETURN_SUCCESS 0 Base.h 　
18837
 RETURN_LOAD_ERRORRETURN_LOAD_ERROR ENCODE_ERROR (1) Base.h 　
18838
 RETURN_INVALID_PARAMETERRETURN_INVALID_PARAMETER ENCODE_ERROR (2) Base.h 　
18839
 RETURN_UNSUPPORTEDRETURN_UNSUPPORTED ENCODE_ERROR (3) Base.h 　
18840
 RETURN_BAD_BUFFER_SIZERETURN_BAD_BUFFER_SIZE ENCODE_ERROR (4) Base.h 　
18841
 RETURN_BUFFER_TOO_SMALLRETURN_BUFFER_TOO_SMALL ENCODE_ERROR (5) Base.h 　
18842
 RETURN_NOT_READYRETURN_NOT_READY ENCODE_ERROR (6) Base.h 　
18843
 RETURN_DEVICE_ERRORRETURN_DEVICE_ERROR ENCODE_ERROR (7) Base.h 　
18844
 RETURN_WRITE_PROTECTEDRETURN_WRITE_PROTECTED ENCODE_ERROR (8) Base.h 　
18845
 RETURN_OUT_OF_RESOURCESRETURN_OUT_OF_RESOURCES ENCODE_ERROR (9) Base.h 　
18846
 RETURN_VOLUME_CORRUPTEDRETURN_VOLUME_CORRUPTED ENCODE_ERROR (10) Base.h 　
18847
 RETURN_VOLUME_FULLRETURN_VOLUME_FULL ENCODE_ERROR (11) Base.h 　
18848
 RETURN_NO_MEDIARETURN_NO_MEDIA ENCODE_ERROR (12) Base.h 　
18849
 RETURN_MEDIA_CHANGEDRETURN_MEDIA_CHANGED ENCODE_ERROR (13) Base.h 　
18850
 RETURN_NOT_FOUNDRETURN_NOT_FOUND ENCODE_ERROR (14) Base.h 　
18851
 RETURN_ACCESS_DENIEDRETURN_ACCESS_DENIED ENCODE_ERROR (15) Base.h 　
18852
 RETURN_NO_RESPONSERETURN_NO_RESPONSE ENCODE_ERROR (16) Base.h 　
18853
 RETURN_NO_MAPPINGRETURN_NO_MAPPING ENCODE_ERROR (17) Base.h 　
18854
 RETURN_TIMEOUTRETURN_TIMEOUT ENCODE_ERROR (18) Base.h 　
18855
 RETURN_NOT_STARTEDRETURN_NOT_STARTED ENCODE_ERROR (19) Base.h 　
18856
 RETURN_ALREADY_STARTEDRETURN_ALREADY_STARTED ENCODE_ERROR (20) Base.h 　
18857
 RETURN_ABORTEDRETURN_ABORTED ENCODE_ERROR (21) Base.h 　
18858
 RETURN_ICMP_ERRORRETURN_ICMP_ERROR ENCODE_ERROR (22) Base.h 　
18859
 RETURN_TFTP_ERRORRETURN_TFTP_ERROR ENCODE_ERROR (23) Base.h 　
18860
 RETURN_PROTOCOL_ERRORRETURN_PROTOCOL_ERROR ENCODE_ERROR (24) Base.h 　
18861
 RETURN_INCOMPATIBLE_VERSIONRETURN_INCOMPATIBLE_VERSION ENCODE_ERROR (25) Base.h 　
18862
 RETURN_SECURITY_VIOLATIONRETURN_SECURITY_VIOLATION ENCODE_ERROR (26) Base.h 　
18863
 RETURN_CRC_ERRORRETURN_CRC_ERROR ENCODE_ERROR (27) Base.h 　
18864
 RETURN_END_OF_MEDIARETURN_END_OF_MEDIA ENCODE_ERROR (28) Base.h 　
18865
 RETURN_END_OF_FILERETURN_END_OF_FILE ENCODE_ERROR (31) Base.h 　
18866
 RETURN_INVALID_LANGUAGERETURN_INVALID_LANGUAGE ENCODE_ERROR (32) Base.h 　
18867
 RETURN_WARN_UNKNOWN_GLYPHRETURN_WARN_UNKNOWN_GLYPH ENCODE_WARNING (1) Base.h 　
18868
 RETURN_WARN_DELETE_FAILURERETURN_WARN_DELETE_FAILURE ENCODE_WARNING (2) Base.h 　
18869
 RETURN_WARN_WRITE_FAILURERETURN_WARN_WRITE_FAILURE ENCODE_WARNING (3) Base.h 　
18870
 RETURN_WARN_BUFFER_TOO_SMALLRETURN_WARN_BUFFER_TOO_SMALL ENCODE_WARNING (4) Base.h 　
18871
 __GNUC____GNUC__ 1 efi.h 　
18872
 EFI_PROTOCOLSEFI_PROTOCOLS __table ( struct efi_protocol, "efi_protocols" ) efi.h 　
18873
 __efi_protocol__efi_protocol __table_entry ( EFI_PROTOCOLS, 01 ) efi.h 　
18874
 EFI_CONFIG_TABLESEFI_CONFIG_TABLES __table ( struct efi_config_table, "efi_config_tables" ) efi.h 　
18875
 __efi_config_table__efi_config_table __table_entry ( EFI_CONFIG_TABLES, 01 ) efi.h 　
18876
 IOAPI_PREFIX_efiIOAPI_PREFIX_efi __efi_ efi_io.h 　
18877
 PCIAPI_PREFIX_efiPCIAPI_PREFIX_efi __efi_ efi_pci.h 　
18878
 EFIPCI_WIDTH_BYTEEFIPCI_WIDTH_BYTE 0 efi_pci.h 　
18879
 EFIPCI_WIDTH_WORDEFIPCI_WIDTH_WORD 1 efi_pci.h 　
18880
 EFIPCI_WIDTH_DWORDEFIPCI_WIDTH_DWORD 2 efi_pci.h 　
18881
 SMBIOS_PREFIX_efiSMBIOS_PREFIX_efi __efi_ efi_smbios.h 　
18882
 TIMER_PREFIX_efiTIMER_PREFIX_efi __efi_ efi_timer.h 　
18883
 UACCESS_PREFIX_efiUACCESS_PREFIX_efi __efi_ efi_uaccess.h 　
18884
 UMALLOC_PREFIX_efiUMALLOC_PREFIX_efi __efi_ efi_umalloc.h 　
18885
 EFI_PC_ANSI_GUIDEFI_PC_ANSI_GUID { \ 0xe0c14753, 0xf9be, 0x11d2, {0x9a, 0x0c, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ } PcAnsi.h 　
18886
 EFI_VT_100_GUIDEFI_VT_100_GUID { \ 0xdfa66065, 0xb419, 0x11d3, {0x9a, 0x2d, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ } PcAnsi.h 　
18887
 EFI_VT_100_PLUS_GUIDEFI_VT_100_PLUS_GUID { \ 0x7baec70b, 0x57e0, 0x4c76, {0x8e, 0x87, 0x2f, 0x9e, 0x28, 0x08, 0x83, 0x43 } \ } PcAnsi.h 　
18888
 EFI_VT_UTF8_GUIDEFI_VT_UTF8_GUID { \ 0xad15a0d6, 0x8bec, 0x4acf, {0xa0, 0x73, 0xd0, 0x1d, 0xe7, 0x7e, 0x2d, 0x88 } \ } PcAnsi.h 　
18889
 EFI_UART_DEVICE_PATH_GUIDEFI_UART_DEVICE_PATH_GUID { \ 0x37499a9d, 0x542f, 0x4c89, {0xa0, 0x26, 0x35, 0xda, 0x14, 0x20, 0x94, 0xe4 } \ } PcAnsi.h 　
18890
 EFI_SAS_DEVICE_PATH_GUIDEFI_SAS_DEVICE_PATH_GUID { \ 0xd487ddb4, 0x008b, 0x11d9, {0xaf, 0xdc, 0x00, 0x10, 0x83, 0xff, 0xca, 0x4d } \ } PcAnsi.h 　
18891
 EFI_SMBIOS_TABLE_GUIDEFI_SMBIOS_TABLE_GUID { \ 0xeb9d2d31, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ } SmBios.h 　
18892
 SMBIOS_TABLE_GUIDSMBIOS_TABLE_GUID EFI_SMBIOS_TABLE_GUID SmBios.h 　
18893
 UINT8_MAXUINT8_MAX 0xff ProcessorBind.h 　
18894
 MAX_BITMAX_BIT 0x80000000 ProcessorBind.h 　
18895
 MAX_2_BITSMAX_2_BITS 0xC0000000 ProcessorBind.h 　
18896
 MAX_ADDRESSMAX_ADDRESS 0xFFFFFFFF ProcessorBind.h 　
18897
 CPU_STACK_ALIGNMENTCPU_STACK_ALIGNMENT sizeof(UINTN) ProcessorBind.h 　
18898
 EFIAPIEFIAPI __cdecl ProcessorBind.h 　
18899
 EFIAPIEFIAPI __attribute__((cdecl,regparm(0))) ProcessorBind.h 　
18900
 GLOBAL_REMOVE_IF_UNREFERENCEDGLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany) ProcessorBind.h 　
18901
 PCI_MAX_SEGMENTPCI_MAX_SEGMENT 0 Pci22.h 　
18902
 PCI_MAX_BUSPCI_MAX_BUS 255 Pci22.h 　
18903
 PCI_MAX_DEVICEPCI_MAX_DEVICE 31 Pci22.h 　
18904
 PCI_MAX_FUNCPCI_MAX_FUNC 7 Pci22.h 　
18905
 PCI_CLASS_OLDPCI_CLASS_OLD 0x00 Pci22.h 　
18906
 PCI_CLASS_OLD_OTHERPCI_CLASS_OLD_OTHER 0x00 Pci22.h 　
18907
 PCI_CLASS_OLD_VGAPCI_CLASS_OLD_VGA 0x01 Pci22.h 　
18908
 PCI_CLASS_MASS_STORAGEPCI_CLASS_MASS_STORAGE 0x01 Pci22.h 　
18909
 PCI_CLASS_MASS_STORAGE_SCSIPCI_CLASS_MASS_STORAGE_SCSI 0x00 Pci22.h 　
18910
 PCI_CLASS_MASS_STORAGE_IDEPCI_CLASS_MASS_STORAGE_IDE 0x01 Pci22.h 　
18911
 PCI_CLASS_MASS_STORAGE_FLOPPYPCI_CLASS_MASS_STORAGE_FLOPPY 0x02 Pci22.h 　
18912
 PCI_CLASS_MASS_STORAGE_IPIPCI_CLASS_MASS_STORAGE_IPI 0x03 Pci22.h 　
18913
 PCI_CLASS_MASS_STORAGE_RAIDPCI_CLASS_MASS_STORAGE_RAID 0x04 Pci22.h 　
18914
 PCI_CLASS_MASS_STORAGE_OTHERPCI_CLASS_MASS_STORAGE_OTHER 0x80 Pci22.h 　
18915
 PCI_CLASS_NETWORKPCI_CLASS_NETWORK 0x02 Pci22.h 　
18916
 PCI_CLASS_NETWORK_ETHERNETPCI_CLASS_NETWORK_ETHERNET 0x00 Pci22.h 　
18917
 PCI_CLASS_NETWORK_TOKENRINGPCI_CLASS_NETWORK_TOKENRING 0x01 Pci22.h 　
18918
 PCI_CLASS_NETWORK_FDDIPCI_CLASS_NETWORK_FDDI 0x02 Pci22.h 　
18919
 PCI_CLASS_NETWORK_ATMPCI_CLASS_NETWORK_ATM 0x03 Pci22.h 　
18920
 PCI_CLASS_NETWORK_ISDNPCI_CLASS_NETWORK_ISDN 0x04 Pci22.h 　
18921
 PCI_CLASS_NETWORK_OTHERPCI_CLASS_NETWORK_OTHER 0x80 Pci22.h 　
18922
 PCI_CLASS_DISPLAYPCI_CLASS_DISPLAY 0x03 Pci22.h 　
18923
 PCI_CLASS_DISPLAY_VGAPCI_CLASS_DISPLAY_VGA 0x00 Pci22.h 　
18924
 PCI_IF_VGA_VGAPCI_IF_VGA_VGA 0x00 Pci22.h 　
18925
 PCI_IF_VGA_8514PCI_IF_VGA_8514 0x01 Pci22.h 　
18926
 PCI_CLASS_DISPLAY_XGAPCI_CLASS_DISPLAY_XGA 0x01 Pci22.h 　
18927
 PCI_CLASS_DISPLAY_3DPCI_CLASS_DISPLAY_3D 0x02 Pci22.h 　
18928
 PCI_CLASS_DISPLAY_OTHERPCI_CLASS_DISPLAY_OTHER 0x80 Pci22.h 　
18929
 PCI_CLASS_DISPLAY_GFXPCI_CLASS_DISPLAY_GFX 0x80 Pci22.h 　
18930
 PCI_CLASS_MEDIAPCI_CLASS_MEDIA 0x04 Pci22.h 　
18931
 PCI_CLASS_MEDIA_VIDEOPCI_CLASS_MEDIA_VIDEO 0x00 Pci22.h 　
18932
 PCI_CLASS_MEDIA_AUDIOPCI_CLASS_MEDIA_AUDIO 0x01 Pci22.h 　
18933
 PCI_CLASS_MEDIA_TELEPHONEPCI_CLASS_MEDIA_TELEPHONE 0x02 Pci22.h 　
18934
 PCI_CLASS_MEDIA_OTHERPCI_CLASS_MEDIA_OTHER 0x80 Pci22.h 　
18935
 PCI_CLASS_MEMORY_CONTROLLERPCI_CLASS_MEMORY_CONTROLLER 0x05 Pci22.h 　
18936
 PCI_CLASS_MEMORY_RAMPCI_CLASS_MEMORY_RAM 0x00 Pci22.h 　
18937
 PCI_CLASS_MEMORY_FLASHPCI_CLASS_MEMORY_FLASH 0x01 Pci22.h 　
18938
 PCI_CLASS_MEMORY_OTHERPCI_CLASS_MEMORY_OTHER 0x80 Pci22.h 　
18939
 PCI_CLASS_BRIDGEPCI_CLASS_BRIDGE 0x06 Pci22.h 　
18940
 PCI_CLASS_BRIDGE_HOSTPCI_CLASS_BRIDGE_HOST 0x00 Pci22.h 　
18941
 PCI_CLASS_BRIDGE_ISAPCI_CLASS_BRIDGE_ISA 0x01 Pci22.h 　
18942
 PCI_CLASS_BRIDGE_EISAPCI_CLASS_BRIDGE_EISA 0x02 Pci22.h 　
18943
 PCI_CLASS_BRIDGE_MCAPCI_CLASS_BRIDGE_MCA 0x03 Pci22.h 　
18944
 PCI_CLASS_BRIDGE_P2PPCI_CLASS_BRIDGE_P2P 0x04 Pci22.h 　
18945
 PCI_IF_BRIDGE_P2PPCI_IF_BRIDGE_P2P 0x00 Pci22.h 　
18946
 PCI_IF_BRIDGE_P2P_SUBTRACTIVEPCI_IF_BRIDGE_P2P_SUBTRACTIVE 0x01 Pci22.h 　
18947
 PCI_CLASS_BRIDGE_PCMCIAPCI_CLASS_BRIDGE_PCMCIA 0x05 Pci22.h 　
18948
 PCI_CLASS_BRIDGE_NUBUSPCI_CLASS_BRIDGE_NUBUS 0x06 Pci22.h 　
18949
 PCI_CLASS_BRIDGE_CARDBUSPCI_CLASS_BRIDGE_CARDBUS 0x07 Pci22.h 　
18950
 PCI_CLASS_BRIDGE_RACEWAYPCI_CLASS_BRIDGE_RACEWAY 0x08 Pci22.h 　
18951
 PCI_CLASS_BRIDGE_OTHERPCI_CLASS_BRIDGE_OTHER 0x80 Pci22.h 　
18952
 PCI_CLASS_BRIDGE_ISA_PDECODEPCI_CLASS_BRIDGE_ISA_PDECODE 0x80 Pci22.h 　
18953
 PCI_CLASS_SCCPCI_CLASS_SCC 0x07 Pci22.h < Simple communications controllers
18954
 PCI_SUBCLASS_SERIALPCI_SUBCLASS_SERIAL 0x00 Pci22.h 　
18955
 PCI_IF_GENERIC_XTPCI_IF_GENERIC_XT 0x00 Pci22.h 　
18956
 PCI_IF_16450PCI_IF_16450 0x01 Pci22.h 　
18957
 PCI_IF_16550PCI_IF_16550 0x02 Pci22.h 　
18958
 PCI_IF_16650PCI_IF_16650 0x03 Pci22.h 　
18959
 PCI_IF_16750PCI_IF_16750 0x04 Pci22.h 　
18960
 PCI_IF_16850PCI_IF_16850 0x05 Pci22.h 　
18961
 PCI_IF_16950PCI_IF_16950 0x06 Pci22.h 　
18962
 PCI_SUBCLASS_PARALLELPCI_SUBCLASS_PARALLEL 0x01 Pci22.h 　
18963
 PCI_IF_PARALLEL_PORTPCI_IF_PARALLEL_PORT 0x00 Pci22.h 　
18964
 PCI_IF_BI_DIR_PARALLEL_PORTPCI_IF_BI_DIR_PARALLEL_PORT 0x01 Pci22.h 　
18965
 PCI_IF_ECP_PARALLEL_PORTPCI_IF_ECP_PARALLEL_PORT 0x02 Pci22.h 　
18966
 PCI_IF_1284_CONTROLLERPCI_IF_1284_CONTROLLER 0x03 Pci22.h 　
18967
 PCI_IF_1284_DEVICEPCI_IF_1284_DEVICE 0xFE Pci22.h 　
18968
 PCI_SUBCLASS_MULTIPORT_SERIALPCI_SUBCLASS_MULTIPORT_SERIAL 0x02 Pci22.h 　
18969
 PCI_SUBCLASS_MODEMPCI_SUBCLASS_MODEM 0x03 Pci22.h 　
18970
 PCI_IF_GENERIC_MODEMPCI_IF_GENERIC_MODEM 0x00 Pci22.h 　
18971
 PCI_IF_16450_MODEMPCI_IF_16450_MODEM 0x01 Pci22.h 　
18972
 PCI_IF_16550_MODEMPCI_IF_16550_MODEM 0x02 Pci22.h 　
18973
 PCI_IF_16650_MODEMPCI_IF_16650_MODEM 0x03 Pci22.h 　
18974
 PCI_IF_16750_MODEMPCI_IF_16750_MODEM 0x04 Pci22.h 　
18975
 PCI_SUBCLASS_SCC_OTHERPCI_SUBCLASS_SCC_OTHER 0x80 Pci22.h 　
18976
 PCI_CLASS_SYSTEM_PERIPHERALPCI_CLASS_SYSTEM_PERIPHERAL 0x08 Pci22.h 　
18977
 PCI_SUBCLASS_PICPCI_SUBCLASS_PIC 0x00 Pci22.h 　
18978
 PCI_IF_8259_PICPCI_IF_8259_PIC 0x00 Pci22.h 　
18979
 PCI_IF_ISA_PICPCI_IF_ISA_PIC 0x01 Pci22.h 　
18980
 PCI_IF_EISA_PICPCI_IF_EISA_PIC 0x02 Pci22.h 　
18981
 PCI_IF_APIC_CONTROLLERPCI_IF_APIC_CONTROLLER 0x10 Pci22.h < I/O APIC interrupt controller , 32 bye none-prefectable memory.
18982
 PCI_IF_APIC_CONTROLLER2PCI_IF_APIC_CONTROLLER2 0x20 Pci22.h 　
18983
 PCI_SUBCLASS_DMAPCI_SUBCLASS_DMA 0x01 Pci22.h 　
18984
 PCI_IF_8237_DMAPCI_IF_8237_DMA 0x00 Pci22.h 　
18985
 PCI_IF_ISA_DMAPCI_IF_ISA_DMA 0x01 Pci22.h 　
18986
 PCI_IF_EISA_DMAPCI_IF_EISA_DMA 0x02 Pci22.h 　
18987
 PCI_SUBCLASS_TIMERPCI_SUBCLASS_TIMER 0x02 Pci22.h 　
18988
 PCI_IF_8254_TIMERPCI_IF_8254_TIMER 0x00 Pci22.h 　
18989
 PCI_IF_ISA_TIMERPCI_IF_ISA_TIMER 0x01 Pci22.h 　
18990
 PCI_IF_EISA_TIMERPCI_IF_EISA_TIMER 0x02 Pci22.h 　
18991
 PCI_SUBCLASS_RTCPCI_SUBCLASS_RTC 0x03 Pci22.h 　
18992
 PCI_IF_GENERIC_RTCPCI_IF_GENERIC_RTC 0x00 Pci22.h 　
18993
 PCI_IF_ISA_RTCPCI_IF_ISA_RTC 0x00 Pci22.h 　
18994
 PCI_SUBCLASS_PNP_CONTROLLERPCI_SUBCLASS_PNP_CONTROLLER 0x04 Pci22.h < HotPlug Controller
18995
 PCI_SUBCLASS_PERIPHERAL_OTHERPCI_SUBCLASS_PERIPHERAL_OTHER 0x80 Pci22.h 　
18996
 PCI_CLASS_INPUT_DEVICEPCI_CLASS_INPUT_DEVICE 0x09 Pci22.h 　
18997
 PCI_SUBCLASS_KEYBOARDPCI_SUBCLASS_KEYBOARD 0x00 Pci22.h 　
18998
 PCI_SUBCLASS_PENPCI_SUBCLASS_PEN 0x01 Pci22.h 　
18999
 PCI_SUBCLASS_MOUSE_CONTROLLERPCI_SUBCLASS_MOUSE_CONTROLLER 0x02 Pci22.h 　
19000
 PCI_SUBCLASS_SCAN_CONTROLLERPCI_SUBCLASS_SCAN_CONTROLLER 0x03 Pci22.h 　
19001
 PCI_SUBCLASS_GAMEPORTPCI_SUBCLASS_GAMEPORT 0x04 Pci22.h 　
19002
 PCI_IF_GAMEPORTPCI_IF_GAMEPORT 0x00 Pci22.h 　
19003
 PCI_IF_GAMEPORT1PCI_IF_GAMEPORT1 0x01 Pci22.h 　
19004
 PCI_SUBCLASS_INPUT_OTHERPCI_SUBCLASS_INPUT_OTHER 0x80 Pci22.h 　
19005
 PCI_CLASS_DOCKING_STATIONPCI_CLASS_DOCKING_STATION 0x0A Pci22.h 　
19006
 PCI_CLASS_PROCESSORPCI_CLASS_PROCESSOR 0x0B Pci22.h 　
19007
 PCI_SUBCLASS_PROC_386PCI_SUBCLASS_PROC_386 0x00 Pci22.h 　
19008
 PCI_SUBCLASS_PROC_486PCI_SUBCLASS_PROC_486 0x01 Pci22.h 　
19009
 PCI_SUBCLASS_PROC_PENTIUMPCI_SUBCLASS_PROC_PENTIUM 0x02 Pci22.h 　
19010
 PCI_SUBCLASS_PROC_ALPHAPCI_SUBCLASS_PROC_ALPHA 0x10 Pci22.h 　
19011
 PCI_SUBCLASS_PROC_POWERPCPCI_SUBCLASS_PROC_POWERPC 0x20 Pci22.h 　
19012
 PCI_SUBCLASS_PROC_MIPSPCI_SUBCLASS_PROC_MIPS 0x30 Pci22.h 　
19013
 PCI_SUBCLASS_PROC_CO_PORCPCI_SUBCLASS_PROC_CO_PORC 0x40 Pci22.h < Co-Processor
19014
 PCI_CLASS_SERIALPCI_CLASS_SERIAL 0x0C Pci22.h 　
19015
 PCI_CLASS_SERIAL_FIREWIREPCI_CLASS_SERIAL_FIREWIRE 0x00 Pci22.h 　
19016
 PCI_IF_1394PCI_IF_1394 0x00 Pci22.h 　
19017
 PCI_IF_1394_OPEN_HCIPCI_IF_1394_OPEN_HCI 0x10 Pci22.h 　
19018
 PCI_CLASS_SERIAL_ACCESS_BUSPCI_CLASS_SERIAL_ACCESS_BUS 0x01 Pci22.h 　
19019
 PCI_CLASS_SERIAL_SSAPCI_CLASS_SERIAL_SSA 0x02 Pci22.h 　
19020
 PCI_CLASS_SERIAL_USBPCI_CLASS_SERIAL_USB 0x03 Pci22.h 　
19021
 PCI_IF_UHCIPCI_IF_UHCI 0x00 Pci22.h 　
19022
 PCI_IF_OHCIPCI_IF_OHCI 0x10 Pci22.h 　
19023
 PCI_IF_USB_OTHERPCI_IF_USB_OTHER 0x80 Pci22.h 　
19024
 PCI_IF_USB_DEVICEPCI_IF_USB_DEVICE 0xFE Pci22.h 　
19025
 PCI_CLASS_SERIAL_FIBRECHANNELPCI_CLASS_SERIAL_FIBRECHANNEL 0x04 Pci22.h 　
19026
 PCI_CLASS_SERIAL_SMBPCI_CLASS_SERIAL_SMB 0x05 Pci22.h 　
19027
 PCI_CLASS_WIRELESSPCI_CLASS_WIRELESS 0x0D Pci22.h 　
19028
 PCI_SUBCLASS_IRDAPCI_SUBCLASS_IRDA 0x00 Pci22.h 　
19029
 PCI_SUBCLASS_IRPCI_SUBCLASS_IR 0x01 Pci22.h 　
19030
 PCI_SUBCLASS_RFPCI_SUBCLASS_RF 0x02 Pci22.h 　
19031
 PCI_SUBCLASS_WIRELESS_OTHERPCI_SUBCLASS_WIRELESS_OTHER 0x80 Pci22.h 　
19032
 PCI_CLASS_INTELLIGENT_IOPCI_CLASS_INTELLIGENT_IO 0x0E Pci22.h 　
19033
 PCI_CLASS_SATELLITEPCI_CLASS_SATELLITE 0x0F Pci22.h 　
19034
 PCI_SUBCLASS_TVPCI_SUBCLASS_TV 0x01 Pci22.h 　
19035
 PCI_SUBCLASS_AUDIOPCI_SUBCLASS_AUDIO 0x02 Pci22.h 　
19036
 PCI_SUBCLASS_VOICEPCI_SUBCLASS_VOICE 0x03 Pci22.h 　
19037
 PCI_SUBCLASS_DATAPCI_SUBCLASS_DATA 0x04 Pci22.h 　
19038
 PCI_SECURITY_CONTROLLERPCI_SECURITY_CONTROLLER 0x10 Pci22.h < Encryption and decryption controller
19039
 PCI_SUBCLASS_NET_COMPUTPCI_SUBCLASS_NET_COMPUT 0x00 Pci22.h 　
19040
 PCI_SUBCLASS_ENTERTAINMENTPCI_SUBCLASS_ENTERTAINMENT 0x10 Pci22.h 　
19041
 PCI_SUBCLASS_SECURITY_OTHERPCI_SUBCLASS_SECURITY_OTHER 0x80 Pci22.h 　
19042
 PCI_CLASS_DPIOPCI_CLASS_DPIO 0x11 Pci22.h 　
19043
 PCI_SUBCLASS_DPIOPCI_SUBCLASS_DPIO 0x00 Pci22.h 　
19044
 PCI_SUBCLASS_DPIO_OTHERPCI_SUBCLASS_DPIO_OTHER 0x80 Pci22.h 　
19045
 HEADER_TYPE_DEVICEHEADER_TYPE_DEVICE 0x00 Pci22.h 　
19046
 HEADER_TYPE_PCI_TO_PCI_BRIDGEHEADER_TYPE_PCI_TO_PCI_BRIDGE 0x01 Pci22.h 　
19047
 HEADER_TYPE_CARDBUS_BRIDGEHEADER_TYPE_CARDBUS_BRIDGE 0x02 Pci22.h 　
19048
 HEADER_TYPE_MULTI_FUNCTIONHEADER_TYPE_MULTI_FUNCTION 0x80 Pci22.h 　
19049
 HEADER_LAYOUT_CODEHEADER_LAYOUT_CODE 0x7f Pci22.h 　
19050
 PCI_BRIDGE_ROMBARPCI_BRIDGE_ROMBAR 0x38 Pci22.h 　
19051
 PCI_MAX_BARPCI_MAX_BAR 0x0006 Pci22.h 　
19052
 PCI_MAX_CONFIG_OFFSETPCI_MAX_CONFIG_OFFSET 0x0100 Pci22.h 　
19053
 PCI_VENDOR_ID_OFFSETPCI_VENDOR_ID_OFFSET 0x00 Pci22.h 　
19054
 PCI_DEVICE_ID_OFFSETPCI_DEVICE_ID_OFFSET 0x02 Pci22.h 　
19055
 PCI_COMMAND_OFFSETPCI_COMMAND_OFFSET 0x04 Pci22.h 　
19056
 PCI_PRIMARY_STATUS_OFFSETPCI_PRIMARY_STATUS_OFFSET 0x06 Pci22.h 　
19057
 PCI_REVISION_ID_OFFSETPCI_REVISION_ID_OFFSET 0x08 Pci22.h 　
19058
 PCI_CLASSCODE_OFFSETPCI_CLASSCODE_OFFSET 0x09 Pci22.h 　
19059
 PCI_CACHELINE_SIZE_OFFSETPCI_CACHELINE_SIZE_OFFSET 0x0C Pci22.h 　
19060
 PCI_LATENCY_TIMER_OFFSETPCI_LATENCY_TIMER_OFFSET 0x0D Pci22.h 　
19061
 PCI_HEADER_TYPE_OFFSETPCI_HEADER_TYPE_OFFSET 0x0E Pci22.h 　
19062
 PCI_BIST_OFFSETPCI_BIST_OFFSET 0x0F Pci22.h 　
19063
 PCI_BASE_ADDRESSREG_OFFSETPCI_BASE_ADDRESSREG_OFFSET 0x10 Pci22.h 　
19064
 PCI_CARDBUS_CIS_OFFSETPCI_CARDBUS_CIS_OFFSET 0x28 Pci22.h 　
19065
 PCI_SVID_OFFSETPCI_SVID_OFFSET 0x2C Pci22.h < SubSystem Vendor id
19066
 PCI_SUBSYSTEM_VENDOR_ID_OFFSETPCI_SUBSYSTEM_VENDOR_ID_OFFSET 0x2C Pci22.h 　
19067
 PCI_SID_OFFSETPCI_SID_OFFSET 0x2E Pci22.h < SubSystem ID
19068
 PCI_SUBSYSTEM_ID_OFFSETPCI_SUBSYSTEM_ID_OFFSET 0x2E Pci22.h 　
19069
 PCI_EXPANSION_ROM_BASEPCI_EXPANSION_ROM_BASE 0x30 Pci22.h 　
19070
 PCI_CAPBILITY_POINTER_OFFSETPCI_CAPBILITY_POINTER_OFFSET 0x34 Pci22.h 　
19071
 PCI_INT_LINE_OFFSETPCI_INT_LINE_OFFSET 0x3C Pci22.h < Interrupt Line Register
19072
 PCI_INT_PIN_OFFSETPCI_INT_PIN_OFFSET 0x3D Pci22.h < Interrupt Pin Register
19073
 PCI_MAXGNT_OFFSETPCI_MAXGNT_OFFSET 0x3E Pci22.h < Max Grant Register
19074
 PCI_MAXLAT_OFFSETPCI_MAXLAT_OFFSET 0x3F Pci22.h < Max Latency Register
19075
 PCI_BRIDGE_PRIMARY_BUS_REGISTERPCI_BRIDGE_PRIMARY_BUS_REGISTER 0x18 Pci22.h 　
19076
 PCI_BRIDGE_SECONDARY_BUS_REGISTPCI_BRIDGE_SECONDARY_BUS_REGIST 0x19 Pci22.h 　
19077
 PCI_BRIDGE_SUBORDINATE_BUS_REGIPCI_BRIDGE_SUBORDINATE_BUS_REGI 0x1a Pci22.h 　
19078
 PCI_BRIDGE_STATUS_REGISTER_OFFSPCI_BRIDGE_STATUS_REGISTER_OFFS 0x1E Pci22.h 　
19079
 PCI_BRIDGE_CONTROL_REGISTER_OFFPCI_BRIDGE_CONTROL_REGISTER_OFF 0x3E Pci22.h 　
19080
 PCI_INT_LINE_UNKNOWNPCI_INT_LINE_UNKNOWN 0xFF Pci22.h 　
19081
 EFI_PCI_COMMAND_IO_SPACEEFI_PCI_COMMAND_IO_SPACE BIT0 Pci22.h < 0x0001
19082
 EFI_PCI_COMMAND_MEMORY_SPACEEFI_PCI_COMMAND_MEMORY_SPACE BIT1 Pci22.h < 0x0002
19083
 EFI_PCI_COMMAND_BUS_MASTEREFI_PCI_COMMAND_BUS_MASTER BIT2 Pci22.h < 0x0004
19084
 EFI_PCI_COMMAND_SPECIAL_CYCLEEFI_PCI_COMMAND_SPECIAL_CYCLE BIT3 Pci22.h < 0x0008
19085
 EFI_PCI_COMMAND_MEMORY_WRITE_ANEFI_PCI_COMMAND_MEMORY_WRITE_AN BIT4 Pci22.h < 0x0010
19086
 EFI_PCI_COMMAND_VGA_PALETTE_SNOEFI_PCI_COMMAND_VGA_PALETTE_SNO BIT5 Pci22.h < 0x0020
19087
 EFI_PCI_COMMAND_PARITY_ERROR_REEFI_PCI_COMMAND_PARITY_ERROR_RE BIT6 Pci22.h < 0x0040
19088
 EFI_PCI_COMMAND_STEPPING_CONTROEFI_PCI_COMMAND_STEPPING_CONTRO BIT7 Pci22.h < 0x0080
19089
 EFI_PCI_COMMAND_SERREFI_PCI_COMMAND_SERR BIT8 Pci22.h < 0x0100
19090
 EFI_PCI_COMMAND_FAST_BACK_TO_BAEFI_PCI_COMMAND_FAST_BACK_TO_BA BIT9 Pci22.h < 0x0200
19091
 EFI_PCI_BRIDGE_CONTROL_PARITY_EEFI_PCI_BRIDGE_CONTROL_PARITY_E BIT0 Pci22.h < 0x0001
19092
 EFI_PCI_BRIDGE_CONTROL_SERREFI_PCI_BRIDGE_CONTROL_SERR BIT1 Pci22.h < 0x0002
19093
 EFI_PCI_BRIDGE_CONTROL_ISAEFI_PCI_BRIDGE_CONTROL_ISA BIT2 Pci22.h < 0x0004
19094
 EFI_PCI_BRIDGE_CONTROL_VGAEFI_PCI_BRIDGE_CONTROL_VGA BIT3 Pci22.h < 0x0008
19095
 EFI_PCI_BRIDGE_CONTROL_VGA_16EFI_PCI_BRIDGE_CONTROL_VGA_16 BIT4 Pci22.h < 0x0010
19096
 EFI_PCI_BRIDGE_CONTROL_MASTER_AEFI_PCI_BRIDGE_CONTROL_MASTER_A BIT5 Pci22.h < 0x0020
19097
 EFI_PCI_BRIDGE_CONTROL_RESET_SEEFI_PCI_BRIDGE_CONTROL_RESET_SE BIT6 Pci22.h < 0x0040
19098
 EFI_PCI_BRIDGE_CONTROL_FAST_BACEFI_PCI_BRIDGE_CONTROL_FAST_BAC BIT7 Pci22.h < 0x0080
19099
 EFI_PCI_BRIDGE_CONTROL_PRIMARY_EFI_PCI_BRIDGE_CONTROL_PRIMARY_ BIT8 Pci22.h < 0x0100
19100
 EFI_PCI_BRIDGE_CONTROL_SECONDAREFI_PCI_BRIDGE_CONTROL_SECONDAR BIT9 Pci22.h < 0x0200
19101
 EFI_PCI_BRIDGE_CONTROL_TIMER_STEFI_PCI_BRIDGE_CONTROL_TIMER_ST BIT10 Pci22.h < 0x0400
19102
 EFI_PCI_BRIDGE_CONTROL_DISCARD_EFI_PCI_BRIDGE_CONTROL_DISCARD_ BIT11 Pci22.h < 0x0800
19103
 EFI_PCI_BRIDGE_CONTROL_IREQINT_EFI_PCI_BRIDGE_CONTROL_IREQINT_ BIT7 Pci22.h < 0x0080
19104
 EFI_PCI_BRIDGE_CONTROL_RANGE0_MEFI_PCI_BRIDGE_CONTROL_RANGE0_M BIT8 Pci22.h < 0x0100
19105
 EFI_PCI_BRIDGE_CONTROL_RANGE1_MEFI_PCI_BRIDGE_CONTROL_RANGE1_M BIT9 Pci22.h < 0x0200
19106
 EFI_PCI_BRIDGE_CONTROL_WRITE_POEFI_PCI_BRIDGE_CONTROL_WRITE_PO BIT10 Pci22.h < 0x0400
19107
 EFI_PCI_STATUS_CAPABILITYEFI_PCI_STATUS_CAPABILITY BIT4 Pci22.h < 0x0010
19108
 EFI_PCI_STATUS_66MZ_CAPABLEEFI_PCI_STATUS_66MZ_CAPABLE BIT5 Pci22.h < 0x0020
19109
 EFI_PCI_FAST_BACK_TO_BACK_CAPABEFI_PCI_FAST_BACK_TO_BACK_CAPAB BIT7 Pci22.h < 0x0080
19110
 EFI_PCI_MASTER_DATA_PARITY_ERROEFI_PCI_MASTER_DATA_PARITY_ERRO BIT8 Pci22.h < 0x0100
19111
 EFI_PCI_CARDBUS_BRIDGE_CAPABILIEFI_PCI_CARDBUS_BRIDGE_CAPABILI 0x14 Pci22.h 　
19112
 EFI_PCI_CAPABILITY_ID_PMIEFI_PCI_CAPABILITY_ID_PMI 0x01 Pci22.h 　
19113
 EFI_PCI_CAPABILITY_ID_AGPEFI_PCI_CAPABILITY_ID_AGP 0x02 Pci22.h 　
19114
 EFI_PCI_CAPABILITY_ID_VPDEFI_PCI_CAPABILITY_ID_VPD 0x03 Pci22.h 　
19115
 EFI_PCI_CAPABILITY_ID_SLOTIDEFI_PCI_CAPABILITY_ID_SLOTID 0x04 Pci22.h 　
19116
 EFI_PCI_CAPABILITY_ID_MSIEFI_PCI_CAPABILITY_ID_MSI 0x05 Pci22.h 　
19117
 EFI_PCI_CAPABILITY_ID_HOTPLUGEFI_PCI_CAPABILITY_ID_HOTPLUG 0x06 Pci22.h 　
19118
 DEVICE_ID_NOCAREDEVICE_ID_NOCARE 0xFFFF Pci22.h 　
19119
 PCI_ACPI_UNUSEDPCI_ACPI_UNUSED 0 Pci22.h 　
19120
 PCI_BAR_NOCHANGEPCI_BAR_NOCHANGE 0 Pci22.h 　
19121
 PCI_BAR_OLD_ALIGNPCI_BAR_OLD_ALIGN 0xFFFFFFFFFFFFFFFFULL Pci22.h 　
19122
 PCI_BAR_EVEN_ALIGNPCI_BAR_EVEN_ALIGN 0xFFFFFFFFFFFFFFFEULL Pci22.h 　
19123
 PCI_BAR_SQUAD_ALIGNPCI_BAR_SQUAD_ALIGN 0xFFFFFFFFFFFFFFFDULL Pci22.h 　
19124
 PCI_BAR_DQUAD_ALIGNPCI_BAR_DQUAD_ALIGN 0xFFFFFFFFFFFFFFFCULL Pci22.h 　
19125
 PCI_BAR_IDX0PCI_BAR_IDX0 0x00 Pci22.h 　
19126
 PCI_BAR_IDX1PCI_BAR_IDX1 0x01 Pci22.h 　
19127
 PCI_BAR_IDX2PCI_BAR_IDX2 0x02 Pci22.h 　
19128
 PCI_BAR_IDX3PCI_BAR_IDX3 0x03 Pci22.h 　
19129
 PCI_BAR_IDX4PCI_BAR_IDX4 0x04 Pci22.h 　
19130
 PCI_BAR_IDX5PCI_BAR_IDX5 0x05 Pci22.h 　
19131
 PCI_BAR_ALLPCI_BAR_ALL 0xFF Pci22.h 　
19132
 EFI_ROOT_BRIDGE_LISTEFI_ROOT_BRIDGE_LIST 'eprb' Pci22.h 　
19133
 EFI_PCI_EXPANSION_ROM_HEADER_EFEFI_PCI_EXPANSION_ROM_HEADER_EF 0x0EF1 Pci22.h < defined in UEFI Spec.
19134
 PCI_EXPANSION_ROM_HEADER_SIGNATPCI_EXPANSION_ROM_HEADER_SIGNAT 0xaa55 Pci22.h 　
19135
 PCI_DATA_STRUCTURE_SIGNATUREPCI_DATA_STRUCTURE_SIGNATURE SIGNATURE_32 ('P', 'C', 'I', 'R') Pci22.h 　
19136
 PCI_CODE_TYPE_PCAT_IMAGEPCI_CODE_TYPE_PCAT_IMAGE 0x00 Pci22.h 　
19137
 EFI_PCI_EXPANSION_ROM_HEADER_COEFI_PCI_EXPANSION_ROM_HEADER_CO 0x0001 Pci22.h <defined in UEFI spec.
19138
 EFI_IMAGE_SUBSYSTEM_EFI_APPLICAEFI_IMAGE_SUBSYSTEM_EFI_APPLICA 10 PeImage.h 　
19139
 EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SEEFI_IMAGE_SUBSYSTEM_EFI_BOOT_SE 11 PeImage.h 　
19140
 EFI_IMAGE_SUBSYSTEM_EFI_RUNTIMEEFI_IMAGE_SUBSYSTEM_EFI_RUNTIME 12 PeImage.h 　
19141
 EFI_IMAGE_SUBSYSTEM_EFI_EFI_ROMEFI_IMAGE_SUBSYSTEM_EFI_EFI_ROM 13 PeImage.h 　
19142
 EFI_IMAGE_SUBSYSTEM_SAL_RUNTIMEEFI_IMAGE_SUBSYSTEM_SAL_RUNTIME 13 PeImage.h < defined PI Specification, 1.0
19143
 IMAGE_FILE_MACHINE_I386IMAGE_FILE_MACHINE_I386 0x014c PeImage.h 　
19144
 IMAGE_FILE_MACHINE_IA64IMAGE_FILE_MACHINE_IA64 0x0200 PeImage.h 　
19145
 IMAGE_FILE_MACHINE_EBCIMAGE_FILE_MACHINE_EBC 0x0EBC PeImage.h 　
19146
 IMAGE_FILE_MACHINE_X64IMAGE_FILE_MACHINE_X64 0x8664 PeImage.h 　
19147
 EFI_IMAGE_MACHINE_IA32EFI_IMAGE_MACHINE_IA32 IMAGE_FILE_MACHINE_I386 PeImage.h 　
19148
 EFI_IMAGE_MACHINE_IA64EFI_IMAGE_MACHINE_IA64 IMAGE_FILE_MACHINE_IA64 PeImage.h 　
19149
 EFI_IMAGE_MACHINE_IPFEFI_IMAGE_MACHINE_IPF IMAGE_FILE_MACHINE_IA64 PeImage.h 　
19150
 EFI_IMAGE_MACHINE_EBCEFI_IMAGE_MACHINE_EBC IMAGE_FILE_MACHINE_EBC PeImage.h 　
19151
 EFI_IMAGE_MACHINE_X64EFI_IMAGE_MACHINE_X64 IMAGE_FILE_MACHINE_X64 PeImage.h 　
19152
 EFI_IMAGE_DOS_SIGNATUREEFI_IMAGE_DOS_SIGNATURE SIGNATURE_16('M', 'Z') PeImage.h 　
19153
 EFI_IMAGE_OS2_SIGNATUREEFI_IMAGE_OS2_SIGNATURE SIGNATURE_16('N', 'E') PeImage.h 　
19154
 EFI_IMAGE_OS2_SIGNATURE_LEEFI_IMAGE_OS2_SIGNATURE_LE SIGNATURE_16('L', 'E') PeImage.h 　
19155
 EFI_IMAGE_NT_SIGNATUREEFI_IMAGE_NT_SIGNATURE SIGNATURE_32('P', 'E', '\0', '\0') PeImage.h 　
19156
 EFI_IMAGE_SIZEOF_FILE_HEADEREFI_IMAGE_SIZEOF_FILE_HEADER 20 PeImage.h 　
19157
 EFI_IMAGE_FILE_RELOCS_STRIPPEDEFI_IMAGE_FILE_RELOCS_STRIPPED BIT0 PeImage.h < 0x0001 Relocation info stripped from file.
19158
 EFI_IMAGE_FILE_EXECUTABLE_IMAGEEFI_IMAGE_FILE_EXECUTABLE_IMAGE BIT1 PeImage.h < 0x0002 File is executable (i.e. no unresolved externel references).
19159
 EFI_IMAGE_FILE_LINE_NUMS_STRIPPEFI_IMAGE_FILE_LINE_NUMS_STRIPP BIT2 PeImage.h < 0x0004 Line nunbers stripped from file.
19160
 EFI_IMAGE_FILE_LOCAL_SYMS_STRIPEFI_IMAGE_FILE_LOCAL_SYMS_STRIP BIT3 PeImage.h < 0x0008 Local symbols stripped from file.
19161
 EFI_IMAGE_FILE_BYTES_REVERSED_LEFI_IMAGE_FILE_BYTES_REVERSED_L BIT7 PeImage.h < 0x0080 Bytes of machine word are reversed.
19162
 EFI_IMAGE_FILE_32BIT_MACHINEEFI_IMAGE_FILE_32BIT_MACHINE BIT8 PeImage.h < 0x0100 32 bit word machine.
19163
 EFI_IMAGE_FILE_DEBUG_STRIPPEDEFI_IMAGE_FILE_DEBUG_STRIPPED BIT9 PeImage.h < 0x0200 Debugging info stripped from file in .DBG file
19164
 EFI_IMAGE_FILE_SYSTEMEFI_IMAGE_FILE_SYSTEM BIT12 PeImage.h < 0x1000 System File.
19165
 EFI_IMAGE_FILE_DLLEFI_IMAGE_FILE_DLL BIT13 PeImage.h < 0x2000 File is a DLL.
19166
 EFI_IMAGE_FILE_BYTES_REVERSED_HEFI_IMAGE_FILE_BYTES_REVERSED_H BIT15 PeImage.h < 0x8000 Bytes of machine word are reversed.
19167
 EFI_IMAGE_FILE_MACHINE_UNKNOWNEFI_IMAGE_FILE_MACHINE_UNKNOWN 0 PeImage.h < Any machine type
19168
 EFI_IMAGE_FILE_MACHINE_I386EFI_IMAGE_FILE_MACHINE_I386 0x14c PeImage.h < Intel 386.
19169
 EFI_IMAGE_FILE_MACHINE_R3000EFI_IMAGE_FILE_MACHINE_R3000 0x162 PeImage.h < MIPS* little-endian, 0540 big-endian
19170
 EFI_IMAGE_FILE_MACHINE_R4000EFI_IMAGE_FILE_MACHINE_R4000 0x166 PeImage.h < MIPS* little-endian
19171
 EFI_IMAGE_FILE_MACHINE_POWERPCEFI_IMAGE_FILE_MACHINE_POWERPC 0x1F0 PeImage.h < IBM* PowerPC Little-Endian
19172
 EFI_IMAGE_ROM_OPTIONAL_HDR_MAGIEFI_IMAGE_ROM_OPTIONAL_HDR_MAGI 0x107 PeImage.h 　
19173
 EFI_IMAGE_DIRECTORY_ENTRY_EXPOREFI_IMAGE_DIRECTORY_ENTRY_EXPOR 0 PeImage.h 　
19174
 EFI_IMAGE_DIRECTORY_ENTRY_IMPOREFI_IMAGE_DIRECTORY_ENTRY_IMPOR 1 PeImage.h 　
19175
 EFI_IMAGE_DIRECTORY_ENTRY_RESOUEFI_IMAGE_DIRECTORY_ENTRY_RESOU 2 PeImage.h 　
19176
 EFI_IMAGE_DIRECTORY_ENTRY_EXCEPEFI_IMAGE_DIRECTORY_ENTRY_EXCEP 3 PeImage.h 　
19177
 EFI_IMAGE_DIRECTORY_ENTRY_SECUREFI_IMAGE_DIRECTORY_ENTRY_SECUR 4 PeImage.h 　
19178
 EFI_IMAGE_DIRECTORY_ENTRY_BASEREFI_IMAGE_DIRECTORY_ENTRY_BASER 5 PeImage.h 　
19179
 EFI_IMAGE_DIRECTORY_ENTRY_DEBUGEFI_IMAGE_DIRECTORY_ENTRY_DEBUG 6 PeImage.h 　
19180
 EFI_IMAGE_DIRECTORY_ENTRY_COPYREFI_IMAGE_DIRECTORY_ENTRY_COPYR 7 PeImage.h 　
19181
 EFI_IMAGE_DIRECTORY_ENTRY_GLOBAEFI_IMAGE_DIRECTORY_ENTRY_GLOBA 8 PeImage.h 　
19182
 EFI_IMAGE_DIRECTORY_ENTRY_TLSEFI_IMAGE_DIRECTORY_ENTRY_TLS 9 PeImage.h 　
19183
 EFI_IMAGE_DIRECTORY_ENTRY_LOAD_EFI_IMAGE_DIRECTORY_ENTRY_LOAD_ 10 PeImage.h 　
19184
 EFI_IMAGE_NUMBER_OF_DIRECTORY_EEFI_IMAGE_NUMBER_OF_DIRECTORY_E 16 PeImage.h 　
19185
 EFI_IMAGE_NT_OPTIONAL_HDR32_MAGEFI_IMAGE_NT_OPTIONAL_HDR32_MAG 0x10b PeImage.h 　
19186
 EFI_IMAGE_NT_OPTIONAL_HDR64_MAGEFI_IMAGE_NT_OPTIONAL_HDR64_MAG 0x20b PeImage.h 　
19187
 EFI_IMAGE_SIZEOF_NT_OPTIONAL32_EFI_IMAGE_SIZEOF_NT_OPTIONAL32_ sizeof (EFI_IMAGE_NT_HEADERS32) PeImage.h 　
19188
 EFI_IMAGE_SIZEOF_NT_OPTIONAL64_EFI_IMAGE_SIZEOF_NT_OPTIONAL64_ sizeof (EFI_IMAGE_NT_HEADERS64) PeImage.h 　
19189
 EFI_IMAGE_SUBSYSTEM_UNKNOWNEFI_IMAGE_SUBSYSTEM_UNKNOWN 0 PeImage.h 　
19190
 EFI_IMAGE_SUBSYSTEM_NATIVEEFI_IMAGE_SUBSYSTEM_NATIVE 1 PeImage.h 　
19191
 EFI_IMAGE_SUBSYSTEM_WINDOWS_GUIEFI_IMAGE_SUBSYSTEM_WINDOWS_GUI 2 PeImage.h 　
19192
 EFI_IMAGE_SUBSYSTEM_WINDOWS_CUIEFI_IMAGE_SUBSYSTEM_WINDOWS_CUI 3 PeImage.h 　
19193
 EFI_IMAGE_SUBSYSTEM_OS2_CUIEFI_IMAGE_SUBSYSTEM_OS2_CUI 5 PeImage.h 　
19194
 EFI_IMAGE_SUBSYSTEM_POSIX_CUIEFI_IMAGE_SUBSYSTEM_POSIX_CUI 7 PeImage.h 　
19195
 EFI_IMAGE_SIZEOF_SHORT_NAMEEFI_IMAGE_SIZEOF_SHORT_NAME 8 PeImage.h 　
19196
 EFI_IMAGE_SIZEOF_SECTION_HEADEREFI_IMAGE_SIZEOF_SECTION_HEADER 40 PeImage.h 　
19197
 EFI_IMAGE_SCN_TYPE_NO_PADEFI_IMAGE_SCN_TYPE_NO_PAD BIT3 PeImage.h < 0x00000008 ///< Reserved.
19198
 EFI_IMAGE_SCN_CNT_CODEEFI_IMAGE_SCN_CNT_CODE BIT5 PeImage.h < 0x00000020
19199
 EFI_IMAGE_SCN_CNT_INITIALIZED_DEFI_IMAGE_SCN_CNT_INITIALIZED_D BIT6 PeImage.h < 0x00000040
19200
 EFI_IMAGE_SCN_CNT_UNINITIALIZEDEFI_IMAGE_SCN_CNT_UNINITIALIZED BIT7 PeImage.h < 0x00000080
19201
 EFI_IMAGE_SCN_LNK_OTHEREFI_IMAGE_SCN_LNK_OTHER BIT8 PeImage.h < 0x00000100 ///< Reserved.
19202
 EFI_IMAGE_SCN_LNK_INFOEFI_IMAGE_SCN_LNK_INFO BIT9 PeImage.h < 0x00000200 ///< Section contains comments or some other type of information.
19203
 EFI_IMAGE_SCN_LNK_REMOVEEFI_IMAGE_SCN_LNK_REMOVE BIT10 PeImage.h < 0x00000800 ///< Section contents will not become part of image.
19204
 EFI_IMAGE_SCN_LNK_COMDATEFI_IMAGE_SCN_LNK_COMDAT BIT12 PeImage.h < 0x00001000
19205
 EFI_IMAGE_SCN_ALIGN_1BYTESEFI_IMAGE_SCN_ALIGN_1BYTES BIT20 PeImage.h < 0x00100000
19206
 EFI_IMAGE_SCN_ALIGN_2BYTESEFI_IMAGE_SCN_ALIGN_2BYTES BIT21 PeImage.h < 0x00200000
19207
 EFI_IMAGE_SCN_ALIGN_4BYTESEFI_IMAGE_SCN_ALIGN_4BYTES (BIT20|BIT21) PeImage.h < 0x00300000
19208
 EFI_IMAGE_SCN_ALIGN_8BYTESEFI_IMAGE_SCN_ALIGN_8BYTES BIT22 PeImage.h < 0x00400000
19209
 EFI_IMAGE_SCN_ALIGN_16BYTESEFI_IMAGE_SCN_ALIGN_16BYTES (BIT20|BIT22) PeImage.h < 0x00500000
19210
 EFI_IMAGE_SCN_ALIGN_32BYTESEFI_IMAGE_SCN_ALIGN_32BYTES (BIT21|BIT22) PeImage.h < 0x00600000
19211
 EFI_IMAGE_SCN_ALIGN_64BYTESEFI_IMAGE_SCN_ALIGN_64BYTES (BIT20|BIT21|BIT22) PeImage.h < 0x00700000
19212
 EFI_IMAGE_SCN_MEM_DISCARDABLEEFI_IMAGE_SCN_MEM_DISCARDABLE BIT25 PeImage.h < 0x02000000
19213
 EFI_IMAGE_SCN_MEM_NOT_CACHEDEFI_IMAGE_SCN_MEM_NOT_CACHED BIT26 PeImage.h < 0x04000000
19214
 EFI_IMAGE_SCN_MEM_NOT_PAGEDEFI_IMAGE_SCN_MEM_NOT_PAGED BIT27 PeImage.h < 0x08000000
19215
 EFI_IMAGE_SCN_MEM_SHAREDEFI_IMAGE_SCN_MEM_SHARED BIT28 PeImage.h < 0x10000000
19216
 EFI_IMAGE_SCN_MEM_EXECUTEEFI_IMAGE_SCN_MEM_EXECUTE BIT29 PeImage.h < 0x20000000
19217
 EFI_IMAGE_SCN_MEM_READEFI_IMAGE_SCN_MEM_READ BIT30 PeImage.h < 0x40000000
19218
 EFI_IMAGE_SCN_MEM_WRITEEFI_IMAGE_SCN_MEM_WRITE BIT31 PeImage.h < 0x80000000
19219
 EFI_IMAGE_SIZEOF_SYMBOLEFI_IMAGE_SIZEOF_SYMBOL 18 PeImage.h 　
19220
 EFI_IMAGE_SYM_UNDEFINEDEFI_IMAGE_SYM_UNDEFINED (UINT16) 0 PeImage.h < Symbol is undefined or is common.
19221
 EFI_IMAGE_SYM_ABSOLUTEEFI_IMAGE_SYM_ABSOLUTE (UINT16) -1 PeImage.h < Symbol is an absolute value.
19222
 EFI_IMAGE_SYM_DEBUGEFI_IMAGE_SYM_DEBUG (UINT16) -2 PeImage.h < Symbol is a special debug item.
19223
 EFI_IMAGE_SYM_TYPE_NULLEFI_IMAGE_SYM_TYPE_NULL 0 PeImage.h < no type.
19224
 EFI_IMAGE_SYM_TYPE_VOIDEFI_IMAGE_SYM_TYPE_VOID 1 PeImage.h < no valid type.
19225
 EFI_IMAGE_SYM_TYPE_CHAREFI_IMAGE_SYM_TYPE_CHAR 2 PeImage.h < type character.
19226
 EFI_IMAGE_SYM_TYPE_SHORTEFI_IMAGE_SYM_TYPE_SHORT 3 PeImage.h < type short integer.
19227
 EFI_IMAGE_SYM_TYPE_INTEFI_IMAGE_SYM_TYPE_INT 4 PeImage.h 　
19228
 EFI_IMAGE_SYM_TYPE_LONGEFI_IMAGE_SYM_TYPE_LONG 5 PeImage.h 　
19229
 EFI_IMAGE_SYM_TYPE_FLOATEFI_IMAGE_SYM_TYPE_FLOAT 6 PeImage.h 　
19230
 EFI_IMAGE_SYM_TYPE_DOUBLEEFI_IMAGE_SYM_TYPE_DOUBLE 7 PeImage.h 　
19231
 EFI_IMAGE_SYM_TYPE_STRUCTEFI_IMAGE_SYM_TYPE_STRUCT 8 PeImage.h 　
19232
 EFI_IMAGE_SYM_TYPE_UNIONEFI_IMAGE_SYM_TYPE_UNION 9 PeImage.h 　
19233
 EFI_IMAGE_SYM_TYPE_ENUMEFI_IMAGE_SYM_TYPE_ENUM 10 PeImage.h < enumeration.
19234
 EFI_IMAGE_SYM_TYPE_MOEEFI_IMAGE_SYM_TYPE_MOE 11 PeImage.h < member of enumeration.
19235
 EFI_IMAGE_SYM_TYPE_BYTEEFI_IMAGE_SYM_TYPE_BYTE 12 PeImage.h 　
19236
 EFI_IMAGE_SYM_TYPE_WORDEFI_IMAGE_SYM_TYPE_WORD 13 PeImage.h 　
19237
 EFI_IMAGE_SYM_TYPE_UINTEFI_IMAGE_SYM_TYPE_UINT 14 PeImage.h 　
19238
 EFI_IMAGE_SYM_TYPE_DWORDEFI_IMAGE_SYM_TYPE_DWORD 15 PeImage.h 　
19239
 EFI_IMAGE_SYM_DTYPE_NULLEFI_IMAGE_SYM_DTYPE_NULL 0 PeImage.h < no derived type.
19240
 EFI_IMAGE_SYM_DTYPE_POINTEREFI_IMAGE_SYM_DTYPE_POINTER 1 PeImage.h 　
19241
 EFI_IMAGE_SYM_DTYPE_FUNCTIONEFI_IMAGE_SYM_DTYPE_FUNCTION 2 PeImage.h 　
19242
 EFI_IMAGE_SYM_DTYPE_ARRAYEFI_IMAGE_SYM_DTYPE_ARRAY 3 PeImage.h 　
19243
 EFI_IMAGE_SYM_CLASS_END_OF_FUNCEFI_IMAGE_SYM_CLASS_END_OF_FUNC ((UINT8) -1) PeImage.h 　
19244
 EFI_IMAGE_SYM_CLASS_NULLEFI_IMAGE_SYM_CLASS_NULL 0 PeImage.h 　
19245
 EFI_IMAGE_SYM_CLASS_AUTOMATICEFI_IMAGE_SYM_CLASS_AUTOMATIC 1 PeImage.h 　
19246
 EFI_IMAGE_SYM_CLASS_EXTERNALEFI_IMAGE_SYM_CLASS_EXTERNAL 2 PeImage.h 　
19247
 EFI_IMAGE_SYM_CLASS_STATICEFI_IMAGE_SYM_CLASS_STATIC 3 PeImage.h 　
19248
 EFI_IMAGE_SYM_CLASS_REGISTEREFI_IMAGE_SYM_CLASS_REGISTER 4 PeImage.h 　
19249
 EFI_IMAGE_SYM_CLASS_EXTERNAL_DEEFI_IMAGE_SYM_CLASS_EXTERNAL_DE 5 PeImage.h 　
19250
 EFI_IMAGE_SYM_CLASS_LABELEFI_IMAGE_SYM_CLASS_LABEL 6 PeImage.h 　
19251
 EFI_IMAGE_SYM_CLASS_UNDEFINED_LEFI_IMAGE_SYM_CLASS_UNDEFINED_L 7 PeImage.h 　
19252
 EFI_IMAGE_SYM_CLASS_MEMBER_OF_SEFI_IMAGE_SYM_CLASS_MEMBER_OF_S 8 PeImage.h 　
19253
 EFI_IMAGE_SYM_CLASS_ARGUMENTEFI_IMAGE_SYM_CLASS_ARGUMENT 9 PeImage.h 　
19254
 EFI_IMAGE_SYM_CLASS_STRUCT_TAGEFI_IMAGE_SYM_CLASS_STRUCT_TAG 10 PeImage.h 　
19255
 EFI_IMAGE_SYM_CLASS_MEMBER_OF_UEFI_IMAGE_SYM_CLASS_MEMBER_OF_U 11 PeImage.h 　
19256
 EFI_IMAGE_SYM_CLASS_UNION_TAGEFI_IMAGE_SYM_CLASS_UNION_TAG 12 PeImage.h 　
19257
 EFI_IMAGE_SYM_CLASS_TYPE_DEFINIEFI_IMAGE_SYM_CLASS_TYPE_DEFINI 13 PeImage.h 　
19258
 EFI_IMAGE_SYM_CLASS_UNDEFINED_SEFI_IMAGE_SYM_CLASS_UNDEFINED_S 14 PeImage.h 　
19259
 EFI_IMAGE_SYM_CLASS_ENUM_TAGEFI_IMAGE_SYM_CLASS_ENUM_TAG 15 PeImage.h 　
19260
 EFI_IMAGE_SYM_CLASS_MEMBER_OF_EEFI_IMAGE_SYM_CLASS_MEMBER_OF_E 16 PeImage.h 　
19261
 EFI_IMAGE_SYM_CLASS_REGISTER_PAEFI_IMAGE_SYM_CLASS_REGISTER_PA 17 PeImage.h 　
19262
 EFI_IMAGE_SYM_CLASS_BIT_FIELDEFI_IMAGE_SYM_CLASS_BIT_FIELD 18 PeImage.h 　
19263
 EFI_IMAGE_SYM_CLASS_BLOCKEFI_IMAGE_SYM_CLASS_BLOCK 100 PeImage.h 　
19264
 EFI_IMAGE_SYM_CLASS_FUNCTIONEFI_IMAGE_SYM_CLASS_FUNCTION 101 PeImage.h 　
19265
 EFI_IMAGE_SYM_CLASS_END_OF_STRUEFI_IMAGE_SYM_CLASS_END_OF_STRU 102 PeImage.h 　
19266
 EFI_IMAGE_SYM_CLASS_FILEEFI_IMAGE_SYM_CLASS_FILE 103 PeImage.h 　
19267
 EFI_IMAGE_SYM_CLASS_SECTIONEFI_IMAGE_SYM_CLASS_SECTION 104 PeImage.h 　
19268
 EFI_IMAGE_SYM_CLASS_WEAK_EXTERNEFI_IMAGE_SYM_CLASS_WEAK_EXTERN 105 PeImage.h 　
19269
 EFI_IMAGE_N_BTMASKEFI_IMAGE_N_BTMASK 017 PeImage.h 　
19270
 EFI_IMAGE_N_TMASKEFI_IMAGE_N_TMASK 060 PeImage.h 　
19271
 EFI_IMAGE_N_TMASK1EFI_IMAGE_N_TMASK1 0300 PeImage.h 　
19272
 EFI_IMAGE_N_TMASK2EFI_IMAGE_N_TMASK2 0360 PeImage.h 　
19273
 EFI_IMAGE_N_BTSHFTEFI_IMAGE_N_BTSHFT 4 PeImage.h 　
19274
 EFI_IMAGE_N_TSHIFTEFI_IMAGE_N_TSHIFT 2 PeImage.h 　
19275
 EFI_IMAGE_COMDAT_SELECT_NODUPLIEFI_IMAGE_COMDAT_SELECT_NODUPLI 1 PeImage.h 　
19276
 EFI_IMAGE_COMDAT_SELECT_ANYEFI_IMAGE_COMDAT_SELECT_ANY 2 PeImage.h 　
19277
 EFI_IMAGE_COMDAT_SELECT_SAME_SIEFI_IMAGE_COMDAT_SELECT_SAME_SI 3 PeImage.h 　
19278
 EFI_IMAGE_COMDAT_SELECT_EXACT_MEFI_IMAGE_COMDAT_SELECT_EXACT_M 4 PeImage.h 　
19279
 EFI_IMAGE_COMDAT_SELECT_ASSOCIAEFI_IMAGE_COMDAT_SELECT_ASSOCIA 5 PeImage.h 　
19280
 EFI_IMAGE_WEAK_EXTERN_SEARCH_NOEFI_IMAGE_WEAK_EXTERN_SEARCH_NO 1 PeImage.h 　
19281
 EFI_IMAGE_WEAK_EXTERN_SEARCH_LIEFI_IMAGE_WEAK_EXTERN_SEARCH_LI 2 PeImage.h 　
19282
 EFI_IMAGE_WEAK_EXTERN_SEARCH_ALEFI_IMAGE_WEAK_EXTERN_SEARCH_AL 3 PeImage.h 　
19283
 EFI_IMAGE_SIZEOF_RELOCATIONEFI_IMAGE_SIZEOF_RELOCATION 10 PeImage.h 　
19284
 EFI_IMAGE_REL_I386_ABSOLUTEEFI_IMAGE_REL_I386_ABSOLUTE 0x0000 PeImage.h < Reference is absolute, no relocation is necessary
19285
 EFI_IMAGE_REL_I386_DIR16EFI_IMAGE_REL_I386_DIR16 0x0001 PeImage.h < Direct 16-bit reference to the symbols virtual address
19286
 EFI_IMAGE_REL_I386_REL16EFI_IMAGE_REL_I386_REL16 0x0002 PeImage.h < PC-relative 16-bit reference to the symbols virtual address
19287
 EFI_IMAGE_REL_I386_DIR32EFI_IMAGE_REL_I386_DIR32 0x0006 PeImage.h < Direct 32-bit reference to the symbols virtual address
19288
 EFI_IMAGE_REL_I386_DIR32NBEFI_IMAGE_REL_I386_DIR32NB 0x0007 PeImage.h < Direct 32-bit reference to the symbols virtual address, base not included
19289
 EFI_IMAGE_REL_I386_SEG12EFI_IMAGE_REL_I386_SEG12 0x0009 PeImage.h < Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address
19290
 EFI_IMAGE_REL_I386_SECTIONEFI_IMAGE_REL_I386_SECTION 0x000A PeImage.h 　
19291
 EFI_IMAGE_REL_I386_SECRELEFI_IMAGE_REL_I386_SECREL 0x000B PeImage.h 　
19292
 EFI_IMAGE_REL_I386_REL32EFI_IMAGE_REL_I386_REL32 0x0014 PeImage.h < PC-relative 32-bit reference to the symbols virtual address
19293
 IMAGE_REL_AMD64_ABSOLUTEIMAGE_REL_AMD64_ABSOLUTE 0x0000 PeImage.h 　
19294
 IMAGE_REL_AMD64_ADDR64IMAGE_REL_AMD64_ADDR64 0x0001 PeImage.h 　
19295
 IMAGE_REL_AMD64_ADDR32IMAGE_REL_AMD64_ADDR32 0x0002 PeImage.h 　
19296
 IMAGE_REL_AMD64_ADDR32NBIMAGE_REL_AMD64_ADDR32NB 0x0003 PeImage.h 　
19297
 IMAGE_REL_AMD64_REL32IMAGE_REL_AMD64_REL32 0x0004 PeImage.h 　
19298
 IMAGE_REL_AMD64_REL32_1IMAGE_REL_AMD64_REL32_1 0x0005 PeImage.h 　
19299
 IMAGE_REL_AMD64_REL32_2IMAGE_REL_AMD64_REL32_2 0x0006 PeImage.h 　
19300
 IMAGE_REL_AMD64_REL32_3IMAGE_REL_AMD64_REL32_3 0x0007 PeImage.h 　
19301
 IMAGE_REL_AMD64_REL32_4IMAGE_REL_AMD64_REL32_4 0x0008 PeImage.h 　
19302
 IMAGE_REL_AMD64_REL32_5IMAGE_REL_AMD64_REL32_5 0x0009 PeImage.h 　
19303
 IMAGE_REL_AMD64_SECTIONIMAGE_REL_AMD64_SECTION 0x000A PeImage.h 　
19304
 IMAGE_REL_AMD64_SECRELIMAGE_REL_AMD64_SECREL 0x000B PeImage.h 　
19305
 IMAGE_REL_AMD64_SECREL7IMAGE_REL_AMD64_SECREL7 0x000C PeImage.h 　
19306
 IMAGE_REL_AMD64_TOKENIMAGE_REL_AMD64_TOKEN 0x000D PeImage.h 　
19307
 IMAGE_REL_AMD64_SREL32IMAGE_REL_AMD64_SREL32 0x000E PeImage.h 　
19308
 IMAGE_REL_AMD64_PAIRIMAGE_REL_AMD64_PAIR 0x000F PeImage.h 　
19309
 IMAGE_REL_AMD64_SSPAN32IMAGE_REL_AMD64_SSPAN32 0x0010 PeImage.h 　
19310
 EFI_IMAGE_SIZEOF_BASE_RELOCATIOEFI_IMAGE_SIZEOF_BASE_RELOCATIO 8 PeImage.h 　
19311
 EFI_IMAGE_REL_BASED_ABSOLUTEEFI_IMAGE_REL_BASED_ABSOLUTE 0 PeImage.h 　
19312
 EFI_IMAGE_REL_BASED_HIGHEFI_IMAGE_REL_BASED_HIGH 1 PeImage.h 　
19313
 EFI_IMAGE_REL_BASED_LOWEFI_IMAGE_REL_BASED_LOW 2 PeImage.h 　
19314
 EFI_IMAGE_REL_BASED_HIGHLOWEFI_IMAGE_REL_BASED_HIGHLOW 3 PeImage.h 　
19315
 EFI_IMAGE_REL_BASED_HIGHADJEFI_IMAGE_REL_BASED_HIGHADJ 4 PeImage.h 　
19316
 EFI_IMAGE_REL_BASED_MIPS_JMPADDEFI_IMAGE_REL_BASED_MIPS_JMPADD 5 PeImage.h 　
19317
 EFI_IMAGE_REL_BASED_IA64_IMM64EFI_IMAGE_REL_BASED_IA64_IMM64 9 PeImage.h 　
19318
 IMAGE_REL_BASED_MIPS_JMPADDR16IMAGE_REL_BASED_MIPS_JMPADDR16 9 PeImage.h 　
19319
 EFI_IMAGE_REL_BASED_DIR64EFI_IMAGE_REL_BASED_DIR64 10 PeImage.h 　
19320
 EFI_IMAGE_SIZEOF_LINENUMBEREFI_IMAGE_SIZEOF_LINENUMBER 6 PeImage.h 　
19321
 EFI_IMAGE_ARCHIVE_START_SIZEEFI_IMAGE_ARCHIVE_START_SIZE 8 PeImage.h 　
19322
 EFI_IMAGE_ARCHIVE_STARTEFI_IMAGE_ARCHIVE_START "!<arch>\n" PeImage.h 　
19323
 EFI_IMAGE_ARCHIVE_ENDEFI_IMAGE_ARCHIVE_END "`\n" PeImage.h 　
19324
 EFI_IMAGE_ARCHIVE_PADEFI_IMAGE_ARCHIVE_PAD "\n" PeImage.h 　
19325
 EFI_IMAGE_ARCHIVE_LINKER_MEMBEREFI_IMAGE_ARCHIVE_LINKER_MEMBER "/ " PeImage.h 　
19326
 EFI_IMAGE_ARCHIVE_LONGNAMES_MEMEFI_IMAGE_ARCHIVE_LONGNAMES_MEM "// " PeImage.h 　
19327
 EFI_IMAGE_SIZEOF_ARCHIVE_MEMBEREFI_IMAGE_SIZEOF_ARCHIVE_MEMBER 60 PeImage.h 　
19328
 EFI_IMAGE_ORDINAL_FLAGEFI_IMAGE_ORDINAL_FLAG BIT31 PeImage.h < Flag for PE32
19329
 EFI_IMAGE_DEBUG_TYPE_CODEVIEWEFI_IMAGE_DEBUG_TYPE_CODEVIEW 2 PeImage.h < The Visual C++ debug information
19330
 CODEVIEW_SIGNATURE_NB10CODEVIEW_SIGNATURE_NB10 SIGNATURE_32('N', 'B', '1', '0') PeImage.h 　
19331
 CODEVIEW_SIGNATURE_RSDSCODEVIEW_SIGNATURE_RSDS SIGNATURE_32('R', 'S', 'D', 'S') PeImage.h 　
19332
 EFI_TE_IMAGE_HEADER_SIGNATUREEFI_TE_IMAGE_HEADER_SIGNATURE SIGNATURE_16('V', 'Z') PeImage.h 　
19333
 EFI_TE_IMAGE_DIRECTORY_ENTRY_BAEFI_TE_IMAGE_DIRECTORY_ENTRY_BA 0 PeImage.h 　
19334
 EFI_TE_IMAGE_DIRECTORY_ENTRY_DEEFI_TE_IMAGE_DIRECTORY_ENTRY_DE 1 PeImage.h 　
19335
 BOOT_WITH_FULL_CONFIGURATIONBOOT_WITH_FULL_CONFIGURATION 0x00 PiBootMode.h 　
19336
 BOOT_WITH_MINIMAL_CONFIGURATIONBOOT_WITH_MINIMAL_CONFIGURATION 0x01 PiBootMode.h 　
19337
 BOOT_ASSUMING_NO_CONFIGURATION_BOOT_ASSUMING_NO_CONFIGURATION_ 0x02 PiBootMode.h 　
19338
 BOOT_WITH_FULL_CONFIGURATION_PLBOOT_WITH_FULL_CONFIGURATION_PL 0x03 PiBootMode.h 　
19339
 BOOT_WITH_DEFAULT_SETTINGSBOOT_WITH_DEFAULT_SETTINGS 0x04 PiBootMode.h 　
19340
 BOOT_ON_S4_RESUMEBOOT_ON_S4_RESUME 0x05 PiBootMode.h 　
19341
 BOOT_ON_S5_RESUMEBOOT_ON_S5_RESUME 0x06 PiBootMode.h 　
19342
 BOOT_ON_S2_RESUMEBOOT_ON_S2_RESUME 0x10 PiBootMode.h 　
19343
 BOOT_ON_S3_RESUMEBOOT_ON_S3_RESUME 0x11 PiBootMode.h 　
19344
 BOOT_ON_FLASH_UPDATEBOOT_ON_FLASH_UPDATE 0x12 PiBootMode.h 　
19345
 BOOT_IN_RECOVERY_MODEBOOT_IN_RECOVERY_MODE 0x20 PiBootMode.h 　
19346
 EFI_DEP_BEFOREEFI_DEP_BEFORE 0x00 PiDependency.h 　
19347
 EFI_DEP_AFTEREFI_DEP_AFTER 0x01 PiDependency.h 　
19348
 EFI_DEP_PUSHEFI_DEP_PUSH 0x02 PiDependency.h 　
19349
 EFI_DEP_ANDEFI_DEP_AND 0x03 PiDependency.h 　
19350
 EFI_DEP_OREFI_DEP_OR 0x04 PiDependency.h 　
19351
 EFI_DEP_NOTEFI_DEP_NOT 0x05 PiDependency.h 　
19352
 EFI_DEP_TRUEEFI_DEP_TRUE 0x06 PiDependency.h 　
19353
 EFI_DEP_FALSEEFI_DEP_FALSE 0x07 PiDependency.h 　
19354
 EFI_DEP_ENDEFI_DEP_END 0x08 PiDependency.h 　
19355
 EFI_DEP_SOREFI_DEP_SOR 0x09 PiDependency.h 　
19356
 DXE_SERVICES_SIGNATUREDXE_SERVICES_SIGNATURE 0x565245535f455844ULL PiDxeCis.h 　
19357
 DXE_SERVICES_REVISIONDXE_SERVICES_REVISION ((1<<16) | (00)) PiDxeCis.h 　
19358
 EFI_FV_FILETYPE_ALLEFI_FV_FILETYPE_ALL 0x00 PiFirmwareFile.h 　
19359
 EFI_FV_FILETYPE_RAWEFI_FV_FILETYPE_RAW 0x01 PiFirmwareFile.h 　
19360
 EFI_FV_FILETYPE_FREEFORMEFI_FV_FILETYPE_FREEFORM 0x02 PiFirmwareFile.h 　
19361
 EFI_FV_FILETYPE_SECURITY_COREEFI_FV_FILETYPE_SECURITY_CORE 0x03 PiFirmwareFile.h 　
19362
 EFI_FV_FILETYPE_PEI_COREEFI_FV_FILETYPE_PEI_CORE 0x04 PiFirmwareFile.h 　
19363
 EFI_FV_FILETYPE_DXE_COREEFI_FV_FILETYPE_DXE_CORE 0x05 PiFirmwareFile.h 　
19364
 EFI_FV_FILETYPE_PEIMEFI_FV_FILETYPE_PEIM 0x06 PiFirmwareFile.h 　
19365
 EFI_FV_FILETYPE_DRIVEREFI_FV_FILETYPE_DRIVER 0x07 PiFirmwareFile.h 　
19366
 EFI_FV_FILETYPE_COMBINED_PEIM_DEFI_FV_FILETYPE_COMBINED_PEIM_D 0x08 PiFirmwareFile.h 　
19367
 EFI_FV_FILETYPE_APPLICATIONEFI_FV_FILETYPE_APPLICATION 0x09 PiFirmwareFile.h 　
19368
 EFI_FV_FILETYPE_FIRMWARE_VOLUMEEFI_FV_FILETYPE_FIRMWARE_VOLUME 0x0B PiFirmwareFile.h 　
19369
 EFI_FV_FILETYPE_OEM_MINEFI_FV_FILETYPE_OEM_MIN 0xc0 PiFirmwareFile.h 　
19370
 EFI_FV_FILETYPE_OEM_MAXEFI_FV_FILETYPE_OEM_MAX 0xdf PiFirmwareFile.h 　
19371
 EFI_FV_FILETYPE_DEBUG_MINEFI_FV_FILETYPE_DEBUG_MIN 0xe0 PiFirmwareFile.h 　
19372
 EFI_FV_FILETYPE_DEBUG_MAXEFI_FV_FILETYPE_DEBUG_MAX 0xef PiFirmwareFile.h 　
19373
 EFI_FV_FILETYPE_FFS_MINEFI_FV_FILETYPE_FFS_MIN 0xf0 PiFirmwareFile.h 　
19374
 EFI_FV_FILETYPE_FFS_MAXEFI_FV_FILETYPE_FFS_MAX 0xff PiFirmwareFile.h 　
19375
 EFI_FV_FILETYPE_FFS_PADEFI_FV_FILETYPE_FFS_PAD 0xf0 PiFirmwareFile.h 　
19376
 FFS_ATTRIB_FIXEDFFS_ATTRIB_FIXED 0x04 PiFirmwareFile.h 　
19377
 FFS_ATTRIB_DATA_ALIGNMENTFFS_ATTRIB_DATA_ALIGNMENT 0x38 PiFirmwareFile.h 　
19378
 FFS_ATTRIB_CHECKSUMFFS_ATTRIB_CHECKSUM 0x40 PiFirmwareFile.h 　
19379
 EFI_FILE_HEADER_CONSTRUCTIONEFI_FILE_HEADER_CONSTRUCTION 0x01 PiFirmwareFile.h 　
19380
 EFI_FILE_HEADER_VALIDEFI_FILE_HEADER_VALID 0x02 PiFirmwareFile.h 　
19381
 EFI_FILE_DATA_VALIDEFI_FILE_DATA_VALID 0x04 PiFirmwareFile.h 　
19382
 EFI_FILE_MARKED_FOR_UPDATEEFI_FILE_MARKED_FOR_UPDATE 0x08 PiFirmwareFile.h 　
19383
 EFI_FILE_DELETEDEFI_FILE_DELETED 0x10 PiFirmwareFile.h 　
19384
 EFI_FILE_HEADER_INVALIDEFI_FILE_HEADER_INVALID 0x20 PiFirmwareFile.h 　
19385
 EFI_SECTION_ALLEFI_SECTION_ALL 0x00 PiFirmwareFile.h 　
19386
 EFI_SECTION_COMPRESSIONEFI_SECTION_COMPRESSION 0x01 PiFirmwareFile.h 　
19387
 EFI_SECTION_GUID_DEFINEDEFI_SECTION_GUID_DEFINED 0x02 PiFirmwareFile.h 　
19388
 EFI_SECTION_PE32EFI_SECTION_PE32 0x10 PiFirmwareFile.h 　
19389
 EFI_SECTION_PICEFI_SECTION_PIC 0x11 PiFirmwareFile.h 　
19390
 EFI_SECTION_TEEFI_SECTION_TE 0x12 PiFirmwareFile.h 　
19391
 EFI_SECTION_DXE_DEPEXEFI_SECTION_DXE_DEPEX 0x13 PiFirmwareFile.h 　
19392
 EFI_SECTION_VERSIONEFI_SECTION_VERSION 0x14 PiFirmwareFile.h 　
19393
 EFI_SECTION_USER_INTERFACEEFI_SECTION_USER_INTERFACE 0x15 PiFirmwareFile.h 　
19394
 EFI_SECTION_COMPATIBILITY16EFI_SECTION_COMPATIBILITY16 0x16 PiFirmwareFile.h 　
19395
 EFI_SECTION_FIRMWARE_VOLUME_IMAEFI_SECTION_FIRMWARE_VOLUME_IMA 0x17 PiFirmwareFile.h 　
19396
 EFI_SECTION_FREEFORM_SUBTYPE_GUEFI_SECTION_FREEFORM_SUBTYPE_GU 0x18 PiFirmwareFile.h 　
19397
 EFI_SECTION_RAWEFI_SECTION_RAW 0x19 PiFirmwareFile.h 　
19398
 EFI_SECTION_PEI_DEPEXEFI_SECTION_PEI_DEPEX 0x1B PiFirmwareFile.h 　
19399
 EFI_NOT_COMPRESSEDEFI_NOT_COMPRESSED 0x00 PiFirmwareFile.h 　
19400
 EFI_STANDARD_COMPRESSIONEFI_STANDARD_COMPRESSION 0x01 PiFirmwareFile.h 　
19401
 EFI_GUIDED_SECTION_PROCESSING_REFI_GUIDED_SECTION_PROCESSING_R 0x01 PiFirmwareFile.h 　
19402
 EFI_GUIDED_SECTION_AUTH_STATUS_EFI_GUIDED_SECTION_AUTH_STATUS_ 0x02 PiFirmwareFile.h 　
19403
 EFI_FV_FILE_ATTRIB_ALIGNMENTEFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F PiFirmwareVolume.h 　
19404
 EFI_FV_FILE_ATTRIB_FIXEDEFI_FV_FILE_ATTRIB_FIXED 0x00000100 PiFirmwareVolume.h 　
19405
 EFI_FV_FILE_ATTRIB_MEMORY_MAPPEEFI_FV_FILE_ATTRIB_MEMORY_MAPPE 0x00000200 PiFirmwareVolume.h 　
19406
 EFI_FVB2_READ_DISABLED_CAPEFI_FVB2_READ_DISABLED_CAP 0x00000001 PiFirmwareVolume.h 　
19407
 EFI_FVB2_READ_ENABLED_CAPEFI_FVB2_READ_ENABLED_CAP 0x00000002 PiFirmwareVolume.h 　
19408
 EFI_FVB2_READ_STATUSEFI_FVB2_READ_STATUS 0x00000004 PiFirmwareVolume.h 　
19409
 EFI_FVB2_WRITE_DISABLED_CAPEFI_FVB2_WRITE_DISABLED_CAP 0x00000008 PiFirmwareVolume.h 　
19410
 EFI_FVB2_WRITE_ENABLED_CAPEFI_FVB2_WRITE_ENABLED_CAP 0x00000010 PiFirmwareVolume.h 　
19411
 EFI_FVB2_WRITE_STATUSEFI_FVB2_WRITE_STATUS 0x00000020 PiFirmwareVolume.h 　
19412
 EFI_FVB2_LOCK_CAPEFI_FVB2_LOCK_CAP 0x00000040 PiFirmwareVolume.h 　
19413
 EFI_FVB2_LOCK_STATUSEFI_FVB2_LOCK_STATUS 0x00000080 PiFirmwareVolume.h 　
19414
 EFI_FVB2_STICKY_WRITEEFI_FVB2_STICKY_WRITE 0x00000200 PiFirmwareVolume.h 　
19415
 EFI_FVB2_MEMORY_MAPPEDEFI_FVB2_MEMORY_MAPPED 0x00000400 PiFirmwareVolume.h 　
19416
 EFI_FVB2_ERASE_POLARITYEFI_FVB2_ERASE_POLARITY 0x00000800 PiFirmwareVolume.h 　
19417
 EFI_FVB2_READ_LOCK_CAPEFI_FVB2_READ_LOCK_CAP 0x00001000 PiFirmwareVolume.h 　
19418
 EFI_FVB2_READ_LOCK_STATUSEFI_FVB2_READ_LOCK_STATUS 0x00002000 PiFirmwareVolume.h 　
19419
 EFI_FVB2_WRITE_LOCK_CAPEFI_FVB2_WRITE_LOCK_CAP 0x00004000 PiFirmwareVolume.h 　
19420
 EFI_FVB2_WRITE_LOCK_STATUSEFI_FVB2_WRITE_LOCK_STATUS 0x00008000 PiFirmwareVolume.h 　
19421
 EFI_FVB2_ALIGNMENTEFI_FVB2_ALIGNMENT 0x001F0000 PiFirmwareVolume.h 　
19422
 EFI_FVB2_ALIGNMENT_1EFI_FVB2_ALIGNMENT_1 0x00000000 PiFirmwareVolume.h 　
19423
 EFI_FVB2_ALIGNMENT_2EFI_FVB2_ALIGNMENT_2 0x00010000 PiFirmwareVolume.h 　
19424
 EFI_FVB2_ALIGNMENT_4EFI_FVB2_ALIGNMENT_4 0x00020000 PiFirmwareVolume.h 　
19425
 EFI_FVB2_ALIGNMENT_8EFI_FVB2_ALIGNMENT_8 0x00030000 PiFirmwareVolume.h 　
19426
 EFI_FVB2_ALIGNMENT_16EFI_FVB2_ALIGNMENT_16 0x00040000 PiFirmwareVolume.h 　
19427
 EFI_FVB2_ALIGNMENT_32EFI_FVB2_ALIGNMENT_32 0x00050000 PiFirmwareVolume.h 　
19428
 EFI_FVB2_ALIGNMENT_64EFI_FVB2_ALIGNMENT_64 0x00060000 PiFirmwareVolume.h 　
19429
 EFI_FVB2_ALIGNMENT_128EFI_FVB2_ALIGNMENT_128 0x00070000 PiFirmwareVolume.h 　
19430
 EFI_FVB2_ALIGNMENT_256EFI_FVB2_ALIGNMENT_256 0x00080000 PiFirmwareVolume.h 　
19431
 EFI_FVB2_ALIGNMENT_512EFI_FVB2_ALIGNMENT_512 0x00090000 PiFirmwareVolume.h 　
19432
 EFI_FVB2_ALIGNMENT_1KEFI_FVB2_ALIGNMENT_1K 0x000A0000 PiFirmwareVolume.h 　
19433
 EFI_FVB2_ALIGNMENT_2KEFI_FVB2_ALIGNMENT_2K 0x000B0000 PiFirmwareVolume.h 　
19434
 EFI_FVB2_ALIGNMENT_4KEFI_FVB2_ALIGNMENT_4K 0x000C0000 PiFirmwareVolume.h 　
19435
 EFI_FVB2_ALIGNMENT_8KEFI_FVB2_ALIGNMENT_8K 0x000D0000 PiFirmwareVolume.h 　
19436
 EFI_FVB2_ALIGNMENT_16KEFI_FVB2_ALIGNMENT_16K 0x000E0000 PiFirmwareVolume.h 　
19437
 EFI_FVB2_ALIGNMENT_32KEFI_FVB2_ALIGNMENT_32K 0x000F0000 PiFirmwareVolume.h 　
19438
 EFI_FVB2_ALIGNMENT_64KEFI_FVB2_ALIGNMENT_64K 0x00100000 PiFirmwareVolume.h 　
19439
 EFI_FVB2_ALIGNMENT_128KEFI_FVB2_ALIGNMENT_128K 0x00110000 PiFirmwareVolume.h 　
19440
 EFI_FVB2_ALIGNMENT_256KEFI_FVB2_ALIGNMENT_256K 0x00120000 PiFirmwareVolume.h 　
19441
 EFI_FVB2_ALIGNMNET_512KEFI_FVB2_ALIGNMNET_512K 0x00130000 PiFirmwareVolume.h 　
19442
 EFI_FVB2_ALIGNMENT_1MEFI_FVB2_ALIGNMENT_1M 0x00140000 PiFirmwareVolume.h 　
19443
 EFI_FVB2_ALIGNMENT_2MEFI_FVB2_ALIGNMENT_2M 0x00150000 PiFirmwareVolume.h 　
19444
 EFI_FVB2_ALIGNMENT_4MEFI_FVB2_ALIGNMENT_4M 0x00160000 PiFirmwareVolume.h 　
19445
 EFI_FVB2_ALIGNMENT_8MEFI_FVB2_ALIGNMENT_8M 0x00170000 PiFirmwareVolume.h 　
19446
 EFI_FVB2_ALIGNMENT_16MEFI_FVB2_ALIGNMENT_16M 0x00180000 PiFirmwareVolume.h 　
19447
 EFI_FVB2_ALIGNMENT_32MEFI_FVB2_ALIGNMENT_32M 0x00190000 PiFirmwareVolume.h 　
19448
 EFI_FVB2_ALIGNMENT_64MEFI_FVB2_ALIGNMENT_64M 0x001A0000 PiFirmwareVolume.h 　
19449
 EFI_FVB2_ALIGNMENT_128MEFI_FVB2_ALIGNMENT_128M 0x001B0000 PiFirmwareVolume.h 　
19450
 EFI_FVB2_ALIGNMENT_256MEFI_FVB2_ALIGNMENT_256M 0x001C0000 PiFirmwareVolume.h 　
19451
 EFI_FVB2_ALIGNMENT_512MEFI_FVB2_ALIGNMENT_512M 0x001D0000 PiFirmwareVolume.h 　
19452
 EFI_FVB2_ALIGNMENT_1GEFI_FVB2_ALIGNMENT_1G 0x001E0000 PiFirmwareVolume.h 　
19453
 EFI_FVB2_ALIGNMENT_2GEFI_FVB2_ALIGNMENT_2G 0x001F0000 PiFirmwareVolume.h 　
19454
 EFI_FVH_SIGNATUREEFI_FVH_SIGNATURE EFI_SIGNATURE_32 ('_', 'F', 'V', 'H') PiFirmwareVolume.h 　
19455
 EFI_FVH_REVISIONEFI_FVH_REVISION 0x02 PiFirmwareVolume.h 　
19456
 EFI_FV_EXT_TYPE_OEM_TYPEEFI_FV_EXT_TYPE_OEM_TYPE 0x01 PiFirmwareVolume.h 　
19457
 EFI_HOB_TYPE_HANDOFFEFI_HOB_TYPE_HANDOFF 0x0001 PiHob.h 　
19458
 EFI_HOB_TYPE_MEMORY_ALLOCATIONEFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002 PiHob.h 　
19459
 EFI_HOB_TYPE_RESOURCE_DESCRIPTOEFI_HOB_TYPE_RESOURCE_DESCRIPTO 0x0003 PiHob.h 　
19460
 EFI_HOB_TYPE_GUID_EXTENSIONEFI_HOB_TYPE_GUID_EXTENSION 0x0004 PiHob.h 　
19461
 EFI_HOB_TYPE_FVEFI_HOB_TYPE_FV 0x0005 PiHob.h 　
19462
 EFI_HOB_TYPE_CPUEFI_HOB_TYPE_CPU 0x0006 PiHob.h 　
19463
 EFI_HOB_TYPE_MEMORY_POOLEFI_HOB_TYPE_MEMORY_POOL 0x0007 PiHob.h 　
19464
 EFI_HOB_TYPE_FV2EFI_HOB_TYPE_FV2 0x0009 PiHob.h 　
19465
 EFI_HOB_TYPE_LOAD_PEIMEFI_HOB_TYPE_LOAD_PEIM 0x000A PiHob.h 　
19466
 EFI_HOB_TYPE_UNUSEDEFI_HOB_TYPE_UNUSED 0xFFFE PiHob.h 　
19467
 EFI_HOB_TYPE_END_OF_HOB_LISTEFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF PiHob.h 　
19468
 EFI_HOB_HANDOFF_TABLE_VERSIONEFI_HOB_HANDOFF_TABLE_VERSION 0x0009 PiHob.h 　
19469
 EFI_RESOURCE_SYSTEM_MEMORYEFI_RESOURCE_SYSTEM_MEMORY 0x00000000 PiHob.h 　
19470
 EFI_RESOURCE_MEMORY_MAPPED_IOEFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001 PiHob.h 　
19471
 EFI_RESOURCE_IOEFI_RESOURCE_IO 0x00000002 PiHob.h 　
19472
 EFI_RESOURCE_FIRMWARE_DEVICEEFI_RESOURCE_FIRMWARE_DEVICE 0x00000003 PiHob.h 　
19473
 EFI_RESOURCE_MEMORY_MAPPED_IO_PEFI_RESOURCE_MEMORY_MAPPED_IO_P 0x00000004 PiHob.h 　
19474
 EFI_RESOURCE_MEMORY_RESERVEDEFI_RESOURCE_MEMORY_RESERVED 0x00000005 PiHob.h 　
19475
 EFI_RESOURCE_IO_RESERVEDEFI_RESOURCE_IO_RESERVED 0x00000006 PiHob.h 　
19476
 EFI_RESOURCE_MAX_MEMORY_TYPEEFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007 PiHob.h 　
19477
 EFI_RESOURCE_ATTRIBUTE_PRESENTEFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001 PiHob.h 　
19478
 EFI_RESOURCE_ATTRIBUTE_INITIALIEFI_RESOURCE_ATTRIBUTE_INITIALI 0x00000002 PiHob.h 　
19479
 EFI_RESOURCE_ATTRIBUTE_TESTEDEFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004 PiHob.h 　
19480
 EFI_RESOURCE_ATTRIBUTE_SINGLE_BEFI_RESOURCE_ATTRIBUTE_SINGLE_B 0x00000008 PiHob.h 　
19481
 EFI_RESOURCE_ATTRIBUTE_MULTIPLEEFI_RESOURCE_ATTRIBUTE_MULTIPLE 0x00000010 PiHob.h 　
19482
 EFI_RESOURCE_ATTRIBUTE_ECC_RESEEFI_RESOURCE_ATTRIBUTE_ECC_RESE 0x00000020 PiHob.h 　
19483
 EFI_RESOURCE_ATTRIBUTE_ECC_RESEEFI_RESOURCE_ATTRIBUTE_ECC_RESE 0x00000040 PiHob.h 　
19484
 EFI_RESOURCE_ATTRIBUTE_READ_PROEFI_RESOURCE_ATTRIBUTE_READ_PRO 0x00000080 PiHob.h 　
19485
 EFI_RESOURCE_ATTRIBUTE_WRITE_PREFI_RESOURCE_ATTRIBUTE_WRITE_PR 0x00000100 PiHob.h 　
19486
 EFI_RESOURCE_ATTRIBUTE_EXECUTIOEFI_RESOURCE_ATTRIBUTE_EXECUTIO 0x00000200 PiHob.h 　
19487
 EFI_RESOURCE_ATTRIBUTE_UNCACHEAEFI_RESOURCE_ATTRIBUTE_UNCACHEA 0x00000400 PiHob.h 　
19488
 EFI_RESOURCE_ATTRIBUTE_WRITE_COEFI_RESOURCE_ATTRIBUTE_WRITE_CO 0x00000800 PiHob.h 　
19489
 EFI_RESOURCE_ATTRIBUTE_WRITE_THEFI_RESOURCE_ATTRIBUTE_WRITE_TH 0x00001000 PiHob.h 　
19490
 EFI_RESOURCE_ATTRIBUTE_WRITE_BAEFI_RESOURCE_ATTRIBUTE_WRITE_BA 0x00002000 PiHob.h 　
19491
 EFI_RESOURCE_ATTRIBUTE_16_BIT_IEFI_RESOURCE_ATTRIBUTE_16_BIT_I 0x00004000 PiHob.h 　
19492
 EFI_RESOURCE_ATTRIBUTE_32_BIT_IEFI_RESOURCE_ATTRIBUTE_32_BIT_I 0x00008000 PiHob.h 　
19493
 EFI_RESOURCE_ATTRIBUTE_64_BIT_IEFI_RESOURCE_ATTRIBUTE_64_BIT_I 0x00010000 PiHob.h 　
19494
 EFI_RESOURCE_ATTRIBUTE_UNCACHEDEFI_RESOURCE_ATTRIBUTE_UNCACHED 0x00020000 PiHob.h 　
19495
 EFI_NOT_AVAILABLE_YETEFI_NOT_AVAILABLE_YET EFIERR (32) PiMultiPhase.h 　
19496
 EFI_STATUS_CODE_TYPE_MASKEFI_STATUS_CODE_TYPE_MASK 0x000000FF PiMultiPhase.h 　
19497
 EFI_STATUS_CODE_SEVERITY_MASKEFI_STATUS_CODE_SEVERITY_MASK 0xFF000000 PiMultiPhase.h 　
19498
 EFI_STATUS_CODE_RESERVED_MASKEFI_STATUS_CODE_RESERVED_MASK 0x00FFFF00 PiMultiPhase.h 　
19499
 EFI_PROGRESS_CODEEFI_PROGRESS_CODE 0x00000001 PiMultiPhase.h 　
19500
 EFI_ERROR_CODEEFI_ERROR_CODE 0x00000002 PiMultiPhase.h 　
19501
 EFI_DEBUG_CODEEFI_DEBUG_CODE 0x00000003 PiMultiPhase.h 　
19502
 EFI_ERROR_MINOREFI_ERROR_MINOR 0x40000000 PiMultiPhase.h 　
19503
 EFI_ERROR_MAJOREFI_ERROR_MAJOR 0x80000000 PiMultiPhase.h 　
19504
 EFI_ERROR_UNRECOVEREDEFI_ERROR_UNRECOVERED 0x90000000 PiMultiPhase.h 　
19505
 EFI_ERROR_UNCONTAINEDEFI_ERROR_UNCONTAINED 0xa0000000 PiMultiPhase.h 　
19506
 EFI_STATUS_CODE_CLASS_MASKEFI_STATUS_CODE_CLASS_MASK 0xFF000000 PiMultiPhase.h 　
19507
 EFI_STATUS_CODE_SUBCLASS_MASKEFI_STATUS_CODE_SUBCLASS_MASK 0x00FF0000 PiMultiPhase.h 　
19508
 EFI_STATUS_CODE_OPERATION_MASKEFI_STATUS_CODE_OPERATION_MASK 0x0000FFFF PiMultiPhase.h 　
19509
 EFI_AUTH_STATUS_PLATFORM_OVERRIEFI_AUTH_STATUS_PLATFORM_OVERRI 0x01 PiMultiPhase.h 　
19510
 EFI_AUTH_STATUS_IMAGE_SIGNEDEFI_AUTH_STATUS_IMAGE_SIGNED 0x02 PiMultiPhase.h 　
19511
 EFI_AUTH_STATUS_NOT_TESTEDEFI_AUTH_STATUS_NOT_TESTED 0x04 PiMultiPhase.h 　
19512
 EFI_AUTH_STATUS_TEST_FAILEDEFI_AUTH_STATUS_TEST_FAILED 0x08 PiMultiPhase.h 　
19513
 EFI_AUTH_STATUS_ALLEFI_AUTH_STATUS_ALL 0x0f PiMultiPhase.h 　
19514
 EFI_COMPONENT_NAME2_PROTOCOL_GUEFI_COMPONENT_NAME2_PROTOCOL_GU {0x6a7a5cff, 0xe8d9, 0x4f70, { 0xba, 0xda, 0x75, 0xab, 0x30, 0x25, 0xce, 0x14 } } ComponentName2.h 　
19515
 EFI_CPU_ARCH_PROTOCOL_GUIDEFI_CPU_ARCH_PROTOCOL_GUID { 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } } Cpu.h 　
19516
 EFI_CPU_IO_PROTOCOL_GUIDEFI_CPU_IO_PROTOCOL_GUID { \ 0xB0732526, 0x38C8, 0x4b40, {0x88, 0x77, 0x61, 0xC7, 0xB0, 0x6A, 0xAC, 0x45 } \ } CpuIo.h 　
19517
 EFI_DEBUG_SUPPORT_PROTOCOL_GUIDEFI_DEBUG_SUPPORT_PROTOCOL_GUID { \ 0x2755590C, 0x6F3C, 0x42FA, {0x9E, 0xA4, 0xA3, 0xBA, 0x54, 0x3C, 0xDA, 0x25 } \ } DebugSupport.h 　
19518
 EXCEPT_IA32_DIVIDE_ERROREXCEPT_IA32_DIVIDE_ERROR 0 DebugSupport.h 　
19519
 EXCEPT_IA32_DEBUGEXCEPT_IA32_DEBUG 1 DebugSupport.h 　
19520
 EXCEPT_IA32_NMIEXCEPT_IA32_NMI 2 DebugSupport.h 　
19521
 EXCEPT_IA32_BREAKPOINTEXCEPT_IA32_BREAKPOINT 3 DebugSupport.h 　
19522
 EXCEPT_IA32_OVERFLOWEXCEPT_IA32_OVERFLOW 4 DebugSupport.h 　
19523
 EXCEPT_IA32_BOUNDEXCEPT_IA32_BOUND 5 DebugSupport.h 　
19524
 EXCEPT_IA32_INVALID_OPCODEEXCEPT_IA32_INVALID_OPCODE 6 DebugSupport.h 　
19525
 EXCEPT_IA32_DOUBLE_FAULTEXCEPT_IA32_DOUBLE_FAULT 8 DebugSupport.h 　
19526
 EXCEPT_IA32_INVALID_TSSEXCEPT_IA32_INVALID_TSS 10 DebugSupport.h 　
19527
 EXCEPT_IA32_SEG_NOT_PRESENTEXCEPT_IA32_SEG_NOT_PRESENT 11 DebugSupport.h 　
19528
 EXCEPT_IA32_STACK_FAULTEXCEPT_IA32_STACK_FAULT 12 DebugSupport.h 　
19529
 EXCEPT_IA32_GP_FAULTEXCEPT_IA32_GP_FAULT 13 DebugSupport.h 　
19530
 EXCEPT_IA32_PAGE_FAULTEXCEPT_IA32_PAGE_FAULT 14 DebugSupport.h 　
19531
 EXCEPT_IA32_FP_ERROREXCEPT_IA32_FP_ERROR 16 DebugSupport.h 　
19532
 EXCEPT_IA32_ALIGNMENT_CHECKEXCEPT_IA32_ALIGNMENT_CHECK 17 DebugSupport.h 　
19533
 EXCEPT_IA32_MACHINE_CHECKEXCEPT_IA32_MACHINE_CHECK 18 DebugSupport.h 　
19534
 EXCEPT_IA32_SIMDEXCEPT_IA32_SIMD 19 DebugSupport.h 　
19535
 EXCEPT_X64_DIVIDE_ERROREXCEPT_X64_DIVIDE_ERROR 0 DebugSupport.h 　
19536
 EXCEPT_X64_DEBUGEXCEPT_X64_DEBUG 1 DebugSupport.h 　
19537
 EXCEPT_X64_NMIEXCEPT_X64_NMI 2 DebugSupport.h 　
19538
 EXCEPT_X64_BREAKPOINTEXCEPT_X64_BREAKPOINT 3 DebugSupport.h 　
19539
 EXCEPT_X64_OVERFLOWEXCEPT_X64_OVERFLOW 4 DebugSupport.h 　
19540
 EXCEPT_X64_BOUNDEXCEPT_X64_BOUND 5 DebugSupport.h 　
19541
 EXCEPT_X64_INVALID_OPCODEEXCEPT_X64_INVALID_OPCODE 6 DebugSupport.h 　
19542
 EXCEPT_X64_DOUBLE_FAULTEXCEPT_X64_DOUBLE_FAULT 8 DebugSupport.h 　
19543
 EXCEPT_X64_INVALID_TSSEXCEPT_X64_INVALID_TSS 10 DebugSupport.h 　
19544
 EXCEPT_X64_SEG_NOT_PRESENTEXCEPT_X64_SEG_NOT_PRESENT 11 DebugSupport.h 　
19545
 EXCEPT_X64_STACK_FAULTEXCEPT_X64_STACK_FAULT 12 DebugSupport.h 　
19546
 EXCEPT_X64_GP_FAULTEXCEPT_X64_GP_FAULT 13 DebugSupport.h 　
19547
 EXCEPT_X64_PAGE_FAULTEXCEPT_X64_PAGE_FAULT 14 DebugSupport.h 　
19548
 EXCEPT_X64_FP_ERROREXCEPT_X64_FP_ERROR 16 DebugSupport.h 　
19549
 EXCEPT_X64_ALIGNMENT_CHECKEXCEPT_X64_ALIGNMENT_CHECK 17 DebugSupport.h 　
19550
 EXCEPT_X64_MACHINE_CHECKEXCEPT_X64_MACHINE_CHECK 18 DebugSupport.h 　
19551
 EXCEPT_X64_SIMDEXCEPT_X64_SIMD 19 DebugSupport.h 　
19552
 EXCEPT_IPF_VHTP_TRANSLATIONEXCEPT_IPF_VHTP_TRANSLATION 0 DebugSupport.h 　
19553
 EXCEPT_IPF_INSTRUCTION_TLBEXCEPT_IPF_INSTRUCTION_TLB 1 DebugSupport.h 　
19554
 EXCEPT_IPF_DATA_TLBEXCEPT_IPF_DATA_TLB 2 DebugSupport.h 　
19555
 EXCEPT_IPF_ALT_INSTRUCTION_TLBEXCEPT_IPF_ALT_INSTRUCTION_TLB 3 DebugSupport.h 　
19556
 EXCEPT_IPF_ALT_DATA_TLBEXCEPT_IPF_ALT_DATA_TLB 4 DebugSupport.h 　
19557
 EXCEPT_IPF_DATA_NESTED_TLBEXCEPT_IPF_DATA_NESTED_TLB 5 DebugSupport.h 　
19558
 EXCEPT_IPF_INSTRUCTION_KEY_MISSEXCEPT_IPF_INSTRUCTION_KEY_MISS 6 DebugSupport.h 　
19559
 EXCEPT_IPF_DATA_KEY_MISSEDEXCEPT_IPF_DATA_KEY_MISSED 7 DebugSupport.h 　
19560
 EXCEPT_IPF_DIRTY_BITEXCEPT_IPF_DIRTY_BIT 8 DebugSupport.h 　
19561
 EXCEPT_IPF_INSTRUCTION_ACCESS_BEXCEPT_IPF_INSTRUCTION_ACCESS_B 9 DebugSupport.h 　
19562
 EXCEPT_IPF_DATA_ACCESS_BITEXCEPT_IPF_DATA_ACCESS_BIT 10 DebugSupport.h 　
19563
 EXCEPT_IPF_BREAKPOINTEXCEPT_IPF_BREAKPOINT 11 DebugSupport.h 　
19564
 EXCEPT_IPF_EXTERNAL_INTERRUPTEXCEPT_IPF_EXTERNAL_INTERRUPT 12 DebugSupport.h 　
19565
 EXCEPT_IPF_PAGE_NOT_PRESENTEXCEPT_IPF_PAGE_NOT_PRESENT 20 DebugSupport.h 　
19566
 EXCEPT_IPF_KEY_PERMISSIONEXCEPT_IPF_KEY_PERMISSION 21 DebugSupport.h 　
19567
 EXCEPT_IPF_INSTRUCTION_ACCESS_REXCEPT_IPF_INSTRUCTION_ACCESS_R 22 DebugSupport.h 　
19568
 EXCEPT_IPF_DATA_ACCESS_RIGHTSEXCEPT_IPF_DATA_ACCESS_RIGHTS 23 DebugSupport.h 　
19569
 EXCEPT_IPF_GENERAL_EXCEPTIONEXCEPT_IPF_GENERAL_EXCEPTION 24 DebugSupport.h 　
19570
 EXCEPT_IPF_DISABLED_FP_REGISTEREXCEPT_IPF_DISABLED_FP_REGISTER 25 DebugSupport.h 　
19571
 EXCEPT_IPF_NAT_CONSUMPTIONEXCEPT_IPF_NAT_CONSUMPTION 26 DebugSupport.h 　
19572
 EXCEPT_IPF_SPECULATIONEXCEPT_IPF_SPECULATION 27 DebugSupport.h 　
19573
 EXCEPT_IPF_DEBUGEXCEPT_IPF_DEBUG 29 DebugSupport.h 　
19574
 EXCEPT_IPF_UNALIGNED_REFERENCEEXCEPT_IPF_UNALIGNED_REFERENCE 30 DebugSupport.h 　
19575
 EXCEPT_IPF_UNSUPPORTED_DATA_REFEXCEPT_IPF_UNSUPPORTED_DATA_REF 31 DebugSupport.h 　
19576
 EXCEPT_IPF_FP_FAULTEXCEPT_IPF_FP_FAULT 32 DebugSupport.h 　
19577
 EXCEPT_IPF_FP_TRAPEXCEPT_IPF_FP_TRAP 33 DebugSupport.h 　
19578
 EXCEPT_IPF_LOWER_PRIVILEGE_TRANEXCEPT_IPF_LOWER_PRIVILEGE_TRAN 34 DebugSupport.h 　
19579
 EXCEPT_IPF_TAKEN_BRANCHEXCEPT_IPF_TAKEN_BRANCH 35 DebugSupport.h 　
19580
 EXCEPT_IPF_SINGLE_STEPEXCEPT_IPF_SINGLE_STEP 36 DebugSupport.h 　
19581
 EXCEPT_IPF_IA32_EXCEPTIONEXCEPT_IPF_IA32_EXCEPTION 45 DebugSupport.h 　
19582
 EXCEPT_IPF_IA32_INTERCEPTEXCEPT_IPF_IA32_INTERCEPT 46 DebugSupport.h 　
19583
 EXCEPT_IPF_IA32_INTERRUPTEXCEPT_IPF_IA32_INTERRUPT 47 DebugSupport.h 　
19584
 EXCEPT_EBC_UNDEFINEDEXCEPT_EBC_UNDEFINED 0 DebugSupport.h 　
19585
 EXCEPT_EBC_DIVIDE_ERROREXCEPT_EBC_DIVIDE_ERROR 1 DebugSupport.h 　
19586
 EXCEPT_EBC_DEBUGEXCEPT_EBC_DEBUG 2 DebugSupport.h 　
19587
 EXCEPT_EBC_BREAKPOINTEXCEPT_EBC_BREAKPOINT 3 DebugSupport.h 　
19588
 EXCEPT_EBC_OVERFLOWEXCEPT_EBC_OVERFLOW 4 DebugSupport.h 　
19589
 EXCEPT_EBC_INVALID_OPCODEEXCEPT_EBC_INVALID_OPCODE 5 DebugSupport.h opcode out of range
19590
 EXCEPT_EBC_STACK_FAULTEXCEPT_EBC_STACK_FAULT 6 DebugSupport.h 　
19591
 EXCEPT_EBC_ALIGNMENT_CHECKEXCEPT_EBC_ALIGNMENT_CHECK 7 DebugSupport.h 　
19592
 EXCEPT_EBC_INSTRUCTION_ENCODINGEXCEPT_EBC_INSTRUCTION_ENCODING 8 DebugSupport.h malformed instruction
19593
 EXCEPT_EBC_BAD_BREAKEXCEPT_EBC_BAD_BREAK 9 DebugSupport.h BREAK 0 or undefined BREAK
19594
 EXCEPT_EBC_STEPEXCEPT_EBC_STEP 10 DebugSupport.h to support debug stepping
19595
 MAX_EBC_EXCEPTIONMAX_EBC_EXCEPTION EXCEPT_EBC_STEP DebugSupport.h 　
19596
 EFI_DEVICE_PATH_PROTOCOL_GUIDEFI_DEVICE_PATH_PROTOCOL_GUID { \ 0x9576e91, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ } DevicePath.h 　
19597
 DEVICE_PATH_PROTOCOLDEVICE_PATH_PROTOCOL EFI_DEVICE_PATH_PROTOCOL_GUID DevicePath.h 　
19598
 HARDWARE_DEVICE_PATHHARDWARE_DEVICE_PATH 0x01 DevicePath.h 　
19599
 HW_PCI_DPHW_PCI_DP 0x01 DevicePath.h 　
19600
 HW_PCCARD_DPHW_PCCARD_DP 0x02 DevicePath.h 　
19601
 HW_MEMMAP_DPHW_MEMMAP_DP 0x03 DevicePath.h 　
19602
 HW_VENDOR_DPHW_VENDOR_DP 0x04 DevicePath.h 　
19603
 HW_CONTROLLER_DPHW_CONTROLLER_DP 0x05 DevicePath.h 　
19604
 ACPI_DEVICE_PATHACPI_DEVICE_PATH 0x02 DevicePath.h 　
19605
 ACPI_DPACPI_DP 0x01 DevicePath.h 　
19606
 ACPI_EXTENDED_DPACPI_EXTENDED_DP 0x02 DevicePath.h 　
19607
 PNP_EISA_ID_CONSTPNP_EISA_ID_CONST 0x41d0 DevicePath.h 　
19608
 PNP_EISA_ID_MASKPNP_EISA_ID_MASK 0xffff DevicePath.h 　
19609
 ACPI_ADR_DPACPI_ADR_DP 0x03 DevicePath.h 　
19610
 ACPI_ADR_DISPLAY_TYPE_OTHERACPI_ADR_DISPLAY_TYPE_OTHER 0 DevicePath.h 　
19611
 ACPI_ADR_DISPLAY_TYPE_VGAACPI_ADR_DISPLAY_TYPE_VGA 1 DevicePath.h 　
19612
 ACPI_ADR_DISPLAY_TYPE_TVACPI_ADR_DISPLAY_TYPE_TV 2 DevicePath.h 　
19613
 ACPI_ADR_DISPLAY_TYPE_EXTERNAL_ACPI_ADR_DISPLAY_TYPE_EXTERNAL_ 3 DevicePath.h 　
19614
 ACPI_ADR_DISPLAY_TYPE_INTERNAL_ACPI_ADR_DISPLAY_TYPE_INTERNAL_ 4 DevicePath.h 　
19615
 MESSAGING_DEVICE_PATHMESSAGING_DEVICE_PATH 0x03 DevicePath.h 　
19616
 MSG_ATAPI_DPMSG_ATAPI_DP 0x01 DevicePath.h 　
19617
 MSG_SCSI_DPMSG_SCSI_DP 0x02 DevicePath.h 　
19618
 MSG_FIBRECHANNEL_DPMSG_FIBRECHANNEL_DP 0x03 DevicePath.h 　
19619
 MSG_1394_DPMSG_1394_DP 0x04 DevicePath.h 　
19620
 MSG_USB_DPMSG_USB_DP 0x05 DevicePath.h 　
19621
 MSG_USB_CLASS_DPMSG_USB_CLASS_DP 0x0f DevicePath.h 　
19622
 MSG_USB_WWID_DPMSG_USB_WWID_DP 0x10 DevicePath.h 　
19623
 MSG_DEVICE_LOGICAL_UNIT_DPMSG_DEVICE_LOGICAL_UNIT_DP 0x11 DevicePath.h 　
19624
 MSG_SATA_DPMSG_SATA_DP 0x12 DevicePath.h 　
19625
 MSG_I2O_DPMSG_I2O_DP 0x06 DevicePath.h 　
19626
 MSG_MAC_ADDR_DPMSG_MAC_ADDR_DP 0x0b DevicePath.h 　
19627
 MSG_IPv4_DPMSG_IPv4_DP 0x0c DevicePath.h 　
19628
 MSG_IPv6_DPMSG_IPv6_DP 0x0d DevicePath.h 　
19629
 MSG_INFINIBAND_DPMSG_INFINIBAND_DP 0x09 DevicePath.h 　
19630
 INFINIBAND_RESOURCE_FLAG_IOC_SEINFINIBAND_RESOURCE_FLAG_IOC_SE 0x01 DevicePath.h 　
19631
 INFINIBAND_RESOURCE_FLAG_EXTENDINFINIBAND_RESOURCE_FLAG_EXTEND 0x02 DevicePath.h 　
19632
 INFINIBAND_RESOURCE_FLAG_CONSOLINFINIBAND_RESOURCE_FLAG_CONSOL 0x04 DevicePath.h 　
19633
 INFINIBAND_RESOURCE_FLAG_STORAGINFINIBAND_RESOURCE_FLAG_STORAG 0x08 DevicePath.h 　
19634
 INFINIBAND_RESOURCE_FLAG_NETWORINFINIBAND_RESOURCE_FLAG_NETWOR 0x10 DevicePath.h 　
19635
 MSG_UART_DPMSG_UART_DP 0x0e DevicePath.h 　
19636
 MSG_VENDOR_DPMSG_VENDOR_DP 0x0a DevicePath.h 　
19637
 DEVICE_PATH_MESSAGING_PC_ANSIDEVICE_PATH_MESSAGING_PC_ANSI EFI_PC_ANSI_GUID DevicePath.h 　
19638
 DEVICE_PATH_MESSAGING_VT_100DEVICE_PATH_MESSAGING_VT_100 EFI_VT_100_GUID DevicePath.h 　
19639
 DEVICE_PATH_MESSAGING_VT_100_PLDEVICE_PATH_MESSAGING_VT_100_PL EFI_VT_100_PLUS_GUID DevicePath.h 　
19640
 DEVICE_PATH_MESSAGING_VT_UTF8DEVICE_PATH_MESSAGING_VT_UTF8 EFI_VT_UTF8_GUID DevicePath.h 　
19641
 DEVICE_PATH_MESSAGING_UART_FLOWDEVICE_PATH_MESSAGING_UART_FLOW EFI_UART_DEVICE_PATH_GUID DevicePath.h 　
19642
 DEVICE_PATH_MESSAGING_SASDEVICE_PATH_MESSAGING_SAS EFI_SAS_DEVICE_PATH_GUID DevicePath.h 　
19643
 MSG_ISCSI_DPMSG_ISCSI_DP 0x13 DevicePath.h 　
19644
 ISCSI_LOGIN_OPTION_NO_HEADER_DIISCSI_LOGIN_OPTION_NO_HEADER_DI 0x0000 DevicePath.h 　
19645
 ISCSI_LOGIN_OPTION_HEADER_DIGESISCSI_LOGIN_OPTION_HEADER_DIGES 0x0002 DevicePath.h 　
19646
 ISCSI_LOGIN_OPTION_NO_DATA_DIGEISCSI_LOGIN_OPTION_NO_DATA_DIGE 0x0000 DevicePath.h 　
19647
 ISCSI_LOGIN_OPTION_DATA_DIGEST_ISCSI_LOGIN_OPTION_DATA_DIGEST_ 0x0008 DevicePath.h 　
19648
 ISCSI_LOGIN_OPTION_AUTHMETHOD_CISCSI_LOGIN_OPTION_AUTHMETHOD_C 0x0000 DevicePath.h 　
19649
 ISCSI_LOGIN_OPTION_AUTHMETHOD_NISCSI_LOGIN_OPTION_AUTHMETHOD_N 0x1000 DevicePath.h 　
19650
 ISCSI_LOGIN_OPTION_CHAP_BIISCSI_LOGIN_OPTION_CHAP_BI 0x0000 DevicePath.h 　
19651
 ISCSI_LOGIN_OPTION_CHAP_UNIISCSI_LOGIN_OPTION_CHAP_UNI 0x2000 DevicePath.h 　
19652
 MEDIA_DEVICE_PATHMEDIA_DEVICE_PATH 0x04 DevicePath.h 　
19653
 MEDIA_HARDDRIVE_DPMEDIA_HARDDRIVE_DP 0x01 DevicePath.h 　
19654
 MBR_TYPE_PCATMBR_TYPE_PCAT 0x01 DevicePath.h 　
19655
 MBR_TYPE_EFI_PARTITION_TABLE_HEMBR_TYPE_EFI_PARTITION_TABLE_HE 0x02 DevicePath.h 　
19656
 SIGNATURE_TYPE_MBRSIGNATURE_TYPE_MBR 0x01 DevicePath.h 　
19657
 SIGNATURE_TYPE_GUIDSIGNATURE_TYPE_GUID 0x02 DevicePath.h 　
19658
 MEDIA_CDROM_DPMEDIA_CDROM_DP 0x02 DevicePath.h 　
19659
 MEDIA_VENDOR_DPMEDIA_VENDOR_DP 0x03 DevicePath.h 　
19660
 MEDIA_FILEPATH_DPMEDIA_FILEPATH_DP 0x04 DevicePath.h 　
19661
 SIZE_OF_FILEPATH_DEVICE_PATHSIZE_OF_FILEPATH_DEVICE_PATH EFI_FIELD_OFFSET(FILEPATH_DEVICE_PATH,PathName) DevicePath.h 　
19662
 MEDIA_PROTOCOL_DPMEDIA_PROTOCOL_DP 0x05 DevicePath.h 　
19663
 MEDIA_PIWG_FW_VOL_DPMEDIA_PIWG_FW_VOL_DP 0x7 DevicePath.h 　
19664
 MEDIA_PIWG_FW_FILE_DPMEDIA_PIWG_FW_FILE_DP 0x6 DevicePath.h 　
19665
 BBS_DEVICE_PATHBBS_DEVICE_PATH 0x05 DevicePath.h 　
19666
 BBS_BBS_DPBBS_BBS_DP 0x01 DevicePath.h 　
19667
 BBS_TYPE_FLOPPYBBS_TYPE_FLOPPY 0x01 DevicePath.h 　
19668
 BBS_TYPE_HARDDRIVEBBS_TYPE_HARDDRIVE 0x02 DevicePath.h 　
19669
 BBS_TYPE_CDROMBBS_TYPE_CDROM 0x03 DevicePath.h 　
19670
 BBS_TYPE_PCMCIABBS_TYPE_PCMCIA 0x04 DevicePath.h 　
19671
 BBS_TYPE_USBBBS_TYPE_USB 0x05 DevicePath.h 　
19672
 BBS_TYPE_EMBEDDED_NETWORKBBS_TYPE_EMBEDDED_NETWORK 0x06 DevicePath.h 　
19673
 BBS_TYPE_BEVBBS_TYPE_BEV 0x80 DevicePath.h 　
19674
 BBS_TYPE_UNKNOWNBBS_TYPE_UNKNOWN 0xFF DevicePath.h 　
19675
 END_DEVICE_PATH_TYPEEND_DEVICE_PATH_TYPE 0x7f DevicePath.h 　
19676
 END_ENTIRE_DEVICE_PATH_SUBTYPEEND_ENTIRE_DEVICE_PATH_SUBTYPE 0xFF DevicePath.h 　
19677
 END_INSTANCE_DEVICE_PATH_SUBTYPEND_INSTANCE_DEVICE_PATH_SUBTYP 0x01 DevicePath.h 　
19678
 EFI_DRIVER_BINDING_PROTOCOL_GUIEFI_DRIVER_BINDING_PROTOCOL_GUI { \ 0x18a031ab, 0xb443, 0x4d1a, {0xa5, 0xc0, 0xc, 0x9, 0x26, 0x1e, 0x9f, 0x71 } \ } DriverBinding.h 　
19679
 EFI_NETWORK_INTERFACE_IDENTIFIEEFI_NETWORK_INTERFACE_IDENTIFIE { \ 0xE18541CD, 0xF755, 0x4f73, {0x92, 0x8D, 0x64, 0x3C, 0x8A, 0x79, 0xB2, 0x29 } \ } NetworkInterfaceIdentifier.h 　
19680
 EFI_NETWORK_INTERFACE_IDENTIFIEEFI_NETWORK_INTERFACE_IDENTIFIE 0x00010000 NetworkInterfaceIdentifier.h 　
19681
 EFI_NETWORK_INTERFACE_IDENTIFIEEFI_NETWORK_INTERFACE_IDENTIFIE EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_REVISION NetworkInterfaceIdentifier.h 　
19682
 EFI_PCI_IO_PROTOCOL_GUIDEFI_PCI_IO_PROTOCOL_GUID { \ 0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \ } PciIo.h 　
19683
 EFI_PCI_IO_PASS_THROUGH_BAREFI_PCI_IO_PASS_THROUGH_BAR 0xff PciIo.h < Special BAR that passes a memory or I/O cycle through unchanged
19684
 EFI_PCI_IO_ATTRIBUTE_MASKEFI_PCI_IO_ATTRIBUTE_MASK 0x077f PciIo.h < All the following I/O and Memory cycles
19685
 EFI_PCI_IO_ATTRIBUTE_ISA_MOTHEREFI_PCI_IO_ATTRIBUTE_ISA_MOTHER 0x0001 PciIo.h < I/O cycles 0x0000-0x00FF (10 bit decode)
19686
 EFI_PCI_IO_ATTRIBUTE_ISA_IOEFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 PciIo.h < I/O cycles 0x0100-0x03FF or greater (10 bit decode)
19687
 EFI_PCI_IO_ATTRIBUTE_VGA_PALETTEFI_PCI_IO_ATTRIBUTE_VGA_PALETT 0x0004 PciIo.h < I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
19688
 EFI_PCI_IO_ATTRIBUTE_VGA_MEMORYEFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 PciIo.h < MEM cycles 0xA0000-0xBFFFF (24 bit decode)
19689
 EFI_PCI_IO_ATTRIBUTE_VGA_IOEFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 PciIo.h < I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
19690
 EFI_PCI_IO_ATTRIBUTE_IDE_PRIMAREFI_PCI_IO_ATTRIBUTE_IDE_PRIMAR 0x0020 PciIo.h < I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
19691
 EFI_PCI_IO_ATTRIBUTE_IDE_SECONDEFI_PCI_IO_ATTRIBUTE_IDE_SECOND 0x0040 PciIo.h < I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
19692
 EFI_PCI_IO_ATTRIBUTE_MEMORY_WRIEFI_PCI_IO_ATTRIBUTE_MEMORY_WRI 0x0080 PciIo.h < Map a memory range so write are combined
19693
 EFI_PCI_IO_ATTRIBUTE_IOEFI_PCI_IO_ATTRIBUTE_IO 0x0100 PciIo.h < Enable the I/O decode bit in the PCI Config Header
19694
 EFI_PCI_IO_ATTRIBUTE_MEMORYEFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 PciIo.h < Enable the Memory decode bit in the PCI Config Header
19695
 EFI_PCI_IO_ATTRIBUTE_BUS_MASTEREFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 PciIo.h < Enable the DMA bit in the PCI Config Header
19696
 EFI_PCI_IO_ATTRIBUTE_MEMORY_CACEFI_PCI_IO_ATTRIBUTE_MEMORY_CAC 0x0800 PciIo.h < Map a memory range so all r/w accesses are cached
19697
 EFI_PCI_IO_ATTRIBUTE_MEMORY_DISEFI_PCI_IO_ATTRIBUTE_MEMORY_DIS 0x1000 PciIo.h < Disable a memory range
19698
 EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEFI_PCI_IO_ATTRIBUTE_EMBEDDED_D 0x2000 PciIo.h < Clear for an add-in PCI Device
19699
 EFI_PCI_IO_ATTRIBUTE_EMBEDDED_REFI_PCI_IO_ATTRIBUTE_EMBEDDED_R 0x4000 PciIo.h < Clear for a physical PCI Option ROM accessed through ROM BAR
19700
 EFI_PCI_IO_ATTRIBUTE_DUAL_ADDREEFI_PCI_IO_ATTRIBUTE_DUAL_ADDRE 0x8000 PciIo.h < Clear for PCI controllers that can not genrate a DAC
19701
 EFI_PCI_IO_ATTRIBUTE_ISA_IO_16EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 PciIo.h < I/O cycles 0x0100-0x03FF or greater (16 bit decode)
19702
 EFI_PCI_IO_ATTRIBUTE_VGA_PALETTEFI_PCI_IO_ATTRIBUTE_VGA_PALETT 0x20000 PciIo.h < I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
19703
 EFI_PCI_IO_ATTRIBUTE_VGA_IO_16EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x30000 PciIo.h < I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
19704
 EFI_PCI_DEVICE_ENABLEEFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER) PciIo.h 　
19705
 EFI_VGA_DEVICE_ENABLEEFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO) PciIo.h 　
19706
 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOLEFI_PCI_ROOT_BRIDGE_IO_PROTOCOL { \ 0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ } PciRootBridgeIo.h 　
19707
 EFI_PCI_ATTRIBUTE_ISA_MOTHERBOAEFI_PCI_ATTRIBUTE_ISA_MOTHERBOA 0x0001 PciRootBridgeIo.h 　
19708
 EFI_PCI_ATTRIBUTE_ISA_IOEFI_PCI_ATTRIBUTE_ISA_IO 0x0002 PciRootBridgeIo.h 　
19709
 EFI_PCI_ATTRIBUTE_VGA_PALETTE_IEFI_PCI_ATTRIBUTE_VGA_PALETTE_I 0x0004 PciRootBridgeIo.h 　
19710
 EFI_PCI_ATTRIBUTE_VGA_MEMORYEFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008 PciRootBridgeIo.h 　
19711
 EFI_PCI_ATTRIBUTE_VGA_IOEFI_PCI_ATTRIBUTE_VGA_IO 0x0010 PciRootBridgeIo.h 　
19712
 EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IEFI_PCI_ATTRIBUTE_IDE_PRIMARY_I 0x0020 PciRootBridgeIo.h 　
19713
 EFI_PCI_ATTRIBUTE_IDE_SECONDARYEFI_PCI_ATTRIBUTE_IDE_SECONDARY 0x0040 PciRootBridgeIo.h 　
19714
 EFI_PCI_ATTRIBUTE_MEMORY_WRITE_EFI_PCI_ATTRIBUTE_MEMORY_WRITE_ 0x0080 PciRootBridgeIo.h 　
19715
 EFI_PCI_ATTRIBUTE_MEMORY_CACHEDEFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800 PciRootBridgeIo.h 　
19716
 EFI_PCI_ATTRIBUTE_MEMORY_DISABLEFI_PCI_ATTRIBUTE_MEMORY_DISABL 0x1000 PciRootBridgeIo.h 　
19717
 EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_ 0x8000 PciRootBridgeIo.h 　
19718
 EFI_PCI_ATTRIBUTE_VALID_FOR_ALLEFI_PCI_ATTRIBUTE_VALID_FOR_ALL (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE) PciRootBridgeIo.h 　
19719
 EFI_PCI_ATTRIBUTE_INVALID_FOR_AEFI_PCI_ATTRIBUTE_INVALID_FOR_A (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER) PciRootBridgeIo.h 　
19720
 EFI_SIMPLE_NETWORK_PROTOCOL_GUIEFI_SIMPLE_NETWORK_PROTOCOL_GUI { \ 0xA19832B9, 0xAC25, 0x11D3, {0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } \ } SimpleNetwork.h 　
19721
 EFI_SIMPLE_NETWORK_RECEIVE_UNICEFI_SIMPLE_NETWORK_RECEIVE_UNIC 0x01 SimpleNetwork.h 　
19722
 EFI_SIMPLE_NETWORK_RECEIVE_MULTEFI_SIMPLE_NETWORK_RECEIVE_MULT 0x02 SimpleNetwork.h 　
19723
 EFI_SIMPLE_NETWORK_RECEIVE_BROAEFI_SIMPLE_NETWORK_RECEIVE_BROA 0x04 SimpleNetwork.h 　
19724
 EFI_SIMPLE_NETWORK_RECEIVE_PROMEFI_SIMPLE_NETWORK_RECEIVE_PROM 0x08 SimpleNetwork.h 　
19725
 EFI_SIMPLE_NETWORK_RECEIVE_PROMEFI_SIMPLE_NETWORK_RECEIVE_PROM 0x10 SimpleNetwork.h 　
19726
 EFI_SIMPLE_NETWORK_RECEIVE_INTEEFI_SIMPLE_NETWORK_RECEIVE_INTE 0x01 SimpleNetwork.h 　
19727
 EFI_SIMPLE_NETWORK_TRANSMIT_INTEFI_SIMPLE_NETWORK_TRANSMIT_INT 0x02 SimpleNetwork.h 　
19728
 EFI_SIMPLE_NETWORK_COMMAND_INTEEFI_SIMPLE_NETWORK_COMMAND_INTE 0x04 SimpleNetwork.h 　
19729
 EFI_SIMPLE_NETWORK_SOFTWARE_INTEFI_SIMPLE_NETWORK_SOFTWARE_INT 0x08 SimpleNetwork.h 　
19730
 MAX_MCAST_FILTER_CNTMAX_MCAST_FILTER_CNT 16 SimpleNetwork.h 　
19731
 EFI_SIMPLE_NETWORK_PROTOCOL_REVEFI_SIMPLE_NETWORK_PROTOCOL_REV 0x00010000 SimpleNetwork.h 　
19732
 EFI_SIMPLE_NETWORK_INTERFACE_REEFI_SIMPLE_NETWORK_INTERFACE_RE EFI_SIMPLE_NETWORK_PROTOCOL_REVISION SimpleNetwork.h 　
19733
 EFI_SIMPLE_TEXT_INPUT_PROTOCOL_EFI_SIMPLE_TEXT_INPUT_PROTOCOL_ { \ 0x387477c1, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ } SimpleTextIn.h 　
19734
 SIMPLE_INPUT_PROTOCOLSIMPLE_INPUT_PROTOCOL EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID SimpleTextIn.h 　
19735
 CHAR_NULLCHAR_NULL 0x0000 SimpleTextIn.h 　
19736
 CHAR_BACKSPACECHAR_BACKSPACE 0x0008 SimpleTextIn.h 　
19737
 CHAR_TABCHAR_TAB 0x0009 SimpleTextIn.h 　
19738
 CHAR_LINEFEEDCHAR_LINEFEED 0x000A SimpleTextIn.h 　
19739
 CHAR_CARRIAGE_RETURNCHAR_CARRIAGE_RETURN 0x000D SimpleTextIn.h 　
19740
 SCAN_NULLSCAN_NULL 0x0000 SimpleTextIn.h 　
19741
 SCAN_UPSCAN_UP 0x0001 SimpleTextIn.h 　
19742
 SCAN_DOWNSCAN_DOWN 0x0002 SimpleTextIn.h 　
19743
 SCAN_RIGHTSCAN_RIGHT 0x0003 SimpleTextIn.h 　
19744
 SCAN_LEFTSCAN_LEFT 0x0004 SimpleTextIn.h 　
19745
 SCAN_HOMESCAN_HOME 0x0005 SimpleTextIn.h 　
19746
 SCAN_ENDSCAN_END 0x0006 SimpleTextIn.h 　
19747
 SCAN_INSERTSCAN_INSERT 0x0007 SimpleTextIn.h 　
19748
 SCAN_DELETESCAN_DELETE 0x0008 SimpleTextIn.h 　
19749
 SCAN_PAGE_UPSCAN_PAGE_UP 0x0009 SimpleTextIn.h 　
19750
 SCAN_PAGE_DOWNSCAN_PAGE_DOWN 0x000A SimpleTextIn.h 　
19751
 SCAN_F1SCAN_F1 0x000B SimpleTextIn.h 　
19752
 SCAN_F2SCAN_F2 0x000C SimpleTextIn.h 　
19753
 SCAN_F3SCAN_F3 0x000D SimpleTextIn.h 　
19754
 SCAN_F4SCAN_F4 0x000E SimpleTextIn.h 　
19755
 SCAN_F5SCAN_F5 0x000F SimpleTextIn.h 　
19756
 SCAN_F6SCAN_F6 0x0010 SimpleTextIn.h 　
19757
 SCAN_F7SCAN_F7 0x0011 SimpleTextIn.h 　
19758
 SCAN_F8SCAN_F8 0x0012 SimpleTextIn.h 　
19759
 SCAN_F9SCAN_F9 0x0013 SimpleTextIn.h 　
19760
 SCAN_F10SCAN_F10 0x0014 SimpleTextIn.h 　
19761
 SCAN_F11SCAN_F11 0x0015 SimpleTextIn.h 　
19762
 SCAN_F12SCAN_F12 0x0016 SimpleTextIn.h 　
19763
 SCAN_ESCSCAN_ESC 0x0017 SimpleTextIn.h 　
19764
 EFI_SIMPLE_TEXT_OUTPUT_PROTOCOLEFI_SIMPLE_TEXT_OUTPUT_PROTOCOL { \ 0x387477c2, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \ } SimpleTextOut.h 　
19765
 SIMPLE_TEXT_OUTPUT_PROTOCOLSIMPLE_TEXT_OUTPUT_PROTOCOL EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID SimpleTextOut.h 　
19766
 BOXDRAW_HORIZONTALBOXDRAW_HORIZONTAL 0x2500 SimpleTextOut.h 　
19767
 BOXDRAW_VERTICALBOXDRAW_VERTICAL 0x2502 SimpleTextOut.h 　
19768
 BOXDRAW_DOWN_RIGHTBOXDRAW_DOWN_RIGHT 0x250c SimpleTextOut.h 　
19769
 BOXDRAW_DOWN_LEFTBOXDRAW_DOWN_LEFT 0x2510 SimpleTextOut.h 　
19770
 BOXDRAW_UP_RIGHTBOXDRAW_UP_RIGHT 0x2514 SimpleTextOut.h 　
19771
 BOXDRAW_UP_LEFTBOXDRAW_UP_LEFT 0x2518 SimpleTextOut.h 　
19772
 BOXDRAW_VERTICAL_RIGHTBOXDRAW_VERTICAL_RIGHT 0x251c SimpleTextOut.h 　
19773
 BOXDRAW_VERTICAL_LEFTBOXDRAW_VERTICAL_LEFT 0x2524 SimpleTextOut.h 　
19774
 BOXDRAW_DOWN_HORIZONTALBOXDRAW_DOWN_HORIZONTAL 0x252c SimpleTextOut.h 　
19775
 BOXDRAW_UP_HORIZONTALBOXDRAW_UP_HORIZONTAL 0x2534 SimpleTextOut.h 　
19776
 BOXDRAW_VERTICAL_HORIZONTALBOXDRAW_VERTICAL_HORIZONTAL 0x253c SimpleTextOut.h 　
19777
 BOXDRAW_DOUBLE_HORIZONTALBOXDRAW_DOUBLE_HORIZONTAL 0x2550 SimpleTextOut.h 　
19778
 BOXDRAW_DOUBLE_VERTICALBOXDRAW_DOUBLE_VERTICAL 0x2551 SimpleTextOut.h 　
19779
 BOXDRAW_DOWN_RIGHT_DOUBLEBOXDRAW_DOWN_RIGHT_DOUBLE 0x2552 SimpleTextOut.h 　
19780
 BOXDRAW_DOWN_DOUBLE_RIGHTBOXDRAW_DOWN_DOUBLE_RIGHT 0x2553 SimpleTextOut.h 　
19781
 BOXDRAW_DOUBLE_DOWN_RIGHTBOXDRAW_DOUBLE_DOWN_RIGHT 0x2554 SimpleTextOut.h 　
19782
 BOXDRAW_DOWN_LEFT_DOUBLEBOXDRAW_DOWN_LEFT_DOUBLE 0x2555 SimpleTextOut.h 　
19783
 BOXDRAW_DOWN_DOUBLE_LEFTBOXDRAW_DOWN_DOUBLE_LEFT 0x2556 SimpleTextOut.h 　
19784
 BOXDRAW_DOUBLE_DOWN_LEFTBOXDRAW_DOUBLE_DOWN_LEFT 0x2557 SimpleTextOut.h 　
19785
 BOXDRAW_UP_RIGHT_DOUBLEBOXDRAW_UP_RIGHT_DOUBLE 0x2558 SimpleTextOut.h 　
19786
 BOXDRAW_UP_DOUBLE_RIGHTBOXDRAW_UP_DOUBLE_RIGHT 0x2559 SimpleTextOut.h 　
19787
 BOXDRAW_DOUBLE_UP_RIGHTBOXDRAW_DOUBLE_UP_RIGHT 0x255a SimpleTextOut.h 　
19788
 BOXDRAW_UP_LEFT_DOUBLEBOXDRAW_UP_LEFT_DOUBLE 0x255b SimpleTextOut.h 　
19789
 BOXDRAW_UP_DOUBLE_LEFTBOXDRAW_UP_DOUBLE_LEFT 0x255c SimpleTextOut.h 　
19790
 BOXDRAW_DOUBLE_UP_LEFTBOXDRAW_DOUBLE_UP_LEFT 0x255d SimpleTextOut.h 　
19791
 BOXDRAW_VERTICAL_RIGHT_DOUBLEBOXDRAW_VERTICAL_RIGHT_DOUBLE 0x255e SimpleTextOut.h 　
19792
 BOXDRAW_VERTICAL_DOUBLE_RIGHTBOXDRAW_VERTICAL_DOUBLE_RIGHT 0x255f SimpleTextOut.h 　
19793
 BOXDRAW_DOUBLE_VERTICAL_RIGHTBOXDRAW_DOUBLE_VERTICAL_RIGHT 0x2560 SimpleTextOut.h 　
19794
 BOXDRAW_VERTICAL_LEFT_DOUBLEBOXDRAW_VERTICAL_LEFT_DOUBLE 0x2561 SimpleTextOut.h 　
19795
 BOXDRAW_VERTICAL_DOUBLE_LEFTBOXDRAW_VERTICAL_DOUBLE_LEFT 0x2562 SimpleTextOut.h 　
19796
 BOXDRAW_DOUBLE_VERTICAL_LEFTBOXDRAW_DOUBLE_VERTICAL_LEFT 0x2563 SimpleTextOut.h 　
19797
 BOXDRAW_DOWN_HORIZONTAL_DOUBLEBOXDRAW_DOWN_HORIZONTAL_DOUBLE 0x2564 SimpleTextOut.h 　
19798
 BOXDRAW_DOWN_DOUBLE_HORIZONTALBOXDRAW_DOWN_DOUBLE_HORIZONTAL 0x2565 SimpleTextOut.h 　
19799
 BOXDRAW_DOUBLE_DOWN_HORIZONTALBOXDRAW_DOUBLE_DOWN_HORIZONTAL 0x2566 SimpleTextOut.h 　
19800
 BOXDRAW_UP_HORIZONTAL_DOUBLEBOXDRAW_UP_HORIZONTAL_DOUBLE 0x2567 SimpleTextOut.h 　
19801
 BOXDRAW_UP_DOUBLE_HORIZONTALBOXDRAW_UP_DOUBLE_HORIZONTAL 0x2568 SimpleTextOut.h 　
19802
 BOXDRAW_DOUBLE_UP_HORIZONTALBOXDRAW_DOUBLE_UP_HORIZONTAL 0x2569 SimpleTextOut.h 　
19803
 BOXDRAW_VERTICAL_HORIZONTAL_DOUBOXDRAW_VERTICAL_HORIZONTAL_DOU 0x256a SimpleTextOut.h 　
19804
 BOXDRAW_VERTICAL_DOUBLE_HORIZONBOXDRAW_VERTICAL_DOUBLE_HORIZON 0x256b SimpleTextOut.h 　
19805
 BOXDRAW_DOUBLE_VERTICAL_HORIZONBOXDRAW_DOUBLE_VERTICAL_HORIZON 0x256c SimpleTextOut.h 　
19806
 BLOCKELEMENT_FULL_BLOCKBLOCKELEMENT_FULL_BLOCK 0x2588 SimpleTextOut.h 　
19807
 BLOCKELEMENT_LIGHT_SHADEBLOCKELEMENT_LIGHT_SHADE 0x2591 SimpleTextOut.h 　
19808
 GEOMETRICSHAPE_UP_TRIANGLEGEOMETRICSHAPE_UP_TRIANGLE 0x25b2 SimpleTextOut.h 　
19809
 GEOMETRICSHAPE_RIGHT_TRIANGLEGEOMETRICSHAPE_RIGHT_TRIANGLE 0x25ba SimpleTextOut.h 　
19810
 GEOMETRICSHAPE_DOWN_TRIANGLEGEOMETRICSHAPE_DOWN_TRIANGLE 0x25bc SimpleTextOut.h 　
19811
 GEOMETRICSHAPE_LEFT_TRIANGLEGEOMETRICSHAPE_LEFT_TRIANGLE 0x25c4 SimpleTextOut.h 　
19812
 ARROW_LEFTARROW_LEFT 0x2190 SimpleTextOut.h 　
19813
 ARROW_UPARROW_UP 0x2191 SimpleTextOut.h 　
19814
 ARROW_RIGHTARROW_RIGHT 0x2192 SimpleTextOut.h 　
19815
 ARROW_DOWNARROW_DOWN 0x2193 SimpleTextOut.h 　
19816
 EFI_BLACKEFI_BLACK 0x00 SimpleTextOut.h 　
19817
 EFI_BLUEEFI_BLUE 0x01 SimpleTextOut.h 　
19818
 EFI_GREENEFI_GREEN 0x02 SimpleTextOut.h 　
19819
 EFI_CYANEFI_CYAN (EFI_BLUE | EFI_GREEN) SimpleTextOut.h 　
19820
 EFI_REDEFI_RED 0x04 SimpleTextOut.h 　
19821
 EFI_MAGENTAEFI_MAGENTA (EFI_BLUE | EFI_RED) SimpleTextOut.h 　
19822
 EFI_BROWNEFI_BROWN (EFI_GREEN | EFI_RED) SimpleTextOut.h 　
19823
 EFI_LIGHTGRAYEFI_LIGHTGRAY (EFI_BLUE | EFI_GREEN | EFI_RED) SimpleTextOut.h 　
19824
 EFI_BRIGHTEFI_BRIGHT 0x08 SimpleTextOut.h 　
19825
 EFI_DARKGRAYEFI_DARKGRAY (EFI_BRIGHT) SimpleTextOut.h 　
19826
 EFI_LIGHTBLUEEFI_LIGHTBLUE (EFI_BLUE | EFI_BRIGHT) SimpleTextOut.h 　
19827
 EFI_LIGHTGREENEFI_LIGHTGREEN (EFI_GREEN | EFI_BRIGHT) SimpleTextOut.h 　
19828
 EFI_LIGHTCYANEFI_LIGHTCYAN (EFI_CYAN | EFI_BRIGHT) SimpleTextOut.h 　
19829
 EFI_LIGHTREDEFI_LIGHTRED (EFI_RED | EFI_BRIGHT) SimpleTextOut.h 　
19830
 EFI_LIGHTMAGENTAEFI_LIGHTMAGENTA (EFI_MAGENTA | EFI_BRIGHT) SimpleTextOut.h 　
19831
 EFI_YELLOWEFI_YELLOW (EFI_BROWN | EFI_BRIGHT) SimpleTextOut.h 　
19832
 EFI_WHITEEFI_WHITE (EFI_BLUE | EFI_GREEN | EFI_RED | EFI_BRIGHT) SimpleTextOut.h 　
19833
 EFI_BACKGROUND_BLACKEFI_BACKGROUND_BLACK 0x00 SimpleTextOut.h 　
19834
 EFI_BACKGROUND_BLUEEFI_BACKGROUND_BLUE 0x10 SimpleTextOut.h 　
19835
 EFI_BACKGROUND_GREENEFI_BACKGROUND_GREEN 0x20 SimpleTextOut.h 　
19836
 EFI_BACKGROUND_CYANEFI_BACKGROUND_CYAN (EFI_BACKGROUND_BLUE | EFI_BACKGROUND_GREEN) SimpleTextOut.h 　
19837
 EFI_BACKGROUND_REDEFI_BACKGROUND_RED 0x40 SimpleTextOut.h 　
19838
 EFI_BACKGROUND_MAGENTAEFI_BACKGROUND_MAGENTA (EFI_BACKGROUND_BLUE | EFI_BACKGROUND_RED) SimpleTextOut.h 　
19839
 EFI_BACKGROUND_BROWNEFI_BACKGROUND_BROWN (EFI_BACKGROUND_GREEN | EFI_BACKGROUND_RED) SimpleTextOut.h 　
19840
 EFI_BACKGROUND_LIGHTGRAYEFI_BACKGROUND_LIGHTGRAY (EFI_BACKGROUND_BLUE | EFI_BACKGROUND_GREEN | EFI_BACKGROUND_RED) SimpleTextOut.h 　
19841
 EFI_WIDE_ATTRIBUTEEFI_WIDE_ATTRIBUTE 0x80 SimpleTextOut.h 　
19842
 EFI_SUCCESSEFI_SUCCESS RETURN_SUCCESS UefiBaseType.h 　
19843
 EFI_LOAD_ERROREFI_LOAD_ERROR RETURN_LOAD_ERROR UefiBaseType.h 　
19844
 EFI_INVALID_PARAMETEREFI_INVALID_PARAMETER RETURN_INVALID_PARAMETER UefiBaseType.h 　
19845
 EFI_UNSUPPORTEDEFI_UNSUPPORTED RETURN_UNSUPPORTED UefiBaseType.h 　
19846
 EFI_BAD_BUFFER_SIZEEFI_BAD_BUFFER_SIZE RETURN_BAD_BUFFER_SIZE UefiBaseType.h 　
19847
 EFI_BUFFER_TOO_SMALLEFI_BUFFER_TOO_SMALL RETURN_BUFFER_TOO_SMALL UefiBaseType.h 　
19848
 EFI_NOT_READYEFI_NOT_READY RETURN_NOT_READY UefiBaseType.h 　
19849
 EFI_DEVICE_ERROREFI_DEVICE_ERROR RETURN_DEVICE_ERROR UefiBaseType.h 　
19850
 EFI_WRITE_PROTECTEDEFI_WRITE_PROTECTED RETURN_WRITE_PROTECTED UefiBaseType.h 　
19851
 EFI_OUT_OF_RESOURCESEFI_OUT_OF_RESOURCES RETURN_OUT_OF_RESOURCES UefiBaseType.h 　
19852
 EFI_VOLUME_CORRUPTEDEFI_VOLUME_CORRUPTED RETURN_VOLUME_CORRUPTED UefiBaseType.h 　
19853
 EFI_VOLUME_FULLEFI_VOLUME_FULL RETURN_VOLUME_FULL UefiBaseType.h 　
19854
 EFI_NO_MEDIAEFI_NO_MEDIA RETURN_NO_MEDIA UefiBaseType.h 　
19855
 EFI_MEDIA_CHANGEDEFI_MEDIA_CHANGED RETURN_MEDIA_CHANGED UefiBaseType.h 　
19856
 EFI_NOT_FOUNDEFI_NOT_FOUND RETURN_NOT_FOUND UefiBaseType.h 　
19857
 EFI_ACCESS_DENIEDEFI_ACCESS_DENIED RETURN_ACCESS_DENIED UefiBaseType.h 　
19858
 EFI_NO_RESPONSEEFI_NO_RESPONSE RETURN_NO_RESPONSE UefiBaseType.h 　
19859
 EFI_NO_MAPPINGEFI_NO_MAPPING RETURN_NO_MAPPING UefiBaseType.h 　
19860
 EFI_TIMEOUTEFI_TIMEOUT RETURN_TIMEOUT UefiBaseType.h 　
19861
 EFI_NOT_STARTEDEFI_NOT_STARTED RETURN_NOT_STARTED UefiBaseType.h 　
19862
 EFI_ALREADY_STARTEDEFI_ALREADY_STARTED RETURN_ALREADY_STARTED UefiBaseType.h 　
19863
 EFI_ABORTEDEFI_ABORTED RETURN_ABORTED UefiBaseType.h 　
19864
 EFI_ICMP_ERROREFI_ICMP_ERROR RETURN_ICMP_ERROR UefiBaseType.h 　
19865
 EFI_TFTP_ERROREFI_TFTP_ERROR RETURN_TFTP_ERROR UefiBaseType.h 　
19866
 EFI_PROTOCOL_ERROREFI_PROTOCOL_ERROR RETURN_PROTOCOL_ERROR UefiBaseType.h 　
19867
 EFI_INCOMPATIBLE_VERSIONEFI_INCOMPATIBLE_VERSION RETURN_INCOMPATIBLE_VERSION UefiBaseType.h 　
19868
 EFI_SECURITY_VIOLATIONEFI_SECURITY_VIOLATION RETURN_SECURITY_VIOLATION UefiBaseType.h 　
19869
 EFI_CRC_ERROREFI_CRC_ERROR RETURN_CRC_ERROR UefiBaseType.h 　
19870
 EFI_END_OF_MEDIAEFI_END_OF_MEDIA RETURN_END_OF_MEDIA UefiBaseType.h 　
19871
 EFI_END_OF_FILEEFI_END_OF_FILE RETURN_END_OF_FILE UefiBaseType.h 　
19872
 EFI_INVALID_LANGUAGEEFI_INVALID_LANGUAGE RETURN_INVALID_LANGUAGE UefiBaseType.h 　
19873
 EFI_WARN_UNKNOWN_GLYPHEFI_WARN_UNKNOWN_GLYPH RETURN_WARN_UNKNOWN_GLYPH UefiBaseType.h 　
19874
 EFI_WARN_DELETE_FAILUREEFI_WARN_DELETE_FAILURE RETURN_WARN_DELETE_FAILURE UefiBaseType.h 　
19875
 EFI_WARN_WRITE_FAILUREEFI_WARN_WRITE_FAILURE RETURN_WARN_WRITE_FAILURE UefiBaseType.h 　
19876
 EFI_WARN_BUFFER_TOO_SMALLEFI_WARN_BUFFER_TOO_SMALL RETURN_WARN_BUFFER_TOO_SMALL UefiBaseType.h 　
19877
 EFI_PAGE_SIZEEFI_PAGE_SIZE 0x1000 UefiBaseType.h 　
19878
 EFI_PAGE_MASKEFI_PAGE_MASK 0xFFF UefiBaseType.h 　
19879
 EFI_PAGE_SHIFTEFI_PAGE_SHIFT 12 UefiBaseType.h 　
19880
 EFI_MAX_BITEFI_MAX_BIT MAX_BIT UefiBaseType.h 　
19881
 EFI_MAX_ADDRESSEFI_MAX_ADDRESS MAX_ADDRESS UefiBaseType.h 　
19882
 RFC_3066_ENTRY_SIZERFC_3066_ENTRY_SIZE (42 + 1) UefiBaseType.h 　
19883
 ISO_639_2_ENTRY_SIZEISO_639_2_ENTRY_SIZE 3 UefiBaseType.h 　
19884
 PRIMARY_PART_HEADER_LBAPRIMARY_PART_HEADER_LBA 1 UefiGpt.h 　
19885
 EFI_PTAB_HEADER_IDEFI_PTAB_HEADER_ID 0x5452415020494645ULL UefiGpt.h 　
19886
 EFI_HII_PACKAGE_TYPE_ALLEFI_HII_PACKAGE_TYPE_ALL 0x00 UefiInternalFormRepresentation.h 　
19887
 EFI_HII_PACKAGE_TYPE_GUIDEFI_HII_PACKAGE_TYPE_GUID 0x01 UefiInternalFormRepresentation.h 　
19888
 EFI_HII_PACKAGE_FORMSEFI_HII_PACKAGE_FORMS 0x02 UefiInternalFormRepresentation.h 　
19889
 EFI_HII_PACKAGE_STRINGSEFI_HII_PACKAGE_STRINGS 0x04 UefiInternalFormRepresentation.h 　
19890
 EFI_HII_PACKAGE_FONTSEFI_HII_PACKAGE_FONTS 0x05 UefiInternalFormRepresentation.h 　
19891
 EFI_HII_PACKAGE_IMAGESEFI_HII_PACKAGE_IMAGES 0x06 UefiInternalFormRepresentation.h 　
19892
 EFI_HII_PACKAGE_SIMPLE_FONTSEFI_HII_PACKAGE_SIMPLE_FONTS 0x07 UefiInternalFormRepresentation.h 　
19893
 EFI_HII_PACKAGE_DEVICE_PATHEFI_HII_PACKAGE_DEVICE_PATH 0x08 UefiInternalFormRepresentation.h 　
19894
 EFI_HII_PACKAGE_KEYBOARD_LAYOUTEFI_HII_PACKAGE_KEYBOARD_LAYOUT 0x09 UefiInternalFormRepresentation.h 　
19895
 EFI_HII_PACKAGE_ENDEFI_HII_PACKAGE_END 0xDF UefiInternalFormRepresentation.h 　
19896
 EFI_HII_PACKAGE_TYPE_SYSTEM_BEGEFI_HII_PACKAGE_TYPE_SYSTEM_BEG 0xE0 UefiInternalFormRepresentation.h 　
19897
 EFI_HII_PACKAGE_TYPE_SYSTEM_ENDEFI_HII_PACKAGE_TYPE_SYSTEM_END 0xFF UefiInternalFormRepresentation.h 　
19898
 EFI_GLYPH_NON_SPACINGEFI_GLYPH_NON_SPACING 0x01 UefiInternalFormRepresentation.h 　
19899
 EFI_GLYPH_WIDEEFI_GLYPH_WIDE 0x02 UefiInternalFormRepresentation.h 　
19900
 EFI_GLYPH_HEIGHTEFI_GLYPH_HEIGHT 19 UefiInternalFormRepresentation.h 　
19901
 EFI_GLYPH_WIDTHEFI_GLYPH_WIDTH 8 UefiInternalFormRepresentation.h 　
19902
 EFI_HII_FONT_STYLE_NORMALEFI_HII_FONT_STYLE_NORMAL 0x00000000 UefiInternalFormRepresentation.h 　
19903
 EFI_HII_FONT_STYLE_BOLDEFI_HII_FONT_STYLE_BOLD 0x00000001 UefiInternalFormRepresentation.h 　
19904
 EFI_HII_FONT_STYLE_ITALICEFI_HII_FONT_STYLE_ITALIC 0x00000002 UefiInternalFormRepresentation.h 　
19905
 EFI_HII_FONT_STYLE_EMBOSSEFI_HII_FONT_STYLE_EMBOSS 0x00010000 UefiInternalFormRepresentation.h 　
19906
 EFI_HII_FONT_STYLE_OUTLINEEFI_HII_FONT_STYLE_OUTLINE 0x00020000 UefiInternalFormRepresentation.h 　
19907
 EFI_HII_FONT_STYLE_SHADOWEFI_HII_FONT_STYLE_SHADOW 0x00040000 UefiInternalFormRepresentation.h 　
19908
 EFI_HII_FONT_STYLE_UNDERLINEEFI_HII_FONT_STYLE_UNDERLINE 0x00080000 UefiInternalFormRepresentation.h 　
19909
 EFI_HII_FONT_STYLE_DBL_UNDEREFI_HII_FONT_STYLE_DBL_UNDER 0x00100000 UefiInternalFormRepresentation.h 　
19910
 EFI_HII_GIBT_ENDEFI_HII_GIBT_END 0x00 UefiInternalFormRepresentation.h 　
19911
 EFI_HII_GIBT_GLYPHEFI_HII_GIBT_GLYPH 0x10 UefiInternalFormRepresentation.h 　
19912
 EFI_HII_GIBT_GLYPHSEFI_HII_GIBT_GLYPHS 0x11 UefiInternalFormRepresentation.h 　
19913
 EFI_HII_GIBT_GLYPH_DEFAULTEFI_HII_GIBT_GLYPH_DEFAULT 0x12 UefiInternalFormRepresentation.h 　
19914
 EFI_HII_GIBT_GLYPHS_DEFAULTEFI_HII_GIBT_GLYPHS_DEFAULT 0x13 UefiInternalFormRepresentation.h 　
19915
 EFI_HII_GIBT_DUPLICATEEFI_HII_GIBT_DUPLICATE 0x20 UefiInternalFormRepresentation.h 　
19916
 EFI_HII_GIBT_SKIP2EFI_HII_GIBT_SKIP2 0x21 UefiInternalFormRepresentation.h 　
19917
 EFI_HII_GIBT_SKIP1EFI_HII_GIBT_SKIP1 0x22 UefiInternalFormRepresentation.h 　
19918
 EFI_HII_GIBT_DEFAULTSEFI_HII_GIBT_DEFAULTS 0x23 UefiInternalFormRepresentation.h 　
19919
 EFI_HII_GIBT_EXT1EFI_HII_GIBT_EXT1 0x30 UefiInternalFormRepresentation.h 　
19920
 EFI_HII_GIBT_EXT2EFI_HII_GIBT_EXT2 0x31 UefiInternalFormRepresentation.h 　
19921
 EFI_HII_GIBT_EXT4EFI_HII_GIBT_EXT4 0x32 UefiInternalFormRepresentation.h 　
19922
 UEFI_CONFIG_LANGUEFI_CONFIG_LANG L"x-UEFI" UefiInternalFormRepresentation.h 　
19923
 UEFI_CONFIG_LANG2UEFI_CONFIG_LANG2 L"x-i-UEFI" UefiInternalFormRepresentation.h 　
19924
 EFI_HII_SIBT_ENDEFI_HII_SIBT_END 0x00 UefiInternalFormRepresentation.h 　
19925
 EFI_HII_SIBT_STRING_SCSUEFI_HII_SIBT_STRING_SCSU 0x10 UefiInternalFormRepresentation.h 　
19926
 EFI_HII_SIBT_STRING_SCSU_FONTEFI_HII_SIBT_STRING_SCSU_FONT 0x11 UefiInternalFormRepresentation.h 　
19927
 EFI_HII_SIBT_STRINGS_SCSUEFI_HII_SIBT_STRINGS_SCSU 0x12 UefiInternalFormRepresentation.h 　
19928
 EFI_HII_SIBT_STRINGS_SCSU_FONTEFI_HII_SIBT_STRINGS_SCSU_FONT 0x13 UefiInternalFormRepresentation.h 　
19929
 EFI_HII_SIBT_STRING_UCS2EFI_HII_SIBT_STRING_UCS2 0x14 UefiInternalFormRepresentation.h 　
19930
 EFI_HII_SIBT_STRING_UCS2_FONTEFI_HII_SIBT_STRING_UCS2_FONT 0x15 UefiInternalFormRepresentation.h 　
19931
 EFI_HII_SIBT_STRINGS_UCS2EFI_HII_SIBT_STRINGS_UCS2 0x16 UefiInternalFormRepresentation.h 　
19932
 EFI_HII_SIBT_STRINGS_UCS2_FONTEFI_HII_SIBT_STRINGS_UCS2_FONT 0x17 UefiInternalFormRepresentation.h 　
19933
 EFI_HII_SIBT_DUPLICATEEFI_HII_SIBT_DUPLICATE 0x20 UefiInternalFormRepresentation.h 　
19934
 EFI_HII_SIBT_SKIP2EFI_HII_SIBT_SKIP2 0x21 UefiInternalFormRepresentation.h 　
19935
 EFI_HII_SIBT_SKIP1EFI_HII_SIBT_SKIP1 0x22 UefiInternalFormRepresentation.h 　
19936
 EFI_HII_SIBT_EXT1EFI_HII_SIBT_EXT1 0x30 UefiInternalFormRepresentation.h 　
19937
 EFI_HII_SIBT_EXT2EFI_HII_SIBT_EXT2 0x31 UefiInternalFormRepresentation.h 　
19938
 EFI_HII_SIBT_EXT4EFI_HII_SIBT_EXT4 0x32 UefiInternalFormRepresentation.h 　
19939
 EFI_HII_SIBT_FONTEFI_HII_SIBT_FONT 0x40 UefiInternalFormRepresentation.h 　
19940
 EFI_HII_IIBT_ENDEFI_HII_IIBT_END 0x00 UefiInternalFormRepresentation.h 　
19941
 EFI_HII_IIBT_IMAGE_1BITEFI_HII_IIBT_IMAGE_1BIT 0x10 UefiInternalFormRepresentation.h 　
19942
 EFI_HII_IIBT_IMAGE_1BIT_TRANSEFI_HII_IIBT_IMAGE_1BIT_TRANS 0x11 UefiInternalFormRepresentation.h 　
19943
 EFI_HII_IIBT_IMAGE_4BITEFI_HII_IIBT_IMAGE_4BIT 0x12 UefiInternalFormRepresentation.h 　
19944
 EFI_HII_IIBT_IMAGE_4BIT_TRANSEFI_HII_IIBT_IMAGE_4BIT_TRANS 0x13 UefiInternalFormRepresentation.h 　
19945
 EFI_HII_IIBT_IMAGE_8BITEFI_HII_IIBT_IMAGE_8BIT 0x14 UefiInternalFormRepresentation.h 　
19946
 EFI_HII_IIBT_IMAGE_8BIT_TRANSEFI_HII_IIBT_IMAGE_8BIT_TRANS 0x15 UefiInternalFormRepresentation.h 　
19947
 EFI_HII_IIBT_IMAGE_24BITEFI_HII_IIBT_IMAGE_24BIT 0x16 UefiInternalFormRepresentation.h 　
19948
 EFI_HII_IIBT_IMAGE_24BIT_TRANSEFI_HII_IIBT_IMAGE_24BIT_TRANS 0x17 UefiInternalFormRepresentation.h 　
19949
 EFI_HII_IIBT_IMAGE_JPEGEFI_HII_IIBT_IMAGE_JPEG 0x18 UefiInternalFormRepresentation.h 　
19950
 EFI_HII_IIBT_DUPLICATEEFI_HII_IIBT_DUPLICATE 0x20 UefiInternalFormRepresentation.h 　
19951
 EFI_HII_IIBT_SKIP2EFI_HII_IIBT_SKIP2 0x21 UefiInternalFormRepresentation.h 　
19952
 EFI_HII_IIBT_SKIP1EFI_HII_IIBT_SKIP1 0x22 UefiInternalFormRepresentation.h 　
19953
 EFI_HII_IIBT_EXT1EFI_HII_IIBT_EXT1 0x30 UefiInternalFormRepresentation.h 　
19954
 EFI_HII_IIBT_EXT2EFI_HII_IIBT_EXT2 0x31 UefiInternalFormRepresentation.h 　
19955
 EFI_HII_IIBT_EXT4EFI_HII_IIBT_EXT4 0x32 UefiInternalFormRepresentation.h 　
19956
 EFI_IFR_FORM_OPEFI_IFR_FORM_OP 0x01 UefiInternalFormRepresentation.h 　
19957
 EFI_IFR_SUBTITLE_OPEFI_IFR_SUBTITLE_OP 0x02 UefiInternalFormRepresentation.h 　
19958
 EFI_IFR_TEXT_OPEFI_IFR_TEXT_OP 0x03 UefiInternalFormRepresentation.h 　
19959
 EFI_IFR_IMAGE_OPEFI_IFR_IMAGE_OP 0x04 UefiInternalFormRepresentation.h 　
19960
 EFI_IFR_ONE_OF_OPEFI_IFR_ONE_OF_OP 0x05 UefiInternalFormRepresentation.h 　
19961
 EFI_IFR_CHECKBOX_OPEFI_IFR_CHECKBOX_OP 0x06 UefiInternalFormRepresentation.h 　
19962
 EFI_IFR_NUMERIC_OPEFI_IFR_NUMERIC_OP 0x07 UefiInternalFormRepresentation.h 　
19963
 EFI_IFR_PASSWORD_OPEFI_IFR_PASSWORD_OP 0x08 UefiInternalFormRepresentation.h 　
19964
 EFI_IFR_ONE_OF_OPTION_OPEFI_IFR_ONE_OF_OPTION_OP 0x09 UefiInternalFormRepresentation.h 　
19965
 EFI_IFR_SUPPRESS_IF_OPEFI_IFR_SUPPRESS_IF_OP 0x0A UefiInternalFormRepresentation.h 　
19966
 EFI_IFR_LOCKED_OPEFI_IFR_LOCKED_OP 0x0B UefiInternalFormRepresentation.h 　
19967
 EFI_IFR_ACTION_OPEFI_IFR_ACTION_OP 0x0C UefiInternalFormRepresentation.h 　
19968
 EFI_IFR_RESET_BUTTON_OPEFI_IFR_RESET_BUTTON_OP 0x0D UefiInternalFormRepresentation.h 　
19969
 EFI_IFR_FORM_SET_OPEFI_IFR_FORM_SET_OP 0x0E UefiInternalFormRepresentation.h 　
19970
 EFI_IFR_REF_OPEFI_IFR_REF_OP 0x0F UefiInternalFormRepresentation.h 　
19971
 EFI_IFR_NO_SUBMIT_IF_OPEFI_IFR_NO_SUBMIT_IF_OP 0x10 UefiInternalFormRepresentation.h 　
19972
 EFI_IFR_INCONSISTENT_IF_OPEFI_IFR_INCONSISTENT_IF_OP 0x11 UefiInternalFormRepresentation.h 　
19973
 EFI_IFR_EQ_ID_VAL_OPEFI_IFR_EQ_ID_VAL_OP 0x12 UefiInternalFormRepresentation.h 　
19974
 EFI_IFR_EQ_ID_ID_OPEFI_IFR_EQ_ID_ID_OP 0x13 UefiInternalFormRepresentation.h 　
19975
 EFI_IFR_EQ_ID_LIST_OPEFI_IFR_EQ_ID_LIST_OP 0x14 UefiInternalFormRepresentation.h 　
19976
 EFI_IFR_AND_OPEFI_IFR_AND_OP 0x15 UefiInternalFormRepresentation.h 　
19977
 EFI_IFR_OR_OPEFI_IFR_OR_OP 0x16 UefiInternalFormRepresentation.h 　
19978
 EFI_IFR_NOT_OPEFI_IFR_NOT_OP 0x17 UefiInternalFormRepresentation.h 　
19979
 EFI_IFR_RULE_OPEFI_IFR_RULE_OP 0x18 UefiInternalFormRepresentation.h 　
19980
 EFI_IFR_GRAY_OUT_IF_OPEFI_IFR_GRAY_OUT_IF_OP 0x19 UefiInternalFormRepresentation.h 　
19981
 EFI_IFR_DATE_OPEFI_IFR_DATE_OP 0x1A UefiInternalFormRepresentation.h 　
19982
 EFI_IFR_TIME_OPEFI_IFR_TIME_OP 0x1B UefiInternalFormRepresentation.h 　
19983
 EFI_IFR_STRING_OPEFI_IFR_STRING_OP 0x1C UefiInternalFormRepresentation.h 　
19984
 EFI_IFR_REFRESH_OPEFI_IFR_REFRESH_OP 0x1D UefiInternalFormRepresentation.h 　
19985
 EFI_IFR_DISABLE_IF_OPEFI_IFR_DISABLE_IF_OP 0x1E UefiInternalFormRepresentation.h 　
19986
 EFI_IFR_TO_LOWER_OPEFI_IFR_TO_LOWER_OP 0x20 UefiInternalFormRepresentation.h 　
19987
 EFI_IFR_TO_UPPER_OPEFI_IFR_TO_UPPER_OP 0x21 UefiInternalFormRepresentation.h 　
19988
 EFI_IFR_ORDERED_LIST_OPEFI_IFR_ORDERED_LIST_OP 0x23 UefiInternalFormRepresentation.h 　
19989
 EFI_IFR_VARSTORE_OPEFI_IFR_VARSTORE_OP 0x24 UefiInternalFormRepresentation.h 　
19990
 EFI_IFR_VARSTORE_NAME_VALUE_OPEFI_IFR_VARSTORE_NAME_VALUE_OP 0x25 UefiInternalFormRepresentation.h 　
19991
 EFI_IFR_VARSTORE_EFI_OPEFI_IFR_VARSTORE_EFI_OP 0x26 UefiInternalFormRepresentation.h 　
19992
 EFI_IFR_VARSTORE_DEVICE_OPEFI_IFR_VARSTORE_DEVICE_OP 0x27 UefiInternalFormRepresentation.h 　
19993
 EFI_IFR_VERSION_OPEFI_IFR_VERSION_OP 0x28 UefiInternalFormRepresentation.h 　
19994
 EFI_IFR_END_OPEFI_IFR_END_OP 0x29 UefiInternalFormRepresentation.h 　
19995
 EFI_IFR_MATCH_OPEFI_IFR_MATCH_OP 0x2A UefiInternalFormRepresentation.h 　
19996
 EFI_IFR_EQUAL_OPEFI_IFR_EQUAL_OP 0x2F UefiInternalFormRepresentation.h 　
19997
 EFI_IFR_NOT_EQUAL_OPEFI_IFR_NOT_EQUAL_OP 0x30 UefiInternalFormRepresentation.h 　
19998
 EFI_IFR_GREATER_THAN_OPEFI_IFR_GREATER_THAN_OP 0x31 UefiInternalFormRepresentation.h 　
19999
 EFI_IFR_GREATER_EQUAL_OPEFI_IFR_GREATER_EQUAL_OP 0x32 UefiInternalFormRepresentation.h 　
20000
 EFI_IFR_LESS_THAN_OPEFI_IFR_LESS_THAN_OP 0x33 UefiInternalFormRepresentation.h 　
20001
 EFI_IFR_LESS_EQUAL_OPEFI_IFR_LESS_EQUAL_OP 0x34 UefiInternalFormRepresentation.h 　
20002
 EFI_IFR_BITWISE_AND_OPEFI_IFR_BITWISE_AND_OP 0x35 UefiInternalFormRepresentation.h 　
20003
 EFI_IFR_BITWISE_OR_OPEFI_IFR_BITWISE_OR_OP 0x36 UefiInternalFormRepresentation.h 　
20004
 EFI_IFR_BITWISE_NOT_OPEFI_IFR_BITWISE_NOT_OP 0x37 UefiInternalFormRepresentation.h 　
20005
 EFI_IFR_SHIFT_LEFT_OPEFI_IFR_SHIFT_LEFT_OP 0x38 UefiInternalFormRepresentation.h 　
20006
 EFI_IFR_SHIFT_RIGHT_OPEFI_IFR_SHIFT_RIGHT_OP 0x39 UefiInternalFormRepresentation.h 　
20007
 EFI_IFR_ADD_OPEFI_IFR_ADD_OP 0x3A UefiInternalFormRepresentation.h 　
20008
 EFI_IFR_SUBTRACT_OPEFI_IFR_SUBTRACT_OP 0x3B UefiInternalFormRepresentation.h 　
20009
 EFI_IFR_MULTIPLY_OPEFI_IFR_MULTIPLY_OP 0x3C UefiInternalFormRepresentation.h 　
20010
 EFI_IFR_DIVIDE_OPEFI_IFR_DIVIDE_OP 0x3D UefiInternalFormRepresentation.h 　
20011
 EFI_IFR_MODULO_OPEFI_IFR_MODULO_OP 0x3E UefiInternalFormRepresentation.h 　
20012
 EFI_IFR_RULE_REF_OPEFI_IFR_RULE_REF_OP 0x3F UefiInternalFormRepresentation.h 　
20013
 EFI_IFR_QUESTION_REF1_OPEFI_IFR_QUESTION_REF1_OP 0x40 UefiInternalFormRepresentation.h 　
20014
 EFI_IFR_QUESTION_REF2_OPEFI_IFR_QUESTION_REF2_OP 0x41 UefiInternalFormRepresentation.h 　
20015
 EFI_IFR_UINT8_OPEFI_IFR_UINT8_OP 0x42 UefiInternalFormRepresentation.h 　
20016
 EFI_IFR_UINT16_OPEFI_IFR_UINT16_OP 0x43 UefiInternalFormRepresentation.h 　
20017
 EFI_IFR_UINT32_OPEFI_IFR_UINT32_OP 0x44 UefiInternalFormRepresentation.h 　
20018
 EFI_IFR_UINT64_OPEFI_IFR_UINT64_OP 0x45 UefiInternalFormRepresentation.h 　
20019
 EFI_IFR_TRUE_OPEFI_IFR_TRUE_OP 0x46 UefiInternalFormRepresentation.h 　
20020
 EFI_IFR_FALSE_OPEFI_IFR_FALSE_OP 0x47 UefiInternalFormRepresentation.h 　
20021
 EFI_IFR_TO_UINT_OPEFI_IFR_TO_UINT_OP 0x48 UefiInternalFormRepresentation.h 　
20022
 EFI_IFR_TO_STRING_OPEFI_IFR_TO_STRING_OP 0x49 UefiInternalFormRepresentation.h 　
20023
 EFI_IFR_TO_BOOLEAN_OPEFI_IFR_TO_BOOLEAN_OP 0x4A UefiInternalFormRepresentation.h 　
20024
 EFI_IFR_MID_OPEFI_IFR_MID_OP 0x4B UefiInternalFormRepresentation.h 　
20025
 EFI_IFR_FIND_OPEFI_IFR_FIND_OP 0x4C UefiInternalFormRepresentation.h 　
20026
 EFI_IFR_TOKEN_OPEFI_IFR_TOKEN_OP 0x4D UefiInternalFormRepresentation.h 　
20027
 EFI_IFR_STRING_REF1_OPEFI_IFR_STRING_REF1_OP 0x4E UefiInternalFormRepresentation.h 　
20028
 EFI_IFR_STRING_REF2_OPEFI_IFR_STRING_REF2_OP 0x4F UefiInternalFormRepresentation.h 　
20029
 EFI_IFR_CONDITIONAL_OPEFI_IFR_CONDITIONAL_OP 0x50 UefiInternalFormRepresentation.h 　
20030
 EFI_IFR_QUESTION_REF3_OPEFI_IFR_QUESTION_REF3_OP 0x51 UefiInternalFormRepresentation.h 　
20031
 EFI_IFR_ZERO_OPEFI_IFR_ZERO_OP 0x52 UefiInternalFormRepresentation.h 　
20032
 EFI_IFR_ONE_OPEFI_IFR_ONE_OP 0x53 UefiInternalFormRepresentation.h 　
20033
 EFI_IFR_ONES_OPEFI_IFR_ONES_OP 0x54 UefiInternalFormRepresentation.h 　
20034
 EFI_IFR_UNDEFINED_OPEFI_IFR_UNDEFINED_OP 0x55 UefiInternalFormRepresentation.h 　
20035
 EFI_IFR_LENGTH_OPEFI_IFR_LENGTH_OP 0x56 UefiInternalFormRepresentation.h 　
20036
 EFI_IFR_DUP_OPEFI_IFR_DUP_OP 0x57 UefiInternalFormRepresentation.h 　
20037
 EFI_IFR_THIS_OPEFI_IFR_THIS_OP 0x58 UefiInternalFormRepresentation.h 　
20038
 EFI_IFR_SPAN_OPEFI_IFR_SPAN_OP 0x59 UefiInternalFormRepresentation.h 　
20039
 EFI_IFR_VALUE_OPEFI_IFR_VALUE_OP 0x5A UefiInternalFormRepresentation.h 　
20040
 EFI_IFR_DEFAULT_OPEFI_IFR_DEFAULT_OP 0x5B UefiInternalFormRepresentation.h 　
20041
 EFI_IFR_DEFAULTSTORE_OPEFI_IFR_DEFAULTSTORE_OP 0x5C UefiInternalFormRepresentation.h 　
20042
 EFI_IFR_CATENATE_OPEFI_IFR_CATENATE_OP 0x5E UefiInternalFormRepresentation.h 　
20043
 EFI_IFR_GUID_OPEFI_IFR_GUID_OP 0x5F UefiInternalFormRepresentation.h 　
20044
 EFI_IFR_FLAG_READ_ONLYEFI_IFR_FLAG_READ_ONLY 0x01 UefiInternalFormRepresentation.h 　
20045
 EFI_IFR_FLAG_CALLBACKEFI_IFR_FLAG_CALLBACK 0x04 UefiInternalFormRepresentation.h 　
20046
 EFI_IFR_FLAG_RESET_REQUIREDEFI_IFR_FLAG_RESET_REQUIRED 0x10 UefiInternalFormRepresentation.h 　
20047
 EFI_IFR_FLAG_OPTIONS_ONLYEFI_IFR_FLAG_OPTIONS_ONLY 0x80 UefiInternalFormRepresentation.h 　
20048
 EFI_HII_DEFAULT_CLASS_STANDARDEFI_HII_DEFAULT_CLASS_STANDARD 0x0000 UefiInternalFormRepresentation.h 　
20049
 EFI_HII_DEFAULT_CLASS_MANUFACTUEFI_HII_DEFAULT_CLASS_MANUFACTU 0x0001 UefiInternalFormRepresentation.h 　
20050
 EFI_HII_DEFAULT_CLASS_SAFEEFI_HII_DEFAULT_CLASS_SAFE 0x0002 UefiInternalFormRepresentation.h 　
20051
 EFI_HII_DEFAULT_CLASS_PLATFORM_EFI_HII_DEFAULT_CLASS_PLATFORM_ 0x4000 UefiInternalFormRepresentation.h 　
20052
 EFI_HII_DEFAULT_CLASS_PLATFORM_EFI_HII_DEFAULT_CLASS_PLATFORM_ 0x7fff UefiInternalFormRepresentation.h 　
20053
 EFI_HII_DEFAULT_CLASS_HARDWARE_EFI_HII_DEFAULT_CLASS_HARDWARE_ 0x8000 UefiInternalFormRepresentation.h 　
20054
 EFI_HII_DEFAULT_CLASS_HARDWARE_EFI_HII_DEFAULT_CLASS_HARDWARE_ 0xbfff UefiInternalFormRepresentation.h 　
20055
 EFI_HII_DEFAULT_CLASS_FIRMWARE_EFI_HII_DEFAULT_CLASS_FIRMWARE_ 0xc000 UefiInternalFormRepresentation.h 　
20056
 EFI_HII_DEFAULT_CLASS_FIRMWARE_EFI_HII_DEFAULT_CLASS_FIRMWARE_ 0xffff UefiInternalFormRepresentation.h 　
20057
 EFI_IFR_FLAGS_HORIZONTALEFI_IFR_FLAGS_HORIZONTAL 0x01 UefiInternalFormRepresentation.h 　
20058
 EFI_IFR_CHECKBOX_DEFAULTEFI_IFR_CHECKBOX_DEFAULT 0x01 UefiInternalFormRepresentation.h 　
20059
 EFI_IFR_CHECKBOX_DEFAULT_MFGEFI_IFR_CHECKBOX_DEFAULT_MFG 0x02 UefiInternalFormRepresentation.h 　
20060
 EFI_QF_DATE_YEAR_SUPPRESSEFI_QF_DATE_YEAR_SUPPRESS 0x01 UefiInternalFormRepresentation.h 　
20061
 EFI_QF_DATE_MONTH_SUPPRESSEFI_QF_DATE_MONTH_SUPPRESS 0x02 UefiInternalFormRepresentation.h 　
20062
 EFI_QF_DATE_DAY_SUPPRESSEFI_QF_DATE_DAY_SUPPRESS 0x04 UefiInternalFormRepresentation.h 　
20063
 EFI_QF_DATE_STORAGEEFI_QF_DATE_STORAGE 0x30 UefiInternalFormRepresentation.h 　
20064
 QF_DATE_STORAGE_NORMALQF_DATE_STORAGE_NORMAL 0x00 UefiInternalFormRepresentation.h 　
20065
 QF_DATE_STORAGE_TIMEQF_DATE_STORAGE_TIME 0x10 UefiInternalFormRepresentation.h 　
20066
 QF_DATE_STORAGE_WAKEUPQF_DATE_STORAGE_WAKEUP 0x20 UefiInternalFormRepresentation.h 　
20067
 EFI_IFR_NUMERIC_SIZEEFI_IFR_NUMERIC_SIZE 0x03 UefiInternalFormRepresentation.h 　
20068
 EFI_IFR_NUMERIC_SIZE_1EFI_IFR_NUMERIC_SIZE_1 0x00 UefiInternalFormRepresentation.h 　
20069
 EFI_IFR_NUMERIC_SIZE_2EFI_IFR_NUMERIC_SIZE_2 0x01 UefiInternalFormRepresentation.h 　
20070
 EFI_IFR_NUMERIC_SIZE_4EFI_IFR_NUMERIC_SIZE_4 0x02 UefiInternalFormRepresentation.h 　
20071
 EFI_IFR_NUMERIC_SIZE_8EFI_IFR_NUMERIC_SIZE_8 0x03 UefiInternalFormRepresentation.h 　
20072
 EFI_IFR_DISPLAYEFI_IFR_DISPLAY 0x30 UefiInternalFormRepresentation.h 　
20073
 EFI_IFR_DISPLAY_INT_DECEFI_IFR_DISPLAY_INT_DEC 0x00 UefiInternalFormRepresentation.h 　
20074
 EFI_IFR_DISPLAY_UINT_DECEFI_IFR_DISPLAY_UINT_DEC 0x10 UefiInternalFormRepresentation.h 　
20075
 EFI_IFR_DISPLAY_UINT_HEXEFI_IFR_DISPLAY_UINT_HEX 0x20 UefiInternalFormRepresentation.h 　
20076
 EFI_IFR_STRING_MULTI_LINEEFI_IFR_STRING_MULTI_LINE 0x01 UefiInternalFormRepresentation.h 　
20077
 EFI_IFR_UNIQUE_SETEFI_IFR_UNIQUE_SET 0x01 UefiInternalFormRepresentation.h 　
20078
 EFI_IFR_NO_EMPTY_SETEFI_IFR_NO_EMPTY_SET 0x02 UefiInternalFormRepresentation.h 　
20079
 QF_TIME_HOUR_SUPPRESSQF_TIME_HOUR_SUPPRESS 0x01 UefiInternalFormRepresentation.h 　
20080
 QF_TIME_MINUTE_SUPPRESSQF_TIME_MINUTE_SUPPRESS 0x02 UefiInternalFormRepresentation.h 　
20081
 QF_TIME_SECOND_SUPPRESSQF_TIME_SECOND_SUPPRESS 0x04 UefiInternalFormRepresentation.h 　
20082
 QF_TIME_STORAGEQF_TIME_STORAGE 0x30 UefiInternalFormRepresentation.h 　
20083
 QF_TIME_STORAGE_NORMALQF_TIME_STORAGE_NORMAL 0x00 UefiInternalFormRepresentation.h 　
20084
 QF_TIME_STORAGE_TIMEQF_TIME_STORAGE_TIME 0x10 UefiInternalFormRepresentation.h 　
20085
 QF_TIME_STORAGE_WAKEUPQF_TIME_STORAGE_WAKEUP 0x20 UefiInternalFormRepresentation.h 　
20086
 EFI_IFR_TYPE_NUM_SIZE_8EFI_IFR_TYPE_NUM_SIZE_8 0x00 UefiInternalFormRepresentation.h 　
20087
 EFI_IFR_TYPE_NUM_SIZE_16EFI_IFR_TYPE_NUM_SIZE_16 0x01 UefiInternalFormRepresentation.h 　
20088
 EFI_IFR_TYPE_NUM_SIZE_32EFI_IFR_TYPE_NUM_SIZE_32 0x02 UefiInternalFormRepresentation.h 　
20089
 EFI_IFR_TYPE_NUM_SIZE_64EFI_IFR_TYPE_NUM_SIZE_64 0x03 UefiInternalFormRepresentation.h 　
20090
 EFI_IFR_TYPE_BOOLEANEFI_IFR_TYPE_BOOLEAN 0x04 UefiInternalFormRepresentation.h 　
20091
 EFI_IFR_TYPE_TIMEEFI_IFR_TYPE_TIME 0x05 UefiInternalFormRepresentation.h 　
20092
 EFI_IFR_TYPE_DATEEFI_IFR_TYPE_DATE 0x06 UefiInternalFormRepresentation.h 　
20093
 EFI_IFR_TYPE_STRINGEFI_IFR_TYPE_STRING 0x07 UefiInternalFormRepresentation.h 　
20094
 EFI_IFR_TYPE_OTHEREFI_IFR_TYPE_OTHER 0x08 UefiInternalFormRepresentation.h 　
20095
 EFI_IFR_OPTION_DEFAULTEFI_IFR_OPTION_DEFAULT 0x10 UefiInternalFormRepresentation.h 　
20096
 EFI_IFR_OPTION_DEFAULT_MFGEFI_IFR_OPTION_DEFAULT_MFG 0x20 UefiInternalFormRepresentation.h 　
20097
 EFI_IFR_STRING_UNSIGNED_DECEFI_IFR_STRING_UNSIGNED_DEC 0 UefiInternalFormRepresentation.h 　
20098
 EFI_IFR_STRING_SIGNED_DECEFI_IFR_STRING_SIGNED_DEC 1 UefiInternalFormRepresentation.h 　
20099
 EFI_IFR_STRING_LOWERCASE_HEXEFI_IFR_STRING_LOWERCASE_HEX 2 UefiInternalFormRepresentation.h 　
20100
 EFI_IFR_STRING_UPPERCASE_HEXEFI_IFR_STRING_UPPERCASE_HEX 3 UefiInternalFormRepresentation.h 　
20101
 EFI_IFR_STRING_ASCIIEFI_IFR_STRING_ASCII 0 UefiInternalFormRepresentation.h 　
20102
 EFI_IFR_STRING_UNICODEEFI_IFR_STRING_UNICODE 8 UefiInternalFormRepresentation.h 　
20103
 EFI_IFR_FF_CASE_SENSITIVEEFI_IFR_FF_CASE_SENSITIVE 0x00 UefiInternalFormRepresentation.h 　
20104
 EFI_IFR_FF_CASE_INSENSITIVEEFI_IFR_FF_CASE_INSENSITIVE 0x01 UefiInternalFormRepresentation.h 　
20105
 EFI_IFR_FLAGS_FIRST_MATCHINGEFI_IFR_FLAGS_FIRST_MATCHING 0x00 UefiInternalFormRepresentation.h 　
20106
 EFI_IFR_FLAGS_FIRST_NON_MATCHINEFI_IFR_FLAGS_FIRST_NON_MATCHIN 0x01 UefiInternalFormRepresentation.h 　
20107
 EFI_AFFECTED_BY_STANDARD_SHIFTEFI_AFFECTED_BY_STANDARD_SHIFT 0x0001 UefiInternalFormRepresentation.h 　
20108
 EFI_AFFECTED_BY_CAPS_LOCKEFI_AFFECTED_BY_CAPS_LOCK 0x0002 UefiInternalFormRepresentation.h 　
20109
 EFI_AFFECTED_BY_NUM_LOCKEFI_AFFECTED_BY_NUM_LOCK 0x0004 UefiInternalFormRepresentation.h 　
20110
 EFI_NULL_MODIFIEREFI_NULL_MODIFIER 0x0000 UefiInternalFormRepresentation.h 　
20111
 EFI_LEFT_CONTROL_MODIFIEREFI_LEFT_CONTROL_MODIFIER 0x0001 UefiInternalFormRepresentation.h 　
20112
 EFI_RIGHT_CONTROL_MODIFIEREFI_RIGHT_CONTROL_MODIFIER 0x0002 UefiInternalFormRepresentation.h 　
20113
 EFI_LEFT_ALT_MODIFIEREFI_LEFT_ALT_MODIFIER 0x0003 UefiInternalFormRepresentation.h 　
20114
 EFI_RIGHT_ALT_MODIFIEREFI_RIGHT_ALT_MODIFIER 0x0004 UefiInternalFormRepresentation.h 　
20115
 EFI_ALT_GR_MODIFIEREFI_ALT_GR_MODIFIER 0x0005 UefiInternalFormRepresentation.h 　
20116
 EFI_INSERT_MODIFIEREFI_INSERT_MODIFIER 0x0006 UefiInternalFormRepresentation.h 　
20117
 EFI_DELETE_MODIFIEREFI_DELETE_MODIFIER 0x0007 UefiInternalFormRepresentation.h 　
20118
 EFI_PAGE_DOWN_MODIFIEREFI_PAGE_DOWN_MODIFIER 0x0008 UefiInternalFormRepresentation.h 　
20119
 EFI_PAGE_UP_MODIFIEREFI_PAGE_UP_MODIFIER 0x0009 UefiInternalFormRepresentation.h 　
20120
 EFI_HOME_MODIFIEREFI_HOME_MODIFIER 0x000A UefiInternalFormRepresentation.h 　
20121
 EFI_END_MODIFIEREFI_END_MODIFIER 0x000B UefiInternalFormRepresentation.h 　
20122
 EFI_LEFT_SHIFT_MODIFIEREFI_LEFT_SHIFT_MODIFIER 0x000C UefiInternalFormRepresentation.h 　
20123
 EFI_RIGHT_SHIFT_MODIFIEREFI_RIGHT_SHIFT_MODIFIER 0x000D UefiInternalFormRepresentation.h 　
20124
 EFI_CAPS_LOCK_MODIFIEREFI_CAPS_LOCK_MODIFIER 0x000E UefiInternalFormRepresentation.h 　
20125
 EFI_NUM_LOCK_MODIFIEREFI_NUM_LOCK_MODIFIER 0x000F UefiInternalFormRepresentation.h 　
20126
 EFI_LEFT_ARROW_MODIFIEREFI_LEFT_ARROW_MODIFIER 0x0010 UefiInternalFormRepresentation.h 　
20127
 EFI_RIGHT_ARROW_MODIFIEREFI_RIGHT_ARROW_MODIFIER 0x0011 UefiInternalFormRepresentation.h 　
20128
 EFI_DOWN_ARROW_MODIFIEREFI_DOWN_ARROW_MODIFIER 0x0012 UefiInternalFormRepresentation.h 　
20129
 EFI_UP_ARROW_MODIFIEREFI_UP_ARROW_MODIFIER 0x0013 UefiInternalFormRepresentation.h 　
20130
 EFI_NS_KEY_MODIFIEREFI_NS_KEY_MODIFIER 0x0014 UefiInternalFormRepresentation.h 　
20131
 EFI_NS_KEY_DEPENDENCY_MODIFIEREFI_NS_KEY_DEPENDENCY_MODIFIER 0x0015 UefiInternalFormRepresentation.h 　
20132
 EFI_FUNCTION_KEY_ONE_MODIFIEREFI_FUNCTION_KEY_ONE_MODIFIER 0x0016 UefiInternalFormRepresentation.h 　
20133
 EFI_FUNCTION_KEY_TWO_MODIFIEREFI_FUNCTION_KEY_TWO_MODIFIER 0x0017 UefiInternalFormRepresentation.h 　
20134
 EFI_FUNCTION_KEY_THREE_MODIFIEREFI_FUNCTION_KEY_THREE_MODIFIER 0x0018 UefiInternalFormRepresentation.h 　
20135
 EFI_FUNCTION_KEY_FOUR_MODIFIEREFI_FUNCTION_KEY_FOUR_MODIFIER 0x0019 UefiInternalFormRepresentation.h 　
20136
 EFI_FUNCTION_KEY_FIVE_MODIFIEREFI_FUNCTION_KEY_FIVE_MODIFIER 0x001A UefiInternalFormRepresentation.h 　
20137
 EFI_FUNCTION_KEY_SIX_MODIFIEREFI_FUNCTION_KEY_SIX_MODIFIER 0x001B UefiInternalFormRepresentation.h 　
20138
 EFI_FUNCTION_KEY_SEVEN_MODIFIEREFI_FUNCTION_KEY_SEVEN_MODIFIER 0x001C UefiInternalFormRepresentation.h 　
20139
 EFI_FUNCTION_KEY_EIGHT_MODIFIEREFI_FUNCTION_KEY_EIGHT_MODIFIER 0x001D UefiInternalFormRepresentation.h 　
20140
 EFI_FUNCTION_KEY_NINE_MODIFIEREFI_FUNCTION_KEY_NINE_MODIFIER 0x001E UefiInternalFormRepresentation.h 　
20141
 EFI_FUNCTION_KEY_TEN_MODIFIEREFI_FUNCTION_KEY_TEN_MODIFIER 0x001F UefiInternalFormRepresentation.h 　
20142
 EFI_FUNCTION_KEY_ELEVEN_MODIFIEEFI_FUNCTION_KEY_ELEVEN_MODIFIE 0x0020 UefiInternalFormRepresentation.h 　
20143
 EFI_FUNCTION_KEY_TWELVE_MODIFIEEFI_FUNCTION_KEY_TWELVE_MODIFIE 0x0021 UefiInternalFormRepresentation.h 　
20144
 EFI_PRINT_MODIFIEREFI_PRINT_MODIFIER 0x0022 UefiInternalFormRepresentation.h 　
20145
 EFI_SYS_REQUEST_MODIFIEREFI_SYS_REQUEST_MODIFIER 0x0023 UefiInternalFormRepresentation.h 　
20146
 EFI_SCROLL_LOCK_MODIFIEREFI_SCROLL_LOCK_MODIFIER 0x0024 UefiInternalFormRepresentation.h 　
20147
 EFI_PAUSE_MODIFIEREFI_PAUSE_MODIFIER 0x0025 UefiInternalFormRepresentation.h 　
20148
 EFI_BREAK_MODIFIEREFI_BREAK_MODIFIER 0x0026 UefiInternalFormRepresentation.h 　
20149
 EFI_LEFT_LOGO_MODIFIEREFI_LEFT_LOGO_MODIFIER 0x0027 UefiInternalFormRepresentation.h 　
20150
 EFI_RIGHT_LOGO_MODIFIEREFI_RIGHT_LOGO_MODIFIER 0x0028 UefiInternalFormRepresentation.h 　
20151
 EFI_MENU_MODIFIEREFI_MENU_MODIFIER 0x0029 UefiInternalFormRepresentation.h 　
20152
 EFI_VARIABLE_NON_VOLATILEEFI_VARIABLE_NON_VOLATILE 0x00000001 UefiMultiPhase.h 　
20153
 EFI_VARIABLE_BOOTSERVICE_ACCESSEFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002 UefiMultiPhase.h 　
20154
 EFI_VARIABLE_RUNTIME_ACCESSEFI_VARIABLE_RUNTIME_ACCESS 0x00000004 UefiMultiPhase.h 　
20155
 EFI_VARIABLE_HARDWARE_ERROR_RECEFI_VARIABLE_HARDWARE_ERROR_REC 0x00000008 UefiMultiPhase.h 　
20156
 EFI_VARIABLE_AUTHENTICATED_WRITEFI_VARIABLE_AUTHENTICATED_WRIT 0x00000010 UefiMultiPhase.h 　
20157
 WIN_CERT_TYPE_EFI_PKCS115WIN_CERT_TYPE_EFI_PKCS115 0x0EF0 UefiMultiPhase.h 　
20158
 WIN_CERT_TYPE_EFI_GUIDWIN_CERT_TYPE_EFI_GUID 0x0EF1 UefiMultiPhase.h 　
20159
 EFI_CERT_TYPE_RSA2048_SHA256_GUEFI_CERT_TYPE_RSA2048_SHA256_GU {0xa7717414, 0xc616, 0x4977, {0x94, 0x20, 0x84, 0x47, 0x12, 0xa7, 0x35, 0xbf } } UefiMultiPhase.h 　
20160
 PXE_BUSTYPE_PXEPXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E') UefiPxe.h 　
20161
 PXE_BUSTYPE_PCIPXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R') UefiPxe.h 　
20162
 PXE_BUSTYPE_PC_CARDPXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R') UefiPxe.h 　
20163
 PXE_BUSTYPE_USBPXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R') UefiPxe.h 　
20164
 PXE_BUSTYPE_1394PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4') UefiPxe.h 　
20165
 PXE_CPBSIZE_NOT_USEDPXE_CPBSIZE_NOT_USED 0 UefiPxe.h < zero
20166
 PXE_DBSIZE_NOT_USEDPXE_DBSIZE_NOT_USED 0 UefiPxe.h < zero
20167
 PXE_CPBADDR_NOT_USEDPXE_CPBADDR_NOT_USED (PXE_UINT64) 0 UefiPxe.h < zero
20168
 PXE_DBADDR_NOT_USEDPXE_DBADDR_NOT_USED (PXE_UINT64) 0 UefiPxe.h < zero
20169
 PXE_CONSTPXE_CONST CONST UefiPxe.h 　
20170
 PXE_VOLATILEPXE_VOLATILE volatile UefiPxe.h 　
20171
 PXE_FALSEPXE_FALSE 0 UefiPxe.h < zero
20172
 PXE_TRUEPXE_TRUE (!PXE_FALSE) UefiPxe.h 　
20173
 PXE_OPCODE_GET_STATEPXE_OPCODE_GET_STATE 0x0000 UefiPxe.h 　
20174
 PXE_OPCODE_STARTPXE_OPCODE_START 0x0001 UefiPxe.h 　
20175
 PXE_OPCODE_STOPPXE_OPCODE_STOP 0x0002 UefiPxe.h 　
20176
 PXE_OPCODE_GET_INIT_INFOPXE_OPCODE_GET_INIT_INFO 0x0003 UefiPxe.h 　
20177
 PXE_OPCODE_GET_CONFIG_INFOPXE_OPCODE_GET_CONFIG_INFO 0x0004 UefiPxe.h 　
20178
 PXE_OPCODE_INITIALIZEPXE_OPCODE_INITIALIZE 0x0005 UefiPxe.h 　
20179
 PXE_OPCODE_RESETPXE_OPCODE_RESET 0x0006 UefiPxe.h 　
20180
 PXE_OPCODE_SHUTDOWNPXE_OPCODE_SHUTDOWN 0x0007 UefiPxe.h 　
20181
 PXE_OPCODE_INTERRUPT_ENABLESPXE_OPCODE_INTERRUPT_ENABLES 0x0008 UefiPxe.h 　
20182
 PXE_OPCODE_RECEIVE_FILTERSPXE_OPCODE_RECEIVE_FILTERS 0x0009 UefiPxe.h 　
20183
 PXE_OPCODE_STATION_ADDRESSPXE_OPCODE_STATION_ADDRESS 0x000A UefiPxe.h 　
20184
 PXE_OPCODE_STATISTICSPXE_OPCODE_STATISTICS 0x000B UefiPxe.h 　
20185
 PXE_OPCODE_MCAST_IP_TO_MACPXE_OPCODE_MCAST_IP_TO_MAC 0x000C UefiPxe.h 　
20186
 PXE_OPCODE_NVDATAPXE_OPCODE_NVDATA 0x000D UefiPxe.h 　
20187
 PXE_OPCODE_GET_STATUSPXE_OPCODE_GET_STATUS 0x000E UefiPxe.h 　
20188
 PXE_OPCODE_FILL_HEADERPXE_OPCODE_FILL_HEADER 0x000F UefiPxe.h 　
20189
 PXE_OPCODE_TRANSMITPXE_OPCODE_TRANSMIT 0x0010 UefiPxe.h 　
20190
 PXE_OPCODE_RECEIVEPXE_OPCODE_RECEIVE 0x0011 UefiPxe.h 　
20191
 PXE_OPCODE_LAST_VALIDPXE_OPCODE_LAST_VALID 0x0011 UefiPxe.h 　
20192
 PXE_OPFLAGS_NOT_USEDPXE_OPFLAGS_NOT_USED 0x0000 UefiPxe.h 　
20193
 PXE_OPFLAGS_INITIALIZE_CABLE_DEPXE_OPFLAGS_INITIALIZE_CABLE_DE 0x0001 UefiPxe.h 　
20194
 PXE_OPFLAGS_INITIALIZE_DETECT_CPXE_OPFLAGS_INITIALIZE_DETECT_C 0x0000 UefiPxe.h 　
20195
 PXE_OPFLAGS_INITIALIZE_DO_NOT_DPXE_OPFLAGS_INITIALIZE_DO_NOT_D 0x0001 UefiPxe.h 　
20196
 PXE_OPFLAGS_RESET_DISABLE_INTERPXE_OPFLAGS_RESET_DISABLE_INTER 0x0001 UefiPxe.h 　
20197
 PXE_OPFLAGS_RESET_DISABLE_FILTEPXE_OPFLAGS_RESET_DISABLE_FILTE 0x0002 UefiPxe.h 　
20198
 PXE_OPFLAGS_INTERRUPT_OPMASKPXE_OPFLAGS_INTERRUPT_OPMASK 0xC000 UefiPxe.h 　
20199
 PXE_OPFLAGS_INTERRUPT_ENABLEPXE_OPFLAGS_INTERRUPT_ENABLE 0x8000 UefiPxe.h 　
20200
 PXE_OPFLAGS_INTERRUPT_DISABLEPXE_OPFLAGS_INTERRUPT_DISABLE 0x4000 UefiPxe.h 　
20201
 PXE_OPFLAGS_INTERRUPT_READPXE_OPFLAGS_INTERRUPT_READ 0x0000 UefiPxe.h 　
20202
 PXE_OPFLAGS_INTERRUPT_RECEIVEPXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001 UefiPxe.h 　
20203
 PXE_OPFLAGS_INTERRUPT_TRANSMITPXE_OPFLAGS_INTERRUPT_TRANSMIT 0x0002 UefiPxe.h 　
20204
 PXE_OPFLAGS_INTERRUPT_COMMANDPXE_OPFLAGS_INTERRUPT_COMMAND 0x0004 UefiPxe.h 　
20205
 PXE_OPFLAGS_INTERRUPT_SOFTWAREPXE_OPFLAGS_INTERRUPT_SOFTWARE 0x0008 UefiPxe.h 　
20206
 PXE_OPFLAGS_RECEIVE_FILTER_OPMAPXE_OPFLAGS_RECEIVE_FILTER_OPMA 0xC000 UefiPxe.h 　
20207
 PXE_OPFLAGS_RECEIVE_FILTER_ENABPXE_OPFLAGS_RECEIVE_FILTER_ENAB 0x8000 UefiPxe.h 　
20208
 PXE_OPFLAGS_RECEIVE_FILTER_DISAPXE_OPFLAGS_RECEIVE_FILTER_DISA 0x4000 UefiPxe.h 　
20209
 PXE_OPFLAGS_RECEIVE_FILTER_READPXE_OPFLAGS_RECEIVE_FILTER_READ 0x0000 UefiPxe.h 　
20210
 PXE_OPFLAGS_RECEIVE_FILTER_RESEPXE_OPFLAGS_RECEIVE_FILTER_RESE 0x2000 UefiPxe.h 　
20211
 PXE_OPFLAGS_RECEIVE_FILTER_UNICPXE_OPFLAGS_RECEIVE_FILTER_UNIC 0x0001 UefiPxe.h 　
20212
 PXE_OPFLAGS_RECEIVE_FILTER_BROAPXE_OPFLAGS_RECEIVE_FILTER_BROA 0x0002 UefiPxe.h 　
20213
 PXE_OPFLAGS_RECEIVE_FILTER_FILTPXE_OPFLAGS_RECEIVE_FILTER_FILT 0x0004 UefiPxe.h 　
20214
 PXE_OPFLAGS_RECEIVE_FILTER_PROMPXE_OPFLAGS_RECEIVE_FILTER_PROM 0x0008 UefiPxe.h 　
20215
 PXE_OPFLAGS_RECEIVE_FILTER_ALL_PXE_OPFLAGS_RECEIVE_FILTER_ALL_ 0x0010 UefiPxe.h 　
20216
 PXE_OPFLAGS_STATION_ADDRESS_REAPXE_OPFLAGS_STATION_ADDRESS_REA 0x0000 UefiPxe.h 　
20217
 PXE_OPFLAGS_STATION_ADDRESS_WRIPXE_OPFLAGS_STATION_ADDRESS_WRI 0x0000 UefiPxe.h 　
20218
 PXE_OPFLAGS_STATION_ADDRESS_RESPXE_OPFLAGS_STATION_ADDRESS_RES 0x0001 UefiPxe.h 　
20219
 PXE_OPFLAGS_STATISTICS_READPXE_OPFLAGS_STATISTICS_READ 0x0000 UefiPxe.h 　
20220
 PXE_OPFLAGS_STATISTICS_RESETPXE_OPFLAGS_STATISTICS_RESET 0x0001 UefiPxe.h 　
20221
 PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMPXE_OPFLAGS_MCAST_IP_TO_MAC_OPM 0x0003 UefiPxe.h 　
20222
 PXE_OPFLAGS_MCAST_IPV4_TO_MACPXE_OPFLAGS_MCAST_IPV4_TO_MAC 0x0000 UefiPxe.h 　
20223
 PXE_OPFLAGS_MCAST_IPV6_TO_MACPXE_OPFLAGS_MCAST_IPV6_TO_MAC 0x0001 UefiPxe.h 　
20224
 PXE_OPFLAGS_NVDATA_OPMASKPXE_OPFLAGS_NVDATA_OPMASK 0x0001 UefiPxe.h 　
20225
 PXE_OPFLAGS_NVDATA_READPXE_OPFLAGS_NVDATA_READ 0x0000 UefiPxe.h 　
20226
 PXE_OPFLAGS_NVDATA_WRITEPXE_OPFLAGS_NVDATA_WRITE 0x0001 UefiPxe.h 　
20227
 PXE_OPFLAGS_GET_INTERRUPT_STATUPXE_OPFLAGS_GET_INTERRUPT_STATU 0x0001 UefiPxe.h 　
20228
 PXE_OPFLAGS_GET_TRANSMITTED_BUFPXE_OPFLAGS_GET_TRANSMITTED_BUF 0x0002 UefiPxe.h 　
20229
 PXE_OPFLAGS_FILL_HEADER_OPMASKPXE_OPFLAGS_FILL_HEADER_OPMASK 0x0001 UefiPxe.h 　
20230
 PXE_OPFLAGS_FILL_HEADER_FRAGMENPXE_OPFLAGS_FILL_HEADER_FRAGMEN 0x0001 UefiPxe.h 　
20231
 PXE_OPFLAGS_FILL_HEADER_WHOLEPXE_OPFLAGS_FILL_HEADER_WHOLE 0x0000 UefiPxe.h 　
20232
 PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMPXE_OPFLAGS_SWUNDI_TRANSMIT_OPM 0x0001 UefiPxe.h 　
20233
 PXE_OPFLAGS_TRANSMIT_BLOCKPXE_OPFLAGS_TRANSMIT_BLOCK 0x0001 UefiPxe.h 　
20234
 PXE_OPFLAGS_TRANSMIT_DONT_BLOCKPXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000 UefiPxe.h 　
20235
 PXE_OPFLAGS_TRANSMIT_OPMASKPXE_OPFLAGS_TRANSMIT_OPMASK 0x0002 UefiPxe.h 　
20236
 PXE_OPFLAGS_TRANSMIT_FRAGMENTEDPXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002 UefiPxe.h 　
20237
 PXE_OPFLAGS_TRANSMIT_WHOLEPXE_OPFLAGS_TRANSMIT_WHOLE 0x0000 UefiPxe.h 　
20238
 PXE_STATFLAGS_INITIALIZEPXE_STATFLAGS_INITIALIZE 0x0000 UefiPxe.h 　
20239
 PXE_STATFLAGS_STATUS_MASKPXE_STATFLAGS_STATUS_MASK 0xC000 UefiPxe.h 　
20240
 PXE_STATFLAGS_COMMAND_COMPLETEPXE_STATFLAGS_COMMAND_COMPLETE 0xC000 UefiPxe.h 　
20241
 PXE_STATFLAGS_COMMAND_FAILEDPXE_STATFLAGS_COMMAND_FAILED 0x8000 UefiPxe.h 　
20242
 PXE_STATFLAGS_COMMAND_QUEUEDPXE_STATFLAGS_COMMAND_QUEUED 0x4000 UefiPxe.h 　
20243
 PXE_STATFLAGS_GET_STATE_MASKPXE_STATFLAGS_GET_STATE_MASK 0x0003 UefiPxe.h 　
20244
 PXE_STATFLAGS_GET_STATE_INITIALPXE_STATFLAGS_GET_STATE_INITIAL 0x0002 UefiPxe.h 　
20245
 PXE_STATFLAGS_GET_STATE_STARTEDPXE_STATFLAGS_GET_STATE_STARTED 0x0001 UefiPxe.h 　
20246
 PXE_STATFLAGS_GET_STATE_STOPPEDPXE_STATFLAGS_GET_STATE_STOPPED 0x0000 UefiPxe.h 　
20247
 PXE_STATFLAGS_CABLE_DETECT_MASKPXE_STATFLAGS_CABLE_DETECT_MASK 0x0001 UefiPxe.h 　
20248
 PXE_STATFLAGS_CABLE_DETECT_NOT_PXE_STATFLAGS_CABLE_DETECT_NOT_ 0x0000 UefiPxe.h 　
20249
 PXE_STATFLAGS_CABLE_DETECT_SUPPPXE_STATFLAGS_CABLE_DETECT_SUPP 0x0001 UefiPxe.h 　
20250
 PXE_STATFLAGS_INITIALIZED_NO_MEPXE_STATFLAGS_INITIALIZED_NO_ME 0x0001 UefiPxe.h 　
20251
 PXE_STATFLAGS_RESET_NO_MEDIAPXE_STATFLAGS_RESET_NO_MEDIA 0x0001 UefiPxe.h 　
20252
 PXE_STATFLAGS_INTERRUPT_RECEIVEPXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001 UefiPxe.h 　
20253
 PXE_STATFLAGS_INTERRUPT_TRANSMIPXE_STATFLAGS_INTERRUPT_TRANSMI 0x0002 UefiPxe.h 　
20254
 PXE_STATFLAGS_INTERRUPT_COMMANDPXE_STATFLAGS_INTERRUPT_COMMAND 0x0004 UefiPxe.h 　
20255
 PXE_STATFLAGS_RECEIVE_FILTER_UNPXE_STATFLAGS_RECEIVE_FILTER_UN 0x0001 UefiPxe.h 　
20256
 PXE_STATFLAGS_RECEIVE_FILTER_BRPXE_STATFLAGS_RECEIVE_FILTER_BR 0x0002 UefiPxe.h 　
20257
 PXE_STATFLAGS_RECEIVE_FILTER_FIPXE_STATFLAGS_RECEIVE_FILTER_FI 0x0004 UefiPxe.h 　
20258
 PXE_STATFLAGS_RECEIVE_FILTER_PRPXE_STATFLAGS_RECEIVE_FILTER_PR 0x0008 UefiPxe.h 　
20259
 PXE_STATFLAGS_RECEIVE_FILTER_ALPXE_STATFLAGS_RECEIVE_FILTER_AL 0x0010 UefiPxe.h 　
20260
 PXE_STATFLAGS_GET_STATUS_INTERRPXE_STATFLAGS_GET_STATUS_INTERR 0x000F UefiPxe.h 　
20261
 PXE_STATFLAGS_GET_STATUS_NO_INTPXE_STATFLAGS_GET_STATUS_NO_INT 0x0000 UefiPxe.h 　
20262
 PXE_STATFLAGS_GET_STATUS_RECEIVPXE_STATFLAGS_GET_STATUS_RECEIV 0x0001 UefiPxe.h 　
20263
 PXE_STATFLAGS_GET_STATUS_TRANSMPXE_STATFLAGS_GET_STATUS_TRANSM 0x0002 UefiPxe.h 　
20264
 PXE_STATFLAGS_GET_STATUS_COMMANPXE_STATFLAGS_GET_STATUS_COMMAN 0x0004 UefiPxe.h 　
20265
 PXE_STATFLAGS_GET_STATUS_SOFTWAPXE_STATFLAGS_GET_STATUS_SOFTWA 0x0008 UefiPxe.h 　
20266
 PXE_STATFLAGS_GET_STATUS_TXBUF_PXE_STATFLAGS_GET_STATUS_TXBUF_ 0x0010 UefiPxe.h 　
20267
 PXE_STATFLAGS_GET_STATUS_NO_TXBPXE_STATFLAGS_GET_STATUS_NO_TXB 0x0020 UefiPxe.h 　
20268
 PXE_STATCODE_INITIALIZEPXE_STATCODE_INITIALIZE 0x0000 UefiPxe.h 　
20269
 PXE_STATCODE_SUCCESSPXE_STATCODE_SUCCESS 0x0000 UefiPxe.h 　
20270
 PXE_STATCODE_INVALID_CDBPXE_STATCODE_INVALID_CDB 0x0001 UefiPxe.h 　
20271
 PXE_STATCODE_INVALID_CPBPXE_STATCODE_INVALID_CPB 0x0002 UefiPxe.h 　
20272
 PXE_STATCODE_BUSYPXE_STATCODE_BUSY 0x0003 UefiPxe.h 　
20273
 PXE_STATCODE_QUEUE_FULLPXE_STATCODE_QUEUE_FULL 0x0004 UefiPxe.h 　
20274
 PXE_STATCODE_ALREADY_STARTEDPXE_STATCODE_ALREADY_STARTED 0x0005 UefiPxe.h 　
20275
 PXE_STATCODE_NOT_STARTEDPXE_STATCODE_NOT_STARTED 0x0006 UefiPxe.h 　
20276
 PXE_STATCODE_NOT_SHUTDOWNPXE_STATCODE_NOT_SHUTDOWN 0x0007 UefiPxe.h 　
20277
 PXE_STATCODE_ALREADY_INITIALIZEPXE_STATCODE_ALREADY_INITIALIZE 0x0008 UefiPxe.h 　
20278
 PXE_STATCODE_NOT_INITIALIZEDPXE_STATCODE_NOT_INITIALIZED 0x0009 UefiPxe.h 　
20279
 PXE_STATCODE_DEVICE_FAILUREPXE_STATCODE_DEVICE_FAILURE 0x000A UefiPxe.h 　
20280
 PXE_STATCODE_NVDATA_FAILUREPXE_STATCODE_NVDATA_FAILURE 0x000B UefiPxe.h 　
20281
 PXE_STATCODE_UNSUPPORTEDPXE_STATCODE_UNSUPPORTED 0x000C UefiPxe.h 　
20282
 PXE_STATCODE_BUFFER_FULLPXE_STATCODE_BUFFER_FULL 0x000D UefiPxe.h 　
20283
 PXE_STATCODE_INVALID_PARAMETERPXE_STATCODE_INVALID_PARAMETER 0x000E UefiPxe.h 　
20284
 PXE_STATCODE_INVALID_UNDIPXE_STATCODE_INVALID_UNDI 0x000F UefiPxe.h 　
20285
 PXE_STATCODE_IPV4_NOT_SUPPORTEDPXE_STATCODE_IPV4_NOT_SUPPORTED 0x0010 UefiPxe.h 　
20286
 PXE_STATCODE_IPV6_NOT_SUPPORTEDPXE_STATCODE_IPV6_NOT_SUPPORTED 0x0011 UefiPxe.h 　
20287
 PXE_STATCODE_NOT_ENOUGH_MEMORYPXE_STATCODE_NOT_ENOUGH_MEMORY 0x0012 UefiPxe.h 　
20288
 PXE_STATCODE_NO_DATAPXE_STATCODE_NO_DATA 0x0013 UefiPxe.h 　
20289
 PXE_IFNUM_STARTPXE_IFNUM_START 0x0000 UefiPxe.h 　
20290
 PXE_IFNUM_INVALIDPXE_IFNUM_INVALID 0x0000 UefiPxe.h 　
20291
 PXE_CONTROL_QUEUE_IF_BUSYPXE_CONTROL_QUEUE_IF_BUSY 0x0002 UefiPxe.h 　
20292
 PXE_CONTROL_LINKPXE_CONTROL_LINK 0x0001 UefiPxe.h 　
20293
 PXE_CONTROL_LAST_CDB_IN_LISTPXE_CONTROL_LAST_CDB_IN_LIST 0x0000 UefiPxe.h 　
20294
 PXE_FRAME_TYPE_NONEPXE_FRAME_TYPE_NONE 0x00 UefiPxe.h 　
20295
 PXE_FRAME_TYPE_UNICASTPXE_FRAME_TYPE_UNICAST 0x01 UefiPxe.h 　
20296
 PXE_FRAME_TYPE_BROADCASTPXE_FRAME_TYPE_BROADCAST 0x02 UefiPxe.h 　
20297
 PXE_FRAME_TYPE_FILTERED_MULTICAPXE_FRAME_TYPE_FILTERED_MULTICA 0x03 UefiPxe.h 　
20298
 PXE_FRAME_TYPE_PROMISCUOUSPXE_FRAME_TYPE_PROMISCUOUS 0x04 UefiPxe.h 　
20299
 PXE_FRAME_TYPE_PROMISCUOUS_MULTPXE_FRAME_TYPE_PROMISCUOUS_MULT 0x05 UefiPxe.h 　
20300
 PXE_FRAME_TYPE_MULTICASTPXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST UefiPxe.h 　
20301
 PXE_MAC_LENGTHPXE_MAC_LENGTH 32 UefiPxe.h 　
20302
 PXE_IFTYPE_ETHERNETPXE_IFTYPE_ETHERNET 0x01 UefiPxe.h 　
20303
 PXE_IFTYPE_TOKENRINGPXE_IFTYPE_TOKENRING 0x04 UefiPxe.h 　
20304
 PXE_IFTYPE_FIBRE_CHANNELPXE_IFTYPE_FIBRE_CHANNEL 0x12 UefiPxe.h 　
20305
 PXE_HWSTAT_STATE_MASKPXE_HWSTAT_STATE_MASK 0xC0000000 UefiPxe.h 　
20306
 PXE_HWSTAT_BUSYPXE_HWSTAT_BUSY 0xC0000000 UefiPxe.h 　
20307
 PXE_HWSTAT_INITIALIZEDPXE_HWSTAT_INITIALIZED 0x80000000 UefiPxe.h 　
20308
 PXE_HWSTAT_STARTEDPXE_HWSTAT_STARTED 0x40000000 UefiPxe.h 　
20309
 PXE_HWSTAT_STOPPEDPXE_HWSTAT_STOPPED 0x00000000 UefiPxe.h 　
20310
 PXE_HWSTAT_COMMAND_FAILEDPXE_HWSTAT_COMMAND_FAILED 0x20000000 UefiPxe.h 　
20311
 PXE_HWSTAT_PROMISCUOUS_MULTICASPXE_HWSTAT_PROMISCUOUS_MULTICAS 0x00001000 UefiPxe.h 　
20312
 PXE_HWSTAT_PROMISCUOUS_RX_ENABLPXE_HWSTAT_PROMISCUOUS_RX_ENABL 0x00000800 UefiPxe.h 　
20313
 PXE_HWSTAT_BROADCAST_RX_ENABLEDPXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400 UefiPxe.h 　
20314
 PXE_HWSTAT_MULTICAST_RX_ENABLEDPXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200 UefiPxe.h 　
20315
 PXE_HWSTAT_UNICAST_RX_ENABLEDPXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100 UefiPxe.h 　
20316
 PXE_HWSTAT_SOFTWARE_INT_ENABLEDPXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080 UefiPxe.h 　
20317
 PXE_HWSTAT_TX_COMPLETE_INT_ENABPXE_HWSTAT_TX_COMPLETE_INT_ENAB 0x00000040 UefiPxe.h 　
20318
 PXE_HWSTAT_PACKET_RX_INT_ENABLEPXE_HWSTAT_PACKET_RX_INT_ENABLE 0x00000020 UefiPxe.h 　
20319
 PXE_HWSTAT_CMD_COMPLETE_INT_ENAPXE_HWSTAT_CMD_COMPLETE_INT_ENA 0x00000010 UefiPxe.h 　
20320
 PXE_HWSTAT_SOFTWARE_INT_PENDINGPXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008 UefiPxe.h 　
20321
 PXE_HWSTAT_TX_COMPLETE_INT_PENDPXE_HWSTAT_TX_COMPLETE_INT_PEND 0x00000004 UefiPxe.h 　
20322
 PXE_HWSTAT_PACKET_RX_INT_PENDINPXE_HWSTAT_PACKET_RX_INT_PENDIN 0x00000002 UefiPxe.h 　
20323
 PXE_HWSTAT_CMD_COMPLETE_INT_PENPXE_HWSTAT_CMD_COMPLETE_INT_PEN 0x00000001 UefiPxe.h 　
20324
 PXE_HWCMD_ISSUE_COMMANDPXE_HWCMD_ISSUE_COMMAND 0x80000000 UefiPxe.h 　
20325
 PXE_HWCMD_INTS_AND_FILTSPXE_HWCMD_INTS_AND_FILTS 0x00000000 UefiPxe.h 　
20326
 PXE_HWCMD_PROMISCUOUS_MULTICASTPXE_HWCMD_PROMISCUOUS_MULTICAST 0x00001000 UefiPxe.h 　
20327
 PXE_HWCMD_PROMISCUOUS_RX_ENABLEPXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800 UefiPxe.h 　
20328
 PXE_HWCMD_BROADCAST_RX_ENABLEPXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400 UefiPxe.h 　
20329
 PXE_HWCMD_MULTICAST_RX_ENABLEPXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200 UefiPxe.h 　
20330
 PXE_HWCMD_UNICAST_RX_ENABLEPXE_HWCMD_UNICAST_RX_ENABLE 0x00000100 UefiPxe.h 　
20331
 PXE_HWCMD_SOFTWARE_INT_ENABLEPXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080 UefiPxe.h 　
20332
 PXE_HWCMD_TX_COMPLETE_INT_ENABLPXE_HWCMD_TX_COMPLETE_INT_ENABL 0x00000040 UefiPxe.h 　
20333
 PXE_HWCMD_PACKET_RX_INT_ENABLEPXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020 UefiPxe.h 　
20334
 PXE_HWCMD_CMD_COMPLETE_INT_ENABPXE_HWCMD_CMD_COMPLETE_INT_ENAB 0x00000010 UefiPxe.h 　
20335
 PXE_HWCMD_CLEAR_SOFTWARE_INTPXE_HWCMD_CLEAR_SOFTWARE_INT 0x00000008 UefiPxe.h 　
20336
 PXE_HWCMD_CLEAR_TX_COMPLETE_INTPXE_HWCMD_CLEAR_TX_COMPLETE_INT 0x00000004 UefiPxe.h 　
20337
 PXE_HWCMD_CLEAR_PACKET_RX_INTPXE_HWCMD_CLEAR_PACKET_RX_INT 0x00000002 UefiPxe.h 　
20338
 PXE_HWCMD_CLEAR_CMD_COMPLETE_INPXE_HWCMD_CLEAR_CMD_COMPLETE_IN 0x00000001 UefiPxe.h 　
20339
 PXE_ROMID_SIGNATUREPXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E') UefiPxe.h 　
20340
 PXE_ROMID_REVPXE_ROMID_REV 0x02 UefiPxe.h 　
20341
 PXE_ROMID_MAJORVERPXE_ROMID_MAJORVER 0x03 UefiPxe.h 　
20342
 PXE_ROMID_MINORVERPXE_ROMID_MINORVER 0x01 UefiPxe.h 　
20343
 PXE_ROMID_IMP_HW_UNDIPXE_ROMID_IMP_HW_UNDI 0x80000000 UefiPxe.h 　
20344
 PXE_ROMID_IMP_SW_VIRT_ADDRPXE_ROMID_IMP_SW_VIRT_ADDR 0x40000000 UefiPxe.h 　
20345
 PXE_ROMID_IMP_64BIT_DEVICEPXE_ROMID_IMP_64BIT_DEVICE 0x00010000 UefiPxe.h 　
20346
 PXE_ROMID_IMP_FRAG_SUPPORTEDPXE_ROMID_IMP_FRAG_SUPPORTED 0x00008000 UefiPxe.h 　
20347
 PXE_ROMID_IMP_CMD_LINK_SUPPORTEPXE_ROMID_IMP_CMD_LINK_SUPPORTE 0x00004000 UefiPxe.h 　
20348
 PXE_ROMID_IMP_CMD_QUEUE_SUPPORTPXE_ROMID_IMP_CMD_QUEUE_SUPPORT 0x00002000 UefiPxe.h 　
20349
 PXE_ROMID_IMP_MULTI_FRAME_SUPPOPXE_ROMID_IMP_MULTI_FRAME_SUPPO 0x00001000 UefiPxe.h 　
20350
 PXE_ROMID_IMP_NVDATA_SUPPORT_MAPXE_ROMID_IMP_NVDATA_SUPPORT_MA 0x00000C00 UefiPxe.h 　
20351
 PXE_ROMID_IMP_NVDATA_BULK_WRITAPXE_ROMID_IMP_NVDATA_BULK_WRITA 0x00000C00 UefiPxe.h 　
20352
 PXE_ROMID_IMP_NVDATA_SPARSE_WRIPXE_ROMID_IMP_NVDATA_SPARSE_WRI 0x00000800 UefiPxe.h 　
20353
 PXE_ROMID_IMP_NVDATA_READ_ONLYPXE_ROMID_IMP_NVDATA_READ_ONLY 0x00000400 UefiPxe.h 　
20354
 PXE_ROMID_IMP_NVDATA_NOT_AVAILAPXE_ROMID_IMP_NVDATA_NOT_AVAILA 0x00000000 UefiPxe.h 　
20355
 PXE_ROMID_IMP_STATISTICS_SUPPORPXE_ROMID_IMP_STATISTICS_SUPPOR 0x00000200 UefiPxe.h 　
20356
 PXE_ROMID_IMP_STATION_ADDR_SETTPXE_ROMID_IMP_STATION_ADDR_SETT 0x00000100 UefiPxe.h 　
20357
 PXE_ROMID_IMP_PROMISCUOUS_MULTIPXE_ROMID_IMP_PROMISCUOUS_MULTI 0x00000080 UefiPxe.h 　
20358
 PXE_ROMID_IMP_PROMISCUOUS_RX_SUPXE_ROMID_IMP_PROMISCUOUS_RX_SU 0x00000040 UefiPxe.h 　
20359
 PXE_ROMID_IMP_BROADCAST_RX_SUPPPXE_ROMID_IMP_BROADCAST_RX_SUPP 0x00000020 UefiPxe.h 　
20360
 PXE_ROMID_IMP_FILTERED_MULTICASPXE_ROMID_IMP_FILTERED_MULTICAS 0x00000010 UefiPxe.h 　
20361
 PXE_ROMID_IMP_SOFTWARE_INT_SUPPPXE_ROMID_IMP_SOFTWARE_INT_SUPP 0x00000008 UefiPxe.h 　
20362
 PXE_ROMID_IMP_TX_COMPLETE_INT_SPXE_ROMID_IMP_TX_COMPLETE_INT_S 0x00000004 UefiPxe.h 　
20363
 PXE_ROMID_IMP_PACKET_RX_INT_SUPPXE_ROMID_IMP_PACKET_RX_INT_SUP 0x00000002 UefiPxe.h 　
20364
 PXE_ROMID_IMP_CMD_COMPLETE_INT_PXE_ROMID_IMP_CMD_COMPLETE_INT_ 0x00000001 UefiPxe.h 　
20365
 MAX_PCI_CONFIG_LENMAX_PCI_CONFIG_LEN 64 UefiPxe.h < # of dwords
20366
 MAX_EEPROM_LENMAX_EEPROM_LEN 128 UefiPxe.h < # of dwords
20367
 MAX_XMIT_BUFFERSMAX_XMIT_BUFFERS 32 UefiPxe.h < recycling Q length for xmit_done
20368
 MAX_MCAST_ADDRESS_CNTMAX_MCAST_ADDRESS_CNT 8 UefiPxe.h 　
20369
 TO_AND_FROM_DEVICETO_AND_FROM_DEVICE 0 UefiPxe.h 　
20370
 FROM_DEVICEFROM_DEVICE 1 UefiPxe.h 　
20371
 TO_DEVICETO_DEVICE 2 UefiPxe.h 　
20372
 PXE_DELAY_MILLISECONDPXE_DELAY_MILLISECOND 1000 UefiPxe.h 　
20373
 PXE_DELAY_SECONDPXE_DELAY_SECOND 1000000 UefiPxe.h 　
20374
 PXE_IO_READPXE_IO_READ 0 UefiPxe.h 　
20375
 PXE_IO_WRITEPXE_IO_WRITE 1 UefiPxe.h 　
20376
 PXE_MEM_READPXE_MEM_READ 2 UefiPxe.h 　
20377
 PXE_MEM_WRITEPXE_MEM_WRITE 4 UefiPxe.h 　
20378
 PXE_MAX_TXRX_UNIT_ETHERPXE_MAX_TXRX_UNIT_ETHER 1500 UefiPxe.h 　
20379
 PXE_HWADDR_LEN_ETHERPXE_HWADDR_LEN_ETHER 0x0006 UefiPxe.h 　
20380
 PXE_MAC_HEADER_LEN_ETHERPXE_MAC_HEADER_LEN_ETHER 0x000E UefiPxe.h 　
20381
 PXE_DUPLEX_ENABLE_FULL_SUPPORTEPXE_DUPLEX_ENABLE_FULL_SUPPORTE 1 UefiPxe.h 　
20382
 PXE_DUPLEX_FORCE_FULL_SUPPORTEDPXE_DUPLEX_FORCE_FULL_SUPPORTED 2 UefiPxe.h 　
20383
 PXE_LOOPBACK_INTERNAL_SUPPORTEDPXE_LOOPBACK_INTERNAL_SUPPORTED 1 UefiPxe.h 　
20384
 PXE_LOOPBACK_EXTERNAL_SUPPORTEDPXE_LOOPBACK_EXTERNAL_SUPPORTED 2 UefiPxe.h 　
20385
 PXE_DUPLEX_DEFAULTPXE_DUPLEX_DEFAULT 0x00 UefiPxe.h 　
20386
 PXE_FORCE_FULL_DUPLEXPXE_FORCE_FULL_DUPLEX 0x01 UefiPxe.h 　
20387
 PXE_ENABLE_FULL_DUPLEXPXE_ENABLE_FULL_DUPLEX 0x02 UefiPxe.h 　
20388
 PXE_FORCE_HALF_DUPLEXPXE_FORCE_HALF_DUPLEX 0x04 UefiPxe.h 　
20389
 PXE_DISABLE_FULL_DUPLEXPXE_DISABLE_FULL_DUPLEX 0x08 UefiPxe.h 　
20390
 LOOPBACK_NORMALLOOPBACK_NORMAL 0 UefiPxe.h 　
20391
 LOOPBACK_INTERNALLOOPBACK_INTERNAL 1 UefiPxe.h 　
20392
 LOOPBACK_EXTERNALLOOPBACK_EXTERNAL 2 UefiPxe.h 　
20393
 PXE_STATISTICS_RX_TOTAL_FRAMESPXE_STATISTICS_RX_TOTAL_FRAMES 0x00 UefiPxe.h 　
20394
 PXE_STATISTICS_RX_GOOD_FRAMESPXE_STATISTICS_RX_GOOD_FRAMES 0x01 UefiPxe.h 　
20395
 PXE_STATISTICS_RX_UNDERSIZE_FRAPXE_STATISTICS_RX_UNDERSIZE_FRA 0x02 UefiPxe.h 　
20396
 PXE_STATISTICS_RX_OVERSIZE_FRAMPXE_STATISTICS_RX_OVERSIZE_FRAM 0x03 UefiPxe.h 　
20397
 PXE_STATISTICS_RX_DROPPED_FRAMEPXE_STATISTICS_RX_DROPPED_FRAME 0x04 UefiPxe.h 　
20398
 PXE_STATISTICS_RX_UNICAST_FRAMEPXE_STATISTICS_RX_UNICAST_FRAME 0x05 UefiPxe.h 　
20399
 PXE_STATISTICS_RX_BROADCAST_FRAPXE_STATISTICS_RX_BROADCAST_FRA 0x06 UefiPxe.h 　
20400
 PXE_STATISTICS_RX_MULTICAST_FRAPXE_STATISTICS_RX_MULTICAST_FRA 0x07 UefiPxe.h 　
20401
 PXE_STATISTICS_RX_CRC_ERROR_FRAPXE_STATISTICS_RX_CRC_ERROR_FRA 0x08 UefiPxe.h 　
20402
 PXE_STATISTICS_RX_TOTAL_BYTESPXE_STATISTICS_RX_TOTAL_BYTES 0x09 UefiPxe.h 　
20403
 PXE_STATISTICS_TX_TOTAL_FRAMESPXE_STATISTICS_TX_TOTAL_FRAMES 0x0A UefiPxe.h 　
20404
 PXE_STATISTICS_TX_GOOD_FRAMESPXE_STATISTICS_TX_GOOD_FRAMES 0x0B UefiPxe.h 　
20405
 PXE_STATISTICS_TX_UNDERSIZE_FRAPXE_STATISTICS_TX_UNDERSIZE_FRA 0x0C UefiPxe.h 　
20406
 PXE_STATISTICS_TX_OVERSIZE_FRAMPXE_STATISTICS_TX_OVERSIZE_FRAM 0x0D UefiPxe.h 　
20407
 PXE_STATISTICS_TX_DROPPED_FRAMEPXE_STATISTICS_TX_DROPPED_FRAME 0x0E UefiPxe.h 　
20408
 PXE_STATISTICS_TX_UNICAST_FRAMEPXE_STATISTICS_TX_UNICAST_FRAME 0x0F UefiPxe.h 　
20409
 PXE_STATISTICS_TX_BROADCAST_FRAPXE_STATISTICS_TX_BROADCAST_FRA 0x10 UefiPxe.h 　
20410
 PXE_STATISTICS_TX_MULTICAST_FRAPXE_STATISTICS_TX_MULTICAST_FRA 0x11 UefiPxe.h 　
20411
 PXE_STATISTICS_TX_CRC_ERROR_FRAPXE_STATISTICS_TX_CRC_ERROR_FRA 0x12 UefiPxe.h 　
20412
 PXE_STATISTICS_TX_TOTAL_BYTESPXE_STATISTICS_TX_TOTAL_BYTES 0x13 UefiPxe.h 　
20413
 PXE_STATISTICS_COLLISIONSPXE_STATISTICS_COLLISIONS 0x14 UefiPxe.h 　
20414
 PXE_STATISTICS_UNSUPPORTED_PROTPXE_STATISTICS_UNSUPPORTED_PROT 0x15 UefiPxe.h 　
20415
 PXE_PROTOCOL_ETHERNET_IPPXE_PROTOCOL_ETHERNET_IP 0x0800 UefiPxe.h 　
20416
 PXE_PROTOCOL_ETHERNET_ARPPXE_PROTOCOL_ETHERNET_ARP 0x0806 UefiPxe.h 　
20417
 MAX_XMIT_FRAGMENTSMAX_XMIT_FRAGMENTS 16 UefiPxe.h 　
20418
 EFI_TIME_ADJUST_DAYLIGHTEFI_TIME_ADJUST_DAYLIGHT 0x01 UefiSpec.h 　
20419
 EFI_TIME_IN_DAYLIGHTEFI_TIME_IN_DAYLIGHT 0x02 UefiSpec.h 　
20420
 EFI_UNSPECIFIED_TIMEZONEEFI_UNSPECIFIED_TIMEZONE 0x07FF UefiSpec.h 　
20421
 EFI_MEMORY_UCEFI_MEMORY_UC 0x0000000000000001ULL UefiSpec.h 　
20422
 EFI_MEMORY_WCEFI_MEMORY_WC 0x0000000000000002ULL UefiSpec.h 　
20423
 EFI_MEMORY_WTEFI_MEMORY_WT 0x0000000000000004ULL UefiSpec.h 　
20424
 EFI_MEMORY_WBEFI_MEMORY_WB 0x0000000000000008ULL UefiSpec.h 　
20425
 EFI_MEMORY_UCEEFI_MEMORY_UCE 0x0000000000000010ULL UefiSpec.h 　
20426
 EFI_MEMORY_WPEFI_MEMORY_WP 0x0000000000001000ULL UefiSpec.h 　
20427
 EFI_MEMORY_RPEFI_MEMORY_RP 0x0000000000002000ULL UefiSpec.h 　
20428
 EFI_MEMORY_XPEFI_MEMORY_XP 0x0000000000004000ULL UefiSpec.h 　
20429
 EFI_MEMORY_RUNTIMEEFI_MEMORY_RUNTIME 0x8000000000000000ULL UefiSpec.h 　
20430
 EFI_MEMORY_DESCRIPTOR_VERSIONEFI_MEMORY_DESCRIPTOR_VERSION 1 UefiSpec.h 　
20431
 EFI_OPTIONAL_PTREFI_OPTIONAL_PTR 0x00000001 UefiSpec.h 　
20432
 EFI_OPTIONAL_POINTEREFI_OPTIONAL_POINTER EFI_OPTIONAL_PTR UefiSpec.h 　
20433
 EVT_TIMEREVT_TIMER 0x80000000 UefiSpec.h 　
20434
 EVT_RUNTIMEEVT_RUNTIME 0x40000000 UefiSpec.h 　
20435
 EVT_NOTIFY_WAITEVT_NOTIFY_WAIT 0x00000100 UefiSpec.h 　
20436
 EVT_NOTIFY_SIGNALEVT_NOTIFY_SIGNAL 0x00000200 UefiSpec.h 　
20437
 EVT_SIGNAL_EXIT_BOOT_SERVICESEVT_SIGNAL_EXIT_BOOT_SERVICES 0x00000201 UefiSpec.h 　
20438
 EVT_SIGNAL_VIRTUAL_ADDRESS_CHANEVT_SIGNAL_VIRTUAL_ADDRESS_CHAN 0x60000202 UefiSpec.h 　
20439
 EVT_RUNTIME_CONTEXTEVT_RUNTIME_CONTEXT 0x20000000 UefiSpec.h 　
20440
 TPL_APPLICATIONTPL_APPLICATION 4 UefiSpec.h 　
20441
 TPL_CALLBACKTPL_CALLBACK 8 UefiSpec.h 　
20442
 TPL_NOTIFYTPL_NOTIFY 16 UefiSpec.h 　
20443
 TPL_HIGH_LEVELTPL_HIGH_LEVEL 31 UefiSpec.h 　
20444
 EFI_OPEN_PROTOCOL_BY_HANDLE_PROEFI_OPEN_PROTOCOL_BY_HANDLE_PRO 0x00000001 UefiSpec.h 　
20445
 EFI_OPEN_PROTOCOL_GET_PROTOCOLEFI_OPEN_PROTOCOL_GET_PROTOCOL 0x00000002 UefiSpec.h 　
20446
 EFI_OPEN_PROTOCOL_TEST_PROTOCOLEFI_OPEN_PROTOCOL_TEST_PROTOCOL 0x00000004 UefiSpec.h 　
20447
 EFI_OPEN_PROTOCOL_BY_CHILD_CONTEFI_OPEN_PROTOCOL_BY_CHILD_CONT 0x00000008 UefiSpec.h 　
20448
 EFI_OPEN_PROTOCOL_BY_DRIVEREFI_OPEN_PROTOCOL_BY_DRIVER 0x00000010 UefiSpec.h 　
20449
 EFI_OPEN_PROTOCOL_EXCLUSIVEEFI_OPEN_PROTOCOL_EXCLUSIVE 0x00000020 UefiSpec.h 　
20450
 CAPSULE_FLAGS_PERSIST_ACROSS_RECAPSULE_FLAGS_PERSIST_ACROSS_RE 0x00010000 UefiSpec.h 　
20451
 CAPSULE_FLAGS_POPULATE_SYSTEM_TCAPSULE_FLAGS_POPULATE_SYSTEM_T 0x00020000 UefiSpec.h 　
20452
 EFI_SYSTEM_TABLE_SIGNATUREEFI_SYSTEM_TABLE_SIGNATURE 0x5453595320494249ULL UefiSpec.h 　
20453
 EFI_SYSTEM_TABLE_REVISIONEFI_SYSTEM_TABLE_REVISION ((2<<16) | (10)) UefiSpec.h 　
20454
 EFI_2_10_SYSTEM_TABLE_REVISIONEFI_2_10_SYSTEM_TABLE_REVISION ((2<<16) | (10)) UefiSpec.h 　
20455
 EFI_2_00_SYSTEM_TABLE_REVISIONEFI_2_00_SYSTEM_TABLE_REVISION ((2<<16) | (00)) UefiSpec.h 　
20456
 EFI_1_10_SYSTEM_TABLE_REVISIONEFI_1_10_SYSTEM_TABLE_REVISION ((1<<16) | (10)) UefiSpec.h 　
20457
 EFI_1_02_SYSTEM_TABLE_REVISIONEFI_1_02_SYSTEM_TABLE_REVISION ((1<<16) | (02)) UefiSpec.h 　
20458
 EFI_RUNTIME_SERVICES_SIGNATUREEFI_RUNTIME_SERVICES_SIGNATURE 0x56524553544e5552ULL UefiSpec.h 　
20459
 EFI_RUNTIME_SERVICES_REVISIONEFI_RUNTIME_SERVICES_REVISION EFI_2_10_SYSTEM_TABLE_REVISION UefiSpec.h 　
20460
 EFI_BOOT_SERVICES_SIGNATUREEFI_BOOT_SERVICES_SIGNATURE 0x56524553544f4f42ULL UefiSpec.h 　
20461
 EFI_BOOT_SERVICES_REVISIONEFI_BOOT_SERVICES_REVISION EFI_2_10_SYSTEM_TABLE_REVISION UefiSpec.h 　
20462
 LOAD_OPTION_ACTIVELOAD_OPTION_ACTIVE 0x00000001 UefiSpec.h 　
20463
 LOAD_OPTION_FORCE_RECONNECTLOAD_OPTION_FORCE_RECONNECT 0x00000002 UefiSpec.h 　
20464
 LOAD_OPTION_HIDDENLOAD_OPTION_HIDDEN 0x00000008 UefiSpec.h 　
20465
 LOAD_OPTION_CATEGORYLOAD_OPTION_CATEGORY 0x00001F00 UefiSpec.h 　
20466
 LOAD_OPTION_CATEGORY_BOOTLOAD_OPTION_CATEGORY_BOOT 0x00000000 UefiSpec.h 　
20467
 LOAD_OPTION_CATEGORY_APPLOAD_OPTION_CATEGORY_APP 0x00000100 UefiSpec.h 　
20468
 EFI_BOOT_OPTION_SUPPORT_KEYEFI_BOOT_OPTION_SUPPORT_KEY 0x00000001 UefiSpec.h 　
20469
 EFI_BOOT_OPTION_SUPPORT_APPEFI_BOOT_OPTION_SUPPORT_APP 0x00000002 UefiSpec.h 　
20470
 EFI_BOOT_OPTION_SUPPORT_COUNTEFI_BOOT_OPTION_SUPPORT_COUNT 0x00000300 UefiSpec.h 　
20471
 EFI_KEY_OPTION_SHIFTEFI_KEY_OPTION_SHIFT 0x00000001 UefiSpec.h 　
20472
 EFI_KEY_OPTION_CONTROLEFI_KEY_OPTION_CONTROL 0x00000002 UefiSpec.h 　
20473
 EFI_KEY_OPTION_ALTEFI_KEY_OPTION_ALT 0x00000004 UefiSpec.h 　
20474
 EFI_KEY_OPTION_LOGOEFI_KEY_OPTION_LOGO 0x00000008 UefiSpec.h 　
20475
 EFI_KEY_OPTION_MENUEFI_KEY_OPTION_MENU 0x00000010 UefiSpec.h 　
20476
 EFI_KEY_OPTION_SYSREQEFI_KEY_OPTION_SYSREQ 0x00000020 UefiSpec.h 　
20477
 EFI_KEY_CODE_COUNTEFI_KEY_CODE_COUNT 0x00000300 UefiSpec.h 　
20478
 EFI_REMOVABLE_MEDIA_FILE_NAME_IEFI_REMOVABLE_MEDIA_FILE_NAME_I L"\\EFI\\BOOT\\BOOTIA32.EFI" UefiSpec.h 　
20479
 EFI_REMOVABLE_MEDIA_FILE_NAME_IEFI_REMOVABLE_MEDIA_FILE_NAME_I L"\\EFI\\BOOT\\BOOTIA64.EFI" UefiSpec.h 　
20480
 EFI_REMOVABLE_MEDIA_FILE_NAME_XEFI_REMOVABLE_MEDIA_FILE_NAME_X L"\\EFI\\BOOT\\BOOTX64.EFI" UefiSpec.h 　
20481
 EFI_REMOVABLE_MEDIA_FILE_NAMEEFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 UefiSpec.h 　
20482
 EFI_REMOVABLE_MEDIA_FILE_NAMEEFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 UefiSpec.h 　
20483
 EFI_REMOVABLE_MEDIA_FILE_NAMEEFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_X64 UefiSpec.h 　
20484
 UINT8_MAXUINT8_MAX 0xff ProcessorBind.h 　
20485
 MAX_BITMAX_BIT 0x8000000000000000ULL ProcessorBind.h 　
20486
 MAX_2_BITSMAX_2_BITS 0xC000000000000000ULL ProcessorBind.h 　
20487
 MAX_ADDRESSMAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL ProcessorBind.h 　
20488
 CPU_STACK_ALIGNMENTCPU_STACK_ALIGNMENT 16 ProcessorBind.h 　
20489
 EFIAPIEFIAPI __cdecl ProcessorBind.h 　
20490
 EFIAPIEFIAPI __attribute__((ms_abi)) ProcessorBind.h 　
20491
 GLOBAL_REMOVE_IF_UNREFERENCEDGLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany) ProcessorBind.h 　
20492
 ATTR_BOLDATTR_BOLD 0x08 efi_console.c 　
20493
 ATTR_FCOL_MASKATTR_FCOL_MASK 0x07 efi_console.c 　
20494
 ATTR_FCOL_BLACKATTR_FCOL_BLACK 0x00 efi_console.c 　
20495
 ATTR_FCOL_BLUEATTR_FCOL_BLUE 0x01 efi_console.c 　
20496
 ATTR_FCOL_GREENATTR_FCOL_GREEN 0x02 efi_console.c 　
20497
 ATTR_FCOL_CYANATTR_FCOL_CYAN 0x03 efi_console.c 　
20498
 ATTR_FCOL_REDATTR_FCOL_RED 0x04 efi_console.c 　
20499
 ATTR_FCOL_MAGENTAATTR_FCOL_MAGENTA 0x05 efi_console.c 　
20500
 ATTR_FCOL_YELLOWATTR_FCOL_YELLOW 0x06 efi_console.c 　
20501
 ATTR_FCOL_WHITEATTR_FCOL_WHITE 0x07 efi_console.c 　
20502
 ATTR_BCOL_MASKATTR_BCOL_MASK 0x70 efi_console.c 　
20503
 ATTR_BCOL_BLACKATTR_BCOL_BLACK 0x00 efi_console.c 　
20504
 ATTR_BCOL_BLUEATTR_BCOL_BLUE 0x10 efi_console.c 　
20505
 ATTR_BCOL_GREENATTR_BCOL_GREEN 0x20 efi_console.c 　
20506
 ATTR_BCOL_CYANATTR_BCOL_CYAN 0x30 efi_console.c 　
20507
 ATTR_BCOL_REDATTR_BCOL_RED 0x40 efi_console.c 　
20508
 ATTR_BCOL_MAGENTAATTR_BCOL_MAGENTA 0x50 efi_console.c 　
20509
 ATTR_BCOL_YELLOWATTR_BCOL_YELLOW 0x60 efi_console.c 　
20510
 ATTR_BCOL_WHITEATTR_BCOL_WHITE 0x70 efi_console.c 　
20511
 ATTR_DEFAULTATTR_DEFAULT ATTR_FCOL_WHITE efi_console.c 　
20512
 MAX_PORT_ADDRESSMAX_PORT_ADDRESS 0xffff efi_io.c 　
20513
 EFI_TIMER0_SHIFTEFI_TIMER0_SHIFT 12 efi_timer.c 　
20514
 EFI_CALIBRATE_DELAY_MSEFI_CALIBRATE_DELAY_MS 1 efi_timer.c 　
20515
 UNOWHEREUNOWHERE ( ~UNULL ) efi_umalloc.c 　
20516
 SMBIOS_TAG_MAGICSMBIOS_TAG_MAGIC 0x5B smbios_settings.c "SmBios"
20517
 SMBIOS_EMPTY_TAGSMBIOS_EMPTY_TAG ( SMBIOS_TAG_MAGIC << 24 ) smbios_settings.c 　
20518
 NUM_ARP_ENTRIESNUM_ARP_ENTRIES 4 arp.c 　
20519
 arp_table_endarp_table_end &arp_table[NUM_ARP_ENTRIES] arp.c 　
20520
 NUM_NDP_ENTRIESNUM_NDP_ENTRIES 4 ndp.c 　
20521
 ndp_table_endndp_table_end &ndp_table[NUM_NDP_ENTRIES] ndp.c 　
20522
 EUNKNOWN_LINK_STATUSEUNKNOWN_LINK_STATUS EINPROGRESS netdevice.c 　
20523
 MIN_TIMEOUTMIN_TIMEOUT 7 retry.c 　
20524
 EINVAL_PKT_TOO_SHORTEINVAL_PKT_TOO_SHORT ( EINVAL | EUNIQ_01 ) net80211.c 　
20525
 EINVAL_PKT_VERSIONEINVAL_PKT_VERSION ( EINVAL | EUNIQ_02 ) net80211.c 　
20526
 EINVAL_PKT_NOT_DATAEINVAL_PKT_NOT_DATA ( EINVAL | EUNIQ_03 ) net80211.c 　
20527
 EINVAL_PKT_NOT_FROMDSEINVAL_PKT_NOT_FROMDS ( EINVAL | EUNIQ_04 ) net80211.c 　
20528
 EINVAL_PKT_LLC_HEADEREINVAL_PKT_LLC_HEADER ( EINVAL | EUNIQ_05 ) net80211.c 　
20529
 EINVAL_CRYPTO_REQUESTEINVAL_CRYPTO_REQUEST ( EINVAL | EUNIQ_06 ) net80211.c 　
20530
 EINVAL_ACTIVE_SCANEINVAL_ACTIVE_SCAN ( EINVAL | EUNIQ_07 ) net80211.c 　
20531
 NET80211_PROBE_GATHERNET80211_PROBE_GATHER 1 net80211.c 　
20532
 NET80211_PROBE_GATHER_ALLNET80211_PROBE_GATHER_ALL 2 net80211.c 　
20533
 NET80211_PROBE_TIMEOUTNET80211_PROBE_TIMEOUT 6 net80211.c 　
20534
 ASSOC_TIMEOUTASSOC_TIMEOUT TICKS_PER_SEC net80211.c 　
20535
 ASSOC_RETRIESASSOC_RETRIES 2 net80211.c 　
20536
 LQ_SMOOTHLQ_SMOOTH 7 net80211.c 　
20537
 RC_PKT_OKRC_PKT_OK 0x3 rc80211.c 　
20538
 RC_PKT_RETRIED_ONCERC_PKT_RETRIED_ONCE 0x2 rc80211.c 　
20539
 RC_PKT_RETRIED_MULTIRC_PKT_RETRIED_MULTI 0x1 rc80211.c 　
20540
 RC_PKT_FAILEDRC_PKT_FAILED 0x0 rc80211.c 　
20541
 RC_TX_FACTORRC_TX_FACTOR 4 rc80211.c 　
20542
 RC_TX_EMERG_FAILRC_TX_EMERG_FAIL 3 rc80211.c 　
20543
 RC_GOODNESS_MINRC_GOODNESS_MIN 85 rc80211.c 　
20544
 RC_GOODNESS_MAXRC_GOODNESS_MAX 95 rc80211.c 　
20545
 RC_UNCERTAINTY_THRESHRC_UNCERTAINTY_THRESH 4 rc80211.c 　
20546
 TXTX 0 rc80211.c 　
20547
 RXRX 1 rc80211.c 　
20548
 IB_CMRC_NUM_SEND_WQESIB_CMRC_NUM_SEND_WQES 4 ib_cmrc.c 　
20549
 IB_CMRC_NUM_RECV_WQESIB_CMRC_NUM_RECV_WQES 2 ib_cmrc.c 　
20550
 IB_CMRC_NUM_CQESIB_CMRC_NUM_CQES 8 ib_cmrc.c 　
20551
 IB_MI_NUM_SEND_WQESIB_MI_NUM_SEND_WQES 4 ib_mi.c 　
20552
 IB_MI_NUM_RECV_WQESIB_MI_NUM_RECV_WQES 2 ib_mi.c 　
20553
 IB_MI_NUM_CQESIB_MI_NUM_CQES 8 ib_mi.c 　
20554
 IB_MI_TID_MAGICIB_MI_TID_MAGIC ( ( 'g' << 24 ) | ( 'P' << 16 ) | ( 'X' << 8 ) | 'E' ) ib_mi.c 　
20555
 IB_NUM_CACHED_PATHSIB_NUM_CACHED_PATHS 4 ib_pathrec.c 　
20556
 EINVAL_BYTE_STRING_LENEINVAL_BYTE_STRING_LEN ( EINVAL | EUNIQ_01 ) ib_srp.c 　
20557
 EINVAL_BYTE_STRINGEINVAL_BYTE_STRING ( EINVAL | EUNIQ_02 ) ib_srp.c 　
20558
 EINVAL_INTEGEREINVAL_INTEGER ( EINVAL | EUNIQ_03 ) ib_srp.c 　
20559
 EINVAL_RP_TOO_SHORTEINVAL_RP_TOO_SHORT ( EINVAL | EUNIQ_04 ) ib_srp.c 　
20560
 IB_SRP_NUM_RP_COMPONENTSIB_SRP_NUM_RP_COMPONENTS ( sizeof ( ib_srp_rp_parser ) / sizeof ( ib_srp_rp_parser[0] ) ) ib_srp.c 　
20561
 SLAM_DEFAULT_PORTSLAM_DEFAULT_PORT 10000 slam.c 　
20562
 SLAM_DEFAULT_MULTICAST_IPSLAM_DEFAULT_MULTICAST_IP ( ( 239 << 24 ) | ( 255 << 16 ) | ( 1 << 8 ) | ( 1 << 0 ) ) slam.c 　
20563
 SLAM_DEFAULT_MULTICAST_PORTSLAM_DEFAULT_MULTICAST_PORT 10000 slam.c 　
20564
 SLAM_MAX_HEADER_LENSLAM_MAX_HEADER_LEN ( 7 + 7 + \ 7 ) slam.c block_size
20565
 SLAM_MAX_BLOCKS_PER_NACKSLAM_MAX_BLOCKS_PER_NACK 4 slam.c 　
20566
 SLAM_MAX_NACK_LENSLAM_MAX_NACK_LEN ( 7 + 7 + 1 ) slam.c block #blocks NUL
20567
 SLAM_SLAVE_TIMEOUTSLAM_SLAVE_TIMEOUT ( 1 * TICKS_PER_SEC ) slam.c 　
20568
 ETFTP_INVALID_BLKSIZEETFTP_INVALID_BLKSIZE EUNIQ_01 tftp.c 　
20569
 ETFTP_INVALID_TSIZEETFTP_INVALID_TSIZE EUNIQ_02 tftp.c 　
20570
 ETFTP_MC_NO_PORTETFTP_MC_NO_PORT EUNIQ_03 tftp.c 　
20571
 ETFTP_MC_NO_MCETFTP_MC_NO_MC EUNIQ_04 tftp.c 　
20572
 ETFTP_MC_INVALID_MCETFTP_MC_INVALID_MC EUNIQ_05 tftp.c 　
20573
 ETFTP_MC_INVALID_IPETFTP_MC_INVALID_IP EUNIQ_06 tftp.c 　
20574
 ETFTP_MC_INVALID_PORTETFTP_MC_INVALID_PORT EUNIQ_07 tftp.c 　
20575
 MTFTP_MAX_TIMEOUTSMTFTP_MAX_TIMEOUTS 3 tftp.c 　
20576
 FSP_PORTFSP_PORT 21 fsp.c 　
20577
 CC_GET_FILECC_GET_FILE 0x42 fsp.c 　
20578
 CC_BYECC_BYE 0x4A fsp.c 　
20579
 CC_ERRCC_ERR 0x40 fsp.c 　
20580
 CC_STATCC_STAT 0x4D fsp.c 　
20581
 FSP_MAXFILENAMEFSP_MAXFILENAME 255 fsp.c 　
20582
 FSP_MAXPAYLOADFSP_MAXPAYLOAD (ETH_MAX_MTU - \ (sizeof(struct iphdr) + sizeof(struct udphdr) + sizeof(struct fsp_header))) fsp.c 　
20583
 START_OPORTSTART_OPORT 700 nfs.c mountd usually insists on secure ports
20584
 OPORT_SWEEPOPORT_SWEEP 200 nfs.c make sure we don't leave secure range
20585
 __regparm__regparm __attribute__ (( regparm(3) )) memcpy_test.c 　
20586
 URI_MAX_LENURI_MAX_LEN 1024 uri_test.c 　
20587
 LINK_WAIT_MSLINK_WAIT_MS 15000 dhcpmgmt.c 　
20588
 CPAIR_NORMALCPAIR_NORMAL 1 pxemenu.c 　
20589
 CPAIR_SELECTCPAIR_SELECT 2 pxemenu.c 　
20590
 EFI_FILE_ALIGNEFI_FILE_ALIGN 0x20 elf2efi.c 　
20591
 SNAPLENSNAPLEN 1600 hijack.c 　
20592
 HAVE_PCAP_INJECTHAVE_PCAP_INJECT 0 hijack.c 　
20593
 DEBUGDEBUG 0 iccfix.c 　
20594
 ELF_EHDRELF_EHDR Elf32_Ehdr iccfix.c 　
20595
 ELF_SHDRELF_SHDR Elf32_Shdr iccfix.c 　
20596
 ICCFIXICCFIX iccfix32 iccfix.c 　
20597
 ELF_EHDRELF_EHDR Elf64_Ehdr iccfix.c 　
20598
 ELF_SHDRELF_SHDR Elf64_Shdr iccfix.c 　
20599
 ICCFIXICCFIX iccfix64 iccfix.c 　
20600
 UCLPACK_COMPATUCLPACK_COMPAT 0 nrv2b.c 　
20601
 NDEBUGNDEBUG 1 nrv2b.c 　
20602
 wterrwterr 0 nrv2b.c 　
20603
 ENDIANENDIAN 0 nrv2b.c 　
20604
 BITSIZEBITSIZE 32 nrv2b.c 　
20605
 NN (65536ul) nrv2b.c size of ring buffer
20606
 THRESHOLDTHRESHOLD 1 nrv2b.c lower limit for match length
20607
 FF 2048 nrv2b.c upper limit for match length
20608
 M2_MAX_OFFSETM2_MAX_OFFSET 0xd00 nrv2b.c 　
20609
 UCL_E_OKUCL_E_OK 0 nrv2b.c 　
20610
 UCL_E_INVALID_ARGUMENTUCL_E_INVALID_ARGUMENT 1 nrv2b.c 　
20611
 UCL_E_OUT_OF_MEMORYUCL_E_OUT_OF_MEMORY 2 nrv2b.c 　
20612
 UCL_E_ERRORUCL_E_ERROR 3 nrv2b.c 　
20613
 SWD_HSIZESWD_HSIZE 16384 nrv2b.c 　
20614
 SWD_MAX_CHAINSWD_MAX_CHAIN 2048 nrv2b.c 　
20615
 SWD_BEST_OFFSWD_BEST_OFF 1 nrv2b.c 　
20616
 NIL2NIL2 UINT_MAX nrv2b.c 　
20617
 DEBUGDEBUG 0 zbin.c 　
20618
 BOOTINFO_VERSIONBOOTINFO_VERSION 1 freebsd_loader.c 　
20619
 NODEVNODEV (-1) freebsd_loader.c non-existent device
20620
 PAGE_SHIFTPAGE_SHIFT 12 freebsd_loader.c LOG2(PAGE_SIZE)
20621
 PAGE_SIZEPAGE_SIZE (1<<PAGE_SHIFT) freebsd_loader.c bytes/page
20622
 PAGE_MASKPAGE_MASK (PAGE_SIZE-1) freebsd_loader.c 　
20623
 N_BIOS_GEOMN_BIOS_GEOM 8 freebsd_loader.c 　
20624
 max_alignmax_align ( ( unsigned int ) _max_align ) relocate.c 　
20625
 MAX_ADDRMAX_ADDR (0xfff00000UL) relocate.c 　
20626
 TIMER2_TICKS_PER_SECTIMER2_TICKS_PER_SEC 1193180U timer2.c 　
20627
 PPC_PORTBPPC_PORTB 0x61 timer2.c 　
20628
 PPCB_T2OUTPPCB_T2OUT 0x20 timer2.c Bit 5
20629
 PPCB_SPKRPPCB_SPKR 0x02 timer2.c Bit 1
20630
 PPCB_T2GATEPPCB_T2GATE 0x01 timer2.c Bit 0
20631
 TIMER2_PORTTIMER2_PORT 0x42 timer2.c 　
20632
 TIMER_MODE_PORTTIMER_MODE_PORT 0x43 timer2.c 　
20633
 TIMER0_SELTIMER0_SEL 0x00 timer2.c 　
20634
 TIMER1_SELTIMER1_SEL 0x40 timer2.c 　
20635
 TIMER2_SELTIMER2_SEL 0x80 timer2.c 　
20636
 READBACK_SELREADBACK_SEL 0xC0 timer2.c 　
20637
 LATCH_COUNTLATCH_COUNT 0x00 timer2.c 　
20638
 LOBYTE_ACCESSLOBYTE_ACCESS 0x10 timer2.c 　
20639
 HIBYTE_ACCESSHIBYTE_ACCESS 0x20 timer2.c 　
20640
 WORD_ACCESSWORD_ACCESS 0x30 timer2.c 　
20641
 MODE0MODE0 0x00 timer2.c 　
20642
 MODE1MODE1 0x02 timer2.c 　
20643
 MODE2MODE2 0x04 timer2.c 　
20644
 MODE3MODE3 0x06 timer2.c 　
20645
 MODE4MODE4 0x08 timer2.c 　
20646
 MODE5MODE5 0x0A timer2.c 　
20647
 BINARY_COUNTBINARY_COUNT 0x00 timer2.c 　
20648
 BCD_COUNTBCD_COUNT 0x01 timer2.c 　
20649
 VIDBUFFERVIDBUFFER 0xB8000 video_subr.c 　
20650
 LOAD_DEBUGLOAD_DEBUG 0 wince_loader.c 　
20651
 BOOT_ARG_PTR_LOCATIONBOOT_ARG_PTR_LOCATION 0x001FFFFC wince_loader.c 　
20652
 PSIZEPSIZE (1500) wince_loader.c Max Packet Size
20653
 DSIZEDSIZE (PSIZE+12) wince_loader.c 　
20654
 undi_loaderundi_loader __use_data16 ( undi_loader ) undiload.c 　
20655
 undi_loader_entryundi_loader_entry __use_data16 ( undi_loader_entry ) undiload.c 　
20656
 UNDI_HACK_EB54UNDI_HACK_EB54 0x0001 undinet.c 　
20657
 undiisr_irqundiisr_irq __use_data16 ( undiisr_irq ) undinet.c 　
20658
 undiisr_next_handlerundiisr_next_handler __use_data16 ( undiisr_next_handler ) undinet.c 　
20659
 undiisr_trigger_countundiisr_trigger_count __use_data16 ( undiisr_trigger_count ) undinet.c 　
20660
 undinet_tbdundinet_tbd __use_data16 ( undinet_tbd ) undinet.c 　
20661
 ATTR_BOLDATTR_BOLD 0x08 bios_console.c 　
20662
 ATTR_FCOL_MASKATTR_FCOL_MASK 0x07 bios_console.c 　
20663
 ATTR_FCOL_BLACKATTR_FCOL_BLACK 0x00 bios_console.c 　
20664
 ATTR_FCOL_BLUEATTR_FCOL_BLUE 0x01 bios_console.c 　
20665
 ATTR_FCOL_GREENATTR_FCOL_GREEN 0x02 bios_console.c 　
20666
 ATTR_FCOL_CYANATTR_FCOL_CYAN 0x03 bios_console.c 　
20667
 ATTR_FCOL_REDATTR_FCOL_RED 0x04 bios_console.c 　
20668
 ATTR_FCOL_MAGENTAATTR_FCOL_MAGENTA 0x05 bios_console.c 　
20669
 ATTR_FCOL_YELLOWATTR_FCOL_YELLOW 0x06 bios_console.c 　
20670
 ATTR_FCOL_WHITEATTR_FCOL_WHITE 0x07 bios_console.c 　
20671
 ATTR_BCOL_MASKATTR_BCOL_MASK 0x70 bios_console.c 　
20672
 ATTR_BCOL_BLACKATTR_BCOL_BLACK 0x00 bios_console.c 　
20673
 ATTR_BCOL_BLUEATTR_BCOL_BLUE 0x10 bios_console.c 　
20674
 ATTR_BCOL_GREENATTR_BCOL_GREEN 0x20 bios_console.c 　
20675
 ATTR_BCOL_CYANATTR_BCOL_CYAN 0x30 bios_console.c 　
20676
 ATTR_BCOL_REDATTR_BCOL_RED 0x40 bios_console.c 　
20677
 ATTR_BCOL_MAGENTAATTR_BCOL_MAGENTA 0x50 bios_console.c 　
20678
 ATTR_BCOL_YELLOWATTR_BCOL_YELLOW 0x60 bios_console.c 　
20679
 ATTR_BCOL_WHITEATTR_BCOL_WHITE 0x70 bios_console.c 　
20680
 ATTR_DEFAULTATTR_DEFAULT ATTR_FCOL_WHITE bios_console.c 　
20681
 BIOS_KEY_MINBIOS_KEY_MIN 0x42 bios_console.c 　
20682
 real_int15_vectorreal_int15_vector __use_text16 ( real_int15_vector ) fakee820.c 　
20683
 E820_TYPE_RAME820_TYPE_RAM 1 fakee820.c *< Normal memory
20684
 E820_TYPE_RSVDE820_TYPE_RSVD 2 fakee820.c *< Reserved and unavailable
20685
 E820_TYPE_ACPIE820_TYPE_ACPI 3 fakee820.c *< ACPI reclaim memory
20686
 E820_TYPE_NVSE820_TYPE_NVS 4 fakee820.c *< ACPI NVS memory
20687
 e820mape820map __use_text16 ( e820map ) fakee820.c 　
20688
 K_RDWRK_RDWR 0x60 gateA20.c keyboard data & cmds (read/write)
20689
 K_STATUSK_STATUS 0x64 gateA20.c keyboard status
20690
 K_CMDK_CMD 0x64 gateA20.c keybd ctlr command (write-only)
20691
 K_OBUF_FULK_OBUF_FUL 0x01 gateA20.c output buffer full
20692
 K_IBUF_FULK_IBUF_FUL 0x02 gateA20.c input buffer full
20693
 KC_CMD_WINKC_CMD_WIN 0xd0 gateA20.c read output port
20694
 KC_CMD_WOUTKC_CMD_WOUT 0xd1 gateA20.c write output port
20695
 KC_CMD_NULLKC_CMD_NULL 0xff gateA20.c null command ("pulse nothing")
20696
 KB_SET_A20KB_SET_A20 0xdf gateA20.c enable A20,
20697
 KB_UNSET_A20KB_UNSET_A20 0xdd gateA20.c enable A20,
20698
 SCP_ASCP_A 0x92 gateA20.c System Control Port A
20699
 A20_MAX_RETRIESA20_MAX_RETRIES 32 gateA20.c 　
20700
 A20_INT15_RETRIESA20_INT15_RETRIES 32 gateA20.c 　
20701
 A20_KBC_RETRIESA20_KBC_RETRIES (2^21) gateA20.c 　
20702
 A20_SCPA_RETRIESA20_SCPA_RETRIES (2^21) gateA20.c 　
20703
 FAKE_E820FAKE_E820 0 hidemem.c 　
20704
 ALIGN_HIDDENALIGN_HIDDEN 4096 hidemem.c 4kB page alignment should be enough
20705
 hidemem_basehidemem_base __use_data16 ( hidemem_base ) hidemem.c 　
20706
 hidemem_umallochidemem_umalloc __use_data16 ( hidemem_umalloc ) hidemem.c 　
20707
 hidemem_textdatahidemem_textdata __use_data16 ( hidemem_textdata ) hidemem.c 　
20708
 int15_vectorint15_vector __use_text16 ( int15_vector ) hidemem.c 　
20709
 _text16_memsz_text16_memsz ( ( unsigned int ) _text16_memsz ) hidemem.c 　
20710
 _data16_memsz_data16_memsz ( ( unsigned int ) _data16_memsz ) hidemem.c 　
20711
 SMAPSMAP ( 0x534d4150 ) memmap.c 　
20712
 E820_TYPE_RAME820_TYPE_RAM 1 memmap.c *< Normal memory
20713
 E820_TYPE_RESERVEDE820_TYPE_RESERVED 2 memmap.c *< Reserved and unavailable
20714
 E820_TYPE_ACPIE820_TYPE_ACPI 3 memmap.c *< ACPI reclaim memory
20715
 E820_TYPE_NVSE820_TYPE_NVS 4 memmap.c *< ACPI NVS memory
20716
 E820_ATTR_ENABLEDE820_ATTR_ENABLED 0x00000001UL memmap.c 　
20717
 E820_ATTR_NONVOLATILEE820_ATTR_NONVOLATILE 0x00000002UL memmap.c 　
20718
 E820_ATTR_UNKNOWNE820_ATTR_UNKNOWN 0xfffffffcUL memmap.c 　
20719
 E820_MIN_SIZEE820_MIN_SIZE 20 memmap.c 　
20720
 e820bufe820buf __use_data16 ( e820buf ) memmap.c 　
20721
 PNP_BIOS_SIGNATUREPNP_BIOS_SIGNATURE ( ( '$' << 0 ) + ( 'P' << 8 ) + ( 'n' << 16 ) + ( 'P' << 24 ) ) pnpbios.c 　
20722
 COMBOOT_PSP_CMDLINE_OFFSETCOMBOOT_PSP_CMDLINE_OFFSET 0x81 comboot.c 　
20723
 COMBOOT_MAX_CMDLINE_LENCOMBOOT_MAX_CMDLINE_LEN 125 comboot.c 　
20724
 ISO9660_BLKSIZEISO9660_BLKSIZE 2048 eltorito.c 　
20725
 ELTORITO_VOL_DESC_OFFSETELTORITO_VOL_DESC_OFFSET ( 17 * ISO9660_BLKSIZE ) eltorito.c 　
20726
 ELTORITO_BOOTABLEELTORITO_BOOTABLE 0x88 eltorito.c 　
20727
 MAX_MODULESMAX_MODULES 8 multiboot.c 　
20728
 MB_MAX_CMDLINEMB_MAX_CMDLINE 512 multiboot.c 　
20729
 MB_SUPPORTED_FLAGSMB_SUPPORTED_FLAGS ( MB_FLAG_PGALIGN | MB_FLAG_MEMMAP | \ MB_FLAG_VIDMODE | MB_FLAG_RAW ) multiboot.c 　
20730
 MB_COMPULSORY_FLAGSMB_COMPULSORY_FLAGS 0x0000ffff multiboot.c 　
20731
 MB_OPTIONAL_FLAGSMB_OPTIONAL_FLAGS 0xffff0000 multiboot.c 　
20732
 MB_UNSUPPORTED_FLAGSMB_UNSUPPORTED_FLAGS ( MB_COMPULSORY_FLAGS & ~MB_SUPPORTED_FLAGS ) multiboot.c 　
20733
 mb_cmdlinesmb_cmdlines __use_data16 ( mb_cmdlines ) multiboot.c 　
20734
 mbinfombinfo __use_data16 ( mbinfo ) multiboot.c 　
20735
 mb_bootloader_namemb_bootloader_name __use_data16 ( mb_bootloader_name ) multiboot.c 　
20736
 mbmemmapmbmemmap __use_data16 ( mbmemmap ) multiboot.c 　
20737
 mbmodulesmbmodules __use_data16 ( mbmodules ) multiboot.c 　
20738
 NBI_MAGICNBI_MAGIC 0x1B031336UL nbi.c 　
20739
 NBI_HEADER_LENGTHNBI_HEADER_LENGTH 512 nbi.c 　
20740
 NBI_LOADADDR_ABSNBI_LOADADDR_ABS 0x00 nbi.c 　
20741
 NBI_LOADADDR_AFTERNBI_LOADADDR_AFTER 0x01 nbi.c 　
20742
 NBI_LOADADDR_ENDNBI_LOADADDR_END 0x02 nbi.c 　
20743
 NBI_LOADADDR_BEFORENBI_LOADADDR_BEFORE 0x03 nbi.c 　
20744
 BASEMEM_PACKET_LENBASEMEM_PACKET_LEN 1514 basemem_packet.h 　
20745
 basemem_packetbasemem_packet __use_data16 ( basemem_packet ) basemem_packet.h 　
20746
 BDA_SEGBDA_SEG 0x0040 bios.h 　
20747
 BDA_FBMSBDA_FBMS 0x0013 bios.h 　
20748
 BDA_NUM_DRIVESBDA_NUM_DRIVES 0x0075 bios.h 　
20749
 hooked_bios_interruptshooked_bios_interrupts __use_text16 ( hooked_bios_interrupts ) biosint.h 　
20750
 BIOS_DISK_MAX_NAME_LENBIOS_DISK_MAX_NAME_LEN 6 bios_disks.h 　
20751
 bochsbpbochsbp xchgw %bx, %bx bochs.h 　
20752
 BOCHSBPBOCHSBP bochsbp bochs.h 　
20753
 BZI_HDR_OFFSETBZI_HDR_OFFSET 0x1f1 bzimage.h 　
20754
 BZI_BOOT_FLAGBZI_BOOT_FLAG 0xaa55 bzimage.h 　
20755
 BZI_SIGNATUREBZI_SIGNATURE 0x53726448 bzimage.h 　
20756
 BZI_LOADER_TYPE_ETHERBOOTBZI_LOADER_TYPE_ETHERBOOT 0x40 bzimage.h 　
20757
 BZI_LOADER_TYPE_GPXEBZI_LOADER_TYPE_GPXE ( BZI_LOADER_TYPE_ETHERBOOT | 0x06 ) bzimage.h 　
20758
 BZI_LOAD_HIGHBZI_LOAD_HIGH 0x01 bzimage.h 　
20759
 BZI_LOAD_HIGH_ADDRBZI_LOAD_HIGH_ADDR 0x100000 bzimage.h 　
20760
 BZI_LOAD_LOW_ADDRBZI_LOAD_LOW_ADDR 0x10000 bzimage.h 　
20761
 BZI_CAN_USE_HEAPBZI_CAN_USE_HEAP 0x80 bzimage.h 　
20762
 BZI_VID_MODE_NORMALBZI_VID_MODE_NORMAL 0xffff bzimage.h 　
20763
 BZI_VID_MODE_EXTBZI_VID_MODE_EXT 0xfffe bzimage.h 　
20764
 BZI_VID_MODE_ASKBZI_VID_MODE_ASK 0xfffd bzimage.h 　
20765
 BZI_INITRD_MAXBZI_INITRD_MAX 0x37ffffff bzimage.h 　
20766
 BZI_CMDLINE_OFFSETBZI_CMDLINE_OFFSET 0x20 bzimage.h 　
20767
 BZI_CMDLINE_MAGICBZI_CMDLINE_MAGIC 0xa33f bzimage.h 　
20768
 BZI_ASSUMED_RM_SIZEBZI_ASSUMED_RM_SIZE 0x8000 bzimage.h 　
20769
 BZI_STACK_SIZEBZI_STACK_SIZE 0x1000 bzimage.h 　
20770
 BZI_CMDLINE_SIZEBZI_CMDLINE_SIZE 0x100 bzimage.h 　
20771
 COMBOOT_PSP_SEGCOMBOOT_PSP_SEG 0x07C0 comboot.h 　
20772
 COM32_START_PHYSCOM32_START_PHYS 0x101000 comboot.h 　
20773
 COM32_BOUNCE_SEGCOM32_BOUNCE_SEG 0x07C0 comboot.h 　
20774
 COMBOOT_FILE_BLOCKSZCOMBOOT_FILE_BLOCKSZ 512 comboot.h 　
20775
 COMBOOT_FEATURE_LOCAL_BOOTCOMBOOT_FEATURE_LOCAL_BOOT (1 << 0) comboot.h 　
20776
 COMBOOT_FEATURE_IDLE_LOOPCOMBOOT_FEATURE_IDLE_LOOP (1 << 1) comboot.h 　
20777
 COMBOOT_MAX_SHUFFLE_DESCRIPTORSCOMBOOT_MAX_SHUFFLE_DESCRIPTORS 682 comboot.h 　
20778
 COMBOOT_EXITCOMBOOT_EXIT 1 comboot.h 　
20779
 COMBOOT_EXIT_RUN_KERNELCOMBOOT_EXIT_RUN_KERNEL 2 comboot.h 　
20780
 COMBOOT_EXIT_COMMANDCOMBOOT_EXIT_COMMAND 3 comboot.h 　
20781
 COMBOOT_VIDEO_GRAPHICSCOMBOOT_VIDEO_GRAPHICS 0x01 comboot.h 　
20782
 COMBOOT_VIDEO_NONSTANDARDCOMBOOT_VIDEO_NONSTANDARD 0x02 comboot.h 　
20783
 COMBOOT_VIDEO_VESACOMBOOT_VIDEO_VESA 0x04 comboot.h 　
20784
 COMBOOT_VIDEO_NOTEXTCOMBOOT_VIDEO_NOTEXT 0x08 comboot.h 　
20785
 INT13_RESETINT13_RESET 0x00 int13.h 　
20786
 INT13_GET_LAST_STATUSINT13_GET_LAST_STATUS 0x01 int13.h 　
20787
 INT13_READ_SECTORSINT13_READ_SECTORS 0x02 int13.h 　
20788
 INT13_WRITE_SECTORSINT13_WRITE_SECTORS 0x03 int13.h 　
20789
 INT13_GET_PARAMETERSINT13_GET_PARAMETERS 0x08 int13.h 　
20790
 INT13_GET_DISK_TYPEINT13_GET_DISK_TYPE 0x15 int13.h 　
20791
 INT13_EXTENSION_CHECKINT13_EXTENSION_CHECK 0x41 int13.h 　
20792
 INT13_EXTENDED_READINT13_EXTENDED_READ 0x42 int13.h 　
20793
 INT13_EXTENDED_WRITEINT13_EXTENDED_WRITE 0x43 int13.h 　
20794
 INT13_GET_EXTENDED_PARAMETERSINT13_GET_EXTENDED_PARAMETERS 0x48 int13.h 　
20795
 INT13_CDROM_STATUS_TERMINATEINT13_CDROM_STATUS_TERMINATE 0x4b int13.h 　
20796
 INT13_STATUS_SUCCESSINT13_STATUS_SUCCESS 0x00 int13.h 　
20797
 INT13_STATUS_INVALIDINT13_STATUS_INVALID 0x01 int13.h 　
20798
 INT13_STATUS_READ_ERRORINT13_STATUS_READ_ERROR 0x04 int13.h 　
20799
 INT13_STATUS_WRITE_ERRORINT13_STATUS_WRITE_ERROR 0xcc int13.h 　
20800
 INT13_BLKSIZEINT13_BLKSIZE 512 int13.h 　
20801
 INT13_DISK_TYPE_NONEINT13_DISK_TYPE_NONE 0x00 int13.h 　
20802
 INT13_DISK_TYPE_FDDINT13_DISK_TYPE_FDD 0x01 int13.h 　
20803
 INT13_DISK_TYPE_FDD_CLINT13_DISK_TYPE_FDD_CL 0x02 int13.h 　
20804
 INT13_DISK_TYPE_HDDINT13_DISK_TYPE_HDD 0x03 int13.h 　
20805
 INT13_FL_DMA_TRANSPARENTINT13_FL_DMA_TRANSPARENT 0x01 int13.h 　
20806
 INT13_FL_CHS_VALIDINT13_FL_CHS_VALID 0x02 int13.h 　
20807
 INT13_FL_REMOVABLEINT13_FL_REMOVABLE 0x04 int13.h 　
20808
 INT13_FL_VERIFIABLEINT13_FL_VERIFIABLE 0x08 int13.h 　
20809
 INT13_FL_CHANGE_LINEINT13_FL_CHANGE_LINE 0x10 int13.h 　
20810
 INT13_FL_LOCKABLEINT13_FL_LOCKABLE 0x20 int13.h 　
20811
 INT13_FL_CHS_MAXINT13_FL_CHS_MAX 0x40 int13.h 　
20812
 INT13_EXTENSION_LINEARINT13_EXTENSION_LINEAR 0x01 int13.h 　
20813
 INT13_EXTENSION_REMOVABLEINT13_EXTENSION_REMOVABLE 0x02 int13.h 　
20814
 INT13_EXTENSION_EDDINT13_EXTENSION_EDD 0x04 int13.h 　
20815
 INT13_EXTENSION_VER_1_XINT13_EXTENSION_VER_1_X 0x01 int13.h 　
20816
 INT13_EXTENSION_VER_2_0INT13_EXTENSION_VER_2_0 0x20 int13.h 　
20817
 INT13_EXTENSION_VER_2_1INT13_EXTENSION_VER_2_1 0x21 int13.h 　
20818
 INT13_EXTENSION_VER_3_0INT13_EXTENSION_VER_3_0 0x30 int13.h 　
20819
 code32code32 code16gcc kir.h 　
20820
 rm_csrm_cs ( _rm_cs() ) libkir.h 　
20821
 rm_dsrm_ds ( _rm_ds() ) libkir.h 　
20822
 copy_to_realcopy_to_real copy_to_real_libkir libkir.h 　
20823
 copy_from_realcopy_from_real copy_from_real_libkir libkir.h 　
20824
 put_realput_real put_real_kir libkir.h 　
20825
 get_realget_real get_real_kir libkir.h 　
20826
 VIRTUAL_CSVIRTUAL_CS 0x08 librm.h 　
20827
 VIRTUAL_DSVIRTUAL_DS 0x10 librm.h 　
20828
 PHYSICAL_CSPHYSICAL_CS 0x18 librm.h 　
20829
 PHYSICAL_DSPHYSICAL_DS 0x20 librm.h 　
20830
 REAL_CSREAL_CS 0x28 librm.h 　
20831
 REAL_DSREAL_DS 0x30 librm.h 　
20832
 LONG_CSLONG_CS 0x38 librm.h 　
20833
 LONG_DSLONG_DS 0x40 librm.h 　
20834
 UACCESS_PREFIX_librmUACCESS_PREFIX_librm __librm_ librm.h 　
20835
 rm_csrm_cs __use_data16 ( rm_cs ) librm.h 　
20836
 rm_dsrm_ds __use_text16 ( rm_ds ) librm.h 　
20837
 LIMITS_HLIMITS_H 1 limits.h 　
20838
 CHAR_BITCHAR_BIT 8 limits.h 　
20839
 SCHAR_MINSCHAR_MIN (-128) limits.h 　
20840
 SCHAR_MAXSCHAR_MAX 127 limits.h 　
20841
 UCHAR_MAXUCHAR_MAX 255 limits.h 　
20842
 CHAR_MINCHAR_MIN SCHAR_MIN limits.h 　
20843
 CHAR_MAXCHAR_MAX SCHAR_MAX limits.h 　
20844
 SHRT_MINSHRT_MIN (-32768) limits.h 　
20845
 SHRT_MAXSHRT_MAX 32767 limits.h 　
20846
 USHRT_MAXUSHRT_MAX 65535 limits.h 　
20847
 INT_MININT_MIN (-INT_MAX - 1) limits.h 　
20848
 INT_MAXINT_MAX 2147483647 limits.h 　
20849
 UINT_MAXUINT_MAX 4294967295U limits.h 　
20850
 INT_MAXINT_MAX 2147483647 limits.h 　
20851
 INT_MININT_MIN (-INT_MAX - 1) limits.h 　
20852
 UINT_MAXUINT_MAX 4294967295U limits.h 　
20853
 LONG_MAXLONG_MAX 2147483647 limits.h 　
20854
 LONG_MINLONG_MIN (-LONG_MAX - 1L) limits.h 　
20855
 ULONG_MAXULONG_MAX 4294967295UL limits.h 　
20856
 LLONG_MAXLLONG_MAX 9223372036854775807LL limits.h 　
20857
 LLONG_MINLLONG_MIN (-LONG_MAX - 1LL) limits.h 　
20858
 ULLONG_MAXULLONG_MAX 18446744073709551615ULL limits.h 　
20859
 MULTIBOOT_HEADER_MAGICMULTIBOOT_HEADER_MAGIC 0x1BADB002 multiboot.h 　
20860
 MB_FLAG_PGALIGNMB_FLAG_PGALIGN 0x00000001 multiboot.h 　
20861
 MB_FLAG_MEMMAPMB_FLAG_MEMMAP 0x00000002 multiboot.h 　
20862
 MB_FLAG_VIDMODEMB_FLAG_VIDMODE 0x00000004 multiboot.h 　
20863
 MB_FLAG_RAWMB_FLAG_RAW 0x00010000 multiboot.h 　
20864
 MULTIBOOT_BOOTLOADER_MAGICMULTIBOOT_BOOTLOADER_MAGIC 0x2BADB002 multiboot.h 　
20865
 MBI_FLAG_MEMMBI_FLAG_MEM 0x00000001 multiboot.h 　
20866
 MBI_FLAG_BOOTDEVMBI_FLAG_BOOTDEV 0x00000002 multiboot.h 　
20867
 MBI_FLAG_CMDLINEMBI_FLAG_CMDLINE 0x00000004 multiboot.h 　
20868
 MBI_FLAG_MODSMBI_FLAG_MODS 0x00000008 multiboot.h 　
20869
 MBI_FLAG_AOUTMBI_FLAG_AOUT 0x00000010 multiboot.h 　
20870
 MBI_FLAG_ELFMBI_FLAG_ELF 0x00000020 multiboot.h 　
20871
 MBI_FLAG_MMAPMBI_FLAG_MMAP 0x00000040 multiboot.h 　
20872
 MBI_FLAG_DRIVESMBI_FLAG_DRIVES 0x00000080 multiboot.h 　
20873
 MBI_FLAG_CFGTBLMBI_FLAG_CFGTBL 0x00000100 multiboot.h 　
20874
 MBI_FLAG_LOADERMBI_FLAG_LOADER 0x00000200 multiboot.h 　
20875
 MBI_FLAG_APMMBI_FLAG_APM 0x00000400 multiboot.h 　
20876
 MBI_FLAG_VBEMBI_FLAG_VBE 0x00000800 multiboot.h 　
20877
 MBMEM_RAMMBMEM_RAM 1 multiboot.h 　
20878
 IRQ_PIC_CUTOFFIRQ_PIC_CUTOFF 8 pic8259.h 　
20879
 PIC1_ICW1PIC1_ICW1 0x20 pic8259.h 　
20880
 PIC1_OCW2PIC1_OCW2 0x20 pic8259.h 　
20881
 PIC1_OCW3PIC1_OCW3 0x20 pic8259.h 　
20882
 PIC1_ICRPIC1_ICR 0x20 pic8259.h 　
20883
 PIC1_IRRPIC1_IRR 0x20 pic8259.h 　
20884
 PIC1_ISRPIC1_ISR 0x20 pic8259.h 　
20885
 PIC1_ICW2PIC1_ICW2 0x21 pic8259.h 　
20886
 PIC1_ICW3PIC1_ICW3 0x21 pic8259.h 　
20887
 PIC1_ICW4PIC1_ICW4 0x21 pic8259.h 　
20888
 PIC1_IMRPIC1_IMR 0x21 pic8259.h 　
20889
 PIC2_ICW1PIC2_ICW1 0xa0 pic8259.h 　
20890
 PIC2_OCW2PIC2_OCW2 0xa0 pic8259.h 　
20891
 PIC2_OCW3PIC2_OCW3 0xa0 pic8259.h 　
20892
 PIC2_ICRPIC2_ICR 0xa0 pic8259.h 　
20893
 PIC2_IRRPIC2_IRR 0xa0 pic8259.h 　
20894
 PIC2_ISRPIC2_ISR 0xa0 pic8259.h 　
20895
 PIC2_ICW2PIC2_ICW2 0xa1 pic8259.h 　
20896
 PIC2_ICW3PIC2_ICW3 0xa1 pic8259.h 　
20897
 PIC2_ICW4PIC2_ICW4 0xa1 pic8259.h 　
20898
 PIC2_IMRPIC2_IMR 0xa1 pic8259.h 　
20899
 OCW3_IDOCW3_ID 0x08 pic8259.h 　
20900
 OCW3_READ_IRROCW3_READ_IRR 0x03 pic8259.h 　
20901
 OCW3_READ_ISROCW3_READ_ISR 0x02 pic8259.h 　
20902
 ICR_EOI_NON_SPECIFICICR_EOI_NON_SPECIFIC 0x20 pic8259.h 　
20903
 ICR_EOI_NOPICR_EOI_NOP 0x40 pic8259.h 　
20904
 ICR_EOI_SPECIFICICR_EOI_SPECIFIC 0x60 pic8259.h 　
20905
 ICR_EOI_SET_PRIORITYICR_EOI_SET_PRIORITY 0xc0 pic8259.h 　
20906
 CHAINED_IRQCHAINED_IRQ 2 pic8259.h 　
20907
 IRQ_MAXIRQ_MAX 15 pic8259.h 　
20908
 IRQ_NONEIRQ_NONE -1U pic8259.h 　
20909
 BIOS_SEGBIOS_SEG 0xf000 pnpbios.h 　
20910
 ROM_SIGNATUREROM_SIGNATURE 0xaa55 pxe.h 　
20911
 UNDI_ROM_ID_SIGNATUREUNDI_ROM_ID_SIGNATURE ( ( 'U' << 0 ) + ( 'N' << 8 ) + ( 'D' << 16 ) + ( 'I' << 24 ) ) pxe.h 　
20912
 PCIR_SIGNATUREPCIR_SIGNATURE ( ( 'P' << 0 ) + ( 'C' << 8 ) + ( 'I' << 16 ) + ( 'R' << 24 ) ) pxe.h 　
20913
 PXENV_UNLOAD_STACKPXENV_UNLOAD_STACK 0x0070 pxe_api.h 　
20914
 PXENV_GET_CACHED_INFOPXENV_GET_CACHED_INFO 0x0071 pxe_api.h 　
20915
 PXENV_PACKET_TYPE_DHCP_DISCOVERPXENV_PACKET_TYPE_DHCP_DISCOVER 1 pxe_api.h 　
20916
 PXENV_PACKET_TYPE_DHCP_ACKPXENV_PACKET_TYPE_DHCP_ACK 2 pxe_api.h 　
20917
 PXENV_PACKET_TYPE_CACHED_REPLYPXENV_PACKET_TYPE_CACHED_REPLY 3 pxe_api.h 　
20918
 BOOTP_REQBOOTP_REQ 1 pxe_api.h *< A BOOTP request packet
20919
 BOOTP_REPBOOTP_REP 2 pxe_api.h *< A BOOTP reply packet
20920
 BOOTP_BCASTBOOTP_BCAST 0x8000 pxe_api.h 　
20921
 VM_RFC1048VM_RFC1048 0x63825363L pxe_api.h *< DHCP magic cookie
20922
 BOOTP_DHCPVENDBOOTP_DHCPVEND 1024 pxe_api.h 　
20923
 PXENV_RESTART_TFTPPXENV_RESTART_TFTP 0x0073 pxe_api.h 　
20924
 PXENV_START_UNDIPXENV_START_UNDI 0x0000 pxe_api.h 　
20925
 PXENV_STOP_UNDIPXENV_STOP_UNDI 0x0015 pxe_api.h 　
20926
 PXENV_START_BASEPXENV_START_BASE 0x0075 pxe_api.h 　
20927
 PXENV_STOP_BASEPXENV_STOP_BASE 0x0076 pxe_api.h 　
20928
 PXENV_TFTP_OPENPXENV_TFTP_OPEN 0x0020 pxe_api.h 　
20929
 PXENV_TFTP_CLOSEPXENV_TFTP_CLOSE 0x0021 pxe_api.h 　
20930
 PXENV_TFTP_READPXENV_TFTP_READ 0x0022 pxe_api.h 　
20931
 PXENV_TFTP_READ_FILEPXENV_TFTP_READ_FILE 0x0023 pxe_api.h 　
20932
 PXENV_TFTP_GET_FSIZEPXENV_TFTP_GET_FSIZE 0x0025 pxe_api.h 　
20933
 PXENV_UDP_OPENPXENV_UDP_OPEN 0x0030 pxe_api.h 　
20934
 PXENV_UDP_CLOSEPXENV_UDP_CLOSE 0x0031 pxe_api.h 　
20935
 PXENV_UDP_WRITEPXENV_UDP_WRITE 0x0033 pxe_api.h 　
20936
 PXENV_UDP_READPXENV_UDP_READ 0x0032 pxe_api.h 　
20937
 PXENV_UNDI_STARTUPPXENV_UNDI_STARTUP 0x0001 pxe_api.h 　
20938
 PXENV_BUS_ISAPXENV_BUS_ISA 0 pxe_api.h *< ISA bus type
20939
 PXENV_BUS_EISAPXENV_BUS_EISA 1 pxe_api.h *< EISA bus type
20940
 PXENV_BUS_MCAPXENV_BUS_MCA 2 pxe_api.h *< MCA bus type
20941
 PXENV_BUS_PCIPXENV_BUS_PCI 3 pxe_api.h *< PCI bus type
20942
 PXENV_BUS_VESAPXENV_BUS_VESA 4 pxe_api.h *< VESA bus type
20943
 PXENV_BUS_PCMCIAPXENV_BUS_PCMCIA 5 pxe_api.h *< PCMCIA bus type
20944
 PXENV_UNDI_CLEANUPPXENV_UNDI_CLEANUP 0x0002 pxe_api.h 　
20945
 PXENV_UNDI_INITIALIZEPXENV_UNDI_INITIALIZE 0x0003 pxe_api.h 　
20946
 PXENV_UNDI_RESET_ADAPTERPXENV_UNDI_RESET_ADAPTER 0x0004 pxe_api.h 　
20947
 MAXNUM_MCADDRMAXNUM_MCADDR 8 pxe_api.h 　
20948
 PXENV_UNDI_SHUTDOWNPXENV_UNDI_SHUTDOWN 0x0005 pxe_api.h 　
20949
 PXENV_UNDI_OPENPXENV_UNDI_OPEN 0x0006 pxe_api.h 　
20950
 FLTR_DIRECTEDFLTR_DIRECTED 0x0001 pxe_api.h 　
20951
 FLTR_BRDCSTFLTR_BRDCST 0x0002 pxe_api.h 　
20952
 FLTR_PRMSCSFLTR_PRMSCS 0x0004 pxe_api.h 　
20953
 FLTR_SRC_RTGFLTR_SRC_RTG 0x0008 pxe_api.h 　
20954
 PXENV_UNDI_CLOSEPXENV_UNDI_CLOSE 0x0007 pxe_api.h 　
20955
 PXENV_UNDI_TRANSMITPXENV_UNDI_TRANSMIT 0x0008 pxe_api.h 　
20956
 P_UNKNOWNP_UNKNOWN 0 pxe_api.h *< Media header already filled in
20957
 P_IPP_IP 1 pxe_api.h *< IP protocol
20958
 P_ARPP_ARP 2 pxe_api.h *< ARP protocol
20959
 P_RARPP_RARP 3 pxe_api.h *< RARP protocol
20960
 P_OTHERP_OTHER 4 pxe_api.h *< Other protocol
20961
 XMT_DESTADDRXMT_DESTADDR 0x0000 pxe_api.h *< Unicast packet
20962
 XMT_BROADCASTXMT_BROADCAST 0x0001 pxe_api.h *< Broadcast packet
20963
 MAX_DATA_BLKSMAX_DATA_BLKS 8 pxe_api.h 　
20964
 PXENV_UNDI_SET_MCAST_ADDRESSPXENV_UNDI_SET_MCAST_ADDRESS 0x0009 pxe_api.h 　
20965
 PXENV_UNDI_SET_STATION_ADDRESSPXENV_UNDI_SET_STATION_ADDRESS 0x000a pxe_api.h 　
20966
 PXENV_UNDI_SET_PACKET_FILTERPXENV_UNDI_SET_PACKET_FILTER 0x000b pxe_api.h 　
20967
 PXENV_UNDI_GET_INFORMATIONPXENV_UNDI_GET_INFORMATION 0x000c pxe_api.h 　
20968
 ETHER_TYPEETHER_TYPE 1 pxe_api.h *< Ethernet (10Mb)
20969
 EXP_ETHER_TYPEEXP_ETHER_TYPE 2 pxe_api.h *< Experimental Ethernet (3Mb)
20970
 AX25_TYPEAX25_TYPE 3 pxe_api.h *< Amateur Radio AX.25
20971
 TOKEN_RING_TYPETOKEN_RING_TYPE 4 pxe_api.h *< Proteon ProNET Token Ring
20972
 CHAOS_TYPECHAOS_TYPE 5 pxe_api.h *< Chaos
20973
 IEEE_TYPEIEEE_TYPE 6 pxe_api.h *< IEEE 802 Networks
20974
 ARCNET_TYPEARCNET_TYPE 7 pxe_api.h *< ARCNET
20975
 PXENV_UNDI_GET_STATISTICSPXENV_UNDI_GET_STATISTICS 0x000d pxe_api.h 　
20976
 PXENV_UNDI_CLEAR_STATISTICSPXENV_UNDI_CLEAR_STATISTICS 0x000e pxe_api.h 　
20977
 PXENV_UNDI_INITIATE_DIAGSPXENV_UNDI_INITIATE_DIAGS 0x000f pxe_api.h 　
20978
 PXENV_UNDI_FORCE_INTERRUPTPXENV_UNDI_FORCE_INTERRUPT 0x0010 pxe_api.h 　
20979
 PXENV_UNDI_GET_MCAST_ADDRESSPXENV_UNDI_GET_MCAST_ADDRESS 0x0011 pxe_api.h 　
20980
 PXENV_UNDI_GET_NIC_TYPEPXENV_UNDI_GET_NIC_TYPE 0x0012 pxe_api.h 　
20981
 PCI_NICPCI_NIC 2 pxe_api.h *< PCI network card
20982
 PnP_NICPnP_NIC 3 pxe_api.h *< ISAPnP network card
20983
 CardBus_NICCardBus_NIC 4 pxe_api.h *< CardBus network card
20984
 PXENV_UNDI_GET_IFACE_INFOPXENV_UNDI_GET_IFACE_INFO 0x0013 pxe_api.h 　
20985
 SUPPORTED_BROADCASTSUPPORTED_BROADCAST 0x0001 pxe_api.h 　
20986
 SUPPORTED_MULTICASTSUPPORTED_MULTICAST 0x0002 pxe_api.h 　
20987
 SUPPORTED_GROUPSUPPORTED_GROUP 0x0004 pxe_api.h 　
20988
 SUPPORTED_PROMISCUOUSSUPPORTED_PROMISCUOUS 0x0008 pxe_api.h 　
20989
 SUPPORTED_SET_STATION_ADDRESSSUPPORTED_SET_STATION_ADDRESS 0x0010 pxe_api.h 　
20990
 SUPPORTED_DIAGNOSTICSSUPPORTED_DIAGNOSTICS 0x0040 pxe_api.h 　
20991
 SUPPORTED_RESETSUPPORTED_RESET 0x0400 pxe_api.h 　
20992
 SUPPORTED_OPEN_CLOSESUPPORTED_OPEN_CLOSE 0x0800 pxe_api.h 　
20993
 SUPPORTED_IRQSUPPORTED_IRQ 0x1000 pxe_api.h 　
20994
 PXENV_UNDI_GET_STATEPXENV_UNDI_GET_STATE 0x0015 pxe_api.h 　
20995
 PXE_UNDI_GET_STATE_STARTEDPXE_UNDI_GET_STATE_STARTED 1 pxe_api.h 　
20996
 PXE_UNDI_GET_STATE_INITIALIZEDPXE_UNDI_GET_STATE_INITIALIZED 2 pxe_api.h 　
20997
 PXE_UNDI_GET_STATE_OPENEDPXE_UNDI_GET_STATE_OPENED 3 pxe_api.h 　
20998
 PXENV_UNDI_ISRPXENV_UNDI_ISR 0x0014 pxe_api.h 　
20999
 PXENV_UNDI_ISR_IN_STARTPXENV_UNDI_ISR_IN_START 1 pxe_api.h 　
21000
 PXENV_UNDI_ISR_IN_PROCESSPXENV_UNDI_ISR_IN_PROCESS 2 pxe_api.h 　
21001
 PXENV_UNDI_ISR_IN_GET_NEXTPXENV_UNDI_ISR_IN_GET_NEXT 3 pxe_api.h 　
21002
 PXENV_UNDI_ISR_OUT_OURSPXENV_UNDI_ISR_OUT_OURS 0 pxe_api.h 　
21003
 PXENV_UNDI_ISR_OUT_NOT_OURSPXENV_UNDI_ISR_OUT_NOT_OURS 1 pxe_api.h 　
21004
 PXENV_UNDI_ISR_OUT_DONEPXENV_UNDI_ISR_OUT_DONE 0 pxe_api.h 　
21005
 PXENV_UNDI_ISR_OUT_TRANSMITPXENV_UNDI_ISR_OUT_TRANSMIT 2 pxe_api.h 　
21006
 PXENV_UNDI_ISR_OUT_RECEIVEPXENV_UNDI_ISR_OUT_RECEIVE 3 pxe_api.h 　
21007
 PXENV_UNDI_ISR_OUT_BUSYPXENV_UNDI_ISR_OUT_BUSY 4 pxe_api.h 　
21008
 P_DIRECTEDP_DIRECTED 0 pxe_api.h 　
21009
 P_BROADCASTP_BROADCAST 1 pxe_api.h 　
21010
 P_MULTICASTP_MULTICAST 2 pxe_api.h 　
21011
 PXENV_FILE_OPENPXENV_FILE_OPEN 0x00e0 pxe_api.h 　
21012
 PXENV_FILE_CLOSEPXENV_FILE_CLOSE 0x00e1 pxe_api.h 　
21013
 PXENV_FILE_SELECTPXENV_FILE_SELECT 0x00e2 pxe_api.h 　
21014
 RDY_READRDY_READ 0x0001 pxe_api.h 　
21015
 PXENV_FILE_READPXENV_FILE_READ 0x00e3 pxe_api.h 　
21016
 PXENV_GET_FILE_SIZEPXENV_GET_FILE_SIZE 0x00e4 pxe_api.h 　
21017
 PXENV_FILE_EXECPXENV_FILE_EXEC 0x00e5 pxe_api.h 　
21018
 PXENV_FILE_API_CHECKPXENV_FILE_API_CHECK 0x00e6 pxe_api.h 　
21019
 PXENV_FILE_EXIT_HOOKPXENV_FILE_EXIT_HOOK 0x00e7 pxe_api.h 　
21020
 PXE_LOAD_SEGMENTPXE_LOAD_SEGMENT 0 pxe_call.h 　
21021
 PXE_LOAD_OFFSETPXE_LOAD_OFFSET 0x7c00 pxe_call.h 　
21022
 PXE_LOAD_PHYSPXE_LOAD_PHYS ( ( PXE_LOAD_SEGMENT << 4 ) + PXE_LOAD_OFFSET ) pxe_call.h 　
21023
 ppxeppxe __use_text16 ( ppxe ) pxe_call.h 　
21024
 pxenvpxenv __use_text16 ( pxenv ) pxe_call.h 　
21025
 PXENV_EXIT_SUCCESSPXENV_EXIT_SUCCESS 0x0000 pxe_types.h *< No error occurred
21026
 PXENV_EXIT_FAILUREPXENV_EXIT_FAILURE 0x0001 pxe_types.h *< An error occurred
21027
 MAC_ADDR_LENMAC_ADDR_LEN 16 pxe_types.h 　
21028
 CFCF ( 1 << 0 ) registers.h 　
21029
 PFPF ( 1 << 2 ) registers.h 　
21030
 AFAF ( 1 << 4 ) registers.h 　
21031
 ZFZF ( 1 << 6 ) registers.h 　
21032
 SFSF ( 1 << 7 ) registers.h 　
21033
 OFOF ( 1 << 11 ) registers.h 　
21034
 UNDI_NO_PCI_BUSDEVFNUNDI_NO_PCI_BUSDEVFN 0xffff undi.h 　
21035
 UNDI_NO_ISAPNP_CSNUNDI_NO_ISAPNP_CSN 0xffff undi.h 　
21036
 UNDI_NO_ISAPNP_READ_PORTUNDI_NO_ISAPNP_READ_PORT 0xffff undi.h 　
21037
 UNDI_FL_STARTEDUNDI_FL_STARTED 0x0001 undi.h 　
21038
 UNDI_FL_INITIALIZEDUNDI_FL_INITIALIZED 0x0002 undi.h 　
21039
 UNDI_FL_KEEP_ALLUNDI_FL_KEEP_ALL 0x0004 undi.h 　
21040
 preloaded_undipreloaded_undi __use_data16 ( preloaded_undi ) undipreload.h 　
21041
 VGA_H_INCLVGA_H_INCL 1 vga.h 　
21042
 u8u8 unsigned char vga.h 　
21043
 u16u16 unsigned short vga.h 　
21044
 u32u32 unsigned int vga.h 　
21045
 __u32__u32 u32 vga.h 　
21046
 VERRORVERROR -1 vga.h 　
21047
 CHAR_HEIGHTCHAR_HEIGHT 16 vga.h 　
21048
 LINESLINES 25 vga.h 　
21049
 COLSCOLS 80 vga.h 　
21050
 SYNC_HOR_HIGH_ACTSYNC_HOR_HIGH_ACT 1 vga.h horizontal sync high active
21051
 SYNC_VERT_HIGH_ACTSYNC_VERT_HIGH_ACT 2 vga.h vertical sync high active
21052
 SYNC_EXTSYNC_EXT 4 vga.h external sync
21053
 SYNC_COMP_HIGH_ACTSYNC_COMP_HIGH_ACT 8 vga.h composite sync high active
21054
 SYNC_BROADCASTSYNC_BROADCAST 16 vga.h broadcast video timings
21055
 SYNC_ON_GREENSYNC_ON_GREEN 32 vga.h sync on green
21056
 VMODE_NONINTERLACEDVMODE_NONINTERLACED 0 vga.h non interlaced
21057
 VMODE_INTERLACEDVMODE_INTERLACED 1 vga.h interlaced
21058
 VMODE_DOUBLEVMODE_DOUBLE 2 vga.h double scan
21059
 VMODE_MASKVMODE_MASK 255 vga.h 　
21060
 VMODE_YWRAPVMODE_YWRAP 256 vga.h ywrap instead of panning
21061
 VMODE_SMOOTH_XPANVMODE_SMOOTH_XPAN 512 vga.h smooth xpan possible (internally used)
21062
 VMODE_CONUPDATEVMODE_CONUPDATE 512 vga.h don't update x/yoffset
21063
 CRT_DCCRT_DC 0x3D5 vga.h CRT Controller Data Register - color emulation
21064
 CRT_DMCRT_DM 0x3B5 vga.h CRT Controller Data Register - mono emulation
21065
 ATT_RATT_R 0x3C1 vga.h Attribute Controller Data Read Register
21066
 GRA_DGRA_D 0x3CF vga.h Graphics Controller Data Register
21067
 SEQ_DSEQ_D 0x3C5 vga.h Sequencer Data Register
21068
 MIS_RMIS_R 0x3CC vga.h Misc Output Read Register
21069
 MIS_WMIS_W 0x3C2 vga.h Misc Output Write Register
21070
 IS1_RCIS1_RC 0x3DA vga.h Input Status Register 1 - color emulation
21071
 IS1_RMIS1_RM 0x3BA vga.h Input Status Register 1 - mono emulation
21072
 PEL_DPEL_D 0x3C9 vga.h PEL Data Register
21073
 PEL_MSKPEL_MSK 0x3C6 vga.h PEL mask register
21074
 GRA_E0GRA_E0 0x3CC vga.h Graphics enable processor 0
21075
 GRA_E1GRA_E1 0x3CA vga.h Graphics enable processor 1
21076
 CRT_ICCRT_IC 0x3D4 vga.h CRT Controller Index - color emulation
21077
 CRT_IMCRT_IM 0x3B4 vga.h CRT Controller Index - mono emulation
21078
 ATT_IWATT_IW 0x3C0 vga.h Attribute Controller Index & Data Write Register
21079
 GRA_IGRA_I 0x3CE vga.h Graphics Controller Index
21080
 SEQ_ISEQ_I 0x3C4 vga.h Sequencer Index
21081
 PEL_IWPEL_IW 0x3C8 vga.h PEL Write Index
21082
 PEL_IRPEL_IR 0x3C7 vga.h PEL Read Index
21083
 CRTC_CCRTC_C 25 vga.h 25 CRT Controller Registers sequentially set
21084
 ATT_CATT_C 21 vga.h 21 Attribute Controller Registers
21085
 GRA_CGRA_C 9 vga.h 9 Graphics Controller Registers
21086
 SEQ_CSEQ_C 5 vga.h 5 Sequencer Registers
21087
 MIS_CMIS_C 1 vga.h 1 Misc Output Register
21088
 CRTC_H_TOTALCRTC_H_TOTAL 0 vga.h 　
21089
 CRTC_H_DISPCRTC_H_DISP 1 vga.h 　
21090
 CRTC_H_BLANK_STARTCRTC_H_BLANK_START 2 vga.h 　
21091
 CRTC_H_BLANK_ENDCRTC_H_BLANK_END 3 vga.h 　
21092
 CRTC_H_SYNC_STARTCRTC_H_SYNC_START 4 vga.h 　
21093
 CRTC_H_SYNC_ENDCRTC_H_SYNC_END 5 vga.h 　
21094
 CRTC_V_TOTALCRTC_V_TOTAL 6 vga.h 　
21095
 CRTC_OVERFLOWCRTC_OVERFLOW 7 vga.h 　
21096
 CRTC_PRESET_ROWCRTC_PRESET_ROW 8 vga.h 　
21097
 CRTC_MAX_SCANCRTC_MAX_SCAN 9 vga.h 　
21098
 CRTC_CURSOR_STARTCRTC_CURSOR_START 0x0A vga.h 　
21099
 CRTC_CURSOR_ENDCRTC_CURSOR_END 0x0B vga.h 　
21100
 CRTC_START_HICRTC_START_HI 0x0C vga.h 　
21101
 CRTC_START_LOCRTC_START_LO 0x0D vga.h 　
21102
 CRTC_CURSOR_HICRTC_CURSOR_HI 0x0E vga.h 　
21103
 CRTC_CURSOR_LOCRTC_CURSOR_LO 0x0F vga.h 　
21104
 CRTC_V_SYNC_STARTCRTC_V_SYNC_START 0x10 vga.h 　
21105
 CRTC_V_SYNC_ENDCRTC_V_SYNC_END 0x11 vga.h 　
21106
 CRTC_V_DISP_ENDCRTC_V_DISP_END 0x12 vga.h 　
21107
 CRTC_OFFSETCRTC_OFFSET 0x13 vga.h 　
21108
 CRTC_UNDERLINECRTC_UNDERLINE 0x14 vga.h 　
21109
 CRTC_V_BLANK_STARTCRTC_V_BLANK_START 0x15 vga.h 　
21110
 CRTC_V_BLANK_ENDCRTC_V_BLANK_END 0x16 vga.h 　
21111
 CRTC_MODECRTC_MODE 0x17 vga.h 　
21112
 CRTC_LINE_COMPARECRTC_LINE_COMPARE 0x18 vga.h 　
21113
 ATC_MODEATC_MODE 0x10 vga.h 　
21114
 ATC_OVERSCANATC_OVERSCAN 0x11 vga.h 　
21115
 ATC_PLANE_ENABLEATC_PLANE_ENABLE 0x12 vga.h 　
21116
 ATC_PELATC_PEL 0x13 vga.h 　
21117
 ATC_COLOR_PAGEATC_COLOR_PAGE 0x14 vga.h 　
21118
 SEQ_CLOCK_MODESEQ_CLOCK_MODE 0x01 vga.h 　
21119
 SEQ_PLANE_WRITESEQ_PLANE_WRITE 0x02 vga.h 　
21120
 SEQ_CHARACTER_MAPSEQ_CHARACTER_MAP 0x03 vga.h 　
21121
 SEQ_MEMORY_MODESEQ_MEMORY_MODE 0x04 vga.h 　
21122
 GDC_SR_VALUEGDC_SR_VALUE 0x00 vga.h 　
21123
 GDC_SR_ENABLEGDC_SR_ENABLE 0x01 vga.h 　
21124
 GDC_COMPARE_VALUEGDC_COMPARE_VALUE 0x02 vga.h 　
21125
 GDC_DATA_ROTATEGDC_DATA_ROTATE 0x03 vga.h 　
21126
 GDC_PLANE_READGDC_PLANE_READ 0x04 vga.h 　
21127
 GDC_MODEGDC_MODE 0x05 vga.h 　
21128
 GDC_MISCGDC_MISC 0x06 vga.h 　
21129
 GDC_COMPARE_MASKGDC_COMPARE_MASK 0x07 vga.h 　
21130
 GDC_BIT_MASKGDC_BIT_MASK 0x08 vga.h 　
21131
 VGA_ATTR_CLR_REDVGA_ATTR_CLR_RED 0x4 vga.h 　
21132
 VGA_ATTR_CLR_GRNVGA_ATTR_CLR_GRN 0x2 vga.h 　
21133
 VGA_ATTR_CLR_BLUVGA_ATTR_CLR_BLU 0x1 vga.h 　
21134
 VGA_ATTR_CLR_YELVGA_ATTR_CLR_YEL (VGA_ATTR_CLR_RED | VGA_ATTR_CLR_GRN) vga.h 　
21135
 VGA_ATTR_CLR_CYNVGA_ATTR_CLR_CYN (VGA_ATTR_CLR_GRN | VGA_ATTR_CLR_BLU) vga.h 　
21136
 VGA_ATTR_CLR_MAGVGA_ATTR_CLR_MAG (VGA_ATTR_CLR_BLU | VGA_ATTR_CLR_RED) vga.h 　
21137
 VGA_ATTR_CLR_BLKVGA_ATTR_CLR_BLK 0 vga.h 　
21138
 VGA_ATTR_CLR_WHTVGA_ATTR_CLR_WHT (VGA_ATTR_CLR_RED | VGA_ATTR_CLR_GRN | VGA_ATTR_CLR_BLU) vga.h 　
21139
 VGA_ATTR_BNKVGA_ATTR_BNK 0x80 vga.h 　
21140
 VGA_ATTR_ITNVGA_ATTR_ITN 0x08 vga.h 　
21141
 __asmcall__asmcall __attribute__ (( cdecl, regparm(0) )) compiler.h 　
21142
 __libgcc__libgcc __attribute__ (( cdecl )) compiler.h 　
21143
 X86_FEATURE_FPUX86_FEATURE_FPU 0 cpu.h Onboard FPU
21144
 X86_FEATURE_VMEX86_FEATURE_VME 1 cpu.h Virtual Mode Extensions
21145
 X86_FEATURE_DEX86_FEATURE_DE 2 cpu.h Debugging Extensions
21146
 X86_FEATURE_PSEX86_FEATURE_PSE 3 cpu.h Page Size Extensions
21147
 X86_FEATURE_TSCX86_FEATURE_TSC 4 cpu.h Time Stamp Counter
21148
 X86_FEATURE_MSRX86_FEATURE_MSR 5 cpu.h Model-Specific Registers, RDMSR, WRMSR
21149
 X86_FEATURE_PAEX86_FEATURE_PAE 6 cpu.h Physical Address Extensions
21150
 X86_FEATURE_MCEX86_FEATURE_MCE 7 cpu.h Machine Check Architecture
21151
 X86_FEATURE_CX8X86_FEATURE_CX8 8 cpu.h CMPXCHG8 instruction
21152
 X86_FEATURE_APICX86_FEATURE_APIC 9 cpu.h Onboard APIC
21153
 X86_FEATURE_SEPX86_FEATURE_SEP 11 cpu.h SYSENTER/SYSEXIT
21154
 X86_FEATURE_MTRRX86_FEATURE_MTRR 12 cpu.h Memory Type Range Registers
21155
 X86_FEATURE_PGEX86_FEATURE_PGE 13 cpu.h Page Global Enable
21156
 X86_FEATURE_MCAX86_FEATURE_MCA 14 cpu.h Machine Check Architecture
21157
 X86_FEATURE_CMOVX86_FEATURE_CMOV 15 cpu.h CMOV instruction (FCMOVCC and FCOMI too if FPU present)
21158
 X86_FEATURE_PATX86_FEATURE_PAT 16 cpu.h Page Attribute Table
21159
 X86_FEATURE_PSE36X86_FEATURE_PSE36 17 cpu.h 36-bit PSEs
21160
 X86_FEATURE_PNX86_FEATURE_PN 18 cpu.h Processor serial number
21161
 X86_FEATURE_CLFLSHX86_FEATURE_CLFLSH 19 cpu.h Supports the CLFLUSH instruction
21162
 X86_FEATURE_DTESX86_FEATURE_DTES 21 cpu.h Debug Trace Store
21163
 X86_FEATURE_ACPIX86_FEATURE_ACPI 22 cpu.h ACPI via MSR
21164
 X86_FEATURE_MMXX86_FEATURE_MMX 23 cpu.h Multimedia Extensions
21165
 X86_FEATURE_FXSRX86_FEATURE_FXSR 24 cpu.h FXSAVE and FXRSTOR instructions (fast save and restore
21166
 X86_FEATURE_XMMX86_FEATURE_XMM 25 cpu.h Streaming SIMD Extensions
21167
 X86_FEATURE_XMM2X86_FEATURE_XMM2 26 cpu.h Streaming SIMD Extensions-2
21168
 X86_FEATURE_SELFSNOOPX86_FEATURE_SELFSNOOP 27 cpu.h CPU self snoop
21169
 X86_FEATURE_HTX86_FEATURE_HT 28 cpu.h Hyper-Threading
21170
 X86_FEATURE_ACCX86_FEATURE_ACC 29 cpu.h Automatic clock control
21171
 X86_FEATURE_IA64X86_FEATURE_IA64 30 cpu.h IA-64 processor
21172
 X86_FEATURE_SYSCALLX86_FEATURE_SYSCALL 11 cpu.h SYSCALL/SYSRET
21173
 X86_FEATURE_MMXEXTX86_FEATURE_MMXEXT 22 cpu.h AMD MMX extensions
21174
 X86_FEATURE_LMX86_FEATURE_LM 29 cpu.h Long Mode (x86-64)
21175
 X86_FEATURE_3DNOWEXTX86_FEATURE_3DNOWEXT 30 cpu.h AMD 3DNow! extensions
21176
 X86_FEATURE_3DNOWX86_FEATURE_3DNOW 31 cpu.h 3DNow!
21177
 X86_EFLAGS_CFX86_EFLAGS_CF 0x00000001 cpu.h Carry Flag
21178
 X86_EFLAGS_PFX86_EFLAGS_PF 0x00000004 cpu.h Parity Flag
21179
 X86_EFLAGS_AFX86_EFLAGS_AF 0x00000010 cpu.h Auxillary carry Flag
21180
 X86_EFLAGS_ZFX86_EFLAGS_ZF 0x00000040 cpu.h Zero Flag
21181
 X86_EFLAGS_SFX86_EFLAGS_SF 0x00000080 cpu.h Sign Flag
21182
 X86_EFLAGS_TFX86_EFLAGS_TF 0x00000100 cpu.h Trap Flag
21183
 X86_EFLAGS_IFX86_EFLAGS_IF 0x00000200 cpu.h Interrupt Flag
21184
 X86_EFLAGS_DFX86_EFLAGS_DF 0x00000400 cpu.h Direction Flag
21185
 X86_EFLAGS_OFX86_EFLAGS_OF 0x00000800 cpu.h Overflow Flag
21186
 X86_EFLAGS_IOPLX86_EFLAGS_IOPL 0x00003000 cpu.h IOPL mask
21187
 X86_EFLAGS_NTX86_EFLAGS_NT 0x00004000 cpu.h Nested Task
21188
 X86_EFLAGS_RFX86_EFLAGS_RF 0x00010000 cpu.h Resume Flag
21189
 X86_EFLAGS_VMX86_EFLAGS_VM 0x00020000 cpu.h Virtual Mode
21190
 X86_EFLAGS_ACX86_EFLAGS_AC 0x00040000 cpu.h Alignment Check
21191
 X86_EFLAGS_VIFX86_EFLAGS_VIF 0x00080000 cpu.h Virtual Interrupt Flag
21192
 X86_EFLAGS_VIPX86_EFLAGS_VIP 0x00100000 cpu.h Virtual Interrupt Pending
21193
 X86_EFLAGS_IDX86_EFLAGS_ID 0x00200000 cpu.h CPUID detection flag
21194
 ELTORITO_PLATFORMELTORITO_PLATFORM ELTORITO_PLATFORM_X86 eltorito.h 　
21195
 __BYTE_ORDER__BYTE_ORDER __LITTLE_ENDIAN endian.h 　
21196
 ERRFILE_memtop_umallocERRFILE_memtop_umalloc ( ERRFILE_ARCH | ERRFILE_CORE | 0x00000000 ) errfile.h 　
21197
 ERRFILE_memmapERRFILE_memmap ( ERRFILE_ARCH | ERRFILE_CORE | 0x00010000 ) errfile.h 　
21198
 ERRFILE_pnpbiosERRFILE_pnpbios ( ERRFILE_ARCH | ERRFILE_CORE | 0x00020000 ) errfile.h 　
21199
 ERRFILE_bios_smbiosERRFILE_bios_smbios ( ERRFILE_ARCH | ERRFILE_CORE | 0x00030000 ) errfile.h 　
21200
 ERRFILE_biosintERRFILE_biosint ( ERRFILE_ARCH | ERRFILE_CORE | 0x00040000 ) errfile.h 　
21201
 ERRFILE_int13ERRFILE_int13 ( ERRFILE_ARCH | ERRFILE_CORE | 0x00050000 ) errfile.h 　
21202
 ERRFILE_pxeparentERRFILE_pxeparent ( ERRFILE_ARCH | ERRFILE_CORE | 0x00060000 ) errfile.h 　
21203
 ERRFILE_bootsectorERRFILE_bootsector ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00000000 ) errfile.h 　
21204
 ERRFILE_bzimageERRFILE_bzimage ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00010000 ) errfile.h 　
21205
 ERRFILE_eltoritoERRFILE_eltorito ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00020000 ) errfile.h 　
21206
 ERRFILE_multibootERRFILE_multiboot ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00030000 ) errfile.h 　
21207
 ERRFILE_nbiERRFILE_nbi ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00040000 ) errfile.h 　
21208
 ERRFILE_pxe_imageERRFILE_pxe_image ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00050000 ) errfile.h 　
21209
 ERRFILE_elfbootERRFILE_elfboot ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00060000 ) errfile.h 　
21210
 ERRFILE_combootERRFILE_comboot ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00070000 ) errfile.h 　
21211
 ERRFILE_com32ERRFILE_com32 ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00080000 ) errfile.h 　
21212
 ERRFILE_comboot_resolvERRFILE_comboot_resolv ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00090000 ) errfile.h 　
21213
 ERRFILE_comboot_callERRFILE_comboot_call ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x000a0000 ) errfile.h 　
21214
 ERRFILE_undiERRFILE_undi ( ERRFILE_ARCH | ERRFILE_NET | 0x00000000 ) errfile.h 　
21215
 ERRFILE_undiloadERRFILE_undiload ( ERRFILE_ARCH | ERRFILE_NET | 0x00010000 ) errfile.h 　
21216
 ERRFILE_undinetERRFILE_undinet ( ERRFILE_ARCH | ERRFILE_NET | 0x00020000 ) errfile.h 　
21217
 ERRFILE_undionlyERRFILE_undionly ( ERRFILE_ARCH | ERRFILE_NET | 0x00030000 ) errfile.h 　
21218
 ERRFILE_undiromERRFILE_undirom ( ERRFILE_ARCH | ERRFILE_NET | 0x00040000 ) errfile.h 　
21219
 ERRFILE_timer_rdtscERRFILE_timer_rdtsc ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00000000 ) errfile.h 　
21220
 ERRFILE_timer_biosERRFILE_timer_bios ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00010000 ) errfile.h 　
21221
 ABFT_SIGABFT_SIG "aBFT" abft.h 　
21222
 NAP_PREFIX_pcbiosNAP_PREFIX_pcbios __pcbios_ bios_nap.h 　
21223
 SMBIOS_PREFIX_pcbiosSMBIOS_PREFIX_pcbios __pcbios_ bios_smbios.h 　
21224
 TIMER_PREFIX_pcbiosTIMER_PREFIX_pcbios __pcbios_ bios_timer.h 　
21225
 IBFT_SIGIBFT_SIG "iBFT" ibft.h 　
21226
 IBFT_STRUCTURE_ID_CONTROLIBFT_STRUCTURE_ID_CONTROL 0x01 ibft.h 　
21227
 IBFT_FL_CONTROL_SINGLE_LOGIN_ONIBFT_FL_CONTROL_SINGLE_LOGIN_ON 0x01 ibft.h 　
21228
 IBFT_STRUCTURE_ID_INITIATORIBFT_STRUCTURE_ID_INITIATOR 0x02 ibft.h 　
21229
 IBFT_FL_INITIATOR_BLOCK_VALIDIBFT_FL_INITIATOR_BLOCK_VALID 0x01 ibft.h 　
21230
 IBFT_FL_INITIATOR_FIRMWARE_BOOTIBFT_FL_INITIATOR_FIRMWARE_BOOT 0x02 ibft.h 　
21231
 IBFT_STRUCTURE_ID_NICIBFT_STRUCTURE_ID_NIC 0x03 ibft.h 　
21232
 IBFT_FL_NIC_BLOCK_VALIDIBFT_FL_NIC_BLOCK_VALID 0x01 ibft.h 　
21233
 IBFT_FL_NIC_FIRMWARE_BOOT_SELECIBFT_FL_NIC_FIRMWARE_BOOT_SELEC 0x02 ibft.h 　
21234
 IBFT_FL_NIC_GLOBALIBFT_FL_NIC_GLOBAL 0x04 ibft.h 　
21235
 IBFT_STRUCTURE_ID_TARGETIBFT_STRUCTURE_ID_TARGET 0x04 ibft.h 　
21236
 IBFT_FL_TARGET_BLOCK_VALIDIBFT_FL_TARGET_BLOCK_VALID 0x01 ibft.h 　
21237
 IBFT_FL_TARGET_FIRMWARE_BOOT_SEIBFT_FL_TARGET_FIRMWARE_BOOT_SE 0x02 ibft.h 　
21238
 IBFT_FL_TARGET_USE_CHAPIBFT_FL_TARGET_USE_CHAP 0x04 ibft.h 　
21239
 IBFT_FL_TARGET_USE_RCHAPIBFT_FL_TARGET_USE_RCHAP 0x08 ibft.h 　
21240
 IBFT_CHAP_NONEIBFT_CHAP_NONE 0 ibft.h *< No CHAP authentication
21241
 IBFT_CHAP_ONE_WAYIBFT_CHAP_ONE_WAY 1 ibft.h *< One-way CHAP
21242
 IBFT_CHAP_MUTUALIBFT_CHAP_MUTUAL 2 ibft.h *< Mutual CHAP
21243
 IBFT_STRINGS_SIZEIBFT_STRINGS_SIZE 384 ibft.h 　
21244
 UMALLOC_PREFIX_memtopUMALLOC_PREFIX_memtop __memtop_ memtop_umalloc.h 　
21245
 TIMER_PREFIX_rdtscTIMER_PREFIX_rdtsc __rdtsc_ rdtsc_timer.h 　
21246
 TSC_SHIFTTSC_SHIFT 8 rdtsc_timer.h 　
21247
 SBFT_SIGSBFT_SIG "sBFT" sbft.h 　
21248
 IOAPI_PREFIX_x86IOAPI_PREFIX_x86 __x86_ x86_io.h 　
21249
 abftababftab __use_data16 ( abftab ) abft.c 　
21250
 ibftabibftab __use_data16 ( ibftab ) ibft.c 　
21251
 int13_vectorint13_vector __use_text16 ( int13_vector ) int13.c 　
21252
 EM_ALIGNEM_ALIGN ( 4 * 1024 ) memtop_umalloc.c 　
21253
 UNOWHEREUNOWHERE ( ~UNULL ) memtop_umalloc.c 　
21254
 sbftabsbftab __use_data16 ( sbftab ) sbft.c 　
21255
 pxe_int_1a_vectorpxe_int_1a_vector __use_text16 ( pxe_int_1a_vector ) pxe_call.c 　
21256
 pxe_exit_hookpxe_exit_hook __use_data16 ( pxe_exit_hook ) pxe_file.c 　
21257
 cached_infocached_info __use_data16 ( cached_info ) pxe_preboot.c 　
21258
 PXE_TFTP_URI_LENPXE_TFTP_URI_LEN 256 pxe_tftp.c 　
21259
 pxeparent_paramspxeparent_params __use_data16 ( pxeparent_params ) pxeparent.c 　
21260
 pxeparent_entry_pointpxeparent_entry_point __use_data16 ( pxeparent_entry_point ) pxeparent.c 　
21261
 com32_regscom32_regs __use_data16 ( com32_regs ) com32_call.c 　
21262
 com32_int_vectorcom32_int_vector __use_data16 ( com32_int_vector ) com32_call.c 　
21263
 com32_farcall_proccom32_farcall_proc __use_data16 ( com32_farcall_proc ) com32_call.c 　
21264
 syslinux_versionsyslinux_version __use_data16 ( syslinux_version ) comboot_call.c 　
21265
 syslinux_copyrightsyslinux_copyright __use_data16 ( syslinux_copyright ) comboot_call.c 　
21266
 syslinux_configuration_filesyslinux_configuration_file __use_data16 ( syslinux_configuration_file ) comboot_call.c 　
21267
 comboot_feature_flagscomboot_feature_flags __use_data16 ( comboot_feature_flags ) comboot_call.c 　
21268
 comboot_initial_regscomboot_initial_regs __use_text16 ( comboot_initial_regs ) comboot_call.c 　
21269
 int20_vectorint20_vector __use_text16 ( int20_vector ) comboot_call.c 　
21270
 int21_vectorint21_vector __use_text16 ( int21_vector ) comboot_call.c 　
21271
 int22_vectorint22_vector __use_text16 ( int22_vector ) comboot_call.c 　
21272
 PCIAPI_PREFIX_pcbiosPCIAPI_PREFIX_pcbios __pcbios_ pcibios.h 　
21273
 PCIBIOS_INSTALLATION_CHECKPCIBIOS_INSTALLATION_CHECK 0xb1010000 pcibios.h 　
21274
 PCIBIOS_READ_CONFIG_BYTEPCIBIOS_READ_CONFIG_BYTE 0xb1080000 pcibios.h 　
21275
 PCIBIOS_READ_CONFIG_WORDPCIBIOS_READ_CONFIG_WORD 0xb1090000 pcibios.h 　
21276
 PCIBIOS_READ_CONFIG_DWORDPCIBIOS_READ_CONFIG_DWORD 0xb10a0000 pcibios.h 　
21277
 PCIBIOS_WRITE_CONFIG_BYTEPCIBIOS_WRITE_CONFIG_BYTE 0xb10b0000 pcibios.h 　
21278
 PCIBIOS_WRITE_CONFIG_WORDPCIBIOS_WRITE_CONFIG_WORD 0xb10c0000 pcibios.h 　
21279
 PCIBIOS_WRITE_CONFIG_DWORDPCIBIOS_WRITE_CONFIG_DWORD 0xb10d0000 pcibios.h 　
21280
 PCIAPI_PREFIX_directPCIAPI_PREFIX_direct __direct_ pcidirect.h 　
21281
 PCIDIRECT_CONFIG_ADDRESSPCIDIRECT_CONFIG_ADDRESS 0xcf8 pcidirect.h 　
21282
 PCIDIRECT_CONFIG_DATAPCIDIRECT_CONFIG_DATA 0xcfc pcidirect.h 　
21283
 NAP_PREFIX_efix86NAP_PREFIX_efix86 __efix86_ efix86_nap.h 　
21284
 LIMITS_HLIMITS_H 1 limits.h 　
21285
 CHAR_BITCHAR_BIT 8 limits.h 　
21286
 SCHAR_MINSCHAR_MIN (-128) limits.h 　
21287
 SCHAR_MAXSCHAR_MAX 127 limits.h 　
21288
 UCHAR_MAXUCHAR_MAX 255 limits.h 　
21289
 CHAR_MINCHAR_MIN SCHAR_MIN limits.h 　
21290
 CHAR_MAXCHAR_MAX SCHAR_MAX limits.h 　
21291
 SHRT_MINSHRT_MIN (-32768) limits.h 　
21292
 SHRT_MAXSHRT_MAX 32767 limits.h 　
21293
 USHRT_MAXUSHRT_MAX 65535 limits.h 　
21294
 INT_MININT_MIN (-INT_MAX - 1) limits.h 　
21295
 INT_MAXINT_MAX 2147483647 limits.h 　
21296
 UINT_MAXUINT_MAX 4294967295U limits.h 　
21297
 INT_MAXINT_MAX 2147483647 limits.h 　
21298
 INT_MININT_MIN (-INT_MAX - 1) limits.h 　
21299
 UINT_MAXUINT_MAX 4294967295U limits.h 　
21300
 LONG_MAXLONG_MAX 9223372036854775807L limits.h 　
21301
 LONG_MINLONG_MIN (-LONG_MAX - 1L) limits.h 　
21302
 ULONG_MAXULONG_MAX 18446744073709551615UL limits.h 　
21303
 LLONG_MAXLLONG_MAX 9223372036854775807LL limits.h 　
21304
 LLONG_MINLLONG_MIN (-LONG_MAX - 1LL) limits.h 　
21305
 ULLONG_MAXULLONG_MAX 18446744073709551615ULL limits.h 　
21306
 __asmcall__asmcall __attribute__ (( regparm(0) )) compiler.h 　
21307
 __BYTE_ORDER__BYTE_ORDER __LITTLE_ENDIAN endian.h 　
21308
 BUILD_SERIAL_STRBUILD_SERIAL_STR " #" XSTR(BUILD_SERIAL_NUM) config.c 　
21309
 BUILD_SERIAL_STRBUILD_SERIAL_STR "" config.c 　
21310
 BUILD_ID_STRBUILD_ID_STR " " BUILD_ID config.c 　
21311
 BUILD_ID_STRBUILD_ID_STR "" config.c 　
21312
 BUILD_STRINGBUILD_STRING " [build" BUILD_ID_STR BUILD_SERIAL_STR "]" config.c 　
21313
 BUILD_STRINGBUILD_STRING "" config.c 　
21314
 PRODUCT_NAMEPRODUCT_NAME "" general.h 　
21315
 PRODUCT_SHORT_NAMEPRODUCT_SHORT_NAME "gPXE" general.h 　
21316
 BANNER_TIMEOUTBANNER_TIMEOUT 20 general.h Tenths of a second for which the shell
21317
 COM1COM1 0x3f8 serial.h 　
21318
 COM2COM2 0x2f8 serial.h 　
21319
 COM3COM3 0x3e8 serial.h 　
21320
 COM4COM4 0x2e8 serial.h 　
21321
 COMCONSOLECOMCONSOLE COM1 serial.h I/O port address
21322
 COMSPEEDCOMSPEED 115200 serial.h Baud rate
21323
 COMDATACOMDATA 8 serial.h Data bits
21324
 COMPARITYCOMPARITY 0 serial.h Parity: 0=None, 1=Odd, 2=Even
21325
 COMSTOPCOMSTOP 1 serial.h Stop bits
21326
 CHAR_256CHAR_256 0 btext.c 　
21327
 cmapszcmapsz (16*256) btext.c 　
21328
 cmapszcmapsz (16*96) btext.c 　
21329
 GUARD_SYMBOLGUARD_SYMBOL ( ( 'M' << 24 ) | ( 'I' << 16 ) | ( 'N' << 8 ) | 'E' ) debug.c 　
21330
 NUM_AUTO_COLOURSNUM_AUTO_COLOURS 6 debug.c 　
21331
 GETKEY_TIMEOUTGETKEY_TIMEOUT ( TICKS_PER_SEC / 4 ) getkey.c 　
21332
 IS_VADEMIS_VADEM 0x0001 i82365.c 　
21333
 IS_CIRRUSIS_CIRRUS 0x0002 i82365.c 　
21334
 IS_TIIS_TI 0x0004 i82365.c 　
21335
 IS_O2MICROIS_O2MICRO 0x0008 i82365.c 　
21336
 IS_VIAIS_VIA 0x0010 i82365.c 　
21337
 IS_TOPICIS_TOPIC 0x0020 i82365.c 　
21338
 IS_RICOHIS_RICOH 0x0040 i82365.c 　
21339
 IS_UNKNOWNIS_UNKNOWN 0x0400 i82365.c 　
21340
 IS_VG_PWRIS_VG_PWR 0x0800 i82365.c 　
21341
 IS_DF_PWRIS_DF_PWR 0x1000 i82365.c 　
21342
 IS_PCIIS_PCI 0x2000 i82365.c 　
21343
 IS_ALIVEIS_ALIVE 0x8000 i82365.c 　
21344
 NORMALNORMAL "\033[0m" main.c 　
21345
 BOLDBOLD "\033[1m" main.c 　
21346
 CYANCYAN "\033[36m" main.c 　
21347
 MIN_MEMBLOCK_SIZEMIN_MEMBLOCK_SIZE ( ( size_t ) ( 1 << ( fls ( sizeof ( struct memory_block ) - 1 ) ) ) ) malloc.c 　
21348
 NOWHERENOWHERE ( ( void * ) ~( ( intptr_t ) 0 ) ) malloc.c 　
21349
 HEAP_SIZEHEAP_SIZE ( 128 * 1024 ) malloc.c 　
21350
 CODE_STATUSCODE_STATUS "alpha" pcmcia.c 　
21351
 CODE_VERSIONCODE_VERSION "0.1.3" pcmcia.c 　
21352
 NUM_DRIVERSNUM_DRIVERS (sizeof(driver)/(sizeof(struct driver_interact_t))) pcmcia.c 　
21353
 SHIFTSHIFT 1 pc_kbd.c 　
21354
 CONTROLCONTROL 2 pc_kbd.c 　
21355
 CAPSCAPS 4 pc_kbd.c 　
21356
 LACP_DEBUGLACP_DEBUG 0 proto_eth_slow.c 　
21357
 SLOW_DST_MACSLOW_DST_MAC "\x01\x80\xc2\x00\x00\x02" proto_eth_slow.c 　
21358
 SLOW_SUBTYPE_LACPSLOW_SUBTYPE_LACP 1 proto_eth_slow.c 　
21359
 SLOW_SUBTYPE_MARKERSLOW_SUBTYPE_MARKER 2 proto_eth_slow.c 　
21360
 LACP_CMP_LENLACP_CMP_LEN (2 + 6 + 2 + 2 + 2) proto_eth_slow.c 　
21361
 LACP_CP_LENLACP_CP_LEN (2 + 6 + 2 + 2 + 2 + 1) proto_eth_slow.c 　
21362
 FAST_PERIODIC_TIMEFAST_PERIODIC_TIME (1*TICKS_PER_SEC) proto_eth_slow.c 　
21363
 SLOW_PERIODIC_TIMESLOW_PERIODIC_TIME (30*TICKS_PER_SEC) proto_eth_slow.c 　
21364
 SHORT_TIMEOUT_TIMESHORT_TIMEOUT_TIME (3*FAST_PERIODIC_TIME) proto_eth_slow.c 　
21365
 LONG_TIMEOUT_TIMELONG_TIMEOUT_TIME (3*SLOW_PERIODIC_TIME) proto_eth_slow.c 　
21366
 CHURN_DETECTION_TIMECHURN_DETECTION_TIME (60*TICKS_PER_SEC) proto_eth_slow.c 　
21367
 AGGREGATE_WAIT_TIMEAGGREGATE_WAIT_TIME (2*TICKS_PER_SEC) proto_eth_slow.c 　
21368
 LACP_ACTIVITYLACP_ACTIVITY (1 << 0) proto_eth_slow.c 　
21369
 LACP_TIMEOUTLACP_TIMEOUT (1 << 1) proto_eth_slow.c 　
21370
 LACP_AGGREGATIONLACP_AGGREGATION (1 << 2) proto_eth_slow.c 　
21371
 LACP_SYNCHRONIZATIONLACP_SYNCHRONIZATION (1 << 3) proto_eth_slow.c 　
21372
 LACP_COLLECTINGLACP_COLLECTING (1 << 4) proto_eth_slow.c 　
21373
 LACP_DISTRIBUTINGLACP_DISTRIBUTING (1 << 5) proto_eth_slow.c 　
21374
 LACP_DEFAULTEDLACP_DEFAULTED (1 << 6) proto_eth_slow.c 　
21375
 LACP_EXPIREDLACP_EXPIRED (1 << 7) proto_eth_slow.c 　
21376
 UNSELECTEDUNSELECTED 0 proto_eth_slow.c 　
21377
 STANDBYSTANDBY 1 proto_eth_slow.c 　
21378
 SELECTEDSELECTED 2 proto_eth_slow.c 　
21379
 LACP_NTT_MASKLACP_NTT_MASK (LACP_ACTIVITY | LACP_TIMEOUT | \ LACP_SYNCHRONIZATION | LACP_AGGREGATION) proto_eth_slow.c 　
21380
 COMCONSOLECOMCONSOLE 0x3f8 serial.c 　
21381
 COMSPEEDCOMSPEED 9600 serial.c 　
21382
 COMDATACOMDATA 8 serial.c 　
21383
 COMPARITYCOMPARITY 0 serial.c 　
21384
 COMSTOPCOMSTOP 1 serial.c 　
21385
 UART_BASEUART_BASE ( COMCONSOLE ) serial.c 　
21386
 UART_BAUDUART_BAUD ( COMSPEED ) serial.c 　
21387
 COMBRDCOMBRD (115200/UART_BAUD) serial.c 　
21388
 UART_LCSUART_LCS ( ( ( (COMDATA) - 5 ) << 0 ) | \ ( ( (COMPARITY) ) << 3 ) | \ ( ( (COMSTOP) - 1 ) << 2 ) ) serial.c 　
21389
 UART_RBRUART_RBR 0x00 serial.c 　
21390
 UART_TBRUART_TBR 0x00 serial.c 　
21391
 UART_IERUART_IER 0x01 serial.c 　
21392
 UART_IIRUART_IIR 0x02 serial.c 　
21393
 UART_FCRUART_FCR 0x02 serial.c 　
21394
 UART_LCRUART_LCR 0x03 serial.c 　
21395
 UART_MCRUART_MCR 0x04 serial.c 　
21396
 UART_DLLUART_DLL 0x00 serial.c 　
21397
 UART_DLMUART_DLM 0x01 serial.c 　
21398
 UART_LSRUART_LSR 0x05 serial.c 　
21399
 UART_LSR_TEMPTUART_LSR_TEMPT 0x40 serial.c Transmitter empty
21400
 UART_LSR_THREUART_LSR_THRE 0x20 serial.c Transmit-hold-register empty
21401
 UART_LSR_BIUART_LSR_BI 0x10 serial.c Break interrupt indicator
21402
 UART_LSR_FEUART_LSR_FE 0x08 serial.c Frame error indicator
21403
 UART_LSR_PEUART_LSR_PE 0x04 serial.c Parity error indicator
21404
 UART_LSR_OEUART_LSR_OE 0x02 serial.c Overrun error indicator
21405
 UART_LSR_DRUART_LSR_DR 0x01 serial.c Receiver data ready
21406
 UART_MSRUART_MSR 0x06 serial.c 　
21407
 UART_SCRUART_SCR 0x07 serial.c 　
21408
 settings_rootsettings_root generic_settings_root.settings settings.c 　
21409
 CHAR_LENCHAR_LEN 0 vsprintf.c *< "hh" length modifier
21410
 SHORT_LENSHORT_LEN 1 vsprintf.c *< "h" length modifier
21411
 INT_LENINT_LEN 2 vsprintf.c *< no length modifier
21412
 LONG_LENLONG_LEN 3 vsprintf.c *< "l" length modifier
21413
 LONGLONG_LENLONGLONG_LEN 4 vsprintf.c *< "ll" length modifier
21414
 SIZE_T_LENSIZE_T_LEN 5 vsprintf.c *< "z" length modifier
21415
 LCASELCASE 0x20 vsprintf.c 　
21416
 ALT_FORMALT_FORM 0x02 vsprintf.c 　
21417
 CRCPOLYCRCPOLY 0xedb88320 crc32.c 　
21418
 mtmt 0x80808080 aes.c 　
21419
 mlml 0x7f7f7f7f aes.c 　
21420
 mhmh 0xfefefefe aes.c 　
21421
 mmmm 0x1b1b1b1b aes.c 　
21422
 BIGINT_M_OFFSETBIGINT_M_OFFSET 0 bigint_impl.h *< Normal modulo offset.
21423
 BIGINT_P_OFFSETBIGINT_P_OFFSET 1 bigint_impl.h *< p modulo offset.
21424
 BIGINT_Q_OFFSETBIGINT_Q_OFFSET 2 bigint_impl.h *< q module offset.
21425
 BIGINT_NUM_MODSBIGINT_NUM_MODS 3 bigint_impl.h *< The number of modulus constants used.
21426
 BIGINT_NUM_MODSBIGINT_NUM_MODS 1 bigint_impl.h 　
21427
 COMP_RADIXCOMP_RADIX 4294967296i64 bigint_impl.h 　
21428
 COMP_BIG_MSBCOMP_BIG_MSB 0x8000000000000000i64 bigint_impl.h 　
21429
 COMP_RADIXCOMP_RADIX 4294967296ULL bigint_impl.h *< Max component + 1
21430
 COMP_BIG_MSBCOMP_BIG_MSB 0x8000000000000000ULL bigint_impl.h *< (Max dbl comp + 1)/ 2
21431
 COMP_BIT_SIZECOMP_BIT_SIZE 32 bigint_impl.h *< Number of bits in a component.
21432
 COMP_BYTE_SIZECOMP_BYTE_SIZE 4 bigint_impl.h *< Number of bytes in a component.
21433
 COMP_NUM_NIBBLESCOMP_NUM_NIBBLES 8 bigint_impl.h *< Used For diagnostics only.
21434
 PERMANENTPERMANENT 0x7FFF55AA bigint_impl.h *< A magic number for permanents.
21435
 V1V1 v->comps[v->size-1] bigint_impl.h *< v1 for division
21436
 V2V2 v->comps[v->size-2] bigint_impl.h *< v2 for division
21437
 CONFIG_SSL_CERT_VERIFICATIONCONFIG_SSL_CERT_VERIFICATION 1 os_port.h 　
21438
 CONFIG_SSL_MAX_CERTSCONFIG_SSL_MAX_CERTS 1 os_port.h 　
21439
 CONFIG_X509_MAX_CA_CERTSCONFIG_X509_MAX_CA_CERTS 1 os_port.h 　
21440
 CONFIG_SSL_EXPIRY_TIMECONFIG_SSL_EXPIRY_TIME 24 os_port.h 　
21441
 CONFIG_SSL_ENABLE_CLIENTCONFIG_SSL_ENABLE_CLIENT 1 os_port.h 　
21442
 CONFIG_BIGINT_CLASSICALCONFIG_BIGINT_CLASSICAL 1 os_port.h 　
21443
 SELECT_SLAVESELECT_SLAVE 0 spi_bit.c 　
21444
 DESELECT_SLAVEDESELECT_SLAVE SPI_MODE_SSPOL spi_bit.c 　
21445
 SCSI_MAX_DUMMY_READ_CAPSCSI_MAX_DUMMY_READ_CAP 10 scsi.c 　
21446
 ISA_EXTRA_PROBE_ADDR_COUNTISA_EXTRA_PROBE_ADDR_COUNT ( sizeof ( isa_extra_probe_addrs ) / sizeof ( isa_extra_probe_addrs[0] ) ) isa.c 　
21447
 ISAPNP_CARD_ID_FMTISAPNP_CARD_ID_FMT "ID %04x:%04x (\"%s\") serial %x" isapnp.c 　
21448
 ISAPNP_DEV_ID_FMTISAPNP_DEV_ID_FMT "ID %04x:%04x (\"%s\")" isapnp.c 　
21449
 LINDA_SEND_BUF_TOGGLELINDA_SEND_BUF_TOGGLE 0x80 linda.c 　
21450
 LINDA_EPB_ALL_CHANNELSLINDA_EPB_ALL_CHANNELS 31 linda.c 　
21451
 LINDA_SERDES_PARAM_ENDLINDA_SERDES_PARAM_END { 0, 0, 0 } linda.c 　
21452
 ARBEL_NUM_PORTSARBEL_NUM_PORTS 2 arbel.h 　
21453
 ARBEL_PORT_BASEARBEL_PORT_BASE 1 arbel.h 　
21454
 ARBEL_PCI_CONFIG_BARARBEL_PCI_CONFIG_BAR PCI_BASE_ADDRESS_0 arbel.h 　
21455
 ARBEL_PCI_CONFIG_BAR_SIZEARBEL_PCI_CONFIG_BAR_SIZE 0x100000 arbel.h 　
21456
 ARBEL_PCI_UAR_BARARBEL_PCI_UAR_BAR PCI_BASE_ADDRESS_2 arbel.h 　
21457
 ARBEL_PCI_UAR_IDXARBEL_PCI_UAR_IDX 1 arbel.h 　
21458
 ARBEL_PCI_UAR_SIZEARBEL_PCI_UAR_SIZE 0x1000 arbel.h 　
21459
 ARBEL_UAR_RES_NONEARBEL_UAR_RES_NONE 0x00 arbel.h 　
21460
 ARBEL_UAR_RES_CQ_CIARBEL_UAR_RES_CQ_CI 0x01 arbel.h 　
21461
 ARBEL_UAR_RES_CQ_ARMARBEL_UAR_RES_CQ_ARM 0x02 arbel.h 　
21462
 ARBEL_UAR_RES_SQARBEL_UAR_RES_SQ 0x03 arbel.h 　
21463
 ARBEL_UAR_RES_RQARBEL_UAR_RES_RQ 0x04 arbel.h 　
21464
 ARBEL_UAR_RES_GROUP_SEPARBEL_UAR_RES_GROUP_SEP 0x07 arbel.h 　
21465
 ARBEL_OPCODE_SENDARBEL_OPCODE_SEND 0x0a arbel.h 　
21466
 ARBEL_OPCODE_RECV_ERRORARBEL_OPCODE_RECV_ERROR 0xfe arbel.h 　
21467
 ARBEL_OPCODE_SEND_ERRORARBEL_OPCODE_SEND_ERROR 0xff arbel.h 　
21468
 ARBEL_HCR_QUERY_DEV_LIMARBEL_HCR_QUERY_DEV_LIM 0x0003 arbel.h 　
21469
 ARBEL_HCR_QUERY_FWARBEL_HCR_QUERY_FW 0x0004 arbel.h 　
21470
 ARBEL_HCR_INIT_HCAARBEL_HCR_INIT_HCA 0x0007 arbel.h 　
21471
 ARBEL_HCR_CLOSE_HCAARBEL_HCR_CLOSE_HCA 0x0008 arbel.h 　
21472
 ARBEL_HCR_INIT_IBARBEL_HCR_INIT_IB 0x0009 arbel.h 　
21473
 ARBEL_HCR_CLOSE_IBARBEL_HCR_CLOSE_IB 0x000a arbel.h 　
21474
 ARBEL_HCR_SW2HW_MPTARBEL_HCR_SW2HW_MPT 0x000d arbel.h 　
21475
 ARBEL_HCR_MAP_EQARBEL_HCR_MAP_EQ 0x0012 arbel.h 　
21476
 ARBEL_HCR_SW2HW_EQARBEL_HCR_SW2HW_EQ 0x0013 arbel.h 　
21477
 ARBEL_HCR_HW2SW_EQARBEL_HCR_HW2SW_EQ 0x0014 arbel.h 　
21478
 ARBEL_HCR_SW2HW_CQARBEL_HCR_SW2HW_CQ 0x0016 arbel.h 　
21479
 ARBEL_HCR_HW2SW_CQARBEL_HCR_HW2SW_CQ 0x0017 arbel.h 　
21480
 ARBEL_HCR_RST2INIT_QPEEARBEL_HCR_RST2INIT_QPEE 0x0019 arbel.h 　
21481
 ARBEL_HCR_INIT2RTR_QPEEARBEL_HCR_INIT2RTR_QPEE 0x001a arbel.h 　
21482
 ARBEL_HCR_RTR2RTS_QPEEARBEL_HCR_RTR2RTS_QPEE 0x001b arbel.h 　
21483
 ARBEL_HCR_RTS2RTS_QPEEARBEL_HCR_RTS2RTS_QPEE 0x001c arbel.h 　
21484
 ARBEL_HCR_2RST_QPEEARBEL_HCR_2RST_QPEE 0x0021 arbel.h 　
21485
 ARBEL_HCR_MAD_IFCARBEL_HCR_MAD_IFC 0x0024 arbel.h 　
21486
 ARBEL_HCR_READ_MGMARBEL_HCR_READ_MGM 0x0025 arbel.h 　
21487
 ARBEL_HCR_WRITE_MGMARBEL_HCR_WRITE_MGM 0x0026 arbel.h 　
21488
 ARBEL_HCR_MGID_HASHARBEL_HCR_MGID_HASH 0x0027 arbel.h 　
21489
 ARBEL_HCR_RUN_FWARBEL_HCR_RUN_FW 0x0ff6 arbel.h 　
21490
 ARBEL_HCR_DISABLE_LAMARBEL_HCR_DISABLE_LAM 0x0ff7 arbel.h 　
21491
 ARBEL_HCR_ENABLE_LAMARBEL_HCR_ENABLE_LAM 0x0ff8 arbel.h 　
21492
 ARBEL_HCR_UNMAP_ICMARBEL_HCR_UNMAP_ICM 0x0ff9 arbel.h 　
21493
 ARBEL_HCR_MAP_ICMARBEL_HCR_MAP_ICM 0x0ffa arbel.h 　
21494
 ARBEL_HCR_UNMAP_ICM_AUXARBEL_HCR_UNMAP_ICM_AUX 0x0ffb arbel.h 　
21495
 ARBEL_HCR_MAP_ICM_AUXARBEL_HCR_MAP_ICM_AUX 0x0ffc arbel.h 　
21496
 ARBEL_HCR_SET_ICM_SIZEARBEL_HCR_SET_ICM_SIZE 0x0ffd arbel.h 　
21497
 ARBEL_HCR_UNMAP_FAARBEL_HCR_UNMAP_FA 0x0ffe arbel.h 　
21498
 ARBEL_HCR_MAP_FAARBEL_HCR_MAP_FA 0x0fff arbel.h 　
21499
 ARBEL_ST_UDARBEL_ST_UD 0x03 arbel.h 　
21500
 ARBEL_MTU_2048ARBEL_MTU_2048 0x04 arbel.h 　
21501
 ARBEL_NO_EQARBEL_NO_EQ 64 arbel.h 　
21502
 ARBEL_INVALID_LKEYARBEL_INVALID_LKEY 0x00000100UL arbel.h 　
21503
 ARBEL_PAGE_SIZEARBEL_PAGE_SIZE 4096 arbel.h 　
21504
 ARBEL_DB_POST_SND_OFFSETARBEL_DB_POST_SND_OFFSET 0x10 arbel.h 　
21505
 ARBEL_QPEE_OPT_PARAM_QKEYARBEL_QPEE_OPT_PARAM_QKEY 0x00000020UL arbel.h 　
21506
 ARBEL_MAP_EQARBEL_MAP_EQ ( 0UL << 31 ) arbel.h 　
21507
 ARBEL_UNMAP_EQARBEL_UNMAP_EQ ( 1UL << 31 ) arbel.h 　
21508
 ARBEL_EV_PORT_STATE_CHANGEARBEL_EV_PORT_STATE_CHANGE 0x09 arbel.h 　
21509
 ARBEL_MAX_GATHERARBEL_MAX_GATHER 1 arbel.h 　
21510
 ARBEL_MAX_SCATTERARBEL_MAX_SCATTER 1 arbel.h 　
21511
 ARBEL_SEND_WQE_ALIGNARBEL_SEND_WQE_ALIGN 128 arbel.h 　
21512
 ARBEL_RECV_WQE_ALIGNARBEL_RECV_WQE_ALIGN 64 arbel.h 　
21513
 ARBEL_MAX_QPSARBEL_MAX_QPS 8 arbel.h 　
21514
 ARBEL_QPN_BASEARBEL_QPN_BASE 0x550000 arbel.h 　
21515
 ARBEL_MAX_CQSARBEL_MAX_CQS 8 arbel.h 　
21516
 ARBEL_MAX_EQSARBEL_MAX_EQS 64 arbel.h 　
21517
 ARBEL_NUM_EQESARBEL_NUM_EQES 4 arbel.h 　
21518
 ARBEL_GLOBAL_PDARBEL_GLOBAL_PD 0x123456 arbel.h 　
21519
 ARBEL_MKEY_PREFIXARBEL_MKEY_PREFIX 0x77000000UL arbel.h 　
21520
 ARBEL_HCR_BASEARBEL_HCR_BASE 0x80680 arbel.h 　
21521
 ARBEL_HCR_MAX_WAIT_MSARBEL_HCR_MAX_WAIT_MS 2000 arbel.h 　
21522
 ARBEL_MBOX_ALIGNARBEL_MBOX_ALIGN 4096 arbel.h 　
21523
 ARBEL_MBOX_SIZEARBEL_MBOX_SIZE 512 arbel.h 　
21524
 ARBEL_HCR_IN_MBOXARBEL_HCR_IN_MBOX 0x00001000UL arbel.h 　
21525
 ARBEL_HCR_OUT_MBOXARBEL_HCR_OUT_MBOX 0x00002000UL arbel.h 　
21526
 ARBEL_MAX_DOORBELL_RECORDSARBEL_MAX_DOORBELL_RECORDS 512 arbel.h 　
21527
 ARBEL_GROUP_SEPARATOR_DOORBELLARBEL_GROUP_SEPARATOR_DOORBELL ( ARBEL_MAX_CQS + ARBEL_MAX_QPS ) arbel.h 　
21528
 HERMON_MAX_PORTSHERMON_MAX_PORTS 2 hermon.h 　
21529
 HERMON_PORT_BASEHERMON_PORT_BASE 1 hermon.h 　
21530
 HERMON_PCI_CONFIG_BARHERMON_PCI_CONFIG_BAR PCI_BASE_ADDRESS_0 hermon.h 　
21531
 HERMON_PCI_CONFIG_BAR_SIZEHERMON_PCI_CONFIG_BAR_SIZE 0x100000 hermon.h 　
21532
 HERMON_PCI_UAR_BARHERMON_PCI_UAR_BAR PCI_BASE_ADDRESS_2 hermon.h 　
21533
 HERMON_RESET_OFFSETHERMON_RESET_OFFSET 0x0f0010 hermon.h 　
21534
 HERMON_RESET_MAGICHERMON_RESET_MAGIC 0x01000000UL hermon.h 　
21535
 HERMON_RESET_WAIT_TIME_MSHERMON_RESET_WAIT_TIME_MS 1000 hermon.h 　
21536
 HERMON_OPCODE_NOPHERMON_OPCODE_NOP 0x00 hermon.h 　
21537
 HERMON_OPCODE_SENDHERMON_OPCODE_SEND 0x0a hermon.h 　
21538
 HERMON_OPCODE_RECV_ERRORHERMON_OPCODE_RECV_ERROR 0xfe hermon.h 　
21539
 HERMON_OPCODE_SEND_ERRORHERMON_OPCODE_SEND_ERROR 0xff hermon.h 　
21540
 HERMON_HCR_QUERY_DEV_CAPHERMON_HCR_QUERY_DEV_CAP 0x0003 hermon.h 　
21541
 HERMON_HCR_QUERY_FWHERMON_HCR_QUERY_FW 0x0004 hermon.h 　
21542
 HERMON_HCR_INIT_HCAHERMON_HCR_INIT_HCA 0x0007 hermon.h 　
21543
 HERMON_HCR_CLOSE_HCAHERMON_HCR_CLOSE_HCA 0x0008 hermon.h 　
21544
 HERMON_HCR_INIT_PORTHERMON_HCR_INIT_PORT 0x0009 hermon.h 　
21545
 HERMON_HCR_CLOSE_PORTHERMON_HCR_CLOSE_PORT 0x000a hermon.h 　
21546
 HERMON_HCR_SW2HW_MPTHERMON_HCR_SW2HW_MPT 0x000d hermon.h 　
21547
 HERMON_HCR_WRITE_MTTHERMON_HCR_WRITE_MTT 0x0011 hermon.h 　
21548
 HERMON_HCR_MAP_EQHERMON_HCR_MAP_EQ 0x0012 hermon.h 　
21549
 HERMON_HCR_SW2HW_EQHERMON_HCR_SW2HW_EQ 0x0013 hermon.h 　
21550
 HERMON_HCR_HW2SW_EQHERMON_HCR_HW2SW_EQ 0x0014 hermon.h 　
21551
 HERMON_HCR_QUERY_EQHERMON_HCR_QUERY_EQ 0x0015 hermon.h 　
21552
 HERMON_HCR_SW2HW_CQHERMON_HCR_SW2HW_CQ 0x0016 hermon.h 　
21553
 HERMON_HCR_HW2SW_CQHERMON_HCR_HW2SW_CQ 0x0017 hermon.h 　
21554
 HERMON_HCR_RST2INIT_QPHERMON_HCR_RST2INIT_QP 0x0019 hermon.h 　
21555
 HERMON_HCR_INIT2RTR_QPHERMON_HCR_INIT2RTR_QP 0x001a hermon.h 　
21556
 HERMON_HCR_RTR2RTS_QPHERMON_HCR_RTR2RTS_QP 0x001b hermon.h 　
21557
 HERMON_HCR_RTS2RTS_QPHERMON_HCR_RTS2RTS_QP 0x001c hermon.h 　
21558
 HERMON_HCR_2RST_QPHERMON_HCR_2RST_QP 0x0021 hermon.h 　
21559
 HERMON_HCR_QUERY_QPHERMON_HCR_QUERY_QP 0x0022 hermon.h 　
21560
 HERMON_HCR_CONF_SPECIAL_QPHERMON_HCR_CONF_SPECIAL_QP 0x0023 hermon.h 　
21561
 HERMON_HCR_MAD_IFCHERMON_HCR_MAD_IFC 0x0024 hermon.h 　
21562
 HERMON_HCR_READ_MCGHERMON_HCR_READ_MCG 0x0025 hermon.h 　
21563
 HERMON_HCR_WRITE_MCGHERMON_HCR_WRITE_MCG 0x0026 hermon.h 　
21564
 HERMON_HCR_MGID_HASHHERMON_HCR_MGID_HASH 0x0027 hermon.h 　
21565
 HERMON_HCR_SENSE_PORTHERMON_HCR_SENSE_PORT 0x004d hermon.h 　
21566
 HERMON_HCR_RUN_FWHERMON_HCR_RUN_FW 0x0ff6 hermon.h 　
21567
 HERMON_HCR_DISABLE_LAMHERMON_HCR_DISABLE_LAM 0x0ff7 hermon.h 　
21568
 HERMON_HCR_ENABLE_LAMHERMON_HCR_ENABLE_LAM 0x0ff8 hermon.h 　
21569
 HERMON_HCR_UNMAP_ICMHERMON_HCR_UNMAP_ICM 0x0ff9 hermon.h 　
21570
 HERMON_HCR_MAP_ICMHERMON_HCR_MAP_ICM 0x0ffa hermon.h 　
21571
 HERMON_HCR_UNMAP_ICM_AUXHERMON_HCR_UNMAP_ICM_AUX 0x0ffb hermon.h 　
21572
 HERMON_HCR_MAP_ICM_AUXHERMON_HCR_MAP_ICM_AUX 0x0ffc hermon.h 　
21573
 HERMON_HCR_SET_ICM_SIZEHERMON_HCR_SET_ICM_SIZE 0x0ffd hermon.h 　
21574
 HERMON_HCR_UNMAP_FAHERMON_HCR_UNMAP_FA 0x0ffe hermon.h 　
21575
 HERMON_HCR_MAP_FAHERMON_HCR_MAP_FA 0x0fff hermon.h 　
21576
 HERMON_ST_RCHERMON_ST_RC 0x00 hermon.h 　
21577
 HERMON_ST_UDHERMON_ST_UD 0x03 hermon.h 　
21578
 HERMON_ST_MLXHERMON_ST_MLX 0x07 hermon.h 　
21579
 HERMON_MTU_2048HERMON_MTU_2048 0x04 hermon.h 　
21580
 HERMON_INVALID_LKEYHERMON_INVALID_LKEY 0x00000100UL hermon.h 　
21581
 HERMON_PAGE_SIZEHERMON_PAGE_SIZE 4096 hermon.h 　
21582
 HERMON_DB_POST_SND_OFFSETHERMON_DB_POST_SND_OFFSET 0x14 hermon.h 　
21583
 HERMON_QP_OPT_PARAM_PM_STATEHERMON_QP_OPT_PARAM_PM_STATE 0x00000400UL hermon.h 　
21584
 HERMON_QP_OPT_PARAM_QKEYHERMON_QP_OPT_PARAM_QKEY 0x00000020UL hermon.h 　
21585
 HERMON_QP_OPT_PARAM_ALT_PATHHERMON_QP_OPT_PARAM_ALT_PATH 0x00000001UL hermon.h 　
21586
 HERMON_MAP_EQHERMON_MAP_EQ ( 0UL << 31 ) hermon.h 　
21587
 HERMON_UNMAP_EQHERMON_UNMAP_EQ ( 1UL << 31 ) hermon.h 　
21588
 HERMON_EV_PORT_STATE_CHANGEHERMON_EV_PORT_STATE_CHANGE 0x09 hermon.h 　
21589
 HERMON_SCHED_QP0HERMON_SCHED_QP0 0x3f hermon.h 　
21590
 HERMON_SCHED_DEFAULTHERMON_SCHED_DEFAULT 0x83 hermon.h 　
21591
 HERMON_PM_STATE_ARMEDHERMON_PM_STATE_ARMED 0x00 hermon.h 　
21592
 HERMON_PM_STATE_REARMHERMON_PM_STATE_REARM 0x01 hermon.h 　
21593
 HERMON_PM_STATE_MIGRATEDHERMON_PM_STATE_MIGRATED 0x03 hermon.h 　
21594
 HERMON_RETRY_MAXHERMON_RETRY_MAX 0x07 hermon.h 　
21595
 HERMON_PORT_TYPE_IBHERMON_PORT_TYPE_IB 1 hermon.h 　
21596
 HERMON_MAX_GATHERHERMON_MAX_GATHER 2 hermon.h 　
21597
 HERMON_MAX_SCATTERHERMON_MAX_SCATTER 1 hermon.h 　
21598
 HERMON_CMPT_MAX_ENTRIESHERMON_CMPT_MAX_ENTRIES ( 1 << 24 ) hermon.h 　
21599
 HERMON_UAR_NON_EQ_PAGEHERMON_UAR_NON_EQ_PAGE 128 hermon.h 　
21600
 HERMON_MAX_MTTSHERMON_MAX_MTTS 64 hermon.h 　
21601
 HERMON_SEND_WQE_ALIGNHERMON_SEND_WQE_ALIGN 128 hermon.h 　
21602
 HERMON_RECV_WQE_ALIGNHERMON_RECV_WQE_ALIGN 16 hermon.h 　
21603
 HERMON_NUM_SPECIAL_QPSHERMON_NUM_SPECIAL_QPS 8 hermon.h 　
21604
 HERMON_RSVD_SPECIAL_QPSHERMON_RSVD_SPECIAL_QPS ( ( HERMON_NUM_SPECIAL_QPS << 1 ) - 1 ) hermon.h 　
21605
 HERMON_MAX_QPSHERMON_MAX_QPS 8 hermon.h 　
21606
 HERMON_QPN_RANDOM_MASKHERMON_QPN_RANDOM_MASK 0xfff000 hermon.h 　
21607
 HERMON_MAX_CQSHERMON_MAX_CQS 8 hermon.h 　
21608
 HERMON_MAX_EQSHERMON_MAX_EQS 8 hermon.h 　
21609
 HERMON_NUM_EQESHERMON_NUM_EQES 4 hermon.h 　
21610
 HERMON_GLOBAL_PDHERMON_GLOBAL_PD 0x123456 hermon.h 　
21611
 HERMON_MKEY_PREFIXHERMON_MKEY_PREFIX 0x77000000UL hermon.h 　
21612
 HERMON_HCR_BASEHERMON_HCR_BASE 0x80680 hermon.h 　
21613
 HERMON_HCR_MAX_WAIT_MSHERMON_HCR_MAX_WAIT_MS 2000 hermon.h 　
21614
 HERMON_MBOX_ALIGNHERMON_MBOX_ALIGN 4096 hermon.h 　
21615
 HERMON_MBOX_SIZEHERMON_MBOX_SIZE 512 hermon.h 　
21616
 HERMON_HCR_IN_MBOXHERMON_HCR_IN_MBOX 0x00001000UL hermon.h 　
21617
 HERMON_HCR_OUT_MBOXHERMON_HCR_OUT_MBOX 0x00002000UL hermon.h 　
21618
 LINDA_SENDBUFAVAIL_ALIGNLINDA_SENDBUFAVAIL_ALIGN 64 linda.h 　
21619
 LINDA_BAR0_SIZELINDA_BAR0_SIZE 0x400000 linda.h 　
21620
 LINDA_GPIO_SCLLINDA_GPIO_SCL 0 linda.h 　
21621
 LINDA_GPIO_SDALINDA_GPIO_SDA 1 linda.h 　
21622
 LINDA_EEPROM_GUID_OFFSETLINDA_EEPROM_GUID_OFFSET 3 linda.h 　
21623
 LINDA_EEPROM_GUID_SIZELINDA_EEPROM_GUID_SIZE 8 linda.h 　
21624
 LINDA_EEPROM_SERIAL_OFFSETLINDA_EEPROM_SERIAL_OFFSET 12 linda.h 　
21625
 LINDA_EEPROM_SERIAL_SIZELINDA_EEPROM_SERIAL_SIZE 12 linda.h 　
21626
 LINDA_MAX_SEND_BUFSLINDA_MAX_SEND_BUFS 32 linda.h 　
21627
 LINDA_SEND_BUF_SIZELINDA_SEND_BUF_SIZE 4096 linda.h 　
21628
 LINDA_NUM_CONTEXTSLINDA_NUM_CONTEXTS 5 linda.h 　
21629
 LINDA_EAGER_ARRAY_SIZE_5CTX_0LINDA_EAGER_ARRAY_SIZE_5CTX_0 2048 linda.h 　
21630
 LINDA_EAGER_ARRAY_SIZE_5CTX_OTHLINDA_EAGER_ARRAY_SIZE_5CTX_OTH 4096 linda.h 　
21631
 LINDA_EAGER_ARRAY_SIZE_9CTX_0LINDA_EAGER_ARRAY_SIZE_9CTX_0 2048 linda.h 　
21632
 LINDA_EAGER_ARRAY_SIZE_9CTX_OTHLINDA_EAGER_ARRAY_SIZE_9CTX_OTH 2048 linda.h 　
21633
 LINDA_EAGER_ARRAY_SIZE_17CTX_0LINDA_EAGER_ARRAY_SIZE_17CTX_0 2048 linda.h 　
21634
 LINDA_EAGER_ARRAY_SIZE_17CTX_OTLINDA_EAGER_ARRAY_SIZE_17CTX_OT 1024 linda.h 　
21635
 LINDA_EAGER_BUFFER_ALIGNLINDA_EAGER_BUFFER_ALIGN 2048 linda.h 　
21636
 LINDA_RECV_HEADER_COUNTLINDA_RECV_HEADER_COUNT 8 linda.h 　
21637
 LINDA_RECV_HEADER_SIZELINDA_RECV_HEADER_SIZE 96 linda.h 　
21638
 LINDA_RECV_HEADERS_SIZELINDA_RECV_HEADERS_SIZE ( LINDA_RECV_HEADER_SIZE * LINDA_RECV_HEADER_COUNT ) linda.h 　
21639
 LINDA_RECV_HEADERS_ALIGNLINDA_RECV_HEADERS_ALIGN 64 linda.h 　
21640
 LINDA_RECV_PAYLOAD_SIZELINDA_RECV_PAYLOAD_SIZE 2048 linda.h 　
21641
 LINDA_QP_IDETHLINDA_QP_IDETH 0xdead0 linda.h 　
21642
 LINDA_EPB_REQUEST_MAX_WAIT_USLINDA_EPB_REQUEST_MAX_WAIT_US 500 linda.h 　
21643
 LINDA_EPB_XACT_MAX_WAIT_USLINDA_EPB_XACT_MAX_WAIT_US 500 linda.h 　
21644
 LINDA_EPB_CS_SERDESLINDA_EPB_CS_SERDES 1 linda.h 　
21645
 LINDA_EPB_CS_UCLINDA_EPB_CS_UC 2 linda.h 　
21646
 LINDA_EPB_WRITELINDA_EPB_WRITE 0 linda.h 　
21647
 LINDA_EPB_READLINDA_EPB_READ 1 linda.h 　
21648
 LINDA_EPB_UC_CHANNELLINDA_EPB_UC_CHANNEL 6 linda.h 　
21649
 LINDA_EPB_UC_CTLLINDA_EPB_UC_CTL LINDA_EPB_UC_LOC ( 0 ) linda.h 　
21650
 LINDA_EPB_UC_CTL_WRITELINDA_EPB_UC_CTL_WRITE 1 linda.h 　
21651
 LINDA_EPB_UC_CTL_READLINDA_EPB_UC_CTL_READ 2 linda.h 　
21652
 LINDA_EPB_UC_ADDR_LOLINDA_EPB_UC_ADDR_LO LINDA_EPB_UC_LOC ( 2 ) linda.h 　
21653
 LINDA_EPB_UC_ADDR_HILINDA_EPB_UC_ADDR_HI LINDA_EPB_UC_LOC ( 3 ) linda.h 　
21654
 LINDA_EPB_UC_DATALINDA_EPB_UC_DATA LINDA_EPB_UC_LOC ( 4 ) linda.h 　
21655
 LINDA_EPB_UC_CHUNK_SIZELINDA_EPB_UC_CHUNK_SIZE 64 linda.h 　
21656
 LINDA_TRIM_DONE_MAX_WAIT_MSLINDA_TRIM_DONE_MAX_WAIT_MS 1000 linda.h 　
21657
 LINDA_LINK_STATE_MAX_WAIT_USLINDA_LINK_STATE_MAX_WAIT_US 20 linda.h 　
21658
 QIB_7220_Revision_offsetQIB_7220_Revision_offset 0x00000000UL qib_7220_regs.h 　
21659
 QIB_7220_Control_offsetQIB_7220_Control_offset 0x00000008UL qib_7220_regs.h 　
21660
 QIB_7220_PageAlign_offsetQIB_7220_PageAlign_offset 0x00000010UL qib_7220_regs.h 　
21661
 QIB_7220_PortCnt_offsetQIB_7220_PortCnt_offset 0x00000018UL qib_7220_regs.h 　
21662
 QIB_7220_DbgPortSel_offsetQIB_7220_DbgPortSel_offset 0x00000020UL qib_7220_regs.h 　
21663
 QIB_7220_DebugSigsIntSel_offsetQIB_7220_DebugSigsIntSel_offset 0x00000028UL qib_7220_regs.h 　
21664
 QIB_7220_SendRegBase_offsetQIB_7220_SendRegBase_offset 0x00000030UL qib_7220_regs.h 　
21665
 QIB_7220_UserRegBase_offsetQIB_7220_UserRegBase_offset 0x00000038UL qib_7220_regs.h 　
21666
 QIB_7220_CntrRegBase_offsetQIB_7220_CntrRegBase_offset 0x00000040UL qib_7220_regs.h 　
21667
 QIB_7220_Scratch_offsetQIB_7220_Scratch_offset 0x00000048UL qib_7220_regs.h 　
21668
 QIB_7220_REG_000050_offsetQIB_7220_REG_000050_offset 0x00000050UL qib_7220_regs.h 　
21669
 QIB_7220_IntBlocked_offsetQIB_7220_IntBlocked_offset 0x00000060UL qib_7220_regs.h 　
21670
 QIB_7220_IntMask_offsetQIB_7220_IntMask_offset 0x00000068UL qib_7220_regs.h 　
21671
 QIB_7220_IntStatus_offsetQIB_7220_IntStatus_offset 0x00000070UL qib_7220_regs.h 　
21672
 QIB_7220_IntClear_offsetQIB_7220_IntClear_offset 0x00000078UL qib_7220_regs.h 　
21673
 QIB_7220_ErrMask_offsetQIB_7220_ErrMask_offset 0x00000080UL qib_7220_regs.h 　
21674
 QIB_7220_ErrStatus_offsetQIB_7220_ErrStatus_offset 0x00000088UL qib_7220_regs.h 　
21675
 QIB_7220_ErrClear_offsetQIB_7220_ErrClear_offset 0x00000090UL qib_7220_regs.h 　
21676
 QIB_7220_HwErrMask_offsetQIB_7220_HwErrMask_offset 0x00000098UL qib_7220_regs.h 　
21677
 QIB_7220_HwErrStatus_offsetQIB_7220_HwErrStatus_offset 0x000000a0UL qib_7220_regs.h 　
21678
 QIB_7220_HwErrClear_offsetQIB_7220_HwErrClear_offset 0x000000a8UL qib_7220_regs.h 　
21679
 QIB_7220_HwDiagCtrl_offsetQIB_7220_HwDiagCtrl_offset 0x000000b0UL qib_7220_regs.h 　
21680
 QIB_7220_REG_0000B8_offsetQIB_7220_REG_0000B8_offset 0x000000b8UL qib_7220_regs.h 　
21681
 QIB_7220_IBCStatus_offsetQIB_7220_IBCStatus_offset 0x000000c0UL qib_7220_regs.h 　
21682
 QIB_7220_IBCCtrl_offsetQIB_7220_IBCCtrl_offset 0x000000c8UL qib_7220_regs.h 　
21683
 QIB_7220_EXTStatus_offsetQIB_7220_EXTStatus_offset 0x000000d0UL qib_7220_regs.h 　
21684
 QIB_7220_EXTCtrl_offsetQIB_7220_EXTCtrl_offset 0x000000d8UL qib_7220_regs.h 　
21685
 QIB_7220_GPIOOut_offsetQIB_7220_GPIOOut_offset 0x000000e0UL qib_7220_regs.h 　
21686
 QIB_7220_GPIOMask_offsetQIB_7220_GPIOMask_offset 0x000000e8UL qib_7220_regs.h 　
21687
 QIB_7220_GPIOStatus_offsetQIB_7220_GPIOStatus_offset 0x000000f0UL qib_7220_regs.h 　
21688
 QIB_7220_GPIOClear_offsetQIB_7220_GPIOClear_offset 0x000000f8UL qib_7220_regs.h 　
21689
 QIB_7220_RcvCtrl_offsetQIB_7220_RcvCtrl_offset 0x00000100UL qib_7220_regs.h 　
21690
 QIB_7220_RcvBTHQP_offsetQIB_7220_RcvBTHQP_offset 0x00000108UL qib_7220_regs.h 　
21691
 QIB_7220_RcvHdrSize_offsetQIB_7220_RcvHdrSize_offset 0x00000110UL qib_7220_regs.h 　
21692
 QIB_7220_RcvHdrCnt_offsetQIB_7220_RcvHdrCnt_offset 0x00000118UL qib_7220_regs.h 　
21693
 QIB_7220_RcvHdrEntSize_offsetQIB_7220_RcvHdrEntSize_offset 0x00000120UL qib_7220_regs.h 　
21694
 QIB_7220_RcvTIDBase_offsetQIB_7220_RcvTIDBase_offset 0x00000128UL qib_7220_regs.h 　
21695
 QIB_7220_RcvTIDCnt_offsetQIB_7220_RcvTIDCnt_offset 0x00000130UL qib_7220_regs.h 　
21696
 QIB_7220_RcvEgrBase_offsetQIB_7220_RcvEgrBase_offset 0x00000138UL qib_7220_regs.h 　
21697
 QIB_7220_RcvEgrCnt_offsetQIB_7220_RcvEgrCnt_offset 0x00000140UL qib_7220_regs.h 　
21698
 QIB_7220_RcvBufBase_offsetQIB_7220_RcvBufBase_offset 0x00000148UL qib_7220_regs.h 　
21699
 QIB_7220_RcvBufSize_offsetQIB_7220_RcvBufSize_offset 0x00000150UL qib_7220_regs.h 　
21700
 QIB_7220_RxIntMemBase_offsetQIB_7220_RxIntMemBase_offset 0x00000158UL qib_7220_regs.h 　
21701
 QIB_7220_RxIntMemSize_offsetQIB_7220_RxIntMemSize_offset 0x00000160UL qib_7220_regs.h 　
21702
 QIB_7220_RcvPartitionKey_offsetQIB_7220_RcvPartitionKey_offset 0x00000168UL qib_7220_regs.h 　
21703
 QIB_7220_RcvQPMulticastPort_offQIB_7220_RcvQPMulticastPort_off 0x00000170UL qib_7220_regs.h 　
21704
 QIB_7220_RcvPktLEDCnt_offsetQIB_7220_RcvPktLEDCnt_offset 0x00000178UL qib_7220_regs.h 　
21705
 QIB_7220_IBCDDRCtrl_offsetQIB_7220_IBCDDRCtrl_offset 0x00000180UL qib_7220_regs.h 　
21706
 QIB_7220_HRTBT_GUID_offsetQIB_7220_HRTBT_GUID_offset 0x00000188UL qib_7220_regs.h 　
21707
 QIB_7220_IB_SDTEST_IF_TX_offsetQIB_7220_IB_SDTEST_IF_TX_offset 0x00000190UL qib_7220_regs.h 　
21708
 QIB_7220_IB_SDTEST_IF_RX_offsetQIB_7220_IB_SDTEST_IF_RX_offset 0x00000198UL qib_7220_regs.h 　
21709
 QIB_7220_IBCDDRCtrl2_offsetQIB_7220_IBCDDRCtrl2_offset 0x000001a0UL qib_7220_regs.h 　
21710
 QIB_7220_IBCDDRStatus_offsetQIB_7220_IBCDDRStatus_offset 0x000001a8UL qib_7220_regs.h 　
21711
 QIB_7220_JIntReload_offsetQIB_7220_JIntReload_offset 0x000001b0UL qib_7220_regs.h 　
21712
 QIB_7220_IBNCModeCtrl_offsetQIB_7220_IBNCModeCtrl_offset 0x000001b8UL qib_7220_regs.h 　
21713
 QIB_7220_SendCtrl_offsetQIB_7220_SendCtrl_offset 0x000001c0UL qib_7220_regs.h 　
21714
 QIB_7220_SendBufBase_offsetQIB_7220_SendBufBase_offset 0x000001c8UL qib_7220_regs.h 　
21715
 QIB_7220_SendBufSize_offsetQIB_7220_SendBufSize_offset 0x000001d0UL qib_7220_regs.h 　
21716
 QIB_7220_SendBufCnt_offsetQIB_7220_SendBufCnt_offset 0x000001d8UL qib_7220_regs.h 　
21717
 QIB_7220_SendBufAvailAddr_offseQIB_7220_SendBufAvailAddr_offse 0x000001e0UL qib_7220_regs.h 　
21718
 QIB_7220_TxIntMemBase_offsetQIB_7220_TxIntMemBase_offset 0x000001e8UL qib_7220_regs.h 　
21719
 QIB_7220_TxIntMemSize_offsetQIB_7220_TxIntMemSize_offset 0x000001f0UL qib_7220_regs.h 　
21720
 QIB_7220_SendDmaBase_offsetQIB_7220_SendDmaBase_offset 0x000001f8UL qib_7220_regs.h 　
21721
 QIB_7220_SendDmaLenGen_offsetQIB_7220_SendDmaLenGen_offset 0x00000200UL qib_7220_regs.h 　
21722
 QIB_7220_SendDmaTail_offsetQIB_7220_SendDmaTail_offset 0x00000208UL qib_7220_regs.h 　
21723
 QIB_7220_SendDmaHead_offsetQIB_7220_SendDmaHead_offset 0x00000210UL qib_7220_regs.h 　
21724
 QIB_7220_SendDmaHeadAddr_offsetQIB_7220_SendDmaHeadAddr_offset 0x00000218UL qib_7220_regs.h 　
21725
 QIB_7220_SendDmaBufMask0_offsetQIB_7220_SendDmaBufMask0_offset 0x00000220UL qib_7220_regs.h 　
21726
 QIB_7220_SendDmaStatus_offsetQIB_7220_SendDmaStatus_offset 0x00000238UL qib_7220_regs.h 　
21727
 QIB_7220_SendBufErr0_offsetQIB_7220_SendBufErr0_offset 0x00000240UL qib_7220_regs.h 　
21728
 QIB_7220_REG_000258_offsetQIB_7220_REG_000258_offset 0x00000258UL qib_7220_regs.h 　
21729
 QIB_7220_AvailUpdCount_offsetQIB_7220_AvailUpdCount_offset 0x00000268UL qib_7220_regs.h 　
21730
 QIB_7220_RcvHdrAddr0_offsetQIB_7220_RcvHdrAddr0_offset 0x00000270UL qib_7220_regs.h 　
21731
 QIB_7220_REG_0002F8_offsetQIB_7220_REG_0002F8_offset 0x000002f8UL qib_7220_regs.h 　
21732
 QIB_7220_RcvHdrTailAddr0_offsetQIB_7220_RcvHdrTailAddr0_offset 0x00000300UL qib_7220_regs.h 　
21733
 QIB_7220_REG_000388_offsetQIB_7220_REG_000388_offset 0x00000388UL qib_7220_regs.h 　
21734
 QIB_7220_ibsd_epb_access_ctrl_oQIB_7220_ibsd_epb_access_ctrl_o 0x000003c0UL qib_7220_regs.h 　
21735
 QIB_7220_ibsd_epb_transaction_rQIB_7220_ibsd_epb_transaction_r 0x000003c8UL qib_7220_regs.h 　
21736
 QIB_7220_REG_0003D0_offsetQIB_7220_REG_0003D0_offset 0x000003d0UL qib_7220_regs.h 　
21737
 QIB_7220_XGXSCfg_offsetQIB_7220_XGXSCfg_offset 0x000003d8UL qib_7220_regs.h 　
21738
 QIB_7220_IBSerDesCtrl_offsetQIB_7220_IBSerDesCtrl_offset 0x000003e0UL qib_7220_regs.h 　
21739
 QIB_7220_EEPCtlStat_offsetQIB_7220_EEPCtlStat_offset 0x000003e8UL qib_7220_regs.h 　
21740
 QIB_7220_EEPAddrCmd_offsetQIB_7220_EEPAddrCmd_offset 0x000003f0UL qib_7220_regs.h 　
21741
 QIB_7220_EEPData_offsetQIB_7220_EEPData_offset 0x000003f8UL qib_7220_regs.h 　
21742
 QIB_7220_pciesd_epb_access_ctrlQIB_7220_pciesd_epb_access_ctrl 0x00000400UL qib_7220_regs.h 　
21743
 QIB_7220_pciesd_epb_transactionQIB_7220_pciesd_epb_transaction 0x00000408UL qib_7220_regs.h 　
21744
 QIB_7220_efuse_control_reg_offsQIB_7220_efuse_control_reg_offs 0x00000410UL qib_7220_regs.h 　
21745
 QIB_7220_efuse_rddata0_reg_offsQIB_7220_efuse_rddata0_reg_offs 0x00000418UL qib_7220_regs.h 　
21746
 QIB_7220_procmon_register_offseQIB_7220_procmon_register_offse 0x00000438UL qib_7220_regs.h 　
21747
 QIB_7220_PcieRbufTestReg0_offseQIB_7220_PcieRbufTestReg0_offse 0x00000440UL qib_7220_regs.h 　
21748
 QIB_7220_PcieRBufTestReg1_offseQIB_7220_PcieRBufTestReg1_offse 0x00000448UL qib_7220_regs.h 　
21749
 QIB_7220_SPC_JTAG_ACCESS_REG_ofQIB_7220_SPC_JTAG_ACCESS_REG_of 0x00000460UL qib_7220_regs.h 　
21750
 QIB_7220_LAControlReg_offsetQIB_7220_LAControlReg_offset 0x00000468UL qib_7220_regs.h 　
21751
 QIB_7220_GPIODebugSelReg_offsetQIB_7220_GPIODebugSelReg_offset 0x00000470UL qib_7220_regs.h 　
21752
 QIB_7220_DebugPortValueReg_offsQIB_7220_DebugPortValueReg_offs 0x00000478UL qib_7220_regs.h 　
21753
 QIB_7220_SendDmaBufUsed0_offsetQIB_7220_SendDmaBufUsed0_offset 0x00000480UL qib_7220_regs.h 　
21754
 QIB_7220_SendDmaReqTagUsed_offsQIB_7220_SendDmaReqTagUsed_offs 0x00000498UL qib_7220_regs.h 　
21755
 QIB_7220_efuse_pgm_data0_offsetQIB_7220_efuse_pgm_data0_offset 0x000004a0UL qib_7220_regs.h 　
21756
 QIB_7220_MEM_0004B0_offsetQIB_7220_MEM_0004B0_offset 0x000004b0UL qib_7220_regs.h 　
21757
 QIB_7220_SerDes_DDSRXEQ0_offsetQIB_7220_SerDes_DDSRXEQ0_offset 0x00000500UL qib_7220_regs.h 　
21758
 QIB_7220_MEM_0005F0_offsetQIB_7220_MEM_0005F0_offset 0x000005f0UL qib_7220_regs.h 　
21759
 QIB_7220_LAMemory_offsetQIB_7220_LAMemory_offset 0x00000600UL qib_7220_regs.h 　
21760
 QIB_7220_MEM_0007F0_offsetQIB_7220_MEM_0007F0_offset 0x000007f0UL qib_7220_regs.h 　
21761
 QIB_7220_SendBufAvail0_offsetQIB_7220_SendBufAvail0_offset 0x00001000UL qib_7220_regs.h 　
21762
 QIB_7220_MEM_001028_offsetQIB_7220_MEM_001028_offset 0x00001028UL qib_7220_regs.h 　
21763
 QIB_7220_LBIntCnt_offsetQIB_7220_LBIntCnt_offset 0x00013000UL qib_7220_regs.h 　
21764
 QIB_7220_LBFlowStallCnt_offsetQIB_7220_LBFlowStallCnt_offset 0x00013008UL qib_7220_regs.h 　
21765
 QIB_7220_TxSDmaDescCnt_offsetQIB_7220_TxSDmaDescCnt_offset 0x00013010UL qib_7220_regs.h 　
21766
 QIB_7220_TxUnsupVLErrCnt_offsetQIB_7220_TxUnsupVLErrCnt_offset 0x00013018UL qib_7220_regs.h 　
21767
 QIB_7220_TxDataPktCnt_offsetQIB_7220_TxDataPktCnt_offset 0x00013020UL qib_7220_regs.h 　
21768
 QIB_7220_TxFlowPktCnt_offsetQIB_7220_TxFlowPktCnt_offset 0x00013028UL qib_7220_regs.h 　
21769
 QIB_7220_TxDwordCnt_offsetQIB_7220_TxDwordCnt_offset 0x00013030UL qib_7220_regs.h 　
21770
 QIB_7220_TxLenErrCnt_offsetQIB_7220_TxLenErrCnt_offset 0x00013038UL qib_7220_regs.h 　
21771
 QIB_7220_TxMaxMinLenErrCnt_offsQIB_7220_TxMaxMinLenErrCnt_offs 0x00013040UL qib_7220_regs.h 　
21772
 QIB_7220_TxUnderrunCnt_offsetQIB_7220_TxUnderrunCnt_offset 0x00013048UL qib_7220_regs.h 　
21773
 QIB_7220_TxFlowStallCnt_offsetQIB_7220_TxFlowStallCnt_offset 0x00013050UL qib_7220_regs.h 　
21774
 QIB_7220_TxDroppedPktCnt_offsetQIB_7220_TxDroppedPktCnt_offset 0x00013058UL qib_7220_regs.h 　
21775
 QIB_7220_RxDroppedPktCnt_offsetQIB_7220_RxDroppedPktCnt_offset 0x00013060UL qib_7220_regs.h 　
21776
 QIB_7220_RxDataPktCnt_offsetQIB_7220_RxDataPktCnt_offset 0x00013068UL qib_7220_regs.h 　
21777
 QIB_7220_RxFlowPktCnt_offsetQIB_7220_RxFlowPktCnt_offset 0x00013070UL qib_7220_regs.h 　
21778
 QIB_7220_RxDwordCnt_offsetQIB_7220_RxDwordCnt_offset 0x00013078UL qib_7220_regs.h 　
21779
 QIB_7220_RxLenErrCnt_offsetQIB_7220_RxLenErrCnt_offset 0x00013080UL qib_7220_regs.h 　
21780
 QIB_7220_RxMaxMinLenErrCnt_offsQIB_7220_RxMaxMinLenErrCnt_offs 0x00013088UL qib_7220_regs.h 　
21781
 QIB_7220_RxICRCErrCnt_offsetQIB_7220_RxICRCErrCnt_offset 0x00013090UL qib_7220_regs.h 　
21782
 QIB_7220_RxVCRCErrCnt_offsetQIB_7220_RxVCRCErrCnt_offset 0x00013098UL qib_7220_regs.h 　
21783
 QIB_7220_RxFlowCtrlViolCnt_offsQIB_7220_RxFlowCtrlViolCnt_offs 0x000130a0UL qib_7220_regs.h 　
21784
 QIB_7220_RxVersionErrCnt_offsetQIB_7220_RxVersionErrCnt_offset 0x000130a8UL qib_7220_regs.h 　
21785
 QIB_7220_RxLinkMalformCnt_offseQIB_7220_RxLinkMalformCnt_offse 0x000130b0UL qib_7220_regs.h 　
21786
 QIB_7220_RxEBPCnt_offsetQIB_7220_RxEBPCnt_offset 0x000130b8UL qib_7220_regs.h 　
21787
 QIB_7220_RxLPCRCErrCnt_offsetQIB_7220_RxLPCRCErrCnt_offset 0x000130c0UL qib_7220_regs.h 　
21788
 QIB_7220_RxBufOvflCnt_offsetQIB_7220_RxBufOvflCnt_offset 0x000130c8UL qib_7220_regs.h 　
21789
 QIB_7220_RxTIDFullErrCnt_offsetQIB_7220_RxTIDFullErrCnt_offset 0x000130d0UL qib_7220_regs.h 　
21790
 QIB_7220_RxTIDValidErrCnt_offseQIB_7220_RxTIDValidErrCnt_offse 0x000130d8UL qib_7220_regs.h 　
21791
 QIB_7220_RxPKeyMismatchCnt_offsQIB_7220_RxPKeyMismatchCnt_offs 0x000130e0UL qib_7220_regs.h 　
21792
 QIB_7220_RxP0HdrEgrOvflCnt_offsQIB_7220_RxP0HdrEgrOvflCnt_offs 0x000130e8UL qib_7220_regs.h 　
21793
 QIB_7220_IBStatusChangeCnt_offsQIB_7220_IBStatusChangeCnt_offs 0x00013170UL qib_7220_regs.h 　
21794
 QIB_7220_IBLinkErrRecoveryCnt_oQIB_7220_IBLinkErrRecoveryCnt_o 0x00013178UL qib_7220_regs.h 　
21795
 QIB_7220_IBLinkDownedCnt_offsetQIB_7220_IBLinkDownedCnt_offset 0x00013180UL qib_7220_regs.h 　
21796
 QIB_7220_IBSymbolErrCnt_offsetQIB_7220_IBSymbolErrCnt_offset 0x00013188UL qib_7220_regs.h 　
21797
 QIB_7220_RxVL15DroppedPktCnt_ofQIB_7220_RxVL15DroppedPktCnt_of 0x00013190UL qib_7220_regs.h 　
21798
 QIB_7220_RxOtherLocalPhyErrCnt_QIB_7220_RxOtherLocalPhyErrCnt_ 0x00013198UL qib_7220_regs.h 　
21799
 QIB_7220_PcieRetryBufDiagQwordCQIB_7220_PcieRetryBufDiagQwordC 0x000131a0UL qib_7220_regs.h 　
21800
 QIB_7220_ExcessBufferOvflCnt_ofQIB_7220_ExcessBufferOvflCnt_of 0x000131a8UL qib_7220_regs.h 　
21801
 QIB_7220_LocalLinkIntegrityErrCQIB_7220_LocalLinkIntegrityErrC 0x000131b0UL qib_7220_regs.h 　
21802
 QIB_7220_RxVlErrCnt_offsetQIB_7220_RxVlErrCnt_offset 0x000131b8UL qib_7220_regs.h 　
21803
 QIB_7220_RxDlidFltrCnt_offsetQIB_7220_RxDlidFltrCnt_offset 0x000131c0UL qib_7220_regs.h 　
21804
 QIB_7220_CNT_0131C8_offsetQIB_7220_CNT_0131C8_offset 0x000131c8UL qib_7220_regs.h 　
21805
 QIB_7220_PSStat_offsetQIB_7220_PSStat_offset 0x00013200UL qib_7220_regs.h 　
21806
 QIB_7220_PSStart_offsetQIB_7220_PSStart_offset 0x00013208UL qib_7220_regs.h 　
21807
 QIB_7220_PSInterval_offsetQIB_7220_PSInterval_offset 0x00013210UL qib_7220_regs.h 　
21808
 QIB_7220_PSRcvDataCount_offsetQIB_7220_PSRcvDataCount_offset 0x00013218UL qib_7220_regs.h 　
21809
 QIB_7220_PSRcvPktsCount_offsetQIB_7220_PSRcvPktsCount_offset 0x00013220UL qib_7220_regs.h 　
21810
 QIB_7220_PSXmitDataCount_offsetQIB_7220_PSXmitDataCount_offset 0x00013228UL qib_7220_regs.h 　
21811
 QIB_7220_PSXmitPktsCount_offsetQIB_7220_PSXmitPktsCount_offset 0x00013230UL qib_7220_regs.h 　
21812
 QIB_7220_PSXmitWaitCount_offsetQIB_7220_PSXmitWaitCount_offset 0x00013238UL qib_7220_regs.h 　
21813
 QIB_7220_CNT_013240_offsetQIB_7220_CNT_013240_offset 0x00013240UL qib_7220_regs.h 　
21814
 QIB_7220_RcvEgrArray_offsetQIB_7220_RcvEgrArray_offset 0x00014000UL qib_7220_regs.h 　
21815
 QIB_7220_MEM_038000_offsetQIB_7220_MEM_038000_offset 0x00038000UL qib_7220_regs.h 　
21816
 QIB_7220_RcvTIDArray0_offsetQIB_7220_RcvTIDArray0_offset 0x00053000UL qib_7220_regs.h 　
21817
 QIB_7220_PIOLaunchFIFO_offsetQIB_7220_PIOLaunchFIFO_offset 0x00064000UL qib_7220_regs.h 　
21818
 QIB_7220_MEM_064480_offsetQIB_7220_MEM_064480_offset 0x00064480UL qib_7220_regs.h 　
21819
 QIB_7220_SendPIOpbcCache_offsetQIB_7220_SendPIOpbcCache_offset 0x00064800UL qib_7220_regs.h 　
21820
 QIB_7220_MEM_064C80_offsetQIB_7220_MEM_064C80_offset 0x00064c80UL qib_7220_regs.h 　
21821
 QIB_7220_PreLaunchFIFO_offsetQIB_7220_PreLaunchFIFO_offset 0x00065000UL qib_7220_regs.h 　
21822
 QIB_7220_MEM_065080_offsetQIB_7220_MEM_065080_offset 0x00065080UL qib_7220_regs.h 　
21823
 QIB_7220_ScoreBoard_offsetQIB_7220_ScoreBoard_offset 0x00065400UL qib_7220_regs.h 　
21824
 QIB_7220_MEM_065440_offsetQIB_7220_MEM_065440_offset 0x00065440UL qib_7220_regs.h 　
21825
 QIB_7220_DescriptorFIFO_offsetQIB_7220_DescriptorFIFO_offset 0x00065800UL qib_7220_regs.h 　
21826
 QIB_7220_MEM_065880_offsetQIB_7220_MEM_065880_offset 0x00065880UL qib_7220_regs.h 　
21827
 QIB_7220_RcvBuf1_offsetQIB_7220_RcvBuf1_offset 0x00072000UL qib_7220_regs.h 　
21828
 QIB_7220_MEM_074800_offsetQIB_7220_MEM_074800_offset 0x00074800UL qib_7220_regs.h 　
21829
 QIB_7220_RcvBuf2_offsetQIB_7220_RcvBuf2_offset 0x00075000UL qib_7220_regs.h 　
21830
 QIB_7220_MEM_076400_offsetQIB_7220_MEM_076400_offset 0x00076400UL qib_7220_regs.h 　
21831
 QIB_7220_RcvFlags_offsetQIB_7220_RcvFlags_offset 0x00077000UL qib_7220_regs.h 　
21832
 QIB_7220_MEM_078400_offsetQIB_7220_MEM_078400_offset 0x00078400UL qib_7220_regs.h 　
21833
 QIB_7220_RcvLookupBuf1_offsetQIB_7220_RcvLookupBuf1_offset 0x00079000UL qib_7220_regs.h 　
21834
 QIB_7220_MEM_07A400_offsetQIB_7220_MEM_07A400_offset 0x0007a400UL qib_7220_regs.h 　
21835
 QIB_7220_RcvDMADatBuf_offsetQIB_7220_RcvDMADatBuf_offset 0x0007b000UL qib_7220_regs.h 　
21836
 QIB_7220_RcvDMAHdrBuf_offsetQIB_7220_RcvDMAHdrBuf_offset 0x0007b800UL qib_7220_regs.h 　
21837
 QIB_7220_MiscRXEIntMem_offsetQIB_7220_MiscRXEIntMem_offset 0x0007c000UL qib_7220_regs.h 　
21838
 QIB_7220_MEM_07D400_offsetQIB_7220_MEM_07D400_offset 0x0007d400UL qib_7220_regs.h 　
21839
 QIB_7220_PCIERcvBuf_offsetQIB_7220_PCIERcvBuf_offset 0x00080000UL qib_7220_regs.h 　
21840
 QIB_7220_PCIERetryBuf_offsetQIB_7220_PCIERetryBuf_offset 0x00084000UL qib_7220_regs.h 　
21841
 QIB_7220_PCIERcvBufRdToWrAddr_oQIB_7220_PCIERcvBufRdToWrAddr_o 0x00088000UL qib_7220_regs.h 　
21842
 QIB_7220_PCIECplBuf_offsetQIB_7220_PCIECplBuf_offset 0x00090000UL qib_7220_regs.h 　
21843
 QIB_7220_IBSerDesMappTable_offsQIB_7220_IBSerDesMappTable_offs 0x00094000UL qib_7220_regs.h 　
21844
 QIB_7220_MEM_095000_offsetQIB_7220_MEM_095000_offset 0x00095000UL qib_7220_regs.h 　
21845
 QIB_7220_SendBuf0_MA_offsetQIB_7220_SendBuf0_MA_offset 0x00100000UL qib_7220_regs.h 　
21846
 QIB_7220_MEM_1A0000_offsetQIB_7220_MEM_1A0000_offset 0x001a0000UL qib_7220_regs.h 　
21847
 QIB_7220_RcvHdrTail0_offsetQIB_7220_RcvHdrTail0_offset 0x00200000UL qib_7220_regs.h 　
21848
 QIB_7220_RcvHdrHead0_offsetQIB_7220_RcvHdrHead0_offset 0x00200008UL qib_7220_regs.h 　
21849
 QIB_7220_RcvEgrIndexTail0_offseQIB_7220_RcvEgrIndexTail0_offse 0x00200010UL qib_7220_regs.h 　
21850
 QIB_7220_RcvEgrIndexHead0_offseQIB_7220_RcvEgrIndexHead0_offse 0x00200018UL qib_7220_regs.h 　
21851
 QIB_7220_MEM_200020_offsetQIB_7220_MEM_200020_offset 0x00200020UL qib_7220_regs.h 　
21852
 QIB_7220_RcvHdrTail1_offsetQIB_7220_RcvHdrTail1_offset 0x00210000UL qib_7220_regs.h 　
21853
 QIB_7220_RcvHdrHead1_offsetQIB_7220_RcvHdrHead1_offset 0x00210008UL qib_7220_regs.h 　
21854
 QIB_7220_RcvEgrIndexTail1_offseQIB_7220_RcvEgrIndexTail1_offse 0x00210010UL qib_7220_regs.h 　
21855
 QIB_7220_RcvEgrIndexHead1_offseQIB_7220_RcvEgrIndexHead1_offse 0x00210018UL qib_7220_regs.h 　
21856
 QIB_7220_MEM_210020_offsetQIB_7220_MEM_210020_offset 0x00210020UL qib_7220_regs.h 　
21857
 QIB_7220_RcvHdrTail2_offsetQIB_7220_RcvHdrTail2_offset 0x00220000UL qib_7220_regs.h 　
21858
 QIB_7220_RcvHdrHead2_offsetQIB_7220_RcvHdrHead2_offset 0x00220008UL qib_7220_regs.h 　
21859
 QIB_7220_RcvEgrIndexTail2_offseQIB_7220_RcvEgrIndexTail2_offse 0x00220010UL qib_7220_regs.h 　
21860
 QIB_7220_RcvEgrIndexHead2_offseQIB_7220_RcvEgrIndexHead2_offse 0x00220018UL qib_7220_regs.h 　
21861
 QIB_7220_MEM_220020_offsetQIB_7220_MEM_220020_offset 0x00220020UL qib_7220_regs.h 　
21862
 QIB_7220_RcvHdrTail3_offsetQIB_7220_RcvHdrTail3_offset 0x00230000UL qib_7220_regs.h 　
21863
 QIB_7220_RcvHdrHead3_offsetQIB_7220_RcvHdrHead3_offset 0x00230008UL qib_7220_regs.h 　
21864
 QIB_7220_RcvEgrIndexTail3_offseQIB_7220_RcvEgrIndexTail3_offse 0x00230010UL qib_7220_regs.h 　
21865
 QIB_7220_RcvEgrIndexHead3_offseQIB_7220_RcvEgrIndexHead3_offse 0x00230018UL qib_7220_regs.h 　
21866
 QIB_7220_MEM_230020_offsetQIB_7220_MEM_230020_offset 0x00230020UL qib_7220_regs.h 　
21867
 QIB_7220_RcvHdrTail4_offsetQIB_7220_RcvHdrTail4_offset 0x00240000UL qib_7220_regs.h 　
21868
 QIB_7220_RcvHdrHead4_offsetQIB_7220_RcvHdrHead4_offset 0x00240008UL qib_7220_regs.h 　
21869
 QIB_7220_RcvEgrIndexTail4_offseQIB_7220_RcvEgrIndexTail4_offse 0x00240010UL qib_7220_regs.h 　
21870
 QIB_7220_RcvEgrIndexHead4_offseQIB_7220_RcvEgrIndexHead4_offse 0x00240018UL qib_7220_regs.h 　
21871
 QIB_7220_MEM_240020_offsetQIB_7220_MEM_240020_offset 0x00240020UL qib_7220_regs.h 　
21872
 QIB_7220_RcvHdrTail5_offsetQIB_7220_RcvHdrTail5_offset 0x00250000UL qib_7220_regs.h 　
21873
 QIB_7220_RcvHdrHead5_offsetQIB_7220_RcvHdrHead5_offset 0x00250008UL qib_7220_regs.h 　
21874
 QIB_7220_RcvEgrIndexTail5_offseQIB_7220_RcvEgrIndexTail5_offse 0x00250010UL qib_7220_regs.h 　
21875
 QIB_7220_RcvEgrIndexHead5_offseQIB_7220_RcvEgrIndexHead5_offse 0x00250018UL qib_7220_regs.h 　
21876
 QIB_7220_MEM_250020_offsetQIB_7220_MEM_250020_offset 0x00250020UL qib_7220_regs.h 　
21877
 QIB_7220_RcvHdrTail6_offsetQIB_7220_RcvHdrTail6_offset 0x00260000UL qib_7220_regs.h 　
21878
 QIB_7220_RcvHdrHead6_offsetQIB_7220_RcvHdrHead6_offset 0x00260008UL qib_7220_regs.h 　
21879
 QIB_7220_RcvEgrIndexTail6_offseQIB_7220_RcvEgrIndexTail6_offse 0x00260010UL qib_7220_regs.h 　
21880
 QIB_7220_RcvEgrIndexHead6_offseQIB_7220_RcvEgrIndexHead6_offse 0x00260018UL qib_7220_regs.h 　
21881
 QIB_7220_MEM_260020_offsetQIB_7220_MEM_260020_offset 0x00260020UL qib_7220_regs.h 　
21882
 QIB_7220_RcvHdrTail7_offsetQIB_7220_RcvHdrTail7_offset 0x00270000UL qib_7220_regs.h 　
21883
 QIB_7220_RcvHdrHead7_offsetQIB_7220_RcvHdrHead7_offset 0x00270008UL qib_7220_regs.h 　
21884
 QIB_7220_RcvEgrIndexTail7_offseQIB_7220_RcvEgrIndexTail7_offse 0x00270010UL qib_7220_regs.h 　
21885
 QIB_7220_RcvEgrIndexHead7_offseQIB_7220_RcvEgrIndexHead7_offse 0x00270018UL qib_7220_regs.h 　
21886
 QIB_7220_MEM_270020_offsetQIB_7220_MEM_270020_offset 0x00270020UL qib_7220_regs.h 　
21887
 QIB_7220_RcvHdrTail8_offsetQIB_7220_RcvHdrTail8_offset 0x00280000UL qib_7220_regs.h 　
21888
 QIB_7220_RcvHdrHead8_offsetQIB_7220_RcvHdrHead8_offset 0x00280008UL qib_7220_regs.h 　
21889
 QIB_7220_RcvEgrIndexTail8_offseQIB_7220_RcvEgrIndexTail8_offse 0x00280010UL qib_7220_regs.h 　
21890
 QIB_7220_RcvEgrIndexHead8_offseQIB_7220_RcvEgrIndexHead8_offse 0x00280018UL qib_7220_regs.h 　
21891
 QIB_7220_MEM_280020_offsetQIB_7220_MEM_280020_offset 0x00280020UL qib_7220_regs.h 　
21892
 QIB_7220_RcvHdrTail9_offsetQIB_7220_RcvHdrTail9_offset 0x00290000UL qib_7220_regs.h 　
21893
 QIB_7220_RcvHdrHead9_offsetQIB_7220_RcvHdrHead9_offset 0x00290008UL qib_7220_regs.h 　
21894
 QIB_7220_RcvEgrIndexTail9_offseQIB_7220_RcvEgrIndexTail9_offse 0x00290010UL qib_7220_regs.h 　
21895
 QIB_7220_RcvEgrIndexHead9_offseQIB_7220_RcvEgrIndexHead9_offse 0x00290018UL qib_7220_regs.h 　
21896
 QIB_7220_MEM_290020_offsetQIB_7220_MEM_290020_offset 0x00290020UL qib_7220_regs.h 　
21897
 QIB_7220_RcvHdrTail10_offsetQIB_7220_RcvHdrTail10_offset 0x002a0000UL qib_7220_regs.h 　
21898
 QIB_7220_RcvHdrHead10_offsetQIB_7220_RcvHdrHead10_offset 0x002a0008UL qib_7220_regs.h 　
21899
 QIB_7220_RcvEgrIndexTail10_offsQIB_7220_RcvEgrIndexTail10_offs 0x002a0010UL qib_7220_regs.h 　
21900
 QIB_7220_RcvEgrIndexHead10_offsQIB_7220_RcvEgrIndexHead10_offs 0x002a0018UL qib_7220_regs.h 　
21901
 QIB_7220_MEM_2A0020_offsetQIB_7220_MEM_2A0020_offset 0x002a0020UL qib_7220_regs.h 　
21902
 QIB_7220_RcvHdrTail11_offsetQIB_7220_RcvHdrTail11_offset 0x002b0000UL qib_7220_regs.h 　
21903
 QIB_7220_RcvHdrHead11_offsetQIB_7220_RcvHdrHead11_offset 0x002b0008UL qib_7220_regs.h 　
21904
 QIB_7220_RcvEgrIndexTail11_offsQIB_7220_RcvEgrIndexTail11_offs 0x002b0010UL qib_7220_regs.h 　
21905
 QIB_7220_RcvEgrIndexHead11_offsQIB_7220_RcvEgrIndexHead11_offs 0x002b0018UL qib_7220_regs.h 　
21906
 QIB_7220_MEM_2B0020_offsetQIB_7220_MEM_2B0020_offset 0x002b0020UL qib_7220_regs.h 　
21907
 QIB_7220_RcvHdrTail12_offsetQIB_7220_RcvHdrTail12_offset 0x002c0000UL qib_7220_regs.h 　
21908
 QIB_7220_RcvHdrHead12_offsetQIB_7220_RcvHdrHead12_offset 0x002c0008UL qib_7220_regs.h 　
21909
 QIB_7220_RcvEgrIndexTail12_offsQIB_7220_RcvEgrIndexTail12_offs 0x002c0010UL qib_7220_regs.h 　
21910
 QIB_7220_RcvEgrIndexHead12_offsQIB_7220_RcvEgrIndexHead12_offs 0x002c0018UL qib_7220_regs.h 　
21911
 QIB_7220_MEM_2C0020_offsetQIB_7220_MEM_2C0020_offset 0x002c0020UL qib_7220_regs.h 　
21912
 QIB_7220_RcvHdrTail13_offsetQIB_7220_RcvHdrTail13_offset 0x002d0000UL qib_7220_regs.h 　
21913
 QIB_7220_RcvHdrHead13_offsetQIB_7220_RcvHdrHead13_offset 0x002d0008UL qib_7220_regs.h 　
21914
 QIB_7220_RcvEgrIndexTail13_offsQIB_7220_RcvEgrIndexTail13_offs 0x002d0010UL qib_7220_regs.h 　
21915
 QIB_7220_RcvEgrIndexHead13_offsQIB_7220_RcvEgrIndexHead13_offs 0x002d0018UL qib_7220_regs.h 　
21916
 QIB_7220_MEM_2D0020_offsetQIB_7220_MEM_2D0020_offset 0x002d0020UL qib_7220_regs.h 　
21917
 QIB_7220_RcvHdrTail14_offsetQIB_7220_RcvHdrTail14_offset 0x002e0000UL qib_7220_regs.h 　
21918
 QIB_7220_RcvHdrHead14_offsetQIB_7220_RcvHdrHead14_offset 0x002e0008UL qib_7220_regs.h 　
21919
 QIB_7220_RcvEgrIndexTail14_offsQIB_7220_RcvEgrIndexTail14_offs 0x002e0010UL qib_7220_regs.h 　
21920
 QIB_7220_RcvEgrIndexHead14_offsQIB_7220_RcvEgrIndexHead14_offs 0x002e0018UL qib_7220_regs.h 　
21921
 QIB_7220_MEM_2E0020_offsetQIB_7220_MEM_2E0020_offset 0x002e0020UL qib_7220_regs.h 　
21922
 QIB_7220_RcvHdrTail15_offsetQIB_7220_RcvHdrTail15_offset 0x002f0000UL qib_7220_regs.h 　
21923
 QIB_7220_RcvHdrHead15_offsetQIB_7220_RcvHdrHead15_offset 0x002f0008UL qib_7220_regs.h 　
21924
 QIB_7220_RcvEgrIndexTail15_offsQIB_7220_RcvEgrIndexTail15_offs 0x002f0010UL qib_7220_regs.h 　
21925
 QIB_7220_RcvEgrIndexHead15_offsQIB_7220_RcvEgrIndexHead15_offs 0x002f0018UL qib_7220_regs.h 　
21926
 QIB_7220_MEM_2F0020_offsetQIB_7220_MEM_2F0020_offset 0x002f0020UL qib_7220_regs.h 　
21927
 QIB_7220_RcvHdrTail16_offsetQIB_7220_RcvHdrTail16_offset 0x00300000UL qib_7220_regs.h 　
21928
 QIB_7220_RcvHdrHead16_offsetQIB_7220_RcvHdrHead16_offset 0x00300008UL qib_7220_regs.h 　
21929
 QIB_7220_RcvEgrIndexTail16_offsQIB_7220_RcvEgrIndexTail16_offs 0x00300010UL qib_7220_regs.h 　
21930
 QIB_7220_RcvEgrIndexHead16_offsQIB_7220_RcvEgrIndexHead16_offs 0x00300018UL qib_7220_regs.h 　
21931
 QIB_7220_MEM_300020_offsetQIB_7220_MEM_300020_offset 0x00300020UL qib_7220_regs.h 　
21932
 HZHZ 100 3c515.c 　
21933
 CORKSCREWCORKSCREW 1 3c515.c 　
21934
 AUTOMEDIAAUTOMEDIA 1 3c515.c 　
21935
 TX_RING_SIZETX_RING_SIZE 16 3c515.c 　
21936
 RX_RING_SIZERX_RING_SIZE 16 3c515.c 　
21937
 PKT_BUF_SZPKT_BUF_SZ 1536 3c515.c Size of each temporary Rx buffer.
21938
 DRIVER_DEBUGDRIVER_DEBUG 1 3c515.c 　
21939
 CORKSCREW_IDCORKSCREW_ID 10 3c515.c 　
21940
 EL3_CMDEL3_CMD 0x0e 3c515.c 　
21941
 EL3_STATUSEL3_STATUS 0x0e 3c515.c 　
21942
 RX_BYTES_MASKRX_BYTES_MASK (unsigned short) (0x07ff) 3c515.c 　
21943
 NUM_TX_SLOTSNUM_TX_SLOTS 2 amd8111e.c 　
21944
 NUM_RX_SLOTSNUM_RX_SLOTS 4 amd8111e.c 　
21945
 TX_SLOTS_MASKTX_SLOTS_MASK 1 amd8111e.c 　
21946
 RX_SLOTS_MASKRX_SLOTS_MASK 3 amd8111e.c 　
21947
 TX_BUF_LENTX_BUF_LEN 1536 amd8111e.c 　
21948
 RX_BUF_LENRX_BUF_LEN 1536 amd8111e.c 　
21949
 TX_PKT_LEN_MAXTX_PKT_LEN_MAX (ETH_FRAME_LEN - ETH_HLEN) amd8111e.c 　
21950
 RX_PKT_LEN_MINRX_PKT_LEN_MIN 60 amd8111e.c 　
21951
 RX_PKT_LEN_MAXRX_PKT_LEN_MAX ETH_FRAME_LEN amd8111e.c 　
21952
 TX_TIMEOUTTX_TIMEOUT 3000 amd8111e.c 　
21953
 TX_PROCESS_TIMETX_PROCESS_TIME 10 amd8111e.c 　
21954
 TX_RETRYTX_RETRY (TX_TIMEOUT / TX_PROCESS_TIME) amd8111e.c 　
21955
 PHY_RW_RETRYPHY_RW_RETRY 10 amd8111e.c 　
21956
 TX_DESC_COUNTTX_DESC_COUNT 32 atl1e.c TX descriptors, minimum 32
21957
 RX_MEM_SIZERX_MEM_SIZE 8192 atl1e.c RX area size, minimum 8kb
21958
 MAX_FRAME_SIZEMAX_FRAME_SIZE 1500 atl1e.c Maximum MTU supported, minimum 1500
21959
 PREAMBLE_LENPREAMBLE_LEN 7 atl1e.c 　
21960
 RX_JUMBO_THRESHRX_JUMBO_THRESH ((MAX_FRAME_SIZE + ETH_HLEN + \ VLAN_HLEN + ETH_FCS_LEN + 7) >> 3) atl1e.c 　
21961
 IMT_VALIMT_VAL 100 atl1e.c interrupt moderator timer, us
21962
 ICT_VALICT_VAL 50000 atl1e.c interrupt clear timer, us
21963
 SMB_TIMERSMB_TIMER 200000 atl1e.c 　
21964
 RRD_THRESHRRD_THRESH 1 atl1e.c packets to queue before interrupt
21965
 TPD_BURSTTPD_BURST 5 atl1e.c 　
21966
 TPD_THRESHTPD_THRESH (TX_DESC_COUNT / 2) atl1e.c 　
21967
 RX_COUNT_DOWNRX_COUNT_DOWN 4 atl1e.c 　
21968
 TX_COUNT_DOWNTX_COUNT_DOWN (IMT_VAL * 4 / 3) atl1e.c 　
21969
 DMAR_DLY_CNTDMAR_DLY_CNT 15 atl1e.c 　
21970
 DMAW_DLY_CNTDMAW_DLY_CNT 4 atl1e.c 　
21971
 PCI_DEVICE_ID_ATTANSIC_L1EPCI_DEVICE_ID_ATTANSIC_L1E 0x1026 atl1e.c 　
21972
 EBUSYEBUSY 1 bnx2.c 　
21973
 ENODEVENODEV 2 bnx2.c 　
21974
 EINVALEINVAL 3 bnx2.c 　
21975
 ENOMEMENOMEM 4 bnx2.c 　
21976
 EIOEIO 5 bnx2.c 　
21977
 ETHTOOL_ALL_FIBRE_SPEEDETHTOOL_ALL_FIBRE_SPEED (ADVERTISED_1000baseT_Full) bnx2.c 　
21978
 ETHTOOL_ALL_COPPER_SPEEDETHTOOL_ALL_COPPER_SPEED (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | \ ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full | \ ADVERTISED_1 bnx2.c 　
21979
 PHY_ALL_10_100_SPEEDPHY_ALL_10_100_SPEED (ADVERTISE_10HALF | ADVERTISE_10FULL | \ ADVERTISE_100HALF | ADVERTISE_100FULL | ADVERTISE_CSMA) bnx2.c 　
21980
 PHY_ALL_1000_SPEEDPHY_ALL_1000_SPEED (ADVERTISE_1000HALF | ADVERTISE_1000FULL) bnx2.c 　
21981
 TX_TIME_OUTTX_TIME_OUT 2*TICKS_PER_SEC davicom.c 　
21982
 EEPROM_ADDRLENEEPROM_ADDRLEN 6 davicom.c 　
21983
 EEPROM_SIZEEEPROM_SIZE 32 davicom.c 1 << EEPROM_ADDRLEN
21984
 EE_WRITE_CMDEE_WRITE_CMD (5 << addr_len) davicom.c 　
21985
 EE_READ_CMDEE_READ_CMD (6 << addr_len) davicom.c 　
21986
 EE_ERASE_CMDEE_ERASE_CMD (7 << addr_len) davicom.c 　
21987
 EE_SHIFT_CLKEE_SHIFT_CLK 0x02 davicom.c EEPROM shift clock.
21988
 EE_CSEE_CS 0x01 davicom.c EEPROM chip select.
21989
 EE_DATA_WRITEEE_DATA_WRITE 0x04 davicom.c EEPROM chip data in.
21990
 EE_WRITE_0EE_WRITE_0 0x01 davicom.c 　
21991
 EE_WRITE_1EE_WRITE_1 0x05 davicom.c 　
21992
 EE_DATA_READEE_DATA_READ 0x08 davicom.c EEPROM chip data out.
21993
 EE_ENBEE_ENB (0x4800 | EE_CS) davicom.c 　
21994
 PHY_DATA_0PHY_DATA_0 0x0 davicom.c 　
21995
 PHY_DATA_1PHY_DATA_1 0x20000 davicom.c 　
21996
 MDCLKHMDCLKH 0x10000 davicom.c 　
21997
 BUFLENBUFLEN 1536 davicom.c 　
21998
 NTXDNTXD 2 davicom.c 　
21999
 NRXDNRXD 4 davicom.c 　
22000
 txdtxd davicom_bufs.txd davicom.c 　
22001
 txbtxb davicom_bufs.txb davicom.c 　
22002
 rxdrxd davicom_bufs.rxd davicom.c 　
22003
 rxbrxb davicom_bufs.rxb davicom.c 　
22004
 DEPCA_NICSRDEPCA_NICSR 0x00 depca.c Network interface CSR
22005
 DEPCA_RBIDEPCA_RBI 0x02 depca.c RAM buffer index (2k buffer mode)
22006
 DEPCA_DATADEPCA_DATA 0x04 depca.c LANCE registers' data port
22007
 DEPCA_ADDRDEPCA_ADDR 0x06 depca.c LANCE registers' address port
22008
 DEPCA_HBASEDEPCA_HBASE 0x08 depca.c EISA high memory base address reg.
22009
 DEPCA_PROMDEPCA_PROM 0x0c depca.c Ethernet address ROM data port
22010
 DEPCA_CNFGDEPCA_CNFG 0x0c depca.c EISA Configuration port
22011
 DEPCA_RBSADEPCA_RBSA 0x0e depca.c RAM buffer starting address (2k buff.)
22012
 CSR0CSR0 0 depca.c 　
22013
 CSR1CSR1 1 depca.c 　
22014
 CSR2CSR2 2 depca.c 　
22015
 CSR3CSR3 3 depca.c 　
22016
 TOTO 0x0100 depca.c Time Out for remote boot
22017
 SHESHE 0x0080 depca.c SHadow memory Enable
22018
 BSBS 0x0040 depca.c Bank Select
22019
 BUFBUF 0x0020 depca.c BUFfer size (1->32k, 0->64k)
22020
 RBERBE 0x0010 depca.c Remote Boot Enable (1->net boot)
22021
 AACAAC 0x0008 depca.c Address ROM Address Counter (1->enable)
22022
 _128KB_128KB 0x0008 depca.c 128kB Network RAM (1->enable)
22023
 IMIM 0x0004 depca.c Interrupt Mask (1->mask)
22024
 IENIEN 0x0002 depca.c Interrupt tristate ENable (1->enable)
22025
 LEDLED 0x0001 depca.c LED control
22026
 ERRERR 0x8000 depca.c Error summary
22027
 BABLBABL 0x4000 depca.c Babble transmitter timeout error
22028
 CERRCERR 0x2000 depca.c Collision Error
22029
 MISSMISS 0x1000 depca.c Missed packet
22030
 MERRMERR 0x0800 depca.c Memory Error
22031
 RINTRINT 0x0400 depca.c Receiver Interrupt
22032
 TINTTINT 0x0200 depca.c Transmit Interrupt
22033
 IDONIDON 0x0100 depca.c Initialization Done
22034
 INTRINTR 0x0080 depca.c Interrupt Flag
22035
 INEAINEA 0x0040 depca.c Interrupt Enable
22036
 RXONRXON 0x0020 depca.c Receiver on
22037
 TXONTXON 0x0010 depca.c Transmitter on
22038
 TDMDTDMD 0x0008 depca.c Transmit Demand
22039
 STOPSTOP 0x0004 depca.c Stop
22040
 STRTSTRT 0x0002 depca.c Start
22041
 INITINIT 0x0001 depca.c Initialize
22042
 INTMINTM 0xff00 depca.c Interrupt Mask
22043
 INTEINTE 0xfff0 depca.c Interrupt Enable
22044
 BSWPBSWP 0x0004 depca.c Byte SWaP
22045
 ACONACON 0x0002 depca.c ALE control
22046
 BCONBCON 0x0001 depca.c Byte CONtrol
22047
 PROMPROM 0x8000 depca.c Promiscuous Mode
22048
 EMBAEMBA 0x0080 depca.c Enable Modified Back-off Algorithm
22049
 INTLINTL 0x0040 depca.c Internal Loopback
22050
 DRTYDRTY 0x0020 depca.c Disable Retry
22051
 COLLCOLL 0x0010 depca.c Force Collision
22052
 DTCRDTCR 0x0008 depca.c Disable Transmit CRC
22053
 LOOPLOOP 0x0004 depca.c Loopback
22054
 DTXDTX 0x0002 depca.c Disable the Transmitter
22055
 DRXDRX 0x0001 depca.c Disable the Receiver
22056
 R_OWNR_OWN 0x80000000 depca.c Owner bit 0 = host, 1 = lance
22057
 R_ERRR_ERR 0x4000 depca.c Error Summary
22058
 R_FRAMR_FRAM 0x2000 depca.c Framing Error
22059
 R_OFLOR_OFLO 0x1000 depca.c Overflow Error
22060
 R_CRCR_CRC 0x0800 depca.c CRC Error
22061
 R_BUFFR_BUFF 0x0400 depca.c Buffer Error
22062
 R_STPR_STP 0x0200 depca.c Start of Packet
22063
 R_ENPR_ENP 0x0100 depca.c End of Packet
22064
 T_OWNT_OWN 0x80000000 depca.c Owner bit 0 = host, 1 = lance
22065
 T_ERRT_ERR 0x4000 depca.c Error Summary
22066
 T_ADD_FCST_ADD_FCS 0x2000 depca.c More the 1 retry needed to Xmit
22067
 T_MORET_MORE 0x1000 depca.c >1 retry to transmit packet
22068
 T_ONET_ONE 0x0800 depca.c 1 try needed to transmit the packet
22069
 T_DEFT_DEF 0x0400 depca.c Deferred
22070
 T_STPT_STP 0x02000000 depca.c Start of Packet
22071
 T_ENPT_ENP 0x01000000 depca.c End of Packet
22072
 T_FLAGST_FLAGS 0xff000000 depca.c TX Flags Field
22073
 TMD3_BUFFTMD3_BUFF 0x8000 depca.c BUFFer error
22074
 TMD3_UFLOTMD3_UFLO 0x4000 depca.c UnderFLOw error
22075
 TMD3_RESTMD3_RES 0x2000 depca.c REServed
22076
 TMD3_LCOLTMD3_LCOL 0x1000 depca.c Late COLlision
22077
 TMD3_LCARTMD3_LCAR 0x0800 depca.c Loss of CARrier
22078
 TMD3_RTRYTMD3_RTRY 0x0400 depca.c ReTRY error
22079
 PROBE_LENGTHPROBE_LENGTH 32 depca.c 　
22080
 NUM_RX_DESCNUM_RX_DESC 2 depca.c Number of RX descriptors
22081
 NUM_TX_DESCNUM_TX_DESC 2 depca.c Number of TX descriptors
22082
 RX_BUFF_SZRX_BUFF_SZ 1536 depca.c Buffer size for each Rx buffer
22083
 TX_BUFF_SZTX_BUFF_SZ 1536 depca.c Buffer size for each Tx buffer
22084
 DEPCA_MODELDEPCA_MODEL DEPCA depca.c 　
22085
 DEPCA_RAM_BASEDEPCA_RAM_BASE 0xd0000 depca.c 　
22086
 ALIGN4ALIGN4 ((u32)4 - 1) depca.c 1 longword align
22087
 ALIGN8ALIGN8 ((u32)8 - 1) depca.c 2 longword (quadword) align
22088
 ALIGNALIGN ALIGN8 depca.c Keep the LANCE happy...
22089
 LA_MASKLA_MASK 0x0000ffff depca.c LANCE address mask for mapping network RAM
22090
 PCI_DM9132_IDPCI_DM9132_ID 0x91321282 dmfe.c Davicom DM9132 ID
22091
 PCI_DM9102_IDPCI_DM9102_ID 0x91021282 dmfe.c Davicom DM9102 ID
22092
 PCI_DM9100_IDPCI_DM9100_ID 0x91001282 dmfe.c Davicom DM9100 ID
22093
 PCI_DM9009_IDPCI_DM9009_ID 0x90091282 dmfe.c Davicom DM9009 ID
22094
 DM9102_IO_SIZEDM9102_IO_SIZE 0x80 dmfe.c 　
22095
 DM9102A_IO_SIZEDM9102A_IO_SIZE 0x100 dmfe.c 　
22096
 TX_MAX_SEND_CNTTX_MAX_SEND_CNT 0x1 dmfe.c Maximum tx packet per time
22097
 TX_DESC_CNTTX_DESC_CNT 0x10 dmfe.c Allocated Tx descriptors
22098
 RX_DESC_CNTRX_DESC_CNT 0x20 dmfe.c Allocated Rx descriptors
22099
 TX_FREE_DESC_CNTTX_FREE_DESC_CNT (TX_DESC_CNT - 2) dmfe.c Max TX packet count
22100
 TX_WAKE_DESC_CNTTX_WAKE_DESC_CNT (TX_DESC_CNT - 3) dmfe.c TX wakeup count
22101
 DESC_ALL_CNTDESC_ALL_CNT (TX_DESC_CNT + RX_DESC_CNT) dmfe.c 　
22102
 TX_BUF_ALLOCTX_BUF_ALLOC 0x600 dmfe.c 　
22103
 RX_ALLOC_SIZERX_ALLOC_SIZE 0x620 dmfe.c 　
22104
 DM910X_RESETDM910X_RESET 1 dmfe.c 　
22105
 CR0_DEFAULTCR0_DEFAULT 0x00E00000 dmfe.c TX & RX burst mode
22106
 CR6_DEFAULTCR6_DEFAULT 0x00080000 dmfe.c HD
22107
 CR7_DEFAULTCR7_DEFAULT 0x180c1 dmfe.c 　
22108
 CR15_DEFAULTCR15_DEFAULT 0x06 dmfe.c TxJabber RxWatchdog
22109
 TDES0_ERR_MASKTDES0_ERR_MASK 0x4302 dmfe.c TXJT, LC, EC, FUE
22110
 MAX_PACKET_SIZEMAX_PACKET_SIZE 1514 dmfe.c 　
22111
 DMFE_MAX_MULTICASTDMFE_MAX_MULTICAST 14 dmfe.c 　
22112
 RX_COPY_SIZERX_COPY_SIZE 100 dmfe.c 　
22113
 MAX_CHECK_PACKETMAX_CHECK_PACKET 0x8000 dmfe.c 　
22114
 DM9801_NOISE_FLOORDM9801_NOISE_FLOOR 8 dmfe.c 　
22115
 DM9802_NOISE_FLOORDM9802_NOISE_FLOOR 5 dmfe.c 　
22116
 DMFE_10MHFDMFE_10MHF 0 dmfe.c 　
22117
 DMFE_100MHFDMFE_100MHF 1 dmfe.c 　
22118
 DMFE_10MFDDMFE_10MFD 4 dmfe.c 　
22119
 DMFE_100MFDDMFE_100MFD 5 dmfe.c 　
22120
 DMFE_AUTODMFE_AUTO 8 dmfe.c 　
22121
 DMFE_1M_HPNADMFE_1M_HPNA 0x10 dmfe.c 　
22122
 DMFE_TXTH_72DMFE_TXTH_72 0x400000 dmfe.c TX TH 72 byte
22123
 DMFE_TXTH_96DMFE_TXTH_96 0x404000 dmfe.c TX TH 96 byte
22124
 DMFE_TXTH_128DMFE_TXTH_128 0x0000 dmfe.c TX TH 128 byte
22125
 DMFE_TXTH_256DMFE_TXTH_256 0x4000 dmfe.c TX TH 256 byte
22126
 DMFE_TXTH_512DMFE_TXTH_512 0x8000 dmfe.c TX TH 512 byte
22127
 DMFE_TXTH_1KDMFE_TXTH_1K 0xC000 dmfe.c TX TH 1K byte
22128
 DMFE_TIMER_WUTDMFE_TIMER_WUT (jiffies + HZ * 1) dmfe.c timer wakeup time : 1 second
22129
 DMFE_TX_TIMEOUTDMFE_TX_TIMEOUT ((3*HZ)/2) dmfe.c tx packet time-out time 1.5 s"
22130
 DMFE_TX_KICKDMFE_TX_KICK (HZ/2) dmfe.c tx packet Kick-out time 0.5 s"
22131
 CR9_SROM_READCR9_SROM_READ 0x4800 dmfe.c 　
22132
 CR9_SRCSCR9_SRCS 0x1 dmfe.c 　
22133
 CR9_SRCLKCR9_SRCLK 0x2 dmfe.c 　
22134
 CR9_CRDOUTCR9_CRDOUT 0x8 dmfe.c 　
22135
 SROM_DATA_0SROM_DATA_0 0x0 dmfe.c 　
22136
 SROM_DATA_1SROM_DATA_1 0x4 dmfe.c 　
22137
 PHY_DATA_1PHY_DATA_1 0x20000 dmfe.c 　
22138
 PHY_DATA_0PHY_DATA_0 0x00000 dmfe.c 　
22139
 MDCLKHMDCLKH 0x10000 dmfe.c 　
22140
 PHY_POWER_DOWNPHY_POWER_DOWN 0x800 dmfe.c 　
22141
 SROM_V41_CODESROM_V41_CODE 0x14 dmfe.c 　
22142
 DEVICEDEVICE net_device dmfe.c 　
22143
 txdtxd dmfe_bufs.txd dmfe.c 　
22144
 txbtxb dmfe_bufs.txb dmfe.c 　
22145
 rxdrxd dmfe_bufs.rxd dmfe.c 　
22146
 rxbrxb dmfe_bufs.rxb dmfe.c 　
22147
 board_foundboard_found 1 dmfe.c 　
22148
 valid_linkvalid_link 0 dmfe.c 　
22149
 LAN595LAN595 0 eepro.c 　
22150
 LAN595TXLAN595TX 1 eepro.c 　
22151
 LAN595FXLAN595FX 2 eepro.c 　
22152
 LAN595FX_10ISALAN595FX_10ISA 3 eepro.c 　
22153
 SLOW_DOWNSLOW_DOWN inb(0x80); eepro.c 　
22154
 SA_ADDR0SA_ADDR0 0x00 eepro.c Etherexpress Pro/10
22155
 SA_ADDR1SA_ADDR1 0xaa eepro.c 　
22156
 SA_ADDR2SA_ADDR2 0x00 eepro.c 　
22157
 ee_PnPee_PnP 0 eepro.c Plug 'n Play enable bit
22158
 ee_Word1ee_Word1 1 eepro.c Word 1?
22159
 ee_BusWidthee_BusWidth 2 eepro.c 8/16 bit
22160
 ee_FlashAddree_FlashAddr 3 eepro.c Flash Address
22161
 ee_FlashMaskee_FlashMask 0x7 eepro.c Mask
22162
 ee_AutoIOee_AutoIO 6 eepro.c 　
22163
 ee_reserved0ee_reserved0 7 eepro.c =0!
22164
 ee_Flashee_Flash 8 eepro.c Flash there?
22165
 ee_AutoNegee_AutoNeg 9 eepro.c Auto Negotiation enabled?
22166
 ee_IO0ee_IO0 10 eepro.c IO Address LSB
22167
 ee_IO0Maskee_IO0Mask 0x eepro.c ...
22168
 ee_IO1ee_IO1 15 eepro.c IO MSB
22169
 ee_IntSelee_IntSel 0 eepro.c Interrupt
22170
 ee_IntMaskee_IntMask 0x7 eepro.c 　
22171
 ee_LIee_LI 3 eepro.c Link Integrity 0= enabled
22172
 ee_PCee_PC 4 eepro.c Polarity Correction 0= enabled
22173
 ee_TPE_AUIee_TPE_AUI 5 eepro.c PortSelection 1=TPE
22174
 ee_Jabberee_Jabber 6 eepro.c Jabber prevention 0= enabled
22175
 ee_AutoPortee_AutoPort 7 eepro.c Auto Port Selection 1= Disabled
22176
 ee_SMOUTee_SMOUT 8 eepro.c SMout Pin Control 0= Input
22177
 ee_PROMee_PROM 9 eepro.c Flash EPROM / PROM 0=Flash
22178
 ee_reserved1ee_reserved1 10 eepro.c .. 12 =0!
22179
 ee_AltReadyee_AltReady 13 eepro.c Alternate Ready, 0=normal
22180
 ee_reserved2ee_reserved2 14 eepro.c =0!
22181
 ee_Duplexee_Duplex 15 eepro.c 　
22182
 ee_IA5ee_IA5 0 eepro.c bit start for individual Addr Byte 5
22183
 ee_IA4ee_IA4 8 eepro.c bit start for individual Addr Byte 5
22184
 ee_IA3ee_IA3 0 eepro.c bit start for individual Addr Byte 5
22185
 ee_IA2ee_IA2 8 eepro.c bit start for individual Addr Byte 5
22186
 ee_IA1ee_IA1 0 eepro.c bit start for individual Addr Byte 5
22187
 ee_IA0ee_IA0 8 eepro.c bit start for individual Addr Byte 5
22188
 ee_BNC_TPEee_BNC_TPE 0 eepro.c 0=TPE
22189
 ee_BootTypeee_BootType 1 eepro.c 00=None, 01=IPX, 10=ODI, 11=NDIS
22190
 ee_BootTypeMaskee_BootTypeMask 0x3 eepro.c 　
22191
 ee_NumConnee_NumConn 3 eepro.c Number of Connections 0= One or Two
22192
 ee_FlashSockee_FlashSock 4 eepro.c Presence of Flash Socket 0= Present
22193
 ee_PortTPEee_PortTPE 5 eepro.c 　
22194
 ee_PortBNCee_PortBNC 6 eepro.c 　
22195
 ee_PortAUIee_PortAUI 7 eepro.c 　
22196
 ee_PowerMgtee_PowerMgt 10 eepro.c 0= disabled
22197
 ee_CPee_CP 13 eepro.c Concurrent Processing
22198
 ee_CPMaskee_CPMask 0x7 eepro.c 　
22199
 ee_Steppingee_Stepping 0 eepro.c Stepping info
22200
 ee_StepMaskee_StepMask 0x0F eepro.c 　
22201
 ee_BoardIDee_BoardID 4 eepro.c Manucaturer Board ID, reserved
22202
 ee_BoardMaskee_BoardMask 0x0FFF eepro.c 　
22203
 ee_INT_TO_IRQee_INT_TO_IRQ 0 eepro.c int to IRQ Mapping = 0x1EB8 for Pro/10+
22204
 ee_FX_INT2IRQee_FX_INT2IRQ 0x1EB8 eepro.c the _only_ mapping allowed for FX chips
22205
 ee_SIZEee_SIZE 0x40 eepro.c total EEprom Size
22206
 ee_Checksumee_Checksum 0xBABA eepro.c initial and final value for adding checksum
22207
 ee_addr_vendoree_addr_vendor 0x10 eepro.c Word offset for EISA Vendor ID
22208
 ee_addr_idee_addr_id 0x11 eepro.c Word offset for Card ID
22209
 ee_addr_SNee_addr_SN 0x12 eepro.c Serial Number
22210
 ee_addr_CRC_8ee_addr_CRC_8 0x14 eepro.c CRC over last thee Bytes
22211
 ee_vendor_intel0ee_vendor_intel0 0x25 eepro.c Vendor ID Intel
22212
 ee_vendor_intel1ee_vendor_intel1 0xD4 eepro.c 　
22213
 ee_id_eepro10p0ee_id_eepro10p0 0x10 eepro.c ID for eepro/10+
22214
 ee_id_eepro10p1ee_id_eepro10p1 0x31 eepro.c 　
22215
 RAM_SIZERAM_SIZE 0x8000 eepro.c 　
22216
 RCV_HEADERRCV_HEADER 8 eepro.c 　
22217
 RCV_DEFAULT_RAMRCV_DEFAULT_RAM 0x6000 eepro.c 　
22218
 RCV_RAMRCV_RAM rcv_ram eepro.c 　
22219
 XMT_HEADERXMT_HEADER 8 eepro.c 　
22220
 XMT_RAMXMT_RAM (RAM_SIZE - RCV_RAM) eepro.c 　
22221
 XMT_STARTXMT_START ((rcv_start + RCV_RAM) % RAM_SIZE) eepro.c 　
22222
 RCV_LOWER_LIMITRCV_LOWER_LIMIT (rcv_start >> 8) eepro.c 　
22223
 RCV_UPPER_LIMITRCV_UPPER_LIMIT (((rcv_start + RCV_RAM) - 2) >> 8) eepro.c 　
22224
 XMT_LOWER_LIMITXMT_LOWER_LIMIT (XMT_START >> 8) eepro.c 　
22225
 XMT_UPPER_LIMITXMT_UPPER_LIMIT (((XMT_START + XMT_RAM) - 2) >> 8) eepro.c 　
22226
 RCV_START_PRORCV_START_PRO 0x00 eepro.c 　
22227
 RCV_START_10RCV_START_10 XMT_RAM eepro.c 　
22228
 RCV_DONERCV_DONE 0x0008 eepro.c 　
22229
 RX_OKRX_OK 0x2000 eepro.c 　
22230
 RX_ERRORRX_ERROR 0x0d81 eepro.c 　
22231
 TX_DONE_BITTX_DONE_BIT 0x0080 eepro.c 　
22232
 CHAIN_BITCHAIN_BIT 0x8000 eepro.c 　
22233
 XMT_STATUSXMT_STATUS 0x02 eepro.c 　
22234
 XMT_CHAINXMT_CHAIN 0x04 eepro.c 　
22235
 XMT_COUNTXMT_COUNT 0x06 eepro.c 　
22236
 BANK0_SELECTBANK0_SELECT 0x00 eepro.c 　
22237
 BANK1_SELECTBANK1_SELECT 0x40 eepro.c 　
22238
 BANK2_SELECTBANK2_SELECT 0x80 eepro.c 　
22239
 COMMAND_REGCOMMAND_REG 0x00 eepro.c Register 0
22240
 MC_SETUPMC_SETUP 0x03 eepro.c 　
22241
 XMT_CMDXMT_CMD 0x04 eepro.c 　
22242
 DIAGNOSE_CMDDIAGNOSE_CMD 0x07 eepro.c 　
22243
 RCV_ENABLE_CMDRCV_ENABLE_CMD 0x08 eepro.c 　
22244
 RCV_DISABLE_CMDRCV_DISABLE_CMD 0x0a eepro.c 　
22245
 STOP_RCV_CMDSTOP_RCV_CMD 0x0b eepro.c 　
22246
 RESET_CMDRESET_CMD 0x0e eepro.c 　
22247
 POWER_DOWN_CMDPOWER_DOWN_CMD 0x18 eepro.c 　
22248
 RESUME_XMT_CMDRESUME_XMT_CMD 0x1c eepro.c 　
22249
 SEL_RESET_CMDSEL_RESET_CMD 0x1e eepro.c 　
22250
 STATUS_REGSTATUS_REG 0x01 eepro.c Register 1
22251
 RX_INTRX_INT 0x02 eepro.c 　
22252
 TX_INTTX_INT 0x04 eepro.c 　
22253
 EXEC_STATUSEXEC_STATUS 0x30 eepro.c 　
22254
 ID_REGID_REG 0x02 eepro.c Register 2
22255
 R_ROBIN_BITSR_ROBIN_BITS 0xc0 eepro.c round robin counter
22256
 ID_REG_MASKID_REG_MASK 0x2c eepro.c 　
22257
 ID_REG_SIGID_REG_SIG 0x24 eepro.c 　
22258
 AUTO_ENABLEAUTO_ENABLE 0x10 eepro.c 　
22259
 INT_MASK_REGINT_MASK_REG 0x03 eepro.c Register 3
22260
 RX_STOP_MASKRX_STOP_MASK 0x01 eepro.c 　
22261
 RX_MASKRX_MASK 0x02 eepro.c 　
22262
 TX_MASKTX_MASK 0x04 eepro.c 　
22263
 EXEC_MASKEXEC_MASK 0x08 eepro.c 　
22264
 ALL_MASKALL_MASK 0x0f eepro.c 　
22265
 IO_32_BITIO_32_BIT 0x10 eepro.c 　
22266
 RCV_BARRCV_BAR 0x04 eepro.c The following are word (16-bit) registers
22267
 RCV_STOPRCV_STOP 0x06 eepro.c 　
22268
 XMT_BAR_PROXMT_BAR_PRO 0x0a eepro.c 　
22269
 XMT_BAR_10XMT_BAR_10 0x0b eepro.c 　
22270
 HOST_ADDRESS_REGHOST_ADDRESS_REG 0x0c eepro.c 　
22271
 IO_PORTIO_PORT 0x0e eepro.c 　
22272
 IO_PORT_32_BITIO_PORT_32_BIT 0x0c eepro.c 　
22273
 REG1REG1 0x01 eepro.c 　
22274
 WORD_WIDTHWORD_WIDTH 0x02 eepro.c 　
22275
 INT_ENABLEINT_ENABLE 0x80 eepro.c 　
22276
 INT_NO_REGINT_NO_REG 0x02 eepro.c 　
22277
 RCV_LOWER_LIMIT_REGRCV_LOWER_LIMIT_REG 0x08 eepro.c 　
22278
 RCV_UPPER_LIMIT_REGRCV_UPPER_LIMIT_REG 0x09 eepro.c 　
22279
 XMT_LOWER_LIMIT_REG_PROXMT_LOWER_LIMIT_REG_PRO 0x0a eepro.c 　
22280
 XMT_UPPER_LIMIT_REG_PROXMT_UPPER_LIMIT_REG_PRO 0x0b eepro.c 　
22281
 XMT_LOWER_LIMIT_REG_10XMT_LOWER_LIMIT_REG_10 0x0b eepro.c 　
22282
 XMT_UPPER_LIMIT_REG_10XMT_UPPER_LIMIT_REG_10 0x0a eepro.c 　
22283
 XMT_Chain_IntXMT_Chain_Int 0x20 eepro.c Interrupt at the end of the transmit chain
22284
 XMT_Chain_ErrStopXMT_Chain_ErrStop 0x40 eepro.c Interrupt at the end of the chain even if there are errors
22285
 RCV_Discard_BadFrameRCV_Discard_BadFrame 0x80 eepro.c Throw bad frames away, and continue to receive others
22286
 REG2REG2 0x02 eepro.c 　
22287
 PRMSC_ModePRMSC_Mode 0x01 eepro.c 　
22288
 Multi_IAMulti_IA 0x20 eepro.c 　
22289
 REG3REG3 0x03 eepro.c 　
22290
 TPE_BITTPE_BIT 0x04 eepro.c 　
22291
 BNC_BITBNC_BIT 0x20 eepro.c 　
22292
 REG13REG13 0x0d eepro.c 　
22293
 FDXFDX 0x00 eepro.c 　
22294
 A_N_ENABLEA_N_ENABLE 0x02 eepro.c 　
22295
 I_ADD_REG0I_ADD_REG0 0x04 eepro.c 　
22296
 I_ADD_REG1I_ADD_REG1 0x05 eepro.c 　
22297
 I_ADD_REG2I_ADD_REG2 0x06 eepro.c 　
22298
 I_ADD_REG3I_ADD_REG3 0x07 eepro.c 　
22299
 I_ADD_REG4I_ADD_REG4 0x08 eepro.c 　
22300
 I_ADD_REG5I_ADD_REG5 0x09 eepro.c 　
22301
 EEPROM_REG_PROEEPROM_REG_PRO 0x0a eepro.c 　
22302
 EEPROM_REG_10EEPROM_REG_10 0x0b eepro.c 　
22303
 EESKEESK 0x01 eepro.c 　
22304
 EECSEECS 0x02 eepro.c 　
22305
 EEDIEEDI 0x04 eepro.c 　
22306
 EEDOEEDO 0x08 eepro.c 　
22307
 EE_READ_CMDEE_READ_CMD (6 << 6) eepro.c 　
22308
 INTERRUPT_MASKINTERRUPT_MASK ( SCBMaskEarlyRx | SCBMaskFlowCtl ) eepro100.c 　
22309
 RFD_STATUSRFD_STATUS ( RFD_OK | RFDRxCol | RFDRxErr | RFDShort | \ RFDDMAOverrun | RFDNoBufs | RFDCRCError ) eepro100.c 　
22310
 TX_RING_SIZETX_RING_SIZE 2 epic100.c use at least 2 buffers for TX
22311
 RX_RING_SIZERX_RING_SIZE 2 epic100.c 　
22312
 PKT_BUF_SZPKT_BUF_SZ 1536 epic100.c Size of each temporary Tx/Rx buffer.
22313
 EPIC_DEBUGEPIC_DEBUG 0 epic100.c debug level
22314
 TD_STDFLAGSTD_STDFLAGS TD_LASTDESC epic100.c 　
22315
 rx_ringrx_ring epic100_bufs.rx_ring epic100.c 　
22316
 tx_ringtx_ring epic100_bufs.tx_ring epic100.c 　
22317
 rx_packetrx_packet epic100_bufs.rx_packet epic100.c 　
22318
 tx_packettx_packet epic100_bufs.tx_packet epic100.c 　
22319
 EE_SHIFT_CLKEE_SHIFT_CLK 0x04 epic100.c EEPROM shift clock.
22320
 EE_CSEE_CS 0x02 epic100.c EEPROM chip select.
22321
 EE_DATA_WRITEEE_DATA_WRITE 0x08 epic100.c EEPROM chip data in.
22322
 EE_WRITE_0EE_WRITE_0 0x01 epic100.c 　
22323
 EE_WRITE_1EE_WRITE_1 0x09 epic100.c 　
22324
 EE_DATA_READEE_DATA_READ 0x10 epic100.c EEPROM chip data out.
22325
 EE_ENBEE_ENB (0x0001 | EE_CS) epic100.c 　
22326
 EE_WRITE_CMDEE_WRITE_CMD (5 << 6) epic100.c 　
22327
 EE_READ_CMDEE_READ_CMD (6 << 6) epic100.c 　
22328
 EE_ERASE_CMDEE_ERASE_CMD (7 << 6) epic100.c 　
22329
 MII_READOPMII_READOP 1 epic100.c 　
22330
 MII_WRITEOPMII_WRITEOP 2 epic100.c 　
22331
 FALCON_USE_IO_BARFALCON_USE_IO_BAR 0 etherfabric.c 　
22332
 HZHZ 100 etherfabric.c 　
22333
 EFAB_BYTEEFAB_BYTE 1 etherfabric.c 　
22334
 GMII_PSSRGMII_PSSR 0x11 etherfabric.c PHY-specific status register
22335
 LPA_EF_1000FULLLPA_EF_1000FULL 0x00020000 etherfabric.c 　
22336
 LPA_EF_1000HALFLPA_EF_1000HALF 0x00010000 etherfabric.c 　
22337
 LPA_EF_10000FULLLPA_EF_10000FULL 0x00040000 etherfabric.c 　
22338
 LPA_EF_10000HALFLPA_EF_10000HALF 0x00080000 etherfabric.c 　
22339
 LPA_100LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) etherfabric.c 　
22340
 LPA_EF_1000LPA_EF_1000 ( LPA_EF_1000FULL | LPA_EF_1000HALF ) etherfabric.c 　
22341
 LPA_EF_10000LPA_EF_10000 ( LPA_EF_10000FULL | LPA_EF_10000HALF ) etherfabric.c 　
22342
 LPA_EF_DUPLEXLPA_EF_DUPLEX ( LPA_10FULL | LPA_100FULL | LPA_EF_1000FULL | \ LPA_EF_10000FULL ) etherfabric.c 　
22343
 LPA_OTHERLPA_OTHER ~( LPA_10FULL | LPA_10HALF | LPA_100FULL | \ LPA_100HALF | LPA_EF_1000FULL | LPA_EF_1000HALF ) etherfabric.c 　
22344
 PSSR_LSTATUSPSSR_LSTATUS 0x0400 etherfabric.c Bit 10 - link status
22345
 MDIO_MMD_PMAPMDMDIO_MMD_PMAPMD (1) etherfabric.c 　
22346
 MDIO_MMD_WISMDIO_MMD_WIS (2) etherfabric.c 　
22347
 MDIO_MMD_PCSMDIO_MMD_PCS (3) etherfabric.c 　
22348
 MDIO_MMD_PHYXSMDIO_MMD_PHYXS (4) etherfabric.c 　
22349
 MDIO_MMD_DTEXSMDIO_MMD_DTEXS (5) etherfabric.c 　
22350
 MDIO_MMD_TCMDIO_MMD_TC (6) etherfabric.c 　
22351
 MDIO_MMD_ANMDIO_MMD_AN (7) etherfabric.c 　
22352
 MDIO_MMDREG_CTRL1MDIO_MMDREG_CTRL1 (0) etherfabric.c 　
22353
 MDIO_MMDREG_STAT1MDIO_MMDREG_STAT1 (1) etherfabric.c 　
22354
 MDIO_MMDREG_DEVS0MDIO_MMDREG_DEVS0 (5) etherfabric.c 　
22355
 MDIO_MMDREG_STAT2MDIO_MMDREG_STAT2 (8) etherfabric.c 　
22356
 MDIO_MMDREG_CTRL1_RESET_LBNMDIO_MMDREG_CTRL1_RESET_LBN (15) etherfabric.c 　
22357
 MDIO_MMDREG_CTRL1_RESET_WIDTHMDIO_MMDREG_CTRL1_RESET_WIDTH (1) etherfabric.c 　
22358
 MDIO_MMDREG_STAT1_FAULT_LBNMDIO_MMDREG_STAT1_FAULT_LBN (7) etherfabric.c 　
22359
 MDIO_MMDREG_STAT1_FAULT_WIDTHMDIO_MMDREG_STAT1_FAULT_WIDTH (1) etherfabric.c 　
22360
 MDIO_MMDREG_STAT1_LINK_LBNMDIO_MMDREG_STAT1_LINK_LBN (2) etherfabric.c 　
22361
 MDIO_MMDREG_STAT1_LINK_WIDTHMDIO_MMDREG_STAT1_LINK_WIDTH (1) etherfabric.c 　
22362
 MDIO_MMDREG_DEVS0_DTEXSMDIO_MMDREG_DEVS0_DTEXS DEV_PRESENT_BIT(MDIO_MMD_DTEXS) etherfabric.c 　
22363
 MDIO_MMDREG_DEVS0_PHYXSMDIO_MMDREG_DEVS0_PHYXS DEV_PRESENT_BIT(MDIO_MMD_PHYXS) etherfabric.c 　
22364
 MDIO_MMDREG_DEVS0_PCSMDIO_MMDREG_DEVS0_PCS DEV_PRESENT_BIT(MDIO_MMD_PCS) etherfabric.c 　
22365
 MDIO_MMDREG_DEVS0_WISMDIO_MMDREG_DEVS0_WIS DEV_PRESENT_BIT(MDIO_MMD_WIS) etherfabric.c 　
22366
 MDIO_MMDREG_DEVS0_PMAPMDMDIO_MMDREG_DEVS0_PMAPMD DEV_PRESENT_BIT(MDIO_MMD_PMAPMD) etherfabric.c 　
22367
 MDIO_MMDREG_DEVS0_ANMDIO_MMDREG_DEVS0_AN DEV_PRESENT_BIT(MDIO_MMD_AN) etherfabric.c 　
22368
 MDIO_MMDREG_STAT2_PRESENT_VALMDIO_MMDREG_STAT2_PRESENT_VAL (2) etherfabric.c 　
22369
 MDIO_MMDREG_STAT2_PRESENT_LBNMDIO_MMDREG_STAT2_PRESENT_LBN (14) etherfabric.c 　
22370
 MDIO_MMDREG_STAT2_PRESENT_WIDTHMDIO_MMDREG_STAT2_PRESENT_WIDTH (2) etherfabric.c 　
22371
 MDIO_PHYXS_LANE_STATEMDIO_PHYXS_LANE_STATE (0x18) etherfabric.c 　
22372
 MDIO_PHYXS_LANE_ALIGNED_LBNMDIO_PHYXS_LANE_ALIGNED_LBN (12) etherfabric.c 　
22373
 MDIO_PHYXS_LANE_SYNC0_LBNMDIO_PHYXS_LANE_SYNC0_LBN (0) etherfabric.c 　
22374
 MDIO_PHYXS_LANE_SYNC1_LBNMDIO_PHYXS_LANE_SYNC1_LBN (1) etherfabric.c 　
22375
 MDIO_PHYXS_LANE_SYNC2_LBNMDIO_PHYXS_LANE_SYNC2_LBN (2) etherfabric.c 　
22376
 MDIO_PHYXS_LANE_SYNC3_LBNMDIO_PHYXS_LANE_SYNC3_LBN (3) etherfabric.c 　
22377
 MDIO45_RESET_TRIESMDIO45_RESET_TRIES 100 etherfabric.c 　
22378
 MDIO45_RESET_SPINTIMEMDIO45_RESET_SPINTIME 10 etherfabric.c 　
22379
 FCN_IOM_IND_ADR_REGFCN_IOM_IND_ADR_REG 0x0 etherfabric.c 　
22380
 FCN_IOM_IND_DAT_REGFCN_IOM_IND_DAT_REG 0x4 etherfabric.c 　
22381
 FCN_ADR_REGION_REG_KERFCN_ADR_REGION_REG_KER 0x00 etherfabric.c 　
22382
 FCN_ADR_REGION0_LBNFCN_ADR_REGION0_LBN 0 etherfabric.c 　
22383
 FCN_ADR_REGION0_WIDTHFCN_ADR_REGION0_WIDTH 18 etherfabric.c 　
22384
 FCN_ADR_REGION1_LBNFCN_ADR_REGION1_LBN 32 etherfabric.c 　
22385
 FCN_ADR_REGION1_WIDTHFCN_ADR_REGION1_WIDTH 18 etherfabric.c 　
22386
 FCN_ADR_REGION2_LBNFCN_ADR_REGION2_LBN 64 etherfabric.c 　
22387
 FCN_ADR_REGION2_WIDTHFCN_ADR_REGION2_WIDTH 18 etherfabric.c 　
22388
 FCN_ADR_REGION3_LBNFCN_ADR_REGION3_LBN 96 etherfabric.c 　
22389
 FCN_ADR_REGION3_WIDTHFCN_ADR_REGION3_WIDTH 18 etherfabric.c 　
22390
 FCN_INT_EN_REG_KERFCN_INT_EN_REG_KER 0x0010 etherfabric.c 　
22391
 FCN_MEM_PERR_INT_EN_KER_LBNFCN_MEM_PERR_INT_EN_KER_LBN 5 etherfabric.c 　
22392
 FCN_MEM_PERR_INT_EN_KER_WIDTHFCN_MEM_PERR_INT_EN_KER_WIDTH 1 etherfabric.c 　
22393
 FCN_KER_INT_CHAR_LBNFCN_KER_INT_CHAR_LBN 4 etherfabric.c 　
22394
 FCN_KER_INT_CHAR_WIDTHFCN_KER_INT_CHAR_WIDTH 1 etherfabric.c 　
22395
 FCN_KER_INT_KER_LBNFCN_KER_INT_KER_LBN 3 etherfabric.c 　
22396
 FCN_KER_INT_KER_WIDTHFCN_KER_INT_KER_WIDTH 1 etherfabric.c 　
22397
 FCN_ILL_ADR_ERR_INT_EN_KER_LBNFCN_ILL_ADR_ERR_INT_EN_KER_LBN 2 etherfabric.c 　
22398
 FCN_ILL_ADR_ERR_INT_EN_KER_WIDTFCN_ILL_ADR_ERR_INT_EN_KER_WIDT 1 etherfabric.c 　
22399
 FCN_SRM_PERR_INT_EN_KER_LBNFCN_SRM_PERR_INT_EN_KER_LBN 1 etherfabric.c 　
22400
 FCN_SRM_PERR_INT_EN_KER_WIDTHFCN_SRM_PERR_INT_EN_KER_WIDTH 1 etherfabric.c 　
22401
 FCN_DRV_INT_EN_KER_LBNFCN_DRV_INT_EN_KER_LBN 0 etherfabric.c 　
22402
 FCN_DRV_INT_EN_KER_WIDTHFCN_DRV_INT_EN_KER_WIDTH 1 etherfabric.c 　
22403
 FCN_INT_ADR_REG_KERFCN_INT_ADR_REG_KER 0x0030 etherfabric.c 　
22404
 FCN_INT_ADR_KER_LBNFCN_INT_ADR_KER_LBN 0 etherfabric.c 　
22405
 FCN_INT_ADR_KER_WIDTHFCN_INT_ADR_KER_WIDTH EFAB_DMA_TYPE_WIDTH ( 64 ) etherfabric.c 　
22406
 INT_ISR0_B0INT_ISR0_B0 0x90 etherfabric.c 　
22407
 INT_ISR1_B0INT_ISR1_B0 0xA0 etherfabric.c 　
22408
 FCN_INT_ACK_KER_REG_A1FCN_INT_ACK_KER_REG_A1 0x0050 etherfabric.c 　
22409
 INT_ACK_DUMMY_DATA_LBNINT_ACK_DUMMY_DATA_LBN 0 etherfabric.c 　
22410
 INT_ACK_DUMMY_DATA_WIDTHINT_ACK_DUMMY_DATA_WIDTH 32 etherfabric.c 　
22411
 WORK_AROUND_BROKEN_PCI_READS_REWORK_AROUND_BROKEN_PCI_READS_RE 0x0070 etherfabric.c 　
22412
 FCN_HW_INIT_REG_KERFCN_HW_INIT_REG_KER 0x00c0 etherfabric.c 　
22413
 FCN_BCSR_TARGET_MASK_LBNFCN_BCSR_TARGET_MASK_LBN 101 etherfabric.c 　
22414
 FCN_BCSR_TARGET_MASK_WIDTHFCN_BCSR_TARGET_MASK_WIDTH 4 etherfabric.c 　
22415
 FCN_EE_SPI_HCMD_REGFCN_EE_SPI_HCMD_REG 0x0100 etherfabric.c 　
22416
 FCN_EE_SPI_HCMD_CMD_EN_LBNFCN_EE_SPI_HCMD_CMD_EN_LBN 31 etherfabric.c 　
22417
 FCN_EE_SPI_HCMD_CMD_EN_WIDTHFCN_EE_SPI_HCMD_CMD_EN_WIDTH 1 etherfabric.c 　
22418
 FCN_EE_WR_TIMER_ACTIVE_LBNFCN_EE_WR_TIMER_ACTIVE_LBN 28 etherfabric.c 　
22419
 FCN_EE_WR_TIMER_ACTIVE_WIDTHFCN_EE_WR_TIMER_ACTIVE_WIDTH 1 etherfabric.c 　
22420
 FCN_EE_SPI_HCMD_SF_SEL_LBNFCN_EE_SPI_HCMD_SF_SEL_LBN 24 etherfabric.c 　
22421
 FCN_EE_SPI_HCMD_SF_SEL_WIDTHFCN_EE_SPI_HCMD_SF_SEL_WIDTH 1 etherfabric.c 　
22422
 FCN_EE_SPI_EEPROMFCN_EE_SPI_EEPROM 0 etherfabric.c 　
22423
 FCN_EE_SPI_FLASHFCN_EE_SPI_FLASH 1 etherfabric.c 　
22424
 FCN_EE_SPI_HCMD_DABCNT_LBNFCN_EE_SPI_HCMD_DABCNT_LBN 16 etherfabric.c 　
22425
 FCN_EE_SPI_HCMD_DABCNT_WIDTHFCN_EE_SPI_HCMD_DABCNT_WIDTH 5 etherfabric.c 　
22426
 FCN_EE_SPI_HCMD_READ_LBNFCN_EE_SPI_HCMD_READ_LBN 15 etherfabric.c 　
22427
 FCN_EE_SPI_HCMD_READ_WIDTHFCN_EE_SPI_HCMD_READ_WIDTH 1 etherfabric.c 　
22428
 FCN_EE_SPI_READFCN_EE_SPI_READ 1 etherfabric.c 　
22429
 FCN_EE_SPI_WRITEFCN_EE_SPI_WRITE 0 etherfabric.c 　
22430
 FCN_EE_SPI_HCMD_DUBCNT_LBNFCN_EE_SPI_HCMD_DUBCNT_LBN 12 etherfabric.c 　
22431
 FCN_EE_SPI_HCMD_DUBCNT_WIDTHFCN_EE_SPI_HCMD_DUBCNT_WIDTH 2 etherfabric.c 　
22432
 FCN_EE_SPI_HCMD_ADBCNT_LBNFCN_EE_SPI_HCMD_ADBCNT_LBN 8 etherfabric.c 　
22433
 FCN_EE_SPI_HCMD_ADBCNT_WIDTHFCN_EE_SPI_HCMD_ADBCNT_WIDTH 2 etherfabric.c 　
22434
 FCN_EE_SPI_HCMD_ENC_LBNFCN_EE_SPI_HCMD_ENC_LBN 0 etherfabric.c 　
22435
 FCN_EE_SPI_HCMD_ENC_WIDTHFCN_EE_SPI_HCMD_ENC_WIDTH 8 etherfabric.c 　
22436
 FCN_EE_SPI_HADR_REGFCN_EE_SPI_HADR_REG 0x0110 etherfabric.c 　
22437
 FCN_EE_SPI_HADR_DUBYTE_LBNFCN_EE_SPI_HADR_DUBYTE_LBN 24 etherfabric.c 　
22438
 FCN_EE_SPI_HADR_DUBYTE_WIDTHFCN_EE_SPI_HADR_DUBYTE_WIDTH 8 etherfabric.c 　
22439
 FCN_EE_SPI_HADR_ADR_LBNFCN_EE_SPI_HADR_ADR_LBN 0 etherfabric.c 　
22440
 FCN_EE_SPI_HADR_ADR_WIDTHFCN_EE_SPI_HADR_ADR_WIDTH 24 etherfabric.c 　
22441
 FCN_EE_SPI_HDATA_REGFCN_EE_SPI_HDATA_REG 0x0120 etherfabric.c 　
22442
 FCN_EE_SPI_HDATA3_LBNFCN_EE_SPI_HDATA3_LBN 96 etherfabric.c 　
22443
 FCN_EE_SPI_HDATA3_WIDTHFCN_EE_SPI_HDATA3_WIDTH 32 etherfabric.c 　
22444
 FCN_EE_SPI_HDATA2_LBNFCN_EE_SPI_HDATA2_LBN 64 etherfabric.c 　
22445
 FCN_EE_SPI_HDATA2_WIDTHFCN_EE_SPI_HDATA2_WIDTH 32 etherfabric.c 　
22446
 FCN_EE_SPI_HDATA1_LBNFCN_EE_SPI_HDATA1_LBN 32 etherfabric.c 　
22447
 FCN_EE_SPI_HDATA1_WIDTHFCN_EE_SPI_HDATA1_WIDTH 32 etherfabric.c 　
22448
 FCN_EE_SPI_HDATA0_LBNFCN_EE_SPI_HDATA0_LBN 0 etherfabric.c 　
22449
 FCN_EE_SPI_HDATA0_WIDTHFCN_EE_SPI_HDATA0_WIDTH 32 etherfabric.c 　
22450
 FCN_EE_VPD_CFG_REGFCN_EE_VPD_CFG_REG 0x0140 etherfabric.c 　
22451
 FCN_EE_VPD_EN_LBNFCN_EE_VPD_EN_LBN 0 etherfabric.c 　
22452
 FCN_EE_VPD_EN_WIDTHFCN_EE_VPD_EN_WIDTH 1 etherfabric.c 　
22453
 FCN_EE_VPD_EN_AD9_MODE_LBNFCN_EE_VPD_EN_AD9_MODE_LBN 1 etherfabric.c 　
22454
 FCN_EE_VPD_EN_AD9_MODE_WIDTHFCN_EE_VPD_EN_AD9_MODE_WIDTH 1 etherfabric.c 　
22455
 FCN_EE_EE_CLOCK_DIV_LBNFCN_EE_EE_CLOCK_DIV_LBN 112 etherfabric.c 　
22456
 FCN_EE_EE_CLOCK_DIV_WIDTHFCN_EE_EE_CLOCK_DIV_WIDTH 7 etherfabric.c 　
22457
 FCN_EE_SF_CLOCK_DIV_LBNFCN_EE_SF_CLOCK_DIV_LBN 120 etherfabric.c 　
22458
 FCN_EE_SF_CLOCK_DIV_WIDTHFCN_EE_SF_CLOCK_DIV_WIDTH 7 etherfabric.c 　
22459
 FCN_NIC_STAT_REGFCN_NIC_STAT_REG 0x0200 etherfabric.c 　
22460
 FCN_ONCHIP_SRAM_LBNFCN_ONCHIP_SRAM_LBN 16 etherfabric.c 　
22461
 FCN_ONCHIP_SRAM_WIDTHFCN_ONCHIP_SRAM_WIDTH 1 etherfabric.c 　
22462
 FCN_SF_PRST_LBNFCN_SF_PRST_LBN 9 etherfabric.c 　
22463
 FCN_SF_PRST_WIDTHFCN_SF_PRST_WIDTH 1 etherfabric.c 　
22464
 FCN_EE_PRST_LBNFCN_EE_PRST_LBN 8 etherfabric.c 　
22465
 FCN_EE_PRST_WIDTHFCN_EE_PRST_WIDTH 1 etherfabric.c 　
22466
 FCN_EE_STRAP_LBNFCN_EE_STRAP_LBN 7 etherfabric.c 　
22467
 FCN_EE_STRAP_WIDTHFCN_EE_STRAP_WIDTH 1 etherfabric.c 　
22468
 FCN_PCI_PCIX_MODE_LBNFCN_PCI_PCIX_MODE_LBN 4 etherfabric.c 　
22469
 FCN_PCI_PCIX_MODE_WIDTHFCN_PCI_PCIX_MODE_WIDTH 3 etherfabric.c 　
22470
 FCN_PCI_PCIX_MODE_PCI33_DECODEFCN_PCI_PCIX_MODE_PCI33_DECODE 0 etherfabric.c 　
22471
 FCN_PCI_PCIX_MODE_PCI66_DECODEFCN_PCI_PCIX_MODE_PCI66_DECODE 1 etherfabric.c 　
22472
 FCN_PCI_PCIX_MODE_PCIX66_DECODEFCN_PCI_PCIX_MODE_PCIX66_DECODE 5 etherfabric.c 　
22473
 FCN_PCI_PCIX_MODE_PCIX100_DECODFCN_PCI_PCIX_MODE_PCIX100_DECOD 6 etherfabric.c 　
22474
 FCN_PCI_PCIX_MODE_PCIX133_DECODFCN_PCI_PCIX_MODE_PCIX133_DECOD 7 etherfabric.c 　
22475
 FCN_STRAP_ISCSI_EN_LBNFCN_STRAP_ISCSI_EN_LBN 3 etherfabric.c 　
22476
 FCN_STRAP_ISCSI_EN_WIDTHFCN_STRAP_ISCSI_EN_WIDTH 1 etherfabric.c 　
22477
 FCN_STRAP_PINS_LBNFCN_STRAP_PINS_LBN 0 etherfabric.c 　
22478
 FCN_STRAP_PINS_WIDTHFCN_STRAP_PINS_WIDTH 3 etherfabric.c 　
22479
 FCN_STRAP_10G_LBNFCN_STRAP_10G_LBN 2 etherfabric.c 　
22480
 FCN_STRAP_10G_WIDTHFCN_STRAP_10G_WIDTH 1 etherfabric.c 　
22481
 FCN_STRAP_DUAL_PORT_LBNFCN_STRAP_DUAL_PORT_LBN 1 etherfabric.c 　
22482
 FCN_STRAP_DUAL_PORT_WIDTHFCN_STRAP_DUAL_PORT_WIDTH 1 etherfabric.c 　
22483
 FCN_STRAP_PCIE_LBNFCN_STRAP_PCIE_LBN 0 etherfabric.c 　
22484
 FCN_STRAP_PCIE_WIDTHFCN_STRAP_PCIE_WIDTH 1 etherfabric.c 　
22485
 FALCON_REV_A0FALCON_REV_A0 0 etherfabric.c 　
22486
 FALCON_REV_A1FALCON_REV_A1 1 etherfabric.c 　
22487
 FALCON_REV_B0FALCON_REV_B0 2 etherfabric.c 　
22488
 FCN_GPIO_CTL_REG_KERFCN_GPIO_CTL_REG_KER 0x0210 etherfabric.c 　
22489
 FCN_GPIO_CTL_REG_KERFCN_GPIO_CTL_REG_KER 0x0210 etherfabric.c 　
22490
 FCN_GPIO3_OEN_LBNFCN_GPIO3_OEN_LBN 27 etherfabric.c 　
22491
 FCN_GPIO3_OEN_WIDTHFCN_GPIO3_OEN_WIDTH 1 etherfabric.c 　
22492
 FCN_GPIO2_OEN_LBNFCN_GPIO2_OEN_LBN 26 etherfabric.c 　
22493
 FCN_GPIO2_OEN_WIDTHFCN_GPIO2_OEN_WIDTH 1 etherfabric.c 　
22494
 FCN_GPIO1_OEN_LBNFCN_GPIO1_OEN_LBN 25 etherfabric.c 　
22495
 FCN_GPIO1_OEN_WIDTHFCN_GPIO1_OEN_WIDTH 1 etherfabric.c 　
22496
 FCN_GPIO0_OEN_LBNFCN_GPIO0_OEN_LBN 24 etherfabric.c 　
22497
 FCN_GPIO0_OEN_WIDTHFCN_GPIO0_OEN_WIDTH 1 etherfabric.c 　
22498
 FCN_GPIO3_OUT_LBNFCN_GPIO3_OUT_LBN 19 etherfabric.c 　
22499
 FCN_GPIO3_OUT_WIDTHFCN_GPIO3_OUT_WIDTH 1 etherfabric.c 　
22500
 FCN_GPIO2_OUT_LBNFCN_GPIO2_OUT_LBN 18 etherfabric.c 　
22501
 FCN_GPIO2_OUT_WIDTHFCN_GPIO2_OUT_WIDTH 1 etherfabric.c 　
22502
 FCN_GPIO1_OUT_LBNFCN_GPIO1_OUT_LBN 17 etherfabric.c 　
22503
 FCN_GPIO1_OUT_WIDTHFCN_GPIO1_OUT_WIDTH 1 etherfabric.c 　
22504
 FCN_GPIO0_OUT_LBNFCN_GPIO0_OUT_LBN 16 etherfabric.c 　
22505
 FCN_GPIO0_OUT_WIDTHFCN_GPIO0_OUT_WIDTH 1 etherfabric.c 　
22506
 FCN_GPIO3_IN_LBNFCN_GPIO3_IN_LBN 11 etherfabric.c 　
22507
 FCN_GPIO3_IN_WIDTHFCN_GPIO3_IN_WIDTH 1 etherfabric.c 　
22508
 FCN_GPIO2_IN_LBNFCN_GPIO2_IN_LBN 10 etherfabric.c 　
22509
 FCN_GPIO2_IN_WIDTHFCN_GPIO2_IN_WIDTH 1 etherfabric.c 　
22510
 FCN_GPIO1_IN_LBNFCN_GPIO1_IN_LBN 9 etherfabric.c 　
22511
 FCN_GPIO1_IN_WIDTHFCN_GPIO1_IN_WIDTH 1 etherfabric.c 　
22512
 FCN_GPIO0_IN_LBNFCN_GPIO0_IN_LBN 8 etherfabric.c 　
22513
 FCN_GPIO0_IN_WIDTHFCN_GPIO0_IN_WIDTH 1 etherfabric.c 　
22514
 FCN_FLASH_PRESENT_LBNFCN_FLASH_PRESENT_LBN 7 etherfabric.c 　
22515
 FCN_FLASH_PRESENT_WIDTHFCN_FLASH_PRESENT_WIDTH 1 etherfabric.c 　
22516
 FCN_EEPROM_PRESENT_LBNFCN_EEPROM_PRESENT_LBN 6 etherfabric.c 　
22517
 FCN_EEPROM_PRESENT_WIDTHFCN_EEPROM_PRESENT_WIDTH 1 etherfabric.c 　
22518
 FCN_BOOTED_USING_NVDEVICE_LBNFCN_BOOTED_USING_NVDEVICE_LBN 3 etherfabric.c 　
22519
 FCN_BOOTED_USING_NVDEVICE_WIDTHFCN_BOOTED_USING_NVDEVICE_WIDTH 1 etherfabric.c 　
22520
 FCN_NV_MAGIC_NUMBERFCN_NV_MAGIC_NUMBER 0xFA1C etherfabric.c 　
22521
 FCN_GLB_CTL_REG_KERFCN_GLB_CTL_REG_KER 0x0220 etherfabric.c 　
22522
 FCN_EXT_PHY_RST_CTL_LBNFCN_EXT_PHY_RST_CTL_LBN 63 etherfabric.c 　
22523
 FCN_EXT_PHY_RST_CTL_WIDTHFCN_EXT_PHY_RST_CTL_WIDTH 1 etherfabric.c 　
22524
 FCN_PCIE_SD_RST_CTL_LBNFCN_PCIE_SD_RST_CTL_LBN 61 etherfabric.c 　
22525
 FCN_PCIE_SD_RST_CTL_WIDTHFCN_PCIE_SD_RST_CTL_WIDTH 1 etherfabric.c 　
22526
 FCN_PCIE_STCK_RST_CTL_LBNFCN_PCIE_STCK_RST_CTL_LBN 59 etherfabric.c 　
22527
 FCN_PCIE_STCK_RST_CTL_WIDTHFCN_PCIE_STCK_RST_CTL_WIDTH 1 etherfabric.c 　
22528
 FCN_PCIE_NSTCK_RST_CTL_LBNFCN_PCIE_NSTCK_RST_CTL_LBN 58 etherfabric.c 　
22529
 FCN_PCIE_NSTCK_RST_CTL_WIDTHFCN_PCIE_NSTCK_RST_CTL_WIDTH 1 etherfabric.c 　
22530
 FCN_PCIE_CORE_RST_CTL_LBNFCN_PCIE_CORE_RST_CTL_LBN 57 etherfabric.c 　
22531
 FCN_PCIE_CORE_RST_CTL_WIDTHFCN_PCIE_CORE_RST_CTL_WIDTH 1 etherfabric.c 　
22532
 FCN_EE_RST_CTL_LBNFCN_EE_RST_CTL_LBN 49 etherfabric.c 　
22533
 FCN_EE_RST_CTL_WIDTHFCN_EE_RST_CTL_WIDTH 1 etherfabric.c 　
22534
 FCN_RST_EXT_PHY_LBNFCN_RST_EXT_PHY_LBN 31 etherfabric.c 　
22535
 FCN_RST_EXT_PHY_WIDTHFCN_RST_EXT_PHY_WIDTH 1 etherfabric.c 　
22536
 FCN_EXT_PHY_RST_DUR_LBNFCN_EXT_PHY_RST_DUR_LBN 1 etherfabric.c 　
22537
 FCN_EXT_PHY_RST_DUR_WIDTHFCN_EXT_PHY_RST_DUR_WIDTH 3 etherfabric.c 　
22538
 FCN_SWRST_LBNFCN_SWRST_LBN 0 etherfabric.c 　
22539
 FCN_SWRST_WIDTHFCN_SWRST_WIDTH 1 etherfabric.c 　
22540
 INCLUDE_IN_RESETINCLUDE_IN_RESET 0 etherfabric.c 　
22541
 EXCLUDE_FROM_RESETEXCLUDE_FROM_RESET 1 etherfabric.c 　
22542
 FCN_ALTERA_BUILD_REG_KERFCN_ALTERA_BUILD_REG_KER 0x0300 etherfabric.c 　
22543
 FCN_VER_MAJOR_LBNFCN_VER_MAJOR_LBN 24 etherfabric.c 　
22544
 FCN_VER_MAJOR_WIDTHFCN_VER_MAJOR_WIDTH 8 etherfabric.c 　
22545
 FCN_VER_MINOR_LBNFCN_VER_MINOR_LBN 16 etherfabric.c 　
22546
 FCN_VER_MINOR_WIDTHFCN_VER_MINOR_WIDTH 8 etherfabric.c 　
22547
 FCN_VER_BUILD_LBNFCN_VER_BUILD_LBN 0 etherfabric.c 　
22548
 FCN_VER_BUILD_WIDTHFCN_VER_BUILD_WIDTH 16 etherfabric.c 　
22549
 FCN_VER_ALL_LBNFCN_VER_ALL_LBN 0 etherfabric.c 　
22550
 FCN_VER_ALL_WIDTHFCN_VER_ALL_WIDTH 32 etherfabric.c 　
22551
 FCN_SPARE_REG_KERFCN_SPARE_REG_KER 0x310 etherfabric.c 　
22552
 FCN_MEM_PERR_EN_TX_DATA_LBNFCN_MEM_PERR_EN_TX_DATA_LBN 72 etherfabric.c 　
22553
 FCN_MEM_PERR_EN_TX_DATA_WIDTHFCN_MEM_PERR_EN_TX_DATA_WIDTH 2 etherfabric.c 　
22554
 FCN_TIMER_CMD_REG_KERFCN_TIMER_CMD_REG_KER 0x420 etherfabric.c 　
22555
 FCN_TIMER_MODE_LBNFCN_TIMER_MODE_LBN 12 etherfabric.c 　
22556
 FCN_TIMER_MODE_WIDTHFCN_TIMER_MODE_WIDTH 2 etherfabric.c 　
22557
 FCN_TIMER_MODE_DISFCN_TIMER_MODE_DIS 0 etherfabric.c 　
22558
 FCN_TIMER_MODE_INT_HLDOFFFCN_TIMER_MODE_INT_HLDOFF 1 etherfabric.c 　
22559
 FCN_TIMER_VAL_LBNFCN_TIMER_VAL_LBN 0 etherfabric.c 　
22560
 FCN_TIMER_VAL_WIDTHFCN_TIMER_VAL_WIDTH 12 etherfabric.c 　
22561
 FCN_RX_CFG_REG_KERFCN_RX_CFG_REG_KER 0x800 etherfabric.c 　
22562
 FCN_RX_XOFF_EN_LBNFCN_RX_XOFF_EN_LBN 0 etherfabric.c 　
22563
 FCN_RX_XOFF_EN_WIDTHFCN_RX_XOFF_EN_WIDTH 1 etherfabric.c 　
22564
 FCN_SRM_RX_DC_CFG_REG_KERFCN_SRM_RX_DC_CFG_REG_KER 0x610 etherfabric.c 　
22565
 FCN_SRM_RX_DC_BASE_ADR_LBNFCN_SRM_RX_DC_BASE_ADR_LBN 0 etherfabric.c 　
22566
 FCN_SRM_RX_DC_BASE_ADR_WIDTHFCN_SRM_RX_DC_BASE_ADR_WIDTH 21 etherfabric.c 　
22567
 FCN_SRM_TX_DC_CFG_REG_KERFCN_SRM_TX_DC_CFG_REG_KER 0x620 etherfabric.c 　
22568
 FCN_SRM_TX_DC_BASE_ADR_LBNFCN_SRM_TX_DC_BASE_ADR_LBN 0 etherfabric.c 　
22569
 FCN_SRM_TX_DC_BASE_ADR_WIDTHFCN_SRM_TX_DC_BASE_ADR_WIDTH 21 etherfabric.c 　
22570
 FCN_SRM_CFG_REG_KERFCN_SRM_CFG_REG_KER 0x630 etherfabric.c 　
22571
 FCN_SRAM_OOB_ADR_INTEN_LBNFCN_SRAM_OOB_ADR_INTEN_LBN 5 etherfabric.c 　
22572
 FCN_SRAM_OOB_ADR_INTEN_WIDTHFCN_SRAM_OOB_ADR_INTEN_WIDTH 1 etherfabric.c 　
22573
 FCN_SRAM_OOB_BUF_INTEN_LBNFCN_SRAM_OOB_BUF_INTEN_LBN 4 etherfabric.c 　
22574
 FCN_SRAM_OOB_BUF_INTEN_WIDTHFCN_SRAM_OOB_BUF_INTEN_WIDTH 1 etherfabric.c 　
22575
 FCN_SRAM_OOB_BT_INIT_EN_LBNFCN_SRAM_OOB_BT_INIT_EN_LBN 3 etherfabric.c 　
22576
 FCN_SRAM_OOB_BT_INIT_EN_WIDTHFCN_SRAM_OOB_BT_INIT_EN_WIDTH 1 etherfabric.c 　
22577
 FCN_SRM_NUM_BANK_LBNFCN_SRM_NUM_BANK_LBN 2 etherfabric.c 　
22578
 FCN_SRM_NUM_BANK_WIDTHFCN_SRM_NUM_BANK_WIDTH 1 etherfabric.c 　
22579
 FCN_SRM_BANK_SIZE_LBNFCN_SRM_BANK_SIZE_LBN 0 etherfabric.c 　
22580
 FCN_SRM_BANK_SIZE_WIDTHFCN_SRM_BANK_SIZE_WIDTH 2 etherfabric.c 　
22581
 FCN_SRM_NUM_BANKS_AND_BANK_SIZEFCN_SRM_NUM_BANKS_AND_BANK_SIZE 0 etherfabric.c 　
22582
 FCN_SRM_NUM_BANKS_AND_BANK_SIZEFCN_SRM_NUM_BANKS_AND_BANK_SIZE 3 etherfabric.c 　
22583
 FCN_RX_CFG_REG_KERFCN_RX_CFG_REG_KER 0x800 etherfabric.c 　
22584
 FCN_RX_INGR_EN_B0_LBNFCN_RX_INGR_EN_B0_LBN 47 etherfabric.c 　
22585
 FCN_RX_INGR_EN_B0_WIDTHFCN_RX_INGR_EN_B0_WIDTH 1 etherfabric.c 　
22586
 FCN_RX_USR_BUF_SIZE_B0_LBNFCN_RX_USR_BUF_SIZE_B0_LBN 19 etherfabric.c 　
22587
 FCN_RX_USR_BUF_SIZE_B0_WIDTHFCN_RX_USR_BUF_SIZE_B0_WIDTH 9 etherfabric.c 　
22588
 FCN_RX_XON_MAC_TH_B0_LBNFCN_RX_XON_MAC_TH_B0_LBN 10 etherfabric.c 　
22589
 FCN_RX_XON_MAC_TH_B0_WIDTHFCN_RX_XON_MAC_TH_B0_WIDTH 9 etherfabric.c 　
22590
 FCN_RX_XOFF_MAC_TH_B0_LBNFCN_RX_XOFF_MAC_TH_B0_LBN 1 etherfabric.c 　
22591
 FCN_RX_XOFF_MAC_TH_B0_WIDTHFCN_RX_XOFF_MAC_TH_B0_WIDTH 9 etherfabric.c 　
22592
 FCN_RX_XOFF_MAC_EN_B0_LBNFCN_RX_XOFF_MAC_EN_B0_LBN 0 etherfabric.c 　
22593
 FCN_RX_XOFF_MAC_EN_B0_WIDTHFCN_RX_XOFF_MAC_EN_B0_WIDTH 1 etherfabric.c 　
22594
 FCN_RX_USR_BUF_SIZE_A1_LBNFCN_RX_USR_BUF_SIZE_A1_LBN 11 etherfabric.c 　
22595
 FCN_RX_USR_BUF_SIZE_A1_WIDTHFCN_RX_USR_BUF_SIZE_A1_WIDTH 9 etherfabric.c 　
22596
 FCN_RX_XON_MAC_TH_A1_LBNFCN_RX_XON_MAC_TH_A1_LBN 6 etherfabric.c 　
22597
 FCN_RX_XON_MAC_TH_A1_WIDTHFCN_RX_XON_MAC_TH_A1_WIDTH 5 etherfabric.c 　
22598
 FCN_RX_XOFF_MAC_TH_A1_LBNFCN_RX_XOFF_MAC_TH_A1_LBN 1 etherfabric.c 　
22599
 FCN_RX_XOFF_MAC_TH_A1_WIDTHFCN_RX_XOFF_MAC_TH_A1_WIDTH 5 etherfabric.c 　
22600
 FCN_RX_XOFF_MAC_EN_A1_LBNFCN_RX_XOFF_MAC_EN_A1_LBN 0 etherfabric.c 　
22601
 FCN_RX_XOFF_MAC_EN_A1_WIDTHFCN_RX_XOFF_MAC_EN_A1_WIDTH 1 etherfabric.c 　
22602
 FCN_RX_USR_BUF_SIZE_A1_LBNFCN_RX_USR_BUF_SIZE_A1_LBN 11 etherfabric.c 　
22603
 FCN_RX_USR_BUF_SIZE_A1_WIDTHFCN_RX_USR_BUF_SIZE_A1_WIDTH 9 etherfabric.c 　
22604
 FCN_RX_XOFF_MAC_EN_A1_LBNFCN_RX_XOFF_MAC_EN_A1_LBN 0 etherfabric.c 　
22605
 FCN_RX_XOFF_MAC_EN_A1_WIDTHFCN_RX_XOFF_MAC_EN_A1_WIDTH 1 etherfabric.c 　
22606
 FCN_RX_FILTER_CTL_REG_KERFCN_RX_FILTER_CTL_REG_KER 0x810 etherfabric.c 　
22607
 FCN_UDP_FULL_SRCH_LIMIT_LBNFCN_UDP_FULL_SRCH_LIMIT_LBN 32 etherfabric.c 　
22608
 FCN_UDP_FULL_SRCH_LIMIT_WIDTHFCN_UDP_FULL_SRCH_LIMIT_WIDTH 8 etherfabric.c 　
22609
 FCN_NUM_KER_LBNFCN_NUM_KER_LBN 24 etherfabric.c 　
22610
 FCN_NUM_KER_WIDTHFCN_NUM_KER_WIDTH 2 etherfabric.c 　
22611
 FCN_UDP_WILD_SRCH_LIMIT_LBNFCN_UDP_WILD_SRCH_LIMIT_LBN 16 etherfabric.c 　
22612
 FCN_UDP_WILD_SRCH_LIMIT_WIDTHFCN_UDP_WILD_SRCH_LIMIT_WIDTH 8 etherfabric.c 　
22613
 FCN_TCP_WILD_SRCH_LIMIT_LBNFCN_TCP_WILD_SRCH_LIMIT_LBN 8 etherfabric.c 　
22614
 FCN_TCP_WILD_SRCH_LIMIT_WIDTHFCN_TCP_WILD_SRCH_LIMIT_WIDTH 8 etherfabric.c 　
22615
 FCN_TCP_FULL_SRCH_LIMIT_LBNFCN_TCP_FULL_SRCH_LIMIT_LBN 0 etherfabric.c 　
22616
 FCN_TCP_FULL_SRCH_LIMIT_WIDTHFCN_TCP_FULL_SRCH_LIMIT_WIDTH 8 etherfabric.c 　
22617
 FCN_RX_FLUSH_DESCQ_REG_KERFCN_RX_FLUSH_DESCQ_REG_KER 0x0820 etherfabric.c 　
22618
 FCN_RX_FLUSH_DESCQ_CMD_LBNFCN_RX_FLUSH_DESCQ_CMD_LBN 24 etherfabric.c 　
22619
 FCN_RX_FLUSH_DESCQ_CMD_WIDTHFCN_RX_FLUSH_DESCQ_CMD_WIDTH 1 etherfabric.c 　
22620
 FCN_RX_FLUSH_DESCQ_LBNFCN_RX_FLUSH_DESCQ_LBN 0 etherfabric.c 　
22621
 FCN_RX_FLUSH_DESCQ_WIDTHFCN_RX_FLUSH_DESCQ_WIDTH 12 etherfabric.c 　
22622
 FCN_RX_DESC_UPD_REG_KERFCN_RX_DESC_UPD_REG_KER 0x0830 etherfabric.c 　
22623
 FCN_RX_DESC_WPTR_LBNFCN_RX_DESC_WPTR_LBN 96 etherfabric.c 　
22624
 FCN_RX_DESC_WPTR_WIDTHFCN_RX_DESC_WPTR_WIDTH 12 etherfabric.c 　
22625
 FCN_RX_DESC_UPD_REG_KER_DWORDFCN_RX_DESC_UPD_REG_KER_DWORD ( FCN_RX_DESC_UPD_REG_KER + 12 ) etherfabric.c 　
22626
 FCN_RX_DESC_WPTR_DWORD_LBNFCN_RX_DESC_WPTR_DWORD_LBN 0 etherfabric.c 　
22627
 FCN_RX_DESC_WPTR_DWORD_WIDTHFCN_RX_DESC_WPTR_DWORD_WIDTH 12 etherfabric.c 　
22628
 FCN_RX_DC_CFG_REG_KERFCN_RX_DC_CFG_REG_KER 0x840 etherfabric.c 　
22629
 FCN_RX_DC_SIZE_LBNFCN_RX_DC_SIZE_LBN 0 etherfabric.c 　
22630
 FCN_RX_DC_SIZE_WIDTHFCN_RX_DC_SIZE_WIDTH 2 etherfabric.c 　
22631
 FCN_RX_SELF_RST_REG_KERFCN_RX_SELF_RST_REG_KER 0x890 etherfabric.c 　
22632
 FCN_RX_ISCSI_DIS_LBNFCN_RX_ISCSI_DIS_LBN 17 etherfabric.c 　
22633
 FCN_RX_ISCSI_DIS_WIDTHFCN_RX_ISCSI_DIS_WIDTH 1 etherfabric.c 　
22634
 FCN_RX_NODESC_WAIT_DIS_LBNFCN_RX_NODESC_WAIT_DIS_LBN 9 etherfabric.c 　
22635
 FCN_RX_NODESC_WAIT_DIS_WIDTHFCN_RX_NODESC_WAIT_DIS_WIDTH 1 etherfabric.c 　
22636
 FCN_RX_RECOVERY_EN_LBNFCN_RX_RECOVERY_EN_LBN 8 etherfabric.c 　
22637
 FCN_RX_RECOVERY_EN_WIDTHFCN_RX_RECOVERY_EN_WIDTH 1 etherfabric.c 　
22638
 FCN_TX_FLUSH_DESCQ_REG_KERFCN_TX_FLUSH_DESCQ_REG_KER 0x0a00 etherfabric.c 　
22639
 FCN_TX_FLUSH_DESCQ_CMD_LBNFCN_TX_FLUSH_DESCQ_CMD_LBN 12 etherfabric.c 　
22640
 FCN_TX_FLUSH_DESCQ_CMD_WIDTHFCN_TX_FLUSH_DESCQ_CMD_WIDTH 1 etherfabric.c 　
22641
 FCN_TX_FLUSH_DESCQ_LBNFCN_TX_FLUSH_DESCQ_LBN 0 etherfabric.c 　
22642
 FCN_TX_FLUSH_DESCQ_WIDTHFCN_TX_FLUSH_DESCQ_WIDTH 12 etherfabric.c 　
22643
 FCN_TX_CFG2_REG_KERFCN_TX_CFG2_REG_KER 0xa80 etherfabric.c 　
22644
 FCN_TX_DIS_NON_IP_EV_LBNFCN_TX_DIS_NON_IP_EV_LBN 17 etherfabric.c 　
22645
 FCN_TX_DIS_NON_IP_EV_WIDTHFCN_TX_DIS_NON_IP_EV_WIDTH 1 etherfabric.c 　
22646
 FCN_TX_DESC_UPD_REG_KERFCN_TX_DESC_UPD_REG_KER 0x0a10 etherfabric.c 　
22647
 FCN_TX_DESC_WPTR_LBNFCN_TX_DESC_WPTR_LBN 96 etherfabric.c 　
22648
 FCN_TX_DESC_WPTR_WIDTHFCN_TX_DESC_WPTR_WIDTH 12 etherfabric.c 　
22649
 FCN_TX_DESC_UPD_REG_KER_DWORDFCN_TX_DESC_UPD_REG_KER_DWORD ( FCN_TX_DESC_UPD_REG_KER + 12 ) etherfabric.c 　
22650
 FCN_TX_DESC_WPTR_DWORD_LBNFCN_TX_DESC_WPTR_DWORD_LBN 0 etherfabric.c 　
22651
 FCN_TX_DESC_WPTR_DWORD_WIDTHFCN_TX_DESC_WPTR_DWORD_WIDTH 12 etherfabric.c 　
22652
 FCN_TX_DC_CFG_REG_KERFCN_TX_DC_CFG_REG_KER 0xa20 etherfabric.c 　
22653
 FCN_TX_DC_SIZE_LBNFCN_TX_DC_SIZE_LBN 0 etherfabric.c 　
22654
 FCN_TX_DC_SIZE_WIDTHFCN_TX_DC_SIZE_WIDTH 2 etherfabric.c 　
22655
 FCN_MD_TXD_REG_KERFCN_MD_TXD_REG_KER 0xc00 etherfabric.c 　
22656
 FCN_MD_TXD_LBNFCN_MD_TXD_LBN 0 etherfabric.c 　
22657
 FCN_MD_TXD_WIDTHFCN_MD_TXD_WIDTH 16 etherfabric.c 　
22658
 FCN_MD_RXD_REG_KERFCN_MD_RXD_REG_KER 0xc10 etherfabric.c 　
22659
 FCN_MD_RXD_LBNFCN_MD_RXD_LBN 0 etherfabric.c 　
22660
 FCN_MD_RXD_WIDTHFCN_MD_RXD_WIDTH 16 etherfabric.c 　
22661
 FCN_MD_CS_REG_KERFCN_MD_CS_REG_KER 0xc20 etherfabric.c 　
22662
 FCN_MD_GC_LBNFCN_MD_GC_LBN 4 etherfabric.c 　
22663
 FCN_MD_GC_WIDTHFCN_MD_GC_WIDTH 1 etherfabric.c 　
22664
 FCN_MD_RIC_LBNFCN_MD_RIC_LBN 2 etherfabric.c 　
22665
 FCN_MD_RIC_WIDTHFCN_MD_RIC_WIDTH 1 etherfabric.c 　
22666
 FCN_MD_RDC_LBNFCN_MD_RDC_LBN 1 etherfabric.c 　
22667
 FCN_MD_RDC_WIDTHFCN_MD_RDC_WIDTH 1 etherfabric.c 　
22668
 FCN_MD_WRC_LBNFCN_MD_WRC_LBN 0 etherfabric.c 　
22669
 FCN_MD_WRC_WIDTHFCN_MD_WRC_WIDTH 1 etherfabric.c 　
22670
 FCN_MD_PHY_ADR_REG_KERFCN_MD_PHY_ADR_REG_KER 0xc30 etherfabric.c 　
22671
 FCN_MD_PHY_ADR_LBNFCN_MD_PHY_ADR_LBN 0 etherfabric.c 　
22672
 FCN_MD_PHY_ADR_WIDTHFCN_MD_PHY_ADR_WIDTH 16 etherfabric.c 　
22673
 FCN_MD_ID_REG_KERFCN_MD_ID_REG_KER 0xc40 etherfabric.c 　
22674
 FCN_MD_PRT_ADR_LBNFCN_MD_PRT_ADR_LBN 11 etherfabric.c 　
22675
 FCN_MD_PRT_ADR_WIDTHFCN_MD_PRT_ADR_WIDTH 5 etherfabric.c 　
22676
 FCN_MD_DEV_ADR_LBNFCN_MD_DEV_ADR_LBN 6 etherfabric.c 　
22677
 FCN_MD_DEV_ADR_WIDTHFCN_MD_DEV_ADR_WIDTH 5 etherfabric.c 　
22678
 FCN_MD_STAT_REG_KERFCN_MD_STAT_REG_KER 0xc50 etherfabric.c 　
22679
 FCN_MD_PINT_LBNFCN_MD_PINT_LBN 4 etherfabric.c 　
22680
 FCN_MD_PINT_WIDTHFCN_MD_PINT_WIDTH 1 etherfabric.c 　
22681
 FCN_MD_DONE_LBNFCN_MD_DONE_LBN 3 etherfabric.c 　
22682
 FCN_MD_DONE_WIDTHFCN_MD_DONE_WIDTH 1 etherfabric.c 　
22683
 FCN_MD_BSERR_LBNFCN_MD_BSERR_LBN 2 etherfabric.c 　
22684
 FCN_MD_BSERR_WIDTHFCN_MD_BSERR_WIDTH 1 etherfabric.c 　
22685
 FCN_MD_LNFL_LBNFCN_MD_LNFL_LBN 1 etherfabric.c 　
22686
 FCN_MD_LNFL_WIDTHFCN_MD_LNFL_WIDTH 1 etherfabric.c 　
22687
 FCN_MD_BSY_LBNFCN_MD_BSY_LBN 0 etherfabric.c 　
22688
 FCN_MD_BSY_WIDTHFCN_MD_BSY_WIDTH 1 etherfabric.c 　
22689
 FCN_MAC0_CTRL_REG_KERFCN_MAC0_CTRL_REG_KER 0xc80 etherfabric.c 　
22690
 FCN_MAC1_CTRL_REG_KERFCN_MAC1_CTRL_REG_KER 0xc90 etherfabric.c 　
22691
 FCN_MAC_XOFF_VAL_LBNFCN_MAC_XOFF_VAL_LBN 16 etherfabric.c 　
22692
 FCN_MAC_XOFF_VAL_WIDTHFCN_MAC_XOFF_VAL_WIDTH 16 etherfabric.c 　
22693
 FCN_MAC_BCAD_ACPT_LBNFCN_MAC_BCAD_ACPT_LBN 4 etherfabric.c 　
22694
 FCN_MAC_BCAD_ACPT_WIDTHFCN_MAC_BCAD_ACPT_WIDTH 1 etherfabric.c 　
22695
 FCN_MAC_UC_PROM_LBNFCN_MAC_UC_PROM_LBN 3 etherfabric.c 　
22696
 FCN_MAC_UC_PROM_WIDTHFCN_MAC_UC_PROM_WIDTH 1 etherfabric.c 　
22697
 FCN_MAC_LINK_STATUS_LBNFCN_MAC_LINK_STATUS_LBN 2 etherfabric.c 　
22698
 FCN_MAC_LINK_STATUS_WIDTHFCN_MAC_LINK_STATUS_WIDTH 1 etherfabric.c 　
22699
 FCN_MAC_SPEED_LBNFCN_MAC_SPEED_LBN 0 etherfabric.c 　
22700
 FCN_MAC_SPEED_WIDTHFCN_MAC_SPEED_WIDTH 2 etherfabric.c 　
22701
 XX_TXDRV_DEQ_DEFAULTXX_TXDRV_DEQ_DEFAULT 0xe etherfabric.c deq=.6
22702
 XX_TXDRV_DTX_DEFAULTXX_TXDRV_DTX_DEFAULT 0x5 etherfabric.c 1.25
22703
 XX_SD_CTL_DRV_DEFAULTXX_SD_CTL_DRV_DEFAULT 0 etherfabric.c 20mA
22704
 FALCON_GMAC_REGBANKFALCON_GMAC_REGBANK 0xe00 etherfabric.c 　
22705
 FALCON_GMAC_REGBANK_SIZEFALCON_GMAC_REGBANK_SIZE 0x200 etherfabric.c 　
22706
 FALCON_GMAC_REG_SIZEFALCON_GMAC_REG_SIZE 0x10 etherfabric.c 　
22707
 FALCON_XMAC_REGBANKFALCON_XMAC_REGBANK 0x1200 etherfabric.c 　
22708
 FALCON_XMAC_REGBANK_SIZEFALCON_XMAC_REGBANK_SIZE 0x200 etherfabric.c 　
22709
 FALCON_XMAC_REG_SIZEFALCON_XMAC_REG_SIZE 0x10 etherfabric.c 　
22710
 FCN_XM_ADR_LO_REG_MACFCN_XM_ADR_LO_REG_MAC 0x00 etherfabric.c 　
22711
 FCN_XM_ADR_3_LBNFCN_XM_ADR_3_LBN 24 etherfabric.c 　
22712
 FCN_XM_ADR_3_WIDTHFCN_XM_ADR_3_WIDTH 8 etherfabric.c 　
22713
 FCN_XM_ADR_2_LBNFCN_XM_ADR_2_LBN 16 etherfabric.c 　
22714
 FCN_XM_ADR_2_WIDTHFCN_XM_ADR_2_WIDTH 8 etherfabric.c 　
22715
 FCN_XM_ADR_1_LBNFCN_XM_ADR_1_LBN 8 etherfabric.c 　
22716
 FCN_XM_ADR_1_WIDTHFCN_XM_ADR_1_WIDTH 8 etherfabric.c 　
22717
 FCN_XM_ADR_0_LBNFCN_XM_ADR_0_LBN 0 etherfabric.c 　
22718
 FCN_XM_ADR_0_WIDTHFCN_XM_ADR_0_WIDTH 8 etherfabric.c 　
22719
 FCN_XM_ADR_HI_REG_MACFCN_XM_ADR_HI_REG_MAC 0x01 etherfabric.c 　
22720
 FCN_XM_ADR_5_LBNFCN_XM_ADR_5_LBN 8 etherfabric.c 　
22721
 FCN_XM_ADR_5_WIDTHFCN_XM_ADR_5_WIDTH 8 etherfabric.c 　
22722
 FCN_XM_ADR_4_LBNFCN_XM_ADR_4_LBN 0 etherfabric.c 　
22723
 FCN_XM_ADR_4_WIDTHFCN_XM_ADR_4_WIDTH 8 etherfabric.c 　
22724
 FCN_XM_GLB_CFG_REG_MACFCN_XM_GLB_CFG_REG_MAC 0x02 etherfabric.c 　
22725
 FCN_XM_RX_STAT_EN_LBNFCN_XM_RX_STAT_EN_LBN 11 etherfabric.c 　
22726
 FCN_XM_RX_STAT_EN_WIDTHFCN_XM_RX_STAT_EN_WIDTH 1 etherfabric.c 　
22727
 FCN_XM_TX_STAT_EN_LBNFCN_XM_TX_STAT_EN_LBN 10 etherfabric.c 　
22728
 FCN_XM_TX_STAT_EN_WIDTHFCN_XM_TX_STAT_EN_WIDTH 1 etherfabric.c 　
22729
 FCN_XM_RX_JUMBO_MODE_LBNFCN_XM_RX_JUMBO_MODE_LBN 6 etherfabric.c 　
22730
 FCN_XM_RX_JUMBO_MODE_WIDTHFCN_XM_RX_JUMBO_MODE_WIDTH 1 etherfabric.c 　
22731
 FCN_XM_CORE_RST_LBNFCN_XM_CORE_RST_LBN 0 etherfabric.c 　
22732
 FCN_XM_CORE_RST_WIDTHFCN_XM_CORE_RST_WIDTH 1 etherfabric.c 　
22733
 FCN_XM_TX_CFG_REG_MACFCN_XM_TX_CFG_REG_MAC 0x03 etherfabric.c 　
22734
 FCN_XM_IPG_LBNFCN_XM_IPG_LBN 16 etherfabric.c 　
22735
 FCN_XM_IPG_WIDTHFCN_XM_IPG_WIDTH 4 etherfabric.c 　
22736
 FCN_XM_FCNTL_LBNFCN_XM_FCNTL_LBN 10 etherfabric.c 　
22737
 FCN_XM_FCNTL_WIDTHFCN_XM_FCNTL_WIDTH 1 etherfabric.c 　
22738
 FCN_XM_TXCRC_LBNFCN_XM_TXCRC_LBN 8 etherfabric.c 　
22739
 FCN_XM_TXCRC_WIDTHFCN_XM_TXCRC_WIDTH 1 etherfabric.c 　
22740
 FCN_XM_AUTO_PAD_LBNFCN_XM_AUTO_PAD_LBN 5 etherfabric.c 　
22741
 FCN_XM_AUTO_PAD_WIDTHFCN_XM_AUTO_PAD_WIDTH 1 etherfabric.c 　
22742
 FCN_XM_TX_PRMBL_LBNFCN_XM_TX_PRMBL_LBN 2 etherfabric.c 　
22743
 FCN_XM_TX_PRMBL_WIDTHFCN_XM_TX_PRMBL_WIDTH 1 etherfabric.c 　
22744
 FCN_XM_TXEN_LBNFCN_XM_TXEN_LBN 1 etherfabric.c 　
22745
 FCN_XM_TXEN_WIDTHFCN_XM_TXEN_WIDTH 1 etherfabric.c 　
22746
 FCN_XM_RX_CFG_REG_MACFCN_XM_RX_CFG_REG_MAC 0x04 etherfabric.c 　
22747
 FCN_XM_PASS_CRC_ERR_LBNFCN_XM_PASS_CRC_ERR_LBN 25 etherfabric.c 　
22748
 FCN_XM_PASS_CRC_ERR_WIDTHFCN_XM_PASS_CRC_ERR_WIDTH 1 etherfabric.c 　
22749
 FCN_XM_AUTO_DEPAD_LBNFCN_XM_AUTO_DEPAD_LBN 8 etherfabric.c 　
22750
 FCN_XM_AUTO_DEPAD_WIDTHFCN_XM_AUTO_DEPAD_WIDTH 1 etherfabric.c 　
22751
 FCN_XM_RXEN_LBNFCN_XM_RXEN_LBN 1 etherfabric.c 　
22752
 FCN_XM_RXEN_WIDTHFCN_XM_RXEN_WIDTH 1 etherfabric.c 　
22753
 FCN_XM_MGT_INT_MSK_REG_MAC_B0FCN_XM_MGT_INT_MSK_REG_MAC_B0 0x5 etherfabric.c 　
22754
 FCN_XM_MSK_PRMBLE_ERR_LBNFCN_XM_MSK_PRMBLE_ERR_LBN 2 etherfabric.c 　
22755
 FCN_XM_MSK_PRMBLE_ERR_WIDTHFCN_XM_MSK_PRMBLE_ERR_WIDTH 1 etherfabric.c 　
22756
 FCN_XM_MSK_RMTFLT_LBNFCN_XM_MSK_RMTFLT_LBN 1 etherfabric.c 　
22757
 FCN_XM_MSK_RMTFLT_WIDTHFCN_XM_MSK_RMTFLT_WIDTH 1 etherfabric.c 　
22758
 FCN_XM_MSK_LCLFLT_LBNFCN_XM_MSK_LCLFLT_LBN 0 etherfabric.c 　
22759
 FCN_XM_MSK_LCLFLT_WIDTHFCN_XM_MSK_LCLFLT_WIDTH 1 etherfabric.c 　
22760
 FCN_XM_FC_REG_MACFCN_XM_FC_REG_MAC 0x7 etherfabric.c 　
22761
 FCN_XM_PAUSE_TIME_LBNFCN_XM_PAUSE_TIME_LBN 16 etherfabric.c 　
22762
 FCN_XM_PAUSE_TIME_WIDTHFCN_XM_PAUSE_TIME_WIDTH 16 etherfabric.c 　
22763
 FCN_XM_DIS_FCNTL_LBNFCN_XM_DIS_FCNTL_LBN 0 etherfabric.c 　
22764
 FCN_XM_DIS_FCNTL_WIDTHFCN_XM_DIS_FCNTL_WIDTH 1 etherfabric.c 　
22765
 FCN_XM_TX_PARAM_REG_MACFCN_XM_TX_PARAM_REG_MAC 0x0d etherfabric.c 　
22766
 FCN_XM_TX_JUMBO_MODE_LBNFCN_XM_TX_JUMBO_MODE_LBN 31 etherfabric.c 　
22767
 FCN_XM_TX_JUMBO_MODE_WIDTHFCN_XM_TX_JUMBO_MODE_WIDTH 1 etherfabric.c 　
22768
 FCN_XM_MAX_TX_FRM_SIZE_LBNFCN_XM_MAX_TX_FRM_SIZE_LBN 16 etherfabric.c 　
22769
 FCN_XM_MAX_TX_FRM_SIZE_WIDTHFCN_XM_MAX_TX_FRM_SIZE_WIDTH 14 etherfabric.c 　
22770
 FCN_XM_ACPT_ALL_MCAST_LBNFCN_XM_ACPT_ALL_MCAST_LBN 11 etherfabric.c 　
22771
 FCN_XM_ACPT_ALL_MCAST_WIDTHFCN_XM_ACPT_ALL_MCAST_WIDTH 1 etherfabric.c 　
22772
 FCN_XM_RX_PARAM_REG_MACFCN_XM_RX_PARAM_REG_MAC 0x0e etherfabric.c 　
22773
 FCN_XM_MAX_RX_FRM_SIZE_LBNFCN_XM_MAX_RX_FRM_SIZE_LBN 0 etherfabric.c 　
22774
 FCN_XM_MAX_RX_FRM_SIZE_WIDTHFCN_XM_MAX_RX_FRM_SIZE_WIDTH 14 etherfabric.c 　
22775
 FCN_XM_MGT_INT_REG_MAC_B0FCN_XM_MGT_INT_REG_MAC_B0 0x0f etherfabric.c 　
22776
 FCN_XM_PRMBLE_ERRFCN_XM_PRMBLE_ERR 2 etherfabric.c 　
22777
 FCN_XM_PRMBLE_WIDTHFCN_XM_PRMBLE_WIDTH 1 etherfabric.c 　
22778
 FCN_XM_RMTFLT_LBNFCN_XM_RMTFLT_LBN 1 etherfabric.c 　
22779
 FCN_XM_RMTFLT_WIDTHFCN_XM_RMTFLT_WIDTH 1 etherfabric.c 　
22780
 FCN_XM_LCLFLT_LBNFCN_XM_LCLFLT_LBN 0 etherfabric.c 　
22781
 FCN_XM_LCLFLT_WIDTHFCN_XM_LCLFLT_WIDTH 1 etherfabric.c 　
22782
 FCN_XX_ALIGN_DONE_LBNFCN_XX_ALIGN_DONE_LBN 20 etherfabric.c 　
22783
 FCN_XX_ALIGN_DONE_WIDTHFCN_XX_ALIGN_DONE_WIDTH 1 etherfabric.c 　
22784
 FCN_XX_CORE_STAT_REG_MACFCN_XX_CORE_STAT_REG_MAC 0x16 etherfabric.c 　
22785
 FCN_XX_SYNC_STAT_LBNFCN_XX_SYNC_STAT_LBN 16 etherfabric.c 　
22786
 FCN_XX_SYNC_STAT_WIDTHFCN_XX_SYNC_STAT_WIDTH 4 etherfabric.c 　
22787
 FCN_XX_SYNC_STAT_DECODE_SYNCEDFCN_XX_SYNC_STAT_DECODE_SYNCED 0xf etherfabric.c 　
22788
 FCN_XX_COMMA_DET_LBNFCN_XX_COMMA_DET_LBN 12 etherfabric.c 　
22789
 FCN_XX_COMMA_DET_WIDTHFCN_XX_COMMA_DET_WIDTH 4 etherfabric.c 　
22790
 FCN_XX_COMMA_DET_RESETFCN_XX_COMMA_DET_RESET 0xf etherfabric.c 　
22791
 FCN_XX_CHARERR_LBNFCN_XX_CHARERR_LBN 4 etherfabric.c 　
22792
 FCN_XX_CHARERR_WIDTHFCN_XX_CHARERR_WIDTH 4 etherfabric.c 　
22793
 FCN_XX_CHARERR_RESETFCN_XX_CHARERR_RESET 0xf etherfabric.c 　
22794
 FCN_XX_DISPERR_LBNFCN_XX_DISPERR_LBN 0 etherfabric.c 　
22795
 FCN_XX_DISPERR_WIDTHFCN_XX_DISPERR_WIDTH 4 etherfabric.c 　
22796
 FCN_XX_DISPERR_RESETFCN_XX_DISPERR_RESET 0xf etherfabric.c 　
22797
 FCN_XX_PWR_RST_REG_MACFCN_XX_PWR_RST_REG_MAC 0x10 etherfabric.c 　
22798
 FCN_XX_PWRDND_EN_LBNFCN_XX_PWRDND_EN_LBN 15 etherfabric.c 　
22799
 FCN_XX_PWRDND_EN_WIDTHFCN_XX_PWRDND_EN_WIDTH 1 etherfabric.c 　
22800
 FCN_XX_PWRDNC_EN_LBNFCN_XX_PWRDNC_EN_LBN 14 etherfabric.c 　
22801
 FCN_XX_PWRDNC_EN_WIDTHFCN_XX_PWRDNC_EN_WIDTH 1 etherfabric.c 　
22802
 FCN_XX_PWRDNB_EN_LBNFCN_XX_PWRDNB_EN_LBN 13 etherfabric.c 　
22803
 FCN_XX_PWRDNB_EN_WIDTHFCN_XX_PWRDNB_EN_WIDTH 1 etherfabric.c 　
22804
 FCN_XX_PWRDNA_EN_LBNFCN_XX_PWRDNA_EN_LBN 12 etherfabric.c 　
22805
 FCN_XX_PWRDNA_EN_WIDTHFCN_XX_PWRDNA_EN_WIDTH 1 etherfabric.c 　
22806
 FCN_XX_RSTPLLCD_EN_LBNFCN_XX_RSTPLLCD_EN_LBN 9 etherfabric.c 　
22807
 FCN_XX_RSTPLLCD_EN_WIDTHFCN_XX_RSTPLLCD_EN_WIDTH 1 etherfabric.c 　
22808
 FCN_XX_RSTPLLAB_EN_LBNFCN_XX_RSTPLLAB_EN_LBN 8 etherfabric.c 　
22809
 FCN_XX_RSTPLLAB_EN_WIDTHFCN_XX_RSTPLLAB_EN_WIDTH 1 etherfabric.c 　
22810
 FCN_XX_RESETD_EN_LBNFCN_XX_RESETD_EN_LBN 7 etherfabric.c 　
22811
 FCN_XX_RESETD_EN_WIDTHFCN_XX_RESETD_EN_WIDTH 1 etherfabric.c 　
22812
 FCN_XX_RESETC_EN_LBNFCN_XX_RESETC_EN_LBN 6 etherfabric.c 　
22813
 FCN_XX_RESETC_EN_WIDTHFCN_XX_RESETC_EN_WIDTH 1 etherfabric.c 　
22814
 FCN_XX_RESETB_EN_LBNFCN_XX_RESETB_EN_LBN 5 etherfabric.c 　
22815
 FCN_XX_RESETB_EN_WIDTHFCN_XX_RESETB_EN_WIDTH 1 etherfabric.c 　
22816
 FCN_XX_RESETA_EN_LBNFCN_XX_RESETA_EN_LBN 4 etherfabric.c 　
22817
 FCN_XX_RESETA_EN_WIDTHFCN_XX_RESETA_EN_WIDTH 1 etherfabric.c 　
22818
 FCN_XX_RSTXGXSRX_EN_LBNFCN_XX_RSTXGXSRX_EN_LBN 2 etherfabric.c 　
22819
 FCN_XX_RSTXGXSRX_EN_WIDTHFCN_XX_RSTXGXSRX_EN_WIDTH 1 etherfabric.c 　
22820
 FCN_XX_RSTXGXSTX_EN_LBNFCN_XX_RSTXGXSTX_EN_LBN 1 etherfabric.c 　
22821
 FCN_XX_RSTXGXSTX_EN_WIDTHFCN_XX_RSTXGXSTX_EN_WIDTH 1 etherfabric.c 　
22822
 FCN_XX_RST_XX_EN_LBNFCN_XX_RST_XX_EN_LBN 0 etherfabric.c 　
22823
 FCN_XX_RST_XX_EN_WIDTHFCN_XX_RST_XX_EN_WIDTH 1 etherfabric.c 　
22824
 FCN_XX_SD_CTL_REG_MACFCN_XX_SD_CTL_REG_MAC 0x11 etherfabric.c 　
22825
 FCN_XX_TERMADJ1_LBNFCN_XX_TERMADJ1_LBN 17 etherfabric.c 　
22826
 FCN_XX_TERMADJ1_WIDTHFCN_XX_TERMADJ1_WIDTH 1 etherfabric.c 　
22827
 FCN_XX_TERMADJ0_LBNFCN_XX_TERMADJ0_LBN 16 etherfabric.c 　
22828
 FCN_XX_TERMADJ0_WIDTHFCN_XX_TERMADJ0_WIDTH 1 etherfabric.c 　
22829
 FCN_XX_HIDRVD_LBNFCN_XX_HIDRVD_LBN 15 etherfabric.c 　
22830
 FCN_XX_HIDRVD_WIDTHFCN_XX_HIDRVD_WIDTH 1 etherfabric.c 　
22831
 FCN_XX_LODRVD_LBNFCN_XX_LODRVD_LBN 14 etherfabric.c 　
22832
 FCN_XX_LODRVD_WIDTHFCN_XX_LODRVD_WIDTH 1 etherfabric.c 　
22833
 FCN_XX_HIDRVC_LBNFCN_XX_HIDRVC_LBN 13 etherfabric.c 　
22834
 FCN_XX_HIDRVC_WIDTHFCN_XX_HIDRVC_WIDTH 1 etherfabric.c 　
22835
 FCN_XX_LODRVC_LBNFCN_XX_LODRVC_LBN 12 etherfabric.c 　
22836
 FCN_XX_LODRVC_WIDTHFCN_XX_LODRVC_WIDTH 1 etherfabric.c 　
22837
 FCN_XX_HIDRVB_LBNFCN_XX_HIDRVB_LBN 11 etherfabric.c 　
22838
 FCN_XX_HIDRVB_WIDTHFCN_XX_HIDRVB_WIDTH 1 etherfabric.c 　
22839
 FCN_XX_LODRVB_LBNFCN_XX_LODRVB_LBN 10 etherfabric.c 　
22840
 FCN_XX_LODRVB_WIDTHFCN_XX_LODRVB_WIDTH 1 etherfabric.c 　
22841
 FCN_XX_HIDRVA_LBNFCN_XX_HIDRVA_LBN 9 etherfabric.c 　
22842
 FCN_XX_HIDRVA_WIDTHFCN_XX_HIDRVA_WIDTH 1 etherfabric.c 　
22843
 FCN_XX_LODRVA_LBNFCN_XX_LODRVA_LBN 8 etherfabric.c 　
22844
 FCN_XX_LODRVA_WIDTHFCN_XX_LODRVA_WIDTH 1 etherfabric.c 　
22845
 FCN_XX_LPBKD_LBNFCN_XX_LPBKD_LBN 3 etherfabric.c 　
22846
 FCN_XX_LPBKD_WIDTHFCN_XX_LPBKD_WIDTH 1 etherfabric.c 　
22847
 FCN_XX_LPBKC_LBNFCN_XX_LPBKC_LBN 2 etherfabric.c 　
22848
 FCN_XX_LPBKC_WIDTHFCN_XX_LPBKC_WIDTH 1 etherfabric.c 　
22849
 FCN_XX_LPBKB_LBNFCN_XX_LPBKB_LBN 1 etherfabric.c 　
22850
 FCN_XX_LPBKB_WIDTHFCN_XX_LPBKB_WIDTH 1 etherfabric.c 　
22851
 FCN_XX_LPBKA_LBNFCN_XX_LPBKA_LBN 0 etherfabric.c 　
22852
 FCN_XX_LPBKA_WIDTHFCN_XX_LPBKA_WIDTH 1 etherfabric.c 　
22853
 FCN_XX_TXDRV_CTL_REG_MACFCN_XX_TXDRV_CTL_REG_MAC 0x12 etherfabric.c 　
22854
 FCN_XX_DEQD_LBNFCN_XX_DEQD_LBN 28 etherfabric.c 　
22855
 FCN_XX_DEQD_WIDTHFCN_XX_DEQD_WIDTH 4 etherfabric.c 　
22856
 FCN_XX_DEQC_LBNFCN_XX_DEQC_LBN 24 etherfabric.c 　
22857
 FCN_XX_DEQC_WIDTHFCN_XX_DEQC_WIDTH 4 etherfabric.c 　
22858
 FCN_XX_DEQB_LBNFCN_XX_DEQB_LBN 20 etherfabric.c 　
22859
 FCN_XX_DEQB_WIDTHFCN_XX_DEQB_WIDTH 4 etherfabric.c 　
22860
 FCN_XX_DEQA_LBNFCN_XX_DEQA_LBN 16 etherfabric.c 　
22861
 FCN_XX_DEQA_WIDTHFCN_XX_DEQA_WIDTH 4 etherfabric.c 　
22862
 FCN_XX_DTXD_LBNFCN_XX_DTXD_LBN 12 etherfabric.c 　
22863
 FCN_XX_DTXD_WIDTHFCN_XX_DTXD_WIDTH 4 etherfabric.c 　
22864
 FCN_XX_DTXC_LBNFCN_XX_DTXC_LBN 8 etherfabric.c 　
22865
 FCN_XX_DTXC_WIDTHFCN_XX_DTXC_WIDTH 4 etherfabric.c 　
22866
 FCN_XX_DTXB_LBNFCN_XX_DTXB_LBN 4 etherfabric.c 　
22867
 FCN_XX_DTXB_WIDTHFCN_XX_DTXB_WIDTH 4 etherfabric.c 　
22868
 FCN_XX_DTXA_LBNFCN_XX_DTXA_LBN 0 etherfabric.c 　
22869
 FCN_XX_DTXA_WIDTHFCN_XX_DTXA_WIDTH 4 etherfabric.c 　
22870
 FCN_RX_FILTER_TBL0FCN_RX_FILTER_TBL0 0xF00000 etherfabric.c 　
22871
 FCN_RX_DESC_PTR_TBL_KER_A1FCN_RX_DESC_PTR_TBL_KER_A1 0x11800 etherfabric.c 　
22872
 FCN_RX_DESC_PTR_TBL_KER_B0FCN_RX_DESC_PTR_TBL_KER_B0 0xF40000 etherfabric.c 　
22873
 FCN_RX_ISCSI_DDIG_EN_LBNFCN_RX_ISCSI_DDIG_EN_LBN 88 etherfabric.c 　
22874
 FCN_RX_ISCSI_DDIG_EN_WIDTHFCN_RX_ISCSI_DDIG_EN_WIDTH 1 etherfabric.c 　
22875
 FCN_RX_ISCSI_HDIG_EN_LBNFCN_RX_ISCSI_HDIG_EN_LBN 87 etherfabric.c 　
22876
 FCN_RX_ISCSI_HDIG_EN_WIDTHFCN_RX_ISCSI_HDIG_EN_WIDTH 1 etherfabric.c 　
22877
 FCN_RX_DESCQ_BUF_BASE_ID_LBNFCN_RX_DESCQ_BUF_BASE_ID_LBN 36 etherfabric.c 　
22878
 FCN_RX_DESCQ_BUF_BASE_ID_WIDTHFCN_RX_DESCQ_BUF_BASE_ID_WIDTH 20 etherfabric.c 　
22879
 FCN_RX_DESCQ_EVQ_ID_LBNFCN_RX_DESCQ_EVQ_ID_LBN 24 etherfabric.c 　
22880
 FCN_RX_DESCQ_EVQ_ID_WIDTHFCN_RX_DESCQ_EVQ_ID_WIDTH 12 etherfabric.c 　
22881
 FCN_RX_DESCQ_OWNER_ID_LBNFCN_RX_DESCQ_OWNER_ID_LBN 10 etherfabric.c 　
22882
 FCN_RX_DESCQ_OWNER_ID_WIDTHFCN_RX_DESCQ_OWNER_ID_WIDTH 14 etherfabric.c 　
22883
 FCN_RX_DESCQ_SIZE_LBNFCN_RX_DESCQ_SIZE_LBN 3 etherfabric.c 　
22884
 FCN_RX_DESCQ_SIZE_WIDTHFCN_RX_DESCQ_SIZE_WIDTH 2 etherfabric.c 　
22885
 FCN_RX_DESCQ_SIZE_4KFCN_RX_DESCQ_SIZE_4K 3 etherfabric.c 　
22886
 FCN_RX_DESCQ_SIZE_2KFCN_RX_DESCQ_SIZE_2K 2 etherfabric.c 　
22887
 FCN_RX_DESCQ_SIZE_1KFCN_RX_DESCQ_SIZE_1K 1 etherfabric.c 　
22888
 FCN_RX_DESCQ_SIZE_512FCN_RX_DESCQ_SIZE_512 0 etherfabric.c 　
22889
 FCN_RX_DESCQ_TYPE_LBNFCN_RX_DESCQ_TYPE_LBN 2 etherfabric.c 　
22890
 FCN_RX_DESCQ_TYPE_WIDTHFCN_RX_DESCQ_TYPE_WIDTH 1 etherfabric.c 　
22891
 FCN_RX_DESCQ_JUMBO_LBNFCN_RX_DESCQ_JUMBO_LBN 1 etherfabric.c 　
22892
 FCN_RX_DESCQ_JUMBO_WIDTHFCN_RX_DESCQ_JUMBO_WIDTH 1 etherfabric.c 　
22893
 FCN_RX_DESCQ_EN_LBNFCN_RX_DESCQ_EN_LBN 0 etherfabric.c 　
22894
 FCN_RX_DESCQ_EN_WIDTHFCN_RX_DESCQ_EN_WIDTH 1 etherfabric.c 　
22895
 FCN_TX_DESC_PTR_TBL_KER_A1FCN_TX_DESC_PTR_TBL_KER_A1 0x11900 etherfabric.c 　
22896
 FCN_TX_DESC_PTR_TBL_KER_B0FCN_TX_DESC_PTR_TBL_KER_B0 0xF50000 etherfabric.c 　
22897
 FCN_TX_NON_IP_DROP_DIS_B0_LBNFCN_TX_NON_IP_DROP_DIS_B0_LBN 91 etherfabric.c 　
22898
 FCN_TX_NON_IP_DROP_DIS_B0_WIDTHFCN_TX_NON_IP_DROP_DIS_B0_WIDTH 1 etherfabric.c 　
22899
 FCN_TX_DESCQ_EN_LBNFCN_TX_DESCQ_EN_LBN 88 etherfabric.c 　
22900
 FCN_TX_DESCQ_EN_WIDTHFCN_TX_DESCQ_EN_WIDTH 1 etherfabric.c 　
22901
 FCN_TX_ISCSI_DDIG_EN_LBNFCN_TX_ISCSI_DDIG_EN_LBN 87 etherfabric.c 　
22902
 FCN_TX_ISCSI_DDIG_EN_WIDTHFCN_TX_ISCSI_DDIG_EN_WIDTH 1 etherfabric.c 　
22903
 FCN_TX_ISCSI_HDIG_EN_LBNFCN_TX_ISCSI_HDIG_EN_LBN 86 etherfabric.c 　
22904
 FCN_TX_ISCSI_HDIG_EN_WIDTHFCN_TX_ISCSI_HDIG_EN_WIDTH 1 etherfabric.c 　
22905
 FCN_TX_DESCQ_BUF_BASE_ID_LBNFCN_TX_DESCQ_BUF_BASE_ID_LBN 36 etherfabric.c 　
22906
 FCN_TX_DESCQ_BUF_BASE_ID_WIDTHFCN_TX_DESCQ_BUF_BASE_ID_WIDTH 20 etherfabric.c 　
22907
 FCN_TX_DESCQ_EVQ_ID_LBNFCN_TX_DESCQ_EVQ_ID_LBN 24 etherfabric.c 　
22908
 FCN_TX_DESCQ_EVQ_ID_WIDTHFCN_TX_DESCQ_EVQ_ID_WIDTH 12 etherfabric.c 　
22909
 FCN_TX_DESCQ_OWNER_ID_LBNFCN_TX_DESCQ_OWNER_ID_LBN 10 etherfabric.c 　
22910
 FCN_TX_DESCQ_OWNER_ID_WIDTHFCN_TX_DESCQ_OWNER_ID_WIDTH 14 etherfabric.c 　
22911
 FCN_TX_DESCQ_SIZE_LBNFCN_TX_DESCQ_SIZE_LBN 3 etherfabric.c 　
22912
 FCN_TX_DESCQ_SIZE_WIDTHFCN_TX_DESCQ_SIZE_WIDTH 2 etherfabric.c 　
22913
 FCN_TX_DESCQ_SIZE_4KFCN_TX_DESCQ_SIZE_4K 3 etherfabric.c 　
22914
 FCN_TX_DESCQ_SIZE_2KFCN_TX_DESCQ_SIZE_2K 2 etherfabric.c 　
22915
 FCN_TX_DESCQ_SIZE_1KFCN_TX_DESCQ_SIZE_1K 1 etherfabric.c 　
22916
 FCN_TX_DESCQ_SIZE_512FCN_TX_DESCQ_SIZE_512 0 etherfabric.c 　
22917
 FCN_TX_DESCQ_TYPE_LBNFCN_TX_DESCQ_TYPE_LBN 1 etherfabric.c 　
22918
 FCN_TX_DESCQ_TYPE_WIDTHFCN_TX_DESCQ_TYPE_WIDTH 2 etherfabric.c 　
22919
 FCN_TX_DESCQ_FLUSH_LBNFCN_TX_DESCQ_FLUSH_LBN 0 etherfabric.c 　
22920
 FCN_TX_DESCQ_FLUSH_WIDTHFCN_TX_DESCQ_FLUSH_WIDTH 1 etherfabric.c 　
22921
 FCN_EVQ_PTR_TBL_KER_A1FCN_EVQ_PTR_TBL_KER_A1 0x11a00 etherfabric.c 　
22922
 FCN_EVQ_PTR_TBL_KER_B0FCN_EVQ_PTR_TBL_KER_B0 0xf60000 etherfabric.c 　
22923
 FCN_EVQ_EN_LBNFCN_EVQ_EN_LBN 23 etherfabric.c 　
22924
 FCN_EVQ_EN_WIDTHFCN_EVQ_EN_WIDTH 1 etherfabric.c 　
22925
 FCN_EVQ_SIZE_LBNFCN_EVQ_SIZE_LBN 20 etherfabric.c 　
22926
 FCN_EVQ_SIZE_WIDTHFCN_EVQ_SIZE_WIDTH 3 etherfabric.c 　
22927
 FCN_EVQ_SIZE_32KFCN_EVQ_SIZE_32K 6 etherfabric.c 　
22928
 FCN_EVQ_SIZE_16KFCN_EVQ_SIZE_16K 5 etherfabric.c 　
22929
 FCN_EVQ_SIZE_8KFCN_EVQ_SIZE_8K 4 etherfabric.c 　
22930
 FCN_EVQ_SIZE_4KFCN_EVQ_SIZE_4K 3 etherfabric.c 　
22931
 FCN_EVQ_SIZE_2KFCN_EVQ_SIZE_2K 2 etherfabric.c 　
22932
 FCN_EVQ_SIZE_1KFCN_EVQ_SIZE_1K 1 etherfabric.c 　
22933
 FCN_EVQ_SIZE_512FCN_EVQ_SIZE_512 0 etherfabric.c 　
22934
 FCN_EVQ_BUF_BASE_ID_LBNFCN_EVQ_BUF_BASE_ID_LBN 0 etherfabric.c 　
22935
 FCN_EVQ_BUF_BASE_ID_WIDTHFCN_EVQ_BUF_BASE_ID_WIDTH 20 etherfabric.c 　
22936
 FCN_RX_RSS_INDIR_TBL_B0FCN_RX_RSS_INDIR_TBL_B0 0xFB0000 etherfabric.c 　
22937
 FCN_EVQ_RPTR_REG_KER_A1FCN_EVQ_RPTR_REG_KER_A1 0x11b00 etherfabric.c 　
22938
 FCN_EVQ_RPTR_REG_KER_B0FCN_EVQ_RPTR_REG_KER_B0 0xfa0000 etherfabric.c 　
22939
 FCN_EVQ_RPTR_LBNFCN_EVQ_RPTR_LBN 0 etherfabric.c 　
22940
 FCN_EVQ_RPTR_WIDTHFCN_EVQ_RPTR_WIDTH 14 etherfabric.c 　
22941
 FCN_EVQ_RPTR_REG_KER_DWORD_A1FCN_EVQ_RPTR_REG_KER_DWORD_A1 ( FCN_EVQ_RPTR_REG_KER_A1 + 0 ) etherfabric.c 　
22942
 FCN_EVQ_RPTR_REG_KER_DWORD_B0FCN_EVQ_RPTR_REG_KER_DWORD_B0 ( FCN_EVQ_RPTR_REG_KER_B0 + 0 ) etherfabric.c 　
22943
 FCN_EVQ_RPTR_DWORD_LBNFCN_EVQ_RPTR_DWORD_LBN 0 etherfabric.c 　
22944
 FCN_EVQ_RPTR_DWORD_WIDTHFCN_EVQ_RPTR_DWORD_WIDTH 14 etherfabric.c 　
22945
 FCN_BUF_FULL_TBL_KER_A1FCN_BUF_FULL_TBL_KER_A1 0x18000 etherfabric.c 　
22946
 FCN_BUF_FULL_TBL_KER_B0FCN_BUF_FULL_TBL_KER_B0 0x800000 etherfabric.c 　
22947
 FCN_IP_DAT_BUF_SIZE_LBNFCN_IP_DAT_BUF_SIZE_LBN 50 etherfabric.c 　
22948
 FCN_IP_DAT_BUF_SIZE_WIDTHFCN_IP_DAT_BUF_SIZE_WIDTH 1 etherfabric.c 　
22949
 FCN_IP_DAT_BUF_SIZE_8KFCN_IP_DAT_BUF_SIZE_8K 1 etherfabric.c 　
22950
 FCN_IP_DAT_BUF_SIZE_4KFCN_IP_DAT_BUF_SIZE_4K 0 etherfabric.c 　
22951
 FCN_BUF_ADR_FBUF_LBNFCN_BUF_ADR_FBUF_LBN 14 etherfabric.c 　
22952
 FCN_BUF_ADR_FBUF_WIDTHFCN_BUF_ADR_FBUF_WIDTH 34 etherfabric.c 　
22953
 FCN_BUF_OWNER_ID_FBUF_LBNFCN_BUF_OWNER_ID_FBUF_LBN 0 etherfabric.c 　
22954
 FCN_BUF_OWNER_ID_FBUF_WIDTHFCN_BUF_OWNER_ID_FBUF_WIDTH 14 etherfabric.c 　
22955
 FCN_MAC_DATA_LBNFCN_MAC_DATA_LBN 0 etherfabric.c 　
22956
 FCN_MAC_DATA_WIDTHFCN_MAC_DATA_WIDTH 32 etherfabric.c 　
22957
 FCN_TX_KER_PORT_LBNFCN_TX_KER_PORT_LBN 63 etherfabric.c 　
22958
 FCN_TX_KER_PORT_WIDTHFCN_TX_KER_PORT_WIDTH 1 etherfabric.c 　
22959
 FCN_TX_KER_BYTE_CNT_LBNFCN_TX_KER_BYTE_CNT_LBN 48 etherfabric.c 　
22960
 FCN_TX_KER_BYTE_CNT_WIDTHFCN_TX_KER_BYTE_CNT_WIDTH 14 etherfabric.c 　
22961
 FCN_TX_KER_BUF_ADR_LBNFCN_TX_KER_BUF_ADR_LBN 0 etherfabric.c 　
22962
 FCN_TX_KER_BUF_ADR_WIDTHFCN_TX_KER_BUF_ADR_WIDTH EFAB_DMA_TYPE_WIDTH ( 46 ) etherfabric.c 　
22963
 FCN_RX_KER_BUF_SIZE_LBNFCN_RX_KER_BUF_SIZE_LBN 48 etherfabric.c 　
22964
 FCN_RX_KER_BUF_SIZE_WIDTHFCN_RX_KER_BUF_SIZE_WIDTH 14 etherfabric.c 　
22965
 FCN_RX_KER_BUF_ADR_LBNFCN_RX_KER_BUF_ADR_LBN 0 etherfabric.c 　
22966
 FCN_RX_KER_BUF_ADR_WIDTHFCN_RX_KER_BUF_ADR_WIDTH EFAB_DMA_TYPE_WIDTH ( 46 ) etherfabric.c 　
22967
 FCN_EV_CODE_LBNFCN_EV_CODE_LBN 60 etherfabric.c 　
22968
 FCN_EV_CODE_WIDTHFCN_EV_CODE_WIDTH 4 etherfabric.c 　
22969
 FCN_RX_IP_EV_DECODEFCN_RX_IP_EV_DECODE 0 etherfabric.c 　
22970
 FCN_TX_IP_EV_DECODEFCN_TX_IP_EV_DECODE 2 etherfabric.c 　
22971
 FCN_DRIVER_EV_DECODEFCN_DRIVER_EV_DECODE 5 etherfabric.c 　
22972
 FCN_RX_EV_PKT_OK_LBNFCN_RX_EV_PKT_OK_LBN 56 etherfabric.c 　
22973
 FCN_RX_EV_PKT_OK_WIDTHFCN_RX_EV_PKT_OK_WIDTH 1 etherfabric.c 　
22974
 FCN_RX_PORT_LBNFCN_RX_PORT_LBN 30 etherfabric.c 　
22975
 FCN_RX_PORT_WIDTHFCN_RX_PORT_WIDTH 1 etherfabric.c 　
22976
 FCN_RX_EV_BYTE_CNT_LBNFCN_RX_EV_BYTE_CNT_LBN 16 etherfabric.c 　
22977
 FCN_RX_EV_BYTE_CNT_WIDTHFCN_RX_EV_BYTE_CNT_WIDTH 14 etherfabric.c 　
22978
 FCN_RX_EV_DESC_PTR_LBNFCN_RX_EV_DESC_PTR_LBN 0 etherfabric.c 　
22979
 FCN_RX_EV_DESC_PTR_WIDTHFCN_RX_EV_DESC_PTR_WIDTH 12 etherfabric.c 　
22980
 FCN_TX_EV_DESC_PTR_LBNFCN_TX_EV_DESC_PTR_LBN 0 etherfabric.c 　
22981
 FCN_TX_EV_DESC_PTR_WIDTHFCN_TX_EV_DESC_PTR_WIDTH 12 etherfabric.c 　
22982
 FALCON_SPI_MAX_LENFALCON_SPI_MAX_LEN 16 etherfabric.c 　
22983
 GM_CFG1_REG_MACGM_CFG1_REG_MAC 0x00 etherfabric.c 　
22984
 GM_SW_RST_LBNGM_SW_RST_LBN 31 etherfabric.c 　
22985
 GM_SW_RST_WIDTHGM_SW_RST_WIDTH 1 etherfabric.c 　
22986
 GM_RX_FC_EN_LBNGM_RX_FC_EN_LBN 5 etherfabric.c 　
22987
 GM_RX_FC_EN_WIDTHGM_RX_FC_EN_WIDTH 1 etherfabric.c 　
22988
 GM_TX_FC_EN_LBNGM_TX_FC_EN_LBN 4 etherfabric.c 　
22989
 GM_TX_FC_EN_WIDTHGM_TX_FC_EN_WIDTH 1 etherfabric.c 　
22990
 GM_RX_EN_LBNGM_RX_EN_LBN 2 etherfabric.c 　
22991
 GM_RX_EN_WIDTHGM_RX_EN_WIDTH 1 etherfabric.c 　
22992
 GM_TX_EN_LBNGM_TX_EN_LBN 0 etherfabric.c 　
22993
 GM_TX_EN_WIDTHGM_TX_EN_WIDTH 1 etherfabric.c 　
22994
 GM_CFG2_REG_MACGM_CFG2_REG_MAC 0x01 etherfabric.c 　
22995
 GM_PAMBL_LEN_LBNGM_PAMBL_LEN_LBN 12 etherfabric.c 　
22996
 GM_PAMBL_LEN_WIDTHGM_PAMBL_LEN_WIDTH 4 etherfabric.c 　
22997
 GM_IF_MODE_LBNGM_IF_MODE_LBN 8 etherfabric.c 　
22998
 GM_IF_MODE_WIDTHGM_IF_MODE_WIDTH 2 etherfabric.c 　
22999
 GM_PAD_CRC_EN_LBNGM_PAD_CRC_EN_LBN 2 etherfabric.c 　
23000
 GM_PAD_CRC_EN_WIDTHGM_PAD_CRC_EN_WIDTH 1 etherfabric.c 　
23001
 GM_FD_LBNGM_FD_LBN 0 etherfabric.c 　
23002
 GM_FD_WIDTHGM_FD_WIDTH 1 etherfabric.c 　
23003
 GM_MAX_FLEN_REG_MACGM_MAX_FLEN_REG_MAC 0x04 etherfabric.c 　
23004
 GM_MAX_FLEN_LBNGM_MAX_FLEN_LBN 0 etherfabric.c 　
23005
 GM_MAX_FLEN_WIDTHGM_MAX_FLEN_WIDTH 16 etherfabric.c 　
23006
 GM_MII_MGMT_CFG_REG_MACGM_MII_MGMT_CFG_REG_MAC 0x08 etherfabric.c 　
23007
 GM_MGMT_CLK_SEL_LBNGM_MGMT_CLK_SEL_LBN 0 etherfabric.c 　
23008
 GM_MGMT_CLK_SEL_WIDTHGM_MGMT_CLK_SEL_WIDTH 3 etherfabric.c 　
23009
 GM_MII_MGMT_CMD_REG_MACGM_MII_MGMT_CMD_REG_MAC 0x09 etherfabric.c 　
23010
 GM_MGMT_SCAN_CYC_LBNGM_MGMT_SCAN_CYC_LBN 1 etherfabric.c 　
23011
 GM_MGMT_SCAN_CYC_WIDTHGM_MGMT_SCAN_CYC_WIDTH 1 etherfabric.c 　
23012
 GM_MGMT_RD_CYC_LBNGM_MGMT_RD_CYC_LBN 0 etherfabric.c 　
23013
 GM_MGMT_RD_CYC_WIDTHGM_MGMT_RD_CYC_WIDTH 1 etherfabric.c 　
23014
 GM_MII_MGMT_ADR_REG_MACGM_MII_MGMT_ADR_REG_MAC 0x0a etherfabric.c 　
23015
 GM_MGMT_PHY_ADDR_LBNGM_MGMT_PHY_ADDR_LBN 8 etherfabric.c 　
23016
 GM_MGMT_PHY_ADDR_WIDTHGM_MGMT_PHY_ADDR_WIDTH 5 etherfabric.c 　
23017
 GM_MGMT_REG_ADDR_LBNGM_MGMT_REG_ADDR_LBN 0 etherfabric.c 　
23018
 GM_MGMT_REG_ADDR_WIDTHGM_MGMT_REG_ADDR_WIDTH 5 etherfabric.c 　
23019
 GM_MII_MGMT_CTL_REG_MACGM_MII_MGMT_CTL_REG_MAC 0x0b etherfabric.c 　
23020
 GM_MGMT_CTL_LBNGM_MGMT_CTL_LBN 0 etherfabric.c 　
23021
 GM_MGMT_CTL_WIDTHGM_MGMT_CTL_WIDTH 16 etherfabric.c 　
23022
 GM_MII_MGMT_STAT_REG_MACGM_MII_MGMT_STAT_REG_MAC 0x0c etherfabric.c 　
23023
 GM_MGMT_STAT_LBNGM_MGMT_STAT_LBN 0 etherfabric.c 　
23024
 GM_MGMT_STAT_WIDTHGM_MGMT_STAT_WIDTH 16 etherfabric.c 　
23025
 GM_MII_MGMT_IND_REG_MACGM_MII_MGMT_IND_REG_MAC 0x0d etherfabric.c 　
23026
 GM_MGMT_BUSY_LBNGM_MGMT_BUSY_LBN 0 etherfabric.c 　
23027
 GM_MGMT_BUSY_WIDTHGM_MGMT_BUSY_WIDTH 1 etherfabric.c 　
23028
 GM_ADR1_REG_MACGM_ADR1_REG_MAC 0x10 etherfabric.c 　
23029
 GM_HWADDR_5_LBNGM_HWADDR_5_LBN 24 etherfabric.c 　
23030
 GM_HWADDR_5_WIDTHGM_HWADDR_5_WIDTH 8 etherfabric.c 　
23031
 GM_HWADDR_4_LBNGM_HWADDR_4_LBN 16 etherfabric.c 　
23032
 GM_HWADDR_4_WIDTHGM_HWADDR_4_WIDTH 8 etherfabric.c 　
23033
 GM_HWADDR_3_LBNGM_HWADDR_3_LBN 8 etherfabric.c 　
23034
 GM_HWADDR_3_WIDTHGM_HWADDR_3_WIDTH 8 etherfabric.c 　
23035
 GM_HWADDR_2_LBNGM_HWADDR_2_LBN 0 etherfabric.c 　
23036
 GM_HWADDR_2_WIDTHGM_HWADDR_2_WIDTH 8 etherfabric.c 　
23037
 GM_ADR2_REG_MACGM_ADR2_REG_MAC 0x11 etherfabric.c 　
23038
 GM_HWADDR_1_LBNGM_HWADDR_1_LBN 24 etherfabric.c 　
23039
 GM_HWADDR_1_WIDTHGM_HWADDR_1_WIDTH 8 etherfabric.c 　
23040
 GM_HWADDR_0_LBNGM_HWADDR_0_LBN 16 etherfabric.c 　
23041
 GM_HWADDR_0_WIDTHGM_HWADDR_0_WIDTH 8 etherfabric.c 　
23042
 GMF_CFG0_REG_MACGMF_CFG0_REG_MAC 0x12 etherfabric.c 　
23043
 GMF_FTFENREQ_LBNGMF_FTFENREQ_LBN 12 etherfabric.c 　
23044
 GMF_FTFENREQ_WIDTHGMF_FTFENREQ_WIDTH 1 etherfabric.c 　
23045
 GMF_STFENREQ_LBNGMF_STFENREQ_LBN 11 etherfabric.c 　
23046
 GMF_STFENREQ_WIDTHGMF_STFENREQ_WIDTH 1 etherfabric.c 　
23047
 GMF_FRFENREQ_LBNGMF_FRFENREQ_LBN 10 etherfabric.c 　
23048
 GMF_FRFENREQ_WIDTHGMF_FRFENREQ_WIDTH 1 etherfabric.c 　
23049
 GMF_SRFENREQ_LBNGMF_SRFENREQ_LBN 9 etherfabric.c 　
23050
 GMF_SRFENREQ_WIDTHGMF_SRFENREQ_WIDTH 1 etherfabric.c 　
23051
 GMF_WTMENREQ_LBNGMF_WTMENREQ_LBN 8 etherfabric.c 　
23052
 GMF_WTMENREQ_WIDTHGMF_WTMENREQ_WIDTH 1 etherfabric.c 　
23053
 GMF_CFG1_REG_MACGMF_CFG1_REG_MAC 0x13 etherfabric.c 　
23054
 GMF_CFGFRTH_LBNGMF_CFGFRTH_LBN 16 etherfabric.c 　
23055
 GMF_CFGFRTH_WIDTHGMF_CFGFRTH_WIDTH 5 etherfabric.c 　
23056
 GMF_CFGXOFFRTX_LBNGMF_CFGXOFFRTX_LBN 0 etherfabric.c 　
23057
 GMF_CFGXOFFRTX_WIDTHGMF_CFGXOFFRTX_WIDTH 16 etherfabric.c 　
23058
 GMF_CFG2_REG_MACGMF_CFG2_REG_MAC 0x14 etherfabric.c 　
23059
 GMF_CFGHWM_LBNGMF_CFGHWM_LBN 16 etherfabric.c 　
23060
 GMF_CFGHWM_WIDTHGMF_CFGHWM_WIDTH 6 etherfabric.c 　
23061
 GMF_CFGLWM_LBNGMF_CFGLWM_LBN 0 etherfabric.c 　
23062
 GMF_CFGLWM_WIDTHGMF_CFGLWM_WIDTH 6 etherfabric.c 　
23063
 GMF_CFG3_REG_MACGMF_CFG3_REG_MAC 0x15 etherfabric.c 　
23064
 GMF_CFGHWMFT_LBNGMF_CFGHWMFT_LBN 16 etherfabric.c 　
23065
 GMF_CFGHWMFT_WIDTHGMF_CFGHWMFT_WIDTH 6 etherfabric.c 　
23066
 GMF_CFGFTTH_LBNGMF_CFGFTTH_LBN 0 etherfabric.c 　
23067
 GMF_CFGFTTH_WIDTHGMF_CFGFTTH_WIDTH 6 etherfabric.c 　
23068
 GMF_CFG4_REG_MACGMF_CFG4_REG_MAC 0x16 etherfabric.c 　
23069
 GMF_HSTFLTRFRM_PAUSE_LBNGMF_HSTFLTRFRM_PAUSE_LBN 12 etherfabric.c 　
23070
 GMF_HSTFLTRFRM_PAUSE_WIDTHGMF_HSTFLTRFRM_PAUSE_WIDTH 12 etherfabric.c 　
23071
 GMF_CFG5_REG_MACGMF_CFG5_REG_MAC 0x17 etherfabric.c 　
23072
 GMF_CFGHDPLX_LBNGMF_CFGHDPLX_LBN 22 etherfabric.c 　
23073
 GMF_CFGHDPLX_WIDTHGMF_CFGHDPLX_WIDTH 1 etherfabric.c 　
23074
 GMF_CFGBYTMODE_LBNGMF_CFGBYTMODE_LBN 19 etherfabric.c 　
23075
 GMF_CFGBYTMODE_WIDTHGMF_CFGBYTMODE_WIDTH 1 etherfabric.c 　
23076
 GMF_HSTDRPLT64_LBNGMF_HSTDRPLT64_LBN 18 etherfabric.c 　
23077
 GMF_HSTDRPLT64_WIDTHGMF_HSTDRPLT64_WIDTH 1 etherfabric.c 　
23078
 GMF_HSTFLTRFRMDC_PAUSE_LBNGMF_HSTFLTRFRMDC_PAUSE_LBN 12 etherfabric.c 　
23079
 GMF_HSTFLTRFRMDC_PAUSE_WIDTHGMF_HSTFLTRFRMDC_PAUSE_WIDTH 1 etherfabric.c 　
23080
 XFP_REQUIRED_DEVSXFP_REQUIRED_DEVS ( MDIO_MMDREG_DEVS0_PCS | \ MDIO_MMDREG_DEVS0_PMAPMD | \ MDIO_MMDREG_DEVS0_PHYXS ) etherfabric.c 　
23081
 TXC_GLRGS_GLCMDTXC_GLRGS_GLCMD (0xc004) etherfabric.c 　
23082
 TXC_GLCMD_LMTSWRST_LBNTXC_GLCMD_LMTSWRST_LBN (14) etherfabric.c 　
23083
 TXC_ALRGS_ATXAMP0TXC_ALRGS_ATXAMP0 (0xc041) etherfabric.c 　
23084
 TXC_ALRGS_ATXAMP1TXC_ALRGS_ATXAMP1 (0xc042) etherfabric.c 　
23085
 TXC_ATXAMP_LANE02_LBNTXC_ATXAMP_LANE02_LBN (3) etherfabric.c 　
23086
 TXC_ATXAMP_LANE13_LBNTXC_ATXAMP_LANE13_LBN (11) etherfabric.c 　
23087
 TXC_ATXAMP_1280_mVTXC_ATXAMP_1280_mV (0) etherfabric.c 　
23088
 TXC_ATXAMP_1200_mVTXC_ATXAMP_1200_mV (8) etherfabric.c 　
23089
 TXC_ATXAMP_1120_mVTXC_ATXAMP_1120_mV (12) etherfabric.c 　
23090
 TXC_ATXAMP_1060_mVTXC_ATXAMP_1060_mV (14) etherfabric.c 　
23091
 TXC_ATXAMP_0820_mVTXC_ATXAMP_0820_mV (25) etherfabric.c 　
23092
 TXC_ATXAMP_0720_mVTXC_ATXAMP_0720_mV (26) etherfabric.c 　
23093
 TXC_ATXAMP_0580_mVTXC_ATXAMP_0580_mV (27) etherfabric.c 　
23094
 TXC_ATXAMP_0440_mVTXC_ATXAMP_0440_mV (28) etherfabric.c 　
23095
 TXC_ATXAMP_0820_BOTHTXC_ATXAMP_0820_BOTH ( (TXC_ATXAMP_0820_mV << TXC_ATXAMP_LANE02_LBN) | \ (TXC_ATXAMP_0820_mV << TXC_ATXAMP_LANE13_LBN) ) etherfabric.c 　
23096
 TXC_ATXAMP_DEFAULTTXC_ATXAMP_DEFAULT (0x6060) etherfabric.c From databook
23097
 TXC_ALRGS_ATXPRE0TXC_ALRGS_ATXPRE0 (0xc043) etherfabric.c 　
23098
 TXC_ALRGS_ATXPRE1TXC_ALRGS_ATXPRE1 (0xc044) etherfabric.c 　
23099
 TXC_ATXPRE_NONETXC_ATXPRE_NONE (0) etherfabric.c 　
23100
 TXC_ATXPRE_DEFAULTTXC_ATXPRE_DEFAULT (0x1010) etherfabric.c From databook
23101
 TXC_REQUIRED_DEVSTXC_REQUIRED_DEVS ( MDIO_MMDREG_DEVS0_PCS | \ MDIO_MMDREG_DEVS0_PMAPMD | \ MDIO_MMDREG_DEVS0_PHYXS ) etherfabric.c 　
23102
 TENXPRESS_REQUIRED_DEVSTENXPRESS_REQUIRED_DEVS ( MDIO_MMDREG_DEVS0_PMAPMD | \ MDIO_MMDREG_DEVS0_PCS | \ MDIO_MMDREG_DEVS0_PHYXS ) etherfabric.c 　
23103
 PCS_TEST_SELECT_REGPCS_TEST_SELECT_REG 0xd807 etherfabric.c PRM 10.5.8
23104
 CLK312_EN_LBNCLK312_EN_LBN 3 etherfabric.c 　
23105
 CLK312_EN_WIDTHCLK312_EN_WIDTH 1 etherfabric.c 　
23106
 PCS_CLOCK_CTRL_REGPCS_CLOCK_CTRL_REG 0xd801 etherfabric.c 　
23107
 PLL312_RST_N_LBNPLL312_RST_N_LBN 2 etherfabric.c 　
23108
 PMA_PMD_EXT_CTRL_REGPMA_PMD_EXT_CTRL_REG 49152 etherfabric.c 　
23109
 PMA_PMD_EXT_SSR_LBNPMA_PMD_EXT_SSR_LBN 15 etherfabric.c 　
23110
 PCS_BOOT_STATUS_REGPCS_BOOT_STATUS_REG 0xd000 etherfabric.c 　
23111
 PCS_BOOT_FATAL_ERR_LBNPCS_BOOT_FATAL_ERR_LBN 0 etherfabric.c 　
23112
 PCS_BOOT_PROGRESS_LBNPCS_BOOT_PROGRESS_LBN 1 etherfabric.c 　
23113
 PCS_BOOT_PROGRESS_WIDTHPCS_BOOT_PROGRESS_WIDTH 2 etherfabric.c 　
23114
 PCS_BOOT_COMPLETE_LBNPCS_BOOT_COMPLETE_LBN 3 etherfabric.c 　
23115
 PCS_SOFT_RST2_REGPCS_SOFT_RST2_REG 0xd806 etherfabric.c 　
23116
 SERDES_RST_N_LBNSERDES_RST_N_LBN 13 etherfabric.c 　
23117
 XGXS_RST_N_LBNXGXS_RST_N_LBN 12 etherfabric.c 　
23118
 PM8358_REQUIRED_DEVSPM8358_REQUIRED_DEVS (MDIO_MMDREG_DEVS0_DTEXS) etherfabric.c 　
23119
 PMC_MASTER_REGPMC_MASTER_REG (0xd000) etherfabric.c 　
23120
 PMC_MASTER_ANLG_CTRLPMC_MASTER_ANLG_CTRL (1<< 11) etherfabric.c 　
23121
 PMC_MCONF2_REGPMC_MCONF2_REG (0xd002) etherfabric.c 　
23122
 PMC_MCONF2_TEDGEPMC_MCONF2_TEDGE (1 << 2) etherfabric.c 　
23123
 PMC_MCONF2_REDGEPMC_MCONF2_REDGE (1 << 3) etherfabric.c 　
23124
 PMC_ANALOG_RX_CFG0PMC_ANALOG_RX_CFG0 (0xd025) etherfabric.c 　
23125
 PMC_ANALOG_RX_CFG1PMC_ANALOG_RX_CFG1 (0xd02d) etherfabric.c 　
23126
 PMC_ANALOG_RX_CFG2PMC_ANALOG_RX_CFG2 (0xd035) etherfabric.c 　
23127
 PMC_ANALOG_RX_CFG3PMC_ANALOG_RX_CFG3 (0xd03d) etherfabric.c 　
23128
 PMC_ANALOG_RX_TERMPMC_ANALOG_RX_TERM (1 << 15) etherfabric.c Bit 15 of RX CFG: 0 for 100 ohms float,
23129
 PMC_ANALOG_RX_EQ_MASKPMC_ANALOG_RX_EQ_MASK (3 << 8) etherfabric.c 　
23130
 PMC_ANALOG_RX_EQ_NONEPMC_ANALOG_RX_EQ_NONE (0 << 8) etherfabric.c 　
23131
 PMC_ANALOG_RX_EQ_HALFPMC_ANALOG_RX_EQ_HALF (1 << 8) etherfabric.c 　
23132
 PMC_ANALOG_RX_EQ_FULLPMC_ANALOG_RX_EQ_FULL (2 << 8) etherfabric.c 　
23133
 PMC_ANALOG_RX_EQ_RSVDPMC_ANALOG_RX_EQ_RSVD (3 << 8) etherfabric.c 　
23134
 MAX_TEMP_THRESHMAX_TEMP_THRESH 90 etherfabric.c 　
23135
 PCA9539PCA9539 0x74 etherfabric.c 　
23136
 P0_INP0_IN 0x00 etherfabric.c 　
23137
 P0_OUTP0_OUT 0x02 etherfabric.c 　
23138
 P0_CONFIGP0_CONFIG 0x06 etherfabric.c 　
23139
 P0_EN_1V0X_LBNP0_EN_1V0X_LBN 0 etherfabric.c 　
23140
 P0_EN_1V0X_WIDTHP0_EN_1V0X_WIDTH 1 etherfabric.c 　
23141
 P0_EN_1V2_LBNP0_EN_1V2_LBN 1 etherfabric.c 　
23142
 P0_EN_1V2_WIDTHP0_EN_1V2_WIDTH 1 etherfabric.c 　
23143
 P0_EN_2V5_LBNP0_EN_2V5_LBN 2 etherfabric.c 　
23144
 P0_EN_2V5_WIDTHP0_EN_2V5_WIDTH 1 etherfabric.c 　
23145
 P0_EN_3V3X_LBNP0_EN_3V3X_LBN 3 etherfabric.c 　
23146
 P0_EN_3V3X_WIDTHP0_EN_3V3X_WIDTH 1 etherfabric.c 　
23147
 P0_EN_5V_LBNP0_EN_5V_LBN 4 etherfabric.c 　
23148
 P0_EN_5V_WIDTHP0_EN_5V_WIDTH 1 etherfabric.c 　
23149
 P0_X_TRST_LBNP0_X_TRST_LBN 6 etherfabric.c 　
23150
 P0_X_TRST_WIDTHP0_X_TRST_WIDTH 1 etherfabric.c 　
23151
 P1_INP1_IN 0x01 etherfabric.c 　
23152
 P1_CONFIGP1_CONFIG 0x07 etherfabric.c 　
23153
 P1_AFE_PWD_LBNP1_AFE_PWD_LBN 0 etherfabric.c 　
23154
 P1_AFE_PWD_WIDTHP1_AFE_PWD_WIDTH 1 etherfabric.c 　
23155
 P1_DSP_PWD25_LBNP1_DSP_PWD25_LBN 1 etherfabric.c 　
23156
 P1_DSP_PWD25_WIDTHP1_DSP_PWD25_WIDTH 1 etherfabric.c 　
23157
 P1_SPARE_LBNP1_SPARE_LBN 4 etherfabric.c 　
23158
 P1_SPARE_WIDTHP1_SPARE_WIDTH 4 etherfabric.c 　
23159
 MAX6647MAX6647 0x4e etherfabric.c 　
23160
 RSLRSL 0x02 etherfabric.c 　
23161
 RLHNRLHN 0x05 etherfabric.c 　
23162
 WLHOWLHO 0x0b etherfabric.c 　
23163
 FALCON_MAC_ADDRESS_OFFSETFALCON_MAC_ADDRESS_OFFSET 0x310 etherfabric.c 　
23164
 SF_NV_CONFIG_BASESF_NV_CONFIG_BASE 0x300 etherfabric.c 　
23165
 SF_NV_CONFIG_EXTRASF_NV_CONFIG_EXTRA 0xA0 etherfabric.c 　
23166
 drv_versiondrv_version "v1.2" forcedeth.c 　
23167
 drv_datedrv_date "05-14-2005" forcedeth.c 　
23168
 ETH_DATA_LENETH_DATA_LEN 1500 forcedeth.c 　
23169
 PCI_DEVICE_ID_NVIDIA_NVENET_1PCI_DEVICE_ID_NVIDIA_NVENET_1 0x01c3 forcedeth.c 　
23170
 PCI_DEVICE_ID_NVIDIA_NVENET_2PCI_DEVICE_ID_NVIDIA_NVENET_2 0x0066 forcedeth.c 　
23171
 PCI_DEVICE_ID_NVIDIA_NVENET_4PCI_DEVICE_ID_NVIDIA_NVENET_4 0x0086 forcedeth.c 　
23172
 PCI_DEVICE_ID_NVIDIA_NVENET_5PCI_DEVICE_ID_NVIDIA_NVENET_5 0x008c forcedeth.c 　
23173
 PCI_DEVICE_ID_NVIDIA_NVENET_3PCI_DEVICE_ID_NVIDIA_NVENET_3 0x00d6 forcedeth.c 　
23174
 PCI_DEVICE_ID_NVIDIA_NVENET_7PCI_DEVICE_ID_NVIDIA_NVENET_7 0x00df forcedeth.c 　
23175
 PCI_DEVICE_ID_NVIDIA_NVENET_6PCI_DEVICE_ID_NVIDIA_NVENET_6 0x00e6 forcedeth.c 　
23176
 PCI_DEVICE_ID_NVIDIA_NVENET_8PCI_DEVICE_ID_NVIDIA_NVENET_8 0x0056 forcedeth.c 　
23177
 PCI_DEVICE_ID_NVIDIA_NVENET_9PCI_DEVICE_ID_NVIDIA_NVENET_9 0x0057 forcedeth.c 　
23178
 PCI_DEVICE_ID_NVIDIA_NVENET_10PCI_DEVICE_ID_NVIDIA_NVENET_10 0x0037 forcedeth.c 　
23179
 PCI_DEVICE_ID_NVIDIA_NVENET_11PCI_DEVICE_ID_NVIDIA_NVENET_11 0x0038 forcedeth.c 　
23180
 PCI_DEVICE_ID_NVIDIA_NVENET_15PCI_DEVICE_ID_NVIDIA_NVENET_15 0x0373 forcedeth.c 　
23181
 DEV_NEED_LASTPACKET1DEV_NEED_LASTPACKET1 0x0001 forcedeth.c set LASTPACKET1 in tx flags
23182
 DEV_IRQMASK_1DEV_IRQMASK_1 0x0002 forcedeth.c use NVREG_IRQMASK_WANTED_1 for irq mask
23183
 DEV_IRQMASK_2DEV_IRQMASK_2 0x0004 forcedeth.c use NVREG_IRQMASK_WANTED_2 for irq mask
23184
 DEV_NEED_TIMERIRQDEV_NEED_TIMERIRQ 0x0008 forcedeth.c set the timer irq flag in the irq mask
23185
 DEV_NEED_LINKTIMERDEV_NEED_LINKTIMER 0x0010 forcedeth.c poll link settings. Relies on the timer irq
23186
 FLAG_MASK_V1FLAG_MASK_V1 0xffff0000 forcedeth.c 　
23187
 FLAG_MASK_V2FLAG_MASK_V2 0xffffc000 forcedeth.c 　
23188
 LEN_MASK_V1LEN_MASK_V1 (0xffffffff ^ FLAG_MASK_V1) forcedeth.c 　
23189
 LEN_MASK_V2LEN_MASK_V2 (0xffffffff ^ FLAG_MASK_V2) forcedeth.c 　
23190
 NV_TX_LASTPACKETNV_TX_LASTPACKET (1<<16) forcedeth.c 　
23191
 NV_TX_RETRYERRORNV_TX_RETRYERROR (1<<19) forcedeth.c 　
23192
 NV_TX_LASTPACKET1NV_TX_LASTPACKET1 (1<<24) forcedeth.c 　
23193
 NV_TX_DEFERREDNV_TX_DEFERRED (1<<26) forcedeth.c 　
23194
 NV_TX_CARRIERLOSTNV_TX_CARRIERLOST (1<<27) forcedeth.c 　
23195
 NV_TX_LATECOLLISIONNV_TX_LATECOLLISION (1<<28) forcedeth.c 　
23196
 NV_TX_UNDERFLOWNV_TX_UNDERFLOW (1<<29) forcedeth.c 　
23197
 NV_TX_ERRORNV_TX_ERROR (1<<30) forcedeth.c 　
23198
 NV_TX_VALIDNV_TX_VALID (1<<31) forcedeth.c 　
23199
 NV_TX2_LASTPACKETNV_TX2_LASTPACKET (1<<29) forcedeth.c 　
23200
 NV_TX2_RETRYERRORNV_TX2_RETRYERROR (1<<18) forcedeth.c 　
23201
 NV_TX2_LASTPACKET1NV_TX2_LASTPACKET1 (1<<23) forcedeth.c 　
23202
 NV_TX2_DEFERREDNV_TX2_DEFERRED (1<<25) forcedeth.c 　
23203
 NV_TX2_CARRIERLOSTNV_TX2_CARRIERLOST (1<<26) forcedeth.c 　
23204
 NV_TX2_LATECOLLISIONNV_TX2_LATECOLLISION (1<<27) forcedeth.c 　
23205
 NV_TX2_UNDERFLOWNV_TX2_UNDERFLOW (1<<28) forcedeth.c 　
23206
 NV_TX2_ERRORNV_TX2_ERROR (1<<30) forcedeth.c 　
23207
 NV_TX2_VALIDNV_TX2_VALID (1<<31) forcedeth.c 　
23208
 NV_RX_DESCRIPTORVALIDNV_RX_DESCRIPTORVALID (1<<16) forcedeth.c 　
23209
 NV_RX_MISSEDFRAMENV_RX_MISSEDFRAME (1<<17) forcedeth.c 　
23210
 NV_RX_SUBSTRACT1NV_RX_SUBSTRACT1 (1<<18) forcedeth.c 　
23211
 NV_RX_ERROR1NV_RX_ERROR1 (1<<23) forcedeth.c 　
23212
 NV_RX_ERROR2NV_RX_ERROR2 (1<<24) forcedeth.c 　
23213
 NV_RX_ERROR3NV_RX_ERROR3 (1<<25) forcedeth.c 　
23214
 NV_RX_ERROR4NV_RX_ERROR4 (1<<26) forcedeth.c 　
23215
 NV_RX_CRCERRNV_RX_CRCERR (1<<27) forcedeth.c 　
23216
 NV_RX_OVERFLOWNV_RX_OVERFLOW (1<<28) forcedeth.c 　
23217
 NV_RX_FRAMINGERRNV_RX_FRAMINGERR (1<<29) forcedeth.c 　
23218
 NV_RX_ERRORNV_RX_ERROR (1<<30) forcedeth.c 　
23219
 NV_RX_AVAILNV_RX_AVAIL (1<<31) forcedeth.c 　
23220
 NV_RX2_CHECKSUMMASKNV_RX2_CHECKSUMMASK (0x1C000000) forcedeth.c 　
23221
 NV_RX2_CHECKSUMOK1NV_RX2_CHECKSUMOK1 (0x10000000) forcedeth.c 　
23222
 NV_RX2_CHECKSUMOK2NV_RX2_CHECKSUMOK2 (0x14000000) forcedeth.c 　
23223
 NV_RX2_CHECKSUMOK3NV_RX2_CHECKSUMOK3 (0x18000000) forcedeth.c 　
23224
 NV_RX2_DESCRIPTORVALIDNV_RX2_DESCRIPTORVALID (1<<29) forcedeth.c 　
23225
 NV_RX2_SUBSTRACT1NV_RX2_SUBSTRACT1 (1<<25) forcedeth.c 　
23226
 NV_RX2_ERROR1NV_RX2_ERROR1 (1<<18) forcedeth.c 　
23227
 NV_RX2_ERROR2NV_RX2_ERROR2 (1<<19) forcedeth.c 　
23228
 NV_RX2_ERROR3NV_RX2_ERROR3 (1<<20) forcedeth.c 　
23229
 NV_RX2_ERROR4NV_RX2_ERROR4 (1<<21) forcedeth.c 　
23230
 NV_RX2_CRCERRNV_RX2_CRCERR (1<<22) forcedeth.c 　
23231
 NV_RX2_OVERFLOWNV_RX2_OVERFLOW (1<<23) forcedeth.c 　
23232
 NV_RX2_FRAMINGERRNV_RX2_FRAMINGERR (1<<24) forcedeth.c 　
23233
 NV_RX2_ERRORNV_RX2_ERROR (1<<30) forcedeth.c 　
23234
 NV_RX2_AVAILNV_RX2_AVAIL (1<<31) forcedeth.c 　
23235
 NV_PCI_REGSZNV_PCI_REGSZ 0x270 forcedeth.c 　
23236
 NV_TXRX_RESET_DELAYNV_TXRX_RESET_DELAY 4 forcedeth.c 　
23237
 NV_TXSTOP_DELAY1NV_TXSTOP_DELAY1 10 forcedeth.c 　
23238
 NV_TXSTOP_DELAY1MAXNV_TXSTOP_DELAY1MAX 500000 forcedeth.c 　
23239
 NV_TXSTOP_DELAY2NV_TXSTOP_DELAY2 100 forcedeth.c 　
23240
 NV_RXSTOP_DELAY1NV_RXSTOP_DELAY1 10 forcedeth.c 　
23241
 NV_RXSTOP_DELAY1MAXNV_RXSTOP_DELAY1MAX 500000 forcedeth.c 　
23242
 NV_RXSTOP_DELAY2NV_RXSTOP_DELAY2 100 forcedeth.c 　
23243
 NV_SETUP5_DELAYNV_SETUP5_DELAY 5 forcedeth.c 　
23244
 NV_SETUP5_DELAYMAXNV_SETUP5_DELAYMAX 50000 forcedeth.c 　
23245
 NV_POWERUP_DELAYNV_POWERUP_DELAY 5 forcedeth.c 　
23246
 NV_POWERUP_DELAYMAXNV_POWERUP_DELAYMAX 5000 forcedeth.c 　
23247
 NV_MIIBUSY_DELAYNV_MIIBUSY_DELAY 50 forcedeth.c 　
23248
 NV_MIIPHY_DELAYNV_MIIPHY_DELAY 10 forcedeth.c 　
23249
 NV_MIIPHY_DELAYMAXNV_MIIPHY_DELAYMAX 10000 forcedeth.c 　
23250
 NV_WAKEUPPATTERNSNV_WAKEUPPATTERNS 5 forcedeth.c 　
23251
 NV_WAKEUPMASKENTRIESNV_WAKEUPMASKENTRIES 4 forcedeth.c 　
23252
 NV_WATCHDOG_TIMEONV_WATCHDOG_TIMEO (5*HZ) forcedeth.c 　
23253
 RX_RINGRX_RING 4 forcedeth.c 　
23254
 TX_RINGTX_RING 2 forcedeth.c 　
23255
 TX_LIMIT_STOPTX_LIMIT_STOP 63 forcedeth.c 　
23256
 TX_LIMIT_STARTTX_LIMIT_START 62 forcedeth.c 　
23257
 RX_NIC_BUFSIZERX_NIC_BUFSIZE (ETH_DATA_LEN + 64) forcedeth.c 　
23258
 RX_ALLOC_BUFSIZERX_ALLOC_BUFSIZE (ETH_DATA_LEN + 128) forcedeth.c 　
23259
 OOM_REFILLOOM_REFILL (1+HZ/20) forcedeth.c 　
23260
 POLL_WAITPOLL_WAIT (1+HZ/100) forcedeth.c 　
23261
 LINK_TIMEOUTLINK_TIMEOUT (3*HZ) forcedeth.c 　
23262
 DESC_VER_1DESC_VER_1 0x0 forcedeth.c 　
23263
 DESC_VER_2DESC_VER_2 (0x02100|NVREG_TXRXCTL_RXCHECK) forcedeth.c 　
23264
 PHY_OUI_MARVELLPHY_OUI_MARVELL 0x5043 forcedeth.c 　
23265
 PHY_OUI_CICADAPHY_OUI_CICADA 0x03f1 forcedeth.c 　
23266
 PHYID1_OUI_MASKPHYID1_OUI_MASK 0x03ff forcedeth.c 　
23267
 PHYID1_OUI_SHFTPHYID1_OUI_SHFT 6 forcedeth.c 　
23268
 PHYID2_OUI_MASKPHYID2_OUI_MASK 0xfc00 forcedeth.c 　
23269
 PHYID2_OUI_SHFTPHYID2_OUI_SHFT 10 forcedeth.c 　
23270
 PHY_INIT1PHY_INIT1 0x0f000 forcedeth.c 　
23271
 PHY_INIT2PHY_INIT2 0x0e00 forcedeth.c 　
23272
 PHY_INIT3PHY_INIT3 0x01000 forcedeth.c 　
23273
 PHY_INIT4PHY_INIT4 0x0200 forcedeth.c 　
23274
 PHY_INIT5PHY_INIT5 0x0004 forcedeth.c 　
23275
 PHY_INIT6PHY_INIT6 0x02000 forcedeth.c 　
23276
 PHY_GIGABITPHY_GIGABIT 0x0100 forcedeth.c 　
23277
 PHY_TIMEOUTPHY_TIMEOUT 0x1 forcedeth.c 　
23278
 PHY_ERRORPHY_ERROR 0x2 forcedeth.c 　
23279
 PHY_100PHY_100 0x1 forcedeth.c 　
23280
 PHY_1000PHY_1000 0x2 forcedeth.c 　
23281
 PHY_HALFPHY_HALF 0x100 forcedeth.c 　
23282
 MAC_ADDR_CORRECTMAC_ADDR_CORRECT 0x01 forcedeth.c 　
23283
 tx_ringtx_ring forcedeth_bufs.tx_ring forcedeth.c 　
23284
 rx_ringrx_ring forcedeth_bufs.rx_ring forcedeth.c 　
23285
 txbtxb forcedeth_bufs.txb forcedeth.c 　
23286
 rxbrxb forcedeth_bufs.rxb forcedeth.c 　
23287
 MII_READMII_READ (-1) forcedeth.c 　
23288
 IORESOURCE_MEMIORESOURCE_MEM 0x00000200 forcedeth.c 　
23289
 board_foundboard_found 1 forcedeth.c 　
23290
 valid_linkvalid_link 0 forcedeth.c 　
23291
 IPOIB_NUM_SEND_WQESIPOIB_NUM_SEND_WQES 2 ipoib.c 　
23292
 IPOIB_NUM_RECV_WQESIPOIB_NUM_RECV_WQES 4 ipoib.c 　
23293
 IPOIB_NUM_CQESIPOIB_NUM_CQES 8 ipoib.c 　
23294
 EINPROGRESS_JOININGEINPROGRESS_JOINING ( EINPROGRESS | EUNIQ_01 ) ipoib.c 　
23295
 IPOIB_NUM_CACHED_PEERSIPOIB_NUM_CACHED_PEERS 4 ipoib.c 　
23296
 TX_RING_SIZETX_RING_SIZE 2 mtd80x.c 　
23297
 TX_QUEUE_LENTX_QUEUE_LEN 10 mtd80x.c Limit ring entries actually used.
23298
 RX_RING_SIZERX_RING_SIZE 4 mtd80x.c 　
23299
 HZHZ 100 mtd80x.c 　
23300
 TX_TIME_OUTTX_TIME_OUT (6*HZ) mtd80x.c 　
23301
 PKT_BUF_SZPKT_BUF_SZ 1536 mtd80x.c 　
23302
 MASK_MIIR_MII_READMASK_MIIR_MII_READ 0x00000000 mtd80x.c 　
23303
 MASK_MIIR_MII_WRITEMASK_MIIR_MII_WRITE 0x00000008 mtd80x.c 　
23304
 MASK_MIIR_MII_MDOMASK_MIIR_MII_MDO 0x00000004 mtd80x.c 　
23305
 MASK_MIIR_MII_MDIMASK_MIIR_MII_MDI 0x00000002 mtd80x.c 　
23306
 MASK_MIIR_MII_MDCMASK_MIIR_MII_MDC 0x00000001 mtd80x.c 　
23307
 OP_READOP_READ 0x6000 mtd80x.c ST:01+OP:10+PHYAD+REGAD+TA:Z0
23308
 OP_WRITEOP_WRITE 0x5002 mtd80x.c ST:01+OP:01+PHYAD+REGAD+TA:10
23309
 MysonPHYIDMysonPHYID 0xd0000302 mtd80x.c 　
23310
 MysonPHYID0MysonPHYID0 0x0302 mtd80x.c 　
23311
 StatusRegisterStatusRegister 18 mtd80x.c 　
23312
 SPEED100SPEED100 0x0400 mtd80x.c bit10
23313
 FULLMODEFULLMODE 0x0800 mtd80x.c bit11
23314
 SeeqPHYID0SeeqPHYID0 0x0016 mtd80x.c 　
23315
 MIIRegister18MIIRegister18 18 mtd80x.c 　
23316
 SPD_DET_100SPD_DET_100 0x80 mtd80x.c 　
23317
 DPLX_DET_FULLDPLX_DET_FULL 0x40 mtd80x.c 　
23318
 AhdocPHYID0AhdocPHYID0 0x0022 mtd80x.c 　
23319
 DiagnosticRegDiagnosticReg 18 mtd80x.c 　
23320
 DPLX_FULLDPLX_FULL 0x0800 mtd80x.c 　
23321
 Speed_100Speed_100 0x0400 mtd80x.c 　
23322
 MarvellPHYID0MarvellPHYID0 0x0141 mtd80x.c 　
23323
 LevelOnePHYID0LevelOnePHYID0 0x0013 mtd80x.c 　
23324
 MII1000BaseTControlRegMII1000BaseTControlReg 9 mtd80x.c 　
23325
 MII1000BaseTStatusRegMII1000BaseTStatusReg 10 mtd80x.c 　
23326
 SpecificRegSpecificReg 17 mtd80x.c 　
23327
 PHYAbletoPerform1000FullDuplexPHYAbletoPerform1000FullDuplex 0x0200 mtd80x.c 　
23328
 PHYAbletoPerform1000HalfDuplexPHYAbletoPerform1000HalfDuplex 0x0100 mtd80x.c 　
23329
 PHY1000AbilityMaskPHY1000AbilityMask 0x300 mtd80x.c 　
23330
 SpeedMaskSpeedMask 0x0c000 mtd80x.c 　
23331
 Speed_1000MSpeed_1000M 0x08000 mtd80x.c 　
23332
 Speed_100MSpeed_100M 0x4000 mtd80x.c 　
23333
 Speed_10MSpeed_10M 0 mtd80x.c 　
23334
 Full_DuplexFull_Duplex 0x2000 mtd80x.c 　
23335
 LXT1000_100MLXT1000_100M 0x08000 mtd80x.c 　
23336
 LXT1000_1000MLXT1000_1000M 0x0c000 mtd80x.c 　
23337
 LXT1000_FullLXT1000_Full 0x200 mtd80x.c 　
23338
 PS10PS10 0x00080000 mtd80x.c 　
23339
 FDFD 0x00100000 mtd80x.c 　
23340
 PS1000PS1000 0x00010000 mtd80x.c 　
23341
 LinkIsUpLinkIsUp 0x0004 mtd80x.c 　
23342
 LinkIsUp2LinkIsUp2 0x00040000 mtd80x.c 　
23343
 txbtxb mtd80x_bufs.txb mtd80x.c 　
23344
 rxbrxb mtd80x_bufs.rxb mtd80x.c 　
23345
 MYRI10GE_TRANSMIT_WRAPMYRI10GE_TRANSMIT_WRAP 1U myri10ge.c 　
23346
 MYRI10GE_RECEIVE_WRAPMYRI10GE_RECEIVE_WRAP 7U myri10ge.c 　
23347
 MYRI10GE_RECEIVE_COMPLETION_WRAMYRI10GE_RECEIVE_COMPLETION_WRA 31U myri10ge.c 　
23348
 VS_ADDRVS_ADDR ( vs + 0x18 ) myri10ge.c 　
23349
 VS_DATAVS_DATA ( vs + 0x14 ) myri10ge.c 　
23350
 VS_MODEVS_MODE ( vs + 0x10 ) myri10ge.c 　
23351
 VS_MODE_READ32VS_MODE_READ32 0x3 myri10ge.c 　
23352
 VS_MODE_LOCATEVS_MODE_LOCATE 0x8 myri10ge.c 　
23353
 VS_LOCATE_STRING_SPECSVS_LOCATE_STRING_SPECS 0x3 myri10ge.c 　
23354
 INCLUDE_NEINCLUDE_NE 1 ne.c 　
23355
 NE_SCANNE_SCAN 0x300,0x280,0x320,0x340,0x380 ne.c 　
23356
 ASIC_PIOASIC_PIO NE_DATA ne2k_isa.c 　
23357
 HZHZ 100 ns83820.c 　
23358
 USE_64BIT_ADDRUSE_64BIT_ADDR "+" ns83820.c 　
23359
 TRY_DACTRY_DAC 1 ns83820.c 　
23360
 TRY_DACTRY_DAC 0 ns83820.c 　
23361
 RX_BUF_SIZERX_BUF_SIZE 1500 ns83820.c 8192
23362
 NR_RX_DESCNR_RX_DESC 64 ns83820.c 　
23363
 NR_TX_DESCNR_TX_DESC 1 ns83820.c 　
23364
 REAL_RX_BUF_SIZEREAL_RX_BUF_SIZE (RX_BUF_SIZE + 14 + 6) ns83820.c rx/tx mac addr + type
23365
 MIN_TX_DESC_FREEMIN_TX_DESC_FREE 8 ns83820.c 　
23366
 CFGCSCFGCS 0x04 ns83820.c 　
23367
 CR_TXECR_TXE 0x00000001 ns83820.c 　
23368
 CR_TXDCR_TXD 0x00000002 ns83820.c 　
23369
 CR_RXECR_RXE 0x00000004 ns83820.c 　
23370
 CR_RXDCR_RXD 0x00000008 ns83820.c 　
23371
 CR_TXRCR_TXR 0x00000010 ns83820.c 　
23372
 CR_RXRCR_RXR 0x00000020 ns83820.c 　
23373
 CR_SWICR_SWI 0x00000080 ns83820.c 　
23374
 CR_RSTCR_RST 0x00000100 ns83820.c 　
23375
 PTSCR_EEBIST_FAILPTSCR_EEBIST_FAIL 0x00000001 ns83820.c 　
23376
 PTSCR_EEBIST_ENPTSCR_EEBIST_EN 0x00000002 ns83820.c 　
23377
 PTSCR_EELOAD_ENPTSCR_EELOAD_EN 0x00000004 ns83820.c 　
23378
 PTSCR_RBIST_FAILPTSCR_RBIST_FAIL 0x000001b8 ns83820.c 　
23379
 PTSCR_RBIST_DONEPTSCR_RBIST_DONE 0x00000200 ns83820.c 　
23380
 PTSCR_RBIST_ENPTSCR_RBIST_EN 0x00000400 ns83820.c 　
23381
 PTSCR_RBIST_RSTPTSCR_RBIST_RST 0x00002000 ns83820.c 　
23382
 MEAR_EEDIMEAR_EEDI 0x00000001 ns83820.c 　
23383
 MEAR_EEDOMEAR_EEDO 0x00000002 ns83820.c 　
23384
 MEAR_EECLKMEAR_EECLK 0x00000004 ns83820.c 　
23385
 MEAR_EESELMEAR_EESEL 0x00000008 ns83820.c 　
23386
 MEAR_MDIOMEAR_MDIO 0x00000010 ns83820.c 　
23387
 MEAR_MDDIRMEAR_MDDIR 0x00000020 ns83820.c 　
23388
 MEAR_MDCMEAR_MDC 0x00000040 ns83820.c 　
23389
 ISR_TXDESC3ISR_TXDESC3 0x40000000 ns83820.c 　
23390
 ISR_TXDESC2ISR_TXDESC2 0x20000000 ns83820.c 　
23391
 ISR_TXDESC1ISR_TXDESC1 0x10000000 ns83820.c 　
23392
 ISR_TXDESC0ISR_TXDESC0 0x08000000 ns83820.c 　
23393
 ISR_RXDESC3ISR_RXDESC3 0x04000000 ns83820.c 　
23394
 ISR_RXDESC2ISR_RXDESC2 0x02000000 ns83820.c 　
23395
 ISR_RXDESC1ISR_RXDESC1 0x01000000 ns83820.c 　
23396
 ISR_RXDESC0ISR_RXDESC0 0x00800000 ns83820.c 　
23397
 ISR_TXRCMPISR_TXRCMP 0x00400000 ns83820.c 　
23398
 ISR_RXRCMPISR_RXRCMP 0x00200000 ns83820.c 　
23399
 ISR_DPERRISR_DPERR 0x00100000 ns83820.c 　
23400
 ISR_SSERRISR_SSERR 0x00080000 ns83820.c 　
23401
 ISR_RMABTISR_RMABT 0x00040000 ns83820.c 　
23402
 ISR_RTABTISR_RTABT 0x00020000 ns83820.c 　
23403
 ISR_RXSOVRISR_RXSOVR 0x00010000 ns83820.c 　
23404
 ISR_HIBINTISR_HIBINT 0x00008000 ns83820.c 　
23405
 ISR_PHYISR_PHY 0x00004000 ns83820.c 　
23406
 ISR_PMEISR_PME 0x00002000 ns83820.c 　
23407
 ISR_SWIISR_SWI 0x00001000 ns83820.c 　
23408
 ISR_MIBISR_MIB 0x00000800 ns83820.c 　
23409
 ISR_TXURNISR_TXURN 0x00000400 ns83820.c 　
23410
 ISR_TXIDLEISR_TXIDLE 0x00000200 ns83820.c 　
23411
 ISR_TXERRISR_TXERR 0x00000100 ns83820.c 　
23412
 ISR_TXDESCISR_TXDESC 0x00000080 ns83820.c 　
23413
 ISR_TXOKISR_TXOK 0x00000040 ns83820.c 　
23414
 ISR_RXORNISR_RXORN 0x00000020 ns83820.c 　
23415
 ISR_RXIDLEISR_RXIDLE 0x00000010 ns83820.c 　
23416
 ISR_RXEARLYISR_RXEARLY 0x00000008 ns83820.c 　
23417
 ISR_RXERRISR_RXERR 0x00000004 ns83820.c 　
23418
 ISR_RXDESCISR_RXDESC 0x00000002 ns83820.c 　
23419
 ISR_RXOKISR_RXOK 0x00000001 ns83820.c 　
23420
 TXCFG_CSITXCFG_CSI 0x80000000 ns83820.c 　
23421
 TXCFG_HBITXCFG_HBI 0x40000000 ns83820.c 　
23422
 TXCFG_MLBTXCFG_MLB 0x20000000 ns83820.c 　
23423
 TXCFG_ATPTXCFG_ATP 0x10000000 ns83820.c 　
23424
 TXCFG_ECRETRYTXCFG_ECRETRY 0x00800000 ns83820.c 　
23425
 TXCFG_BRST_DISTXCFG_BRST_DIS 0x00080000 ns83820.c 　
23426
 TXCFG_MXDMA1024TXCFG_MXDMA1024 0x00000000 ns83820.c 　
23427
 TXCFG_MXDMA512TXCFG_MXDMA512 0x00700000 ns83820.c 　
23428
 TXCFG_MXDMA256TXCFG_MXDMA256 0x00600000 ns83820.c 　
23429
 TXCFG_MXDMA128TXCFG_MXDMA128 0x00500000 ns83820.c 　
23430
 TXCFG_MXDMA64TXCFG_MXDMA64 0x00400000 ns83820.c 　
23431
 TXCFG_MXDMA32TXCFG_MXDMA32 0x00300000 ns83820.c 　
23432
 TXCFG_MXDMA16TXCFG_MXDMA16 0x00200000 ns83820.c 　
23433
 TXCFG_MXDMA8TXCFG_MXDMA8 0x00100000 ns83820.c 　
23434
 CFG_LNKSTSCFG_LNKSTS 0x80000000 ns83820.c 　
23435
 CFG_SPDSTSCFG_SPDSTS 0x60000000 ns83820.c 　
23436
 CFG_SPDSTS1CFG_SPDSTS1 0x40000000 ns83820.c 　
23437
 CFG_SPDSTS0CFG_SPDSTS0 0x20000000 ns83820.c 　
23438
 CFG_DUPSTSCFG_DUPSTS 0x10000000 ns83820.c 　
23439
 CFG_TBI_ENCFG_TBI_EN 0x01000000 ns83820.c 　
23440
 CFG_MODE_1000CFG_MODE_1000 0x00400000 ns83820.c 　
23441
 CFG_AUTO_1000CFG_AUTO_1000 0x00200000 ns83820.c 　
23442
 CFG_PINT_CTLCFG_PINT_CTL 0x001c0000 ns83820.c 　
23443
 CFG_PINT_DUPSTSCFG_PINT_DUPSTS 0x00100000 ns83820.c 　
23444
 CFG_PINT_LNKSTSCFG_PINT_LNKSTS 0x00080000 ns83820.c 　
23445
 CFG_PINT_SPDSTSCFG_PINT_SPDSTS 0x00040000 ns83820.c 　
23446
 CFG_TMRTESTCFG_TMRTEST 0x00020000 ns83820.c 　
23447
 CFG_MRM_DISCFG_MRM_DIS 0x00010000 ns83820.c 　
23448
 CFG_MWI_DISCFG_MWI_DIS 0x00008000 ns83820.c 　
23449
 CFG_T64ADDRCFG_T64ADDR 0x00004000 ns83820.c 　
23450
 CFG_PCI64_DETCFG_PCI64_DET 0x00002000 ns83820.c 　
23451
 CFG_DATA64_ENCFG_DATA64_EN 0x00001000 ns83820.c 　
23452
 CFG_M64ADDRCFG_M64ADDR 0x00000800 ns83820.c 　
23453
 CFG_PHY_RSTCFG_PHY_RST 0x00000400 ns83820.c 　
23454
 CFG_PHY_DISCFG_PHY_DIS 0x00000200 ns83820.c 　
23455
 CFG_EXTSTS_ENCFG_EXTSTS_EN 0x00000100 ns83820.c 　
23456
 CFG_REQALGCFG_REQALG 0x00000080 ns83820.c 　
23457
 CFG_SBCFG_SB 0x00000040 ns83820.c 　
23458
 CFG_POWCFG_POW 0x00000020 ns83820.c 　
23459
 CFG_EXDCFG_EXD 0x00000010 ns83820.c 　
23460
 CFG_PESELCFG_PESEL 0x00000008 ns83820.c 　
23461
 CFG_BROM_DISCFG_BROM_DIS 0x00000004 ns83820.c 　
23462
 CFG_EXT_125CFG_EXT_125 0x00000002 ns83820.c 　
23463
 CFG_BEMCFG_BEM 0x00000001 ns83820.c 　
23464
 EXTSTS_UDPPKTEXTSTS_UDPPKT 0x00200000 ns83820.c 　
23465
 EXTSTS_TCPPKTEXTSTS_TCPPKT 0x00080000 ns83820.c 　
23466
 EXTSTS_IPPKTEXTSTS_IPPKT 0x00020000 ns83820.c 　
23467
 SPDSTS_POLARITYSPDSTS_POLARITY (CFG_SPDSTS1 | CFG_SPDSTS0 | CFG_DUPSTS | (lnksts ? CFG_LNKSTS : 0)) ns83820.c 　
23468
 MIBC_MIBSMIBC_MIBS 0x00000008 ns83820.c 　
23469
 MIBC_ACLRMIBC_ACLR 0x00000004 ns83820.c 　
23470
 MIBC_FRZMIBC_FRZ 0x00000002 ns83820.c 　
23471
 MIBC_WRNMIBC_WRN 0x00000001 ns83820.c 　
23472
 PCR_PSENPCR_PSEN (1 << 31) ns83820.c 　
23473
 PCR_PS_MCASTPCR_PS_MCAST (1 << 30) ns83820.c 　
23474
 PCR_PS_DAPCR_PS_DA (1 << 29) ns83820.c 　
23475
 PCR_STHI_8PCR_STHI_8 (3 << 23) ns83820.c 　
23476
 PCR_STLO_4PCR_STLO_4 (1 << 23) ns83820.c 　
23477
 PCR_FFHI_8KPCR_FFHI_8K (3 << 21) ns83820.c 　
23478
 PCR_FFLO_4KPCR_FFLO_4K (1 << 21) ns83820.c 　
23479
 PCR_PAUSE_CNTPCR_PAUSE_CNT 0xFFFE ns83820.c 　
23480
 RXCFG_AEPRXCFG_AEP 0x80000000 ns83820.c 　
23481
 RXCFG_ARPRXCFG_ARP 0x40000000 ns83820.c 　
23482
 RXCFG_STRIPCRCRXCFG_STRIPCRC 0x20000000 ns83820.c 　
23483
 RXCFG_RX_FDRXCFG_RX_FD 0x10000000 ns83820.c 　
23484
 RXCFG_ALPRXCFG_ALP 0x08000000 ns83820.c 　
23485
 RXCFG_AIRLRXCFG_AIRL 0x04000000 ns83820.c 　
23486
 RXCFG_MXDMA512RXCFG_MXDMA512 0x00700000 ns83820.c 　
23487
 RXCFG_DRTHRXCFG_DRTH 0x0000003e ns83820.c 　
23488
 RXCFG_DRTH0RXCFG_DRTH0 0x00000002 ns83820.c 　
23489
 RFCR_RFENRFCR_RFEN 0x80000000 ns83820.c 　
23490
 RFCR_AABRFCR_AAB 0x40000000 ns83820.c 　
23491
 RFCR_AAMRFCR_AAM 0x20000000 ns83820.c 　
23492
 RFCR_AAURFCR_AAU 0x10000000 ns83820.c 　
23493
 RFCR_APMRFCR_APM 0x08000000 ns83820.c 　
23494
 RFCR_APATRFCR_APAT 0x07800000 ns83820.c 　
23495
 RFCR_APAT3RFCR_APAT3 0x04000000 ns83820.c 　
23496
 RFCR_APAT2RFCR_APAT2 0x02000000 ns83820.c 　
23497
 RFCR_APAT1RFCR_APAT1 0x01000000 ns83820.c 　
23498
 RFCR_APAT0RFCR_APAT0 0x00800000 ns83820.c 　
23499
 RFCR_AARPRFCR_AARP 0x00400000 ns83820.c 　
23500
 RFCR_MHENRFCR_MHEN 0x00200000 ns83820.c 　
23501
 RFCR_UHENRFCR_UHEN 0x00100000 ns83820.c 　
23502
 RFCR_ULMRFCR_ULM 0x00080000 ns83820.c 　
23503
 VRCR_RUDPEVRCR_RUDPE 0x00000080 ns83820.c 　
23504
 VRCR_RTCPEVRCR_RTCPE 0x00000040 ns83820.c 　
23505
 VRCR_RIPEVRCR_RIPE 0x00000020 ns83820.c 　
23506
 VRCR_IPENVRCR_IPEN 0x00000010 ns83820.c 　
23507
 VRCR_DUTFVRCR_DUTF 0x00000008 ns83820.c 　
23508
 VRCR_DVTFVRCR_DVTF 0x00000004 ns83820.c 　
23509
 VRCR_VTRENVRCR_VTREN 0x00000002 ns83820.c 　
23510
 VRCR_VTDENVRCR_VTDEN 0x00000001 ns83820.c 　
23511
 VTCR_PPCHKVTCR_PPCHK 0x00000008 ns83820.c 　
23512
 VTCR_GCHKVTCR_GCHK 0x00000004 ns83820.c 　
23513
 VTCR_VPPTIVTCR_VPPTI 0x00000002 ns83820.c 　
23514
 VTCR_VGTIVTCR_VGTI 0x00000001 ns83820.c 　
23515
 CRCR 0x00 ns83820.c 　
23516
 CFGCFG 0x04 ns83820.c 　
23517
 MEARMEAR 0x08 ns83820.c 　
23518
 PTSCRPTSCR 0x0c ns83820.c 　
23519
 ISRISR 0x10 ns83820.c 　
23520
 IMRIMR 0x14 ns83820.c 　
23521
 IERIER 0x18 ns83820.c 　
23522
 IHRIHR 0x1c ns83820.c 　
23523
 TXDPTXDP 0x20 ns83820.c 　
23524
 TXDP_HITXDP_HI 0x24 ns83820.c 　
23525
 TXCFGTXCFG 0x28 ns83820.c 　
23526
 GPIORGPIOR 0x2c ns83820.c 　
23527
 RXDPRXDP 0x30 ns83820.c 　
23528
 RXDP_HIRXDP_HI 0x34 ns83820.c 　
23529
 RXCFGRXCFG 0x38 ns83820.c 　
23530
 PQCRPQCR 0x3c ns83820.c 　
23531
 WCSRWCSR 0x40 ns83820.c 　
23532
 PCRPCR 0x44 ns83820.c 　
23533
 RFCRRFCR 0x48 ns83820.c 　
23534
 RFDRRFDR 0x4c ns83820.c 　
23535
 SRRSRR 0x58 ns83820.c 　
23536
 VRCRVRCR 0xbc ns83820.c 　
23537
 VTCRVTCR 0xc0 ns83820.c 　
23538
 VDRVDR 0xc4 ns83820.c 　
23539
 CCSRCCSR 0xcc ns83820.c 　
23540
 TBICRTBICR 0xe0 ns83820.c 　
23541
 TBISRTBISR 0xe4 ns83820.c 　
23542
 TANARTANAR 0xe8 ns83820.c 　
23543
 TANLPARTANLPAR 0xec ns83820.c 　
23544
 TANERTANER 0xf0 ns83820.c 　
23545
 TESRTESR 0xf4 ns83820.c 　
23546
 TBICR_MR_AN_ENABLETBICR_MR_AN_ENABLE 0x00001000 ns83820.c 　
23547
 TBICR_MR_RESTART_ANTBICR_MR_RESTART_AN 0x00000200 ns83820.c 　
23548
 TBISR_MR_LINK_STATUSTBISR_MR_LINK_STATUS 0x00000020 ns83820.c 　
23549
 TBISR_MR_AN_COMPLETETBISR_MR_AN_COMPLETE 0x00000004 ns83820.c 　
23550
 TANAR_PS2TANAR_PS2 0x00000100 ns83820.c 　
23551
 TANAR_PS1TANAR_PS1 0x00000080 ns83820.c 　
23552
 TANAR_HALF_DUPTANAR_HALF_DUP 0x00000040 ns83820.c 　
23553
 TANAR_FULL_DUPTANAR_FULL_DUP 0x00000020 ns83820.c 　
23554
 GPIOR_GP5_OEGPIOR_GP5_OE 0x00000200 ns83820.c 　
23555
 GPIOR_GP4_OEGPIOR_GP4_OE 0x00000100 ns83820.c 　
23556
 GPIOR_GP3_OEGPIOR_GP3_OE 0x00000080 ns83820.c 　
23557
 GPIOR_GP2_OEGPIOR_GP2_OE 0x00000040 ns83820.c 　
23558
 GPIOR_GP1_OEGPIOR_GP1_OE 0x00000020 ns83820.c 　
23559
 GPIOR_GP3_OUTGPIOR_GP3_OUT 0x00000004 ns83820.c 　
23560
 GPIOR_GP1_OUTGPIOR_GP1_OUT 0x00000001 ns83820.c 　
23561
 LINK_AUTONEGOTIATELINK_AUTONEGOTIATE 0x01 ns83820.c 　
23562
 LINK_DOWNLINK_DOWN 0x02 ns83820.c 　
23563
 LINK_UPLINK_UP 0x04 ns83820.c 　
23564
 HW_ADDR_LENHW_ADDR_LEN 8 ns83820.c 　
23565
 HW_ADDR_LENHW_ADDR_LEN 4 ns83820.c 　
23566
 CMDSTS_OWNCMDSTS_OWN 0x80000000 ns83820.c 　
23567
 CMDSTS_MORECMDSTS_MORE 0x40000000 ns83820.c 　
23568
 CMDSTS_INTRCMDSTS_INTR 0x20000000 ns83820.c 　
23569
 CMDSTS_ERRCMDSTS_ERR 0x10000000 ns83820.c 　
23570
 CMDSTS_OKCMDSTS_OK 0x08000000 ns83820.c 　
23571
 CMDSTS_LEN_MASKCMDSTS_LEN_MASK 0x0000ffff ns83820.c 　
23572
 CMDSTS_DEST_MASKCMDSTS_DEST_MASK 0x01800000 ns83820.c 　
23573
 CMDSTS_DEST_SELFCMDSTS_DEST_SELF 0x00800000 ns83820.c 　
23574
 CMDSTS_DEST_MULTICMDSTS_DEST_MULTI 0x01000000 ns83820.c 　
23575
 DESC_SIZEDESC_SIZE 8 ns83820.c Should be cache line sized
23576
 tx_ringtx_ring ns83820_bufs.tx_ring ns83820.c 　
23577
 rx_ringrx_ring ns83820_bufs.rx_ring ns83820.c 　
23578
 txbtxb ns83820_bufs.txb ns83820.c 　
23579
 rxbrxb ns83820_bufs.rxb ns83820.c 　
23580
 board_foundboard_found 1 ns83820.c 　
23581
 valid_linkvalid_link 0 ns83820.c 　
23582
 ASIC_PIOASIC_PIO WD_IAR ns8390.c 　
23583
 eth_probeeth_probe wd_probe ns8390.c 　
23584
 drv_versiondrv_version "v1.3" pcnet32.c 　
23585
 drv_datedrv_date "03-29-2004" pcnet32.c 　
23586
 PCNET32_PORT_AUIPCNET32_PORT_AUI 0x00 pcnet32.c 　
23587
 PCNET32_PORT_10BTPCNET32_PORT_10BT 0x01 pcnet32.c 　
23588
 PCNET32_PORT_GPSIPCNET32_PORT_GPSI 0x02 pcnet32.c 　
23589
 PCNET32_PORT_MIIPCNET32_PORT_MII 0x03 pcnet32.c 　
23590
 PCNET32_PORT_PORTSELPCNET32_PORT_PORTSEL 0x03 pcnet32.c 　
23591
 PCNET32_PORT_ASELPCNET32_PORT_ASEL 0x04 pcnet32.c 　
23592
 PCNET32_PORT_100PCNET32_PORT_100 0x40 pcnet32.c 　
23593
 PCNET32_PORT_FDPCNET32_PORT_FD 0x80 pcnet32.c 　
23594
 PCNET32_DMA_MASKPCNET32_DMA_MASK 0xffffffff pcnet32.c 　
23595
 MAX_UNITSMAX_UNITS 8 pcnet32.c More are supported, limit only on options
23596
 PCNET32_LOG_TX_BUFFERSPCNET32_LOG_TX_BUFFERS 1 pcnet32.c 　
23597
 PCNET32_LOG_RX_BUFFERSPCNET32_LOG_RX_BUFFERS 2 pcnet32.c 　
23598
 TX_RING_SIZETX_RING_SIZE (1 << (PCNET32_LOG_TX_BUFFERS)) pcnet32.c 　
23599
 TX_RING_MOD_MASKTX_RING_MOD_MASK (TX_RING_SIZE - 1) pcnet32.c 　
23600
 TX_RING_LEN_BITSTX_RING_LEN_BITS 0x0000 pcnet32.c PCNET32_LOG_TX_BUFFERS) << 12)
23601
 RX_RING_SIZERX_RING_SIZE (1 << (PCNET32_LOG_RX_BUFFERS)) pcnet32.c 　
23602
 RX_RING_MOD_MASKRX_RING_MOD_MASK (RX_RING_SIZE - 1) pcnet32.c 　
23603
 RX_RING_LEN_BITSRX_RING_LEN_BITS ((PCNET32_LOG_RX_BUFFERS) << 4) pcnet32.c 　
23604
 PKT_BUF_SZPKT_BUF_SZ 1544 pcnet32.c 　
23605
 PCNET32_WIO_RDPPCNET32_WIO_RDP 0x10 pcnet32.c 　
23606
 PCNET32_WIO_RAPPCNET32_WIO_RAP 0x12 pcnet32.c 　
23607
 PCNET32_WIO_RESETPCNET32_WIO_RESET 0x14 pcnet32.c 　
23608
 PCNET32_WIO_BDPPCNET32_WIO_BDP 0x16 pcnet32.c 　
23609
 PCNET32_DWIO_RDPPCNET32_DWIO_RDP 0x10 pcnet32.c 　
23610
 PCNET32_DWIO_RAPPCNET32_DWIO_RAP 0x14 pcnet32.c 　
23611
 PCNET32_DWIO_RESETPCNET32_DWIO_RESET 0x18 pcnet32.c 　
23612
 PCNET32_DWIO_BDPPCNET32_DWIO_BDP 0x1C pcnet32.c 　
23613
 PCNET32_TOTAL_SIZEPCNET32_TOTAL_SIZE 0x20 pcnet32.c 　
23614
 MII_CNTMII_CNT 4 pcnet32.c 　
23615
 MAX_JOIN_INFO_COUNTMAX_JOIN_INFO_COUNT 2 prism2.c 　
23616
 WLAN_HOSTIFWLAN_HOSTIF WLAN_PLX prism2.c 　
23617
 BAP_TIMEOUTBAP_TIMEOUT ( 5000 ) prism2.c 　
23618
 PLX_LOCAL_CONFIG_REGISTER_BASEPLX_LOCAL_CONFIG_REGISTER_BASE ( PCI_BASE_ADDRESS_1 ) prism2.c 　
23619
 PLX_LOCAL_ADDRESS_SPACE_0_BASEPLX_LOCAL_ADDRESS_SPACE_0_BASE ( PCI_BASE_ADDRESS_2 ) prism2.c 　
23620
 PLX_LOCAL_ADDRESS_SPACE_1_BASEPLX_LOCAL_ADDRESS_SPACE_1_BASE ( PCI_BASE_ADDRESS_3 ) prism2.c 　
23621
 PLX_LOCAL_ADDRESS_SPACE_2_BASEPLX_LOCAL_ADDRESS_SPACE_2_BASE ( PCI_BASE_ADDRESS_4 ) prism2.c 　
23622
 PLX_LOCAL_ADDRESS_SPACE_3_BASEPLX_LOCAL_ADDRESS_SPACE_3_BASE ( PCI_BASE_ADDRESS_5 ) prism2.c 　
23623
 PRISM2_PLX_ATTR_MEM_BASEPRISM2_PLX_ATTR_MEM_BASE ( PLX_LOCAL_ADDRESS_SPACE_0_BASE ) prism2.c 　
23624
 PRISM2_PLX_IO_BASEPRISM2_PLX_IO_BASE ( PLX_LOCAL_ADDRESS_SPACE_1_BASE ) prism2.c 　
23625
 PRISM2_PCI_MEM_BASEPRISM2_PCI_MEM_BASE ( PCI_BASE_ADDRESS_0 ) prism2.c 　
23626
 CISTPL_VERS_1CISTPL_VERS_1 ( 0x15 ) prism2.c 　
23627
 CISTPL_ENDCISTPL_END ( 0xff ) prism2.c 　
23628
 CIS_STEPCIS_STEP ( 2 ) prism2.c 　
23629
 CISTPL_HEADER_LENCISTPL_HEADER_LEN ( 2 * CIS_STEP ) prism2.c 　
23630
 CISTPL_LEN_OFFCISTPL_LEN_OFF ( 1 * CIS_STEP ) prism2.c 　
23631
 CISTPL_VERS_1_STR_OFFCISTPL_VERS_1_STR_OFF ( 4 * CIS_STEP ) prism2.c 　
23632
 COR_OFFSETCOR_OFFSET ( 0x3e0 ) prism2.c COR attribute offset of Prism2 PC card
23633
 COR_VALUECOR_VALUE ( 0x41 ) prism2.c Enable PC card with irq in level trigger (but interrupts disabled)
23634
 WLAN_IEEE_OUI_LENWLAN_IEEE_OUI_LEN 3 prism2.c 　
23635
 WLAN_HOSTIFWLAN_HOSTIF WLAN_PCI prism2_pci.c 　
23636
 WLAN_HOSTIFWLAN_HOSTIF WLAN_PLX prism2_plx.c 　
23637
 R8168_CPCMD_QUIRK_MASKR8168_CPCMD_QUIRK_MASK (\ EnableBist | \ Mac_dbgo_oe | \ Force_half_dup | \ Force_rxflow_en | \ Force_txflow_en | \ Cxpl_dbg_sel | \ ASF | \ PktCntrDi r8169.c 　
23638
 R810X_CPCMD_QUIRK_MASKR810X_CPCMD_QUIRK_MASK (\ EnableBist | \ Mac_dbgo_oe | \ Force_half_dup | \ Force_half_dup | \ Force_txflow_en | \ Cxpl_dbg_sel | \ ASF | \ PktCntrDis r8169.c 　
23639
 TX_RING_SIZETX_RING_SIZE 4 rtl8139.c 　
23640
 TX_FIFO_THRESHTX_FIFO_THRESH 256 rtl8139.c In bytes, rounded down to 32 byte units.
23641
 RX_FIFO_THRESHRX_FIFO_THRESH 4 rtl8139.c Rx buffer level before first PCI xfer.
23642
 RX_DMA_BURSTRX_DMA_BURST 4 rtl8139.c Maximum PCI burst, '4' is 256 bytes
23643
 TX_DMA_BURSTTX_DMA_BURST 4 rtl8139.c Calculate as 16<<val.
23644
 TX_IPGTX_IPG 3 rtl8139.c This is the only valid value
23645
 RX_BUF_LEN_IDXRX_BUF_LEN_IDX 0 rtl8139.c 0, 1, 2 is allowed - 8,16,32K rx buffer
23646
 RX_BUF_LENRX_BUF_LEN ( (8192 << RX_BUF_LEN_IDX) ) rtl8139.c 　
23647
 RX_BUF_PADRX_BUF_PAD 4 rtl8139.c 　
23648
 EE_M1EE_M1 0x80 rtl8139.c Mode select bit 1
23649
 EE_M0EE_M0 0x40 rtl8139.c Mode select bit 0
23650
 EE_CSEE_CS 0x08 rtl8139.c EEPROM chip select
23651
 EE_SKEE_SK 0x04 rtl8139.c EEPROM shift clock
23652
 EE_DIEE_DI 0x02 rtl8139.c Data in
23653
 EE_DOEE_DO 0x01 rtl8139.c Data out
23654
 EE_MACEE_MAC 7 rtl8139.c 　
23655
 txdtxd sis900_bufs.txd sis900.c 　
23656
 rxdrxd sis900_bufs.rxd sis900.c 　
23657
 txbtxb sis900_bufs.txb sis900.c 　
23658
 rxbrxb sis900_bufs.rxb sis900.c 　
23659
 DRV_NAMEDRV_NAME "sky2" sky2.c 　
23660
 DRV_VERSIONDRV_VERSION "1.22" sky2.c 　
23661
 PFXPFX DRV_NAME " " sky2.c 　
23662
 RX_LE_SIZERX_LE_SIZE 128 sky2.c 　
23663
 RX_LE_BYTESRX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le)) sky2.c 　
23664
 RX_RING_ALIGNRX_RING_ALIGN 4096 sky2.c 　
23665
 RX_PENDINGRX_PENDING (RX_LE_SIZE/6 - 2) sky2.c 　
23666
 TX_RING_SIZETX_RING_SIZE 128 sky2.c 　
23667
 TX_PENDINGTX_PENDING (TX_RING_SIZE - 1) sky2.c 　
23668
 TX_RING_ALIGNTX_RING_ALIGN 4096 sky2.c 　
23669
 MAX_SKB_TX_LEMAX_SKB_TX_LE 4 sky2.c 　
23670
 STATUS_RING_SIZESTATUS_RING_SIZE 512 sky2.c 2 ports * (TX + RX)
23671
 STATUS_LE_BYTESSTATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le)) sky2.c 　
23672
 STATUS_RING_ALIGNSTATUS_RING_ALIGN 4096 sky2.c 　
23673
 PHY_RETRIESPHY_RETRIES 1000 sky2.c 　
23674
 SKY2_EEPROM_MAGICSKY2_EEPROM_MAGIC 0x9955aabb sky2.c 　
23675
 LINUX_OUT_MACROSLINUX_OUT_MACROS 1 smc9000.c 　
23676
 SMC9000_DEBUGSMC9000_DEBUG 0 smc9000.c 　
23677
 PRINTK2PRINTK2 printf smc9000.c 　
23678
 _outb_outb outb smc9000.c 　
23679
 _outw_outw outw smc9000.c 　
23680
 drv_versiondrv_version "v1.12" sundance.c 　
23681
 drv_datedrv_date "2004-03-21" sundance.c 　
23682
 HZHZ 100 sundance.c 　
23683
 TX_RING_SIZETX_RING_SIZE 2 sundance.c 　
23684
 TX_QUEUE_LENTX_QUEUE_LEN 10 sundance.c Limit ring entries actually used.
23685
 RX_RING_SIZERX_RING_SIZE 4 sundance.c 　
23686
 TX_TIME_OUTTX_TIME_OUT (4*HZ) sundance.c 　
23687
 PKT_BUF_SZPKT_BUF_SZ 1536 sundance.c 　
23688
 rxbrxb rx_tx_buf.rxb sundance.c 　
23689
 txbtxb rx_tx_buf.txb sundance.c 　
23690
 EEPROM_SIZEEEPROM_SIZE 128 sundance.c 　
23691
 PCI_IOTYPEPCI_IOTYPE (PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0) sundance.c 　
23692
 MII_CNTMII_CNT 4 sundance.c 　
23693
 EEPROM_SA_OFFSETEEPROM_SA_OFFSET 0x10 sundance.c 　
23694
 DEFAULT_INTRDEFAULT_INTR (IntrRxDMADone | IntrPCIErr | \ IntrDrvRqst | IntrTxDone | StatsMax | \ LinkChange) sundance.c 　
23695
 MDIO_EnbInMDIO_EnbIn (0) sundance.c 　
23696
 MDIO_WRITE0MDIO_WRITE0 (MDIO_EnbOutput) sundance.c 　
23697
 MDIO_WRITE1MDIO_WRITE1 (MDIO_Data | MDIO_EnbOutput) sundance.c 　
23698
 SUPPORT_COPPER_PHYSUPPORT_COPPER_PHY 1 tg3.c 　
23699
 SUPPORT_FIBER_PHYSUPPORT_FIBER_PHY 1 tg3.c 　
23700
 SUPPORT_LINK_REPORTSUPPORT_LINK_REPORT 1 tg3.c 　
23701
 SUPPORT_PARTNO_STRSUPPORT_PARTNO_STR 1 tg3.c 　
23702
 SUPPORT_PHY_STRSUPPORT_PHY_STR 1 tg3.c 　
23703
 TG3_RX_RING_SIZETG3_RX_RING_SIZE 512 tg3.c 　
23704
 TG3_DEF_RX_RING_PENDINGTG3_DEF_RX_RING_PENDING 20 tg3.c RX_RING_PENDING seems to be o.k. at 20 and 200
23705
 TG3_RX_RCB_RING_SIZETG3_RX_RCB_RING_SIZE 1024 tg3.c 　
23706
 TG3_TX_RING_SIZETG3_TX_RING_SIZE 512 tg3.c 　
23707
 TG3_DEF_TX_RING_PENDINGTG3_DEF_TX_RING_PENDING (TG3_TX_RING_SIZE - 1) tg3.c 　
23708
 TG3_RX_RING_BYTESTG3_RX_RING_BYTES (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RING_SIZE) tg3.c 　
23709
 TG3_RX_RCB_RING_BYTESTG3_RX_RCB_RING_BYTES (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RCB_RING_SIZE) tg3.c 　
23710
 TG3_TX_RING_BYTESTG3_TX_RING_BYTES (sizeof(struct tg3_tx_buffer_desc) * TG3_TX_RING_SIZE) tg3.c 　
23711
 RX_PKT_BUF_SZRX_PKT_BUF_SZ (1536 + 2 + 64) tg3.c 　
23712
 PHY_BUSY_LOOPSPHY_BUSY_LOOPS 5000 tg3.c 　
23713
 ANEG_OKANEG_OK 0 tg3.c 　
23714
 ANEG_DONEANEG_DONE 1 tg3.c 　
23715
 ANEG_TIMER_ENABANEG_TIMER_ENAB 2 tg3.c 　
23716
 ANEG_FAILEDANEG_FAILED -1 tg3.c 　
23717
 ANEG_STATE_SETTLE_TIMEANEG_STATE_SETTLE_TIME 10000 tg3.c 　
23718
 MAX_WAIT_CNTMAX_WAIT_CNT 1000 tg3.c 　
23719
 drv_versiondrv_version "v1.4" tlan.c 　
23720
 drv_datedrv_date "01-17-2004" tlan.c 　
23721
 HZHZ 100 tlan.c 　
23722
 TX_TIME_OUTTX_TIME_OUT (6*HZ) tlan.c 　
23723
 tx_ringtx_ring tlan_buffers.tx_ring tlan.c 　
23724
 txbtxb tlan_buffers.txb tlan.c 　
23725
 rx_ringrx_ring tlan_buffers.rx_ring tlan.c 　
23726
 rxbrxb tlan_buffers.rxb tlan.c 　
23727
 board_foundboard_found 1 tlan.c 　
23728
 valid_linkvalid_link 0 tlan.c 　
23729
 TX_TIME_OUTTX_TIME_OUT 2*TICKS_PER_SEC tulip.c 　
23730
 TULIP_IOTYPETULIP_IOTYPE PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0 tulip.c 　
23731
 TULIP_SIZETULIP_SIZE 0x80 tulip.c 　
23732
 FULL_DUPLEX_MAGICFULL_DUPLEX_MAGIC 0x6969 tulip.c 　
23733
 MEDIA_MASKMEDIA_MASK 31 tulip.c 　
23734
 EEPROM_ADDRLENEEPROM_ADDRLEN 6 tulip.c 　
23735
 EEPROM_SIZEEEPROM_SIZE 128 tulip.c 2 << EEPROM_ADDRLEN
23736
 EE_WRITE_CMDEE_WRITE_CMD (5 << addr_len) tulip.c 　
23737
 EE_READ_CMDEE_READ_CMD (6 << addr_len) tulip.c 　
23738
 EE_ERASE_CMDEE_ERASE_CMD (7 << addr_len) tulip.c 　
23739
 EE_SHIFT_CLKEE_SHIFT_CLK 0x02 tulip.c EEPROM shift clock.
23740
 EE_CSEE_CS 0x01 tulip.c EEPROM chip select.
23741
 EE_DATA_WRITEEE_DATA_WRITE 0x04 tulip.c EEPROM chip data in.
23742
 EE_WRITE_0EE_WRITE_0 0x01 tulip.c 　
23743
 EE_WRITE_1EE_WRITE_1 0x05 tulip.c 　
23744
 EE_DATA_READEE_DATA_READ 0x08 tulip.c EEPROM chip data out.
23745
 EE_ENBEE_ENB (0x4800 | EE_CS) tulip.c 　
23746
 BUFLENBUFLEN 1536 tulip.c 　
23747
 DESC_RING_WRAPDESC_RING_WRAP 0x02000000 tulip.c 　
23748
 TX_RING_SIZETX_RING_SIZE 2 tulip.c 　
23749
 RX_RING_SIZERX_RING_SIZE 4 tulip.c 　
23750
 tx_ringtx_ring tulip_bss.tx_ring tulip.c 　
23751
 txbtxb tulip_bss.txb tulip.c 　
23752
 rx_ringrx_ring tulip_bss.rx_ring tulip.c 　
23753
 rxbrxb tulip_bss.rxb tulip.c 　
23754
 MDIO_SHIFT_CLKMDIO_SHIFT_CLK 0x10000 tulip.c 　
23755
 MDIO_DATA_WRITE0MDIO_DATA_WRITE0 0x00000 tulip.c 　
23756
 MDIO_DATA_WRITE1MDIO_DATA_WRITE1 0x20000 tulip.c 　
23757
 MDIO_ENBMDIO_ENB 0x00000 tulip.c Ignore the 0x02000 databook setting.
23758
 MDIO_ENB_INMDIO_ENB_IN 0x40000 tulip.c 　
23759
 MDIO_DATA_READMDIO_DATA_READ 0x80000 tulip.c 　
23760
 W_MAX_TIMEOUTW_MAX_TIMEOUT 0x0FFFU via-rhine.c 　
23761
 RX_BUF_LEN_IDXRX_BUF_LEN_IDX 3 via-rhine.c 0==8K, 1==16K, 2==32K, 3==64K
23762
 RX_BUF_LENRX_BUF_LEN (8192 << RX_BUF_LEN_IDX) via-rhine.c 　
23763
 TX_BUF_SIZETX_BUF_SIZE 1536 via-rhine.c 　
23764
 RX_BUF_SIZERX_BUF_SIZE 1536 via-rhine.c 　
23765
 TX_FIFO_THRESHTX_FIFO_THRESH 256 via-rhine.c In bytes, rounded down to 32 byte units.
23766
 RX_FIFO_THRESHRX_FIFO_THRESH 4 via-rhine.c Rx buffer level before first PCI xfer.
23767
 RX_DMA_BURSTRX_DMA_BURST 4 via-rhine.c Maximum PCI burst, '4' is 256 bytes
23768
 TX_DMA_BURSTTX_DMA_BURST 4 via-rhine.c 　
23769
 TX_TIMEOUTTX_TIMEOUT ((2000*HZ)/1000) via-rhine.c 　
23770
 byPAR0byPAR0 ioaddr via-rhine.c 　
23771
 byRCRbyRCR ioaddr + 6 via-rhine.c 　
23772
 byTCRbyTCR ioaddr + 7 via-rhine.c 　
23773
 byCR0byCR0 ioaddr + 8 via-rhine.c 　
23774
 byCR1byCR1 ioaddr + 9 via-rhine.c 　
23775
 byISR0byISR0 ioaddr + 0x0c via-rhine.c 　
23776
 byISR1byISR1 ioaddr + 0x0d via-rhine.c 　
23777
 byIMR0byIMR0 ioaddr + 0x0e via-rhine.c 　
23778
 byIMR1byIMR1 ioaddr + 0x0f via-rhine.c 　
23779
 byMAR0byMAR0 ioaddr + 0x10 via-rhine.c 　
23780
 byMAR1byMAR1 ioaddr + 0x11 via-rhine.c 　
23781
 byMAR2byMAR2 ioaddr + 0x12 via-rhine.c 　
23782
 byMAR3byMAR3 ioaddr + 0x13 via-rhine.c 　
23783
 byMAR4byMAR4 ioaddr + 0x14 via-rhine.c 　
23784
 byMAR5byMAR5 ioaddr + 0x15 via-rhine.c 　
23785
 byMAR6byMAR6 ioaddr + 0x16 via-rhine.c 　
23786
 byMAR7byMAR7 ioaddr + 0x17 via-rhine.c 　
23787
 dwCurrentRxDescAddrdwCurrentRxDescAddr ioaddr + 0x18 via-rhine.c 　
23788
 dwCurrentTxDescAddrdwCurrentTxDescAddr ioaddr + 0x1c via-rhine.c 　
23789
 dwCurrentRDSE0dwCurrentRDSE0 ioaddr + 0x20 via-rhine.c 　
23790
 dwCurrentRDSE1dwCurrentRDSE1 ioaddr + 0x24 via-rhine.c 　
23791
 dwCurrentRDSE2dwCurrentRDSE2 ioaddr + 0x28 via-rhine.c 　
23792
 dwCurrentRDSE3dwCurrentRDSE3 ioaddr + 0x2c via-rhine.c 　
23793
 dwNextRDSE0dwNextRDSE0 ioaddr + 0x30 via-rhine.c 　
23794
 dwNextRDSE1dwNextRDSE1 ioaddr + 0x34 via-rhine.c 　
23795
 dwNextRDSE2dwNextRDSE2 ioaddr + 0x38 via-rhine.c 　
23796
 dwNextRDSE3dwNextRDSE3 ioaddr + 0x3c via-rhine.c 　
23797
 dwCurrentTDSE0dwCurrentTDSE0 ioaddr + 0x40 via-rhine.c 　
23798
 dwCurrentTDSE1dwCurrentTDSE1 ioaddr + 0x44 via-rhine.c 　
23799
 dwCurrentTDSE2dwCurrentTDSE2 ioaddr + 0x48 via-rhine.c 　
23800
 dwCurrentTDSE3dwCurrentTDSE3 ioaddr + 0x4c via-rhine.c 　
23801
 dwNextTDSE0dwNextTDSE0 ioaddr + 0x50 via-rhine.c 　
23802
 dwNextTDSE1dwNextTDSE1 ioaddr + 0x54 via-rhine.c 　
23803
 dwNextTDSE2dwNextTDSE2 ioaddr + 0x58 via-rhine.c 　
23804
 dwNextTDSE3dwNextTDSE3 ioaddr + 0x5c via-rhine.c 　
23805
 dwCurrRxDMAPtrdwCurrRxDMAPtr ioaddr + 0x60 via-rhine.c 　
23806
 dwCurrTxDMAPtrdwCurrTxDMAPtr ioaddr + 0x64 via-rhine.c 　
23807
 byMPHYbyMPHY ioaddr + 0x6c via-rhine.c 　
23808
 byMIISRbyMIISR ioaddr + 0x6d via-rhine.c 　
23809
 byBCR0byBCR0 ioaddr + 0x6e via-rhine.c 　
23810
 byBCR1byBCR1 ioaddr + 0x6f via-rhine.c 　
23811
 byMIICRbyMIICR ioaddr + 0x70 via-rhine.c 　
23812
 byMIIADbyMIIAD ioaddr + 0x71 via-rhine.c 　
23813
 wMIIDATAwMIIDATA ioaddr + 0x72 via-rhine.c 　
23814
 byEECSRbyEECSR ioaddr + 0x74 via-rhine.c 　
23815
 byTESTbyTEST ioaddr + 0x75 via-rhine.c 　
23816
 byGPIObyGPIO ioaddr + 0x76 via-rhine.c 　
23817
 byCFGAbyCFGA ioaddr + 0x78 via-rhine.c 　
23818
 byCFGBbyCFGB ioaddr + 0x79 via-rhine.c 　
23819
 byCFGCbyCFGC ioaddr + 0x7a via-rhine.c 　
23820
 byCFGDbyCFGD ioaddr + 0x7b via-rhine.c 　
23821
 wTallyCntMPAwTallyCntMPA ioaddr + 0x7c via-rhine.c 　
23822
 wTallyCntCRCwTallyCntCRC ioaddr + 0x7d via-rhine.c 　
23823
 bySTICKHWbySTICKHW ioaddr + 0x83 via-rhine.c 　
23824
 byWOLcrClrbyWOLcrClr ioaddr + 0xA4 via-rhine.c 　
23825
 byWOLcgClrbyWOLcgClr ioaddr + 0xA7 via-rhine.c 　
23826
 byPwrcsrClrbyPwrcsrClr ioaddr + 0xAC via-rhine.c 　
23827
 RCR_RRFT2RCR_RRFT2 0x80 via-rhine.c 　
23828
 RCR_RRFT1RCR_RRFT1 0x40 via-rhine.c 　
23829
 RCR_RRFT0RCR_RRFT0 0x20 via-rhine.c 　
23830
 RCR_PROMRCR_PROM 0x10 via-rhine.c 　
23831
 RCR_ABRCR_AB 0x08 via-rhine.c 　
23832
 RCR_AMRCR_AM 0x04 via-rhine.c 　
23833
 RCR_ARRCR_AR 0x02 via-rhine.c 　
23834
 RCR_SEPRCR_SEP 0x01 via-rhine.c 　
23835
 TCR_RTSFTCR_RTSF 0x80 via-rhine.c 　
23836
 TCR_RTFT1TCR_RTFT1 0x40 via-rhine.c 　
23837
 TCR_RTFT0TCR_RTFT0 0x20 via-rhine.c 　
23838
 TCR_OFSETTCR_OFSET 0x08 via-rhine.c 　
23839
 TCR_LB1TCR_LB1 0x04 via-rhine.c loopback[1]
23840
 TCR_LB0TCR_LB0 0x02 via-rhine.c loopback[0]
23841
 CR0_RDMDCR0_RDMD 0x40 via-rhine.c rx descriptor polling demand
23842
 CR0_TDMDCR0_TDMD 0x20 via-rhine.c tx descriptor polling demand
23843
 CR0_TXONCR0_TXON 0x10 via-rhine.c 　
23844
 CR0_RXONCR0_RXON 0x08 via-rhine.c 　
23845
 CR0_STOPCR0_STOP 0x04 via-rhine.c stop NIC, default = 1
23846
 CR0_STRTCR0_STRT 0x02 via-rhine.c start NIC
23847
 CR0_INITCR0_INIT 0x01 via-rhine.c start init process
23848
 CR1_SFRSTCR1_SFRST 0x80 via-rhine.c software reset
23849
 CR1_RDMD1CR1_RDMD1 0x40 via-rhine.c RDMD1
23850
 CR1_TDMD1CR1_TDMD1 0x20 via-rhine.c TDMD1
23851
 CR1_KEYPAGCR1_KEYPAG 0x10 via-rhine.c turn on par/key
23852
 CR1_DPOLLCR1_DPOLL 0x08 via-rhine.c disable rx/tx auto polling
23853
 CR1_FDXCR1_FDX 0x04 via-rhine.c full duplex mode
23854
 CR1_ETENCR1_ETEN 0x02 via-rhine.c early tx mode
23855
 CR1_ERENCR1_EREN 0x01 via-rhine.c early rx mode
23856
 CR_RDMDCR_RDMD 0x0040 via-rhine.c rx descriptor polling demand
23857
 CR_TDMDCR_TDMD 0x0020 via-rhine.c tx descriptor polling demand
23858
 CR_TXONCR_TXON 0x0010 via-rhine.c 　
23859
 CR_RXONCR_RXON 0x0008 via-rhine.c 　
23860
 CR_STOPCR_STOP 0x0004 via-rhine.c stop NIC, default = 1
23861
 CR_STRTCR_STRT 0x0002 via-rhine.c start NIC
23862
 CR_INITCR_INIT 0x0001 via-rhine.c start init process
23863
 CR_SFRSTCR_SFRST 0x8000 via-rhine.c software reset
23864
 CR_RDMD1CR_RDMD1 0x4000 via-rhine.c RDMD1
23865
 CR_TDMD1CR_TDMD1 0x2000 via-rhine.c TDMD1
23866
 CR_KEYPAGCR_KEYPAG 0x1000 via-rhine.c turn on par/key
23867
 CR_DPOLLCR_DPOLL 0x0800 via-rhine.c disable rx/tx auto polling
23868
 CR_FDXCR_FDX 0x0400 via-rhine.c full duplex mode
23869
 CR_ETENCR_ETEN 0x0200 via-rhine.c early tx mode
23870
 CR_ERENCR_EREN 0x0100 via-rhine.c early rx mode
23871
 IMR0_CNTMIMR0_CNTM 0x80 via-rhine.c 　
23872
 IMR0_BEMIMR0_BEM 0x40 via-rhine.c 　
23873
 IMR0_RUMIMR0_RUM 0x20 via-rhine.c 　
23874
 IMR0_TUMIMR0_TUM 0x10 via-rhine.c 　
23875
 IMR0_TXEMIMR0_TXEM 0x08 via-rhine.c 　
23876
 IMR0_RXEMIMR0_RXEM 0x04 via-rhine.c 　
23877
 IMR0_PTXMIMR0_PTXM 0x02 via-rhine.c 　
23878
 IMR0_PRXMIMR0_PRXM 0x01 via-rhine.c 　
23879
 IMRShadowIMRShadow 0x5AFF via-rhine.c 　
23880
 IMR1_INITMIMR1_INITM 0x80 via-rhine.c 　
23881
 IMR1_SRCMIMR1_SRCM 0x40 via-rhine.c 　
23882
 IMR1_NBFMIMR1_NBFM 0x10 via-rhine.c 　
23883
 IMR1_PRAIMIMR1_PRAIM 0x08 via-rhine.c 　
23884
 IMR1_RES0MIMR1_RES0M 0x04 via-rhine.c 　
23885
 IMR1_ETMIMR1_ETM 0x02 via-rhine.c 　
23886
 IMR1_ERMIMR1_ERM 0x01 via-rhine.c 　
23887
 ISR_INITIISR_INITI 0x8000 via-rhine.c 　
23888
 ISR_SRCIISR_SRCI 0x4000 via-rhine.c 　
23889
 ISR_ABTIISR_ABTI 0x2000 via-rhine.c 　
23890
 ISR_NORBFISR_NORBF 0x1000 via-rhine.c 　
23891
 ISR_PKTRAISR_PKTRA 0x0800 via-rhine.c 　
23892
 ISR_RES0ISR_RES0 0x0400 via-rhine.c 　
23893
 ISR_ETIISR_ETI 0x0200 via-rhine.c 　
23894
 ISR_ERIISR_ERI 0x0100 via-rhine.c 　
23895
 ISR_CNTISR_CNT 0x0080 via-rhine.c 　
23896
 ISR_BEISR_BE 0x0040 via-rhine.c 　
23897
 ISR_RUISR_RU 0x0020 via-rhine.c 　
23898
 ISR_TUISR_TU 0x0010 via-rhine.c 　
23899
 ISR_TXEISR_TXE 0x0008 via-rhine.c 　
23900
 ISR_RXEISR_RXE 0x0004 via-rhine.c 　
23901
 ISR_PTXISR_PTX 0x0002 via-rhine.c 　
23902
 ISR_PRXISR_PRX 0x0001 via-rhine.c 　
23903
 ISR0_CNTISR0_CNT 0x80 via-rhine.c 　
23904
 ISR0_BEISR0_BE 0x40 via-rhine.c 　
23905
 ISR0_RUISR0_RU 0x20 via-rhine.c 　
23906
 ISR0_TUISR0_TU 0x10 via-rhine.c 　
23907
 ISR0_TXEISR0_TXE 0x08 via-rhine.c 　
23908
 ISR0_RXEISR0_RXE 0x04 via-rhine.c 　
23909
 ISR0_PTXISR0_PTX 0x02 via-rhine.c 　
23910
 ISR0_PRXISR0_PRX 0x01 via-rhine.c 　
23911
 ISR1_INITIISR1_INITI 0x80 via-rhine.c 　
23912
 ISR1_SRCIISR1_SRCI 0x40 via-rhine.c 　
23913
 ISR1_NORBFISR1_NORBF 0x10 via-rhine.c 　
23914
 ISR1_PKTRAISR1_PKTRA 0x08 via-rhine.c 　
23915
 ISR1_ETIISR1_ETI 0x02 via-rhine.c 　
23916
 ISR1_ERIISR1_ERI 0x01 via-rhine.c 　
23917
 ISR_ABNORMALISR_ABNORMAL ISR_BE+ISR_RU+ISR_TU+ISR_CNT+ISR_NORBF+ISR_PKTRA via-rhine.c 　
23918
 MIISR_MIIERRMIISR_MIIERR 0x08 via-rhine.c 　
23919
 MIISR_MRERRMIISR_MRERR 0x04 via-rhine.c 　
23920
 MIISR_LNKFLMIISR_LNKFL 0x02 via-rhine.c 　
23921
 MIISR_SPEEDMIISR_SPEED 0x01 via-rhine.c 　
23922
 MIICR_MAUTOMIICR_MAUTO 0x80 via-rhine.c 　
23923
 MIICR_RCMDMIICR_RCMD 0x40 via-rhine.c 　
23924
 MIICR_WCMDMIICR_WCMD 0x20 via-rhine.c 　
23925
 MIICR_MDPMMIICR_MDPM 0x10 via-rhine.c 　
23926
 MIICR_MOUTMIICR_MOUT 0x08 via-rhine.c 　
23927
 MIICR_MDOMIICR_MDO 0x04 via-rhine.c 　
23928
 MIICR_MDIMIICR_MDI 0x02 via-rhine.c 　
23929
 MIICR_MDCMIICR_MDC 0x01 via-rhine.c 　
23930
 EECSR_EEPREECSR_EEPR 0x80 via-rhine.c eeprom programed status, 73h means programed
23931
 EECSR_EMBPEECSR_EMBP 0x40 via-rhine.c eeprom embeded programming
23932
 EECSR_AUTOLDEECSR_AUTOLD 0x20 via-rhine.c eeprom content reload
23933
 EECSR_DPMEECSR_DPM 0x10 via-rhine.c eeprom direct programming
23934
 EECSR_CSEECSR_CS 0x08 via-rhine.c eeprom CS pin
23935
 EECSR_SKEECSR_SK 0x04 via-rhine.c eeprom SK pin
23936
 EECSR_DIEECSR_DI 0x02 via-rhine.c eeprom DI pin
23937
 EECSR_DOEECSR_DO 0x01 via-rhine.c eeprom DO pin
23938
 BCR0_CRFT2BCR0_CRFT2 0x20 via-rhine.c 　
23939
 BCR0_CRFT1BCR0_CRFT1 0x10 via-rhine.c 　
23940
 BCR0_CRFT0BCR0_CRFT0 0x08 via-rhine.c 　
23941
 BCR0_DMAL2BCR0_DMAL2 0x04 via-rhine.c 　
23942
 BCR0_DMAL1BCR0_DMAL1 0x02 via-rhine.c 　
23943
 BCR0_DMAL0BCR0_DMAL0 0x01 via-rhine.c 　
23944
 BCR1_CTSFBCR1_CTSF 0x20 via-rhine.c 　
23945
 BCR1_CTFT1BCR1_CTFT1 0x10 via-rhine.c 　
23946
 BCR1_CTFT0BCR1_CTFT0 0x08 via-rhine.c 　
23947
 BCR1_POT2BCR1_POT2 0x04 via-rhine.c 　
23948
 BCR1_POT1BCR1_POT1 0x02 via-rhine.c 　
23949
 BCR1_POT0BCR1_POT0 0x01 via-rhine.c 　
23950
 CFGA_EELOADCFGA_EELOAD 0x80 via-rhine.c enable eeprom embeded and direct programming
23951
 CFGA_JUMPERCFGA_JUMPER 0x40 via-rhine.c 　
23952
 CFGA_MTGPIOCFGA_MTGPIO 0x08 via-rhine.c 　
23953
 CFGA_T10ENCFGA_T10EN 0x02 via-rhine.c 　
23954
 CFGA_AUTOCFGA_AUTO 0x01 via-rhine.c 　
23955
 CFGB_PDCFGB_PD 0x80 via-rhine.c 　
23956
 CFGB_POLENCFGB_POLEN 0x02 via-rhine.c 　
23957
 CFGB_LNKENCFGB_LNKEN 0x01 via-rhine.c 　
23958
 CFGC_M10TIOCFGC_M10TIO 0x80 via-rhine.c 　
23959
 CFGC_M10POLCFGC_M10POL 0x40 via-rhine.c 　
23960
 CFGC_PHY1CFGC_PHY1 0x20 via-rhine.c 　
23961
 CFGC_PHY0CFGC_PHY0 0x10 via-rhine.c 　
23962
 CFGC_BTSELCFGC_BTSEL 0x08 via-rhine.c 　
23963
 CFGC_BPS2CFGC_BPS2 0x04 via-rhine.c bootrom select[2]
23964
 CFGC_BPS1CFGC_BPS1 0x02 via-rhine.c bootrom select[1]
23965
 CFGC_BPS0CFGC_BPS0 0x01 via-rhine.c bootrom select[0]
23966
 CFGD_GPIOENCFGD_GPIOEN 0x80 via-rhine.c 　
23967
 CFGD_DIAGCFGD_DIAG 0x40 via-rhine.c 　
23968
 CFGD_MAGICCFGD_MAGIC 0x10 via-rhine.c 　
23969
 CFGD_RANDOMCFGD_RANDOM 0x08 via-rhine.c 　
23970
 CFGD_CFDXCFGD_CFDX 0x04 via-rhine.c 　
23971
 CFGD_CERENCFGD_CEREN 0x02 via-rhine.c 　
23972
 CFGD_CETENCFGD_CETEN 0x01 via-rhine.c 　
23973
 RSR_RERRRSR_RERR 0x00000001 via-rhine.c 　
23974
 RSR_CRCRSR_CRC 0x00000002 via-rhine.c 　
23975
 RSR_FAERSR_FAE 0x00000004 via-rhine.c 　
23976
 RSR_FOVRSR_FOV 0x00000008 via-rhine.c 　
23977
 RSR_LONGRSR_LONG 0x00000010 via-rhine.c 　
23978
 RSR_RUNTRSR_RUNT 0x00000020 via-rhine.c 　
23979
 RSR_SERRRSR_SERR 0x00000040 via-rhine.c 　
23980
 RSR_BUFFRSR_BUFF 0x00000080 via-rhine.c 　
23981
 RSR_EDPRSR_EDP 0x00000100 via-rhine.c 　
23982
 RSR_STPRSR_STP 0x00000200 via-rhine.c 　
23983
 RSR_CHNRSR_CHN 0x00000400 via-rhine.c 　
23984
 RSR_PHYRSR_PHY 0x00000800 via-rhine.c 　
23985
 RSR_BARRSR_BAR 0x00001000 via-rhine.c 　
23986
 RSR_MARRSR_MAR 0x00002000 via-rhine.c 　
23987
 RSR_RXOKRSR_RXOK 0x00008000 via-rhine.c 　
23988
 RSR_ABNORMALRSR_ABNORMAL RSR_RERR+RSR_LONG+RSR_RUNT via-rhine.c 　
23989
 TSR_NCR0TSR_NCR0 0x00000001 via-rhine.c 　
23990
 TSR_NCR1TSR_NCR1 0x00000002 via-rhine.c 　
23991
 TSR_NCR2TSR_NCR2 0x00000004 via-rhine.c 　
23992
 TSR_NCR3TSR_NCR3 0x00000008 via-rhine.c 　
23993
 TSR_COLSTSR_COLS 0x00000010 via-rhine.c 　
23994
 TSR_CDHTSR_CDH 0x00000080 via-rhine.c 　
23995
 TSR_ABTTSR_ABT 0x00000100 via-rhine.c 　
23996
 TSR_OWCTSR_OWC 0x00000200 via-rhine.c 　
23997
 TSR_CRSTSR_CRS 0x00000400 via-rhine.c 　
23998
 TSR_UDFTSR_UDF 0x00000800 via-rhine.c 　
23999
 TSR_TBUFFTSR_TBUFF 0x00001000 via-rhine.c 　
24000
 TSR_SERRTSR_SERR 0x00002000 via-rhine.c 　
24001
 TSR_JABTSR_JAB 0x00004000 via-rhine.c 　
24002
 TSR_TERRTSR_TERR 0x00008000 via-rhine.c 　
24003
 TSR_ABNORMALTSR_ABNORMAL TSR_TERR+TSR_OWC+TSR_ABT+TSR_JAB+TSR_CRS via-rhine.c 　
24004
 TSR_OWN_BITTSR_OWN_BIT 0x80000000 via-rhine.c 　
24005
 CB_DELAY_LOOP_WAITCB_DELAY_LOOP_WAIT 10 via-rhine.c 10ms
24006
 W_IMR_MASK_VALUEW_IMR_MASK_VALUE 0x1BFF via-rhine.c initial value of IMR
24007
 PKT_TYPE_DIRECTEDPKT_TYPE_DIRECTED 0x0001 via-rhine.c obsolete, directed address is always accepted
24008
 PKT_TYPE_MULTICASTPKT_TYPE_MULTICAST 0x0002 via-rhine.c 　
24009
 PKT_TYPE_ALL_MULTICASTPKT_TYPE_ALL_MULTICAST 0x0004 via-rhine.c 　
24010
 PKT_TYPE_BROADCASTPKT_TYPE_BROADCAST 0x0008 via-rhine.c 　
24011
 PKT_TYPE_PROMISCUOUSPKT_TYPE_PROMISCUOUS 0x0020 via-rhine.c 　
24012
 PKT_TYPE_LONGPKT_TYPE_LONG 0x2000 via-rhine.c 　
24013
 PKT_TYPE_RUNTPKT_TYPE_RUNT 0x4000 via-rhine.c 　
24014
 PKT_TYPE_ERRORPKT_TYPE_ERROR 0x8000 via-rhine.c accept error packets, e.g. CRC error
24015
 NIC_LB_NONENIC_LB_NONE 0x00 via-rhine.c 　
24016
 NIC_LB_INTERNALNIC_LB_INTERNAL 0x01 via-rhine.c 　
24017
 NIC_LB_PHYNIC_LB_PHY 0x02 via-rhine.c MII or Internal-10BaseT loopback
24018
 TX_RING_SIZETX_RING_SIZE 2 via-rhine.c 　
24019
 RX_RING_SIZERX_RING_SIZE 2 via-rhine.c 　
24020
 PKT_BUF_SZPKT_BUF_SZ 1536 via-rhine.c Size of each temporary Rx buffer.
24021
 PCI_REG_MODE3PCI_REG_MODE3 0x53 via-rhine.c 　
24022
 MODE3_MIIONMODE3_MIION 0x04 via-rhine.c in PCI_REG_MOD3 OF PCI space
24023
 rhine_TOTAL_SIZErhine_TOTAL_SIZE 0x80 via-rhine.c 　
24024
 NUM_TX_DESCNUM_TX_DESC 2 via-rhine.c Number of Tx descriptor registers.
24025
 DEFAULT_INTRDEFAULT_INTR (IntrRxDone | IntrRxErr | IntrRxEmpty| IntrRxOverflow | \ IntrRxDropped | IntrRxNoBuf) via-rhine.c 　
24026
 IOSYNCIOSYNC do { inb(nic->ioaddr + StationAddr); } while (0) via-rhine.c 　
24027
 PCI_D0PCI_D0 ((int) 0) via-velocity.c 　
24028
 PCI_D1PCI_D1 ((int) 1) via-velocity.c 　
24029
 PCI_D2PCI_D2 ((int) 2) via-velocity.c 　
24030
 PCI_D3hotPCI_D3hot ((int) 3) via-velocity.c 　
24031
 PCI_D3coldPCI_D3cold ((int) 4) via-velocity.c 　
24032
 PCI_POWER_ERRORPCI_POWER_ERROR ((int) -1) via-velocity.c 　
24033
 VLAN_ID_MINVLAN_ID_MIN 0 via-velocity.c 　
24034
 VLAN_ID_MAXVLAN_ID_MAX 4095 via-velocity.c 　
24035
 VLAN_ID_DEFVLAN_ID_DEF 0 via-velocity.c 　
24036
 RX_THRESH_MINRX_THRESH_MIN 0 via-velocity.c 　
24037
 RX_THRESH_MAXRX_THRESH_MAX 3 via-velocity.c 　
24038
 RX_THRESH_DEFRX_THRESH_DEF 0 via-velocity.c 　
24039
 DMA_LENGTH_MINDMA_LENGTH_MIN 0 via-velocity.c 　
24040
 DMA_LENGTH_MAXDMA_LENGTH_MAX 7 via-velocity.c 　
24041
 DMA_LENGTH_DEFDMA_LENGTH_DEF 0 via-velocity.c 　
24042
 TAGGING_DEFTAGGING_DEF 0 via-velocity.c 　
24043
 IP_ALIG_DEFIP_ALIG_DEF 0 via-velocity.c 　
24044
 TX_CSUM_DEFTX_CSUM_DEF 1 via-velocity.c 　
24045
 FLOW_CNTL_DEFFLOW_CNTL_DEF 1 via-velocity.c 　
24046
 FLOW_CNTL_MINFLOW_CNTL_MIN 1 via-velocity.c 　
24047
 FLOW_CNTL_MAXFLOW_CNTL_MAX 5 via-velocity.c 　
24048
 MED_LNK_DEFMED_LNK_DEF 0 via-velocity.c 　
24049
 MED_LNK_MINMED_LNK_MIN 0 via-velocity.c 　
24050
 MED_LNK_MAXMED_LNK_MAX 4 via-velocity.c 　
24051
 VAL_PKT_LEN_DEFVAL_PKT_LEN_DEF 0 via-velocity.c 　
24052
 WOL_OPT_DEFWOL_OPT_DEF 0 via-velocity.c 　
24053
 WOL_OPT_MINWOL_OPT_MIN 0 via-velocity.c 　
24054
 WOL_OPT_MAXWOL_OPT_MAX 7 via-velocity.c 　
24055
 INT_WORKS_DEFINT_WORKS_DEF 20 via-velocity.c 　
24056
 INT_WORKS_MININT_WORKS_MIN 10 via-velocity.c 　
24057
 INT_WORKS_MAXINT_WORKS_MAX 64 via-velocity.c 　
24058
 TX_TIMEOUTTX_TIMEOUT (1000); via-velocity.c 　
24059
 IORESOURCE_IOIORESOURCE_IO 0x00000100 via-velocity.c Resource type
24060
 IORESOURCE_PREFETCHIORESOURCE_PREFETCH 0x00001000 via-velocity.c No side effects
24061
 IORESOURCE_MEMIORESOURCE_MEM 0x00000200 via-velocity.c 　
24062
 BAR_0BAR_0 0 via-velocity.c 　
24063
 BAR_1BAR_1 1 via-velocity.c 　
24064
 BAR_5BAR_5 5 via-velocity.c 　
24065
 PCI_BASE_ADDRESS_SPACEPCI_BASE_ADDRESS_SPACE 0x01 via-velocity.c 0 = memory, 1 = I/O
24066
 PCI_BASE_ADDRESS_SPACE_IOPCI_BASE_ADDRESS_SPACE_IO 0x01 via-velocity.c 　
24067
 PCI_BASE_ADDRESS_SPACE_MEMORYPCI_BASE_ADDRESS_SPACE_MEMORY 0x00 via-velocity.c 　
24068
 PCI_BASE_ADDRESS_MEM_TYPE_MASKPCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06 via-velocity.c 　
24069
 PCI_BASE_ADDRESS_MEM_TYPE_32PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 via-velocity.c 32 bit address
24070
 PCI_BASE_ADDRESS_MEM_TYPE_1MPCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 via-velocity.c Below 1M [obsolete]
24071
 PCI_BASE_ADDRESS_MEM_TYPE_64PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 via-velocity.c 64 bit address
24072
 PCI_BASE_ADDRESS_MEM_PREFETCHPCI_BASE_ADDRESS_MEM_PREFETCH 0x08 via-velocity.c prefetchable?
24073
 PCI_REG_COMMANDPCI_REG_COMMAND 0x04 via-velocity.c 　
24074
 PCI_REG_MODE0PCI_REG_MODE0 0x60 via-velocity.c 　
24075
 PCI_REG_MODE1PCI_REG_MODE1 0x61 via-velocity.c 　
24076
 PCI_REG_MODE2PCI_REG_MODE2 0x62 via-velocity.c 　
24077
 PCI_REG_MODE3PCI_REG_MODE3 0x63 via-velocity.c 　
24078
 PCI_REG_DELAY_TIMERPCI_REG_DELAY_TIMER 0x64 via-velocity.c 　
24079
 MODE2_PCEROPTMODE2_PCEROPT 0x80 via-velocity.c take PCI bus ERror as a fatal and shutdown from software control
24080
 MODE2_TXQ16MODE2_TXQ16 0x40 via-velocity.c TX write-back Queue control. 0->32 entries available in Tx write-back queue, 1->16 entries
24081
 MODE2_TXPOSTMODE2_TXPOST 0x08 via-velocity.c (Not support in VT3119)
24082
 MODE2_AUTOOPTMODE2_AUTOOPT 0x04 via-velocity.c (VT3119 GHCI without such behavior)
24083
 MODE2_MODE10TMODE2_MODE10T 0x02 via-velocity.c used to control tx Threshold for 10M case
24084
 MODE2_TCPLSOPTMODE2_TCPLSOPT 0x01 via-velocity.c TCP large send field update disable, hardware will not update related fields, leave it to software.
24085
 MODE3_MIIONMODE3_MIION 0x04 via-velocity.c MII symbol codine error detect enable ??
24086
 COMMAND_BUSMCOMMAND_BUSM 0x04 via-velocity.c 　
24087
 COMMAND_WAITCOMMAND_WAIT 0x80 via-velocity.c 　
24088
 RX_BUF_NBRX_BUF_NB 6 virtio-net.c 　
24089
 TX_RING_SIZETX_RING_SIZE 2 w89c840.c 　
24090
 RX_RING_SIZERX_RING_SIZE 2 w89c840.c 　
24091
 TX_FIFO_SIZETX_FIFO_SIZE (2048) w89c840.c 　
24092
 TX_BUG_FIFO_LIMITTX_BUG_FIFO_LIMIT (TX_FIFO_SIZE-1514-16) w89c840.c 　
24093
 TX_TIMEOUTTX_TIMEOUT (10*1000) w89c840.c 　
24094
 PKT_BUF_SZPKT_BUF_SZ 1536 w89c840.c Size of each temporary Rx buffer.
24095
 W840_FLAGSW840_FLAGS (PCI_USES_IO | PCI_ADDR0 | PCI_USES_MASTER) w89c840.c 　
24096
 W840_FLAGSW840_FLAGS (PCI_USES_MEM | PCI_ADDR1 | PCI_USES_MASTER) w89c840.c 　
24097
 readbreadb inb w89c840.c 　
24098
 readwreadw inw w89c840.c 　
24099
 readlreadl inl w89c840.c 　
24100
 writebwriteb outb w89c840.c 　
24101
 writewwritew outw w89c840.c 　
24102
 writelwritel outl w89c840.c 　
24103
 PRIV_ALIGNPRIV_ALIGN 15 w89c840.c Required alignment mask
24104
 PRIV_ALIGN_BYTESPRIV_ALIGN_BYTES 32 w89c840.c 　
24105
 MDIO_WRITE0MDIO_WRITE0 (MDIO_EnbOutput) w89c840.c 　
24106
 MDIO_WRITE1MDIO_WRITE1 (MDIO_DataOut | MDIO_EnbOutput) w89c840.c 　
24107
 WD_DEFAULT_MEMWD_DEFAULT_MEM 0xCC000 wd.c 　
24108
 TX_INIT_RATETX_INIT_RATE 16 3c509.h 　
24109
 TX_INIT_MAX_RATETX_INIT_MAX_RATE 64 3c509.h 　
24110
 RX_INIT_LATENCYRX_INIT_LATENCY 64 3c509.h 　
24111
 RX_INIT_EARLY_THRESHRX_INIT_EARLY_THRESH 64 3c509.h 　
24112
 MIN_RX_EARLY_THRESHFMIN_RX_EARLY_THRESHF 16 3c509.h not less than ether_header
24113
 MIN_RX_EARLY_THRESHLMIN_RX_EARLY_THRESHL 4 3c509.h 　
24114
 EEPROMSIZEEEPROMSIZE 0x40 3c509.h 　
24115
 MAX_EEPROMBUSYMAX_EEPROMBUSY 1000 3c509.h 　
24116
 EP_ID_PORT_STARTEP_ID_PORT_START 0x110 3c509.h avoid 0x100 to avoid conflict with SB16
24117
 EP_ID_PORT_INCEP_ID_PORT_INC 0x10 3c509.h 　
24118
 EP_ID_PORT_ENDEP_ID_PORT_END 0x200 3c509.h 　
24119
 EP_TAG_MAXEP_TAG_MAX 0x7 3c509.h must be 2^n - 1
24120
 EEPROM_CMD_RDEEPROM_CMD_RD 0x0080 3c509.h Read: Address required (5 bits)
24121
 EEPROM_CMD_WREEPROM_CMD_WR 0x0040 3c509.h Write: Address required (5 bits)
24122
 EEPROM_CMD_ERASEEEPROM_CMD_ERASE 0x00c0 3c509.h Erase: Address required (5 bits)
24123
 EEPROM_CMD_EWENEEPROM_CMD_EWEN 0x0030 3c509.h Erase/Write Enable: No data required
24124
 EEPROM_BUSYEEPROM_BUSY (1<<15) 3c509.h 　
24125
 EEPROM_TST_MODEEEPROM_TST_MODE (1<<14) 3c509.h 　
24126
 EEPROM_NODE_ADDR_0EEPROM_NODE_ADDR_0 0x0 3c509.h Word
24127
 EEPROM_NODE_ADDR_1EEPROM_NODE_ADDR_1 0x1 3c509.h Word
24128
 EEPROM_NODE_ADDR_2EEPROM_NODE_ADDR_2 0x2 3c509.h Word
24129
 EEPROM_PROD_IDEEPROM_PROD_ID 0x3 3c509.h 0x9[0-f]50
24130
 EEPROM_MFG_IDEEPROM_MFG_ID 0x7 3c509.h 0x6d50
24131
 EEPROM_ADDR_CFGEEPROM_ADDR_CFG 0x8 3c509.h Base addr
24132
 EEPROM_RESOURCE_CFGEEPROM_RESOURCE_CFG 0x9 3c509.h IRQ. Bits 12-15
24133
 EP_COMMANDEP_COMMAND 0x0e 3c509.h Write. BASE+0x0e is always a
24134
 EP_STATUSEP_STATUS 0x0e 3c509.h Read. BASE+0x0e is always status
24135
 EP_WINDOWEP_WINDOW 0x0f 3c509.h Read. BASE+0x0f is always window
24136
 EP_W0_EEPROM_DATAEP_W0_EEPROM_DATA 0x0c 3c509.h 　
24137
 EP_W0_EEPROM_COMMANDEP_W0_EEPROM_COMMAND 0x0a 3c509.h 　
24138
 EP_W0_RESOURCE_CFGEP_W0_RESOURCE_CFG 0x08 3c509.h 　
24139
 EP_W0_ADDRESS_CFGEP_W0_ADDRESS_CFG 0x06 3c509.h 　
24140
 EP_W0_CONFIG_CTRLEP_W0_CONFIG_CTRL 0x04 3c509.h 　
24141
 EP_W0_PRODUCT_IDEP_W0_PRODUCT_ID 0x02 3c509.h 　
24142
 EP_W0_MFG_IDEP_W0_MFG_ID 0x00 3c509.h 　
24143
 EP_W1_TX_PIO_WR_2EP_W1_TX_PIO_WR_2 0x02 3c509.h 　
24144
 EP_W1_TX_PIO_WR_1EP_W1_TX_PIO_WR_1 0x00 3c509.h 　
24145
 EP_W1_FREE_TXEP_W1_FREE_TX 0x0c 3c509.h 　
24146
 EP_W1_TX_STATUSEP_W1_TX_STATUS 0x0b 3c509.h byte
24147
 EP_W1_TIMEREP_W1_TIMER 0x0a 3c509.h byte
24148
 EP_W1_RX_STATUSEP_W1_RX_STATUS 0x08 3c509.h 　
24149
 EP_W1_RX_PIO_RD_2EP_W1_RX_PIO_RD_2 0x02 3c509.h 　
24150
 EP_W1_RX_PIO_RD_1EP_W1_RX_PIO_RD_1 0x00 3c509.h 　
24151
 EP_W2_ADDR_5EP_W2_ADDR_5 0x05 3c509.h 　
24152
 EP_W2_ADDR_4EP_W2_ADDR_4 0x04 3c509.h 　
24153
 EP_W2_ADDR_3EP_W2_ADDR_3 0x03 3c509.h 　
24154
 EP_W2_ADDR_2EP_W2_ADDR_2 0x02 3c509.h 　
24155
 EP_W2_ADDR_1EP_W2_ADDR_1 0x01 3c509.h 　
24156
 EP_W2_ADDR_0EP_W2_ADDR_0 0x00 3c509.h 　
24157
 EP_W3_FREE_TXEP_W3_FREE_TX 0x0c 3c509.h 　
24158
 EP_W3_FREE_RXEP_W3_FREE_RX 0x0a 3c509.h 　
24159
 EP_W4_MEDIA_TYPEEP_W4_MEDIA_TYPE 0x0a 3c509.h 　
24160
 EP_W4_CTRLR_STATUSEP_W4_CTRLR_STATUS 0x08 3c509.h 　
24161
 EP_W4_NET_DIAGEP_W4_NET_DIAG 0x06 3c509.h 　
24162
 EP_W4_FIFO_DIAGEP_W4_FIFO_DIAG 0x04 3c509.h 　
24163
 EP_W4_HOST_DIAGEP_W4_HOST_DIAG 0x02 3c509.h 　
24164
 EP_W4_TX_DIAGEP_W4_TX_DIAG 0x00 3c509.h 　
24165
 EP_W5_READ_0_MASKEP_W5_READ_0_MASK 0x0c 3c509.h 　
24166
 EP_W5_INTR_MASKEP_W5_INTR_MASK 0x0a 3c509.h 　
24167
 EP_W5_RX_FILTEREP_W5_RX_FILTER 0x08 3c509.h 　
24168
 EP_W5_RX_EARLY_THRESHEP_W5_RX_EARLY_THRESH 0x06 3c509.h 　
24169
 EP_W5_TX_AVAIL_THRESHEP_W5_TX_AVAIL_THRESH 0x02 3c509.h 　
24170
 EP_W5_TX_START_THRESHEP_W5_TX_START_THRESH 0x00 3c509.h 　
24171
 TX_TOTAL_OKTX_TOTAL_OK 0x0c 3c509.h 　
24172
 RX_TOTAL_OKRX_TOTAL_OK 0x0a 3c509.h 　
24173
 TX_DEFERRALSTX_DEFERRALS 0x08 3c509.h 　
24174
 RX_FRAMES_OKRX_FRAMES_OK 0x07 3c509.h 　
24175
 TX_FRAMES_OKTX_FRAMES_OK 0x06 3c509.h 　
24176
 RX_OVERRUNSRX_OVERRUNS 0x05 3c509.h 　
24177
 TX_COLLISIONSTX_COLLISIONS 0x04 3c509.h 　
24178
 TX_AFTER_1_COLLISIONTX_AFTER_1_COLLISION 0x03 3c509.h 　
24179
 TX_AFTER_X_COLLISIONSTX_AFTER_X_COLLISIONS 0x02 3c509.h 　
24180
 TX_NO_SQETX_NO_SQE 0x01 3c509.h 　
24181
 TX_CD_LOSTTX_CD_LOST 0x00 3c509.h 　
24182
 GLOBAL_RESETGLOBAL_RESET (unsigned short) 0x0000 3c509.h Wait at least 1ms
24183
 WINDOW_SELECTWINDOW_SELECT (unsigned short) (0x1<<11) 3c509.h 　
24184
 START_TRANSCEIVERSTART_TRANSCEIVER (unsigned short) (0x2<<11) 3c509.h Read ADDR_CFG reg to
24185
 RX_DISABLERX_DISABLE (unsigned short) (0x3<<11) 3c509.h state disabled on
24186
 RX_ENABLERX_ENABLE (unsigned short) (0x4<<11) 3c509.h 　
24187
 RX_RESETRX_RESET (unsigned short) (0x5<<11) 3c509.h 　
24188
 RX_DISCARD_TOP_PACKRX_DISCARD_TOP_PACK (unsigned short) (0x8<<11) 3c509.h 　
24189
 TX_ENABLETX_ENABLE (unsigned short) (0x9<<11) 3c509.h 　
24190
 TX_DISABLETX_DISABLE (unsigned short) (0xa<<11) 3c509.h 　
24191
 TX_RESETTX_RESET (unsigned short) (0xb<<11) 3c509.h 　
24192
 REQ_INTRREQ_INTR (unsigned short) (0xc<<11) 3c509.h 　
24193
 SET_INTR_MASKSET_INTR_MASK (unsigned short) (0xe<<11) 3c509.h 　
24194
 SET_RD_0_MASKSET_RD_0_MASK (unsigned short) (0xf<<11) 3c509.h 　
24195
 SET_RX_FILTERSET_RX_FILTER (unsigned short) (0x10<<11) 3c509.h 　
24196
 FIL_INDIVIDUALFIL_INDIVIDUAL (unsigned short) (0x1) 3c509.h 　
24197
 FIL_GROUPFIL_GROUP (unsigned short) (0x2) 3c509.h 　
24198
 FIL_BRDCSTFIL_BRDCST (unsigned short) (0x4) 3c509.h 　
24199
 FIL_ALLFIL_ALL (unsigned short) (0x8) 3c509.h 　
24200
 SET_RX_EARLY_THRESHSET_RX_EARLY_THRESH (unsigned short) (0x11<<11) 3c509.h 　
24201
 SET_TX_AVAIL_THRESHSET_TX_AVAIL_THRESH (unsigned short) (0x12<<11) 3c509.h 　
24202
 SET_TX_START_THRESHSET_TX_START_THRESH (unsigned short) (0x13<<11) 3c509.h 　
24203
 STATS_ENABLESTATS_ENABLE (unsigned short) (0x15<<11) 3c509.h 　
24204
 STATS_DISABLESTATS_DISABLE (unsigned short) (0x16<<11) 3c509.h 　
24205
 STOP_TRANSCEIVERSTOP_TRANSCEIVER (unsigned short) (0x17<<11) 3c509.h 　
24206
 ACK_INTRACK_INTR (unsigned short) (0x6800) 3c509.h 　
24207
 C_INTR_LATCHC_INTR_LATCH (unsigned short) (ACK_INTR|0x1) 3c509.h 　
24208
 C_CARD_FAILUREC_CARD_FAILURE (unsigned short) (ACK_INTR|0x2) 3c509.h 　
24209
 C_TX_COMPLETEC_TX_COMPLETE (unsigned short) (ACK_INTR|0x4) 3c509.h 　
24210
 C_TX_AVAILC_TX_AVAIL (unsigned short) (ACK_INTR|0x8) 3c509.h 　
24211
 C_RX_COMPLETEC_RX_COMPLETE (unsigned short) (ACK_INTR|0x10) 3c509.h 　
24212
 C_RX_EARLYC_RX_EARLY (unsigned short) (ACK_INTR|0x20) 3c509.h 　
24213
 C_INT_RQDC_INT_RQD (unsigned short) (ACK_INTR|0x40) 3c509.h 　
24214
 C_UPD_STATSC_UPD_STATS (unsigned short) (ACK_INTR|0x80) 3c509.h 　
24215
 S_INTR_LATCHS_INTR_LATCH (unsigned short) (0x1) 3c509.h 　
24216
 S_CARD_FAILURES_CARD_FAILURE (unsigned short) (0x2) 3c509.h 　
24217
 S_TX_COMPLETES_TX_COMPLETE (unsigned short) (0x4) 3c509.h 　
24218
 S_TX_AVAILS_TX_AVAIL (unsigned short) (0x8) 3c509.h 　
24219
 S_RX_COMPLETES_RX_COMPLETE (unsigned short) (0x10) 3c509.h 　
24220
 S_RX_EARLYS_RX_EARLY (unsigned short) (0x20) 3c509.h 　
24221
 S_INT_RQDS_INT_RQD (unsigned short) (0x40) 3c509.h 　
24222
 S_UPD_STATSS_UPD_STATS (unsigned short) (0x80) 3c509.h 　
24223
 S_5_INTSS_5_INTS (S_CARD_FAILURE|S_TX_COMPLETE|\ S_TX_AVAIL|S_RX_COMPLETE|S_RX_EARLY) 3c509.h 　
24224
 S_COMMAND_IN_PROGRESSS_COMMAND_IN_PROGRESS (unsigned short) (0x1000) 3c509.h 　
24225
 ERR_RX_INCOMPLETEERR_RX_INCOMPLETE (unsigned short) (0x1<<15) 3c509.h 　
24226
 ERR_RXERR_RX (unsigned short) (0x1<<14) 3c509.h 　
24227
 ERR_RX_OVERRUNERR_RX_OVERRUN (unsigned short) (0x8<<11) 3c509.h 　
24228
 ERR_RX_RUN_PKTERR_RX_RUN_PKT (unsigned short) (0xb<<11) 3c509.h 　
24229
 ERR_RX_ALIGNERR_RX_ALIGN (unsigned short) (0xc<<11) 3c509.h 　
24230
 ERR_RX_CRCERR_RX_CRC (unsigned short) (0xd<<11) 3c509.h 　
24231
 ERR_RX_OVERSIZEERR_RX_OVERSIZE (unsigned short) (0x9<<11) 3c509.h 　
24232
 ERR_RX_DRIBBLEERR_RX_DRIBBLE (unsigned short) (0x2<<11) 3c509.h 　
24233
 TXS_COMPLETETXS_COMPLETE 0x80 3c509.h 　
24234
 TXS_SUCCES_INTR_REQTXS_SUCCES_INTR_REQ 0x40 3c509.h 　
24235
 TXS_JABBERTXS_JABBER 0x20 3c509.h 　
24236
 TXS_UNDERRUNTXS_UNDERRUN 0x10 3c509.h 　
24237
 TXS_MAX_COLLISIONTXS_MAX_COLLISION 0x8 3c509.h 　
24238
 TXS_STATUS_OVERFLOWTXS_STATUS_OVERFLOW 0x4 3c509.h 　
24239
 IS_AUIIS_AUI (1<<13) 3c509.h 　
24240
 IS_BNCIS_BNC (1<<12) 3c509.h 　
24241
 IS_UTPIS_UTP (1<<9) 3c509.h 　
24242
 ENABLE_DRQ_IRQENABLE_DRQ_IRQ 0x0001 3c509.h 　
24243
 W0_P4_CMD_RESET_ADAPTERW0_P4_CMD_RESET_ADAPTER 0x4 3c509.h 　
24244
 W0_P4_CMD_ENABLE_ADAPTERW0_P4_CMD_ENABLE_ADAPTER 0x1 3c509.h 　
24245
 ENABLE_UTPENABLE_UTP 0xc0 3c509.h 　
24246
 DISABLE_UTPDISABLE_UTP 0x0 3c509.h 　
24247
 RX_BYTES_MASKRX_BYTES_MASK (unsigned short) (0x07ff) 3c509.h 　
24248
 RX_ERRORRX_ERROR 0x4000 3c509.h 　
24249
 RX_INCOMPLETERX_INCOMPLETE 0x8000 3c509.h 　
24250
 MFG_IDMFG_ID 0x6d50 3c509.h in EEPROM and W0 ADDR_CONFIG
24251
 PROD_IDPROD_ID 0x9150 3c509.h 　
24252
 AUIAUI 0x1 3c509.h 　
24253
 BNCBNC 0x2 3c509.h 　
24254
 UTPUTP 0x4 3c509.h 　
24255
 RX_BYTES_MASKRX_BYTES_MASK (unsigned short) (0x07ff) 3c509.h 　
24256
 TX_INIT_RATETX_INIT_RATE 16 3c595.h 　
24257
 TX_INIT_MAX_RATETX_INIT_MAX_RATE 64 3c595.h 　
24258
 RX_INIT_LATENCYRX_INIT_LATENCY 64 3c595.h 　
24259
 RX_INIT_EARLY_THRESHRX_INIT_EARLY_THRESH 64 3c595.h 　
24260
 MIN_RX_EARLY_THRESHFMIN_RX_EARLY_THRESHF 16 3c595.h not less than ether_header
24261
 MIN_RX_EARLY_THRESHLMIN_RX_EARLY_THRESHL 4 3c595.h 　
24262
 EEPROMSIZEEEPROMSIZE 0x40 3c595.h 　
24263
 MAX_EEPROMBUSYMAX_EEPROMBUSY 1000 3c595.h 　
24264
 VX_LAST_TAGVX_LAST_TAG 0xd7 3c595.h 　
24265
 VX_MAX_BOARDSVX_MAX_BOARDS 16 3c595.h 　
24266
 VX_ID_PORTVX_ID_PORT 0x100 3c595.h 　
24267
 BASEBASE (eth_nic_base) 3c595.h 　
24268
 EEPROM_CMD_RDEEPROM_CMD_RD 0x0080 3c595.h Read: Address required (5 bits)
24269
 EEPROM_CMD_WREEPROM_CMD_WR 0x0040 3c595.h Write: Address required (5 bits)
24270
 EEPROM_CMD_ERASEEEPROM_CMD_ERASE 0x00c0 3c595.h Erase: Address required (5 bits)
24271
 EEPROM_CMD_EWENEEPROM_CMD_EWEN 0x0030 3c595.h Erase/Write Enable: No data required
24272
 EEPROM_BUSYEEPROM_BUSY (1<<15) 3c595.h 　
24273
 EEPROM_NODE_ADDR_0EEPROM_NODE_ADDR_0 0x0 3c595.h Word
24274
 EEPROM_NODE_ADDR_1EEPROM_NODE_ADDR_1 0x1 3c595.h Word
24275
 EEPROM_NODE_ADDR_2EEPROM_NODE_ADDR_2 0x2 3c595.h Word
24276
 EEPROM_PROD_IDEEPROM_PROD_ID 0x3 3c595.h 0x9[0-f]50
24277
 EEPROM_MFG_IDEEPROM_MFG_ID 0x7 3c595.h 0x6d50
24278
 EEPROM_ADDR_CFGEEPROM_ADDR_CFG 0x8 3c595.h Base addr
24279
 EEPROM_RESOURCE_CFGEEPROM_RESOURCE_CFG 0x9 3c595.h IRQ. Bits 12-15
24280
 EEPROM_OEM_ADDR_0EEPROM_OEM_ADDR_0 0xa 3c595.h Word
24281
 EEPROM_OEM_ADDR_1EEPROM_OEM_ADDR_1 0xb 3c595.h Word
24282
 EEPROM_OEM_ADDR_2EEPROM_OEM_ADDR_2 0xc 3c595.h Word
24283
 EEPROM_SOFT_INFO_2EEPROM_SOFT_INFO_2 0xf 3c595.h Software information 2
24284
 NO_RX_OVN_ANOMALYNO_RX_OVN_ANOMALY (1<<5) 3c595.h 　
24285
 VX_COMMANDVX_COMMAND 0x0e 3c595.h Write. BASE+0x0e is always a
24286
 VX_STATUSVX_STATUS 0x0e 3c595.h Read. BASE+0x0e is always status
24287
 VX_WINDOWVX_WINDOW 0x0f 3c595.h Read. BASE+0x0f is always window
24288
 VX_W0_EEPROM_DATAVX_W0_EEPROM_DATA 0x0c 3c595.h 　
24289
 VX_W0_EEPROM_COMMANDVX_W0_EEPROM_COMMAND 0x0a 3c595.h 　
24290
 VX_W0_RESOURCE_CFGVX_W0_RESOURCE_CFG 0x08 3c595.h 　
24291
 VX_W0_ADDRESS_CFGVX_W0_ADDRESS_CFG 0x06 3c595.h 　
24292
 VX_W0_CONFIG_CTRLVX_W0_CONFIG_CTRL 0x04 3c595.h 　
24293
 VX_W0_PRODUCT_IDVX_W0_PRODUCT_ID 0x02 3c595.h 　
24294
 VX_W0_MFG_IDVX_W0_MFG_ID 0x00 3c595.h 　
24295
 VX_W1_TX_PIO_WR_2VX_W1_TX_PIO_WR_2 0x02 3c595.h 　
24296
 VX_W1_TX_PIO_WR_1VX_W1_TX_PIO_WR_1 0x00 3c595.h 　
24297
 VX_W1_FREE_TXVX_W1_FREE_TX 0x0c 3c595.h 　
24298
 VX_W1_TX_STATUSVX_W1_TX_STATUS 0x0b 3c595.h byte
24299
 VX_W1_TIMERVX_W1_TIMER 0x0a 3c595.h byte
24300
 VX_W1_RX_STATUSVX_W1_RX_STATUS 0x08 3c595.h 　
24301
 VX_W1_RX_PIO_RD_2VX_W1_RX_PIO_RD_2 0x02 3c595.h 　
24302
 VX_W1_RX_PIO_RD_1VX_W1_RX_PIO_RD_1 0x00 3c595.h 　
24303
 VX_W2_ADDR_5VX_W2_ADDR_5 0x05 3c595.h 　
24304
 VX_W2_ADDR_4VX_W2_ADDR_4 0x04 3c595.h 　
24305
 VX_W2_ADDR_3VX_W2_ADDR_3 0x03 3c595.h 　
24306
 VX_W2_ADDR_2VX_W2_ADDR_2 0x02 3c595.h 　
24307
 VX_W2_ADDR_1VX_W2_ADDR_1 0x01 3c595.h 　
24308
 VX_W2_ADDR_0VX_W2_ADDR_0 0x00 3c595.h 　
24309
 VX_W3_INTERNAL_CFGVX_W3_INTERNAL_CFG 0x00 3c595.h 　
24310
 VX_W3_RESET_OPTVX_W3_RESET_OPT 0x08 3c595.h 　
24311
 VX_W3_FREE_TXVX_W3_FREE_TX 0x0c 3c595.h 　
24312
 VX_W3_FREE_RXVX_W3_FREE_RX 0x0a 3c595.h 　
24313
 VX_W4_MEDIA_TYPEVX_W4_MEDIA_TYPE 0x0a 3c595.h 　
24314
 VX_W4_CTRLR_STATUSVX_W4_CTRLR_STATUS 0x08 3c595.h 　
24315
 VX_W4_NET_DIAGVX_W4_NET_DIAG 0x06 3c595.h 　
24316
 VX_W4_FIFO_DIAGVX_W4_FIFO_DIAG 0x04 3c595.h 　
24317
 VX_W4_HOST_DIAGVX_W4_HOST_DIAG 0x02 3c595.h 　
24318
 VX_W4_TX_DIAGVX_W4_TX_DIAG 0x00 3c595.h 　
24319
 VX_W5_READ_0_MASKVX_W5_READ_0_MASK 0x0c 3c595.h 　
24320
 VX_W5_INTR_MASKVX_W5_INTR_MASK 0x0a 3c595.h 　
24321
 VX_W5_RX_FILTERVX_W5_RX_FILTER 0x08 3c595.h 　
24322
 VX_W5_RX_EARLY_THRESHVX_W5_RX_EARLY_THRESH 0x06 3c595.h 　
24323
 VX_W5_TX_AVAIL_THRESHVX_W5_TX_AVAIL_THRESH 0x02 3c595.h 　
24324
 VX_W5_TX_START_THRESHVX_W5_TX_START_THRESH 0x00 3c595.h 　
24325
 TX_TOTAL_OKTX_TOTAL_OK 0x0c 3c595.h 　
24326
 RX_TOTAL_OKRX_TOTAL_OK 0x0a 3c595.h 　
24327
 TX_DEFERRALSTX_DEFERRALS 0x08 3c595.h 　
24328
 RX_FRAMES_OKRX_FRAMES_OK 0x07 3c595.h 　
24329
 TX_FRAMES_OKTX_FRAMES_OK 0x06 3c595.h 　
24330
 RX_OVERRUNSRX_OVERRUNS 0x05 3c595.h 　
24331
 TX_COLLISIONSTX_COLLISIONS 0x04 3c595.h 　
24332
 TX_AFTER_1_COLLISIONTX_AFTER_1_COLLISION 0x03 3c595.h 　
24333
 TX_AFTER_X_COLLISIONSTX_AFTER_X_COLLISIONS 0x02 3c595.h 　
24334
 TX_NO_SQETX_NO_SQE 0x01 3c595.h 　
24335
 TX_CD_LOSTTX_CD_LOST 0x00 3c595.h 　
24336
 GLOBAL_RESETGLOBAL_RESET (unsigned short) 0x0000 3c595.h Wait at least 1ms
24337
 WINDOW_SELECTWINDOW_SELECT (unsigned short) (0x1<<11) 3c595.h 　
24338
 START_TRANSCEIVERSTART_TRANSCEIVER (unsigned short) (0x2<<11) 3c595.h Read ADDR_CFG reg to
24339
 RX_DISABLERX_DISABLE (unsigned short) (0x3<<11) 3c595.h state disabled on
24340
 RX_ENABLERX_ENABLE (unsigned short) (0x4<<11) 3c595.h 　
24341
 RX_RESETRX_RESET (unsigned short) (0x5<<11) 3c595.h 　
24342
 RX_DISCARD_TOP_PACKRX_DISCARD_TOP_PACK (unsigned short) (0x8<<11) 3c595.h 　
24343
 TX_ENABLETX_ENABLE (unsigned short) (0x9<<11) 3c595.h 　
24344
 TX_DISABLETX_DISABLE (unsigned short) (0xa<<11) 3c595.h 　
24345
 TX_RESETTX_RESET (unsigned short) (0xb<<11) 3c595.h 　
24346
 REQ_INTRREQ_INTR (unsigned short) (0xc<<11) 3c595.h 　
24347
 ACK_INTRACK_INTR (unsigned short) (0x6800) 3c595.h 　
24348
 C_INTR_LATCHC_INTR_LATCH (unsigned short) (ACK_INTR|0x1) 3c595.h 　
24349
 C_CARD_FAILUREC_CARD_FAILURE (unsigned short) (ACK_INTR|0x2) 3c595.h 　
24350
 C_TX_COMPLETEC_TX_COMPLETE (unsigned short) (ACK_INTR|0x4) 3c595.h 　
24351
 C_TX_AVAILC_TX_AVAIL (unsigned short) (ACK_INTR|0x8) 3c595.h 　
24352
 C_RX_COMPLETEC_RX_COMPLETE (unsigned short) (ACK_INTR|0x10) 3c595.h 　
24353
 C_RX_EARLYC_RX_EARLY (unsigned short) (ACK_INTR|0x20) 3c595.h 　
24354
 C_INT_RQDC_INT_RQD (unsigned short) (ACK_INTR|0x40) 3c595.h 　
24355
 C_UPD_STATSC_UPD_STATS (unsigned short) (ACK_INTR|0x80) 3c595.h 　
24356
 SET_INTR_MASKSET_INTR_MASK (unsigned short) (0xe<<11) 3c595.h 　
24357
 SET_RD_0_MASKSET_RD_0_MASK (unsigned short) (0xf<<11) 3c595.h 　
24358
 SET_RX_FILTERSET_RX_FILTER (unsigned short) (0x10<<11) 3c595.h 　
24359
 FIL_INDIVIDUALFIL_INDIVIDUAL (unsigned short) (0x1) 3c595.h 　
24360
 FIL_MULTICASTFIL_MULTICAST (unsigned short) (0x02) 3c595.h 　
24361
 FIL_BRDCSTFIL_BRDCST (unsigned short) (0x04) 3c595.h 　
24362
 FIL_PROMISCFIL_PROMISC (unsigned short) (0x08) 3c595.h 　
24363
 SET_RX_EARLY_THRESHSET_RX_EARLY_THRESH (unsigned short) (0x11<<11) 3c595.h 　
24364
 SET_TX_AVAIL_THRESHSET_TX_AVAIL_THRESH (unsigned short) (0x12<<11) 3c595.h 　
24365
 SET_TX_START_THRESHSET_TX_START_THRESH (unsigned short) (0x13<<11) 3c595.h 　
24366
 STATS_ENABLESTATS_ENABLE (unsigned short) (0x15<<11) 3c595.h 　
24367
 STATS_DISABLESTATS_DISABLE (unsigned short) (0x16<<11) 3c595.h 　
24368
 STOP_TRANSCEIVERSTOP_TRANSCEIVER (unsigned short) (0x17<<11) 3c595.h 　
24369
 S_INTR_LATCHS_INTR_LATCH (unsigned short) (0x1) 3c595.h 　
24370
 S_CARD_FAILURES_CARD_FAILURE (unsigned short) (0x2) 3c595.h 　
24371
 S_TX_COMPLETES_TX_COMPLETE (unsigned short) (0x4) 3c595.h 　
24372
 S_TX_AVAILS_TX_AVAIL (unsigned short) (0x8) 3c595.h 　
24373
 S_RX_COMPLETES_RX_COMPLETE (unsigned short) (0x10) 3c595.h 　
24374
 S_RX_EARLYS_RX_EARLY (unsigned short) (0x20) 3c595.h 　
24375
 S_INT_RQDS_INT_RQD (unsigned short) (0x40) 3c595.h 　
24376
 S_UPD_STATSS_UPD_STATS (unsigned short) (0x80) 3c595.h 　
24377
 S_COMMAND_IN_PROGRESSS_COMMAND_IN_PROGRESS (unsigned short) (0x1000) 3c595.h 　
24378
 VX_BUSY_WAITVX_BUSY_WAIT while (inw(BASE + VX_STATUS) & S_COMMAND_IN_PROGRESS) 3c595.h 　
24379
 ACF_CONNECTOR_BITSACF_CONNECTOR_BITS 14 3c595.h 　
24380
 ACF_CONNECTOR_UTPACF_CONNECTOR_UTP 0 3c595.h 　
24381
 ACF_CONNECTOR_AUIACF_CONNECTOR_AUI 1 3c595.h 　
24382
 ACF_CONNECTOR_BNCACF_CONNECTOR_BNC 3 3c595.h 　
24383
 INTERNAL_CONNECTOR_BITSINTERNAL_CONNECTOR_BITS 20 3c595.h 　
24384
 INTERNAL_CONNECTOR_MASKINTERNAL_CONNECTOR_MASK 0x01700000 3c595.h 　
24385
 ERR_INCOMPLETEERR_INCOMPLETE (unsigned short) (0x8000) 3c595.h 　
24386
 ERR_RXERR_RX (unsigned short) (0x4000) 3c595.h 　
24387
 ERR_MASKERR_MASK (unsigned short) (0x7800) 3c595.h 　
24388
 ERR_OVERRUNERR_OVERRUN (unsigned short) (0x4000) 3c595.h 　
24389
 ERR_RUNTERR_RUNT (unsigned short) (0x5800) 3c595.h 　
24390
 ERR_ALIGNMENTERR_ALIGNMENT (unsigned short) (0x6000) 3c595.h 　
24391
 ERR_CRCERR_CRC (unsigned short) (0x6800) 3c595.h 　
24392
 ERR_OVERSIZEERR_OVERSIZE (unsigned short) (0x4800) 3c595.h 　
24393
 ERR_DRIBBLEERR_DRIBBLE (unsigned short) (0x1000) 3c595.h 　
24394
 TXS_COMPLETETXS_COMPLETE 0x80 3c595.h 　
24395
 TXS_INTR_REQTXS_INTR_REQ 0x40 3c595.h 　
24396
 TXS_JABBERTXS_JABBER 0x20 3c595.h 　
24397
 TXS_UNDERRUNTXS_UNDERRUN 0x10 3c595.h 　
24398
 TXS_MAX_COLLISIONTXS_MAX_COLLISION 0x8 3c595.h 　
24399
 TXS_STATUS_OVERFLOWTXS_STATUS_OVERFLOW 0x4 3c595.h 　
24400
 RS_AUIRS_AUI (1<<5) 3c595.h 　
24401
 RS_BNCRS_BNC (1<<4) 3c595.h 　
24402
 RS_UTPRS_UTP (1<<3) 3c595.h 　
24403
 RS_T4RS_T4 (1<<0) 3c595.h 　
24404
 RS_TXRS_TX (1<<1) 3c595.h 　
24405
 RS_FXRS_FX (1<<2) 3c595.h 　
24406
 RS_MIIRS_MII (1<<6) 3c595.h 　
24407
 FIFOS_RX_RECEIVINGFIFOS_RX_RECEIVING (unsigned short) 0x8000 3c595.h 　
24408
 FIFOS_RX_UNDERRUNFIFOS_RX_UNDERRUN (unsigned short) 0x2000 3c595.h 　
24409
 FIFOS_RX_STATUS_OVERRUNFIFOS_RX_STATUS_OVERRUN (unsigned short) 0x1000 3c595.h 　
24410
 FIFOS_RX_OVERRUNFIFOS_RX_OVERRUN (unsigned short) 0x0800 3c595.h 　
24411
 FIFOS_TX_OVERRUNFIFOS_TX_OVERRUN (unsigned short) 0x0400 3c595.h 　
24412
 TAG_ADAPTERTAG_ADAPTER 0xd0 3c595.h 　
24413
 ACTIVATE_ADAPTER_TO_CONFIGACTIVATE_ADAPTER_TO_CONFIG 0xff 3c595.h 　
24414
 ENABLE_DRQ_IRQENABLE_DRQ_IRQ 0x0001 3c595.h 　
24415
 MFG_IDMFG_ID 0x506d 3c595.h `TCM'
24416
 PROD_IDPROD_ID 0x5090 3c595.h 　
24417
 JABBER_GUARD_ENABLEJABBER_GUARD_ENABLE 0x40 3c595.h 　
24418
 LINKBEAT_ENABLELINKBEAT_ENABLE 0x80 3c595.h 　
24419
 ENABLE_UTPENABLE_UTP (JABBER_GUARD_ENABLE | LINKBEAT_ENABLE) 3c595.h 　
24420
 DISABLE_UTPDISABLE_UTP 0x0 3c595.h 　
24421
 RX_BYTES_MASKRX_BYTES_MASK (unsigned short) (0x07ff) 3c595.h 　
24422
 RX_ERRORRX_ERROR 0x4000 3c595.h 　
24423
 RX_INCOMPLETERX_INCOMPLETE 0x8000 3c595.h 　
24424
 TX_INDICATETX_INDICATE 1<<15 3c595.h 　
24425
 VX_IOSIZEVX_IOSIZE 0x20 3c595.h 　
24426
 VX_CONNECTORSVX_CONNECTORS 8 3c595.h 　
24427
 XCVR_MAGICXCVR_MAGIC (0x5A00) 3c90x.h 　
24428
 INT_INTERRUPTLATCHINT_INTERRUPTLATCH (1<<0) 3c90x.h 　
24429
 INT_HOSTERRORINT_HOSTERROR (1<<1) 3c90x.h 　
24430
 INT_TXCOMPLETEINT_TXCOMPLETE (1<<2) 3c90x.h 　
24431
 INT_RXCOMPLETEINT_RXCOMPLETE (1<<4) 3c90x.h 　
24432
 INT_RXEARLYINT_RXEARLY (1<<5) 3c90x.h 　
24433
 INT_INTREQUESTEDINT_INTREQUESTED (1<<6) 3c90x.h 　
24434
 INT_UPDATESTATSINT_UPDATESTATS (1<<7) 3c90x.h 　
24435
 INT_LINKEVENTINT_LINKEVENT (1<<8) 3c90x.h 　
24436
 INT_DNCOMPLETEINT_DNCOMPLETE (1<<9) 3c90x.h 　
24437
 INT_UPCOMPLETEINT_UPCOMPLETE (1<<10) 3c90x.h 　
24438
 INT_CMDINPROGRESSINT_CMDINPROGRESS (1<<12) 3c90x.h 　
24439
 INT_WINDOWNUMBERINT_WINDOWNUMBER (7<<13) 3c90x.h 　
24440
 TX_RING_SIZETX_RING_SIZE 8 3c90x.h 　
24441
 RX_RING_SIZERX_RING_SIZE 8 3c90x.h 　
24442
 TX_RING_ALIGNTX_RING_ALIGN 16 3c90x.h 　
24443
 RX_RING_ALIGNRX_RING_ALIGN 16 3c90x.h 　
24444
 RX_BUF_SIZERX_BUF_SIZE 1536 3c90x.h 　
24445
 EEPROM_TIMEOUTEEPROM_TIMEOUT 1 * 1000 * 1000 3c90x.h 　
24446
 ASF_STATASF_STAT 0x00 amd8111e.h ASF status register
24447
 CHIPIDCHIPID 0x04 amd8111e.h Chip ID regsiter
24448
 MIB_DATAMIB_DATA 0x10 amd8111e.h MIB data register
24449
 MIB_ADDRMIB_ADDR 0x14 amd8111e.h MIB address register
24450
 STAT0STAT0 0x30 amd8111e.h Status0 register
24451
 INT0INT0 0x38 amd8111e.h Interrupt0 register
24452
 INTEN0INTEN0 0x40 amd8111e.h Interrupt0 enable register
24453
 CMD0CMD0 0x48 amd8111e.h Command0 register
24454
 CMD2CMD2 0x50 amd8111e.h Command2 register
24455
 CMD3CMD3 0x54 amd8111e.h Command3 resiter
24456
 CMD7CMD7 0x64 amd8111e.h Command7 register
24457
 CTRL1CTRL1 0x6C amd8111e.h Control1 register
24458
 CTRL2CTRL2 0x70 amd8111e.h Control2 register
24459
 XMT_RING_LIMITXMT_RING_LIMIT 0x7C amd8111e.h Transmit ring limit register
24460
 AUTOPOLL0AUTOPOLL0 0x88 amd8111e.h Auto-poll0 register
24461
 AUTOPOLL1AUTOPOLL1 0x8A amd8111e.h Auto-poll1 register
24462
 AUTOPOLL2AUTOPOLL2 0x8C amd8111e.h Auto-poll2 register
24463
 AUTOPOLL3AUTOPOLL3 0x8E amd8111e.h Auto-poll3 register
24464
 AUTOPOLL4AUTOPOLL4 0x90 amd8111e.h Auto-poll4 register
24465
 AUTOPOLL5AUTOPOLL5 0x92 amd8111e.h Auto-poll5 register
24466
 AP_VALUEAP_VALUE 0x98 amd8111e.h Auto-poll value register
24467
 DLY_INT_ADLY_INT_A 0xA8 amd8111e.h Group A delayed interrupt register
24468
 DLY_INT_BDLY_INT_B 0xAC amd8111e.h Group B delayed interrupt register
24469
 FLOW_CONTROLFLOW_CONTROL 0xC8 amd8111e.h Flow control register
24470
 PHY_ACCESSPHY_ACCESS 0xD0 amd8111e.h PHY access register
24471
 STVALSTVAL 0xD8 amd8111e.h Software timer value register
24472
 XMT_RING_BASE_ADDR0XMT_RING_BASE_ADDR0 0x100 amd8111e.h Transmit ring0 base addr register
24473
 XMT_RING_BASE_ADDR1XMT_RING_BASE_ADDR1 0x108 amd8111e.h Transmit ring1 base addr register
24474
 XMT_RING_BASE_ADDR2XMT_RING_BASE_ADDR2 0x110 amd8111e.h Transmit ring2 base addr register
24475
 XMT_RING_BASE_ADDR3XMT_RING_BASE_ADDR3 0x118 amd8111e.h Transmit ring2 base addr register
24476
 RCV_RING_BASE_ADDR0RCV_RING_BASE_ADDR0 0x120 amd8111e.h Transmit ring0 base addr register
24477
 PMAT0PMAT0 0x190 amd8111e.h OnNow pattern register0
24478
 PMAT1PMAT1 0x194 amd8111e.h OnNow pattern register1
24479
 XMT_RING_LEN0XMT_RING_LEN0 0x140 amd8111e.h Transmit Ring0 length register
24480
 XMT_RING_LEN1XMT_RING_LEN1 0x144 amd8111e.h Transmit Ring1 length register
24481
 XMT_RING_LEN2XMT_RING_LEN2 0x148 amd8111e.h Transmit Ring2 length register
24482
 XMT_RING_LEN3XMT_RING_LEN3 0x14C amd8111e.h Transmit Ring3 length register
24483
 RCV_RING_LEN0RCV_RING_LEN0 0x150 amd8111e.h Receive Ring0 length register
24484
 SRAM_SIZESRAM_SIZE 0x178 amd8111e.h SRAM size register
24485
 SRAM_BOUNDARYSRAM_BOUNDARY 0x17A amd8111e.h SRAM boundary register
24486
 PADRPADR 0x160 amd8111e.h Physical address register
24487
 IFS1IFS1 0x18C amd8111e.h Inter-frame spacing Part1 register
24488
 IFSIFS 0x18D amd8111e.h Inter-frame spacing register
24489
 IPGIPG 0x18E amd8111e.h Inter-frame gap register
24490
 LADRFLADRF 0x168 amd8111e.h Logical address filter register
24491
 PHY_SPEED_10PHY_SPEED_10 0x2 amd8111e.h 　
24492
 PHY_SPEED_100PHY_SPEED_100 0x3 amd8111e.h 　
24493
 rcv_miss_pktsrcv_miss_pkts 0x00 amd8111e.h 　
24494
 rcv_octetsrcv_octets 0x01 amd8111e.h 　
24495
 rcv_broadcast_pktsrcv_broadcast_pkts 0x02 amd8111e.h 　
24496
 rcv_multicast_pktsrcv_multicast_pkts 0x03 amd8111e.h 　
24497
 rcv_undersize_pktsrcv_undersize_pkts 0x04 amd8111e.h 　
24498
 rcv_oversize_pktsrcv_oversize_pkts 0x05 amd8111e.h 　
24499
 rcv_fragmentsrcv_fragments 0x06 amd8111e.h 　
24500
 rcv_jabbersrcv_jabbers 0x07 amd8111e.h 　
24501
 rcv_unicast_pktsrcv_unicast_pkts 0x08 amd8111e.h 　
24502
 rcv_alignment_errorsrcv_alignment_errors 0x09 amd8111e.h 　
24503
 rcv_fcs_errorsrcv_fcs_errors 0x0A amd8111e.h 　
24504
 rcv_good_octetsrcv_good_octets 0x0B amd8111e.h 　
24505
 rcv_mac_ctrlrcv_mac_ctrl 0x0C amd8111e.h 　
24506
 rcv_flow_ctrlrcv_flow_ctrl 0x0D amd8111e.h 　
24507
 rcv_pkts_64_octetsrcv_pkts_64_octets 0x0E amd8111e.h 　
24508
 rcv_pkts_65to127_octetsrcv_pkts_65to127_octets 0x0F amd8111e.h 　
24509
 rcv_pkts_128to255_octetsrcv_pkts_128to255_octets 0x10 amd8111e.h 　
24510
 rcv_pkts_256to511_octetsrcv_pkts_256to511_octets 0x11 amd8111e.h 　
24511
 rcv_pkts_512to1023_octetsrcv_pkts_512to1023_octets 0x12 amd8111e.h 　
24512
 rcv_pkts_1024to1518_octetsrcv_pkts_1024to1518_octets 0x13 amd8111e.h 　
24513
 rcv_unsupported_opcodercv_unsupported_opcode 0x14 amd8111e.h 　
24514
 rcv_symbol_errorsrcv_symbol_errors 0x15 amd8111e.h 　
24515
 rcv_drop_pkts_ring1rcv_drop_pkts_ring1 0x16 amd8111e.h 　
24516
 rcv_drop_pkts_ring2rcv_drop_pkts_ring2 0x17 amd8111e.h 　
24517
 rcv_drop_pkts_ring3rcv_drop_pkts_ring3 0x18 amd8111e.h 　
24518
 rcv_drop_pkts_ring4rcv_drop_pkts_ring4 0x19 amd8111e.h 　
24519
 rcv_jumbo_pktsrcv_jumbo_pkts 0x1A amd8111e.h 　
24520
 xmt_underrun_pktsxmt_underrun_pkts 0x20 amd8111e.h 　
24521
 xmt_octetsxmt_octets 0x21 amd8111e.h 　
24522
 xmt_packetsxmt_packets 0x22 amd8111e.h 　
24523
 xmt_broadcast_pktsxmt_broadcast_pkts 0x23 amd8111e.h 　
24524
 xmt_multicast_pktsxmt_multicast_pkts 0x24 amd8111e.h 　
24525
 xmt_collisionsxmt_collisions 0x25 amd8111e.h 　
24526
 xmt_unicast_pktsxmt_unicast_pkts 0x26 amd8111e.h 　
24527
 xmt_one_collisionxmt_one_collision 0x27 amd8111e.h 　
24528
 xmt_multiple_collisionxmt_multiple_collision 0x28 amd8111e.h 　
24529
 xmt_deferred_transmitxmt_deferred_transmit 0x29 amd8111e.h 　
24530
 xmt_late_collisionxmt_late_collision 0x2A amd8111e.h 　
24531
 xmt_excessive_deferxmt_excessive_defer 0x2B amd8111e.h 　
24532
 xmt_loss_carrierxmt_loss_carrier 0x2C amd8111e.h 　
24533
 xmt_excessive_collisionxmt_excessive_collision 0x2D amd8111e.h 　
24534
 xmt_back_pressurexmt_back_pressure 0x2E amd8111e.h 　
24535
 xmt_flow_ctrlxmt_flow_ctrl 0x2F amd8111e.h 　
24536
 xmt_pkts_64_octetsxmt_pkts_64_octets 0x30 amd8111e.h 　
24537
 xmt_pkts_65to127_octetsxmt_pkts_65to127_octets 0x31 amd8111e.h 　
24538
 xmt_pkts_128to255_octetsxmt_pkts_128to255_octets 0x32 amd8111e.h 　
24539
 xmt_pkts_256to511_octetsxmt_pkts_256to511_octets 0x33 amd8111e.h 　
24540
 xmt_pkts_512to1023_octetsxmt_pkts_512to1023_octets 0x34 amd8111e.h 　
24541
 xmt_pkts_1024to1518_octetxmt_pkts_1024to1518_octet 0x35 amd8111e.h 　
24542
 xmt_oversize_pktsxmt_oversize_pkts 0x36 amd8111e.h 　
24543
 xmt_jumbo_pktsxmt_jumbo_pkts 0x37 amd8111e.h 　
24544
 DEFAULT_IPGDEFAULT_IPG 0x60 amd8111e.h 　
24545
 IFS1_DELTAIFS1_DELTA 36 amd8111e.h 　
24546
 IPG_CONVERGE_JIFFIESIPG_CONVERGE_JIFFIES (HZ/2) amd8111e.h 　
24547
 IPG_STABLE_TIMEIPG_STABLE_TIME 5 amd8111e.h 　
24548
 MIN_IPGMIN_IPG 96 amd8111e.h 　
24549
 MAX_IPGMAX_IPG 255 amd8111e.h 　
24550
 IPG_STEPIPG_STEP 16 amd8111e.h 　
24551
 CSTATECSTATE 1 amd8111e.h 　
24552
 SSTATESSTATE 2 amd8111e.h 　
24553
 RESET_RX_FLAGSRESET_RX_FLAGS 0x0000 amd8111e.h 　
24554
 TT_MASKTT_MASK 0x000c amd8111e.h 　
24555
 TCC_MASKTCC_MASK 0x0003 amd8111e.h 　
24556
 AMD8111E_REG_DUMP_LENAMD8111E_REG_DUMP_LEN 13*sizeof(u32) amd8111e.h 　
24557
 CRC32CRC32 0xedb88320 amd8111e.h 　
24558
 INITCRCINITCRC 0xFFFFFFFF amd8111e.h 　
24559
 ETH_FCS_LENETH_FCS_LEN 4 atl1e.h 　
24560
 VLAN_HLENVLAN_HLEN 4 atl1e.h 　
24561
 NET_IP_ALIGNNET_IP_ALIGN 2 atl1e.h 　
24562
 SPEED_0SPEED_0 0xffff atl1e.h 　
24563
 SPEED_10SPEED_10 10 atl1e.h 　
24564
 SPEED_100SPEED_100 100 atl1e.h 　
24565
 SPEED_1000SPEED_1000 1000 atl1e.h 　
24566
 HALF_DUPLEXHALF_DUPLEX 1 atl1e.h 　
24567
 FULL_DUPLEXFULL_DUPLEX 2 atl1e.h 　
24568
 AT_ERR_EEPROMAT_ERR_EEPROM 1 atl1e.h 　
24569
 AT_ERR_PHYAT_ERR_PHY 2 atl1e.h 　
24570
 AT_ERR_CONFIGAT_ERR_CONFIG 3 atl1e.h 　
24571
 AT_ERR_PARAMAT_ERR_PARAM 4 atl1e.h 　
24572
 AT_ERR_MAC_TYPEAT_ERR_MAC_TYPE 5 atl1e.h 　
24573
 AT_ERR_PHY_TYPEAT_ERR_PHY_TYPE 6 atl1e.h 　
24574
 AT_ERR_PHY_SPEEDAT_ERR_PHY_SPEED 7 atl1e.h 　
24575
 AT_ERR_PHY_RESAT_ERR_PHY_RES 8 atl1e.h 　
24576
 AT_ERR_TIMEOUTAT_ERR_TIMEOUT 9 atl1e.h 　
24577
 AT_MAX_RECEIVE_QUEUEAT_MAX_RECEIVE_QUEUE 4 atl1e.h 　
24578
 AT_PAGE_NUM_PER_QUEUEAT_PAGE_NUM_PER_QUEUE 2 atl1e.h 　
24579
 AT_TWSI_EEPROM_TIMEOUTAT_TWSI_EEPROM_TIMEOUT 100 atl1e.h 　
24580
 AT_HW_MAX_IDLE_DELAYAT_HW_MAX_IDLE_DELAY 10 atl1e.h 　
24581
 AT_REGS_LENAT_REGS_LEN 75 atl1e.h 　
24582
 AT_EEPROM_LENAT_EEPROM_LEN 512 atl1e.h 　
24583
 TPD_BUFLEN_MASKTPD_BUFLEN_MASK 0x3FFF atl1e.h 　
24584
 TPD_BUFLEN_SHIFTTPD_BUFLEN_SHIFT 0 atl1e.h 　
24585
 TPD_EOP_MASKTPD_EOP_MASK 0x0001 atl1e.h 　
24586
 TPD_EOP_SHIFTTPD_EOP_SHIFT 0 atl1e.h 　
24587
 MAX_TX_BUF_LENMAX_TX_BUF_LEN 0x2000 atl1e.h 　
24588
 MAX_TX_BUF_SHIFTMAX_TX_BUF_SHIFT 13 atl1e.h 　
24589
 RRS_RX_CSUM_MASKRRS_RX_CSUM_MASK 0xFFFF atl1e.h 　
24590
 RRS_RX_CSUM_SHIFTRRS_RX_CSUM_SHIFT 0 atl1e.h 　
24591
 RRS_PKT_SIZE_MASKRRS_PKT_SIZE_MASK 0x3FFF atl1e.h 　
24592
 RRS_PKT_SIZE_SHIFTRRS_PKT_SIZE_SHIFT 16 atl1e.h 　
24593
 RRS_CPU_NUM_MASKRRS_CPU_NUM_MASK 0x0003 atl1e.h 　
24594
 RRS_CPU_NUM_SHIFTRRS_CPU_NUM_SHIFT 30 atl1e.h 　
24595
 RRS_IS_RSS_IPV4RRS_IS_RSS_IPV4 0x0001 atl1e.h 　
24596
 RRS_IS_RSS_IPV4_TCPRRS_IS_RSS_IPV4_TCP 0x0002 atl1e.h 　
24597
 RRS_IS_RSS_IPV6RRS_IS_RSS_IPV6 0x0004 atl1e.h 　
24598
 RRS_IS_RSS_IPV6_TCPRRS_IS_RSS_IPV6_TCP 0x0008 atl1e.h 　
24599
 RRS_IS_IPV6RRS_IS_IPV6 0x0010 atl1e.h 　
24600
 RRS_IS_IP_FRAGRRS_IS_IP_FRAG 0x0020 atl1e.h 　
24601
 RRS_IS_IP_DFRRS_IS_IP_DF 0x0040 atl1e.h 　
24602
 RRS_IS_802_3RRS_IS_802_3 0x0080 atl1e.h 　
24603
 RRS_IS_VLAN_TAGRRS_IS_VLAN_TAG 0x0100 atl1e.h 　
24604
 RRS_IS_ERR_FRAMERRS_IS_ERR_FRAME 0x0200 atl1e.h 　
24605
 RRS_IS_IPV4RRS_IS_IPV4 0x0400 atl1e.h 　
24606
 RRS_IS_UDPRRS_IS_UDP 0x0800 atl1e.h 　
24607
 RRS_IS_TCPRRS_IS_TCP 0x1000 atl1e.h 　
24608
 RRS_IS_BCASTRRS_IS_BCAST 0x2000 atl1e.h 　
24609
 RRS_IS_MCASTRRS_IS_MCAST 0x4000 atl1e.h 　
24610
 RRS_IS_PAUSERRS_IS_PAUSE 0x8000 atl1e.h 　
24611
 RRS_ERR_BAD_CRCRRS_ERR_BAD_CRC 0x0001 atl1e.h 　
24612
 RRS_ERR_CODERRS_ERR_CODE 0x0002 atl1e.h 　
24613
 RRS_ERR_DRIBBLERRS_ERR_DRIBBLE 0x0004 atl1e.h 　
24614
 RRS_ERR_RUNTRRS_ERR_RUNT 0x0008 atl1e.h 　
24615
 RRS_ERR_RX_OVERFLOWRRS_ERR_RX_OVERFLOW 0x0010 atl1e.h 　
24616
 RRS_ERR_TRUNCRRS_ERR_TRUNC 0x0020 atl1e.h 　
24617
 RRS_ERR_IP_CSUMRRS_ERR_IP_CSUM 0x0040 atl1e.h 　
24618
 RRS_ERR_L4_CSUMRRS_ERR_L4_CSUM 0x0080 atl1e.h 　
24619
 RRS_ERR_LENGTHRRS_ERR_LENGTH 0x0100 atl1e.h 　
24620
 RRS_ERR_DES_ADDRRRS_ERR_DES_ADDR 0x0200 atl1e.h 　
24621
 REG_PM_CTRLSTATREG_PM_CTRLSTAT 0x44 atl1e.h 　
24622
 REG_PCIE_CAP_LISTREG_PCIE_CAP_LIST 0x58 atl1e.h 　
24623
 REG_DEVICE_CAPREG_DEVICE_CAP 0x5C atl1e.h 　
24624
 DEVICE_CAP_MAX_PAYLOAD_MASKDEVICE_CAP_MAX_PAYLOAD_MASK 0x7 atl1e.h 　
24625
 DEVICE_CAP_MAX_PAYLOAD_SHIFTDEVICE_CAP_MAX_PAYLOAD_SHIFT 0 atl1e.h 　
24626
 REG_DEVICE_CTRLREG_DEVICE_CTRL 0x60 atl1e.h 　
24627
 DEVICE_CTRL_MAX_PAYLOAD_MASKDEVICE_CTRL_MAX_PAYLOAD_MASK 0x7 atl1e.h 　
24628
 DEVICE_CTRL_MAX_PAYLOAD_SHIFTDEVICE_CTRL_MAX_PAYLOAD_SHIFT 5 atl1e.h 　
24629
 DEVICE_CTRL_MAX_RREQ_SZ_MASKDEVICE_CTRL_MAX_RREQ_SZ_MASK 0x7 atl1e.h 　
24630
 DEVICE_CTRL_MAX_RREQ_SZ_SHIFTDEVICE_CTRL_MAX_RREQ_SZ_SHIFT 12 atl1e.h 　
24631
 REG_VPD_CAPREG_VPD_CAP 0x6C atl1e.h 　
24632
 VPD_CAP_ID_MASKVPD_CAP_ID_MASK 0xff atl1e.h 　
24633
 VPD_CAP_ID_SHIFTVPD_CAP_ID_SHIFT 0 atl1e.h 　
24634
 VPD_CAP_NEXT_PTR_MASKVPD_CAP_NEXT_PTR_MASK 0xFF atl1e.h 　
24635
 VPD_CAP_NEXT_PTR_SHIFTVPD_CAP_NEXT_PTR_SHIFT 8 atl1e.h 　
24636
 VPD_CAP_VPD_ADDR_MASKVPD_CAP_VPD_ADDR_MASK 0x7FFF atl1e.h 　
24637
 VPD_CAP_VPD_ADDR_SHIFTVPD_CAP_VPD_ADDR_SHIFT 16 atl1e.h 　
24638
 VPD_CAP_VPD_FLAGVPD_CAP_VPD_FLAG 0x80000000 atl1e.h 　
24639
 REG_VPD_DATAREG_VPD_DATA 0x70 atl1e.h 　
24640
 REG_SPI_FLASH_CTRLREG_SPI_FLASH_CTRL 0x200 atl1e.h 　
24641
 SPI_FLASH_CTRL_STS_NON_RDYSPI_FLASH_CTRL_STS_NON_RDY 0x1 atl1e.h 　
24642
 SPI_FLASH_CTRL_STS_WENSPI_FLASH_CTRL_STS_WEN 0x2 atl1e.h 　
24643
 SPI_FLASH_CTRL_STS_WPENSPI_FLASH_CTRL_STS_WPEN 0x80 atl1e.h 　
24644
 SPI_FLASH_CTRL_DEV_STS_MASKSPI_FLASH_CTRL_DEV_STS_MASK 0xFF atl1e.h 　
24645
 SPI_FLASH_CTRL_DEV_STS_SHIFTSPI_FLASH_CTRL_DEV_STS_SHIFT 0 atl1e.h 　
24646
 SPI_FLASH_CTRL_INS_MASKSPI_FLASH_CTRL_INS_MASK 0x7 atl1e.h 　
24647
 SPI_FLASH_CTRL_INS_SHIFTSPI_FLASH_CTRL_INS_SHIFT 8 atl1e.h 　
24648
 SPI_FLASH_CTRL_STARTSPI_FLASH_CTRL_START 0x800 atl1e.h 　
24649
 SPI_FLASH_CTRL_EN_VPDSPI_FLASH_CTRL_EN_VPD 0x2000 atl1e.h 　
24650
 SPI_FLASH_CTRL_LDSTARTSPI_FLASH_CTRL_LDSTART 0x8000 atl1e.h 　
24651
 SPI_FLASH_CTRL_CS_HI_MASKSPI_FLASH_CTRL_CS_HI_MASK 0x3 atl1e.h 　
24652
 SPI_FLASH_CTRL_CS_HI_SHIFTSPI_FLASH_CTRL_CS_HI_SHIFT 16 atl1e.h 　
24653
 SPI_FLASH_CTRL_CS_HOLD_MASKSPI_FLASH_CTRL_CS_HOLD_MASK 0x3 atl1e.h 　
24654
 SPI_FLASH_CTRL_CS_HOLD_SHIFTSPI_FLASH_CTRL_CS_HOLD_SHIFT 18 atl1e.h 　
24655
 SPI_FLASH_CTRL_CLK_LO_MASKSPI_FLASH_CTRL_CLK_LO_MASK 0x3 atl1e.h 　
24656
 SPI_FLASH_CTRL_CLK_LO_SHIFTSPI_FLASH_CTRL_CLK_LO_SHIFT 20 atl1e.h 　
24657
 SPI_FLASH_CTRL_CLK_HI_MASKSPI_FLASH_CTRL_CLK_HI_MASK 0x3 atl1e.h 　
24658
 SPI_FLASH_CTRL_CLK_HI_SHIFTSPI_FLASH_CTRL_CLK_HI_SHIFT 22 atl1e.h 　
24659
 SPI_FLASH_CTRL_CS_SETUP_MASKSPI_FLASH_CTRL_CS_SETUP_MASK 0x3 atl1e.h 　
24660
 SPI_FLASH_CTRL_CS_SETUP_SHIFTSPI_FLASH_CTRL_CS_SETUP_SHIFT 24 atl1e.h 　
24661
 SPI_FLASH_CTRL_EROM_PGSZ_MASKSPI_FLASH_CTRL_EROM_PGSZ_MASK 0x3 atl1e.h 　
24662
 SPI_FLASH_CTRL_EROM_PGSZ_SHIFTSPI_FLASH_CTRL_EROM_PGSZ_SHIFT 26 atl1e.h 　
24663
 SPI_FLASH_CTRL_WAIT_READYSPI_FLASH_CTRL_WAIT_READY 0x10000000 atl1e.h 　
24664
 REG_SPI_ADDRREG_SPI_ADDR 0x204 atl1e.h 　
24665
 REG_SPI_DATAREG_SPI_DATA 0x208 atl1e.h 　
24666
 REG_SPI_FLASH_CONFIGREG_SPI_FLASH_CONFIG 0x20C atl1e.h 　
24667
 SPI_FLASH_CONFIG_LD_ADDR_MASKSPI_FLASH_CONFIG_LD_ADDR_MASK 0xFFFFFF atl1e.h 　
24668
 SPI_FLASH_CONFIG_LD_ADDR_SHIFTSPI_FLASH_CONFIG_LD_ADDR_SHIFT 0 atl1e.h 　
24669
 SPI_FLASH_CONFIG_VPD_ADDR_MASKSPI_FLASH_CONFIG_VPD_ADDR_MASK 0x3 atl1e.h 　
24670
 SPI_FLASH_CONFIG_VPD_ADDR_SHIFTSPI_FLASH_CONFIG_VPD_ADDR_SHIFT 24 atl1e.h 　
24671
 SPI_FLASH_CONFIG_LD_EXISTSPI_FLASH_CONFIG_LD_EXIST 0x4000000 atl1e.h 　
24672
 REG_SPI_FLASH_OP_PROGRAMREG_SPI_FLASH_OP_PROGRAM 0x210 atl1e.h 　
24673
 REG_SPI_FLASH_OP_SC_ERASEREG_SPI_FLASH_OP_SC_ERASE 0x211 atl1e.h 　
24674
 REG_SPI_FLASH_OP_CHIP_ERASEREG_SPI_FLASH_OP_CHIP_ERASE 0x212 atl1e.h 　
24675
 REG_SPI_FLASH_OP_RDIDREG_SPI_FLASH_OP_RDID 0x213 atl1e.h 　
24676
 REG_SPI_FLASH_OP_WRENREG_SPI_FLASH_OP_WREN 0x214 atl1e.h 　
24677
 REG_SPI_FLASH_OP_RDSRREG_SPI_FLASH_OP_RDSR 0x215 atl1e.h 　
24678
 REG_SPI_FLASH_OP_WRSRREG_SPI_FLASH_OP_WRSR 0x216 atl1e.h 　
24679
 REG_SPI_FLASH_OP_READREG_SPI_FLASH_OP_READ 0x217 atl1e.h 　
24680
 REG_TWSI_CTRLREG_TWSI_CTRL 0x218 atl1e.h 　
24681
 TWSI_CTRL_LD_OFFSET_MASKTWSI_CTRL_LD_OFFSET_MASK 0xFF atl1e.h 　
24682
 TWSI_CTRL_LD_OFFSET_SHIFTTWSI_CTRL_LD_OFFSET_SHIFT 0 atl1e.h 　
24683
 TWSI_CTRL_LD_SLV_ADDR_MASKTWSI_CTRL_LD_SLV_ADDR_MASK 0x7 atl1e.h 　
24684
 TWSI_CTRL_LD_SLV_ADDR_SHIFTTWSI_CTRL_LD_SLV_ADDR_SHIFT 8 atl1e.h 　
24685
 TWSI_CTRL_SW_LDSTARTTWSI_CTRL_SW_LDSTART 0x800 atl1e.h 　
24686
 TWSI_CTRL_HW_LDSTARTTWSI_CTRL_HW_LDSTART 0x1000 atl1e.h 　
24687
 TWSI_CTRL_SMB_SLV_ADDR_MASKTWSI_CTRL_SMB_SLV_ADDR_MASK 0x0x7F atl1e.h 　
24688
 TWSI_CTRL_SMB_SLV_ADDR_SHIFTTWSI_CTRL_SMB_SLV_ADDR_SHIFT 15 atl1e.h 　
24689
 TWSI_CTRL_LD_EXISTTWSI_CTRL_LD_EXIST 0x400000 atl1e.h 　
24690
 TWSI_CTRL_READ_FREQ_SEL_MASKTWSI_CTRL_READ_FREQ_SEL_MASK 0x3 atl1e.h 　
24691
 TWSI_CTRL_READ_FREQ_SEL_SHIFTTWSI_CTRL_READ_FREQ_SEL_SHIFT 23 atl1e.h 　
24692
 TWSI_CTRL_FREQ_SEL_100KTWSI_CTRL_FREQ_SEL_100K 0 atl1e.h 　
24693
 TWSI_CTRL_FREQ_SEL_200KTWSI_CTRL_FREQ_SEL_200K 1 atl1e.h 　
24694
 TWSI_CTRL_FREQ_SEL_300KTWSI_CTRL_FREQ_SEL_300K 2 atl1e.h 　
24695
 TWSI_CTRL_FREQ_SEL_400KTWSI_CTRL_FREQ_SEL_400K 3 atl1e.h 　
24696
 TWSI_CTRL_WRITE_FREQ_SEL_MASKTWSI_CTRL_WRITE_FREQ_SEL_MASK 0x3 atl1e.h 　
24697
 TWSI_CTRL_WRITE_FREQ_SEL_SHIFTTWSI_CTRL_WRITE_FREQ_SEL_SHIFT 24 atl1e.h 　
24698
 REG_PCIE_DEV_MISC_CTRLREG_PCIE_DEV_MISC_CTRL 0x21C atl1e.h 　
24699
 PCIE_DEV_MISC_CTRL_EXT_PIPEPCIE_DEV_MISC_CTRL_EXT_PIPE 0x2 atl1e.h 　
24700
 PCIE_DEV_MISC_CTRL_RETRY_BUFDISPCIE_DEV_MISC_CTRL_RETRY_BUFDIS 0x1 atl1e.h 　
24701
 PCIE_DEV_MISC_CTRL_SPIROM_EXISTPCIE_DEV_MISC_CTRL_SPIROM_EXIST 0x4 atl1e.h 　
24702
 PCIE_DEV_MISC_CTRL_SERDES_ENDIAPCIE_DEV_MISC_CTRL_SERDES_ENDIA 0x8 atl1e.h 　
24703
 PCIE_DEV_MISC_CTRL_SERDES_SEL_DPCIE_DEV_MISC_CTRL_SERDES_SEL_D 0x10 atl1e.h 　
24704
 REG_PCIE_PHYMISCREG_PCIE_PHYMISC 0x1000 atl1e.h 　
24705
 PCIE_PHYMISC_FORCE_RCV_DETPCIE_PHYMISC_FORCE_RCV_DET 0x4 atl1e.h 　
24706
 REG_LTSSM_TEST_MODEREG_LTSSM_TEST_MODE 0x12FC atl1e.h 　
24707
 LTSSM_TEST_MODE_DEFLTSSM_TEST_MODE_DEF 0xE000 atl1e.h 　
24708
 REG_MASTER_CTRLREG_MASTER_CTRL 0x1400 atl1e.h 　
24709
 MASTER_CTRL_SOFT_RSTMASTER_CTRL_SOFT_RST 0x1 atl1e.h 　
24710
 MASTER_CTRL_MTIMER_ENMASTER_CTRL_MTIMER_EN 0x2 atl1e.h 　
24711
 MASTER_CTRL_ITIMER_ENMASTER_CTRL_ITIMER_EN 0x4 atl1e.h 　
24712
 MASTER_CTRL_MANUAL_INTMASTER_CTRL_MANUAL_INT 0x8 atl1e.h 　
24713
 MASTER_CTRL_ITIMER2_ENMASTER_CTRL_ITIMER2_EN 0x20 atl1e.h 　
24714
 MASTER_CTRL_INT_RDCLRMASTER_CTRL_INT_RDCLR 0x40 atl1e.h 　
24715
 MASTER_CTRL_LED_MODEMASTER_CTRL_LED_MODE 0x200 atl1e.h 　
24716
 MASTER_CTRL_REV_NUM_SHIFTMASTER_CTRL_REV_NUM_SHIFT 16 atl1e.h 　
24717
 MASTER_CTRL_REV_NUM_MASKMASTER_CTRL_REV_NUM_MASK 0xff atl1e.h 　
24718
 MASTER_CTRL_DEV_ID_SHIFTMASTER_CTRL_DEV_ID_SHIFT 24 atl1e.h 　
24719
 MASTER_CTRL_DEV_ID_MASKMASTER_CTRL_DEV_ID_MASK 0xff atl1e.h 　
24720
 REG_MANUAL_TIMER_INITREG_MANUAL_TIMER_INIT 0x1404 atl1e.h 　
24721
 REG_IRQ_MODU_TIMER_INITREG_IRQ_MODU_TIMER_INIT 0x1408 atl1e.h w
24722
 REG_IRQ_MODU_TIMER2_INITREG_IRQ_MODU_TIMER2_INIT 0x140A atl1e.h w
24723
 REG_GPHY_CTRLREG_GPHY_CTRL 0x140C atl1e.h 　
24724
 GPHY_CTRL_EXT_RESETGPHY_CTRL_EXT_RESET 1 atl1e.h 　
24725
 GPHY_CTRL_PIPE_MODGPHY_CTRL_PIPE_MOD 2 atl1e.h 　
24726
 GPHY_CTRL_TEST_MODE_MASKGPHY_CTRL_TEST_MODE_MASK 3 atl1e.h 　
24727
 GPHY_CTRL_TEST_MODE_SHIFTGPHY_CTRL_TEST_MODE_SHIFT 2 atl1e.h 　
24728
 GPHY_CTRL_BERT_STARTGPHY_CTRL_BERT_START 0x10 atl1e.h 　
24729
 GPHY_CTRL_GATE_25M_ENGPHY_CTRL_GATE_25M_EN 0x20 atl1e.h 　
24730
 GPHY_CTRL_LPW_EXITGPHY_CTRL_LPW_EXIT 0x40 atl1e.h 　
24731
 GPHY_CTRL_PHY_IDDQGPHY_CTRL_PHY_IDDQ 0x80 atl1e.h 　
24732
 GPHY_CTRL_PHY_IDDQ_DISGPHY_CTRL_PHY_IDDQ_DIS 0x100 atl1e.h 　
24733
 GPHY_CTRL_PCLK_SEL_DISGPHY_CTRL_PCLK_SEL_DIS 0x200 atl1e.h 　
24734
 GPHY_CTRL_HIB_ENGPHY_CTRL_HIB_EN 0x400 atl1e.h 　
24735
 GPHY_CTRL_HIB_PULSEGPHY_CTRL_HIB_PULSE 0x800 atl1e.h 　
24736
 GPHY_CTRL_SEL_ANA_RSTGPHY_CTRL_SEL_ANA_RST 0x1000 atl1e.h 　
24737
 GPHY_CTRL_PHY_PLL_ONGPHY_CTRL_PHY_PLL_ON 0x2000 atl1e.h 　
24738
 GPHY_CTRL_PWDOWN_HWGPHY_CTRL_PWDOWN_HW 0x4000 atl1e.h 　
24739
 GPHY_CTRL_DEFAULTGPHY_CTRL_DEFAULT (\ GPHY_CTRL_PHY_PLL_ON |\ GPHY_CTRL_SEL_ANA_RST |\ GPHY_CTRL_HIB_PULSE |\ GPHY_CTRL_HIB_EN) atl1e.h 　
24740
 GPHY_CTRL_PW_WOL_DISGPHY_CTRL_PW_WOL_DIS (\ GPHY_CTRL_PHY_PLL_ON |\ GPHY_CTRL_SEL_ANA_RST |\ GPHY_CTRL_HIB_PULSE |\ GPHY_CTRL_HIB_EN |\ GPHY_CTRL_PWDOWN_HW |\ GPHY_CTRL atl1e.h 　
24741
 REG_CMBDISDMA_TIMERREG_CMBDISDMA_TIMER 0x140E atl1e.h 　
24742
 REG_IDLE_STATUSREG_IDLE_STATUS 0x1410 atl1e.h 　
24743
 IDLE_STATUS_RXMACIDLE_STATUS_RXMAC 1 atl1e.h 1: RXMAC state machine is in non-IDLE state. 0: RXMAC is idling
24744
 IDLE_STATUS_TXMACIDLE_STATUS_TXMAC 2 atl1e.h 1: TXMAC state machine is in non-IDLE state. 0: TXMAC is idling
24745
 IDLE_STATUS_RXQIDLE_STATUS_RXQ 4 atl1e.h 1: RXQ state machine is in non-IDLE state. 0: RXQ is idling
24746
 IDLE_STATUS_TXQIDLE_STATUS_TXQ 8 atl1e.h 1: TXQ state machine is in non-IDLE state. 0: TXQ is idling
24747
 IDLE_STATUS_DMARIDLE_STATUS_DMAR 0x10 atl1e.h 1: DMAR state machine is in non-IDLE state. 0: DMAR is idling
24748
 IDLE_STATUS_DMAWIDLE_STATUS_DMAW 0x20 atl1e.h 1: DMAW state machine is in non-IDLE state. 0: DMAW is idling
24749
 IDLE_STATUS_SMBIDLE_STATUS_SMB 0x40 atl1e.h 1: SMB state machine is in non-IDLE state. 0: SMB is idling
24750
 IDLE_STATUS_CMBIDLE_STATUS_CMB 0x80 atl1e.h 1: CMB state machine is in non-IDLE state. 0: CMB is idling
24751
 REG_MDIO_CTRLREG_MDIO_CTRL 0x1414 atl1e.h 　
24752
 MDIO_DATA_MASKMDIO_DATA_MASK 0xffff atl1e.h On MDIO write, the 16-bit control data to write to PHY MII management register
24753
 MDIO_DATA_SHIFTMDIO_DATA_SHIFT 0 atl1e.h On MDIO read, the 16-bit status data that was read from the PHY MII management register
24754
 MDIO_REG_ADDR_MASKMDIO_REG_ADDR_MASK 0x1f atl1e.h MDIO register address
24755
 MDIO_REG_ADDR_SHIFTMDIO_REG_ADDR_SHIFT 16 atl1e.h 　
24756
 MDIO_RWMDIO_RW 0x200000 atl1e.h 1: read, 0: write
24757
 MDIO_SUP_PREAMBLEMDIO_SUP_PREAMBLE 0x400000 atl1e.h Suppress preamble
24758
 MDIO_STARTMDIO_START 0x800000 atl1e.h Write 1 to initiate the MDIO master. And this bit is self cleared after one cycle
24759
 MDIO_CLK_SEL_SHIFTMDIO_CLK_SEL_SHIFT 24 atl1e.h 　
24760
 MDIO_CLK_25_4MDIO_CLK_25_4 0 atl1e.h 　
24761
 MDIO_CLK_25_6MDIO_CLK_25_6 2 atl1e.h 　
24762
 MDIO_CLK_25_8MDIO_CLK_25_8 3 atl1e.h 　
24763
 MDIO_CLK_25_10MDIO_CLK_25_10 4 atl1e.h 　
24764
 MDIO_CLK_25_14MDIO_CLK_25_14 5 atl1e.h 　
24765
 MDIO_CLK_25_20MDIO_CLK_25_20 6 atl1e.h 　
24766
 MDIO_CLK_25_28MDIO_CLK_25_28 7 atl1e.h 　
24767
 MDIO_BUSYMDIO_BUSY 0x8000000 atl1e.h 　
24768
 MDIO_AP_ENMDIO_AP_EN 0x10000000 atl1e.h 　
24769
 MDIO_WAIT_TIMESMDIO_WAIT_TIMES 10 atl1e.h 　
24770
 REG_PHY_STATUSREG_PHY_STATUS 0x1418 atl1e.h 　
24771
 PHY_STATUS_100MPHY_STATUS_100M 0x20000 atl1e.h 　
24772
 PHY_STATUS_EMI_CAPHY_STATUS_EMI_CA 0x40000 atl1e.h 　
24773
 REG_BIST0_CTRLREG_BIST0_CTRL 0x141c atl1e.h 　
24774
 BIST0_NOWBIST0_NOW 0x1 atl1e.h 1: To trigger BIST0 logic. This bit stays high during the
24775
 BIST0_SRAM_FAILBIST0_SRAM_FAIL 0x2 atl1e.h 1: The SRAM failure is un-repairable because it has address
24776
 BIST0_FUSE_FLAGBIST0_FUSE_FLAG 0x4 atl1e.h 1: Indicating one cell has been fixed
24777
 REG_BIST1_CTRLREG_BIST1_CTRL 0x1420 atl1e.h 　
24778
 BIST1_NOWBIST1_NOW 0x1 atl1e.h 1: To trigger BIST0 logic. This bit stays high during the
24779
 BIST1_SRAM_FAILBIST1_SRAM_FAIL 0x2 atl1e.h 1: The SRAM failure is un-repairable because it has address
24780
 BIST1_FUSE_FLAGBIST1_FUSE_FLAG 0x4 atl1e.h 　
24781
 REG_SERDES_LOCKREG_SERDES_LOCK 0x1424 atl1e.h 　
24782
 SERDES_LOCK_DETECTSERDES_LOCK_DETECT 1 atl1e.h 1: SerDes lock detected . This signal comes from Analog SerDes
24783
 SERDES_LOCK_DETECT_ENSERDES_LOCK_DETECT_EN 2 atl1e.h 1: Enable SerDes Lock detect function
24784
 REG_MAC_CTRLREG_MAC_CTRL 0x1480 atl1e.h 　
24785
 MAC_CTRL_TX_ENMAC_CTRL_TX_EN 1 atl1e.h 1: Transmit Enable
24786
 MAC_CTRL_RX_ENMAC_CTRL_RX_EN 2 atl1e.h 1: Receive Enable
24787
 MAC_CTRL_TX_FLOWMAC_CTRL_TX_FLOW 4 atl1e.h 1: Transmit Flow Control Enable
24788
 MAC_CTRL_RX_FLOWMAC_CTRL_RX_FLOW 8 atl1e.h 1: Receive Flow Control Enable
24789
 MAC_CTRL_LOOPBACKMAC_CTRL_LOOPBACK 0x10 atl1e.h 1: Loop back at G/MII Interface
24790
 MAC_CTRL_DUPLXMAC_CTRL_DUPLX 0x20 atl1e.h 1: Full-duplex mode 0: Half-duplex mode
24791
 MAC_CTRL_ADD_CRCMAC_CTRL_ADD_CRC 0x40 atl1e.h 1: Instruct MAC to attach CRC on all egress Ethernet frames
24792
 MAC_CTRL_PADMAC_CTRL_PAD 0x80 atl1e.h 1: Instruct MAC to pad short frames to 60-bytes, and then attach CRC. This bit has higher priority over CRC_EN
24793
 MAC_CTRL_LENCHKMAC_CTRL_LENCHK 0x100 atl1e.h 1: Instruct MAC to check if length field matches the real packet length
24794
 MAC_CTRL_HUGE_ENMAC_CTRL_HUGE_EN 0x200 atl1e.h 1: receive Jumbo frame enable
24795
 MAC_CTRL_PRMLEN_SHIFTMAC_CTRL_PRMLEN_SHIFT 10 atl1e.h Preamble length
24796
 MAC_CTRL_PRMLEN_MASKMAC_CTRL_PRMLEN_MASK 0xf atl1e.h 　
24797
 MAC_CTRL_RMV_VLANMAC_CTRL_RMV_VLAN 0x4000 atl1e.h 1: to remove VLAN Tag automatically from all receive packets
24798
 MAC_CTRL_PROMIS_ENMAC_CTRL_PROMIS_EN 0x8000 atl1e.h 1: Promiscuous Mode Enable
24799
 MAC_CTRL_TX_PAUSEMAC_CTRL_TX_PAUSE 0x10000 atl1e.h 1: transmit test pause
24800
 MAC_CTRL_SCNTMAC_CTRL_SCNT 0x20000 atl1e.h 1: shortcut slot time counter
24801
 MAC_CTRL_SRST_TXMAC_CTRL_SRST_TX 0x40000 atl1e.h 1: synchronized reset Transmit MAC module
24802
 MAC_CTRL_TX_SIMURSTMAC_CTRL_TX_SIMURST 0x80000 atl1e.h 1: transmit simulation reset
24803
 MAC_CTRL_SPEED_SHIFTMAC_CTRL_SPEED_SHIFT 20 atl1e.h 10: gigabit 01:10M/100M
24804
 MAC_CTRL_SPEED_MASKMAC_CTRL_SPEED_MASK 0x300000 atl1e.h 　
24805
 MAC_CTRL_SPEED_1000MAC_CTRL_SPEED_1000 2 atl1e.h 　
24806
 MAC_CTRL_SPEED_10_100MAC_CTRL_SPEED_10_100 1 atl1e.h 　
24807
 MAC_CTRL_DBG_TX_BKPRESUREMAC_CTRL_DBG_TX_BKPRESURE 0x400000 atl1e.h 1: transmit maximum backoff (half-duplex test bit)
24808
 MAC_CTRL_TX_HUGEMAC_CTRL_TX_HUGE 0x800000 atl1e.h 1: transmit huge enable
24809
 MAC_CTRL_RX_CHKSUM_ENMAC_CTRL_RX_CHKSUM_EN 0x1000000 atl1e.h 1: RX checksum enable
24810
 MAC_CTRL_MC_ALL_ENMAC_CTRL_MC_ALL_EN 0x2000000 atl1e.h 1: upload all multicast frame without error to system
24811
 MAC_CTRL_BC_ENMAC_CTRL_BC_EN 0x4000000 atl1e.h 1: upload all broadcast frame without error to system
24812
 MAC_CTRL_DBGMAC_CTRL_DBG 0x8000000 atl1e.h 1: upload all received frame to system (Debug Mode)
24813
 REG_MAC_IPG_IFGREG_MAC_IPG_IFG 0x1484 atl1e.h 　
24814
 MAC_IPG_IFG_IPGT_SHIFTMAC_IPG_IFG_IPGT_SHIFT 0 atl1e.h Desired back to back inter-packet gap. The default is 96-bit time
24815
 MAC_IPG_IFG_IPGT_MASKMAC_IPG_IFG_IPGT_MASK 0x7f atl1e.h 　
24816
 MAC_IPG_IFG_MIFG_SHIFTMAC_IPG_IFG_MIFG_SHIFT 8 atl1e.h Minimum number of IFG to enforce in between RX frames
24817
 MAC_IPG_IFG_MIFG_MASKMAC_IPG_IFG_MIFG_MASK 0xff atl1e.h Frame gap below such IFP is dropped
24818
 MAC_IPG_IFG_IPGR1_SHIFTMAC_IPG_IFG_IPGR1_SHIFT 16 atl1e.h 64bit Carrier-Sense window
24819
 MAC_IPG_IFG_IPGR1_MASKMAC_IPG_IFG_IPGR1_MASK 0x7f atl1e.h 　
24820
 MAC_IPG_IFG_IPGR2_SHIFTMAC_IPG_IFG_IPGR2_SHIFT 24 atl1e.h 96-bit IPG window
24821
 MAC_IPG_IFG_IPGR2_MASKMAC_IPG_IFG_IPGR2_MASK 0x7f atl1e.h 　
24822
 REG_MAC_STA_ADDRREG_MAC_STA_ADDR 0x1488 atl1e.h 　
24823
 REG_RX_HASH_TABLEREG_RX_HASH_TABLE 0x1490 atl1e.h 　
24824
 REG_MAC_HALF_DUPLX_CTRLREG_MAC_HALF_DUPLX_CTRL 0x1498 atl1e.h 　
24825
 MAC_HALF_DUPLX_CTRL_LCOL_SHIFTMAC_HALF_DUPLX_CTRL_LCOL_SHIFT 0 atl1e.h Collision Window
24826
 MAC_HALF_DUPLX_CTRL_LCOL_MASKMAC_HALF_DUPLX_CTRL_LCOL_MASK 0x3ff atl1e.h 　
24827
 MAC_HALF_DUPLX_CTRL_RETRY_SHIFTMAC_HALF_DUPLX_CTRL_RETRY_SHIFT 12 atl1e.h Retransmission maximum, afterwards the packet will be discarded
24828
 MAC_HALF_DUPLX_CTRL_RETRY_MASKMAC_HALF_DUPLX_CTRL_RETRY_MASK 0xf atl1e.h 　
24829
 MAC_HALF_DUPLX_CTRL_EXC_DEF_ENMAC_HALF_DUPLX_CTRL_EXC_DEF_EN 0x10000 atl1e.h 1: Allow the transmission of a packet which has been excessively deferred
24830
 MAC_HALF_DUPLX_CTRL_NO_BACK_CMAC_HALF_DUPLX_CTRL_NO_BACK_C 0x20000 atl1e.h 1: No back-off on collision, immediately start the retransmission
24831
 MAC_HALF_DUPLX_CTRL_NO_BACK_PMAC_HALF_DUPLX_CTRL_NO_BACK_P 0x40000 atl1e.h 1: No back-off on backpressure, immediately start the transmission after back pressure
24832
 MAC_HALF_DUPLX_CTRL_ABEBEMAC_HALF_DUPLX_CTRL_ABEBE 0x80000 atl1e.h 1: Alternative Binary Exponential Back-off Enabled
24833
 MAC_HALF_DUPLX_CTRL_ABEBT_SHIFTMAC_HALF_DUPLX_CTRL_ABEBT_SHIFT 20 atl1e.h Maximum binary exponential number
24834
 MAC_HALF_DUPLX_CTRL_ABEBT_MASKMAC_HALF_DUPLX_CTRL_ABEBT_MASK 0xf atl1e.h 　
24835
 MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFMAC_HALF_DUPLX_CTRL_JAMIPG_SHIF 24 atl1e.h IPG to start JAM for collision based flow control in half-duplex
24836
 MAC_HALF_DUPLX_CTRL_JAMIPG_MASKMAC_HALF_DUPLX_CTRL_JAMIPG_MASK 0xf atl1e.h mode. In unit of 8-bit time
24837
 REG_MTUREG_MTU 0x149c atl1e.h 　
24838
 REG_WOL_CTRLREG_WOL_CTRL 0x14a0 atl1e.h 　
24839
 WOL_PATTERN_ENWOL_PATTERN_EN 0x00000001 atl1e.h 　
24840
 WOL_PATTERN_PME_ENWOL_PATTERN_PME_EN 0x00000002 atl1e.h 　
24841
 WOL_MAGIC_ENWOL_MAGIC_EN 0x00000004 atl1e.h 　
24842
 WOL_MAGIC_PME_ENWOL_MAGIC_PME_EN 0x00000008 atl1e.h 　
24843
 WOL_LINK_CHG_ENWOL_LINK_CHG_EN 0x00000010 atl1e.h 　
24844
 WOL_LINK_CHG_PME_ENWOL_LINK_CHG_PME_EN 0x00000020 atl1e.h 　
24845
 WOL_PATTERN_STWOL_PATTERN_ST 0x00000100 atl1e.h 　
24846
 WOL_MAGIC_STWOL_MAGIC_ST 0x00000200 atl1e.h 　
24847
 WOL_LINKCHG_STWOL_LINKCHG_ST 0x00000400 atl1e.h 　
24848
 WOL_CLK_SWITCH_ENWOL_CLK_SWITCH_EN 0x00008000 atl1e.h 　
24849
 WOL_PT0_ENWOL_PT0_EN 0x00010000 atl1e.h 　
24850
 WOL_PT1_ENWOL_PT1_EN 0x00020000 atl1e.h 　
24851
 WOL_PT2_ENWOL_PT2_EN 0x00040000 atl1e.h 　
24852
 WOL_PT3_ENWOL_PT3_EN 0x00080000 atl1e.h 　
24853
 WOL_PT4_ENWOL_PT4_EN 0x00100000 atl1e.h 　
24854
 WOL_PT5_ENWOL_PT5_EN 0x00200000 atl1e.h 　
24855
 WOL_PT6_ENWOL_PT6_EN 0x00400000 atl1e.h 　
24856
 REG_WOL_PATTERN_LENREG_WOL_PATTERN_LEN 0x14a4 atl1e.h 　
24857
 WOL_PT_LEN_MASKWOL_PT_LEN_MASK 0x7f atl1e.h 　
24858
 WOL_PT0_LEN_SHIFTWOL_PT0_LEN_SHIFT 0 atl1e.h 　
24859
 WOL_PT1_LEN_SHIFTWOL_PT1_LEN_SHIFT 8 atl1e.h 　
24860
 WOL_PT2_LEN_SHIFTWOL_PT2_LEN_SHIFT 16 atl1e.h 　
24861
 WOL_PT3_LEN_SHIFTWOL_PT3_LEN_SHIFT 24 atl1e.h 　
24862
 WOL_PT4_LEN_SHIFTWOL_PT4_LEN_SHIFT 0 atl1e.h 　
24863
 WOL_PT5_LEN_SHIFTWOL_PT5_LEN_SHIFT 8 atl1e.h 　
24864
 WOL_PT6_LEN_SHIFTWOL_PT6_LEN_SHIFT 16 atl1e.h 　
24865
 REG_SRAM_TRD_ADDRREG_SRAM_TRD_ADDR 0x1518 atl1e.h 　
24866
 REG_SRAM_TRD_LENREG_SRAM_TRD_LEN 0x151C atl1e.h 　
24867
 REG_SRAM_RXF_ADDRREG_SRAM_RXF_ADDR 0x1520 atl1e.h 　
24868
 REG_SRAM_RXF_LENREG_SRAM_RXF_LEN 0x1524 atl1e.h 　
24869
 REG_SRAM_TXF_ADDRREG_SRAM_TXF_ADDR 0x1528 atl1e.h 　
24870
 REG_SRAM_TXF_LENREG_SRAM_TXF_LEN 0x152C atl1e.h 　
24871
 REG_SRAM_TCPH_ADDRREG_SRAM_TCPH_ADDR 0x1530 atl1e.h 　
24872
 REG_SRAM_PKTH_ADDRREG_SRAM_PKTH_ADDR 0x1532 atl1e.h 　
24873
 REG_LOAD_PTRREG_LOAD_PTR 0x1534 atl1e.h Software sets this bit after the initialization of the head and tail
24874
 REG_RXF3_BASE_ADDR_HIREG_RXF3_BASE_ADDR_HI 0x153C atl1e.h 　
24875
 REG_DESC_BASE_ADDR_HIREG_DESC_BASE_ADDR_HI 0x1540 atl1e.h 　
24876
 REG_RXF0_BASE_ADDR_HIREG_RXF0_BASE_ADDR_HI 0x1540 atl1e.h share with DESC BASE ADDR HI
24877
 REG_HOST_RXF0_PAGE0_LOREG_HOST_RXF0_PAGE0_LO 0x1544 atl1e.h 　
24878
 REG_HOST_RXF0_PAGE1_LOREG_HOST_RXF0_PAGE1_LO 0x1548 atl1e.h 　
24879
 REG_TPD_BASE_ADDR_LOREG_TPD_BASE_ADDR_LO 0x154C atl1e.h 　
24880
 REG_RXF1_BASE_ADDR_HIREG_RXF1_BASE_ADDR_HI 0x1550 atl1e.h 　
24881
 REG_RXF2_BASE_ADDR_HIREG_RXF2_BASE_ADDR_HI 0x1554 atl1e.h 　
24882
 REG_HOST_RXFPAGE_SIZEREG_HOST_RXFPAGE_SIZE 0x1558 atl1e.h 　
24883
 REG_TPD_RING_SIZEREG_TPD_RING_SIZE 0x155C atl1e.h 　
24884
 REG_RSS_KEY0REG_RSS_KEY0 0x14B0 atl1e.h 　
24885
 REG_RSS_KEY1REG_RSS_KEY1 0x14B4 atl1e.h 　
24886
 REG_RSS_KEY2REG_RSS_KEY2 0x14B8 atl1e.h 　
24887
 REG_RSS_KEY3REG_RSS_KEY3 0x14BC atl1e.h 　
24888
 REG_RSS_KEY4REG_RSS_KEY4 0x14C0 atl1e.h 　
24889
 REG_RSS_KEY5REG_RSS_KEY5 0x14C4 atl1e.h 　
24890
 REG_RSS_KEY6REG_RSS_KEY6 0x14C8 atl1e.h 　
24891
 REG_RSS_KEY7REG_RSS_KEY7 0x14CC atl1e.h 　
24892
 REG_RSS_KEY8REG_RSS_KEY8 0x14D0 atl1e.h 　
24893
 REG_RSS_KEY9REG_RSS_KEY9 0x14D4 atl1e.h 　
24894
 REG_IDT_TABLE4REG_IDT_TABLE4 0x14E0 atl1e.h 　
24895
 REG_IDT_TABLE5REG_IDT_TABLE5 0x14E4 atl1e.h 　
24896
 REG_IDT_TABLE6REG_IDT_TABLE6 0x14E8 atl1e.h 　
24897
 REG_IDT_TABLE7REG_IDT_TABLE7 0x14EC atl1e.h 　
24898
 REG_IDT_TABLE0REG_IDT_TABLE0 0x1560 atl1e.h 　
24899
 REG_IDT_TABLE1REG_IDT_TABLE1 0x1564 atl1e.h 　
24900
 REG_IDT_TABLE2REG_IDT_TABLE2 0x1568 atl1e.h 　
24901
 REG_IDT_TABLE3REG_IDT_TABLE3 0x156C atl1e.h 　
24902
 REG_IDT_TABLEREG_IDT_TABLE REG_IDT_TABLE0 atl1e.h 　
24903
 REG_RSS_HASH_VALUEREG_RSS_HASH_VALUE 0x1570 atl1e.h 　
24904
 REG_RSS_HASH_FLAGREG_RSS_HASH_FLAG 0x1574 atl1e.h 　
24905
 REG_BASE_CPU_NUMBERREG_BASE_CPU_NUMBER 0x157C atl1e.h 　
24906
 REG_TXQ_CTRLREG_TXQ_CTRL 0x1580 atl1e.h 　
24907
 TXQ_CTRL_NUM_TPD_BURST_MASKTXQ_CTRL_NUM_TPD_BURST_MASK 0xF atl1e.h 　
24908
 TXQ_CTRL_NUM_TPD_BURST_SHIFTTXQ_CTRL_NUM_TPD_BURST_SHIFT 0 atl1e.h 　
24909
 TXQ_CTRL_ENTXQ_CTRL_EN 0x20 atl1e.h 1: Enable TXQ
24910
 TXQ_CTRL_ENH_MODETXQ_CTRL_ENH_MODE 0x40 atl1e.h Performance enhancement mode, in which up to two back-to-back DMA read commands might be dispatched.
24911
 TXQ_CTRL_TXF_BURST_NUM_SHIFTTXQ_CTRL_TXF_BURST_NUM_SHIFT 16 atl1e.h Number of data byte to read in a cache-aligned burst. Each SRAM entry is 8-byte in length.
24912
 TXQ_CTRL_TXF_BURST_NUM_MASKTXQ_CTRL_TXF_BURST_NUM_MASK 0xffff atl1e.h 　
24913
 REG_TX_EARLY_THREG_TX_EARLY_TH 0x1584 atl1e.h Jumbo frame threshold in QWORD unit. Packet greater than
24914
 TX_TX_EARLY_TH_MASKTX_TX_EARLY_TH_MASK 0x7ff atl1e.h 　
24915
 TX_TX_EARLY_TH_SHIFTTX_TX_EARLY_TH_SHIFT 0 atl1e.h 　
24916
 REG_RXQ_CTRLREG_RXQ_CTRL 0x15A0 atl1e.h 　
24917
 RXQ_CTRL_PBA_ALIGN_32RXQ_CTRL_PBA_ALIGN_32 0 atl1e.h rx-packet alignment
24918
 RXQ_CTRL_PBA_ALIGN_64RXQ_CTRL_PBA_ALIGN_64 1 atl1e.h 　
24919
 RXQ_CTRL_PBA_ALIGN_128RXQ_CTRL_PBA_ALIGN_128 2 atl1e.h 　
24920
 RXQ_CTRL_PBA_ALIGN_256RXQ_CTRL_PBA_ALIGN_256 3 atl1e.h 　
24921
 RXQ_CTRL_Q1_ENRXQ_CTRL_Q1_EN 0x10 atl1e.h 　
24922
 RXQ_CTRL_Q2_ENRXQ_CTRL_Q2_EN 0x20 atl1e.h 　
24923
 RXQ_CTRL_Q3_ENRXQ_CTRL_Q3_EN 0x40 atl1e.h 　
24924
 RXQ_CTRL_IPV6_XSUM_VERIFY_ENRXQ_CTRL_IPV6_XSUM_VERIFY_EN 0x80 atl1e.h 　
24925
 RXQ_CTRL_HASH_TLEN_SHIFTRXQ_CTRL_HASH_TLEN_SHIFT 8 atl1e.h 　
24926
 RXQ_CTRL_HASH_TLEN_MASKRXQ_CTRL_HASH_TLEN_MASK 0xFF atl1e.h 　
24927
 RXQ_CTRL_HASH_TYPE_IPV4RXQ_CTRL_HASH_TYPE_IPV4 0x10000 atl1e.h 　
24928
 RXQ_CTRL_HASH_TYPE_IPV4_TCPRXQ_CTRL_HASH_TYPE_IPV4_TCP 0x20000 atl1e.h 　
24929
 RXQ_CTRL_HASH_TYPE_IPV6RXQ_CTRL_HASH_TYPE_IPV6 0x40000 atl1e.h 　
24930
 RXQ_CTRL_HASH_TYPE_IPV6_TCPRXQ_CTRL_HASH_TYPE_IPV6_TCP 0x80000 atl1e.h 　
24931
 RXQ_CTRL_RSS_MODE_DISABLERXQ_CTRL_RSS_MODE_DISABLE 0 atl1e.h 　
24932
 RXQ_CTRL_RSS_MODE_SQSINTRXQ_CTRL_RSS_MODE_SQSINT 0x4000000 atl1e.h 　
24933
 RXQ_CTRL_RSS_MODE_MQUESINTRXQ_CTRL_RSS_MODE_MQUESINT 0x8000000 atl1e.h 　
24934
 RXQ_CTRL_RSS_MODE_MQUEMINTRXQ_CTRL_RSS_MODE_MQUEMINT 0xC000000 atl1e.h 　
24935
 RXQ_CTRL_NIP_QUEUE_SEL_TBLRXQ_CTRL_NIP_QUEUE_SEL_TBL 0x10000000 atl1e.h 　
24936
 RXQ_CTRL_HASH_ENABLERXQ_CTRL_HASH_ENABLE 0x20000000 atl1e.h 　
24937
 RXQ_CTRL_CUT_THRU_ENRXQ_CTRL_CUT_THRU_EN 0x40000000 atl1e.h 　
24938
 RXQ_CTRL_ENRXQ_CTRL_EN 0x80000000 atl1e.h 　
24939
 REG_RXQ_JMBOSZ_RRDTIMREG_RXQ_JMBOSZ_RRDTIM 0x15A4 atl1e.h 　
24940
 RXQ_JMBOSZ_TH_MASKRXQ_JMBOSZ_TH_MASK 0x7ff atl1e.h 　
24941
 RXQ_JMBOSZ_TH_SHIFTRXQ_JMBOSZ_TH_SHIFT 0 atl1e.h RRD retirement timer. Decrement by 1 after every 512ns passes
24942
 RXQ_JMBO_LKAH_MASKRXQ_JMBO_LKAH_MASK 0xf atl1e.h 　
24943
 RXQ_JMBO_LKAH_SHIFTRXQ_JMBO_LKAH_SHIFT 11 atl1e.h 　
24944
 REG_RXQ_RXF_PAUSE_THRESHREG_RXQ_RXF_PAUSE_THRESH 0x15A8 atl1e.h 　
24945
 RXQ_RXF_PAUSE_TH_HI_SHIFTRXQ_RXF_PAUSE_TH_HI_SHIFT 0 atl1e.h 　
24946
 RXQ_RXF_PAUSE_TH_HI_MASKRXQ_RXF_PAUSE_TH_HI_MASK 0xfff atl1e.h 　
24947
 RXQ_RXF_PAUSE_TH_LO_SHIFTRXQ_RXF_PAUSE_TH_LO_SHIFT 16 atl1e.h 　
24948
 RXQ_RXF_PAUSE_TH_LO_MASKRXQ_RXF_PAUSE_TH_LO_MASK 0xfff atl1e.h 　
24949
 REG_DMA_CTRLREG_DMA_CTRL 0x15C0 atl1e.h 　
24950
 DMA_CTRL_DMAR_IN_ORDERDMA_CTRL_DMAR_IN_ORDER 0x1 atl1e.h 　
24951
 DMA_CTRL_DMAR_ENH_ORDERDMA_CTRL_DMAR_ENH_ORDER 0x2 atl1e.h 　
24952
 DMA_CTRL_DMAR_OUT_ORDERDMA_CTRL_DMAR_OUT_ORDER 0x4 atl1e.h 　
24953
 DMA_CTRL_RCB_VALUEDMA_CTRL_RCB_VALUE 0x8 atl1e.h 　
24954
 DMA_CTRL_DMAR_BURST_LEN_SHIFTDMA_CTRL_DMAR_BURST_LEN_SHIFT 4 atl1e.h 　
24955
 DMA_CTRL_DMAR_BURST_LEN_MASKDMA_CTRL_DMAR_BURST_LEN_MASK 7 atl1e.h 　
24956
 DMA_CTRL_DMAW_BURST_LEN_SHIFTDMA_CTRL_DMAW_BURST_LEN_SHIFT 7 atl1e.h 　
24957
 DMA_CTRL_DMAW_BURST_LEN_MASKDMA_CTRL_DMAW_BURST_LEN_MASK 7 atl1e.h 　
24958
 DMA_CTRL_DMAR_REQ_PRIDMA_CTRL_DMAR_REQ_PRI 0x400 atl1e.h 　
24959
 DMA_CTRL_DMAR_DLY_CNT_MASKDMA_CTRL_DMAR_DLY_CNT_MASK 0x1F atl1e.h 　
24960
 DMA_CTRL_DMAR_DLY_CNT_SHIFTDMA_CTRL_DMAR_DLY_CNT_SHIFT 11 atl1e.h 　
24961
 DMA_CTRL_DMAW_DLY_CNT_MASKDMA_CTRL_DMAW_DLY_CNT_MASK 0xF atl1e.h 　
24962
 DMA_CTRL_DMAW_DLY_CNT_SHIFTDMA_CTRL_DMAW_DLY_CNT_SHIFT 16 atl1e.h 　
24963
 DMA_CTRL_TXCMB_ENDMA_CTRL_TXCMB_EN 0x100000 atl1e.h 　
24964
 DMA_CTRL_RXCMB_ENDMA_CTRL_RXCMB_EN 0x200000 atl1e.h 　
24965
 REG_SMB_STAT_TIMERREG_SMB_STAT_TIMER 0x15C4 atl1e.h 　
24966
 REG_TRIG_RRD_THRESHREG_TRIG_RRD_THRESH 0x15CA atl1e.h 　
24967
 REG_TRIG_TPD_THRESHREG_TRIG_TPD_THRESH 0x15C8 atl1e.h 　
24968
 REG_TRIG_TXTIMERREG_TRIG_TXTIMER 0x15CC atl1e.h 　
24969
 REG_TRIG_RXTIMERREG_TRIG_RXTIMER 0x15CE atl1e.h 　
24970
 REG_HOST_RXF1_PAGE0_LOREG_HOST_RXF1_PAGE0_LO 0x15D0 atl1e.h 　
24971
 REG_HOST_RXF1_PAGE1_LOREG_HOST_RXF1_PAGE1_LO 0x15D4 atl1e.h 　
24972
 REG_HOST_RXF2_PAGE0_LOREG_HOST_RXF2_PAGE0_LO 0x15D8 atl1e.h 　
24973
 REG_HOST_RXF2_PAGE1_LOREG_HOST_RXF2_PAGE1_LO 0x15DC atl1e.h 　
24974
 REG_HOST_RXF3_PAGE0_LOREG_HOST_RXF3_PAGE0_LO 0x15E0 atl1e.h 　
24975
 REG_HOST_RXF3_PAGE1_LOREG_HOST_RXF3_PAGE1_LO 0x15E4 atl1e.h 　
24976
 REG_MB_RXF1_RADDRREG_MB_RXF1_RADDR 0x15B4 atl1e.h 　
24977
 REG_MB_RXF2_RADDRREG_MB_RXF2_RADDR 0x15B8 atl1e.h 　
24978
 REG_MB_RXF3_RADDRREG_MB_RXF3_RADDR 0x15BC atl1e.h 　
24979
 REG_MB_TPD_PROD_IDXREG_MB_TPD_PROD_IDX 0x15F0 atl1e.h 　
24980
 REG_HOST_RXF0_PAGE0_VLDREG_HOST_RXF0_PAGE0_VLD 0x15F4 atl1e.h 　
24981
 HOST_RXF_VALIDHOST_RXF_VALID 1 atl1e.h 　
24982
 HOST_RXF_PAGENO_SHIFTHOST_RXF_PAGENO_SHIFT 1 atl1e.h 　
24983
 HOST_RXF_PAGENO_MASKHOST_RXF_PAGENO_MASK 0x7F atl1e.h 　
24984
 REG_HOST_RXF0_PAGE1_VLDREG_HOST_RXF0_PAGE1_VLD 0x15F5 atl1e.h 　
24985
 REG_HOST_RXF1_PAGE0_VLDREG_HOST_RXF1_PAGE0_VLD 0x15F6 atl1e.h 　
24986
 REG_HOST_RXF1_PAGE1_VLDREG_HOST_RXF1_PAGE1_VLD 0x15F7 atl1e.h 　
24987
 REG_HOST_RXF2_PAGE0_VLDREG_HOST_RXF2_PAGE0_VLD 0x15F8 atl1e.h 　
24988
 REG_HOST_RXF2_PAGE1_VLDREG_HOST_RXF2_PAGE1_VLD 0x15F9 atl1e.h 　
24989
 REG_HOST_RXF3_PAGE0_VLDREG_HOST_RXF3_PAGE0_VLD 0x15FA atl1e.h 　
24990
 REG_HOST_RXF3_PAGE1_VLDREG_HOST_RXF3_PAGE1_VLD 0x15FB atl1e.h 　
24991
 REG_ISRREG_ISR 0x1600 atl1e.h 　
24992
 ISR_SMBISR_SMB 1 atl1e.h 　
24993
 ISR_TIMERISR_TIMER 2 atl1e.h Interrupt when Timer is counted down to zero
24994
 ISR_MANUALISR_MANUAL 4 atl1e.h 　
24995
 ISR_HW_RXF_OVISR_HW_RXF_OV 8 atl1e.h RXF overflow interrupt
24996
 ISR_HOST_RXF0_OVISR_HOST_RXF0_OV 0x10 atl1e.h 　
24997
 ISR_HOST_RXF1_OVISR_HOST_RXF1_OV 0x20 atl1e.h 　
24998
 ISR_HOST_RXF2_OVISR_HOST_RXF2_OV 0x40 atl1e.h 　
24999
 ISR_HOST_RXF3_OVISR_HOST_RXF3_OV 0x80 atl1e.h 　
25000
 ISR_TXF_UNISR_TXF_UN 0x100 atl1e.h 　
25001
 ISR_RX0_PAGE_FULLISR_RX0_PAGE_FULL 0x200 atl1e.h 　
25002
 ISR_DMAR_TO_RSTISR_DMAR_TO_RST 0x400 atl1e.h 　
25003
 ISR_DMAW_TO_RSTISR_DMAW_TO_RST 0x800 atl1e.h 　
25004
 ISR_GPHYISR_GPHY 0x1000 atl1e.h 　
25005
 ISR_TX_CREDITISR_TX_CREDIT 0x2000 atl1e.h 　
25006
 ISR_GPHY_LPWISR_GPHY_LPW 0x4000 atl1e.h GPHY low power state interrupt
25007
 ISR_RX_PKTISR_RX_PKT 0x10000 atl1e.h One packet received, triggered by RFD
25008
 ISR_TX_PKTISR_TX_PKT 0x20000 atl1e.h One packet transmitted, triggered by TPD
25009
 ISR_TX_DMAISR_TX_DMA 0x40000 atl1e.h 　
25010
 ISR_RX_PKT_1ISR_RX_PKT_1 0x80000 atl1e.h 　
25011
 ISR_RX_PKT_2ISR_RX_PKT_2 0x100000 atl1e.h 　
25012
 ISR_RX_PKT_3ISR_RX_PKT_3 0x200000 atl1e.h 　
25013
 ISR_MAC_RXISR_MAC_RX 0x400000 atl1e.h 　
25014
 ISR_MAC_TXISR_MAC_TX 0x800000 atl1e.h 　
25015
 ISR_UR_DETECTEDISR_UR_DETECTED 0x1000000 atl1e.h 　
25016
 ISR_FERR_DETECTEDISR_FERR_DETECTED 0x2000000 atl1e.h 　
25017
 ISR_NFERR_DETECTEDISR_NFERR_DETECTED 0x4000000 atl1e.h 　
25018
 ISR_CERR_DETECTEDISR_CERR_DETECTED 0x8000000 atl1e.h 　
25019
 ISR_PHY_LINKDOWNISR_PHY_LINKDOWN 0x10000000 atl1e.h 　
25020
 ISR_DIS_INTISR_DIS_INT 0x80000000 atl1e.h 　
25021
 REG_IMRREG_IMR 0x1604 atl1e.h 　
25022
 IMR_NORMAL_MASKIMR_NORMAL_MASK (\ ISR_SMB |\ ISR_TXF_UN |\ ISR_HW_RXF_OV |\ ISR_HOST_RXF0_OV|\ ISR_MANUAL |\ ISR_GPHY |\ ISR_GPHY_L atl1e.h 　
25023
 ISR_TX_EVENTISR_TX_EVENT (ISR_TXF_UN | ISR_TX_PKT) atl1e.h 　
25024
 ISR_RX_EVENTISR_RX_EVENT (ISR_HOST_RXF0_OV | ISR_HW_RXF_OV | ISR_RX_PKT) atl1e.h 　
25025
 REG_MAC_RX_STATUS_BINREG_MAC_RX_STATUS_BIN 0x1700 atl1e.h 　
25026
 REG_MAC_RX_STATUS_ENDREG_MAC_RX_STATUS_END 0x175c atl1e.h 　
25027
 REG_MAC_TX_STATUS_BINREG_MAC_TX_STATUS_BIN 0x1760 atl1e.h 　
25028
 REG_MAC_TX_STATUS_ENDREG_MAC_TX_STATUS_END 0x17c0 atl1e.h 　
25029
 REG_HOST_RXF0_PAGEOFFREG_HOST_RXF0_PAGEOFF 0x1800 atl1e.h 　
25030
 REG_TPD_CONS_IDXREG_TPD_CONS_IDX 0x1804 atl1e.h 　
25031
 REG_HOST_RXF1_PAGEOFFREG_HOST_RXF1_PAGEOFF 0x1808 atl1e.h 　
25032
 REG_HOST_RXF2_PAGEOFFREG_HOST_RXF2_PAGEOFF 0x180C atl1e.h 　
25033
 REG_HOST_RXF3_PAGEOFFREG_HOST_RXF3_PAGEOFF 0x1810 atl1e.h 　
25034
 REG_HOST_RXF0_MB0_LOREG_HOST_RXF0_MB0_LO 0x1820 atl1e.h 　
25035
 REG_HOST_RXF0_MB1_LOREG_HOST_RXF0_MB1_LO 0x1824 atl1e.h 　
25036
 REG_HOST_RXF1_MB0_LOREG_HOST_RXF1_MB0_LO 0x1828 atl1e.h 　
25037
 REG_HOST_RXF1_MB1_LOREG_HOST_RXF1_MB1_LO 0x182C atl1e.h 　
25038
 REG_HOST_RXF2_MB0_LOREG_HOST_RXF2_MB0_LO 0x1830 atl1e.h 　
25039
 REG_HOST_RXF2_MB1_LOREG_HOST_RXF2_MB1_LO 0x1834 atl1e.h 　
25040
 REG_HOST_RXF3_MB0_LOREG_HOST_RXF3_MB0_LO 0x1838 atl1e.h 　
25041
 REG_HOST_RXF3_MB1_LOREG_HOST_RXF3_MB1_LO 0x183C atl1e.h 　
25042
 REG_HOST_TX_CMB_LOREG_HOST_TX_CMB_LO 0x1840 atl1e.h 　
25043
 REG_HOST_SMB_ADDR_LOREG_HOST_SMB_ADDR_LO 0x1844 atl1e.h 　
25044
 REG_DEBUG_DATA0REG_DEBUG_DATA0 0x1900 atl1e.h 　
25045
 REG_DEBUG_DATA1REG_DEBUG_DATA1 0x1904 atl1e.h 　
25046
 MII_BMCRMII_BMCR 0x00 atl1e.h 　
25047
 MII_BMSRMII_BMSR 0x01 atl1e.h 　
25048
 MII_PHYSID1MII_PHYSID1 0x02 atl1e.h 　
25049
 MII_PHYSID2MII_PHYSID2 0x03 atl1e.h 　
25050
 MII_ADVERTISEMII_ADVERTISE 0x04 atl1e.h 　
25051
 MII_LPAMII_LPA 0x05 atl1e.h 　
25052
 MII_EXPANSIONMII_EXPANSION 0x06 atl1e.h 　
25053
 MII_AT001_CRMII_AT001_CR 0x09 atl1e.h 　
25054
 MII_AT001_SRMII_AT001_SR 0x0A atl1e.h 　
25055
 MII_AT001_ESRMII_AT001_ESR 0x0F atl1e.h 　
25056
 MII_AT001_PSCRMII_AT001_PSCR 0x10 atl1e.h 　
25057
 MII_AT001_PSSRMII_AT001_PSSR 0x11 atl1e.h 　
25058
 MII_INT_CTRLMII_INT_CTRL 0x12 atl1e.h 　
25059
 MII_INT_STATUSMII_INT_STATUS 0x13 atl1e.h 　
25060
 MII_SMARTSPEEDMII_SMARTSPEED 0x14 atl1e.h 　
25061
 MII_RERRCOUNTERMII_RERRCOUNTER 0x15 atl1e.h 　
25062
 MII_SREVISIONMII_SREVISION 0x16 atl1e.h 　
25063
 MII_RESV1MII_RESV1 0x17 atl1e.h 　
25064
 MII_LBRERRORMII_LBRERROR 0x18 atl1e.h 　
25065
 MII_PHYADDRMII_PHYADDR 0x19 atl1e.h 　
25066
 MII_RESV2MII_RESV2 0x1a atl1e.h 　
25067
 MII_TPISTATUSMII_TPISTATUS 0x1b atl1e.h 　
25068
 MII_NCONFIGMII_NCONFIG 0x1c atl1e.h 　
25069
 MII_DBG_ADDRMII_DBG_ADDR 0x1D atl1e.h 　
25070
 MII_DBG_DATAMII_DBG_DATA 0x1E atl1e.h 　
25071
 MII_CR_SPEED_SELECT_MSBMII_CR_SPEED_SELECT_MSB 0x0040 atl1e.h bits 6,13: 10=1000, 01=100, 00=10
25072
 MII_CR_COLL_TEST_ENABLEMII_CR_COLL_TEST_ENABLE 0x0080 atl1e.h Collision test enable
25073
 MII_CR_FULL_DUPLEXMII_CR_FULL_DUPLEX 0x0100 atl1e.h FDX =1, half duplex =0
25074
 MII_CR_RESTART_AUTO_NEGMII_CR_RESTART_AUTO_NEG 0x0200 atl1e.h Restart auto negotiation
25075
 MII_CR_ISOLATEMII_CR_ISOLATE 0x0400 atl1e.h Isolate PHY from MII
25076
 MII_CR_POWER_DOWNMII_CR_POWER_DOWN 0x0800 atl1e.h Power down
25077
 MII_CR_AUTO_NEG_ENMII_CR_AUTO_NEG_EN 0x1000 atl1e.h Auto Neg Enable
25078
 MII_CR_SPEED_SELECT_LSBMII_CR_SPEED_SELECT_LSB 0x2000 atl1e.h bits 6,13: 10=1000, 01=100, 00=10
25079
 MII_CR_LOOPBACKMII_CR_LOOPBACK 0x4000 atl1e.h 0 = normal, 1 = loopback
25080
 MII_CR_RESETMII_CR_RESET 0x8000 atl1e.h 0 = normal, 1 = PHY reset
25081
 MII_CR_SPEED_MASKMII_CR_SPEED_MASK 0x2040 atl1e.h 　
25082
 MII_CR_SPEED_1000MII_CR_SPEED_1000 0x0040 atl1e.h 　
25083
 MII_CR_SPEED_100MII_CR_SPEED_100 0x2000 atl1e.h 　
25084
 MII_CR_SPEED_10MII_CR_SPEED_10 0x0000 atl1e.h 　
25085
 MII_SR_EXTENDED_CAPSMII_SR_EXTENDED_CAPS 0x0001 atl1e.h Extended register capabilities
25086
 MII_SR_JABBER_DETECTMII_SR_JABBER_DETECT 0x0002 atl1e.h Jabber Detected
25087
 MII_SR_LINK_STATUSMII_SR_LINK_STATUS 0x0004 atl1e.h Link Status 1 = link
25088
 MII_SR_AUTONEG_CAPSMII_SR_AUTONEG_CAPS 0x0008 atl1e.h Auto Neg Capable
25089
 MII_SR_REMOTE_FAULTMII_SR_REMOTE_FAULT 0x0010 atl1e.h Remote Fault Detect
25090
 MII_SR_AUTONEG_COMPLETEMII_SR_AUTONEG_COMPLETE 0x0020 atl1e.h Auto Neg Complete
25091
 MII_SR_PREAMBLE_SUPPRESSMII_SR_PREAMBLE_SUPPRESS 0x0040 atl1e.h Preamble may be suppressed
25092
 MII_SR_EXTENDED_STATUSMII_SR_EXTENDED_STATUS 0x0100 atl1e.h Ext. status info in Reg 0x0F
25093
 MII_SR_100T2_HD_CAPSMII_SR_100T2_HD_CAPS 0x0200 atl1e.h 100T2 Half Duplex Capable
25094
 MII_SR_100T2_FD_CAPSMII_SR_100T2_FD_CAPS 0x0400 atl1e.h 100T2 Full Duplex Capable
25095
 MII_SR_10T_HD_CAPSMII_SR_10T_HD_CAPS 0x0800 atl1e.h 10T Half Duplex Capable
25096
 MII_SR_10T_FD_CAPSMII_SR_10T_FD_CAPS 0x1000 atl1e.h 10T Full Duplex Capable
25097
 MII_SR_100X_HD_CAPSMII_SR_100X_HD_CAPS 0x2000 atl1e.h 100X Half Duplex Capable
25098
 MII_SR_100X_FD_CAPSMII_SR_100X_FD_CAPS 0x4000 atl1e.h 100X Full Duplex Capable
25099
 MII_SR_100T4_CAPSMII_SR_100T4_CAPS 0x8000 atl1e.h 100T4 Capable
25100
 MII_LPA_SLCTMII_LPA_SLCT 0x001f atl1e.h Same as advertise selector
25101
 MII_LPA_10HALFMII_LPA_10HALF 0x0020 atl1e.h Can do 10mbps half-duplex
25102
 MII_LPA_10FULLMII_LPA_10FULL 0x0040 atl1e.h Can do 10mbps full-duplex
25103
 MII_LPA_100HALFMII_LPA_100HALF 0x0080 atl1e.h Can do 100mbps half-duplex
25104
 MII_LPA_100FULLMII_LPA_100FULL 0x0100 atl1e.h Can do 100mbps full-duplex
25105
 MII_LPA_100BASE4MII_LPA_100BASE4 0x0200 atl1e.h 100BASE-T4
25106
 MII_LPA_PAUSEMII_LPA_PAUSE 0x0400 atl1e.h PAUSE
25107
 MII_LPA_ASYPAUSEMII_LPA_ASYPAUSE 0x0800 atl1e.h Asymmetrical PAUSE
25108
 MII_LPA_RFAULTMII_LPA_RFAULT 0x2000 atl1e.h Link partner faulted
25109
 MII_LPA_LPACKMII_LPA_LPACK 0x4000 atl1e.h Link partner acked us
25110
 MII_LPA_NPAGEMII_LPA_NPAGE 0x8000 atl1e.h Next page bit
25111
 MII_AR_SELECTOR_FIELDMII_AR_SELECTOR_FIELD 0x0001 atl1e.h indicates IEEE 802.3 CSMA/CD
25112
 MII_AR_10T_HD_CAPSMII_AR_10T_HD_CAPS 0x0020 atl1e.h 10T Half Duplex Capable
25113
 MII_AR_10T_FD_CAPSMII_AR_10T_FD_CAPS 0x0040 atl1e.h 10T Full Duplex Capable
25114
 MII_AR_100TX_HD_CAPSMII_AR_100TX_HD_CAPS 0x0080 atl1e.h 100TX Half Duplex Capable
25115
 MII_AR_100TX_FD_CAPSMII_AR_100TX_FD_CAPS 0x0100 atl1e.h 100TX Full Duplex Capable
25116
 MII_AR_100T4_CAPSMII_AR_100T4_CAPS 0x0200 atl1e.h 100T4 Capable
25117
 MII_AR_PAUSEMII_AR_PAUSE 0x0400 atl1e.h Pause operation desired
25118
 MII_AR_ASM_DIRMII_AR_ASM_DIR 0x0800 atl1e.h Asymmetric Pause Direction bit
25119
 MII_AR_REMOTE_FAULTMII_AR_REMOTE_FAULT 0x2000 atl1e.h Remote Fault detected
25120
 MII_AR_NEXT_PAGEMII_AR_NEXT_PAGE 0x8000 atl1e.h Next Page ability supported
25121
 MII_AR_SPEED_MASKMII_AR_SPEED_MASK 0x01E0 atl1e.h 　
25122
 MII_AR_DEFAULT_CAP_MASKMII_AR_DEFAULT_CAP_MASK 0x0DE0 atl1e.h 　
25123
 MII_AT001_CR_1000T_HD_CAPSMII_AT001_CR_1000T_HD_CAPS 0x0100 atl1e.h Advertise 1000T HD capability
25124
 MII_AT001_CR_1000T_FD_CAPSMII_AT001_CR_1000T_FD_CAPS 0x0200 atl1e.h Advertise 1000T FD capability
25125
 MII_AT001_CR_1000T_REPEATER_DTEMII_AT001_CR_1000T_REPEATER_DTE 0x0400 atl1e.h 1=Repeater/switch device port
25126
 MII_AT001_CR_1000T_MS_VALUEMII_AT001_CR_1000T_MS_VALUE 0x0800 atl1e.h 1=Configure PHY as Master
25127
 MII_AT001_CR_1000T_MS_ENABLEMII_AT001_CR_1000T_MS_ENABLE 0x1000 atl1e.h 1=Master/Slave manual config value
25128
 MII_AT001_CR_1000T_TEST_MODE_NOMII_AT001_CR_1000T_TEST_MODE_NO 0x0000 atl1e.h Normal Operation
25129
 MII_AT001_CR_1000T_TEST_MODE_1MII_AT001_CR_1000T_TEST_MODE_1 0x2000 atl1e.h Transmit Waveform test
25130
 MII_AT001_CR_1000T_TEST_MODE_2MII_AT001_CR_1000T_TEST_MODE_2 0x4000 atl1e.h Master Transmit Jitter test
25131
 MII_AT001_CR_1000T_TEST_MODE_3MII_AT001_CR_1000T_TEST_MODE_3 0x6000 atl1e.h Slave Transmit Jitter test
25132
 MII_AT001_CR_1000T_TEST_MODE_4MII_AT001_CR_1000T_TEST_MODE_4 0x8000 atl1e.h Transmitter Distortion test
25133
 MII_AT001_CR_1000T_SPEED_MASKMII_AT001_CR_1000T_SPEED_MASK 0x0300 atl1e.h 　
25134
 MII_AT001_CR_1000T_DEFAULT_CAP_MII_AT001_CR_1000T_DEFAULT_CAP_ 0x0300 atl1e.h 　
25135
 MII_AT001_SR_1000T_LP_HD_CAPSMII_AT001_SR_1000T_LP_HD_CAPS 0x0400 atl1e.h LP is 1000T HD capable
25136
 MII_AT001_SR_1000T_LP_FD_CAPSMII_AT001_SR_1000T_LP_FD_CAPS 0x0800 atl1e.h LP is 1000T FD capable
25137
 MII_AT001_SR_1000T_REMOTE_RX_STMII_AT001_SR_1000T_REMOTE_RX_ST 0x1000 atl1e.h Remote receiver OK
25138
 MII_AT001_SR_1000T_LOCAL_RX_STAMII_AT001_SR_1000T_LOCAL_RX_STA 0x2000 atl1e.h Local receiver OK
25139
 MII_AT001_SR_1000T_MS_CONFIG_REMII_AT001_SR_1000T_MS_CONFIG_RE 0x4000 atl1e.h 1=Local TX is Master, 0=Slave
25140
 MII_AT001_SR_1000T_MS_CONFIG_FAMII_AT001_SR_1000T_MS_CONFIG_FA 0x8000 atl1e.h Master/Slave config fault
25141
 MII_AT001_SR_1000T_REMOTE_RX_STMII_AT001_SR_1000T_REMOTE_RX_ST 12 atl1e.h 　
25142
 MII_AT001_SR_1000T_LOCAL_RX_STAMII_AT001_SR_1000T_LOCAL_RX_STA 13 atl1e.h 　
25143
 MII_AT001_ESR_1000T_HD_CAPSMII_AT001_ESR_1000T_HD_CAPS 0x1000 atl1e.h 1000T HD capable
25144
 MII_AT001_ESR_1000T_FD_CAPSMII_AT001_ESR_1000T_FD_CAPS 0x2000 atl1e.h 1000T FD capable
25145
 MII_AT001_ESR_1000X_HD_CAPSMII_AT001_ESR_1000X_HD_CAPS 0x4000 atl1e.h 1000X HD capable
25146
 MII_AT001_ESR_1000X_FD_CAPSMII_AT001_ESR_1000X_FD_CAPS 0x8000 atl1e.h 1000X FD capable
25147
 MII_AT001_PSCR_JABBER_DISABLEMII_AT001_PSCR_JABBER_DISABLE 0x0001 atl1e.h 1=Jabber Function disabled
25148
 MII_AT001_PSCR_POLARITY_REVERSAMII_AT001_PSCR_POLARITY_REVERSA 0x0002 atl1e.h 1=Polarity Reversal enabled
25149
 MII_AT001_PSCR_SQE_TESTMII_AT001_PSCR_SQE_TEST 0x0004 atl1e.h 1=SQE Test enabled
25150
 MII_AT001_PSCR_MAC_POWERDOWNMII_AT001_PSCR_MAC_POWERDOWN 0x0008 atl1e.h 　
25151
 MII_AT001_PSCR_CLK125_DISABLEMII_AT001_PSCR_CLK125_DISABLE 0x0010 atl1e.h 1=CLK125 low,
25152
 MII_AT001_PSCR_MDI_MANUAL_MODEMII_AT001_PSCR_MDI_MANUAL_MODE 0x0000 atl1e.h MDI Crossover Mode bits 6:5
25153
 MII_AT001_PSCR_MDIX_MANUAL_MODEMII_AT001_PSCR_MDIX_MANUAL_MODE 0x0020 atl1e.h Manual MDIX configuration
25154
 MII_AT001_PSCR_AUTO_X_1000TMII_AT001_PSCR_AUTO_X_1000T 0x0040 atl1e.h 1000BASE-T: Auto crossover,
25155
 MII_AT001_PSCR_AUTO_X_MODEMII_AT001_PSCR_AUTO_X_MODE 0x0060 atl1e.h Auto crossover enabled
25156
 MII_AT001_PSCR_10BT_EXT_DIST_ENMII_AT001_PSCR_10BT_EXT_DIST_EN 0x0080 atl1e.h 　
25157
 MII_AT001_PSCR_MII_5BIT_ENABLEMII_AT001_PSCR_MII_5BIT_ENABLE 0x0100 atl1e.h 　
25158
 MII_AT001_PSCR_SCRAMBLER_DISABLMII_AT001_PSCR_SCRAMBLER_DISABL 0x0200 atl1e.h 1=Scrambler disable
25159
 MII_AT001_PSCR_FORCE_LINK_GOODMII_AT001_PSCR_FORCE_LINK_GOOD 0x0400 atl1e.h 1=Force link good
25160
 MII_AT001_PSCR_ASSERT_CRS_ON_TXMII_AT001_PSCR_ASSERT_CRS_ON_TX 0x0800 atl1e.h 1=Assert CRS on Transmit
25161
 MII_AT001_PSCR_POLARITY_REVERSAMII_AT001_PSCR_POLARITY_REVERSA 1 atl1e.h 　
25162
 MII_AT001_PSCR_AUTO_X_MODE_SHIFMII_AT001_PSCR_AUTO_X_MODE_SHIF 5 atl1e.h 　
25163
 MII_AT001_PSCR_10BT_EXT_DIST_ENMII_AT001_PSCR_10BT_EXT_DIST_EN 7 atl1e.h 　
25164
 MII_AT001_PSSR_SPD_DPLX_RESOLVEMII_AT001_PSSR_SPD_DPLX_RESOLVE 0x0800 atl1e.h 1=Speed & Duplex resolved
25165
 MII_AT001_PSSR_DPLXMII_AT001_PSSR_DPLX 0x2000 atl1e.h 1=Duplex 0=Half Duplex
25166
 MII_AT001_PSSR_SPEEDMII_AT001_PSSR_SPEED 0xC000 atl1e.h Speed, bits 14:15
25167
 MII_AT001_PSSR_10MBSMII_AT001_PSSR_10MBS 0x0000 atl1e.h 00=10Mbs
25168
 MII_AT001_PSSR_100MBSMII_AT001_PSSR_100MBS 0x4000 atl1e.h 01=100Mbs
25169
 MII_AT001_PSSR_1000MBSMII_AT001_PSSR_1000MBS 0x8000 atl1e.h 10=1000Mbs
25170
 B44_DEVCTRLB44_DEVCTRL 0x0000UL b44.h Device Control
25171
 DEVCTRL_MPMDEVCTRL_MPM 0x00000040 b44.h MP PME Enable (B0 only)
25172
 DEVCTRL_PFEDEVCTRL_PFE 0x00000080 b44.h Pattern Filtering Enable
25173
 DEVCTRL_IPPDEVCTRL_IPP 0x00000400 b44.h Internal EPHY Present
25174
 DEVCTRL_EPRDEVCTRL_EPR 0x00008000 b44.h EPHY Reset
25175
 DEVCTRL_PMEDEVCTRL_PME 0x00001000 b44.h PHY Mode Enable
25176
 DEVCTRL_PMCEDEVCTRL_PMCE 0x00002000 b44.h PHY Mode Clocks Enable
25177
 DEVCTRL_PADDRDEVCTRL_PADDR 0x0007c000 b44.h PHY Address
25178
 DEVCTRL_PADDR_SHIFTDEVCTRL_PADDR_SHIFT 18 b44.h 　
25179
 B44_BIST_STATB44_BIST_STAT 0x000CUL b44.h Built-In Self-Test Status
25180
 B44_WKUP_LENB44_WKUP_LEN 0x0010UL b44.h Wakeup Length
25181
 WKUP_LEN_P0_MASKWKUP_LEN_P0_MASK 0x0000007f b44.h Pattern 0
25182
 WKUP_LEN_D0WKUP_LEN_D0 0x00000080 b44.h 　
25183
 WKUP_LEN_P1_MASKWKUP_LEN_P1_MASK 0x00007f00 b44.h Pattern 1
25184
 WKUP_LEN_P1_SHIFTWKUP_LEN_P1_SHIFT 8 b44.h 　
25185
 WKUP_LEN_D1WKUP_LEN_D1 0x00008000 b44.h 　
25186
 WKUP_LEN_P2_MASKWKUP_LEN_P2_MASK 0x007f0000 b44.h Pattern 2
25187
 WKUP_LEN_P2_SHIFTWKUP_LEN_P2_SHIFT 16 b44.h 　
25188
 WKUP_LEN_D2WKUP_LEN_D2 0x00000000 b44.h 　
25189
 WKUP_LEN_P3_MASKWKUP_LEN_P3_MASK 0x7f000000 b44.h Pattern 3
25190
 WKUP_LEN_P3_SHIFTWKUP_LEN_P3_SHIFT 24 b44.h 　
25191
 WKUP_LEN_D3WKUP_LEN_D3 0x80000000 b44.h 　
25192
 WKUP_LEN_DISABLEWKUP_LEN_DISABLE 0x80808080 b44.h 　
25193
 WKUP_LEN_ENABLE_TWOWKUP_LEN_ENABLE_TWO 0x80800000 b44.h 　
25194
 WKUP_LEN_ENABLE_THREEWKUP_LEN_ENABLE_THREE 0x80000000 b44.h 　
25195
 B44_ISTATB44_ISTAT 0x0020UL b44.h Interrupt Status
25196
 ISTAT_LSISTAT_LS 0x00000020 b44.h Link Change (B0 only)
25197
 ISTAT_PMEISTAT_PME 0x00000040 b44.h Power Management Event
25198
 ISTAT_TOISTAT_TO 0x00000080 b44.h General Purpose Timeout
25199
 ISTAT_DSCEISTAT_DSCE 0x00000400 b44.h Descriptor Error
25200
 ISTAT_DATAEISTAT_DATAE 0x00000800 b44.h Data Error
25201
 ISTAT_DPEISTAT_DPE 0x00001000 b44.h Descr. Protocol Error
25202
 ISTAT_RDUISTAT_RDU 0x00002000 b44.h Receive Descr. Underflow
25203
 ISTAT_RFOISTAT_RFO 0x00004000 b44.h Receive FIFO Overflow
25204
 ISTAT_TFUISTAT_TFU 0x00008000 b44.h Transmit FIFO Underflow
25205
 ISTAT_RXISTAT_RX 0x00010000 b44.h RX Interrupt
25206
 ISTAT_TXISTAT_TX 0x01000000 b44.h TX Interrupt
25207
 ISTAT_EMACISTAT_EMAC 0x04000000 b44.h EMAC Interrupt
25208
 ISTAT_MII_WRITEISTAT_MII_WRITE 0x08000000 b44.h MII Write Interrupt
25209
 ISTAT_MII_READISTAT_MII_READ 0x10000000 b44.h MII Read Interrupt
25210
 ISTAT_ERRORSISTAT_ERRORS (ISTAT_DSCE|ISTAT_DATAE|ISTAT_DPE|\ ISTAT_RDU|ISTAT_RFO|ISTAT_TFU) b44.h 　
25211
 B44_IMASKB44_IMASK 0x0024UL b44.h Interrupt Mask
25212
 IMASK_DEFIMASK_DEF (ISTAT_ERRORS | ISTAT_RX | ISTAT_TX) b44.h 　
25213
 IMASK_DISABLEIMASK_DISABLE 0 b44.h 　
25214
 B44_GPTIMERB44_GPTIMER 0x0028UL b44.h General Purpose Timer
25215
 B44_ADDR_LOB44_ADDR_LO 0x0088UL b44.h ENET Address Lo (B0 only)
25216
 B44_ADDR_HIB44_ADDR_HI 0x008CUL b44.h ENET Address Hi (B0 only)
25217
 B44_FILT_ADDRB44_FILT_ADDR 0x0090UL b44.h ENET Filter Address
25218
 B44_FILT_DATAB44_FILT_DATA 0x0094UL b44.h ENET Filter Data
25219
 B44_TXBURSTB44_TXBURST 0x00A0UL b44.h TX Max Burst Length
25220
 B44_RXBURSTB44_RXBURST 0x00A4UL b44.h RX Max Burst Length
25221
 B44_MAC_CTRLB44_MAC_CTRL 0x00A8UL b44.h MAC Control
25222
 MAC_CTRL_CRC32_ENABMAC_CTRL_CRC32_ENAB 0x00000001 b44.h CRC32 Generation Enable
25223
 MAC_CTRL_PHY_PDOWNMAC_CTRL_PHY_PDOWN 0x00000004 b44.h Onchip EPHY Powerdown
25224
 MAC_CTRL_PHY_EDETMAC_CTRL_PHY_EDET 0x00000008 b44.h Onchip EPHY Energy Detected
25225
 MAC_CTRL_PHY_LEDCTRLMAC_CTRL_PHY_LEDCTRL 0x000000e0 b44.h Onchip EPHY LED Control
25226
 MAC_CTRL_PHY_LEDCTRL_SHIFTMAC_CTRL_PHY_LEDCTRL_SHIFT 5 b44.h 　
25227
 B44_MAC_FLOWB44_MAC_FLOW 0x00ACUL b44.h MAC Flow Control
25228
 MAC_FLOW_RX_HI_WATERMAC_FLOW_RX_HI_WATER 0x000000ff b44.h Receive FIFO HI Water Mark
25229
 MAC_FLOW_PAUSE_ENABMAC_FLOW_PAUSE_ENAB 0x00008000 b44.h Enbl Pause Frm Generation
25230
 B44_RCV_LAZYB44_RCV_LAZY 0x0100UL b44.h Lazy Interrupt Control
25231
 RCV_LAZY_TO_MASKRCV_LAZY_TO_MASK 0x00ffffff b44.h Timeout
25232
 RCV_LAZY_FC_MASKRCV_LAZY_FC_MASK 0xff000000 b44.h Frame Count
25233
 RCV_LAZY_FC_SHIFTRCV_LAZY_FC_SHIFT 24 b44.h 　
25234
 B44_DMATX_CTRLB44_DMATX_CTRL 0x0200UL b44.h DMA TX Control
25235
 DMATX_CTRL_ENABLEDMATX_CTRL_ENABLE 0x00000001 b44.h Enable
25236
 DMATX_CTRL_SUSPENDDMATX_CTRL_SUSPEND 0x00000002 b44.h Suepend Request
25237
 DMATX_CTRL_LPBACKDMATX_CTRL_LPBACK 0x00000004 b44.h Loopback Enable
25238
 DMATX_CTRL_FAIRPRIORDMATX_CTRL_FAIRPRIOR 0x00000008 b44.h Fair Priority
25239
 DMATX_CTRL_FLUSHDMATX_CTRL_FLUSH 0x00000010 b44.h Flush Request
25240
 B44_DMATX_ADDRB44_DMATX_ADDR 0x0204UL b44.h DMA TX Descriptor Ring Addr
25241
 B44_DMATX_PTRB44_DMATX_PTR 0x0208UL b44.h DMA TX Last Posted Desc.
25242
 B44_DMATX_STATB44_DMATX_STAT 0x020CUL b44.h DMA TX Cur Actve Desc. + Sts
25243
 DMATX_STAT_CDMASKDMATX_STAT_CDMASK 0x00000fff b44.h Current Descriptor Mask
25244
 DMATX_STAT_SMASKDMATX_STAT_SMASK 0x0000f000 b44.h State Mask
25245
 DMATX_STAT_SDISABLEDDMATX_STAT_SDISABLED 0x00000000 b44.h State Disabled
25246
 DMATX_STAT_SACTIVEDMATX_STAT_SACTIVE 0x00001000 b44.h State Active
25247
 DMATX_STAT_SIDLEDMATX_STAT_SIDLE 0x00002000 b44.h State Idle Wait
25248
 DMATX_STAT_SSTOPPEDDMATX_STAT_SSTOPPED 0x00003000 b44.h State Stopped
25249
 DMATX_STAT_SSUSPDMATX_STAT_SSUSP 0x00004000 b44.h State Suspend Pending
25250
 DMATX_STAT_EMASKDMATX_STAT_EMASK 0x000f0000 b44.h Error Mask
25251
 DMATX_STAT_ENONEDMATX_STAT_ENONE 0x00000000 b44.h Error None
25252
 DMATX_STAT_EDPEDMATX_STAT_EDPE 0x00010000 b44.h Error Desc. Protocol Error
25253
 DMATX_STAT_EDFUDMATX_STAT_EDFU 0x00020000 b44.h Error Data FIFO Underrun
25254
 DMATX_STAT_EBEBRDMATX_STAT_EBEBR 0x00030000 b44.h Bus Error on Buffer Read
25255
 DMATX_STAT_EBEDADMATX_STAT_EBEDA 0x00040000 b44.h Bus Error on Desc. Access
25256
 DMATX_STAT_FLUSHEDDMATX_STAT_FLUSHED 0x00100000 b44.h Flushed
25257
 B44_DMARX_CTRLB44_DMARX_CTRL 0x0210UL b44.h DMA RX Control
25258
 DMARX_CTRL_ENABLEDMARX_CTRL_ENABLE 0x00000001 b44.h Enable
25259
 DMARX_CTRL_ROMASKDMARX_CTRL_ROMASK 0x000000fe b44.h Receive Offset Mask
25260
 DMARX_CTRL_ROSHIFTDMARX_CTRL_ROSHIFT 1 b44.h Receive Offset Shift
25261
 B44_DMARX_ADDRB44_DMARX_ADDR 0x0214UL b44.h DMA RX Descriptor Ring Addr
25262
 B44_DMARX_PTRB44_DMARX_PTR 0x0218UL b44.h DMA RX Last Posted Desc
25263
 B44_DMARX_STATB44_DMARX_STAT 0x021CUL b44.h Cur Active Desc. + Status
25264
 DMARX_STAT_CDMASKDMARX_STAT_CDMASK 0x00000fff b44.h Current Descriptor Mask
25265
 DMARX_STAT_SMASKDMARX_STAT_SMASK 0x0000f000 b44.h State Mask
25266
 DMARX_STAT_SDISABLEDDMARX_STAT_SDISABLED 0x00000000 b44.h State Disbaled
25267
 DMARX_STAT_SACTIVEDMARX_STAT_SACTIVE 0x00001000 b44.h State Active
25268
 DMARX_STAT_SIDLEDMARX_STAT_SIDLE 0x00002000 b44.h State Idle Wait
25269
 DMARX_STAT_SSTOPPEDDMARX_STAT_SSTOPPED 0x00003000 b44.h State Stopped
25270
 DMARX_STAT_EMASKDMARX_STAT_EMASK 0x000f0000 b44.h Error Mask
25271
 DMARX_STAT_ENONEDMARX_STAT_ENONE 0x00000000 b44.h Error None
25272
 DMARX_STAT_EDPEDMARX_STAT_EDPE 0x00010000 b44.h Error Desc. Protocol Error
25273
 DMARX_STAT_EDFODMARX_STAT_EDFO 0x00020000 b44.h Error Data FIFO Overflow
25274
 DMARX_STAT_EBEBWDMARX_STAT_EBEBW 0x00030000 b44.h Error on Buffer Write
25275
 DMARX_STAT_EBEDADMARX_STAT_EBEDA 0x00040000 b44.h Bus Error on Desc. Access
25276
 B44_DMAFIFO_ADB44_DMAFIFO_AD 0x0220UL b44.h DMA FIFO Diag Address
25277
 DMAFIFO_AD_OMASKDMAFIFO_AD_OMASK 0x0000ffff b44.h Offset Mask
25278
 DMAFIFO_AD_SMASKDMAFIFO_AD_SMASK 0x000f0000 b44.h Select Mask
25279
 DMAFIFO_AD_SXDDDMAFIFO_AD_SXDD 0x00000000 b44.h Select Transmit DMA Data
25280
 DMAFIFO_AD_SXDPDMAFIFO_AD_SXDP 0x00010000 b44.h Sel Transmit DMA Pointers
25281
 DMAFIFO_AD_SRDDDMAFIFO_AD_SRDD 0x00040000 b44.h Select Receive DMA Data
25282
 DMAFIFO_AD_SRDPDMAFIFO_AD_SRDP 0x00050000 b44.h Sel Receive DMA Pointers
25283
 DMAFIFO_AD_SXFDDMAFIFO_AD_SXFD 0x00080000 b44.h Select Transmit FIFO Data
25284
 DMAFIFO_AD_SXFPDMAFIFO_AD_SXFP 0x00090000 b44.h Sel Transmit FIFO Pointers
25285
 DMAFIFO_AD_SRFDDMAFIFO_AD_SRFD 0x000c0000 b44.h Select Receive FIFO Data
25286
 DMAFIFO_AD_SRFPDMAFIFO_AD_SRFP 0x000c0000 b44.h Sel Receive FIFO Pointers
25287
 B44_DMAFIFO_LOB44_DMAFIFO_LO 0x0224UL b44.h DMA FIFO Diag Low Data
25288
 B44_DMAFIFO_HIB44_DMAFIFO_HI 0x0228UL b44.h DMA FIFO Diag High Data
25289
 B44_RXCONFIGB44_RXCONFIG 0x0400UL b44.h EMAC RX Config
25290
 RXCONFIG_DBCASTRXCONFIG_DBCAST 0x00000001 b44.h Disable Broadcast
25291
 RXCONFIG_ALLMULTIRXCONFIG_ALLMULTI 0x00000002 b44.h Accept All Multicast
25292
 RXCONFIG_NORX_WHILE_TXRXCONFIG_NORX_WHILE_TX 0x00000004 b44.h Rcv Disble While TX
25293
 RXCONFIG_PROMISCRXCONFIG_PROMISC 0x00000008 b44.h Promiscuous Enable
25294
 RXCONFIG_LPBACKRXCONFIG_LPBACK 0x00000010 b44.h Loopback Enable
25295
 RXCONFIG_FLOWRXCONFIG_FLOW 0x00000020 b44.h Flow Control Enable
25296
 RXCONFIG_FLOW_ACCEPTRXCONFIG_FLOW_ACCEPT 0x00000040 b44.h Accept UFC Frame
25297
 RXCONFIG_RFILTRXCONFIG_RFILT 0x00000080 b44.h Reject Filter
25298
 B44_RXMAXLENB44_RXMAXLEN 0x0404UL b44.h EMAC RX Max Packet Length
25299
 B44_TXMAXLENB44_TXMAXLEN 0x0408UL b44.h EMAC TX Max Packet Length
25300
 B44_MDIO_CTRLB44_MDIO_CTRL 0x0410UL b44.h EMAC MDIO Control
25301
 MDIO_CTRL_MAXF_MASKMDIO_CTRL_MAXF_MASK 0x0000007f b44.h MDC Frequency
25302
 MDIO_CTRL_PREAMBLEMDIO_CTRL_PREAMBLE 0x00000080 b44.h MII Preamble Enable
25303
 B44_MDIO_DATAB44_MDIO_DATA 0x0414UL b44.h EMAC MDIO Data
25304
 MDIO_DATA_DATAMDIO_DATA_DATA 0x0000ffff b44.h R/W Data
25305
 MDIO_DATA_TA_MASKMDIO_DATA_TA_MASK 0x00030000 b44.h Turnaround Value
25306
 MDIO_DATA_TA_SHIFTMDIO_DATA_TA_SHIFT 16 b44.h 　
25307
 MDIO_TA_VALIDMDIO_TA_VALID 2 b44.h 　
25308
 MDIO_DATA_RA_MASKMDIO_DATA_RA_MASK 0x007c0000 b44.h Register Address
25309
 MDIO_DATA_RA_SHIFTMDIO_DATA_RA_SHIFT 18 b44.h 　
25310
 MDIO_DATA_PMD_MASKMDIO_DATA_PMD_MASK 0x0f800000 b44.h Physical Media Device
25311
 MDIO_DATA_PMD_SHIFTMDIO_DATA_PMD_SHIFT 23 b44.h 　
25312
 MDIO_DATA_OP_MASKMDIO_DATA_OP_MASK 0x30000000 b44.h Opcode
25313
 MDIO_DATA_OP_SHIFTMDIO_DATA_OP_SHIFT 28 b44.h 　
25314
 MDIO_OP_WRITEMDIO_OP_WRITE 1 b44.h 　
25315
 MDIO_OP_READMDIO_OP_READ 2 b44.h 　
25316
 MDIO_DATA_SB_MASKMDIO_DATA_SB_MASK 0xc0000000 b44.h Start Bits
25317
 MDIO_DATA_SB_SHIFTMDIO_DATA_SB_SHIFT 30 b44.h 　
25318
 MDIO_DATA_SB_STARTMDIO_DATA_SB_START 0x40000000 b44.h Start Of Frame
25319
 B44_EMAC_IMASKB44_EMAC_IMASK 0x0418UL b44.h EMAC Interrupt Mask
25320
 B44_EMAC_ISTATB44_EMAC_ISTAT 0x041CUL b44.h EMAC Interrupt Status
25321
 EMAC_INT_MIIEMAC_INT_MII 0x00000001 b44.h MII MDIO Interrupt
25322
 EMAC_INT_MIBEMAC_INT_MIB 0x00000002 b44.h MIB Interrupt
25323
 EMAC_INT_FLOWEMAC_INT_FLOW 0x00000003 b44.h Flow Control Interrupt
25324
 B44_CAM_DATA_LOB44_CAM_DATA_LO 0x0420UL b44.h EMAC CAM Data Low
25325
 B44_CAM_DATA_HIB44_CAM_DATA_HI 0x0424UL b44.h EMAC CAM Data High
25326
 CAM_DATA_HI_VALIDCAM_DATA_HI_VALID 0x00010000 b44.h Valid Bit
25327
 B44_CAM_CTRLB44_CAM_CTRL 0x0428UL b44.h EMAC CAM Control
25328
 CAM_CTRL_ENABLECAM_CTRL_ENABLE 0x00000001 b44.h CAM Enable
25329
 CAM_CTRL_MSELCAM_CTRL_MSEL 0x00000002 b44.h Mask Select
25330
 CAM_CTRL_READCAM_CTRL_READ 0x00000004 b44.h Read
25331
 CAM_CTRL_WRITECAM_CTRL_WRITE 0x00000008 b44.h Read
25332
 CAM_CTRL_INDEX_MASKCAM_CTRL_INDEX_MASK 0x003f0000 b44.h Index Mask
25333
 CAM_CTRL_INDEX_SHIFTCAM_CTRL_INDEX_SHIFT 16 b44.h 　
25334
 CAM_CTRL_BUSYCAM_CTRL_BUSY 0x80000000 b44.h CAM Busy
25335
 B44_ENET_CTRLB44_ENET_CTRL 0x042CUL b44.h EMAC ENET Control
25336
 ENET_CTRL_ENABLEENET_CTRL_ENABLE 0x00000001 b44.h EMAC Enable
25337
 ENET_CTRL_DISABLEENET_CTRL_DISABLE 0x00000002 b44.h EMAC Disable
25338
 ENET_CTRL_SRSTENET_CTRL_SRST 0x00000004 b44.h EMAC Soft Reset
25339
 ENET_CTRL_EPSELENET_CTRL_EPSEL 0x00000008 b44.h External PHY Select
25340
 B44_TX_CTRLB44_TX_CTRL 0x0430UL b44.h EMAC TX Control
25341
 TX_CTRL_DUPLEXTX_CTRL_DUPLEX 0x00000001 b44.h Full Duplex
25342
 TX_CTRL_FMODETX_CTRL_FMODE 0x00000002 b44.h Flow Mode
25343
 TX_CTRL_SBENABTX_CTRL_SBENAB 0x00000004 b44.h Single Backoff Enable
25344
 TX_CTRL_SMALL_SLOTTX_CTRL_SMALL_SLOT 0x00000008 b44.h Small Slottime
25345
 B44_TX_HIWMARKB44_TX_HIWMARK 0x0434UL b44.h EMAC TX High Watermark
25346
 TX_HIWMARK_DEFLTTX_HIWMARK_DEFLT 56 b44.h Default used in all drivers
25347
 B44_MIB_CTRLB44_MIB_CTRL 0x0438UL b44.h EMAC MIB Control
25348
 MIB_CTRL_CLR_ON_READMIB_CTRL_CLR_ON_READ 0x00000001 b44.h Autoclear on Read
25349
 B44_TX_GOOD_OB44_TX_GOOD_O 0x0500UL b44.h MIB TX Good Octets
25350
 B44_TX_GOOD_PB44_TX_GOOD_P 0x0504UL b44.h MIB TX Good Packets
25351
 B44_TX_OB44_TX_O 0x0508UL b44.h MIB TX Octets
25352
 B44_TX_PB44_TX_P 0x050CUL b44.h MIB TX Packets
25353
 B44_TX_BCASTB44_TX_BCAST 0x0510UL b44.h MIB TX Broadcast Packets
25354
 B44_TX_MCASTB44_TX_MCAST 0x0514UL b44.h MIB TX Multicast Packets
25355
 B44_TX_64B44_TX_64 0x0518UL b44.h MIB TX <= 64 byte Packets
25356
 B44_TX_65_127B44_TX_65_127 0x051CUL b44.h MIB TX 65 to 127 byte Pkts
25357
 B44_TX_128_255B44_TX_128_255 0x0520UL b44.h MIB TX 128 to 255 byte Pkts
25358
 B44_TX_256_511B44_TX_256_511 0x0524UL b44.h MIB TX 256 to 511 byte Pkts
25359
 B44_TX_512_1023B44_TX_512_1023 0x0528UL b44.h MIB TX 512 to 1023 byte Pkts
25360
 B44_TX_1024_MAXB44_TX_1024_MAX 0x052CUL b44.h MIB TX 1024 to max byte Pkts
25361
 B44_TX_JABBERB44_TX_JABBER 0x0530UL b44.h MIB TX Jabber Packets
25362
 B44_TX_OSIZEB44_TX_OSIZE 0x0534UL b44.h MIB TX Oversize Packets
25363
 B44_TX_FRAGB44_TX_FRAG 0x0538UL b44.h MIB TX Fragment Packets
25364
 B44_TX_URUNSB44_TX_URUNS 0x053CUL b44.h MIB TX Underruns
25365
 B44_TX_TCOLSB44_TX_TCOLS 0x0540UL b44.h MIB TX Total Collisions
25366
 B44_TX_SCOLSB44_TX_SCOLS 0x0544UL b44.h MIB TX Single Collisions
25367
 B44_TX_MCOLSB44_TX_MCOLS 0x0548UL b44.h MIB TX Multiple Collisions
25368
 B44_TX_ECOLSB44_TX_ECOLS 0x054CUL b44.h MIB TX Excessive Collisions
25369
 B44_TX_LCOLSB44_TX_LCOLS 0x0550UL b44.h MIB TX Late Collisions
25370
 B44_TX_DEFEREDB44_TX_DEFERED 0x0554UL b44.h MIB TX Defered Packets
25371
 B44_TX_CLOSTB44_TX_CLOST 0x0558UL b44.h MIB TX Carrier Lost
25372
 B44_TX_PAUSEB44_TX_PAUSE 0x055CUL b44.h MIB TX Pause Packets
25373
 B44_RX_GOOD_OB44_RX_GOOD_O 0x0580UL b44.h MIB RX Good Octets
25374
 B44_RX_GOOD_PB44_RX_GOOD_P 0x0584UL b44.h MIB RX Good Packets
25375
 B44_RX_OB44_RX_O 0x0588UL b44.h MIB RX Octets
25376
 B44_RX_PB44_RX_P 0x058CUL b44.h MIB RX Packets
25377
 B44_RX_BCASTB44_RX_BCAST 0x0590UL b44.h MIB RX Broadcast Packets
25378
 B44_RX_MCASTB44_RX_MCAST 0x0594UL b44.h MIB RX Multicast Packets
25379
 B44_RX_64B44_RX_64 0x0598UL b44.h MIB RX <= 64 byte Packets
25380
 B44_RX_65_127B44_RX_65_127 0x059CUL b44.h MIB RX 65 to 127 byte Pkts
25381
 B44_RX_128_255B44_RX_128_255 0x05A0UL b44.h MIB RX 128 to 255 byte Pkts
25382
 B44_RX_256_511B44_RX_256_511 0x05A4UL b44.h MIB RX 256 to 511 byte Pkts
25383
 B44_RX_512_1023B44_RX_512_1023 0x05A8UL b44.h MIB RX 512 to 1023 byte Pkts
25384
 B44_RX_1024_MAXB44_RX_1024_MAX 0x05ACUL b44.h MIB RX 1024 to max byte Pkts
25385
 B44_RX_JABBERB44_RX_JABBER 0x05B0UL b44.h MIB RX Jabber Packets
25386
 B44_RX_OSIZEB44_RX_OSIZE 0x05B4UL b44.h MIB RX Oversize Packets
25387
 B44_RX_FRAGB44_RX_FRAG 0x05B8UL b44.h MIB RX Fragment Packets
25388
 B44_RX_MISSB44_RX_MISS 0x05BCUL b44.h MIB RX Missed Packets
25389
 B44_RX_CRCAB44_RX_CRCA 0x05C0UL b44.h MIB RX CRC Align Errors
25390
 B44_RX_USIZEB44_RX_USIZE 0x05C4UL b44.h MIB RX Undersize Packets
25391
 B44_RX_CRCB44_RX_CRC 0x05C8UL b44.h MIB RX CRC Errors
25392
 B44_RX_ALIGNB44_RX_ALIGN 0x05CCUL b44.h MIB RX Align Errors
25393
 B44_RX_SYMB44_RX_SYM 0x05D0UL b44.h MIB RX Symbol Errors
25394
 B44_RX_PAUSEB44_RX_PAUSE 0x05D4UL b44.h MIB RX Pause Packets
25395
 B44_RX_NPAUSEB44_RX_NPAUSE 0x05D8UL b44.h MIB RX Non-Pause Packets
25396
 B44_SBIMSTATEB44_SBIMSTATE 0x0F90UL b44.h SB Initiator Agent State
25397
 SBIMSTATE_PCSBIMSTATE_PC 0x0000000f b44.h Pipe Count
25398
 SBIMSTATE_AP_MASKSBIMSTATE_AP_MASK 0x00000030 b44.h Arbitration Priority
25399
 SBIMSTATE_AP_BOTHSBIMSTATE_AP_BOTH 0x00000000 b44.h both timeslices and token
25400
 SBIMSTATE_AP_TSSBIMSTATE_AP_TS 0x00000010 b44.h Use timeslices only
25401
 SBIMSTATE_AP_TKSBIMSTATE_AP_TK 0x00000020 b44.h Use token only
25402
 SBIMSTATE_AP_RSVSBIMSTATE_AP_RSV 0x00000030 b44.h Reserved
25403
 SBIMSTATE_IBESBIMSTATE_IBE 0x00020000 b44.h In Band Error
25404
 SBIMSTATE_TOSBIMSTATE_TO 0x00040000 b44.h Timeout
25405
 SBIMSTATE_BADSBIMSTATE_BAD ( SBIMSTATE_IBE | SBIMSTATE_TO ) b44.h 　
25406
 B44_SBINTVECB44_SBINTVEC 0x0F94UL b44.h SB Interrupt Mask
25407
 SBINTVEC_PCISBINTVEC_PCI 0x00000001 b44.h Enable interrupts for PCI
25408
 SBINTVEC_ENET0SBINTVEC_ENET0 0x00000002 b44.h Enable ints for enet 0
25409
 SBINTVEC_ILINE20SBINTVEC_ILINE20 0x00000004 b44.h Enable ints for iline20
25410
 SBINTVEC_CODECSBINTVEC_CODEC 0x00000008 b44.h Enable ints for v90 codec
25411
 SBINTVEC_USBSBINTVEC_USB 0x00000010 b44.h Enable intts for usb
25412
 SBINTVEC_EXTIFSBINTVEC_EXTIF 0x00000020 b44.h Enable ints for ext i/f
25413
 SBINTVEC_ENET1SBINTVEC_ENET1 0x00000040 b44.h Enable ints for enet 1
25414
 B44_SBTMSLOWB44_SBTMSLOW 0x0F98UL b44.h SB Target State Low
25415
 SBTMSLOW_RESETSBTMSLOW_RESET 0x00000001 b44.h Reset
25416
 SBTMSLOW_REJECTSBTMSLOW_REJECT 0x00000002 b44.h Reject
25417
 SBTMSLOW_CLOCKSBTMSLOW_CLOCK 0x00010000 b44.h Clock Enable
25418
 SBTMSLOW_FGCSBTMSLOW_FGC 0x00020000 b44.h Force Gated Clocks On
25419
 SBTMSLOW_PESBTMSLOW_PE 0x40000000 b44.h Power Management Enable
25420
 SBTMSLOW_BESBTMSLOW_BE 0x80000000 b44.h BIST Enable
25421
 B44_SBTMSHIGHB44_SBTMSHIGH 0x0F9CUL b44.h SB Target State High
25422
 SBTMSHIGH_SERRSBTMSHIGH_SERR 0x00000001 b44.h S-error
25423
 SBTMSHIGH_INTSBTMSHIGH_INT 0x00000002 b44.h Interrupt
25424
 SBTMSHIGH_BUSYSBTMSHIGH_BUSY 0x00000004 b44.h Busy
25425
 SBTMSHIGH_GCRSBTMSHIGH_GCR 0x20000000 b44.h Gated Clock Request
25426
 SBTMSHIGH_BISTFSBTMSHIGH_BISTF 0x40000000 b44.h BIST Failed
25427
 SBTMSHIGH_BISTDSBTMSHIGH_BISTD 0x80000000 b44.h BIST Done
25428
 B44_SBIDHIGHB44_SBIDHIGH 0x0FFCUL b44.h SB Identification High
25429
 SBIDHIGH_RC_MASKSBIDHIGH_RC_MASK 0x0000000f b44.h Revision Code
25430
 SBIDHIGH_CC_MASKSBIDHIGH_CC_MASK 0x0000fff0 b44.h Core Code
25431
 SBIDHIGH_CC_SHIFTSBIDHIGH_CC_SHIFT 4 b44.h 　
25432
 SBIDHIGH_VC_MASKSBIDHIGH_VC_MASK 0xffff0000 b44.h Vendor Code
25433
 SBIDHIGH_VC_SHIFTSBIDHIGH_VC_SHIFT 16 b44.h 　
25434
 SSB_PMCSRSSB_PMCSR 0x44 b44.h 　
25435
 SSB_PESSB_PE 0x100 b44.h 　
25436
 SSB_BAR0_WINSSB_BAR0_WIN 0x80 b44.h 　
25437
 SSB_BAR1_WINSSB_BAR1_WIN 0x84 b44.h 　
25438
 SSB_SPROM_CONTROLSSB_SPROM_CONTROL 0x88 b44.h 　
25439
 SSB_BAR1_CONTROLSSB_BAR1_CONTROL 0x8c b44.h 　
25440
 SSB_CONTROLSSB_CONTROL 0x0000UL b44.h 　
25441
 SSB_ARBCONTROLSSB_ARBCONTROL 0x0010UL b44.h 　
25442
 SSB_ISTATSSB_ISTAT 0x0020UL b44.h 　
25443
 SSB_IMASKSSB_IMASK 0x0024UL b44.h 　
25444
 SSB_MBOXSSB_MBOX 0x0028UL b44.h 　
25445
 SSB_BCAST_ADDRSSB_BCAST_ADDR 0x0050UL b44.h 　
25446
 SSB_BCAST_DATASSB_BCAST_DATA 0x0054UL b44.h 　
25447
 SSB_PCI_TRANS_0SSB_PCI_TRANS_0 0x0100UL b44.h 　
25448
 SSB_PCI_TRANS_1SSB_PCI_TRANS_1 0x0104UL b44.h 　
25449
 SSB_PCI_TRANS_2SSB_PCI_TRANS_2 0x0108UL b44.h 　
25450
 SSB_SPROMSSB_SPROM 0x0800UL b44.h 　
25451
 SSB_PCI_MEMSSB_PCI_MEM 0x00000000 b44.h 　
25452
 SSB_PCI_IOSSB_PCI_IO 0x00000001 b44.h 　
25453
 SSB_PCI_CFG0SSB_PCI_CFG0 0x00000002 b44.h 　
25454
 SSB_PCI_CFG1SSB_PCI_CFG1 0x00000003 b44.h 　
25455
 SSB_PCI_PREFSSB_PCI_PREF 0x00000004 b44.h 　
25456
 SSB_PCI_BURSTSSB_PCI_BURST 0x00000008 b44.h 　
25457
 SSB_PCI_MASK0SSB_PCI_MASK0 0xfc000000 b44.h 　
25458
 SSB_PCI_MASK1SSB_PCI_MASK1 0xfc000000 b44.h 　
25459
 SSB_PCI_MASK2SSB_PCI_MASK2 0xc0000000 b44.h 　
25460
 B44_MII_AUXCTRLB44_MII_AUXCTRL 24 b44.h Auxiliary Control
25461
 MII_AUXCTRL_DUPLEXMII_AUXCTRL_DUPLEX 0x0001 b44.h Full Duplex
25462
 MII_AUXCTRL_SPEEDMII_AUXCTRL_SPEED 0x0002 b44.h 1=100Mbps, 0=10Mbps
25463
 MII_AUXCTRL_FORCEDMII_AUXCTRL_FORCED 0x0004 b44.h Forced 10/100
25464
 B44_MII_ALEDCTRLB44_MII_ALEDCTRL 26 b44.h Activity LED
25465
 MII_ALEDCTRL_ALLMSKMII_ALEDCTRL_ALLMSK 0x7fff b44.h 　
25466
 B44_MII_TLEDCTRLB44_MII_TLEDCTRL 27 b44.h Traffic Meter LED
25467
 MII_TLEDCTRL_ENABLEMII_TLEDCTRL_ENABLE 0x0040 b44.h 　
25468
 B44_DMA_ALIGNMENTB44_DMA_ALIGNMENT 4096 b44.h 　
25469
 B44_30BIT_DMA_MASKB44_30BIT_DMA_MASK 0x3fffffff b44.h 　
25470
 DESC_CTRL_LENDESC_CTRL_LEN 0x00001fff b44.h 　
25471
 DESC_CTRL_CMASKDESC_CTRL_CMASK 0x0ff00000 b44.h Core specific bits
25472
 DESC_CTRL_EOTDESC_CTRL_EOT 0x10000000 b44.h End of Table
25473
 DESC_CTRL_IOCDESC_CTRL_IOC 0x20000000 b44.h Interrupt On Completion
25474
 DESC_CTRL_EOFDESC_CTRL_EOF 0x40000000 b44.h End of Frame
25475
 DESC_CTRL_SOFDESC_CTRL_SOF 0x80000000 b44.h Start of Frame
25476
 RX_HEADER_LENRX_HEADER_LEN 28 b44.h 　
25477
 RX_FLAG_OFIFORX_FLAG_OFIFO 0x00000001 b44.h FIFO Overflow
25478
 RX_FLAG_CRCERRRX_FLAG_CRCERR 0x00000002 b44.h CRC Error
25479
 RX_FLAG_SERRRX_FLAG_SERR 0x00000004 b44.h Receive Symbol Error
25480
 RX_FLAG_ODDRX_FLAG_ODD 0x00000008 b44.h Frame has odd number of nibbles
25481
 RX_FLAG_LARGERX_FLAG_LARGE 0x00000010 b44.h Frame is > RX MAX Length
25482
 RX_FLAG_MCASTRX_FLAG_MCAST 0x00000020 b44.h Dest is Multicast Address
25483
 RX_FLAG_BCASTRX_FLAG_BCAST 0x00000040 b44.h Dest is Broadcast Address
25484
 RX_FLAG_MISSRX_FLAG_MISS 0x00000080 b44.h Received due to promisc mode
25485
 RX_FLAG_LASTRX_FLAG_LAST 0x00000800 b44.h Last buffer in frame
25486
 RX_FLAG_ERRORSRX_FLAG_ERRORS (RX_FLAG_ODD | RX_FLAG_SERR |\ RX_FLAG_CRCERR | RX_FLAG_OFIFO) b44.h 　
25487
 SB_PCI_DMASB_PCI_DMA 0x40000000 b44.h 　
25488
 BCM4400_PCI_CORE_ADDRBCM4400_PCI_CORE_ADDR 0x18002000 b44.h 　
25489
 B44_MIN_MTUB44_MIN_MTU 60 b44.h 　
25490
 B44_MAX_MTUB44_MAX_MTU 1500 b44.h 　
25491
 B44_RING_SIZEB44_RING_SIZE 8 b44.h 　
25492
 B44_RING_LASTB44_RING_LAST ( B44_RING_SIZE - 1 ) b44.h 　
25493
 B44_RX_RING_LEN_BYTESB44_RX_RING_LEN_BYTES ( sizeof bp->rx[0] * B44_RING_SIZE ) b44.h 　
25494
 B44_TX_RING_LEN_BYTESB44_TX_RING_LEN_BYTES ( sizeof bp->tx[0] * B44_RING_SIZE ) b44.h 　
25495
 RX_PKT_OFFSETRX_PKT_OFFSET 30 b44.h 　
25496
 RX_PKT_BUF_SZRX_PKT_BUF_SZ (1536 + RX_PKT_OFFSET + 64) b44.h 　
25497
 B44_FULL_RESETB44_FULL_RESET 1 b44.h 　
25498
 B44_FULL_RESET_SKIP_PHYB44_FULL_RESET_SKIP_PHY 2 b44.h 　
25499
 B44_PARTIAL_RESETB44_PARTIAL_RESET 3 b44.h 　
25500
 B44_CHIP_RESET_FULLB44_CHIP_RESET_FULL 4 b44.h 　
25501
 B44_CHIP_RESET_PARTIALB44_CHIP_RESET_PARTIAL 5 b44.h 　
25502
 SSB_CORE_DOWNSSB_CORE_DOWN ( SBTMSLOW_RESET | SBTMSLOW_REJECT ) b44.h 　
25503
 B44_REGS_SIZEB44_REGS_SIZE 8192 b44.h 　
25504
 L1_CACHE_BYTESL1_CACHE_BYTES 128 bnx2.h Rough approximaition of the cache line size
25505
 PCI_D0PCI_D0 ((pci_power_t) 0) bnx2.h 　
25506
 PCI_D1PCI_D1 ((pci_power_t) 1) bnx2.h 　
25507
 PCI_D2PCI_D2 ((pci_power_t) 2) bnx2.h 　
25508
 PCI_D3hotPCI_D3hot ((pci_power_t) 3) bnx2.h 　
25509
 PCI_D3coldPCI_D3cold ((pci_power_t) 4) bnx2.h 　
25510
 PCI_UNKNOWNPCI_UNKNOWN ((pci_power_t) 5) bnx2.h 　
25511
 PCI_POWER_ERRORPCI_POWER_ERROR ((pci_power_t) -1) bnx2.h 　
25512
 PCI_CAP_ID_PCIXPCI_CAP_ID_PCIX 0x07 bnx2.h PCI-X
25513
 PCI_X_CMDPCI_X_CMD 2 bnx2.h Modes & Features
25514
 PCI_X_CMD_EROPCI_X_CMD_ERO 0x0002 bnx2.h Enable Relaxed Ordering
25515
 ADVERTISED_10baseT_HalfADVERTISED_10baseT_Half (1 << 0) bnx2.h 　
25516
 ADVERTISED_10baseT_FullADVERTISED_10baseT_Full (1 << 1) bnx2.h 　
25517
 ADVERTISED_100baseT_HalfADVERTISED_100baseT_Half (1 << 2) bnx2.h 　
25518
 ADVERTISED_100baseT_FullADVERTISED_100baseT_Full (1 << 3) bnx2.h 　
25519
 ADVERTISED_1000baseT_HalfADVERTISED_1000baseT_Half (1 << 4) bnx2.h 　
25520
 ADVERTISED_1000baseT_FullADVERTISED_1000baseT_Full (1 << 5) bnx2.h 　
25521
 ADVERTISED_AutonegADVERTISED_Autoneg (1 << 6) bnx2.h 　
25522
 ADVERTISED_TPADVERTISED_TP (1 << 7) bnx2.h 　
25523
 ADVERTISED_AUIADVERTISED_AUI (1 << 8) bnx2.h 　
25524
 ADVERTISED_MIIADVERTISED_MII (1 << 9) bnx2.h 　
25525
 ADVERTISED_FIBREADVERTISED_FIBRE (1 << 10) bnx2.h 　
25526
 ADVERTISED_BNCADVERTISED_BNC (1 << 11) bnx2.h 　
25527
 DUPLEX_HALFDUPLEX_HALF 0x00 bnx2.h 　
25528
 DUPLEX_FULLDUPLEX_FULL 0x01 bnx2.h 　
25529
 DUPLEX_INVALIDDUPLEX_INVALID 0x02 bnx2.h 　
25530
 PORT_TPPORT_TP 0x00 bnx2.h 　
25531
 PORT_AUIPORT_AUI 0x01 bnx2.h 　
25532
 PORT_MIIPORT_MII 0x02 bnx2.h 　
25533
 PORT_FIBREPORT_FIBRE 0x03 bnx2.h 　
25534
 PORT_BNCPORT_BNC 0x04 bnx2.h 　
25535
 XCVR_INTERNALXCVR_INTERNAL 0x00 bnx2.h 　
25536
 XCVR_EXTERNALXCVR_EXTERNAL 0x01 bnx2.h 　
25537
 XCVR_DUMMY1XCVR_DUMMY1 0x02 bnx2.h 　
25538
 XCVR_DUMMY2XCVR_DUMMY2 0x03 bnx2.h 　
25539
 XCVR_DUMMY3XCVR_DUMMY3 0x04 bnx2.h 　
25540
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 bnx2.h 　
25541
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 bnx2.h 　
25542
 WAKE_PHYWAKE_PHY (1 << 0) bnx2.h 　
25543
 WAKE_UCASTWAKE_UCAST (1 << 1) bnx2.h 　
25544
 WAKE_MCASTWAKE_MCAST (1 << 2) bnx2.h 　
25545
 WAKE_BCASTWAKE_BCAST (1 << 3) bnx2.h 　
25546
 WAKE_ARPWAKE_ARP (1 << 4) bnx2.h 　
25547
 WAKE_MAGICWAKE_MAGIC (1 << 5) bnx2.h 　
25548
 WAKE_MAGICSECUREWAKE_MAGICSECURE (1 << 6) bnx2.h only meaningful if WAKE_MAGIC
25549
 SPEED_10SPEED_10 10 bnx2.h 　
25550
 SPEED_100SPEED_100 100 bnx2.h 　
25551
 SPEED_1000SPEED_1000 1000 bnx2.h 　
25552
 SPEED_2500SPEED_2500 2500 bnx2.h 　
25553
 SPEED_INVALIDSPEED_INVALID 0 bnx2.h XXX was 3
25554
 DUPLEX_HALFDUPLEX_HALF 0x00 bnx2.h 　
25555
 DUPLEX_FULLDUPLEX_FULL 0x01 bnx2.h 　
25556
 DUPLEX_INVALIDDUPLEX_INVALID 0x02 bnx2.h 　
25557
 PORT_TPPORT_TP 0x00 bnx2.h 　
25558
 PORT_AUIPORT_AUI 0x01 bnx2.h 　
25559
 PORT_MIIPORT_MII 0x02 bnx2.h 　
25560
 PORT_FIBREPORT_FIBRE 0x03 bnx2.h 　
25561
 PORT_BNCPORT_BNC 0x04 bnx2.h 　
25562
 XCVR_INTERNALXCVR_INTERNAL 0x00 bnx2.h 　
25563
 XCVR_EXTERNALXCVR_EXTERNAL 0x01 bnx2.h 　
25564
 XCVR_DUMMY1XCVR_DUMMY1 0x02 bnx2.h 　
25565
 XCVR_DUMMY2XCVR_DUMMY2 0x03 bnx2.h 　
25566
 XCVR_DUMMY3XCVR_DUMMY3 0x04 bnx2.h 　
25567
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 bnx2.h 　
25568
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 bnx2.h 　
25569
 WAKE_PHYWAKE_PHY (1 << 0) bnx2.h 　
25570
 WAKE_UCASTWAKE_UCAST (1 << 1) bnx2.h 　
25571
 WAKE_MCASTWAKE_MCAST (1 << 2) bnx2.h 　
25572
 WAKE_BCASTWAKE_BCAST (1 << 3) bnx2.h 　
25573
 WAKE_ARPWAKE_ARP (1 << 4) bnx2.h 　
25574
 WAKE_MAGICWAKE_MAGIC (1 << 5) bnx2.h 　
25575
 WAKE_MAGICSECUREWAKE_MAGICSECURE (1 << 6) bnx2.h only meaningful if WAKE_MAGIC
25576
 BNX2_L2CTX_TYPEBNX2_L2CTX_TYPE 0x00000000 bnx2.h 　
25577
 BNX2_L2CTX_TYPE_SIZE_L2BNX2_L2CTX_TYPE_SIZE_L2 ((0xc0/0x20)<<16) bnx2.h 　
25578
 BNX2_L2CTX_TYPE_TYPEBNX2_L2CTX_TYPE_TYPE (0xf<<28) bnx2.h 　
25579
 BNX2_L2CTX_TYPE_TYPE_EMPTYBNX2_L2CTX_TYPE_TYPE_EMPTY (0<<28) bnx2.h 　
25580
 BNX2_L2CTX_TYPE_TYPE_L2BNX2_L2CTX_TYPE_TYPE_L2 (1<<28) bnx2.h 　
25581
 BNX2_L2CTX_TX_HOST_BIDXBNX2_L2CTX_TX_HOST_BIDX 0x00000088 bnx2.h 　
25582
 BNX2_L2CTX_EST_NBDBNX2_L2CTX_EST_NBD 0x00000088 bnx2.h 　
25583
 BNX2_L2CTX_CMD_TYPEBNX2_L2CTX_CMD_TYPE 0x00000088 bnx2.h 　
25584
 BNX2_L2CTX_CMD_TYPE_TYPEBNX2_L2CTX_CMD_TYPE_TYPE (0xf<<24) bnx2.h 　
25585
 BNX2_L2CTX_CMD_TYPE_TYPE_L2BNX2_L2CTX_CMD_TYPE_TYPE_L2 (0<<24) bnx2.h 　
25586
 BNX2_L2CTX_CMD_TYPE_TYPE_TCPBNX2_L2CTX_CMD_TYPE_TYPE_TCP (1<<24) bnx2.h 　
25587
 BNX2_L2CTX_TX_HOST_BSEQBNX2_L2CTX_TX_HOST_BSEQ 0x00000090 bnx2.h 　
25588
 BNX2_L2CTX_TSCH_BSEQBNX2_L2CTX_TSCH_BSEQ 0x00000094 bnx2.h 　
25589
 BNX2_L2CTX_TBDR_BSEQBNX2_L2CTX_TBDR_BSEQ 0x00000098 bnx2.h 　
25590
 BNX2_L2CTX_TBDR_BOFFBNX2_L2CTX_TBDR_BOFF 0x0000009c bnx2.h 　
25591
 BNX2_L2CTX_TBDR_BIDXBNX2_L2CTX_TBDR_BIDX 0x0000009c bnx2.h 　
25592
 BNX2_L2CTX_TBDR_BHADDR_HIBNX2_L2CTX_TBDR_BHADDR_HI 0x000000a0 bnx2.h 　
25593
 BNX2_L2CTX_TBDR_BHADDR_LOBNX2_L2CTX_TBDR_BHADDR_LO 0x000000a4 bnx2.h 　
25594
 BNX2_L2CTX_TXP_BOFFBNX2_L2CTX_TXP_BOFF 0x000000a8 bnx2.h 　
25595
 BNX2_L2CTX_TXP_BIDXBNX2_L2CTX_TXP_BIDX 0x000000a8 bnx2.h 　
25596
 BNX2_L2CTX_TXP_BSEQBNX2_L2CTX_TXP_BSEQ 0x000000ac bnx2.h 　
25597
 BNX2_L2CTX_BD_PRE_READBNX2_L2CTX_BD_PRE_READ 0x00000000 bnx2.h 　
25598
 BNX2_L2CTX_CTX_SIZEBNX2_L2CTX_CTX_SIZE 0x00000000 bnx2.h 　
25599
 BNX2_L2CTX_CTX_TYPEBNX2_L2CTX_CTX_TYPE 0x00000000 bnx2.h 　
25600
 BNX2_L2CTX_CTX_TYPE_SIZE_L2BNX2_L2CTX_CTX_TYPE_SIZE_L2 ((0x20/20)<<16) bnx2.h 　
25601
 BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_ (0xf<<28) bnx2.h 　
25602
 BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_ (0<<28) bnx2.h 　
25603
 BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_ (1<<28) bnx2.h 　
25604
 BNX2_L2CTX_HOST_BDIDXBNX2_L2CTX_HOST_BDIDX 0x00000004 bnx2.h 　
25605
 BNX2_L2CTX_HOST_BSEQBNX2_L2CTX_HOST_BSEQ 0x00000008 bnx2.h 　
25606
 BNX2_L2CTX_NX_BSEQBNX2_L2CTX_NX_BSEQ 0x0000000c bnx2.h 　
25607
 BNX2_L2CTX_NX_BDHADDR_HIBNX2_L2CTX_NX_BDHADDR_HI 0x00000010 bnx2.h 　
25608
 BNX2_L2CTX_NX_BDHADDR_LOBNX2_L2CTX_NX_BDHADDR_LO 0x00000014 bnx2.h 　
25609
 BNX2_L2CTX_NX_BDIDXBNX2_L2CTX_NX_BDIDX 0x00000018 bnx2.h 　
25610
 BNX2_PCICFG_MISC_CONFIGBNX2_PCICFG_MISC_CONFIG 0x00000068 bnx2.h 　
25611
 BNX2_PCICFG_MISC_CONFIG_TARGET_BNX2_PCICFG_MISC_CONFIG_TARGET_ (1L<<2) bnx2.h 　
25612
 BNX2_PCICFG_MISC_CONFIG_TARGET_BNX2_PCICFG_MISC_CONFIG_TARGET_ (1L<<3) bnx2.h 　
25613
 BNX2_PCICFG_MISC_CONFIG_CLOCK_CBNX2_PCICFG_MISC_CONFIG_CLOCK_C (1L<<5) bnx2.h 　
25614
 BNX2_PCICFG_MISC_CONFIG_TARGET_BNX2_PCICFG_MISC_CONFIG_TARGET_ (1L<<6) bnx2.h 　
25615
 BNX2_PCICFG_MISC_CONFIG_REG_WINBNX2_PCICFG_MISC_CONFIG_REG_WIN (1L<<7) bnx2.h 　
25616
 BNX2_PCICFG_MISC_CONFIG_CORE_RSBNX2_PCICFG_MISC_CONFIG_CORE_RS (1L<<8) bnx2.h 　
25617
 BNX2_PCICFG_MISC_CONFIG_CORE_RSBNX2_PCICFG_MISC_CONFIG_CORE_RS (1L<<9) bnx2.h 　
25618
 BNX2_PCICFG_MISC_CONFIG_ASIC_MEBNX2_PCICFG_MISC_CONFIG_ASIC_ME (0xffL<<16) bnx2.h 　
25619
 BNX2_PCICFG_MISC_CONFIG_ASIC_BABNX2_PCICFG_MISC_CONFIG_ASIC_BA (0xfL<<24) bnx2.h 　
25620
 BNX2_PCICFG_MISC_CONFIG_ASIC_IDBNX2_PCICFG_MISC_CONFIG_ASIC_ID (0xfL<<28) bnx2.h 　
25621
 BNX2_PCICFG_MISC_STATUSBNX2_PCICFG_MISC_STATUS 0x0000006c bnx2.h 　
25622
 BNX2_PCICFG_MISC_STATUS_INTA_VABNX2_PCICFG_MISC_STATUS_INTA_VA (1L<<0) bnx2.h 　
25623
 BNX2_PCICFG_MISC_STATUS_32BIT_DBNX2_PCICFG_MISC_STATUS_32BIT_D (1L<<1) bnx2.h 　
25624
 BNX2_PCICFG_MISC_STATUS_M66ENBNX2_PCICFG_MISC_STATUS_M66EN (1L<<2) bnx2.h 　
25625
 BNX2_PCICFG_MISC_STATUS_PCIX_DEBNX2_PCICFG_MISC_STATUS_PCIX_DE (1L<<3) bnx2.h 　
25626
 BNX2_PCICFG_MISC_STATUS_PCIX_SPBNX2_PCICFG_MISC_STATUS_PCIX_SP (0x3L<<4) bnx2.h 　
25627
 BNX2_PCICFG_MISC_STATUS_PCIX_SPBNX2_PCICFG_MISC_STATUS_PCIX_SP (0L<<4) bnx2.h 　
25628
 BNX2_PCICFG_MISC_STATUS_PCIX_SPBNX2_PCICFG_MISC_STATUS_PCIX_SP (1L<<4) bnx2.h 　
25629
 BNX2_PCICFG_MISC_STATUS_PCIX_SPBNX2_PCICFG_MISC_STATUS_PCIX_SP (2L<<4) bnx2.h 　
25630
 BNX2_PCICFG_MISC_STATUS_PCIX_SPBNX2_PCICFG_MISC_STATUS_PCIX_SP (3L<<4) bnx2.h 　
25631
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B 0x00000070 bnx2.h 　
25632
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0xfL<<0) bnx2.h 　
25633
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0L<<0) bnx2.h 　
25634
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<0) bnx2.h 　
25635
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (2L<<0) bnx2.h 　
25636
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (3L<<0) bnx2.h 　
25637
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (4L<<0) bnx2.h 　
25638
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (5L<<0) bnx2.h 　
25639
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (6L<<0) bnx2.h 　
25640
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (7L<<0) bnx2.h 　
25641
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0xfL<<0) bnx2.h 　
25642
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<6) bnx2.h 　
25643
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<7) bnx2.h 　
25644
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0x7L<<8) bnx2.h 　
25645
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0L<<8) bnx2.h 　
25646
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<8) bnx2.h 　
25647
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (2L<<8) bnx2.h 　
25648
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (4L<<8) bnx2.h 　
25649
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<11) bnx2.h 　
25650
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0xfL<<12) bnx2.h 　
25651
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0L<<12) bnx2.h 　
25652
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<12) bnx2.h 　
25653
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (2L<<12) bnx2.h 　
25654
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (4L<<12) bnx2.h 　
25655
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (8L<<12) bnx2.h 　
25656
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<16) bnx2.h 　
25657
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<17) bnx2.h 　
25658
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<18) bnx2.h 　
25659
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (1L<<19) bnx2.h 　
25660
 BNX2_PCICFG_PCI_CLOCK_CONTROL_BBNX2_PCICFG_PCI_CLOCK_CONTROL_B (0xfffL<<20) bnx2.h 　
25661
 BNX2_PCICFG_REG_WINDOW_ADDRESSBNX2_PCICFG_REG_WINDOW_ADDRESS 0x00000078 bnx2.h 　
25662
 BNX2_PCICFG_REG_WINDOWBNX2_PCICFG_REG_WINDOW 0x00000080 bnx2.h 　
25663
 BNX2_PCICFG_INT_ACK_CMDBNX2_PCICFG_INT_ACK_CMD 0x00000084 bnx2.h 　
25664
 BNX2_PCICFG_INT_ACK_CMD_INDEXBNX2_PCICFG_INT_ACK_CMD_INDEX (0xffffL<<0) bnx2.h 　
25665
 BNX2_PCICFG_INT_ACK_CMD_INDEX_VBNX2_PCICFG_INT_ACK_CMD_INDEX_V (1L<<16) bnx2.h 　
25666
 BNX2_PCICFG_INT_ACK_CMD_USE_INTBNX2_PCICFG_INT_ACK_CMD_USE_INT (1L<<17) bnx2.h 　
25667
 BNX2_PCICFG_INT_ACK_CMD_MASK_INBNX2_PCICFG_INT_ACK_CMD_MASK_IN (1L<<18) bnx2.h 　
25668
 BNX2_PCICFG_STATUS_BIT_SET_CMDBNX2_PCICFG_STATUS_BIT_SET_CMD 0x00000088 bnx2.h 　
25669
 BNX2_PCICFG_STATUS_BIT_CLEAR_CMBNX2_PCICFG_STATUS_BIT_CLEAR_CM 0x0000008c bnx2.h 　
25670
 BNX2_PCICFG_MAILBOX_QUEUE_ADDRBNX2_PCICFG_MAILBOX_QUEUE_ADDR 0x00000090 bnx2.h 　
25671
 BNX2_PCICFG_MAILBOX_QUEUE_DATABNX2_PCICFG_MAILBOX_QUEUE_DATA 0x00000094 bnx2.h 　
25672
 BNX2_PCI_GRC_WINDOW_ADDRBNX2_PCI_GRC_WINDOW_ADDR 0x00000400 bnx2.h 　
25673
 BNX2_PCI_GRC_WINDOW_ADDR_PCI_GRBNX2_PCI_GRC_WINDOW_ADDR_PCI_GR (0x3ffffL<<8) bnx2.h 　
25674
 BNX2_PCI_CONFIG_1BNX2_PCI_CONFIG_1 0x00000404 bnx2.h 　
25675
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (0x7L<<8) bnx2.h 　
25676
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (0L<<8) bnx2.h 　
25677
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (1L<<8) bnx2.h 　
25678
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (2L<<8) bnx2.h 　
25679
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (3L<<8) bnx2.h 　
25680
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (4L<<8) bnx2.h 　
25681
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (5L<<8) bnx2.h 　
25682
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (6L<<8) bnx2.h 　
25683
 BNX2_PCI_CONFIG_1_READ_BOUNDARYBNX2_PCI_CONFIG_1_READ_BOUNDARY (7L<<8) bnx2.h 　
25684
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (0x7L<<11) bnx2.h 　
25685
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (0L<<11) bnx2.h 　
25686
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (1L<<11) bnx2.h 　
25687
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (2L<<11) bnx2.h 　
25688
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (3L<<11) bnx2.h 　
25689
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (4L<<11) bnx2.h 　
25690
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (5L<<11) bnx2.h 　
25691
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (6L<<11) bnx2.h 　
25692
 BNX2_PCI_CONFIG_1_WRITE_BOUNDARBNX2_PCI_CONFIG_1_WRITE_BOUNDAR (7L<<11) bnx2.h 　
25693
 BNX2_PCI_CONFIG_2BNX2_PCI_CONFIG_2 0x00000408 bnx2.h 　
25694
 BNX2_PCI_CONFIG_2_BAR1_SIZEBNX2_PCI_CONFIG_2_BAR1_SIZE (0xfL<<0) bnx2.h 　
25695
 BNX2_PCI_CONFIG_2_BAR1_SIZE_DISBNX2_PCI_CONFIG_2_BAR1_SIZE_DIS (0L<<0) bnx2.h 　
25696
 BNX2_PCI_CONFIG_2_BAR1_SIZE_64KBNX2_PCI_CONFIG_2_BAR1_SIZE_64K (1L<<0) bnx2.h 　
25697
 BNX2_PCI_CONFIG_2_BAR1_SIZE_128BNX2_PCI_CONFIG_2_BAR1_SIZE_128 (2L<<0) bnx2.h 　
25698
 BNX2_PCI_CONFIG_2_BAR1_SIZE_256BNX2_PCI_CONFIG_2_BAR1_SIZE_256 (3L<<0) bnx2.h 　
25699
 BNX2_PCI_CONFIG_2_BAR1_SIZE_512BNX2_PCI_CONFIG_2_BAR1_SIZE_512 (4L<<0) bnx2.h 　
25700
 BNX2_PCI_CONFIG_2_BAR1_SIZE_1MBNX2_PCI_CONFIG_2_BAR1_SIZE_1M (5L<<0) bnx2.h 　
25701
 BNX2_PCI_CONFIG_2_BAR1_SIZE_2MBNX2_PCI_CONFIG_2_BAR1_SIZE_2M (6L<<0) bnx2.h 　
25702
 BNX2_PCI_CONFIG_2_BAR1_SIZE_4MBNX2_PCI_CONFIG_2_BAR1_SIZE_4M (7L<<0) bnx2.h 　
25703
 BNX2_PCI_CONFIG_2_BAR1_SIZE_8MBNX2_PCI_CONFIG_2_BAR1_SIZE_8M (8L<<0) bnx2.h 　
25704
 BNX2_PCI_CONFIG_2_BAR1_SIZE_16MBNX2_PCI_CONFIG_2_BAR1_SIZE_16M (9L<<0) bnx2.h 　
25705
 BNX2_PCI_CONFIG_2_BAR1_SIZE_32MBNX2_PCI_CONFIG_2_BAR1_SIZE_32M (10L<<0) bnx2.h 　
25706
 BNX2_PCI_CONFIG_2_BAR1_SIZE_64MBNX2_PCI_CONFIG_2_BAR1_SIZE_64M (11L<<0) bnx2.h 　
25707
 BNX2_PCI_CONFIG_2_BAR1_SIZE_128BNX2_PCI_CONFIG_2_BAR1_SIZE_128 (12L<<0) bnx2.h 　
25708
 BNX2_PCI_CONFIG_2_BAR1_SIZE_256BNX2_PCI_CONFIG_2_BAR1_SIZE_256 (13L<<0) bnx2.h 　
25709
 BNX2_PCI_CONFIG_2_BAR1_SIZE_512BNX2_PCI_CONFIG_2_BAR1_SIZE_512 (14L<<0) bnx2.h 　
25710
 BNX2_PCI_CONFIG_2_BAR1_SIZE_1GBNX2_PCI_CONFIG_2_BAR1_SIZE_1G (15L<<0) bnx2.h 　
25711
 BNX2_PCI_CONFIG_2_BAR1_64ENABNX2_PCI_CONFIG_2_BAR1_64ENA (1L<<4) bnx2.h 　
25712
 BNX2_PCI_CONFIG_2_EXP_ROM_RETRYBNX2_PCI_CONFIG_2_EXP_ROM_RETRY (1L<<5) bnx2.h 　
25713
 BNX2_PCI_CONFIG_2_CFG_CYCLE_RETBNX2_PCI_CONFIG_2_CFG_CYCLE_RET (1L<<6) bnx2.h 　
25714
 BNX2_PCI_CONFIG_2_FIRST_CFG_DONBNX2_PCI_CONFIG_2_FIRST_CFG_DON (1L<<7) bnx2.h 　
25715
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZEBNX2_PCI_CONFIG_2_EXP_ROM_SIZE (0xffL<<8) bnx2.h 　
25716
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (0L<<8) bnx2.h 　
25717
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (1L<<8) bnx2.h 　
25718
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (2L<<8) bnx2.h 　
25719
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (3L<<8) bnx2.h 　
25720
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (4L<<8) bnx2.h 　
25721
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (5L<<8) bnx2.h 　
25722
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (6L<<8) bnx2.h 　
25723
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (7L<<8) bnx2.h 　
25724
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (8L<<8) bnx2.h 　
25725
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (9L<<8) bnx2.h 　
25726
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (10L<<8) bnx2.h 　
25727
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (11L<<8) bnx2.h 　
25728
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (12L<<8) bnx2.h 　
25729
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (13L<<8) bnx2.h 　
25730
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (14L<<8) bnx2.h 　
25731
 BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_ (15L<<8) bnx2.h 　
25732
 BNX2_PCI_CONFIG_2_MAX_SPLIT_LIMBNX2_PCI_CONFIG_2_MAX_SPLIT_LIM (0x1fL<<16) bnx2.h 　
25733
 BNX2_PCI_CONFIG_2_MAX_READ_LIMIBNX2_PCI_CONFIG_2_MAX_READ_LIMI (0x3L<<21) bnx2.h 　
25734
 BNX2_PCI_CONFIG_2_MAX_READ_LIMIBNX2_PCI_CONFIG_2_MAX_READ_LIMI (0L<<21) bnx2.h 　
25735
 BNX2_PCI_CONFIG_2_MAX_READ_LIMIBNX2_PCI_CONFIG_2_MAX_READ_LIMI (1L<<21) bnx2.h 　
25736
 BNX2_PCI_CONFIG_2_MAX_READ_LIMIBNX2_PCI_CONFIG_2_MAX_READ_LIMI (2L<<21) bnx2.h 　
25737
 BNX2_PCI_CONFIG_2_MAX_READ_LIMIBNX2_PCI_CONFIG_2_MAX_READ_LIMI (3L<<21) bnx2.h 　
25738
 BNX2_PCI_CONFIG_2_FORCE_32_BIT_BNX2_PCI_CONFIG_2_FORCE_32_BIT_ (1L<<23) bnx2.h 　
25739
 BNX2_PCI_CONFIG_2_FORCE_32_BIT_BNX2_PCI_CONFIG_2_FORCE_32_BIT_ (1L<<24) bnx2.h 　
25740
 BNX2_PCI_CONFIG_2_KEEP_REQ_ASSEBNX2_PCI_CONFIG_2_KEEP_REQ_ASSE (1L<<25) bnx2.h 　
25741
 BNX2_PCI_CONFIG_3BNX2_PCI_CONFIG_3 0x0000040c bnx2.h 　
25742
 BNX2_PCI_CONFIG_3_STICKY_BYTEBNX2_PCI_CONFIG_3_STICKY_BYTE (0xffL<<0) bnx2.h 　
25743
 BNX2_PCI_CONFIG_3_FORCE_PMEBNX2_PCI_CONFIG_3_FORCE_PME (1L<<24) bnx2.h 　
25744
 BNX2_PCI_CONFIG_3_PME_STATUSBNX2_PCI_CONFIG_3_PME_STATUS (1L<<25) bnx2.h 　
25745
 BNX2_PCI_CONFIG_3_PME_ENABLEBNX2_PCI_CONFIG_3_PME_ENABLE (1L<<26) bnx2.h 　
25746
 BNX2_PCI_CONFIG_3_PM_STATEBNX2_PCI_CONFIG_3_PM_STATE (0x3L<<27) bnx2.h 　
25747
 BNX2_PCI_CONFIG_3_VAUX_PRESETBNX2_PCI_CONFIG_3_VAUX_PRESET (1L<<30) bnx2.h 　
25748
 BNX2_PCI_CONFIG_3_PCI_POWERBNX2_PCI_CONFIG_3_PCI_POWER (1L<<31) bnx2.h 　
25749
 BNX2_PCI_PM_DATA_ABNX2_PCI_PM_DATA_A 0x00000410 bnx2.h 　
25750
 BNX2_PCI_PM_DATA_A_PM_DATA_0_PRBNX2_PCI_PM_DATA_A_PM_DATA_0_PR (0xffL<<0) bnx2.h 　
25751
 BNX2_PCI_PM_DATA_A_PM_DATA_1_PRBNX2_PCI_PM_DATA_A_PM_DATA_1_PR (0xffL<<8) bnx2.h 　
25752
 BNX2_PCI_PM_DATA_A_PM_DATA_2_PRBNX2_PCI_PM_DATA_A_PM_DATA_2_PR (0xffL<<16) bnx2.h 　
25753
 BNX2_PCI_PM_DATA_A_PM_DATA_3_PRBNX2_PCI_PM_DATA_A_PM_DATA_3_PR (0xffL<<24) bnx2.h 　
25754
 BNX2_PCI_PM_DATA_BBNX2_PCI_PM_DATA_B 0x00000414 bnx2.h 　
25755
 BNX2_PCI_PM_DATA_B_PM_DATA_4_PRBNX2_PCI_PM_DATA_B_PM_DATA_4_PR (0xffL<<0) bnx2.h 　
25756
 BNX2_PCI_PM_DATA_B_PM_DATA_5_PRBNX2_PCI_PM_DATA_B_PM_DATA_5_PR (0xffL<<8) bnx2.h 　
25757
 BNX2_PCI_PM_DATA_B_PM_DATA_6_PRBNX2_PCI_PM_DATA_B_PM_DATA_6_PR (0xffL<<16) bnx2.h 　
25758
 BNX2_PCI_PM_DATA_B_PM_DATA_7_PRBNX2_PCI_PM_DATA_B_PM_DATA_7_PR (0xffL<<24) bnx2.h 　
25759
 BNX2_PCI_SWAP_DIAG0BNX2_PCI_SWAP_DIAG0 0x00000418 bnx2.h 　
25760
 BNX2_PCI_SWAP_DIAG1BNX2_PCI_SWAP_DIAG1 0x0000041c bnx2.h 　
25761
 BNX2_PCI_EXP_ROM_ADDRBNX2_PCI_EXP_ROM_ADDR 0x00000420 bnx2.h 　
25762
 BNX2_PCI_EXP_ROM_ADDR_ADDRESSBNX2_PCI_EXP_ROM_ADDR_ADDRESS (0x3fffffL<<2) bnx2.h 　
25763
 BNX2_PCI_EXP_ROM_ADDR_REQBNX2_PCI_EXP_ROM_ADDR_REQ (1L<<31) bnx2.h 　
25764
 BNX2_PCI_EXP_ROM_DATABNX2_PCI_EXP_ROM_DATA 0x00000424 bnx2.h 　
25765
 BNX2_PCI_VPD_INTFBNX2_PCI_VPD_INTF 0x00000428 bnx2.h 　
25766
 BNX2_PCI_VPD_INTF_INTF_REQBNX2_PCI_VPD_INTF_INTF_REQ (1L<<0) bnx2.h 　
25767
 BNX2_PCI_VPD_ADDR_FLAGBNX2_PCI_VPD_ADDR_FLAG 0x0000042c bnx2.h 　
25768
 BNX2_PCI_VPD_ADDR_FLAG_ADDRESSBNX2_PCI_VPD_ADDR_FLAG_ADDRESS (0x1fff<<2) bnx2.h 　
25769
 BNX2_PCI_VPD_ADDR_FLAG_WRBNX2_PCI_VPD_ADDR_FLAG_WR (1<<15) bnx2.h 　
25770
 BNX2_PCI_VPD_DATABNX2_PCI_VPD_DATA 0x00000430 bnx2.h 　
25771
 BNX2_PCI_ID_VAL1BNX2_PCI_ID_VAL1 0x00000434 bnx2.h 　
25772
 BNX2_PCI_ID_VAL1_DEVICE_IDBNX2_PCI_ID_VAL1_DEVICE_ID (0xffffL<<0) bnx2.h 　
25773
 BNX2_PCI_ID_VAL1_VENDOR_IDBNX2_PCI_ID_VAL1_VENDOR_ID (0xffffL<<16) bnx2.h 　
25774
 BNX2_PCI_ID_VAL2BNX2_PCI_ID_VAL2 0x00000438 bnx2.h 　
25775
 BNX2_PCI_ID_VAL2_SUBSYSTEM_VENDBNX2_PCI_ID_VAL2_SUBSYSTEM_VEND (0xffffL<<0) bnx2.h 　
25776
 BNX2_PCI_ID_VAL2_SUBSYSTEM_IDBNX2_PCI_ID_VAL2_SUBSYSTEM_ID (0xffffL<<16) bnx2.h 　
25777
 BNX2_PCI_ID_VAL3BNX2_PCI_ID_VAL3 0x0000043c bnx2.h 　
25778
 BNX2_PCI_ID_VAL3_CLASS_CODEBNX2_PCI_ID_VAL3_CLASS_CODE (0xffffffL<<0) bnx2.h 　
25779
 BNX2_PCI_ID_VAL3_REVISION_IDBNX2_PCI_ID_VAL3_REVISION_ID (0xffL<<24) bnx2.h 　
25780
 BNX2_PCI_ID_VAL4BNX2_PCI_ID_VAL4 0x00000440 bnx2.h 　
25781
 BNX2_PCI_ID_VAL4_CAP_ENABNX2_PCI_ID_VAL4_CAP_ENA (0xfL<<0) bnx2.h 　
25782
 BNX2_PCI_ID_VAL4_CAP_ENA_0BNX2_PCI_ID_VAL4_CAP_ENA_0 (0L<<0) bnx2.h 　
25783
 BNX2_PCI_ID_VAL4_CAP_ENA_1BNX2_PCI_ID_VAL4_CAP_ENA_1 (1L<<0) bnx2.h 　
25784
 BNX2_PCI_ID_VAL4_CAP_ENA_2BNX2_PCI_ID_VAL4_CAP_ENA_2 (2L<<0) bnx2.h 　
25785
 BNX2_PCI_ID_VAL4_CAP_ENA_3BNX2_PCI_ID_VAL4_CAP_ENA_3 (3L<<0) bnx2.h 　
25786
 BNX2_PCI_ID_VAL4_CAP_ENA_4BNX2_PCI_ID_VAL4_CAP_ENA_4 (4L<<0) bnx2.h 　
25787
 BNX2_PCI_ID_VAL4_CAP_ENA_5BNX2_PCI_ID_VAL4_CAP_ENA_5 (5L<<0) bnx2.h 　
25788
 BNX2_PCI_ID_VAL4_CAP_ENA_6BNX2_PCI_ID_VAL4_CAP_ENA_6 (6L<<0) bnx2.h 　
25789
 BNX2_PCI_ID_VAL4_CAP_ENA_7BNX2_PCI_ID_VAL4_CAP_ENA_7 (7L<<0) bnx2.h 　
25790
 BNX2_PCI_ID_VAL4_CAP_ENA_8BNX2_PCI_ID_VAL4_CAP_ENA_8 (8L<<0) bnx2.h 　
25791
 BNX2_PCI_ID_VAL4_CAP_ENA_9BNX2_PCI_ID_VAL4_CAP_ENA_9 (9L<<0) bnx2.h 　
25792
 BNX2_PCI_ID_VAL4_CAP_ENA_10BNX2_PCI_ID_VAL4_CAP_ENA_10 (10L<<0) bnx2.h 　
25793
 BNX2_PCI_ID_VAL4_CAP_ENA_11BNX2_PCI_ID_VAL4_CAP_ENA_11 (11L<<0) bnx2.h 　
25794
 BNX2_PCI_ID_VAL4_CAP_ENA_12BNX2_PCI_ID_VAL4_CAP_ENA_12 (12L<<0) bnx2.h 　
25795
 BNX2_PCI_ID_VAL4_CAP_ENA_13BNX2_PCI_ID_VAL4_CAP_ENA_13 (13L<<0) bnx2.h 　
25796
 BNX2_PCI_ID_VAL4_CAP_ENA_14BNX2_PCI_ID_VAL4_CAP_ENA_14 (14L<<0) bnx2.h 　
25797
 BNX2_PCI_ID_VAL4_CAP_ENA_15BNX2_PCI_ID_VAL4_CAP_ENA_15 (15L<<0) bnx2.h 　
25798
 BNX2_PCI_ID_VAL4_PM_SCALE_PRGBNX2_PCI_ID_VAL4_PM_SCALE_PRG (0x3L<<6) bnx2.h 　
25799
 BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0 (0L<<6) bnx2.h 　
25800
 BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1 (1L<<6) bnx2.h 　
25801
 BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2 (2L<<6) bnx2.h 　
25802
 BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3 (3L<<6) bnx2.h 　
25803
 BNX2_PCI_ID_VAL4_MSI_LIMITBNX2_PCI_ID_VAL4_MSI_LIMIT (0x7L<<9) bnx2.h 　
25804
 BNX2_PCI_ID_VAL4_MSI_ADVERTIZEBNX2_PCI_ID_VAL4_MSI_ADVERTIZE (0x7L<<12) bnx2.h 　
25805
 BNX2_PCI_ID_VAL4_MSI_ENABLEBNX2_PCI_ID_VAL4_MSI_ENABLE (1L<<15) bnx2.h 　
25806
 BNX2_PCI_ID_VAL4_MAX_64_ADVERTIBNX2_PCI_ID_VAL4_MAX_64_ADVERTI (1L<<16) bnx2.h 　
25807
 BNX2_PCI_ID_VAL4_MAX_133_ADVERTBNX2_PCI_ID_VAL4_MAX_133_ADVERT (1L<<17) bnx2.h 　
25808
 BNX2_PCI_ID_VAL4_MAX_MEM_READ_SBNX2_PCI_ID_VAL4_MAX_MEM_READ_S (0x3L<<21) bnx2.h 　
25809
 BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZEBNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE (0x7L<<23) bnx2.h 　
25810
 BNX2_PCI_ID_VAL4_MAX_CUMULATIVEBNX2_PCI_ID_VAL4_MAX_CUMULATIVE (0x7L<<26) bnx2.h 　
25811
 BNX2_PCI_ID_VAL5BNX2_PCI_ID_VAL5 0x00000444 bnx2.h 　
25812
 BNX2_PCI_ID_VAL5_D1_SUPPORTBNX2_PCI_ID_VAL5_D1_SUPPORT (1L<<0) bnx2.h 　
25813
 BNX2_PCI_ID_VAL5_D2_SUPPORTBNX2_PCI_ID_VAL5_D2_SUPPORT (1L<<1) bnx2.h 　
25814
 BNX2_PCI_ID_VAL5_PME_IN_D0BNX2_PCI_ID_VAL5_PME_IN_D0 (1L<<2) bnx2.h 　
25815
 BNX2_PCI_ID_VAL5_PME_IN_D1BNX2_PCI_ID_VAL5_PME_IN_D1 (1L<<3) bnx2.h 　
25816
 BNX2_PCI_ID_VAL5_PME_IN_D2BNX2_PCI_ID_VAL5_PME_IN_D2 (1L<<4) bnx2.h 　
25817
 BNX2_PCI_ID_VAL5_PME_IN_D3_HOTBNX2_PCI_ID_VAL5_PME_IN_D3_HOT (1L<<5) bnx2.h 　
25818
 BNX2_PCI_PCIX_EXTENDED_STATUSBNX2_PCI_PCIX_EXTENDED_STATUS 0x00000448 bnx2.h 　
25819
 BNX2_PCI_PCIX_EXTENDED_STATUS_NBNX2_PCI_PCIX_EXTENDED_STATUS_N (1L<<8) bnx2.h 　
25820
 BNX2_PCI_PCIX_EXTENDED_STATUS_LBNX2_PCI_PCIX_EXTENDED_STATUS_L (1L<<9) bnx2.h 　
25821
 BNX2_PCI_PCIX_EXTENDED_STATUS_SBNX2_PCI_PCIX_EXTENDED_STATUS_S (0xfL<<16) bnx2.h 　
25822
 BNX2_PCI_PCIX_EXTENDED_STATUS_SBNX2_PCI_PCIX_EXTENDED_STATUS_S (0xffL<<24) bnx2.h 　
25823
 BNX2_PCI_ID_VAL6BNX2_PCI_ID_VAL6 0x0000044c bnx2.h 　
25824
 BNX2_PCI_ID_VAL6_MAX_LATBNX2_PCI_ID_VAL6_MAX_LAT (0xffL<<0) bnx2.h 　
25825
 BNX2_PCI_ID_VAL6_MIN_GNTBNX2_PCI_ID_VAL6_MIN_GNT (0xffL<<8) bnx2.h 　
25826
 BNX2_PCI_ID_VAL6_BISTBNX2_PCI_ID_VAL6_BIST (0xffL<<16) bnx2.h 　
25827
 BNX2_PCI_MSI_DATABNX2_PCI_MSI_DATA 0x00000450 bnx2.h 　
25828
 BNX2_PCI_MSI_DATA_PCI_MSI_DATABNX2_PCI_MSI_DATA_PCI_MSI_DATA (0xffffL<<0) bnx2.h 　
25829
 BNX2_PCI_MSI_ADDR_HBNX2_PCI_MSI_ADDR_H 0x00000454 bnx2.h 　
25830
 BNX2_PCI_MSI_ADDR_LBNX2_PCI_MSI_ADDR_L 0x00000458 bnx2.h 　
25831
 BNX2_MISC_COMMANDBNX2_MISC_COMMAND 0x00000800 bnx2.h 　
25832
 BNX2_MISC_COMMAND_ENABLE_ALLBNX2_MISC_COMMAND_ENABLE_ALL (1L<<0) bnx2.h 　
25833
 BNX2_MISC_COMMAND_DISABLE_ALLBNX2_MISC_COMMAND_DISABLE_ALL (1L<<1) bnx2.h 　
25834
 BNX2_MISC_COMMAND_CORE_RESETBNX2_MISC_COMMAND_CORE_RESET (1L<<4) bnx2.h 　
25835
 BNX2_MISC_COMMAND_HARD_RESETBNX2_MISC_COMMAND_HARD_RESET (1L<<5) bnx2.h 　
25836
 BNX2_MISC_COMMAND_PAR_ERRORBNX2_MISC_COMMAND_PAR_ERROR (1L<<8) bnx2.h 　
25837
 BNX2_MISC_COMMAND_PAR_ERR_RAMBNX2_MISC_COMMAND_PAR_ERR_RAM (0x7fL<<16) bnx2.h 　
25838
 BNX2_MISC_CFGBNX2_MISC_CFG 0x00000804 bnx2.h 　
25839
 BNX2_MISC_CFG_PCI_GRC_TMOUTBNX2_MISC_CFG_PCI_GRC_TMOUT (1L<<0) bnx2.h 　
25840
 BNX2_MISC_CFG_NVM_WR_ENBNX2_MISC_CFG_NVM_WR_EN (0x3L<<1) bnx2.h 　
25841
 BNX2_MISC_CFG_NVM_WR_EN_PROTECTBNX2_MISC_CFG_NVM_WR_EN_PROTECT (0L<<1) bnx2.h 　
25842
 BNX2_MISC_CFG_NVM_WR_EN_PCIBNX2_MISC_CFG_NVM_WR_EN_PCI (1L<<1) bnx2.h 　
25843
 BNX2_MISC_CFG_NVM_WR_EN_ALLOWBNX2_MISC_CFG_NVM_WR_EN_ALLOW (2L<<1) bnx2.h 　
25844
 BNX2_MISC_CFG_NVM_WR_EN_ALLOW2BNX2_MISC_CFG_NVM_WR_EN_ALLOW2 (3L<<1) bnx2.h 　
25845
 BNX2_MISC_CFG_BIST_ENBNX2_MISC_CFG_BIST_EN (1L<<3) bnx2.h 　
25846
 BNX2_MISC_CFG_CK25_OUT_ALT_SRCBNX2_MISC_CFG_CK25_OUT_ALT_SRC (1L<<4) bnx2.h 　
25847
 BNX2_MISC_CFG_BYPASS_BSCANBNX2_MISC_CFG_BYPASS_BSCAN (1L<<5) bnx2.h 　
25848
 BNX2_MISC_CFG_BYPASS_EJTAGBNX2_MISC_CFG_BYPASS_EJTAG (1L<<6) bnx2.h 　
25849
 BNX2_MISC_CFG_CLK_CTL_OVERRIDEBNX2_MISC_CFG_CLK_CTL_OVERRIDE (1L<<7) bnx2.h 　
25850
 BNX2_MISC_CFG_LEDMODEBNX2_MISC_CFG_LEDMODE (0x3L<<8) bnx2.h 　
25851
 BNX2_MISC_CFG_LEDMODE_MACBNX2_MISC_CFG_LEDMODE_MAC (0L<<8) bnx2.h 　
25852
 BNX2_MISC_CFG_LEDMODE_GPHY1BNX2_MISC_CFG_LEDMODE_GPHY1 (1L<<8) bnx2.h 　
25853
 BNX2_MISC_CFG_LEDMODE_GPHY2BNX2_MISC_CFG_LEDMODE_GPHY2 (2L<<8) bnx2.h 　
25854
 BNX2_MISC_IDBNX2_MISC_ID 0x00000808 bnx2.h 　
25855
 BNX2_MISC_ID_BOND_IDBNX2_MISC_ID_BOND_ID (0xfL<<0) bnx2.h 　
25856
 BNX2_MISC_ID_CHIP_METALBNX2_MISC_ID_CHIP_METAL (0xffL<<4) bnx2.h 　
25857
 BNX2_MISC_ID_CHIP_REVBNX2_MISC_ID_CHIP_REV (0xfL<<12) bnx2.h 　
25858
 BNX2_MISC_ID_CHIP_NUMBNX2_MISC_ID_CHIP_NUM (0xffffL<<16) bnx2.h 　
25859
 BNX2_MISC_ENABLE_STATUS_BITSBNX2_MISC_ENABLE_STATUS_BITS 0x0000080c bnx2.h 　
25860
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<0) bnx2.h 　
25861
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<1) bnx2.h 　
25862
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<2) bnx2.h 　
25863
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<3) bnx2.h 　
25864
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<4) bnx2.h 　
25865
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<5) bnx2.h 　
25866
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<6) bnx2.h 　
25867
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<7) bnx2.h 　
25868
 BNX2_MISC_ENABLE_STATUS_BITS_TXBNX2_MISC_ENABLE_STATUS_BITS_TX (1L<<8) bnx2.h 　
25869
 BNX2_MISC_ENABLE_STATUS_BITS_EMBNX2_MISC_ENABLE_STATUS_BITS_EM (1L<<9) bnx2.h 　
25870
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<10) bnx2.h 　
25871
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<11) bnx2.h 　
25872
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<12) bnx2.h 　
25873
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<13) bnx2.h 　
25874
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<14) bnx2.h 　
25875
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<15) bnx2.h 　
25876
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<16) bnx2.h 　
25877
 BNX2_MISC_ENABLE_STATUS_BITS_RXBNX2_MISC_ENABLE_STATUS_BITS_RX (1L<<17) bnx2.h 　
25878
 BNX2_MISC_ENABLE_STATUS_BITS_COBNX2_MISC_ENABLE_STATUS_BITS_CO (1L<<18) bnx2.h 　
25879
 BNX2_MISC_ENABLE_STATUS_BITS_HOBNX2_MISC_ENABLE_STATUS_BITS_HO (1L<<19) bnx2.h 　
25880
 BNX2_MISC_ENABLE_STATUS_BITS_MABNX2_MISC_ENABLE_STATUS_BITS_MA (1L<<20) bnx2.h 　
25881
 BNX2_MISC_ENABLE_STATUS_BITS_COBNX2_MISC_ENABLE_STATUS_BITS_CO (1L<<21) bnx2.h 　
25882
 BNX2_MISC_ENABLE_STATUS_BITS_CMBNX2_MISC_ENABLE_STATUS_BITS_CM (1L<<22) bnx2.h 　
25883
 BNX2_MISC_ENABLE_STATUS_BITS_CMBNX2_MISC_ENABLE_STATUS_BITS_CM (1L<<23) bnx2.h 　
25884
 BNX2_MISC_ENABLE_STATUS_BITS_MGBNX2_MISC_ENABLE_STATUS_BITS_MG (1L<<24) bnx2.h 　
25885
 BNX2_MISC_ENABLE_STATUS_BITS_TIBNX2_MISC_ENABLE_STATUS_BITS_TI (1L<<25) bnx2.h 　
25886
 BNX2_MISC_ENABLE_STATUS_BITS_DMBNX2_MISC_ENABLE_STATUS_BITS_DM (1L<<26) bnx2.h 　
25887
 BNX2_MISC_ENABLE_STATUS_BITS_UMBNX2_MISC_ENABLE_STATUS_BITS_UM (1L<<27) bnx2.h 　
25888
 BNX2_MISC_ENABLE_SET_BITSBNX2_MISC_ENABLE_SET_BITS 0x00000810 bnx2.h 　
25889
 BNX2_MISC_ENABLE_SET_BITS_TX_SCBNX2_MISC_ENABLE_SET_BITS_TX_SC (1L<<0) bnx2.h 　
25890
 BNX2_MISC_ENABLE_SET_BITS_TX_BDBNX2_MISC_ENABLE_SET_BITS_TX_BD (1L<<1) bnx2.h 　
25891
 BNX2_MISC_ENABLE_SET_BITS_TX_BDBNX2_MISC_ENABLE_SET_BITS_TX_BD (1L<<2) bnx2.h 　
25892
 BNX2_MISC_ENABLE_SET_BITS_TX_PRBNX2_MISC_ENABLE_SET_BITS_TX_PR (1L<<3) bnx2.h 　
25893
 BNX2_MISC_ENABLE_SET_BITS_TX_DMBNX2_MISC_ENABLE_SET_BITS_TX_DM (1L<<4) bnx2.h 　
25894
 BNX2_MISC_ENABLE_SET_BITS_TX_PABNX2_MISC_ENABLE_SET_BITS_TX_PA (1L<<5) bnx2.h 　
25895
 BNX2_MISC_ENABLE_SET_BITS_TX_PABNX2_MISC_ENABLE_SET_BITS_TX_PA (1L<<6) bnx2.h 　
25896
 BNX2_MISC_ENABLE_SET_BITS_TX_HEBNX2_MISC_ENABLE_SET_BITS_TX_HE (1L<<7) bnx2.h 　
25897
 BNX2_MISC_ENABLE_SET_BITS_TX_ASBNX2_MISC_ENABLE_SET_BITS_TX_AS (1L<<8) bnx2.h 　
25898
 BNX2_MISC_ENABLE_SET_BITS_EMAC_BNX2_MISC_ENABLE_SET_BITS_EMAC_ (1L<<9) bnx2.h 　
25899
 BNX2_MISC_ENABLE_SET_BITS_RX_PABNX2_MISC_ENABLE_SET_BITS_RX_PA (1L<<10) bnx2.h 　
25900
 BNX2_MISC_ENABLE_SET_BITS_RX_PABNX2_MISC_ENABLE_SET_BITS_RX_PA (1L<<11) bnx2.h 　
25901
 BNX2_MISC_ENABLE_SET_BITS_RX_MBBNX2_MISC_ENABLE_SET_BITS_RX_MB (1L<<12) bnx2.h 　
25902
 BNX2_MISC_ENABLE_SET_BITS_RX_LOBNX2_MISC_ENABLE_SET_BITS_RX_LO (1L<<13) bnx2.h 　
25903
 BNX2_MISC_ENABLE_SET_BITS_RX_PRBNX2_MISC_ENABLE_SET_BITS_RX_PR (1L<<14) bnx2.h 　
25904
 BNX2_MISC_ENABLE_SET_BITS_RX_V2BNX2_MISC_ENABLE_SET_BITS_RX_V2 (1L<<15) bnx2.h 　
25905
 BNX2_MISC_ENABLE_SET_BITS_RX_BDBNX2_MISC_ENABLE_SET_BITS_RX_BD (1L<<16) bnx2.h 　
25906
 BNX2_MISC_ENABLE_SET_BITS_RX_DMBNX2_MISC_ENABLE_SET_BITS_RX_DM (1L<<17) bnx2.h 　
25907
 BNX2_MISC_ENABLE_SET_BITS_COMPLBNX2_MISC_ENABLE_SET_BITS_COMPL (1L<<18) bnx2.h 　
25908
 BNX2_MISC_ENABLE_SET_BITS_HOST_BNX2_MISC_ENABLE_SET_BITS_HOST_ (1L<<19) bnx2.h 　
25909
 BNX2_MISC_ENABLE_SET_BITS_MAILBBNX2_MISC_ENABLE_SET_BITS_MAILB (1L<<20) bnx2.h 　
25910
 BNX2_MISC_ENABLE_SET_BITS_CONTEBNX2_MISC_ENABLE_SET_BITS_CONTE (1L<<21) bnx2.h 　
25911
 BNX2_MISC_ENABLE_SET_BITS_CMD_SBNX2_MISC_ENABLE_SET_BITS_CMD_S (1L<<22) bnx2.h 　
25912
 BNX2_MISC_ENABLE_SET_BITS_CMD_PBNX2_MISC_ENABLE_SET_BITS_CMD_P (1L<<23) bnx2.h 　
25913
 BNX2_MISC_ENABLE_SET_BITS_MGMT_BNX2_MISC_ENABLE_SET_BITS_MGMT_ (1L<<24) bnx2.h 　
25914
 BNX2_MISC_ENABLE_SET_BITS_TIMERBNX2_MISC_ENABLE_SET_BITS_TIMER (1L<<25) bnx2.h 　
25915
 BNX2_MISC_ENABLE_SET_BITS_DMA_EBNX2_MISC_ENABLE_SET_BITS_DMA_E (1L<<26) bnx2.h 　
25916
 BNX2_MISC_ENABLE_SET_BITS_UMP_EBNX2_MISC_ENABLE_SET_BITS_UMP_E (1L<<27) bnx2.h 　
25917
 BNX2_MISC_ENABLE_CLR_BITSBNX2_MISC_ENABLE_CLR_BITS 0x00000814 bnx2.h 　
25918
 BNX2_MISC_ENABLE_CLR_BITS_TX_SCBNX2_MISC_ENABLE_CLR_BITS_TX_SC (1L<<0) bnx2.h 　
25919
 BNX2_MISC_ENABLE_CLR_BITS_TX_BDBNX2_MISC_ENABLE_CLR_BITS_TX_BD (1L<<1) bnx2.h 　
25920
 BNX2_MISC_ENABLE_CLR_BITS_TX_BDBNX2_MISC_ENABLE_CLR_BITS_TX_BD (1L<<2) bnx2.h 　
25921
 BNX2_MISC_ENABLE_CLR_BITS_TX_PRBNX2_MISC_ENABLE_CLR_BITS_TX_PR (1L<<3) bnx2.h 　
25922
 BNX2_MISC_ENABLE_CLR_BITS_TX_DMBNX2_MISC_ENABLE_CLR_BITS_TX_DM (1L<<4) bnx2.h 　
25923
 BNX2_MISC_ENABLE_CLR_BITS_TX_PABNX2_MISC_ENABLE_CLR_BITS_TX_PA (1L<<5) bnx2.h 　
25924
 BNX2_MISC_ENABLE_CLR_BITS_TX_PABNX2_MISC_ENABLE_CLR_BITS_TX_PA (1L<<6) bnx2.h 　
25925
 BNX2_MISC_ENABLE_CLR_BITS_TX_HEBNX2_MISC_ENABLE_CLR_BITS_TX_HE (1L<<7) bnx2.h 　
25926
 BNX2_MISC_ENABLE_CLR_BITS_TX_ASBNX2_MISC_ENABLE_CLR_BITS_TX_AS (1L<<8) bnx2.h 　
25927
 BNX2_MISC_ENABLE_CLR_BITS_EMAC_BNX2_MISC_ENABLE_CLR_BITS_EMAC_ (1L<<9) bnx2.h 　
25928
 BNX2_MISC_ENABLE_CLR_BITS_RX_PABNX2_MISC_ENABLE_CLR_BITS_RX_PA (1L<<10) bnx2.h 　
25929
 BNX2_MISC_ENABLE_CLR_BITS_RX_PABNX2_MISC_ENABLE_CLR_BITS_RX_PA (1L<<11) bnx2.h 　
25930
 BNX2_MISC_ENABLE_CLR_BITS_RX_MBBNX2_MISC_ENABLE_CLR_BITS_RX_MB (1L<<12) bnx2.h 　
25931
 BNX2_MISC_ENABLE_CLR_BITS_RX_LOBNX2_MISC_ENABLE_CLR_BITS_RX_LO (1L<<13) bnx2.h 　
25932
 BNX2_MISC_ENABLE_CLR_BITS_RX_PRBNX2_MISC_ENABLE_CLR_BITS_RX_PR (1L<<14) bnx2.h 　
25933
 BNX2_MISC_ENABLE_CLR_BITS_RX_V2BNX2_MISC_ENABLE_CLR_BITS_RX_V2 (1L<<15) bnx2.h 　
25934
 BNX2_MISC_ENABLE_CLR_BITS_RX_BDBNX2_MISC_ENABLE_CLR_BITS_RX_BD (1L<<16) bnx2.h 　
25935
 BNX2_MISC_ENABLE_CLR_BITS_RX_DMBNX2_MISC_ENABLE_CLR_BITS_RX_DM (1L<<17) bnx2.h 　
25936
 BNX2_MISC_ENABLE_CLR_BITS_COMPLBNX2_MISC_ENABLE_CLR_BITS_COMPL (1L<<18) bnx2.h 　
25937
 BNX2_MISC_ENABLE_CLR_BITS_HOST_BNX2_MISC_ENABLE_CLR_BITS_HOST_ (1L<<19) bnx2.h 　
25938
 BNX2_MISC_ENABLE_CLR_BITS_MAILBBNX2_MISC_ENABLE_CLR_BITS_MAILB (1L<<20) bnx2.h 　
25939
 BNX2_MISC_ENABLE_CLR_BITS_CONTEBNX2_MISC_ENABLE_CLR_BITS_CONTE (1L<<21) bnx2.h 　
25940
 BNX2_MISC_ENABLE_CLR_BITS_CMD_SBNX2_MISC_ENABLE_CLR_BITS_CMD_S (1L<<22) bnx2.h 　
25941
 BNX2_MISC_ENABLE_CLR_BITS_CMD_PBNX2_MISC_ENABLE_CLR_BITS_CMD_P (1L<<23) bnx2.h 　
25942
 BNX2_MISC_ENABLE_CLR_BITS_MGMT_BNX2_MISC_ENABLE_CLR_BITS_MGMT_ (1L<<24) bnx2.h 　
25943
 BNX2_MISC_ENABLE_CLR_BITS_TIMERBNX2_MISC_ENABLE_CLR_BITS_TIMER (1L<<25) bnx2.h 　
25944
 BNX2_MISC_ENABLE_CLR_BITS_DMA_EBNX2_MISC_ENABLE_CLR_BITS_DMA_E (1L<<26) bnx2.h 　
25945
 BNX2_MISC_ENABLE_CLR_BITS_UMP_EBNX2_MISC_ENABLE_CLR_BITS_UMP_E (1L<<27) bnx2.h 　
25946
 BNX2_MISC_CLOCK_CONTROL_BITSBNX2_MISC_CLOCK_CONTROL_BITS 0x00000818 bnx2.h 　
25947
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (0xfL<<0) bnx2.h 　
25948
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (0L<<0) bnx2.h 　
25949
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (1L<<0) bnx2.h 　
25950
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (2L<<0) bnx2.h 　
25951
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (3L<<0) bnx2.h 　
25952
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (4L<<0) bnx2.h 　
25953
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (5L<<0) bnx2.h 　
25954
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (6L<<0) bnx2.h 　
25955
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (7L<<0) bnx2.h 　
25956
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (0xfL<<0) bnx2.h 　
25957
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (1L<<6) bnx2.h 　
25958
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (1L<<7) bnx2.h 　
25959
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (0x7L<<8) bnx2.h 　
25960
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (0L<<8) bnx2.h 　
25961
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (1L<<8) bnx2.h 　
25962
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (2L<<8) bnx2.h 　
25963
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (4L<<8) bnx2.h 　
25964
 BNX2_MISC_CLOCK_CONTROL_BITS_PLBNX2_MISC_CLOCK_CONTROL_BITS_PL (1L<<11) bnx2.h 　
25965
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (0xfL<<12) bnx2.h 　
25966
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (0L<<12) bnx2.h 　
25967
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (1L<<12) bnx2.h 　
25968
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (2L<<12) bnx2.h 　
25969
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (4L<<12) bnx2.h 　
25970
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (8L<<12) bnx2.h 　
25971
 BNX2_MISC_CLOCK_CONTROL_BITS_COBNX2_MISC_CLOCK_CONTROL_BITS_CO (1L<<16) bnx2.h 　
25972
 BNX2_MISC_CLOCK_CONTROL_BITS_PCBNX2_MISC_CLOCK_CONTROL_BITS_PC (1L<<17) bnx2.h 　
25973
 BNX2_MISC_CLOCK_CONTROL_BITS_REBNX2_MISC_CLOCK_CONTROL_BITS_RE (1L<<18) bnx2.h 　
25974
 BNX2_MISC_CLOCK_CONTROL_BITS_USBNX2_MISC_CLOCK_CONTROL_BITS_US (1L<<19) bnx2.h 　
25975
 BNX2_MISC_CLOCK_CONTROL_BITS_REBNX2_MISC_CLOCK_CONTROL_BITS_RE (0xfffL<<20) bnx2.h 　
25976
 BNX2_MISC_GPIOBNX2_MISC_GPIO 0x0000081c bnx2.h 　
25977
 BNX2_MISC_GPIO_VALUEBNX2_MISC_GPIO_VALUE (0xffL<<0) bnx2.h 　
25978
 BNX2_MISC_GPIO_SETBNX2_MISC_GPIO_SET (0xffL<<8) bnx2.h 　
25979
 BNX2_MISC_GPIO_CLRBNX2_MISC_GPIO_CLR (0xffL<<16) bnx2.h 　
25980
 BNX2_MISC_GPIO_FLOATBNX2_MISC_GPIO_FLOAT (0xffL<<24) bnx2.h 　
25981
 BNX2_MISC_GPIO_INTBNX2_MISC_GPIO_INT 0x00000820 bnx2.h 　
25982
 BNX2_MISC_GPIO_INT_INT_STATEBNX2_MISC_GPIO_INT_INT_STATE (0xfL<<0) bnx2.h 　
25983
 BNX2_MISC_GPIO_INT_OLD_VALUEBNX2_MISC_GPIO_INT_OLD_VALUE (0xfL<<8) bnx2.h 　
25984
 BNX2_MISC_GPIO_INT_OLD_SETBNX2_MISC_GPIO_INT_OLD_SET (0xfL<<16) bnx2.h 　
25985
 BNX2_MISC_GPIO_INT_OLD_CLRBNX2_MISC_GPIO_INT_OLD_CLR (0xfL<<24) bnx2.h 　
25986
 BNX2_MISC_CONFIG_LFSRBNX2_MISC_CONFIG_LFSR 0x00000824 bnx2.h 　
25987
 BNX2_MISC_CONFIG_LFSR_DIVBNX2_MISC_CONFIG_LFSR_DIV (0xffffL<<0) bnx2.h 　
25988
 BNX2_MISC_LFSR_MASK_BITSBNX2_MISC_LFSR_MASK_BITS 0x00000828 bnx2.h 　
25989
 BNX2_MISC_LFSR_MASK_BITS_TX_SCHBNX2_MISC_LFSR_MASK_BITS_TX_SCH (1L<<0) bnx2.h 　
25990
 BNX2_MISC_LFSR_MASK_BITS_TX_BD_BNX2_MISC_LFSR_MASK_BITS_TX_BD_ (1L<<1) bnx2.h 　
25991
 BNX2_MISC_LFSR_MASK_BITS_TX_BD_BNX2_MISC_LFSR_MASK_BITS_TX_BD_ (1L<<2) bnx2.h 　
25992
 BNX2_MISC_LFSR_MASK_BITS_TX_PROBNX2_MISC_LFSR_MASK_BITS_TX_PRO (1L<<3) bnx2.h 　
25993
 BNX2_MISC_LFSR_MASK_BITS_TX_DMABNX2_MISC_LFSR_MASK_BITS_TX_DMA (1L<<4) bnx2.h 　
25994
 BNX2_MISC_LFSR_MASK_BITS_TX_PATBNX2_MISC_LFSR_MASK_BITS_TX_PAT (1L<<5) bnx2.h 　
25995
 BNX2_MISC_LFSR_MASK_BITS_TX_PAYBNX2_MISC_LFSR_MASK_BITS_TX_PAY (1L<<6) bnx2.h 　
25996
 BNX2_MISC_LFSR_MASK_BITS_TX_HEABNX2_MISC_LFSR_MASK_BITS_TX_HEA (1L<<7) bnx2.h 　
25997
 BNX2_MISC_LFSR_MASK_BITS_TX_ASSBNX2_MISC_LFSR_MASK_BITS_TX_ASS (1L<<8) bnx2.h 　
25998
 BNX2_MISC_LFSR_MASK_BITS_EMAC_EBNX2_MISC_LFSR_MASK_BITS_EMAC_E (1L<<9) bnx2.h 　
25999
 BNX2_MISC_LFSR_MASK_BITS_RX_PARBNX2_MISC_LFSR_MASK_BITS_RX_PAR (1L<<10) bnx2.h 　
26000
 BNX2_MISC_LFSR_MASK_BITS_RX_PARBNX2_MISC_LFSR_MASK_BITS_RX_PAR (1L<<11) bnx2.h 　
26001
 BNX2_MISC_LFSR_MASK_BITS_RX_MBUBNX2_MISC_LFSR_MASK_BITS_RX_MBU (1L<<12) bnx2.h 　
26002
 BNX2_MISC_LFSR_MASK_BITS_RX_LOOBNX2_MISC_LFSR_MASK_BITS_RX_LOO (1L<<13) bnx2.h 　
26003
 BNX2_MISC_LFSR_MASK_BITS_RX_PROBNX2_MISC_LFSR_MASK_BITS_RX_PRO (1L<<14) bnx2.h 　
26004
 BNX2_MISC_LFSR_MASK_BITS_RX_V2PBNX2_MISC_LFSR_MASK_BITS_RX_V2P (1L<<15) bnx2.h 　
26005
 BNX2_MISC_LFSR_MASK_BITS_RX_BD_BNX2_MISC_LFSR_MASK_BITS_RX_BD_ (1L<<16) bnx2.h 　
26006
 BNX2_MISC_LFSR_MASK_BITS_RX_DMABNX2_MISC_LFSR_MASK_BITS_RX_DMA (1L<<17) bnx2.h 　
26007
 BNX2_MISC_LFSR_MASK_BITS_COMPLEBNX2_MISC_LFSR_MASK_BITS_COMPLE (1L<<18) bnx2.h 　
26008
 BNX2_MISC_LFSR_MASK_BITS_HOST_CBNX2_MISC_LFSR_MASK_BITS_HOST_C (1L<<19) bnx2.h 　
26009
 BNX2_MISC_LFSR_MASK_BITS_MAILBOBNX2_MISC_LFSR_MASK_BITS_MAILBO (1L<<20) bnx2.h 　
26010
 BNX2_MISC_LFSR_MASK_BITS_CONTEXBNX2_MISC_LFSR_MASK_BITS_CONTEX (1L<<21) bnx2.h 　
26011
 BNX2_MISC_LFSR_MASK_BITS_CMD_SCBNX2_MISC_LFSR_MASK_BITS_CMD_SC (1L<<22) bnx2.h 　
26012
 BNX2_MISC_LFSR_MASK_BITS_CMD_PRBNX2_MISC_LFSR_MASK_BITS_CMD_PR (1L<<23) bnx2.h 　
26013
 BNX2_MISC_LFSR_MASK_BITS_MGMT_PBNX2_MISC_LFSR_MASK_BITS_MGMT_P (1L<<24) bnx2.h 　
26014
 BNX2_MISC_LFSR_MASK_BITS_TIMER_BNX2_MISC_LFSR_MASK_BITS_TIMER_ (1L<<25) bnx2.h 　
26015
 BNX2_MISC_LFSR_MASK_BITS_DMA_ENBNX2_MISC_LFSR_MASK_BITS_DMA_EN (1L<<26) bnx2.h 　
26016
 BNX2_MISC_LFSR_MASK_BITS_UMP_ENBNX2_MISC_LFSR_MASK_BITS_UMP_EN (1L<<27) bnx2.h 　
26017
 BNX2_MISC_ARB_REQ0BNX2_MISC_ARB_REQ0 0x0000082c bnx2.h 　
26018
 BNX2_MISC_ARB_REQ1BNX2_MISC_ARB_REQ1 0x00000830 bnx2.h 　
26019
 BNX2_MISC_ARB_REQ2BNX2_MISC_ARB_REQ2 0x00000834 bnx2.h 　
26020
 BNX2_MISC_ARB_REQ3BNX2_MISC_ARB_REQ3 0x00000838 bnx2.h 　
26021
 BNX2_MISC_ARB_REQ4BNX2_MISC_ARB_REQ4 0x0000083c bnx2.h 　
26022
 BNX2_MISC_ARB_FREE0BNX2_MISC_ARB_FREE0 0x00000840 bnx2.h 　
26023
 BNX2_MISC_ARB_FREE1BNX2_MISC_ARB_FREE1 0x00000844 bnx2.h 　
26024
 BNX2_MISC_ARB_FREE2BNX2_MISC_ARB_FREE2 0x00000848 bnx2.h 　
26025
 BNX2_MISC_ARB_FREE3BNX2_MISC_ARB_FREE3 0x0000084c bnx2.h 　
26026
 BNX2_MISC_ARB_FREE4BNX2_MISC_ARB_FREE4 0x00000850 bnx2.h 　
26027
 BNX2_MISC_ARB_REQ_STATUS0BNX2_MISC_ARB_REQ_STATUS0 0x00000854 bnx2.h 　
26028
 BNX2_MISC_ARB_REQ_STATUS1BNX2_MISC_ARB_REQ_STATUS1 0x00000858 bnx2.h 　
26029
 BNX2_MISC_ARB_REQ_STATUS2BNX2_MISC_ARB_REQ_STATUS2 0x0000085c bnx2.h 　
26030
 BNX2_MISC_ARB_REQ_STATUS3BNX2_MISC_ARB_REQ_STATUS3 0x00000860 bnx2.h 　
26031
 BNX2_MISC_ARB_REQ_STATUS4BNX2_MISC_ARB_REQ_STATUS4 0x00000864 bnx2.h 　
26032
 BNX2_MISC_ARB_GNT0BNX2_MISC_ARB_GNT0 0x00000868 bnx2.h 　
26033
 BNX2_MISC_ARB_GNT0_0BNX2_MISC_ARB_GNT0_0 (0x7L<<0) bnx2.h 　
26034
 BNX2_MISC_ARB_GNT0_1BNX2_MISC_ARB_GNT0_1 (0x7L<<4) bnx2.h 　
26035
 BNX2_MISC_ARB_GNT0_2BNX2_MISC_ARB_GNT0_2 (0x7L<<8) bnx2.h 　
26036
 BNX2_MISC_ARB_GNT0_3BNX2_MISC_ARB_GNT0_3 (0x7L<<12) bnx2.h 　
26037
 BNX2_MISC_ARB_GNT0_4BNX2_MISC_ARB_GNT0_4 (0x7L<<16) bnx2.h 　
26038
 BNX2_MISC_ARB_GNT0_5BNX2_MISC_ARB_GNT0_5 (0x7L<<20) bnx2.h 　
26039
 BNX2_MISC_ARB_GNT0_6BNX2_MISC_ARB_GNT0_6 (0x7L<<24) bnx2.h 　
26040
 BNX2_MISC_ARB_GNT0_7BNX2_MISC_ARB_GNT0_7 (0x7L<<28) bnx2.h 　
26041
 BNX2_MISC_ARB_GNT1BNX2_MISC_ARB_GNT1 0x0000086c bnx2.h 　
26042
 BNX2_MISC_ARB_GNT1_8BNX2_MISC_ARB_GNT1_8 (0x7L<<0) bnx2.h 　
26043
 BNX2_MISC_ARB_GNT1_9BNX2_MISC_ARB_GNT1_9 (0x7L<<4) bnx2.h 　
26044
 BNX2_MISC_ARB_GNT1_10BNX2_MISC_ARB_GNT1_10 (0x7L<<8) bnx2.h 　
26045
 BNX2_MISC_ARB_GNT1_11BNX2_MISC_ARB_GNT1_11 (0x7L<<12) bnx2.h 　
26046
 BNX2_MISC_ARB_GNT1_12BNX2_MISC_ARB_GNT1_12 (0x7L<<16) bnx2.h 　
26047
 BNX2_MISC_ARB_GNT1_13BNX2_MISC_ARB_GNT1_13 (0x7L<<20) bnx2.h 　
26048
 BNX2_MISC_ARB_GNT1_14BNX2_MISC_ARB_GNT1_14 (0x7L<<24) bnx2.h 　
26049
 BNX2_MISC_ARB_GNT1_15BNX2_MISC_ARB_GNT1_15 (0x7L<<28) bnx2.h 　
26050
 BNX2_MISC_ARB_GNT2BNX2_MISC_ARB_GNT2 0x00000870 bnx2.h 　
26051
 BNX2_MISC_ARB_GNT2_16BNX2_MISC_ARB_GNT2_16 (0x7L<<0) bnx2.h 　
26052
 BNX2_MISC_ARB_GNT2_17BNX2_MISC_ARB_GNT2_17 (0x7L<<4) bnx2.h 　
26053
 BNX2_MISC_ARB_GNT2_18BNX2_MISC_ARB_GNT2_18 (0x7L<<8) bnx2.h 　
26054
 BNX2_MISC_ARB_GNT2_19BNX2_MISC_ARB_GNT2_19 (0x7L<<12) bnx2.h 　
26055
 BNX2_MISC_ARB_GNT2_20BNX2_MISC_ARB_GNT2_20 (0x7L<<16) bnx2.h 　
26056
 BNX2_MISC_ARB_GNT2_21BNX2_MISC_ARB_GNT2_21 (0x7L<<20) bnx2.h 　
26057
 BNX2_MISC_ARB_GNT2_22BNX2_MISC_ARB_GNT2_22 (0x7L<<24) bnx2.h 　
26058
 BNX2_MISC_ARB_GNT2_23BNX2_MISC_ARB_GNT2_23 (0x7L<<28) bnx2.h 　
26059
 BNX2_MISC_ARB_GNT3BNX2_MISC_ARB_GNT3 0x00000874 bnx2.h 　
26060
 BNX2_MISC_ARB_GNT3_24BNX2_MISC_ARB_GNT3_24 (0x7L<<0) bnx2.h 　
26061
 BNX2_MISC_ARB_GNT3_25BNX2_MISC_ARB_GNT3_25 (0x7L<<4) bnx2.h 　
26062
 BNX2_MISC_ARB_GNT3_26BNX2_MISC_ARB_GNT3_26 (0x7L<<8) bnx2.h 　
26063
 BNX2_MISC_ARB_GNT3_27BNX2_MISC_ARB_GNT3_27 (0x7L<<12) bnx2.h 　
26064
 BNX2_MISC_ARB_GNT3_28BNX2_MISC_ARB_GNT3_28 (0x7L<<16) bnx2.h 　
26065
 BNX2_MISC_ARB_GNT3_29BNX2_MISC_ARB_GNT3_29 (0x7L<<20) bnx2.h 　
26066
 BNX2_MISC_ARB_GNT3_30BNX2_MISC_ARB_GNT3_30 (0x7L<<24) bnx2.h 　
26067
 BNX2_MISC_ARB_GNT3_31BNX2_MISC_ARB_GNT3_31 (0x7L<<28) bnx2.h 　
26068
 BNX2_MISC_PRBS_CONTROLBNX2_MISC_PRBS_CONTROL 0x00000878 bnx2.h 　
26069
 BNX2_MISC_PRBS_CONTROL_ENBNX2_MISC_PRBS_CONTROL_EN (1L<<0) bnx2.h 　
26070
 BNX2_MISC_PRBS_CONTROL_RSTBBNX2_MISC_PRBS_CONTROL_RSTB (1L<<1) bnx2.h 　
26071
 BNX2_MISC_PRBS_CONTROL_INVBNX2_MISC_PRBS_CONTROL_INV (1L<<2) bnx2.h 　
26072
 BNX2_MISC_PRBS_CONTROL_ERR_CLRBNX2_MISC_PRBS_CONTROL_ERR_CLR (1L<<3) bnx2.h 　
26073
 BNX2_MISC_PRBS_CONTROL_ORDERBNX2_MISC_PRBS_CONTROL_ORDER (0x3L<<4) bnx2.h 　
26074
 BNX2_MISC_PRBS_CONTROL_ORDER_7TBNX2_MISC_PRBS_CONTROL_ORDER_7T (0L<<4) bnx2.h 　
26075
 BNX2_MISC_PRBS_CONTROL_ORDER_15BNX2_MISC_PRBS_CONTROL_ORDER_15 (1L<<4) bnx2.h 　
26076
 BNX2_MISC_PRBS_CONTROL_ORDER_23BNX2_MISC_PRBS_CONTROL_ORDER_23 (2L<<4) bnx2.h 　
26077
 BNX2_MISC_PRBS_CONTROL_ORDER_31BNX2_MISC_PRBS_CONTROL_ORDER_31 (3L<<4) bnx2.h 　
26078
 BNX2_MISC_PRBS_STATUSBNX2_MISC_PRBS_STATUS 0x0000087c bnx2.h 　
26079
 BNX2_MISC_PRBS_STATUS_LOCKBNX2_MISC_PRBS_STATUS_LOCK (1L<<0) bnx2.h 　
26080
 BNX2_MISC_PRBS_STATUS_STKYBNX2_MISC_PRBS_STATUS_STKY (1L<<1) bnx2.h 　
26081
 BNX2_MISC_PRBS_STATUS_ERRORSBNX2_MISC_PRBS_STATUS_ERRORS (0x3fffL<<2) bnx2.h 　
26082
 BNX2_MISC_PRBS_STATUS_STATEBNX2_MISC_PRBS_STATUS_STATE (0xfL<<16) bnx2.h 　
26083
 BNX2_MISC_SM_ASF_CONTROLBNX2_MISC_SM_ASF_CONTROL 0x00000880 bnx2.h 　
26084
 BNX2_MISC_SM_ASF_CONTROL_ASF_RSBNX2_MISC_SM_ASF_CONTROL_ASF_RS (1L<<0) bnx2.h 　
26085
 BNX2_MISC_SM_ASF_CONTROL_TSC_ENBNX2_MISC_SM_ASF_CONTROL_TSC_EN (1L<<1) bnx2.h 　
26086
 BNX2_MISC_SM_ASF_CONTROL_WG_TOBNX2_MISC_SM_ASF_CONTROL_WG_TO (1L<<2) bnx2.h 　
26087
 BNX2_MISC_SM_ASF_CONTROL_HB_TOBNX2_MISC_SM_ASF_CONTROL_HB_TO (1L<<3) bnx2.h 　
26088
 BNX2_MISC_SM_ASF_CONTROL_PA_TOBNX2_MISC_SM_ASF_CONTROL_PA_TO (1L<<4) bnx2.h 　
26089
 BNX2_MISC_SM_ASF_CONTROL_PL_TOBNX2_MISC_SM_ASF_CONTROL_PL_TO (1L<<5) bnx2.h 　
26090
 BNX2_MISC_SM_ASF_CONTROL_RT_TOBNX2_MISC_SM_ASF_CONTROL_RT_TO (1L<<6) bnx2.h 　
26091
 BNX2_MISC_SM_ASF_CONTROL_SMB_EVBNX2_MISC_SM_ASF_CONTROL_SMB_EV (1L<<7) bnx2.h 　
26092
 BNX2_MISC_SM_ASF_CONTROL_RESBNX2_MISC_SM_ASF_CONTROL_RES (0xfL<<8) bnx2.h 　
26093
 BNX2_MISC_SM_ASF_CONTROL_SMB_ENBNX2_MISC_SM_ASF_CONTROL_SMB_EN (1L<<12) bnx2.h 　
26094
 BNX2_MISC_SM_ASF_CONTROL_SMB_BBBNX2_MISC_SM_ASF_CONTROL_SMB_BB (1L<<13) bnx2.h 　
26095
 BNX2_MISC_SM_ASF_CONTROL_SMB_NOBNX2_MISC_SM_ASF_CONTROL_SMB_NO (1L<<14) bnx2.h 　
26096
 BNX2_MISC_SM_ASF_CONTROL_SMB_AUBNX2_MISC_SM_ASF_CONTROL_SMB_AU (1L<<15) bnx2.h 　
26097
 BNX2_MISC_SM_ASF_CONTROL_NIC_SMBNX2_MISC_SM_ASF_CONTROL_NIC_SM (0x3fL<<16) bnx2.h 　
26098
 BNX2_MISC_SM_ASF_CONTROL_NIC_SMBNX2_MISC_SM_ASF_CONTROL_NIC_SM (0x3fL<<24) bnx2.h 　
26099
 BNX2_MISC_SM_ASF_CONTROL_EN_NICBNX2_MISC_SM_ASF_CONTROL_EN_NIC (1L<<30) bnx2.h 　
26100
 BNX2_MISC_SM_ASF_CONTROL_SMB_EABNX2_MISC_SM_ASF_CONTROL_SMB_EA (1L<<31) bnx2.h 　
26101
 BNX2_MISC_SMB_INBNX2_MISC_SMB_IN 0x00000884 bnx2.h 　
26102
 BNX2_MISC_SMB_IN_DAT_INBNX2_MISC_SMB_IN_DAT_IN (0xffL<<0) bnx2.h 　
26103
 BNX2_MISC_SMB_IN_RDYBNX2_MISC_SMB_IN_RDY (1L<<8) bnx2.h 　
26104
 BNX2_MISC_SMB_IN_DONEBNX2_MISC_SMB_IN_DONE (1L<<9) bnx2.h 　
26105
 BNX2_MISC_SMB_IN_FIRSTBYTEBNX2_MISC_SMB_IN_FIRSTBYTE (1L<<10) bnx2.h 　
26106
 BNX2_MISC_SMB_IN_STATUSBNX2_MISC_SMB_IN_STATUS (0x7L<<11) bnx2.h 　
26107
 BNX2_MISC_SMB_IN_STATUS_OKBNX2_MISC_SMB_IN_STATUS_OK (0x0L<<11) bnx2.h 　
26108
 BNX2_MISC_SMB_IN_STATUS_PECBNX2_MISC_SMB_IN_STATUS_PEC (0x1L<<11) bnx2.h 　
26109
 BNX2_MISC_SMB_IN_STATUS_OFLOWBNX2_MISC_SMB_IN_STATUS_OFLOW (0x2L<<11) bnx2.h 　
26110
 BNX2_MISC_SMB_IN_STATUS_STOPBNX2_MISC_SMB_IN_STATUS_STOP (0x3L<<11) bnx2.h 　
26111
 BNX2_MISC_SMB_IN_STATUS_TIMEOUTBNX2_MISC_SMB_IN_STATUS_TIMEOUT (0x4L<<11) bnx2.h 　
26112
 BNX2_MISC_SMB_OUTBNX2_MISC_SMB_OUT 0x00000888 bnx2.h 　
26113
 BNX2_MISC_SMB_OUT_DAT_OUTBNX2_MISC_SMB_OUT_DAT_OUT (0xffL<<0) bnx2.h 　
26114
 BNX2_MISC_SMB_OUT_RDYBNX2_MISC_SMB_OUT_RDY (1L<<8) bnx2.h 　
26115
 BNX2_MISC_SMB_OUT_STARTBNX2_MISC_SMB_OUT_START (1L<<9) bnx2.h 　
26116
 BNX2_MISC_SMB_OUT_LASTBNX2_MISC_SMB_OUT_LAST (1L<<10) bnx2.h 　
26117
 BNX2_MISC_SMB_OUT_ACC_TYPEBNX2_MISC_SMB_OUT_ACC_TYPE (1L<<11) bnx2.h 　
26118
 BNX2_MISC_SMB_OUT_ENB_PECBNX2_MISC_SMB_OUT_ENB_PEC (1L<<12) bnx2.h 　
26119
 BNX2_MISC_SMB_OUT_GET_RX_LENBNX2_MISC_SMB_OUT_GET_RX_LEN (1L<<13) bnx2.h 　
26120
 BNX2_MISC_SMB_OUT_SMB_READ_LENBNX2_MISC_SMB_OUT_SMB_READ_LEN (0x3fL<<14) bnx2.h 　
26121
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (0xfL<<20) bnx2.h 　
26122
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (0L<<20) bnx2.h 　
26123
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (1L<<20) bnx2.h 　
26124
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (9L<<20) bnx2.h 　
26125
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (2L<<20) bnx2.h 　
26126
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (3L<<20) bnx2.h 　
26127
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (4L<<20) bnx2.h 　
26128
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (5L<<20) bnx2.h 　
26129
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (0xdL<<20) bnx2.h 　
26130
 BNX2_MISC_SMB_OUT_SMB_OUT_STATUBNX2_MISC_SMB_OUT_SMB_OUT_STATU (0x6L<<20) bnx2.h 　
26131
 BNX2_MISC_SMB_OUT_SMB_OUT_SLAVEBNX2_MISC_SMB_OUT_SMB_OUT_SLAVE (1L<<24) bnx2.h 　
26132
 BNX2_MISC_SMB_OUT_SMB_OUT_DAT_EBNX2_MISC_SMB_OUT_SMB_OUT_DAT_E (1L<<25) bnx2.h 　
26133
 BNX2_MISC_SMB_OUT_SMB_OUT_DAT_IBNX2_MISC_SMB_OUT_SMB_OUT_DAT_I (1L<<26) bnx2.h 　
26134
 BNX2_MISC_SMB_OUT_SMB_OUT_CLK_EBNX2_MISC_SMB_OUT_SMB_OUT_CLK_E (1L<<27) bnx2.h 　
26135
 BNX2_MISC_SMB_OUT_SMB_OUT_CLK_IBNX2_MISC_SMB_OUT_SMB_OUT_CLK_I (1L<<28) bnx2.h 　
26136
 BNX2_MISC_SMB_WATCHDOGBNX2_MISC_SMB_WATCHDOG 0x0000088c bnx2.h 　
26137
 BNX2_MISC_SMB_WATCHDOG_WATCHDOGBNX2_MISC_SMB_WATCHDOG_WATCHDOG (0xffffL<<0) bnx2.h 　
26138
 BNX2_MISC_SMB_HEARTBEATBNX2_MISC_SMB_HEARTBEAT 0x00000890 bnx2.h 　
26139
 BNX2_MISC_SMB_HEARTBEAT_HEARTBEBNX2_MISC_SMB_HEARTBEAT_HEARTBE (0xffffL<<0) bnx2.h 　
26140
 BNX2_MISC_SMB_POLL_ASFBNX2_MISC_SMB_POLL_ASF 0x00000894 bnx2.h 　
26141
 BNX2_MISC_SMB_POLL_ASF_POLL_ASFBNX2_MISC_SMB_POLL_ASF_POLL_ASF (0xffffL<<0) bnx2.h 　
26142
 BNX2_MISC_SMB_POLL_LEGACYBNX2_MISC_SMB_POLL_LEGACY 0x00000898 bnx2.h 　
26143
 BNX2_MISC_SMB_POLL_LEGACY_POLL_BNX2_MISC_SMB_POLL_LEGACY_POLL_ (0xffffL<<0) bnx2.h 　
26144
 BNX2_MISC_SMB_RETRANBNX2_MISC_SMB_RETRAN 0x0000089c bnx2.h 　
26145
 BNX2_MISC_SMB_RETRAN_RETRANBNX2_MISC_SMB_RETRAN_RETRAN (0xffL<<0) bnx2.h 　
26146
 BNX2_MISC_SMB_TIMESTAMPBNX2_MISC_SMB_TIMESTAMP 0x000008a0 bnx2.h 　
26147
 BNX2_MISC_SMB_TIMESTAMP_TIMESTABNX2_MISC_SMB_TIMESTAMP_TIMESTA (0xffffffffL<<0) bnx2.h 　
26148
 BNX2_MISC_PERR_ENA0BNX2_MISC_PERR_ENA0 0x000008a4 bnx2.h 　
26149
 BNX2_MISC_PERR_ENA0_COM_MISC_CTBNX2_MISC_PERR_ENA0_COM_MISC_CT (1L<<0) bnx2.h 　
26150
 BNX2_MISC_PERR_ENA0_COM_MISC_REBNX2_MISC_PERR_ENA0_COM_MISC_RE (1L<<1) bnx2.h 　
26151
 BNX2_MISC_PERR_ENA0_COM_MISC_SCBNX2_MISC_PERR_ENA0_COM_MISC_SC (1L<<2) bnx2.h 　
26152
 BNX2_MISC_PERR_ENA0_CP_MISC_CTXBNX2_MISC_PERR_ENA0_CP_MISC_CTX (1L<<3) bnx2.h 　
26153
 BNX2_MISC_PERR_ENA0_CP_MISC_REGBNX2_MISC_PERR_ENA0_CP_MISC_REG (1L<<4) bnx2.h 　
26154
 BNX2_MISC_PERR_ENA0_CP_MISC_SCPBNX2_MISC_PERR_ENA0_CP_MISC_SCP (1L<<5) bnx2.h 　
26155
 BNX2_MISC_PERR_ENA0_CS_MISC_TMEBNX2_MISC_PERR_ENA0_CS_MISC_TME (1L<<6) bnx2.h 　
26156
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<7) bnx2.h 　
26157
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<8) bnx2.h 　
26158
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<9) bnx2.h 　
26159
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<10) bnx2.h 　
26160
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<11) bnx2.h 　
26161
 BNX2_MISC_PERR_ENA0_CTX_MISC_ACBNX2_MISC_PERR_ENA0_CTX_MISC_AC (1L<<12) bnx2.h 　
26162
 BNX2_MISC_PERR_ENA0_CTX_MISC_PGBNX2_MISC_PERR_ENA0_CTX_MISC_PG (1L<<13) bnx2.h 　
26163
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<14) bnx2.h 　
26164
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<15) bnx2.h 　
26165
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<16) bnx2.h 　
26166
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<17) bnx2.h 　
26167
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<18) bnx2.h 　
26168
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<19) bnx2.h 　
26169
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<20) bnx2.h 　
26170
 BNX2_MISC_PERR_ENA0_DMAE_MISC_DBNX2_MISC_PERR_ENA0_DMAE_MISC_D (1L<<21) bnx2.h 　
26171
 BNX2_MISC_PERR_ENA0_HC_MISC_DMABNX2_MISC_PERR_ENA0_HC_MISC_DMA (1L<<22) bnx2.h 　
26172
 BNX2_MISC_PERR_ENA0_MCP_MISC_REBNX2_MISC_PERR_ENA0_MCP_MISC_RE (1L<<23) bnx2.h 　
26173
 BNX2_MISC_PERR_ENA0_MCP_MISC_SCBNX2_MISC_PERR_ENA0_MCP_MISC_SC (1L<<24) bnx2.h 　
26174
 BNX2_MISC_PERR_ENA0_MQ_MISC_CTXBNX2_MISC_PERR_ENA0_MQ_MISC_CTX (1L<<25) bnx2.h 　
26175
 BNX2_MISC_PERR_ENA0_RBDC_MISCBNX2_MISC_PERR_ENA0_RBDC_MISC (1L<<26) bnx2.h 　
26176
 BNX2_MISC_PERR_ENA0_RBUF_MISC_MBNX2_MISC_PERR_ENA0_RBUF_MISC_M (1L<<27) bnx2.h 　
26177
 BNX2_MISC_PERR_ENA0_RBUF_MISC_PBNX2_MISC_PERR_ENA0_RBUF_MISC_P (1L<<28) bnx2.h 　
26178
 BNX2_MISC_PERR_ENA0_RDE_MISC_RPBNX2_MISC_PERR_ENA0_RDE_MISC_RP (1L<<29) bnx2.h 　
26179
 BNX2_MISC_PERR_ENA0_RDE_MISC_RPBNX2_MISC_PERR_ENA0_RDE_MISC_RP (1L<<30) bnx2.h 　
26180
 BNX2_MISC_PERR_ENA0_RV2P_MISC_CBNX2_MISC_PERR_ENA0_RV2P_MISC_C (1L<<31) bnx2.h 　
26181
 BNX2_MISC_PERR_ENA1BNX2_MISC_PERR_ENA1 0x000008a8 bnx2.h 　
26182
 BNX2_MISC_PERR_ENA1_RV2P_MISC_CBNX2_MISC_PERR_ENA1_RV2P_MISC_C (1L<<0) bnx2.h 　
26183
 BNX2_MISC_PERR_ENA1_RV2P_MISC_PBNX2_MISC_PERR_ENA1_RV2P_MISC_P (1L<<1) bnx2.h 　
26184
 BNX2_MISC_PERR_ENA1_RV2P_MISC_PBNX2_MISC_PERR_ENA1_RV2P_MISC_P (1L<<2) bnx2.h 　
26185
 BNX2_MISC_PERR_ENA1_RXP_MISC_CTBNX2_MISC_PERR_ENA1_RXP_MISC_CT (1L<<3) bnx2.h 　
26186
 BNX2_MISC_PERR_ENA1_RXP_MISC_REBNX2_MISC_PERR_ENA1_RXP_MISC_RE (1L<<4) bnx2.h 　
26187
 BNX2_MISC_PERR_ENA1_RXP_MISC_SCBNX2_MISC_PERR_ENA1_RXP_MISC_SC (1L<<5) bnx2.h 　
26188
 BNX2_MISC_PERR_ENA1_RXP_MISC_RBBNX2_MISC_PERR_ENA1_RXP_MISC_RB (1L<<6) bnx2.h 　
26189
 BNX2_MISC_PERR_ENA1_TBDC_MISCBNX2_MISC_PERR_ENA1_TBDC_MISC (1L<<7) bnx2.h 　
26190
 BNX2_MISC_PERR_ENA1_TDMA_MISCBNX2_MISC_PERR_ENA1_TDMA_MISC (1L<<8) bnx2.h 　
26191
 BNX2_MISC_PERR_ENA1_THBUF_MISC_BNX2_MISC_PERR_ENA1_THBUF_MISC_ (1L<<9) bnx2.h 　
26192
 BNX2_MISC_PERR_ENA1_THBUF_MISC_BNX2_MISC_PERR_ENA1_THBUF_MISC_ (1L<<10) bnx2.h 　
26193
 BNX2_MISC_PERR_ENA1_TPAT_MISC_RBNX2_MISC_PERR_ENA1_TPAT_MISC_R (1L<<11) bnx2.h 　
26194
 BNX2_MISC_PERR_ENA1_TPAT_MISC_SBNX2_MISC_PERR_ENA1_TPAT_MISC_S (1L<<12) bnx2.h 　
26195
 BNX2_MISC_PERR_ENA1_TPBUF_MISC_BNX2_MISC_PERR_ENA1_TPBUF_MISC_ (1L<<13) bnx2.h 　
26196
 BNX2_MISC_PERR_ENA1_TSCH_MISC_LBNX2_MISC_PERR_ENA1_TSCH_MISC_L (1L<<14) bnx2.h 　
26197
 BNX2_MISC_PERR_ENA1_TXP_MISC_CTBNX2_MISC_PERR_ENA1_TXP_MISC_CT (1L<<15) bnx2.h 　
26198
 BNX2_MISC_PERR_ENA1_TXP_MISC_REBNX2_MISC_PERR_ENA1_TXP_MISC_RE (1L<<16) bnx2.h 　
26199
 BNX2_MISC_PERR_ENA1_TXP_MISC_SCBNX2_MISC_PERR_ENA1_TXP_MISC_SC (1L<<17) bnx2.h 　
26200
 BNX2_MISC_PERR_ENA1_UMP_MISC_FIBNX2_MISC_PERR_ENA1_UMP_MISC_FI (1L<<18) bnx2.h 　
26201
 BNX2_MISC_PERR_ENA1_UMP_MISC_FIBNX2_MISC_PERR_ENA1_UMP_MISC_FI (1L<<19) bnx2.h 　
26202
 BNX2_MISC_PERR_ENA1_UMP_MISC_RXBNX2_MISC_PERR_ENA1_UMP_MISC_RX (1L<<20) bnx2.h 　
26203
 BNX2_MISC_PERR_ENA1_UMP_MISC_TXBNX2_MISC_PERR_ENA1_UMP_MISC_TX (1L<<21) bnx2.h 　
26204
 BNX2_MISC_PERR_ENA1_RDMAQ_MISCBNX2_MISC_PERR_ENA1_RDMAQ_MISC (1L<<22) bnx2.h 　
26205
 BNX2_MISC_PERR_ENA1_CSQ_MISCBNX2_MISC_PERR_ENA1_CSQ_MISC (1L<<23) bnx2.h 　
26206
 BNX2_MISC_PERR_ENA1_CPQ_MISCBNX2_MISC_PERR_ENA1_CPQ_MISC (1L<<24) bnx2.h 　
26207
 BNX2_MISC_PERR_ENA1_MCPQ_MISCBNX2_MISC_PERR_ENA1_MCPQ_MISC (1L<<25) bnx2.h 　
26208
 BNX2_MISC_PERR_ENA1_RV2PMQ_MISCBNX2_MISC_PERR_ENA1_RV2PMQ_MISC (1L<<26) bnx2.h 　
26209
 BNX2_MISC_PERR_ENA1_RV2PPQ_MISCBNX2_MISC_PERR_ENA1_RV2PPQ_MISC (1L<<27) bnx2.h 　
26210
 BNX2_MISC_PERR_ENA1_RV2PTQ_MISCBNX2_MISC_PERR_ENA1_RV2PTQ_MISC (1L<<28) bnx2.h 　
26211
 BNX2_MISC_PERR_ENA1_RXPQ_MISCBNX2_MISC_PERR_ENA1_RXPQ_MISC (1L<<29) bnx2.h 　
26212
 BNX2_MISC_PERR_ENA1_RXPCQ_MISCBNX2_MISC_PERR_ENA1_RXPCQ_MISC (1L<<30) bnx2.h 　
26213
 BNX2_MISC_PERR_ENA1_RLUPQ_MISCBNX2_MISC_PERR_ENA1_RLUPQ_MISC (1L<<31) bnx2.h 　
26214
 BNX2_MISC_PERR_ENA2BNX2_MISC_PERR_ENA2 0x000008ac bnx2.h 　
26215
 BNX2_MISC_PERR_ENA2_COMQ_MISCBNX2_MISC_PERR_ENA2_COMQ_MISC (1L<<0) bnx2.h 　
26216
 BNX2_MISC_PERR_ENA2_COMXQ_MISCBNX2_MISC_PERR_ENA2_COMXQ_MISC (1L<<1) bnx2.h 　
26217
 BNX2_MISC_PERR_ENA2_COMTQ_MISCBNX2_MISC_PERR_ENA2_COMTQ_MISC (1L<<2) bnx2.h 　
26218
 BNX2_MISC_PERR_ENA2_TSCHQ_MISCBNX2_MISC_PERR_ENA2_TSCHQ_MISC (1L<<3) bnx2.h 　
26219
 BNX2_MISC_PERR_ENA2_TBDRQ_MISCBNX2_MISC_PERR_ENA2_TBDRQ_MISC (1L<<4) bnx2.h 　
26220
 BNX2_MISC_PERR_ENA2_TXPQ_MISCBNX2_MISC_PERR_ENA2_TXPQ_MISC (1L<<5) bnx2.h 　
26221
 BNX2_MISC_PERR_ENA2_TDMAQ_MISCBNX2_MISC_PERR_ENA2_TDMAQ_MISC (1L<<6) bnx2.h 　
26222
 BNX2_MISC_PERR_ENA2_TPATQ_MISCBNX2_MISC_PERR_ENA2_TPATQ_MISC (1L<<7) bnx2.h 　
26223
 BNX2_MISC_PERR_ENA2_TASQ_MISCBNX2_MISC_PERR_ENA2_TASQ_MISC (1L<<8) bnx2.h 　
26224
 BNX2_MISC_DEBUG_VECTOR_SELBNX2_MISC_DEBUG_VECTOR_SEL 0x000008b0 bnx2.h 　
26225
 BNX2_MISC_DEBUG_VECTOR_SEL_0BNX2_MISC_DEBUG_VECTOR_SEL_0 (0xfffL<<0) bnx2.h 　
26226
 BNX2_MISC_DEBUG_VECTOR_SEL_1BNX2_MISC_DEBUG_VECTOR_SEL_1 (0xfffL<<12) bnx2.h 　
26227
 BNX2_MISC_VREG_CONTROLBNX2_MISC_VREG_CONTROL 0x000008b4 bnx2.h 　
26228
 BNX2_MISC_VREG_CONTROL_1_2BNX2_MISC_VREG_CONTROL_1_2 (0xfL<<0) bnx2.h 　
26229
 BNX2_MISC_VREG_CONTROL_2_5BNX2_MISC_VREG_CONTROL_2_5 (0xfL<<4) bnx2.h 　
26230
 BNX2_MISC_FINAL_CLK_CTL_VALBNX2_MISC_FINAL_CLK_CTL_VAL 0x000008b8 bnx2.h 　
26231
 BNX2_MISC_FINAL_CLK_CTL_VAL_MISBNX2_MISC_FINAL_CLK_CTL_VAL_MIS (0x3ffffffL<<6) bnx2.h 　
26232
 BNX2_MISC_UNUSED0BNX2_MISC_UNUSED0 0x000008bc bnx2.h 　
26233
 BNX2_NVM_COMMANDBNX2_NVM_COMMAND 0x00006400 bnx2.h 　
26234
 BNX2_NVM_COMMAND_RSTBNX2_NVM_COMMAND_RST (1L<<0) bnx2.h 　
26235
 BNX2_NVM_COMMAND_DONEBNX2_NVM_COMMAND_DONE (1L<<3) bnx2.h 　
26236
 BNX2_NVM_COMMAND_DOITBNX2_NVM_COMMAND_DOIT (1L<<4) bnx2.h 　
26237
 BNX2_NVM_COMMAND_WRBNX2_NVM_COMMAND_WR (1L<<5) bnx2.h 　
26238
 BNX2_NVM_COMMAND_ERASEBNX2_NVM_COMMAND_ERASE (1L<<6) bnx2.h 　
26239
 BNX2_NVM_COMMAND_FIRSTBNX2_NVM_COMMAND_FIRST (1L<<7) bnx2.h 　
26240
 BNX2_NVM_COMMAND_LASTBNX2_NVM_COMMAND_LAST (1L<<8) bnx2.h 　
26241
 BNX2_NVM_COMMAND_WRENBNX2_NVM_COMMAND_WREN (1L<<16) bnx2.h 　
26242
 BNX2_NVM_COMMAND_WRDIBNX2_NVM_COMMAND_WRDI (1L<<17) bnx2.h 　
26243
 BNX2_NVM_COMMAND_EWSRBNX2_NVM_COMMAND_EWSR (1L<<18) bnx2.h 　
26244
 BNX2_NVM_COMMAND_WRSRBNX2_NVM_COMMAND_WRSR (1L<<19) bnx2.h 　
26245
 BNX2_NVM_STATUSBNX2_NVM_STATUS 0x00006404 bnx2.h 　
26246
 BNX2_NVM_STATUS_PI_FSM_STATEBNX2_NVM_STATUS_PI_FSM_STATE (0xfL<<0) bnx2.h 　
26247
 BNX2_NVM_STATUS_EE_FSM_STATEBNX2_NVM_STATUS_EE_FSM_STATE (0xfL<<4) bnx2.h 　
26248
 BNX2_NVM_STATUS_EQ_FSM_STATEBNX2_NVM_STATUS_EQ_FSM_STATE (0xfL<<8) bnx2.h 　
26249
 BNX2_NVM_WRITEBNX2_NVM_WRITE 0x00006408 bnx2.h 　
26250
 BNX2_NVM_WRITE_NVM_WRITE_VALUEBNX2_NVM_WRITE_NVM_WRITE_VALUE (0xffffffffL<<0) bnx2.h 　
26251
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (0L<<0) bnx2.h 　
26252
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (1L<<0) bnx2.h 　
26253
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (2L<<0) bnx2.h 　
26254
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (4L<<0) bnx2.h 　
26255
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (8L<<0) bnx2.h 　
26256
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (16L<<0) bnx2.h 　
26257
 BNX2_NVM_WRITE_NVM_WRITE_VALUE_BNX2_NVM_WRITE_NVM_WRITE_VALUE_ (32L<<0) bnx2.h 　
26258
 BNX2_NVM_ADDRBNX2_NVM_ADDR 0x0000640c bnx2.h 　
26259
 BNX2_NVM_ADDR_NVM_ADDR_VALUEBNX2_NVM_ADDR_NVM_ADDR_VALUE (0xffffffL<<0) bnx2.h 　
26260
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_BIBNX2_NVM_ADDR_NVM_ADDR_VALUE_BI (0L<<0) bnx2.h 　
26261
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_EEBNX2_NVM_ADDR_NVM_ADDR_VALUE_EE (1L<<0) bnx2.h 　
26262
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_EEBNX2_NVM_ADDR_NVM_ADDR_VALUE_EE (2L<<0) bnx2.h 　
26263
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_SCBNX2_NVM_ADDR_NVM_ADDR_VALUE_SC (4L<<0) bnx2.h 　
26264
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_CSBNX2_NVM_ADDR_NVM_ADDR_VALUE_CS (8L<<0) bnx2.h 　
26265
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_SOBNX2_NVM_ADDR_NVM_ADDR_VALUE_SO (16L<<0) bnx2.h 　
26266
 BNX2_NVM_ADDR_NVM_ADDR_VALUE_SIBNX2_NVM_ADDR_NVM_ADDR_VALUE_SI (32L<<0) bnx2.h 　
26267
 BNX2_NVM_READBNX2_NVM_READ 0x00006410 bnx2.h 　
26268
 BNX2_NVM_READ_NVM_READ_VALUEBNX2_NVM_READ_NVM_READ_VALUE (0xffffffffL<<0) bnx2.h 　
26269
 BNX2_NVM_READ_NVM_READ_VALUE_BIBNX2_NVM_READ_NVM_READ_VALUE_BI (0L<<0) bnx2.h 　
26270
 BNX2_NVM_READ_NVM_READ_VALUE_EEBNX2_NVM_READ_NVM_READ_VALUE_EE (1L<<0) bnx2.h 　
26271
 BNX2_NVM_READ_NVM_READ_VALUE_EEBNX2_NVM_READ_NVM_READ_VALUE_EE (2L<<0) bnx2.h 　
26272
 BNX2_NVM_READ_NVM_READ_VALUE_SCBNX2_NVM_READ_NVM_READ_VALUE_SC (4L<<0) bnx2.h 　
26273
 BNX2_NVM_READ_NVM_READ_VALUE_CSBNX2_NVM_READ_NVM_READ_VALUE_CS (8L<<0) bnx2.h 　
26274
 BNX2_NVM_READ_NVM_READ_VALUE_SOBNX2_NVM_READ_NVM_READ_VALUE_SO (16L<<0) bnx2.h 　
26275
 BNX2_NVM_READ_NVM_READ_VALUE_SIBNX2_NVM_READ_NVM_READ_VALUE_SI (32L<<0) bnx2.h 　
26276
 BNX2_NVM_CFG1BNX2_NVM_CFG1 0x00006414 bnx2.h 　
26277
 BNX2_NVM_CFG1_FLASH_MODEBNX2_NVM_CFG1_FLASH_MODE (1L<<0) bnx2.h 　
26278
 BNX2_NVM_CFG1_BUFFER_MODEBNX2_NVM_CFG1_BUFFER_MODE (1L<<1) bnx2.h 　
26279
 BNX2_NVM_CFG1_PASS_MODEBNX2_NVM_CFG1_PASS_MODE (1L<<2) bnx2.h 　
26280
 BNX2_NVM_CFG1_BITBANG_MODEBNX2_NVM_CFG1_BITBANG_MODE (1L<<3) bnx2.h 　
26281
 BNX2_NVM_CFG1_STATUS_BITBNX2_NVM_CFG1_STATUS_BIT (0x7L<<4) bnx2.h 　
26282
 BNX2_NVM_CFG1_STATUS_BIT_FLASH_BNX2_NVM_CFG1_STATUS_BIT_FLASH_ (0L<<4) bnx2.h 　
26283
 BNX2_NVM_CFG1_STATUS_BIT_BUFFERBNX2_NVM_CFG1_STATUS_BIT_BUFFER (7L<<4) bnx2.h 　
26284
 BNX2_NVM_CFG1_SPI_CLK_DIVBNX2_NVM_CFG1_SPI_CLK_DIV (0xfL<<7) bnx2.h 　
26285
 BNX2_NVM_CFG1_SEE_CLK_DIVBNX2_NVM_CFG1_SEE_CLK_DIV (0x7ffL<<11) bnx2.h 　
26286
 BNX2_NVM_CFG1_PROTECT_MODEBNX2_NVM_CFG1_PROTECT_MODE (1L<<24) bnx2.h 　
26287
 BNX2_NVM_CFG1_FLASH_SIZEBNX2_NVM_CFG1_FLASH_SIZE (1L<<25) bnx2.h 　
26288
 BNX2_NVM_CFG1_COMPAT_BYPASSSBNX2_NVM_CFG1_COMPAT_BYPASSS (1L<<31) bnx2.h 　
26289
 BNX2_NVM_CFG2BNX2_NVM_CFG2 0x00006418 bnx2.h 　
26290
 BNX2_NVM_CFG2_ERASE_CMDBNX2_NVM_CFG2_ERASE_CMD (0xffL<<0) bnx2.h 　
26291
 BNX2_NVM_CFG2_DUMMYBNX2_NVM_CFG2_DUMMY (0xffL<<8) bnx2.h 　
26292
 BNX2_NVM_CFG2_STATUS_CMDBNX2_NVM_CFG2_STATUS_CMD (0xffL<<16) bnx2.h 　
26293
 BNX2_NVM_CFG3BNX2_NVM_CFG3 0x0000641c bnx2.h 　
26294
 BNX2_NVM_CFG3_BUFFER_RD_CMDBNX2_NVM_CFG3_BUFFER_RD_CMD (0xffL<<0) bnx2.h 　
26295
 BNX2_NVM_CFG3_WRITE_CMDBNX2_NVM_CFG3_WRITE_CMD (0xffL<<8) bnx2.h 　
26296
 BNX2_NVM_CFG3_BUFFER_WRITE_CMDBNX2_NVM_CFG3_BUFFER_WRITE_CMD (0xffL<<16) bnx2.h 　
26297
 BNX2_NVM_CFG3_READ_CMDBNX2_NVM_CFG3_READ_CMD (0xffL<<24) bnx2.h 　
26298
 BNX2_NVM_SW_ARBBNX2_NVM_SW_ARB 0x00006420 bnx2.h 　
26299
 BNX2_NVM_SW_ARB_ARB_REQ_SET0BNX2_NVM_SW_ARB_ARB_REQ_SET0 (1L<<0) bnx2.h 　
26300
 BNX2_NVM_SW_ARB_ARB_REQ_SET1BNX2_NVM_SW_ARB_ARB_REQ_SET1 (1L<<1) bnx2.h 　
26301
 BNX2_NVM_SW_ARB_ARB_REQ_SET2BNX2_NVM_SW_ARB_ARB_REQ_SET2 (1L<<2) bnx2.h 　
26302
 BNX2_NVM_SW_ARB_ARB_REQ_SET3BNX2_NVM_SW_ARB_ARB_REQ_SET3 (1L<<3) bnx2.h 　
26303
 BNX2_NVM_SW_ARB_ARB_REQ_CLR0BNX2_NVM_SW_ARB_ARB_REQ_CLR0 (1L<<4) bnx2.h 　
26304
 BNX2_NVM_SW_ARB_ARB_REQ_CLR1BNX2_NVM_SW_ARB_ARB_REQ_CLR1 (1L<<5) bnx2.h 　
26305
 BNX2_NVM_SW_ARB_ARB_REQ_CLR2BNX2_NVM_SW_ARB_ARB_REQ_CLR2 (1L<<6) bnx2.h 　
26306
 BNX2_NVM_SW_ARB_ARB_REQ_CLR3BNX2_NVM_SW_ARB_ARB_REQ_CLR3 (1L<<7) bnx2.h 　
26307
 BNX2_NVM_SW_ARB_ARB_ARB0BNX2_NVM_SW_ARB_ARB_ARB0 (1L<<8) bnx2.h 　
26308
 BNX2_NVM_SW_ARB_ARB_ARB1BNX2_NVM_SW_ARB_ARB_ARB1 (1L<<9) bnx2.h 　
26309
 BNX2_NVM_SW_ARB_ARB_ARB2BNX2_NVM_SW_ARB_ARB_ARB2 (1L<<10) bnx2.h 　
26310
 BNX2_NVM_SW_ARB_ARB_ARB3BNX2_NVM_SW_ARB_ARB_ARB3 (1L<<11) bnx2.h 　
26311
 BNX2_NVM_SW_ARB_REQ0BNX2_NVM_SW_ARB_REQ0 (1L<<12) bnx2.h 　
26312
 BNX2_NVM_SW_ARB_REQ1BNX2_NVM_SW_ARB_REQ1 (1L<<13) bnx2.h 　
26313
 BNX2_NVM_SW_ARB_REQ2BNX2_NVM_SW_ARB_REQ2 (1L<<14) bnx2.h 　
26314
 BNX2_NVM_SW_ARB_REQ3BNX2_NVM_SW_ARB_REQ3 (1L<<15) bnx2.h 　
26315
 BNX2_NVM_ACCESS_ENABLEBNX2_NVM_ACCESS_ENABLE 0x00006424 bnx2.h 　
26316
 BNX2_NVM_ACCESS_ENABLE_ENBNX2_NVM_ACCESS_ENABLE_EN (1L<<0) bnx2.h 　
26317
 BNX2_NVM_ACCESS_ENABLE_WR_ENBNX2_NVM_ACCESS_ENABLE_WR_EN (1L<<1) bnx2.h 　
26318
 BNX2_NVM_WRITE1BNX2_NVM_WRITE1 0x00006428 bnx2.h 　
26319
 BNX2_NVM_WRITE1_WREN_CMDBNX2_NVM_WRITE1_WREN_CMD (0xffL<<0) bnx2.h 　
26320
 BNX2_NVM_WRITE1_WRDI_CMDBNX2_NVM_WRITE1_WRDI_CMD (0xffL<<8) bnx2.h 　
26321
 BNX2_NVM_WRITE1_SR_DATABNX2_NVM_WRITE1_SR_DATA (0xffL<<16) bnx2.h 　
26322
 BNX2_DMA_COMMANDBNX2_DMA_COMMAND 0x00000c00 bnx2.h 　
26323
 BNX2_DMA_COMMAND_ENABLEBNX2_DMA_COMMAND_ENABLE (1L<<0) bnx2.h 　
26324
 BNX2_DMA_STATUSBNX2_DMA_STATUS 0x00000c04 bnx2.h 　
26325
 BNX2_DMA_STATUS_PAR_ERROR_STATEBNX2_DMA_STATUS_PAR_ERROR_STATE (1L<<0) bnx2.h 　
26326
 BNX2_DMA_STATUS_READ_TRANSFERS_BNX2_DMA_STATUS_READ_TRANSFERS_ (1L<<16) bnx2.h 　
26327
 BNX2_DMA_STATUS_READ_DELAY_PCI_BNX2_DMA_STATUS_READ_DELAY_PCI_ (1L<<17) bnx2.h 　
26328
 BNX2_DMA_STATUS_BIG_READ_TRANSFBNX2_DMA_STATUS_BIG_READ_TRANSF (1L<<18) bnx2.h 　
26329
 BNX2_DMA_STATUS_BIG_READ_DELAY_BNX2_DMA_STATUS_BIG_READ_DELAY_ (1L<<19) bnx2.h 　
26330
 BNX2_DMA_STATUS_BIG_READ_RETRY_BNX2_DMA_STATUS_BIG_READ_RETRY_ (1L<<20) bnx2.h 　
26331
 BNX2_DMA_STATUS_WRITE_TRANSFERSBNX2_DMA_STATUS_WRITE_TRANSFERS (1L<<21) bnx2.h 　
26332
 BNX2_DMA_STATUS_WRITE_DELAY_PCIBNX2_DMA_STATUS_WRITE_DELAY_PCI (1L<<22) bnx2.h 　
26333
 BNX2_DMA_STATUS_BIG_WRITE_TRANSBNX2_DMA_STATUS_BIG_WRITE_TRANS (1L<<23) bnx2.h 　
26334
 BNX2_DMA_STATUS_BIG_WRITE_DELAYBNX2_DMA_STATUS_BIG_WRITE_DELAY (1L<<24) bnx2.h 　
26335
 BNX2_DMA_STATUS_BIG_WRITE_RETRYBNX2_DMA_STATUS_BIG_WRITE_RETRY (1L<<25) bnx2.h 　
26336
 BNX2_DMA_CONFIGBNX2_DMA_CONFIG 0x00000c08 bnx2.h 　
26337
 BNX2_DMA_CONFIG_DATA_BYTE_SWAPBNX2_DMA_CONFIG_DATA_BYTE_SWAP (1L<<0) bnx2.h 　
26338
 BNX2_DMA_CONFIG_DATA_WORD_SWAPBNX2_DMA_CONFIG_DATA_WORD_SWAP (1L<<1) bnx2.h 　
26339
 BNX2_DMA_CONFIG_CNTL_BYTE_SWAPBNX2_DMA_CONFIG_CNTL_BYTE_SWAP (1L<<4) bnx2.h 　
26340
 BNX2_DMA_CONFIG_CNTL_WORD_SWAPBNX2_DMA_CONFIG_CNTL_WORD_SWAP (1L<<5) bnx2.h 　
26341
 BNX2_DMA_CONFIG_ONE_DMABNX2_DMA_CONFIG_ONE_DMA (1L<<6) bnx2.h 　
26342
 BNX2_DMA_CONFIG_CNTL_TWO_DMABNX2_DMA_CONFIG_CNTL_TWO_DMA (1L<<7) bnx2.h 　
26343
 BNX2_DMA_CONFIG_CNTL_FPGA_MODEBNX2_DMA_CONFIG_CNTL_FPGA_MODE (1L<<8) bnx2.h 　
26344
 BNX2_DMA_CONFIG_CNTL_PING_PONG_BNX2_DMA_CONFIG_CNTL_PING_PONG_ (1L<<10) bnx2.h 　
26345
 BNX2_DMA_CONFIG_CNTL_PCI_COMP_DBNX2_DMA_CONFIG_CNTL_PCI_COMP_D (1L<<11) bnx2.h 　
26346
 BNX2_DMA_CONFIG_NO_RCHANS_IN_USBNX2_DMA_CONFIG_NO_RCHANS_IN_US (0xfL<<12) bnx2.h 　
26347
 BNX2_DMA_CONFIG_NO_WCHANS_IN_USBNX2_DMA_CONFIG_NO_WCHANS_IN_US (0xfL<<16) bnx2.h 　
26348
 BNX2_DMA_CONFIG_PCI_CLK_CMP_BITBNX2_DMA_CONFIG_PCI_CLK_CMP_BIT (0x7L<<20) bnx2.h 　
26349
 BNX2_DMA_CONFIG_PCI_FAST_CLK_CMBNX2_DMA_CONFIG_PCI_FAST_CLK_CM (1L<<23) bnx2.h 　
26350
 BNX2_DMA_CONFIG_BIG_SIZEBNX2_DMA_CONFIG_BIG_SIZE (0xfL<<24) bnx2.h 　
26351
 BNX2_DMA_CONFIG_BIG_SIZE_NONEBNX2_DMA_CONFIG_BIG_SIZE_NONE (0x0L<<24) bnx2.h 　
26352
 BNX2_DMA_CONFIG_BIG_SIZE_64BNX2_DMA_CONFIG_BIG_SIZE_64 (0x1L<<24) bnx2.h 　
26353
 BNX2_DMA_CONFIG_BIG_SIZE_128BNX2_DMA_CONFIG_BIG_SIZE_128 (0x2L<<24) bnx2.h 　
26354
 BNX2_DMA_CONFIG_BIG_SIZE_256BNX2_DMA_CONFIG_BIG_SIZE_256 (0x4L<<24) bnx2.h 　
26355
 BNX2_DMA_CONFIG_BIG_SIZE_512BNX2_DMA_CONFIG_BIG_SIZE_512 (0x8L<<24) bnx2.h 　
26356
 BNX2_DMA_BLACKOUTBNX2_DMA_BLACKOUT 0x00000c0c bnx2.h 　
26357
 BNX2_DMA_BLACKOUT_RD_RETRY_BLACBNX2_DMA_BLACKOUT_RD_RETRY_BLAC (0xffL<<0) bnx2.h 　
26358
 BNX2_DMA_BLACKOUT_2ND_RD_RETRY_BNX2_DMA_BLACKOUT_2ND_RD_RETRY_ (0xffL<<8) bnx2.h 　
26359
 BNX2_DMA_BLACKOUT_WR_RETRY_BLACBNX2_DMA_BLACKOUT_WR_RETRY_BLAC (0xffL<<16) bnx2.h 　
26360
 BNX2_DMA_RCHAN_STATBNX2_DMA_RCHAN_STAT 0x00000c30 bnx2.h 　
26361
 BNX2_DMA_RCHAN_STAT_COMP_CODE_0BNX2_DMA_RCHAN_STAT_COMP_CODE_0 (0x7L<<0) bnx2.h 　
26362
 BNX2_DMA_RCHAN_STAT_PAR_ERR_0BNX2_DMA_RCHAN_STAT_PAR_ERR_0 (1L<<3) bnx2.h 　
26363
 BNX2_DMA_RCHAN_STAT_COMP_CODE_1BNX2_DMA_RCHAN_STAT_COMP_CODE_1 (0x7L<<4) bnx2.h 　
26364
 BNX2_DMA_RCHAN_STAT_PAR_ERR_1BNX2_DMA_RCHAN_STAT_PAR_ERR_1 (1L<<7) bnx2.h 　
26365
 BNX2_DMA_RCHAN_STAT_COMP_CODE_2BNX2_DMA_RCHAN_STAT_COMP_CODE_2 (0x7L<<8) bnx2.h 　
26366
 BNX2_DMA_RCHAN_STAT_PAR_ERR_2BNX2_DMA_RCHAN_STAT_PAR_ERR_2 (1L<<11) bnx2.h 　
26367
 BNX2_DMA_RCHAN_STAT_COMP_CODE_3BNX2_DMA_RCHAN_STAT_COMP_CODE_3 (0x7L<<12) bnx2.h 　
26368
 BNX2_DMA_RCHAN_STAT_PAR_ERR_3BNX2_DMA_RCHAN_STAT_PAR_ERR_3 (1L<<15) bnx2.h 　
26369
 BNX2_DMA_RCHAN_STAT_COMP_CODE_4BNX2_DMA_RCHAN_STAT_COMP_CODE_4 (0x7L<<16) bnx2.h 　
26370
 BNX2_DMA_RCHAN_STAT_PAR_ERR_4BNX2_DMA_RCHAN_STAT_PAR_ERR_4 (1L<<19) bnx2.h 　
26371
 BNX2_DMA_RCHAN_STAT_COMP_CODE_5BNX2_DMA_RCHAN_STAT_COMP_CODE_5 (0x7L<<20) bnx2.h 　
26372
 BNX2_DMA_RCHAN_STAT_PAR_ERR_5BNX2_DMA_RCHAN_STAT_PAR_ERR_5 (1L<<23) bnx2.h 　
26373
 BNX2_DMA_RCHAN_STAT_COMP_CODE_6BNX2_DMA_RCHAN_STAT_COMP_CODE_6 (0x7L<<24) bnx2.h 　
26374
 BNX2_DMA_RCHAN_STAT_PAR_ERR_6BNX2_DMA_RCHAN_STAT_PAR_ERR_6 (1L<<27) bnx2.h 　
26375
 BNX2_DMA_RCHAN_STAT_COMP_CODE_7BNX2_DMA_RCHAN_STAT_COMP_CODE_7 (0x7L<<28) bnx2.h 　
26376
 BNX2_DMA_RCHAN_STAT_PAR_ERR_7BNX2_DMA_RCHAN_STAT_PAR_ERR_7 (1L<<31) bnx2.h 　
26377
 BNX2_DMA_WCHAN_STATBNX2_DMA_WCHAN_STAT 0x00000c34 bnx2.h 　
26378
 BNX2_DMA_WCHAN_STAT_COMP_CODE_0BNX2_DMA_WCHAN_STAT_COMP_CODE_0 (0x7L<<0) bnx2.h 　
26379
 BNX2_DMA_WCHAN_STAT_PAR_ERR_0BNX2_DMA_WCHAN_STAT_PAR_ERR_0 (1L<<3) bnx2.h 　
26380
 BNX2_DMA_WCHAN_STAT_COMP_CODE_1BNX2_DMA_WCHAN_STAT_COMP_CODE_1 (0x7L<<4) bnx2.h 　
26381
 BNX2_DMA_WCHAN_STAT_PAR_ERR_1BNX2_DMA_WCHAN_STAT_PAR_ERR_1 (1L<<7) bnx2.h 　
26382
 BNX2_DMA_WCHAN_STAT_COMP_CODE_2BNX2_DMA_WCHAN_STAT_COMP_CODE_2 (0x7L<<8) bnx2.h 　
26383
 BNX2_DMA_WCHAN_STAT_PAR_ERR_2BNX2_DMA_WCHAN_STAT_PAR_ERR_2 (1L<<11) bnx2.h 　
26384
 BNX2_DMA_WCHAN_STAT_COMP_CODE_3BNX2_DMA_WCHAN_STAT_COMP_CODE_3 (0x7L<<12) bnx2.h 　
26385
 BNX2_DMA_WCHAN_STAT_PAR_ERR_3BNX2_DMA_WCHAN_STAT_PAR_ERR_3 (1L<<15) bnx2.h 　
26386
 BNX2_DMA_WCHAN_STAT_COMP_CODE_4BNX2_DMA_WCHAN_STAT_COMP_CODE_4 (0x7L<<16) bnx2.h 　
26387
 BNX2_DMA_WCHAN_STAT_PAR_ERR_4BNX2_DMA_WCHAN_STAT_PAR_ERR_4 (1L<<19) bnx2.h 　
26388
 BNX2_DMA_WCHAN_STAT_COMP_CODE_5BNX2_DMA_WCHAN_STAT_COMP_CODE_5 (0x7L<<20) bnx2.h 　
26389
 BNX2_DMA_WCHAN_STAT_PAR_ERR_5BNX2_DMA_WCHAN_STAT_PAR_ERR_5 (1L<<23) bnx2.h 　
26390
 BNX2_DMA_WCHAN_STAT_COMP_CODE_6BNX2_DMA_WCHAN_STAT_COMP_CODE_6 (0x7L<<24) bnx2.h 　
26391
 BNX2_DMA_WCHAN_STAT_PAR_ERR_6BNX2_DMA_WCHAN_STAT_PAR_ERR_6 (1L<<27) bnx2.h 　
26392
 BNX2_DMA_WCHAN_STAT_COMP_CODE_7BNX2_DMA_WCHAN_STAT_COMP_CODE_7 (0x7L<<28) bnx2.h 　
26393
 BNX2_DMA_WCHAN_STAT_PAR_ERR_7BNX2_DMA_WCHAN_STAT_PAR_ERR_7 (1L<<31) bnx2.h 　
26394
 BNX2_DMA_RCHAN_ASSIGNMENTBNX2_DMA_RCHAN_ASSIGNMENT 0x00000c38 bnx2.h 　
26395
 BNX2_DMA_RCHAN_ASSIGNMENT_0BNX2_DMA_RCHAN_ASSIGNMENT_0 (0xfL<<0) bnx2.h 　
26396
 BNX2_DMA_RCHAN_ASSIGNMENT_1BNX2_DMA_RCHAN_ASSIGNMENT_1 (0xfL<<4) bnx2.h 　
26397
 BNX2_DMA_RCHAN_ASSIGNMENT_2BNX2_DMA_RCHAN_ASSIGNMENT_2 (0xfL<<8) bnx2.h 　
26398
 BNX2_DMA_RCHAN_ASSIGNMENT_3BNX2_DMA_RCHAN_ASSIGNMENT_3 (0xfL<<12) bnx2.h 　
26399
 BNX2_DMA_RCHAN_ASSIGNMENT_4BNX2_DMA_RCHAN_ASSIGNMENT_4 (0xfL<<16) bnx2.h 　
26400
 BNX2_DMA_RCHAN_ASSIGNMENT_5BNX2_DMA_RCHAN_ASSIGNMENT_5 (0xfL<<20) bnx2.h 　
26401
 BNX2_DMA_RCHAN_ASSIGNMENT_6BNX2_DMA_RCHAN_ASSIGNMENT_6 (0xfL<<24) bnx2.h 　
26402
 BNX2_DMA_RCHAN_ASSIGNMENT_7BNX2_DMA_RCHAN_ASSIGNMENT_7 (0xfL<<28) bnx2.h 　
26403
 BNX2_DMA_WCHAN_ASSIGNMENTBNX2_DMA_WCHAN_ASSIGNMENT 0x00000c3c bnx2.h 　
26404
 BNX2_DMA_WCHAN_ASSIGNMENT_0BNX2_DMA_WCHAN_ASSIGNMENT_0 (0xfL<<0) bnx2.h 　
26405
 BNX2_DMA_WCHAN_ASSIGNMENT_1BNX2_DMA_WCHAN_ASSIGNMENT_1 (0xfL<<4) bnx2.h 　
26406
 BNX2_DMA_WCHAN_ASSIGNMENT_2BNX2_DMA_WCHAN_ASSIGNMENT_2 (0xfL<<8) bnx2.h 　
26407
 BNX2_DMA_WCHAN_ASSIGNMENT_3BNX2_DMA_WCHAN_ASSIGNMENT_3 (0xfL<<12) bnx2.h 　
26408
 BNX2_DMA_WCHAN_ASSIGNMENT_4BNX2_DMA_WCHAN_ASSIGNMENT_4 (0xfL<<16) bnx2.h 　
26409
 BNX2_DMA_WCHAN_ASSIGNMENT_5BNX2_DMA_WCHAN_ASSIGNMENT_5 (0xfL<<20) bnx2.h 　
26410
 BNX2_DMA_WCHAN_ASSIGNMENT_6BNX2_DMA_WCHAN_ASSIGNMENT_6 (0xfL<<24) bnx2.h 　
26411
 BNX2_DMA_WCHAN_ASSIGNMENT_7BNX2_DMA_WCHAN_ASSIGNMENT_7 (0xfL<<28) bnx2.h 　
26412
 BNX2_DMA_RCHAN_STAT_00BNX2_DMA_RCHAN_STAT_00 0x00000c40 bnx2.h 　
26413
 BNX2_DMA_RCHAN_STAT_00_RCHAN_STBNX2_DMA_RCHAN_STAT_00_RCHAN_ST (0xffffffffL<<0) bnx2.h 　
26414
 BNX2_DMA_RCHAN_STAT_01BNX2_DMA_RCHAN_STAT_01 0x00000c44 bnx2.h 　
26415
 BNX2_DMA_RCHAN_STAT_01_RCHAN_STBNX2_DMA_RCHAN_STAT_01_RCHAN_ST (0xffffffffL<<0) bnx2.h 　
26416
 BNX2_DMA_RCHAN_STAT_02BNX2_DMA_RCHAN_STAT_02 0x00000c48 bnx2.h 　
26417
 BNX2_DMA_RCHAN_STAT_02_LENGTHBNX2_DMA_RCHAN_STAT_02_LENGTH (0xffffL<<0) bnx2.h 　
26418
 BNX2_DMA_RCHAN_STAT_02_WORD_SWABNX2_DMA_RCHAN_STAT_02_WORD_SWA (1L<<16) bnx2.h 　
26419
 BNX2_DMA_RCHAN_STAT_02_BYTE_SWABNX2_DMA_RCHAN_STAT_02_BYTE_SWA (1L<<17) bnx2.h 　
26420
 BNX2_DMA_RCHAN_STAT_02_PRIORITYBNX2_DMA_RCHAN_STAT_02_PRIORITY (1L<<18) bnx2.h 　
26421
 BNX2_DMA_RCHAN_STAT_10BNX2_DMA_RCHAN_STAT_10 0x00000c4c bnx2.h 　
26422
 BNX2_DMA_RCHAN_STAT_11BNX2_DMA_RCHAN_STAT_11 0x00000c50 bnx2.h 　
26423
 BNX2_DMA_RCHAN_STAT_12BNX2_DMA_RCHAN_STAT_12 0x00000c54 bnx2.h 　
26424
 BNX2_DMA_RCHAN_STAT_20BNX2_DMA_RCHAN_STAT_20 0x00000c58 bnx2.h 　
26425
 BNX2_DMA_RCHAN_STAT_21BNX2_DMA_RCHAN_STAT_21 0x00000c5c bnx2.h 　
26426
 BNX2_DMA_RCHAN_STAT_22BNX2_DMA_RCHAN_STAT_22 0x00000c60 bnx2.h 　
26427
 BNX2_DMA_RCHAN_STAT_30BNX2_DMA_RCHAN_STAT_30 0x00000c64 bnx2.h 　
26428
 BNX2_DMA_RCHAN_STAT_31BNX2_DMA_RCHAN_STAT_31 0x00000c68 bnx2.h 　
26429
 BNX2_DMA_RCHAN_STAT_32BNX2_DMA_RCHAN_STAT_32 0x00000c6c bnx2.h 　
26430
 BNX2_DMA_RCHAN_STAT_40BNX2_DMA_RCHAN_STAT_40 0x00000c70 bnx2.h 　
26431
 BNX2_DMA_RCHAN_STAT_41BNX2_DMA_RCHAN_STAT_41 0x00000c74 bnx2.h 　
26432
 BNX2_DMA_RCHAN_STAT_42BNX2_DMA_RCHAN_STAT_42 0x00000c78 bnx2.h 　
26433
 BNX2_DMA_RCHAN_STAT_50BNX2_DMA_RCHAN_STAT_50 0x00000c7c bnx2.h 　
26434
 BNX2_DMA_RCHAN_STAT_51BNX2_DMA_RCHAN_STAT_51 0x00000c80 bnx2.h 　
26435
 BNX2_DMA_RCHAN_STAT_52BNX2_DMA_RCHAN_STAT_52 0x00000c84 bnx2.h 　
26436
 BNX2_DMA_RCHAN_STAT_60BNX2_DMA_RCHAN_STAT_60 0x00000c88 bnx2.h 　
26437
 BNX2_DMA_RCHAN_STAT_61BNX2_DMA_RCHAN_STAT_61 0x00000c8c bnx2.h 　
26438
 BNX2_DMA_RCHAN_STAT_62BNX2_DMA_RCHAN_STAT_62 0x00000c90 bnx2.h 　
26439
 BNX2_DMA_RCHAN_STAT_70BNX2_DMA_RCHAN_STAT_70 0x00000c94 bnx2.h 　
26440
 BNX2_DMA_RCHAN_STAT_71BNX2_DMA_RCHAN_STAT_71 0x00000c98 bnx2.h 　
26441
 BNX2_DMA_RCHAN_STAT_72BNX2_DMA_RCHAN_STAT_72 0x00000c9c bnx2.h 　
26442
 BNX2_DMA_WCHAN_STAT_00BNX2_DMA_WCHAN_STAT_00 0x00000ca0 bnx2.h 　
26443
 BNX2_DMA_WCHAN_STAT_00_WCHAN_STBNX2_DMA_WCHAN_STAT_00_WCHAN_ST (0xffffffffL<<0) bnx2.h 　
26444
 BNX2_DMA_WCHAN_STAT_01BNX2_DMA_WCHAN_STAT_01 0x00000ca4 bnx2.h 　
26445
 BNX2_DMA_WCHAN_STAT_01_WCHAN_STBNX2_DMA_WCHAN_STAT_01_WCHAN_ST (0xffffffffL<<0) bnx2.h 　
26446
 BNX2_DMA_WCHAN_STAT_02BNX2_DMA_WCHAN_STAT_02 0x00000ca8 bnx2.h 　
26447
 BNX2_DMA_WCHAN_STAT_02_LENGTHBNX2_DMA_WCHAN_STAT_02_LENGTH (0xffffL<<0) bnx2.h 　
26448
 BNX2_DMA_WCHAN_STAT_02_WORD_SWABNX2_DMA_WCHAN_STAT_02_WORD_SWA (1L<<16) bnx2.h 　
26449
 BNX2_DMA_WCHAN_STAT_02_BYTE_SWABNX2_DMA_WCHAN_STAT_02_BYTE_SWA (1L<<17) bnx2.h 　
26450
 BNX2_DMA_WCHAN_STAT_02_PRIORITYBNX2_DMA_WCHAN_STAT_02_PRIORITY (1L<<18) bnx2.h 　
26451
 BNX2_DMA_WCHAN_STAT_10BNX2_DMA_WCHAN_STAT_10 0x00000cac bnx2.h 　
26452
 BNX2_DMA_WCHAN_STAT_11BNX2_DMA_WCHAN_STAT_11 0x00000cb0 bnx2.h 　
26453
 BNX2_DMA_WCHAN_STAT_12BNX2_DMA_WCHAN_STAT_12 0x00000cb4 bnx2.h 　
26454
 BNX2_DMA_WCHAN_STAT_20BNX2_DMA_WCHAN_STAT_20 0x00000cb8 bnx2.h 　
26455
 BNX2_DMA_WCHAN_STAT_21BNX2_DMA_WCHAN_STAT_21 0x00000cbc bnx2.h 　
26456
 BNX2_DMA_WCHAN_STAT_22BNX2_DMA_WCHAN_STAT_22 0x00000cc0 bnx2.h 　
26457
 BNX2_DMA_WCHAN_STAT_30BNX2_DMA_WCHAN_STAT_30 0x00000cc4 bnx2.h 　
26458
 BNX2_DMA_WCHAN_STAT_31BNX2_DMA_WCHAN_STAT_31 0x00000cc8 bnx2.h 　
26459
 BNX2_DMA_WCHAN_STAT_32BNX2_DMA_WCHAN_STAT_32 0x00000ccc bnx2.h 　
26460
 BNX2_DMA_WCHAN_STAT_40BNX2_DMA_WCHAN_STAT_40 0x00000cd0 bnx2.h 　
26461
 BNX2_DMA_WCHAN_STAT_41BNX2_DMA_WCHAN_STAT_41 0x00000cd4 bnx2.h 　
26462
 BNX2_DMA_WCHAN_STAT_42BNX2_DMA_WCHAN_STAT_42 0x00000cd8 bnx2.h 　
26463
 BNX2_DMA_WCHAN_STAT_50BNX2_DMA_WCHAN_STAT_50 0x00000cdc bnx2.h 　
26464
 BNX2_DMA_WCHAN_STAT_51BNX2_DMA_WCHAN_STAT_51 0x00000ce0 bnx2.h 　
26465
 BNX2_DMA_WCHAN_STAT_52BNX2_DMA_WCHAN_STAT_52 0x00000ce4 bnx2.h 　
26466
 BNX2_DMA_WCHAN_STAT_60BNX2_DMA_WCHAN_STAT_60 0x00000ce8 bnx2.h 　
26467
 BNX2_DMA_WCHAN_STAT_61BNX2_DMA_WCHAN_STAT_61 0x00000cec bnx2.h 　
26468
 BNX2_DMA_WCHAN_STAT_62BNX2_DMA_WCHAN_STAT_62 0x00000cf0 bnx2.h 　
26469
 BNX2_DMA_WCHAN_STAT_70BNX2_DMA_WCHAN_STAT_70 0x00000cf4 bnx2.h 　
26470
 BNX2_DMA_WCHAN_STAT_71BNX2_DMA_WCHAN_STAT_71 0x00000cf8 bnx2.h 　
26471
 BNX2_DMA_WCHAN_STAT_72BNX2_DMA_WCHAN_STAT_72 0x00000cfc bnx2.h 　
26472
 BNX2_DMA_ARB_STAT_00BNX2_DMA_ARB_STAT_00 0x00000d00 bnx2.h 　
26473
 BNX2_DMA_ARB_STAT_00_MASTERBNX2_DMA_ARB_STAT_00_MASTER (0xffffL<<0) bnx2.h 　
26474
 BNX2_DMA_ARB_STAT_00_MASTER_ENCBNX2_DMA_ARB_STAT_00_MASTER_ENC (0xffL<<16) bnx2.h 　
26475
 BNX2_DMA_ARB_STAT_00_CUR_BINMSTBNX2_DMA_ARB_STAT_00_CUR_BINMST (0xffL<<24) bnx2.h 　
26476
 BNX2_DMA_ARB_STAT_01BNX2_DMA_ARB_STAT_01 0x00000d04 bnx2.h 　
26477
 BNX2_DMA_ARB_STAT_01_LPR_RPTRBNX2_DMA_ARB_STAT_01_LPR_RPTR (0xfL<<0) bnx2.h 　
26478
 BNX2_DMA_ARB_STAT_01_LPR_WPTRBNX2_DMA_ARB_STAT_01_LPR_WPTR (0xfL<<4) bnx2.h 　
26479
 BNX2_DMA_ARB_STAT_01_LPB_RPTRBNX2_DMA_ARB_STAT_01_LPB_RPTR (0xfL<<8) bnx2.h 　
26480
 BNX2_DMA_ARB_STAT_01_LPB_WPTRBNX2_DMA_ARB_STAT_01_LPB_WPTR (0xfL<<12) bnx2.h 　
26481
 BNX2_DMA_ARB_STAT_01_HPR_RPTRBNX2_DMA_ARB_STAT_01_HPR_RPTR (0xfL<<16) bnx2.h 　
26482
 BNX2_DMA_ARB_STAT_01_HPR_WPTRBNX2_DMA_ARB_STAT_01_HPR_WPTR (0xfL<<20) bnx2.h 　
26483
 BNX2_DMA_ARB_STAT_01_HPB_RPTRBNX2_DMA_ARB_STAT_01_HPB_RPTR (0xfL<<24) bnx2.h 　
26484
 BNX2_DMA_ARB_STAT_01_HPB_WPTRBNX2_DMA_ARB_STAT_01_HPB_WPTR (0xfL<<28) bnx2.h 　
26485
 BNX2_DMA_FUSE_CTRL0_CMDBNX2_DMA_FUSE_CTRL0_CMD 0x00000f00 bnx2.h 　
26486
 BNX2_DMA_FUSE_CTRL0_CMD_PWRUP_DBNX2_DMA_FUSE_CTRL0_CMD_PWRUP_D (1L<<0) bnx2.h 　
26487
 BNX2_DMA_FUSE_CTRL0_CMD_SHIFT_DBNX2_DMA_FUSE_CTRL0_CMD_SHIFT_D (1L<<1) bnx2.h 　
26488
 BNX2_DMA_FUSE_CTRL0_CMD_SHIFTBNX2_DMA_FUSE_CTRL0_CMD_SHIFT (1L<<2) bnx2.h 　
26489
 BNX2_DMA_FUSE_CTRL0_CMD_LOADBNX2_DMA_FUSE_CTRL0_CMD_LOAD (1L<<3) bnx2.h 　
26490
 BNX2_DMA_FUSE_CTRL0_CMD_SELBNX2_DMA_FUSE_CTRL0_CMD_SEL (0xfL<<8) bnx2.h 　
26491
 BNX2_DMA_FUSE_CTRL0_DATABNX2_DMA_FUSE_CTRL0_DATA 0x00000f04 bnx2.h 　
26492
 BNX2_DMA_FUSE_CTRL1_CMDBNX2_DMA_FUSE_CTRL1_CMD 0x00000f08 bnx2.h 　
26493
 BNX2_DMA_FUSE_CTRL1_CMD_PWRUP_DBNX2_DMA_FUSE_CTRL1_CMD_PWRUP_D (1L<<0) bnx2.h 　
26494
 BNX2_DMA_FUSE_CTRL1_CMD_SHIFT_DBNX2_DMA_FUSE_CTRL1_CMD_SHIFT_D (1L<<1) bnx2.h 　
26495
 BNX2_DMA_FUSE_CTRL1_CMD_SHIFTBNX2_DMA_FUSE_CTRL1_CMD_SHIFT (1L<<2) bnx2.h 　
26496
 BNX2_DMA_FUSE_CTRL1_CMD_LOADBNX2_DMA_FUSE_CTRL1_CMD_LOAD (1L<<3) bnx2.h 　
26497
 BNX2_DMA_FUSE_CTRL1_CMD_SELBNX2_DMA_FUSE_CTRL1_CMD_SEL (0xfL<<8) bnx2.h 　
26498
 BNX2_DMA_FUSE_CTRL1_DATABNX2_DMA_FUSE_CTRL1_DATA 0x00000f0c bnx2.h 　
26499
 BNX2_DMA_FUSE_CTRL2_CMDBNX2_DMA_FUSE_CTRL2_CMD 0x00000f10 bnx2.h 　
26500
 BNX2_DMA_FUSE_CTRL2_CMD_PWRUP_DBNX2_DMA_FUSE_CTRL2_CMD_PWRUP_D (1L<<0) bnx2.h 　
26501
 BNX2_DMA_FUSE_CTRL2_CMD_SHIFT_DBNX2_DMA_FUSE_CTRL2_CMD_SHIFT_D (1L<<1) bnx2.h 　
26502
 BNX2_DMA_FUSE_CTRL2_CMD_SHIFTBNX2_DMA_FUSE_CTRL2_CMD_SHIFT (1L<<2) bnx2.h 　
26503
 BNX2_DMA_FUSE_CTRL2_CMD_LOADBNX2_DMA_FUSE_CTRL2_CMD_LOAD (1L<<3) bnx2.h 　
26504
 BNX2_DMA_FUSE_CTRL2_CMD_SELBNX2_DMA_FUSE_CTRL2_CMD_SEL (0xfL<<8) bnx2.h 　
26505
 BNX2_DMA_FUSE_CTRL2_DATABNX2_DMA_FUSE_CTRL2_DATA 0x00000f14 bnx2.h 　
26506
 BNX2_CTX_COMMANDBNX2_CTX_COMMAND 0x00001000 bnx2.h 　
26507
 BNX2_CTX_COMMAND_ENABLEDBNX2_CTX_COMMAND_ENABLED (1L<<0) bnx2.h 　
26508
 BNX2_CTX_STATUSBNX2_CTX_STATUS 0x00001004 bnx2.h 　
26509
 BNX2_CTX_STATUS_LOCK_WAITBNX2_CTX_STATUS_LOCK_WAIT (1L<<0) bnx2.h 　
26510
 BNX2_CTX_STATUS_READ_STATBNX2_CTX_STATUS_READ_STAT (1L<<16) bnx2.h 　
26511
 BNX2_CTX_STATUS_WRITE_STATBNX2_CTX_STATUS_WRITE_STAT (1L<<17) bnx2.h 　
26512
 BNX2_CTX_STATUS_ACC_STALL_STATBNX2_CTX_STATUS_ACC_STALL_STAT (1L<<18) bnx2.h 　
26513
 BNX2_CTX_STATUS_LOCK_STALL_STATBNX2_CTX_STATUS_LOCK_STALL_STAT (1L<<19) bnx2.h 　
26514
 BNX2_CTX_VIRT_ADDRBNX2_CTX_VIRT_ADDR 0x00001008 bnx2.h 　
26515
 BNX2_CTX_VIRT_ADDR_VIRT_ADDRBNX2_CTX_VIRT_ADDR_VIRT_ADDR (0x7fffL<<6) bnx2.h 　
26516
 BNX2_CTX_PAGE_TBLBNX2_CTX_PAGE_TBL 0x0000100c bnx2.h 　
26517
 BNX2_CTX_PAGE_TBL_PAGE_TBLBNX2_CTX_PAGE_TBL_PAGE_TBL (0x3fffL<<6) bnx2.h 　
26518
 BNX2_CTX_DATA_ADRBNX2_CTX_DATA_ADR 0x00001010 bnx2.h 　
26519
 BNX2_CTX_DATA_ADR_DATA_ADRBNX2_CTX_DATA_ADR_DATA_ADR (0x7ffffL<<2) bnx2.h 　
26520
 BNX2_CTX_DATABNX2_CTX_DATA 0x00001014 bnx2.h 　
26521
 BNX2_CTX_LOCKBNX2_CTX_LOCK 0x00001018 bnx2.h 　
26522
 BNX2_CTX_LOCK_TYPEBNX2_CTX_LOCK_TYPE (0x7L<<0) bnx2.h 　
26523
 BNX2_CTX_LOCK_TYPE_LOCK_TYPE_VOBNX2_CTX_LOCK_TYPE_LOCK_TYPE_VO (0x0L<<0) bnx2.h 　
26524
 BNX2_CTX_LOCK_TYPE_LOCK_TYPE_COBNX2_CTX_LOCK_TYPE_LOCK_TYPE_CO (0x7L<<0) bnx2.h 　
26525
 BNX2_CTX_LOCK_TYPE_LOCK_TYPE_PRBNX2_CTX_LOCK_TYPE_LOCK_TYPE_PR (0x1L<<0) bnx2.h 　
26526
 BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TXBNX2_CTX_LOCK_TYPE_LOCK_TYPE_TX (0x2L<<0) bnx2.h 　
26527
 BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TIBNX2_CTX_LOCK_TYPE_LOCK_TYPE_TI (0x4L<<0) bnx2.h 　
26528
 BNX2_CTX_LOCK_CID_VALUEBNX2_CTX_LOCK_CID_VALUE (0x3fffL<<7) bnx2.h 　
26529
 BNX2_CTX_LOCK_GRANTEDBNX2_CTX_LOCK_GRANTED (1L<<26) bnx2.h 　
26530
 BNX2_CTX_LOCK_MODEBNX2_CTX_LOCK_MODE (0x7L<<27) bnx2.h 　
26531
 BNX2_CTX_LOCK_MODE_UNLOCKBNX2_CTX_LOCK_MODE_UNLOCK (0x0L<<27) bnx2.h 　
26532
 BNX2_CTX_LOCK_MODE_IMMEDIATEBNX2_CTX_LOCK_MODE_IMMEDIATE (0x1L<<27) bnx2.h 　
26533
 BNX2_CTX_LOCK_MODE_SUREBNX2_CTX_LOCK_MODE_SURE (0x2L<<27) bnx2.h 　
26534
 BNX2_CTX_LOCK_STATUSBNX2_CTX_LOCK_STATUS (1L<<30) bnx2.h 　
26535
 BNX2_CTX_LOCK_REQBNX2_CTX_LOCK_REQ (1L<<31) bnx2.h 　
26536
 BNX2_CTX_ACCESS_STATUSBNX2_CTX_ACCESS_STATUS 0x00001040 bnx2.h 　
26537
 BNX2_CTX_ACCESS_STATUS_MASTERENBNX2_CTX_ACCESS_STATUS_MASTEREN (0xfL<<0) bnx2.h 　
26538
 BNX2_CTX_ACCESS_STATUS_ACCESSMEBNX2_CTX_ACCESS_STATUS_ACCESSME (0x3L<<10) bnx2.h 　
26539
 BNX2_CTX_ACCESS_STATUS_PAGETABLBNX2_CTX_ACCESS_STATUS_PAGETABL (0x3L<<12) bnx2.h 　
26540
 BNX2_CTX_ACCESS_STATUS_ACCESSMEBNX2_CTX_ACCESS_STATUS_ACCESSME (0x3L<<14) bnx2.h 　
26541
 BNX2_CTX_ACCESS_STATUS_QUALIFIEBNX2_CTX_ACCESS_STATUS_QUALIFIE (0x7ffL<<17) bnx2.h 　
26542
 BNX2_CTX_DBG_LOCK_STATUSBNX2_CTX_DBG_LOCK_STATUS 0x00001044 bnx2.h 　
26543
 BNX2_CTX_DBG_LOCK_STATUS_SMBNX2_CTX_DBG_LOCK_STATUS_SM (0x3ffL<<0) bnx2.h 　
26544
 BNX2_CTX_DBG_LOCK_STATUS_MATCHBNX2_CTX_DBG_LOCK_STATUS_MATCH (0x3ffL<<22) bnx2.h 　
26545
 BNX2_CTX_CHNL_LOCK_STATUS_0BNX2_CTX_CHNL_LOCK_STATUS_0 0x00001080 bnx2.h 　
26546
 BNX2_CTX_CHNL_LOCK_STATUS_0_CIDBNX2_CTX_CHNL_LOCK_STATUS_0_CID (0x3fffL<<0) bnx2.h 　
26547
 BNX2_CTX_CHNL_LOCK_STATUS_0_TYPBNX2_CTX_CHNL_LOCK_STATUS_0_TYP (0x3L<<14) bnx2.h 　
26548
 BNX2_CTX_CHNL_LOCK_STATUS_0_MODBNX2_CTX_CHNL_LOCK_STATUS_0_MOD (1L<<16) bnx2.h 　
26549
 BNX2_CTX_CHNL_LOCK_STATUS_1BNX2_CTX_CHNL_LOCK_STATUS_1 0x00001084 bnx2.h 　
26550
 BNX2_CTX_CHNL_LOCK_STATUS_2BNX2_CTX_CHNL_LOCK_STATUS_2 0x00001088 bnx2.h 　
26551
 BNX2_CTX_CHNL_LOCK_STATUS_3BNX2_CTX_CHNL_LOCK_STATUS_3 0x0000108c bnx2.h 　
26552
 BNX2_CTX_CHNL_LOCK_STATUS_4BNX2_CTX_CHNL_LOCK_STATUS_4 0x00001090 bnx2.h 　
26553
 BNX2_CTX_CHNL_LOCK_STATUS_5BNX2_CTX_CHNL_LOCK_STATUS_5 0x00001094 bnx2.h 　
26554
 BNX2_CTX_CHNL_LOCK_STATUS_6BNX2_CTX_CHNL_LOCK_STATUS_6 0x00001098 bnx2.h 　
26555
 BNX2_CTX_CHNL_LOCK_STATUS_7BNX2_CTX_CHNL_LOCK_STATUS_7 0x0000109c bnx2.h 　
26556
 BNX2_CTX_CHNL_LOCK_STATUS_8BNX2_CTX_CHNL_LOCK_STATUS_8 0x000010a0 bnx2.h 　
26557
 BNX2_EMAC_MODEBNX2_EMAC_MODE 0x00001400 bnx2.h 　
26558
 BNX2_EMAC_MODE_RESETBNX2_EMAC_MODE_RESET (1L<<0) bnx2.h 　
26559
 BNX2_EMAC_MODE_HALF_DUPLEXBNX2_EMAC_MODE_HALF_DUPLEX (1L<<1) bnx2.h 　
26560
 BNX2_EMAC_MODE_PORTBNX2_EMAC_MODE_PORT (0x3L<<2) bnx2.h 　
26561
 BNX2_EMAC_MODE_PORT_NONEBNX2_EMAC_MODE_PORT_NONE (0L<<2) bnx2.h 　
26562
 BNX2_EMAC_MODE_PORT_MIIBNX2_EMAC_MODE_PORT_MII (1L<<2) bnx2.h 　
26563
 BNX2_EMAC_MODE_PORT_GMIIBNX2_EMAC_MODE_PORT_GMII (2L<<2) bnx2.h 　
26564
 BNX2_EMAC_MODE_PORT_MII_10BNX2_EMAC_MODE_PORT_MII_10 (3L<<2) bnx2.h 　
26565
 BNX2_EMAC_MODE_MAC_LOOPBNX2_EMAC_MODE_MAC_LOOP (1L<<4) bnx2.h 　
26566
 BNX2_EMAC_MODE_25GBNX2_EMAC_MODE_25G (1L<<5) bnx2.h 　
26567
 BNX2_EMAC_MODE_TAGGED_MAC_CTLBNX2_EMAC_MODE_TAGGED_MAC_CTL (1L<<7) bnx2.h 　
26568
 BNX2_EMAC_MODE_TX_BURSTBNX2_EMAC_MODE_TX_BURST (1L<<8) bnx2.h 　
26569
 BNX2_EMAC_MODE_MAX_DEFER_DROP_EBNX2_EMAC_MODE_MAX_DEFER_DROP_E (1L<<9) bnx2.h 　
26570
 BNX2_EMAC_MODE_EXT_LINK_POLBNX2_EMAC_MODE_EXT_LINK_POL (1L<<10) bnx2.h 　
26571
 BNX2_EMAC_MODE_FORCE_LINKBNX2_EMAC_MODE_FORCE_LINK (1L<<11) bnx2.h 　
26572
 BNX2_EMAC_MODE_MPKTBNX2_EMAC_MODE_MPKT (1L<<18) bnx2.h 　
26573
 BNX2_EMAC_MODE_MPKT_RCVDBNX2_EMAC_MODE_MPKT_RCVD (1L<<19) bnx2.h 　
26574
 BNX2_EMAC_MODE_ACPI_RCVDBNX2_EMAC_MODE_ACPI_RCVD (1L<<20) bnx2.h 　
26575
 BNX2_EMAC_STATUSBNX2_EMAC_STATUS 0x00001404 bnx2.h 　
26576
 BNX2_EMAC_STATUS_LINKBNX2_EMAC_STATUS_LINK (1L<<11) bnx2.h 　
26577
 BNX2_EMAC_STATUS_LINK_CHANGEBNX2_EMAC_STATUS_LINK_CHANGE (1L<<12) bnx2.h 　
26578
 BNX2_EMAC_STATUS_MI_COMPLETEBNX2_EMAC_STATUS_MI_COMPLETE (1L<<22) bnx2.h 　
26579
 BNX2_EMAC_STATUS_MI_INTBNX2_EMAC_STATUS_MI_INT (1L<<23) bnx2.h 　
26580
 BNX2_EMAC_STATUS_AP_ERRORBNX2_EMAC_STATUS_AP_ERROR (1L<<24) bnx2.h 　
26581
 BNX2_EMAC_STATUS_PARITY_ERROR_SBNX2_EMAC_STATUS_PARITY_ERROR_S (1L<<31) bnx2.h 　
26582
 BNX2_EMAC_ATTENTION_ENABNX2_EMAC_ATTENTION_ENA 0x00001408 bnx2.h 　
26583
 BNX2_EMAC_ATTENTION_ENA_LINKBNX2_EMAC_ATTENTION_ENA_LINK (1L<<11) bnx2.h 　
26584
 BNX2_EMAC_ATTENTION_ENA_MI_COMPBNX2_EMAC_ATTENTION_ENA_MI_COMP (1L<<22) bnx2.h 　
26585
 BNX2_EMAC_ATTENTION_ENA_MI_INTBNX2_EMAC_ATTENTION_ENA_MI_INT (1L<<23) bnx2.h 　
26586
 BNX2_EMAC_ATTENTION_ENA_AP_ERROBNX2_EMAC_ATTENTION_ENA_AP_ERRO (1L<<24) bnx2.h 　
26587
 BNX2_EMAC_LEDBNX2_EMAC_LED 0x0000140c bnx2.h 　
26588
 BNX2_EMAC_LED_OVERRIDEBNX2_EMAC_LED_OVERRIDE (1L<<0) bnx2.h 　
26589
 BNX2_EMAC_LED_1000MB_OVERRIDEBNX2_EMAC_LED_1000MB_OVERRIDE (1L<<1) bnx2.h 　
26590
 BNX2_EMAC_LED_100MB_OVERRIDEBNX2_EMAC_LED_100MB_OVERRIDE (1L<<2) bnx2.h 　
26591
 BNX2_EMAC_LED_10MB_OVERRIDEBNX2_EMAC_LED_10MB_OVERRIDE (1L<<3) bnx2.h 　
26592
 BNX2_EMAC_LED_TRAFFIC_OVERRIDEBNX2_EMAC_LED_TRAFFIC_OVERRIDE (1L<<4) bnx2.h 　
26593
 BNX2_EMAC_LED_BLNK_TRAFFICBNX2_EMAC_LED_BLNK_TRAFFIC (1L<<5) bnx2.h 　
26594
 BNX2_EMAC_LED_TRAFFICBNX2_EMAC_LED_TRAFFIC (1L<<6) bnx2.h 　
26595
 BNX2_EMAC_LED_1000MBBNX2_EMAC_LED_1000MB (1L<<7) bnx2.h 　
26596
 BNX2_EMAC_LED_100MBBNX2_EMAC_LED_100MB (1L<<8) bnx2.h 　
26597
 BNX2_EMAC_LED_10MBBNX2_EMAC_LED_10MB (1L<<9) bnx2.h 　
26598
 BNX2_EMAC_LED_TRAFFIC_STATBNX2_EMAC_LED_TRAFFIC_STAT (1L<<10) bnx2.h 　
26599
 BNX2_EMAC_LED_BLNK_RATEBNX2_EMAC_LED_BLNK_RATE (0xfffL<<19) bnx2.h 　
26600
 BNX2_EMAC_LED_BLNK_RATE_ENABNX2_EMAC_LED_BLNK_RATE_ENA (1L<<31) bnx2.h 　
26601
 BNX2_EMAC_MAC_MATCH0BNX2_EMAC_MAC_MATCH0 0x00001410 bnx2.h 　
26602
 BNX2_EMAC_MAC_MATCH1BNX2_EMAC_MAC_MATCH1 0x00001414 bnx2.h 　
26603
 BNX2_EMAC_MAC_MATCH2BNX2_EMAC_MAC_MATCH2 0x00001418 bnx2.h 　
26604
 BNX2_EMAC_MAC_MATCH3BNX2_EMAC_MAC_MATCH3 0x0000141c bnx2.h 　
26605
 BNX2_EMAC_MAC_MATCH4BNX2_EMAC_MAC_MATCH4 0x00001420 bnx2.h 　
26606
 BNX2_EMAC_MAC_MATCH5BNX2_EMAC_MAC_MATCH5 0x00001424 bnx2.h 　
26607
 BNX2_EMAC_MAC_MATCH6BNX2_EMAC_MAC_MATCH6 0x00001428 bnx2.h 　
26608
 BNX2_EMAC_MAC_MATCH7BNX2_EMAC_MAC_MATCH7 0x0000142c bnx2.h 　
26609
 BNX2_EMAC_MAC_MATCH8BNX2_EMAC_MAC_MATCH8 0x00001430 bnx2.h 　
26610
 BNX2_EMAC_MAC_MATCH9BNX2_EMAC_MAC_MATCH9 0x00001434 bnx2.h 　
26611
 BNX2_EMAC_MAC_MATCH10BNX2_EMAC_MAC_MATCH10 0x00001438 bnx2.h 　
26612
 BNX2_EMAC_MAC_MATCH11BNX2_EMAC_MAC_MATCH11 0x0000143c bnx2.h 　
26613
 BNX2_EMAC_MAC_MATCH12BNX2_EMAC_MAC_MATCH12 0x00001440 bnx2.h 　
26614
 BNX2_EMAC_MAC_MATCH13BNX2_EMAC_MAC_MATCH13 0x00001444 bnx2.h 　
26615
 BNX2_EMAC_MAC_MATCH14BNX2_EMAC_MAC_MATCH14 0x00001448 bnx2.h 　
26616
 BNX2_EMAC_MAC_MATCH15BNX2_EMAC_MAC_MATCH15 0x0000144c bnx2.h 　
26617
 BNX2_EMAC_MAC_MATCH16BNX2_EMAC_MAC_MATCH16 0x00001450 bnx2.h 　
26618
 BNX2_EMAC_MAC_MATCH17BNX2_EMAC_MAC_MATCH17 0x00001454 bnx2.h 　
26619
 BNX2_EMAC_MAC_MATCH18BNX2_EMAC_MAC_MATCH18 0x00001458 bnx2.h 　
26620
 BNX2_EMAC_MAC_MATCH19BNX2_EMAC_MAC_MATCH19 0x0000145c bnx2.h 　
26621
 BNX2_EMAC_MAC_MATCH20BNX2_EMAC_MAC_MATCH20 0x00001460 bnx2.h 　
26622
 BNX2_EMAC_MAC_MATCH21BNX2_EMAC_MAC_MATCH21 0x00001464 bnx2.h 　
26623
 BNX2_EMAC_MAC_MATCH22BNX2_EMAC_MAC_MATCH22 0x00001468 bnx2.h 　
26624
 BNX2_EMAC_MAC_MATCH23BNX2_EMAC_MAC_MATCH23 0x0000146c bnx2.h 　
26625
 BNX2_EMAC_MAC_MATCH24BNX2_EMAC_MAC_MATCH24 0x00001470 bnx2.h 　
26626
 BNX2_EMAC_MAC_MATCH25BNX2_EMAC_MAC_MATCH25 0x00001474 bnx2.h 　
26627
 BNX2_EMAC_MAC_MATCH26BNX2_EMAC_MAC_MATCH26 0x00001478 bnx2.h 　
26628
 BNX2_EMAC_MAC_MATCH27BNX2_EMAC_MAC_MATCH27 0x0000147c bnx2.h 　
26629
 BNX2_EMAC_MAC_MATCH28BNX2_EMAC_MAC_MATCH28 0x00001480 bnx2.h 　
26630
 BNX2_EMAC_MAC_MATCH29BNX2_EMAC_MAC_MATCH29 0x00001484 bnx2.h 　
26631
 BNX2_EMAC_MAC_MATCH30BNX2_EMAC_MAC_MATCH30 0x00001488 bnx2.h 　
26632
 BNX2_EMAC_MAC_MATCH31BNX2_EMAC_MAC_MATCH31 0x0000148c bnx2.h 　
26633
 BNX2_EMAC_BACKOFF_SEEDBNX2_EMAC_BACKOFF_SEED 0x00001498 bnx2.h 　
26634
 BNX2_EMAC_BACKOFF_SEED_EMAC_BACBNX2_EMAC_BACKOFF_SEED_EMAC_BAC (0x3ffL<<0) bnx2.h 　
26635
 BNX2_EMAC_RX_MTU_SIZEBNX2_EMAC_RX_MTU_SIZE 0x0000149c bnx2.h 　
26636
 BNX2_EMAC_RX_MTU_SIZE_MTU_SIZEBNX2_EMAC_RX_MTU_SIZE_MTU_SIZE (0xffffL<<0) bnx2.h 　
26637
 BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENABNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA (1L<<31) bnx2.h 　
26638
 BNX2_EMAC_SERDES_CNTLBNX2_EMAC_SERDES_CNTL 0x000014a4 bnx2.h 　
26639
 BNX2_EMAC_SERDES_CNTL_RXRBNX2_EMAC_SERDES_CNTL_RXR (0x7L<<0) bnx2.h 　
26640
 BNX2_EMAC_SERDES_CNTL_RXGBNX2_EMAC_SERDES_CNTL_RXG (0x3L<<3) bnx2.h 　
26641
 BNX2_EMAC_SERDES_CNTL_RXCKSELBNX2_EMAC_SERDES_CNTL_RXCKSEL (1L<<6) bnx2.h 　
26642
 BNX2_EMAC_SERDES_CNTL_TXBIASBNX2_EMAC_SERDES_CNTL_TXBIAS (0x7L<<7) bnx2.h 　
26643
 BNX2_EMAC_SERDES_CNTL_BGMAXBNX2_EMAC_SERDES_CNTL_BGMAX (1L<<10) bnx2.h 　
26644
 BNX2_EMAC_SERDES_CNTL_BGMINBNX2_EMAC_SERDES_CNTL_BGMIN (1L<<11) bnx2.h 　
26645
 BNX2_EMAC_SERDES_CNTL_TXMODEBNX2_EMAC_SERDES_CNTL_TXMODE (1L<<12) bnx2.h 　
26646
 BNX2_EMAC_SERDES_CNTL_TXEDGEBNX2_EMAC_SERDES_CNTL_TXEDGE (1L<<13) bnx2.h 　
26647
 BNX2_EMAC_SERDES_CNTL_SERDES_MOBNX2_EMAC_SERDES_CNTL_SERDES_MO (1L<<14) bnx2.h 　
26648
 BNX2_EMAC_SERDES_CNTL_PLLTESTBNX2_EMAC_SERDES_CNTL_PLLTEST (1L<<15) bnx2.h 　
26649
 BNX2_EMAC_SERDES_CNTL_CDET_ENBNX2_EMAC_SERDES_CNTL_CDET_EN (1L<<16) bnx2.h 　
26650
 BNX2_EMAC_SERDES_CNTL_TBI_LBKBNX2_EMAC_SERDES_CNTL_TBI_LBK (1L<<17) bnx2.h 　
26651
 BNX2_EMAC_SERDES_CNTL_REMOTE_LBBNX2_EMAC_SERDES_CNTL_REMOTE_LB (1L<<18) bnx2.h 　
26652
 BNX2_EMAC_SERDES_CNTL_REV_PHASEBNX2_EMAC_SERDES_CNTL_REV_PHASE (1L<<19) bnx2.h 　
26653
 BNX2_EMAC_SERDES_CNTL_REGCTL12BNX2_EMAC_SERDES_CNTL_REGCTL12 (0x3L<<20) bnx2.h 　
26654
 BNX2_EMAC_SERDES_CNTL_REGCTL25BNX2_EMAC_SERDES_CNTL_REGCTL25 (0x3L<<22) bnx2.h 　
26655
 BNX2_EMAC_SERDES_STATUSBNX2_EMAC_SERDES_STATUS 0x000014a8 bnx2.h 　
26656
 BNX2_EMAC_SERDES_STATUS_RX_STATBNX2_EMAC_SERDES_STATUS_RX_STAT (0xffL<<0) bnx2.h 　
26657
 BNX2_EMAC_SERDES_STATUS_COMMA_DBNX2_EMAC_SERDES_STATUS_COMMA_D (1L<<8) bnx2.h 　
26658
 BNX2_EMAC_MDIO_COMMBNX2_EMAC_MDIO_COMM 0x000014ac bnx2.h 　
26659
 BNX2_EMAC_MDIO_COMM_DATABNX2_EMAC_MDIO_COMM_DATA (0xffffL<<0) bnx2.h 　
26660
 BNX2_EMAC_MDIO_COMM_REG_ADDRBNX2_EMAC_MDIO_COMM_REG_ADDR (0x1fL<<16) bnx2.h 　
26661
 BNX2_EMAC_MDIO_COMM_PHY_ADDRBNX2_EMAC_MDIO_COMM_PHY_ADDR (0x1fL<<21) bnx2.h 　
26662
 BNX2_EMAC_MDIO_COMM_COMMANDBNX2_EMAC_MDIO_COMM_COMMAND (0x3L<<26) bnx2.h 　
26663
 BNX2_EMAC_MDIO_COMM_COMMAND_UNDBNX2_EMAC_MDIO_COMM_COMMAND_UND (0L<<26) bnx2.h 　
26664
 BNX2_EMAC_MDIO_COMM_COMMAND_WRIBNX2_EMAC_MDIO_COMM_COMMAND_WRI (1L<<26) bnx2.h 　
26665
 BNX2_EMAC_MDIO_COMM_COMMAND_REABNX2_EMAC_MDIO_COMM_COMMAND_REA (2L<<26) bnx2.h 　
26666
 BNX2_EMAC_MDIO_COMM_COMMAND_UNDBNX2_EMAC_MDIO_COMM_COMMAND_UND (3L<<26) bnx2.h 　
26667
 BNX2_EMAC_MDIO_COMM_FAILBNX2_EMAC_MDIO_COMM_FAIL (1L<<28) bnx2.h 　
26668
 BNX2_EMAC_MDIO_COMM_START_BUSYBNX2_EMAC_MDIO_COMM_START_BUSY (1L<<29) bnx2.h 　
26669
 BNX2_EMAC_MDIO_COMM_DISEXTBNX2_EMAC_MDIO_COMM_DISEXT (1L<<30) bnx2.h 　
26670
 BNX2_EMAC_MDIO_STATUSBNX2_EMAC_MDIO_STATUS 0x000014b0 bnx2.h 　
26671
 BNX2_EMAC_MDIO_STATUS_LINKBNX2_EMAC_MDIO_STATUS_LINK (1L<<0) bnx2.h 　
26672
 BNX2_EMAC_MDIO_STATUS_10MBBNX2_EMAC_MDIO_STATUS_10MB (1L<<1) bnx2.h 　
26673
 BNX2_EMAC_MDIO_MODEBNX2_EMAC_MDIO_MODE 0x000014b4 bnx2.h 　
26674
 BNX2_EMAC_MDIO_MODE_SHORT_PREAMBNX2_EMAC_MDIO_MODE_SHORT_PREAM (1L<<1) bnx2.h 　
26675
 BNX2_EMAC_MDIO_MODE_AUTO_POLLBNX2_EMAC_MDIO_MODE_AUTO_POLL (1L<<4) bnx2.h 　
26676
 BNX2_EMAC_MDIO_MODE_BIT_BANGBNX2_EMAC_MDIO_MODE_BIT_BANG (1L<<8) bnx2.h 　
26677
 BNX2_EMAC_MDIO_MODE_MDIOBNX2_EMAC_MDIO_MODE_MDIO (1L<<9) bnx2.h 　
26678
 BNX2_EMAC_MDIO_MODE_MDIO_OEBNX2_EMAC_MDIO_MODE_MDIO_OE (1L<<10) bnx2.h 　
26679
 BNX2_EMAC_MDIO_MODE_MDCBNX2_EMAC_MDIO_MODE_MDC (1L<<11) bnx2.h 　
26680
 BNX2_EMAC_MDIO_MODE_MDINTBNX2_EMAC_MDIO_MODE_MDINT (1L<<12) bnx2.h 　
26681
 BNX2_EMAC_MDIO_MODE_CLOCK_CNTBNX2_EMAC_MDIO_MODE_CLOCK_CNT (0x1fL<<16) bnx2.h 　
26682
 BNX2_EMAC_MDIO_AUTO_STATUSBNX2_EMAC_MDIO_AUTO_STATUS 0x000014b8 bnx2.h 　
26683
 BNX2_EMAC_MDIO_AUTO_STATUS_AUTOBNX2_EMAC_MDIO_AUTO_STATUS_AUTO (1L<<0) bnx2.h 　
26684
 BNX2_EMAC_TX_MODEBNX2_EMAC_TX_MODE 0x000014bc bnx2.h 　
26685
 BNX2_EMAC_TX_MODE_RESETBNX2_EMAC_TX_MODE_RESET (1L<<0) bnx2.h 　
26686
 BNX2_EMAC_TX_MODE_EXT_PAUSE_ENBNX2_EMAC_TX_MODE_EXT_PAUSE_EN (1L<<3) bnx2.h 　
26687
 BNX2_EMAC_TX_MODE_FLOW_ENBNX2_EMAC_TX_MODE_FLOW_EN (1L<<4) bnx2.h 　
26688
 BNX2_EMAC_TX_MODE_BIG_BACKOFFBNX2_EMAC_TX_MODE_BIG_BACKOFF (1L<<5) bnx2.h 　
26689
 BNX2_EMAC_TX_MODE_LONG_PAUSEBNX2_EMAC_TX_MODE_LONG_PAUSE (1L<<6) bnx2.h 　
26690
 BNX2_EMAC_TX_MODE_LINK_AWAREBNX2_EMAC_TX_MODE_LINK_AWARE (1L<<7) bnx2.h 　
26691
 BNX2_EMAC_TX_STATUSBNX2_EMAC_TX_STATUS 0x000014c0 bnx2.h 　
26692
 BNX2_EMAC_TX_STATUS_XOFFEDBNX2_EMAC_TX_STATUS_XOFFED (1L<<0) bnx2.h 　
26693
 BNX2_EMAC_TX_STATUS_XOFF_SENTBNX2_EMAC_TX_STATUS_XOFF_SENT (1L<<1) bnx2.h 　
26694
 BNX2_EMAC_TX_STATUS_XON_SENTBNX2_EMAC_TX_STATUS_XON_SENT (1L<<2) bnx2.h 　
26695
 BNX2_EMAC_TX_STATUS_LINK_UPBNX2_EMAC_TX_STATUS_LINK_UP (1L<<3) bnx2.h 　
26696
 BNX2_EMAC_TX_STATUS_UNDERRUNBNX2_EMAC_TX_STATUS_UNDERRUN (1L<<4) bnx2.h 　
26697
 BNX2_EMAC_TX_LENGTHSBNX2_EMAC_TX_LENGTHS 0x000014c4 bnx2.h 　
26698
 BNX2_EMAC_TX_LENGTHS_SLOTBNX2_EMAC_TX_LENGTHS_SLOT (0xffL<<0) bnx2.h 　
26699
 BNX2_EMAC_TX_LENGTHS_IPGBNX2_EMAC_TX_LENGTHS_IPG (0xfL<<8) bnx2.h 　
26700
 BNX2_EMAC_TX_LENGTHS_IPG_CRSBNX2_EMAC_TX_LENGTHS_IPG_CRS (0x3L<<12) bnx2.h 　
26701
 BNX2_EMAC_RX_MODEBNX2_EMAC_RX_MODE 0x000014c8 bnx2.h 　
26702
 BNX2_EMAC_RX_MODE_RESETBNX2_EMAC_RX_MODE_RESET (1L<<0) bnx2.h 　
26703
 BNX2_EMAC_RX_MODE_FLOW_ENBNX2_EMAC_RX_MODE_FLOW_EN (1L<<2) bnx2.h 　
26704
 BNX2_EMAC_RX_MODE_KEEP_MAC_CONTBNX2_EMAC_RX_MODE_KEEP_MAC_CONT (1L<<3) bnx2.h 　
26705
 BNX2_EMAC_RX_MODE_KEEP_PAUSEBNX2_EMAC_RX_MODE_KEEP_PAUSE (1L<<4) bnx2.h 　
26706
 BNX2_EMAC_RX_MODE_ACCEPT_OVERSIBNX2_EMAC_RX_MODE_ACCEPT_OVERSI (1L<<5) bnx2.h 　
26707
 BNX2_EMAC_RX_MODE_ACCEPT_RUNTSBNX2_EMAC_RX_MODE_ACCEPT_RUNTS (1L<<6) bnx2.h 　
26708
 BNX2_EMAC_RX_MODE_LLC_CHKBNX2_EMAC_RX_MODE_LLC_CHK (1L<<7) bnx2.h 　
26709
 BNX2_EMAC_RX_MODE_PROMISCUOUSBNX2_EMAC_RX_MODE_PROMISCUOUS (1L<<8) bnx2.h 　
26710
 BNX2_EMAC_RX_MODE_NO_CRC_CHKBNX2_EMAC_RX_MODE_NO_CRC_CHK (1L<<9) bnx2.h 　
26711
 BNX2_EMAC_RX_MODE_KEEP_VLAN_TAGBNX2_EMAC_RX_MODE_KEEP_VLAN_TAG (1L<<10) bnx2.h 　
26712
 BNX2_EMAC_RX_MODE_FILT_BROADCASBNX2_EMAC_RX_MODE_FILT_BROADCAS (1L<<11) bnx2.h 　
26713
 BNX2_EMAC_RX_MODE_SORT_MODEBNX2_EMAC_RX_MODE_SORT_MODE (1L<<12) bnx2.h 　
26714
 BNX2_EMAC_RX_STATUSBNX2_EMAC_RX_STATUS 0x000014cc bnx2.h 　
26715
 BNX2_EMAC_RX_STATUS_FFEDBNX2_EMAC_RX_STATUS_FFED (1L<<0) bnx2.h 　
26716
 BNX2_EMAC_RX_STATUS_FF_RECEIVEDBNX2_EMAC_RX_STATUS_FF_RECEIVED (1L<<1) bnx2.h 　
26717
 BNX2_EMAC_RX_STATUS_N_RECEIVEDBNX2_EMAC_RX_STATUS_N_RECEIVED (1L<<2) bnx2.h 　
26718
 BNX2_EMAC_MULTICAST_HASH0BNX2_EMAC_MULTICAST_HASH0 0x000014d0 bnx2.h 　
26719
 BNX2_EMAC_MULTICAST_HASH1BNX2_EMAC_MULTICAST_HASH1 0x000014d4 bnx2.h 　
26720
 BNX2_EMAC_MULTICAST_HASH2BNX2_EMAC_MULTICAST_HASH2 0x000014d8 bnx2.h 　
26721
 BNX2_EMAC_MULTICAST_HASH3BNX2_EMAC_MULTICAST_HASH3 0x000014dc bnx2.h 　
26722
 BNX2_EMAC_MULTICAST_HASH4BNX2_EMAC_MULTICAST_HASH4 0x000014e0 bnx2.h 　
26723
 BNX2_EMAC_MULTICAST_HASH5BNX2_EMAC_MULTICAST_HASH5 0x000014e4 bnx2.h 　
26724
 BNX2_EMAC_MULTICAST_HASH6BNX2_EMAC_MULTICAST_HASH6 0x000014e8 bnx2.h 　
26725
 BNX2_EMAC_MULTICAST_HASH7BNX2_EMAC_MULTICAST_HASH7 0x000014ec bnx2.h 　
26726
 BNX2_EMAC_RX_STAT_IFHCINOCTETSBNX2_EMAC_RX_STAT_IFHCINOCTETS 0x00001500 bnx2.h 　
26727
 BNX2_EMAC_RX_STAT_IFHCINBADOCTEBNX2_EMAC_RX_STAT_IFHCINBADOCTE 0x00001504 bnx2.h 　
26728
 BNX2_EMAC_RX_STAT_ETHERSTATSFRABNX2_EMAC_RX_STAT_ETHERSTATSFRA 0x00001508 bnx2.h 　
26729
 BNX2_EMAC_RX_STAT_IFHCINUCASTPKBNX2_EMAC_RX_STAT_IFHCINUCASTPK 0x0000150c bnx2.h 　
26730
 BNX2_EMAC_RX_STAT_IFHCINMULTICABNX2_EMAC_RX_STAT_IFHCINMULTICA 0x00001510 bnx2.h 　
26731
 BNX2_EMAC_RX_STAT_IFHCINBROADCABNX2_EMAC_RX_STAT_IFHCINBROADCA 0x00001514 bnx2.h 　
26732
 BNX2_EMAC_RX_STAT_DOT3STATSFCSEBNX2_EMAC_RX_STAT_DOT3STATSFCSE 0x00001518 bnx2.h 　
26733
 BNX2_EMAC_RX_STAT_DOT3STATSALIGBNX2_EMAC_RX_STAT_DOT3STATSALIG 0x0000151c bnx2.h 　
26734
 BNX2_EMAC_RX_STAT_DOT3STATSCARRBNX2_EMAC_RX_STAT_DOT3STATSCARR 0x00001520 bnx2.h 　
26735
 BNX2_EMAC_RX_STAT_XONPAUSEFRAMEBNX2_EMAC_RX_STAT_XONPAUSEFRAME 0x00001524 bnx2.h 　
26736
 BNX2_EMAC_RX_STAT_XOFFPAUSEFRAMBNX2_EMAC_RX_STAT_XOFFPAUSEFRAM 0x00001528 bnx2.h 　
26737
 BNX2_EMAC_RX_STAT_MACCONTROLFRABNX2_EMAC_RX_STAT_MACCONTROLFRA 0x0000152c bnx2.h 　
26738
 BNX2_EMAC_RX_STAT_XOFFSTATEENTEBNX2_EMAC_RX_STAT_XOFFSTATEENTE 0x00001530 bnx2.h 　
26739
 BNX2_EMAC_RX_STAT_DOT3STATSFRAMBNX2_EMAC_RX_STAT_DOT3STATSFRAM 0x00001534 bnx2.h 　
26740
 BNX2_EMAC_RX_STAT_ETHERSTATSJABBNX2_EMAC_RX_STAT_ETHERSTATSJAB 0x00001538 bnx2.h 　
26741
 BNX2_EMAC_RX_STAT_ETHERSTATSUNDBNX2_EMAC_RX_STAT_ETHERSTATSUND 0x0000153c bnx2.h 　
26742
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001540 bnx2.h 　
26743
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001544 bnx2.h 　
26744
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001548 bnx2.h 　
26745
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x0000154c bnx2.h 　
26746
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001550 bnx2.h 　
26747
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001554 bnx2.h 　
26748
 BNX2_EMAC_RX_STAT_ETHERSTATSPKTBNX2_EMAC_RX_STAT_ETHERSTATSPKT 0x00001558 bnx2.h 　
26749
 BNX2_EMAC_RXMAC_DEBUG0BNX2_EMAC_RXMAC_DEBUG0 0x0000155c bnx2.h 　
26750
 BNX2_EMAC_RXMAC_DEBUG1BNX2_EMAC_RXMAC_DEBUG1 0x00001560 bnx2.h 　
26751
 BNX2_EMAC_RXMAC_DEBUG1_LENGTH_NBNX2_EMAC_RXMAC_DEBUG1_LENGTH_N (1L<<0) bnx2.h 　
26752
 BNX2_EMAC_RXMAC_DEBUG1_LENGTH_OBNX2_EMAC_RXMAC_DEBUG1_LENGTH_O (1L<<1) bnx2.h 　
26753
 BNX2_EMAC_RXMAC_DEBUG1_BAD_CRCBNX2_EMAC_RXMAC_DEBUG1_BAD_CRC (1L<<2) bnx2.h 　
26754
 BNX2_EMAC_RXMAC_DEBUG1_RX_ERRORBNX2_EMAC_RXMAC_DEBUG1_RX_ERROR (1L<<3) bnx2.h 　
26755
 BNX2_EMAC_RXMAC_DEBUG1_ALIGN_ERBNX2_EMAC_RXMAC_DEBUG1_ALIGN_ER (1L<<4) bnx2.h 　
26756
 BNX2_EMAC_RXMAC_DEBUG1_LAST_DATBNX2_EMAC_RXMAC_DEBUG1_LAST_DAT (1L<<5) bnx2.h 　
26757
 BNX2_EMAC_RXMAC_DEBUG1_ODD_BYTEBNX2_EMAC_RXMAC_DEBUG1_ODD_BYTE (1L<<6) bnx2.h 　
26758
 BNX2_EMAC_RXMAC_DEBUG1_BYTE_COUBNX2_EMAC_RXMAC_DEBUG1_BYTE_COU (0xffffL<<7) bnx2.h 　
26759
 BNX2_EMAC_RXMAC_DEBUG1_SLOT_TIMBNX2_EMAC_RXMAC_DEBUG1_SLOT_TIM (0xffL<<23) bnx2.h 　
26760
 BNX2_EMAC_RXMAC_DEBUG2BNX2_EMAC_RXMAC_DEBUG2 0x00001564 bnx2.h 　
26761
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x7L<<0) bnx2.h 　
26762
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x0L<<0) bnx2.h 　
26763
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x1L<<0) bnx2.h 　
26764
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x2L<<0) bnx2.h 　
26765
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x3L<<0) bnx2.h 　
26766
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x4L<<0) bnx2.h 　
26767
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x5L<<0) bnx2.h 　
26768
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x6L<<0) bnx2.h 　
26769
 BNX2_EMAC_RXMAC_DEBUG2_SM_STATEBNX2_EMAC_RXMAC_DEBUG2_SM_STATE (0x7L<<0) bnx2.h 　
26770
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0xfL<<3) bnx2.h 　
26771
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x0L<<3) bnx2.h 　
26772
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x1L<<3) bnx2.h 　
26773
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x2L<<3) bnx2.h 　
26774
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x3L<<3) bnx2.h 　
26775
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x4L<<3) bnx2.h 　
26776
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x5L<<3) bnx2.h 　
26777
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x6L<<3) bnx2.h 　
26778
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x7L<<3) bnx2.h 　
26779
 BNX2_EMAC_RXMAC_DEBUG2_IDI_STATBNX2_EMAC_RXMAC_DEBUG2_IDI_STAT (0x8L<<3) bnx2.h 　
26780
 BNX2_EMAC_RXMAC_DEBUG2_BYTE_INBNX2_EMAC_RXMAC_DEBUG2_BYTE_IN (0xffL<<7) bnx2.h 　
26781
 BNX2_EMAC_RXMAC_DEBUG2_FALSECBNX2_EMAC_RXMAC_DEBUG2_FALSEC (1L<<15) bnx2.h 　
26782
 BNX2_EMAC_RXMAC_DEBUG2_TAGGEDBNX2_EMAC_RXMAC_DEBUG2_TAGGED (1L<<16) bnx2.h 　
26783
 BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STBNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST (1L<<18) bnx2.h 　
26784
 BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STBNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST (0L<<18) bnx2.h 　
26785
 BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STBNX2_EMAC_RXMAC_DEBUG2_PAUSE_ST (1L<<18) bnx2.h 　
26786
 BNX2_EMAC_RXMAC_DEBUG2_SE_COUNTBNX2_EMAC_RXMAC_DEBUG2_SE_COUNT (0xfL<<19) bnx2.h 　
26787
 BNX2_EMAC_RXMAC_DEBUG2_QUANTABNX2_EMAC_RXMAC_DEBUG2_QUANTA (0x1fL<<23) bnx2.h 　
26788
 BNX2_EMAC_RXMAC_DEBUG3BNX2_EMAC_RXMAC_DEBUG3 0x00001568 bnx2.h 　
26789
 BNX2_EMAC_RXMAC_DEBUG3_PAUSE_CTBNX2_EMAC_RXMAC_DEBUG3_PAUSE_CT (0xffffL<<0) bnx2.h 　
26790
 BNX2_EMAC_RXMAC_DEBUG3_TMP_PAUSBNX2_EMAC_RXMAC_DEBUG3_TMP_PAUS (0xffffL<<16) bnx2.h 　
26791
 BNX2_EMAC_RXMAC_DEBUG4BNX2_EMAC_RXMAC_DEBUG4 0x0000156c bnx2.h 　
26792
 BNX2_EMAC_RXMAC_DEBUG4_TYPE_FIEBNX2_EMAC_RXMAC_DEBUG4_TYPE_FIE (0xffffL<<0) bnx2.h 　
26793
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x3fL<<16) bnx2.h 　
26794
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x0L<<16) bnx2.h 　
26795
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1L<<16) bnx2.h 　
26796
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x2L<<16) bnx2.h 　
26797
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x3L<<16) bnx2.h 　
26798
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x7L<<16) bnx2.h 　
26799
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x5L<<16) bnx2.h 　
26800
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x6L<<16) bnx2.h 　
26801
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x7L<<16) bnx2.h 　
26802
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x8L<<16) bnx2.h 　
26803
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x9L<<16) bnx2.h 　
26804
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0xaL<<16) bnx2.h 　
26805
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0xeL<<16) bnx2.h 　
26806
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0xfL<<16) bnx2.h 　
26807
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x10L<<16) bnx2.h 　
26808
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x11L<<16) bnx2.h 　
26809
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x12L<<16) bnx2.h 　
26810
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x13L<<16) bnx2.h 　
26811
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x14L<<16) bnx2.h 　
26812
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x15L<<16) bnx2.h 　
26813
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x16L<<16) bnx2.h 　
26814
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x17L<<16) bnx2.h 　
26815
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x18L<<16) bnx2.h 　
26816
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x19L<<16) bnx2.h 　
26817
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1aL<<16) bnx2.h 　
26818
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1bL<<16) bnx2.h 　
26819
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1cL<<16) bnx2.h 　
26820
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1dL<<16) bnx2.h 　
26821
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1eL<<16) bnx2.h 　
26822
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x1fL<<16) bnx2.h 　
26823
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x20L<<16) bnx2.h 　
26824
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x21L<<16) bnx2.h 　
26825
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x22L<<16) bnx2.h 　
26826
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x23L<<16) bnx2.h 　
26827
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x24L<<16) bnx2.h 　
26828
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x25L<<16) bnx2.h 　
26829
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x26L<<16) bnx2.h 　
26830
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x27L<<16) bnx2.h 　
26831
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x28L<<16) bnx2.h 　
26832
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x29L<<16) bnx2.h 　
26833
 BNX2_EMAC_RXMAC_DEBUG4_FILT_STABNX2_EMAC_RXMAC_DEBUG4_FILT_STA (0x2aL<<16) bnx2.h 　
26834
 BNX2_EMAC_RXMAC_DEBUG4_DROP_PKTBNX2_EMAC_RXMAC_DEBUG4_DROP_PKT (1L<<22) bnx2.h 　
26835
 BNX2_EMAC_RXMAC_DEBUG4_SLOT_FILBNX2_EMAC_RXMAC_DEBUG4_SLOT_FIL (1L<<23) bnx2.h 　
26836
 BNX2_EMAC_RXMAC_DEBUG4_FALSE_CABNX2_EMAC_RXMAC_DEBUG4_FALSE_CA (1L<<24) bnx2.h 　
26837
 BNX2_EMAC_RXMAC_DEBUG4_LAST_DATBNX2_EMAC_RXMAC_DEBUG4_LAST_DAT (1L<<25) bnx2.h 　
26838
 BNX2_EMAC_RXMAC_DEBUG4_sfd_FOUNBNX2_EMAC_RXMAC_DEBUG4_sfd_FOUN (1L<<26) bnx2.h 　
26839
 BNX2_EMAC_RXMAC_DEBUG4_ADVANCEBNX2_EMAC_RXMAC_DEBUG4_ADVANCE (1L<<27) bnx2.h 　
26840
 BNX2_EMAC_RXMAC_DEBUG4_STARTBNX2_EMAC_RXMAC_DEBUG4_START (1L<<28) bnx2.h 　
26841
 BNX2_EMAC_RXMAC_DEBUG5BNX2_EMAC_RXMAC_DEBUG5 0x00001570 bnx2.h 　
26842
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (0x7L<<0) bnx2.h 　
26843
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (0L<<0) bnx2.h 　
26844
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (1L<<0) bnx2.h 　
26845
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (2L<<0) bnx2.h 　
26846
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (3L<<0) bnx2.h 　
26847
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (4L<<0) bnx2.h 　
26848
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (5L<<0) bnx2.h 　
26849
 BNX2_EMAC_RXMAC_DEBUG5_PS_IDISMBNX2_EMAC_RXMAC_DEBUG5_PS_IDISM (6L<<0) bnx2.h 　
26850
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x7L<<4) bnx2.h 　
26851
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x0L<<4) bnx2.h 　
26852
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x1L<<4) bnx2.h 　
26853
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x2L<<4) bnx2.h 　
26854
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x3L<<4) bnx2.h 　
26855
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x4L<<4) bnx2.h 　
26856
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x6L<<4) bnx2.h 　
26857
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x7L<<4) bnx2.h 　
26858
 BNX2_EMAC_RXMAC_DEBUG5_EOF_DETEBNX2_EMAC_RXMAC_DEBUG5_EOF_DETE (1L<<7) bnx2.h 　
26859
 BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUBNX2_EMAC_RXMAC_DEBUG5_CCODE_BU (0x7L<<8) bnx2.h 　
26860
 BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_ (1L<<11) bnx2.h 　
26861
 BNX2_EMAC_RXMAC_DEBUG5_LOAD_CCOBNX2_EMAC_RXMAC_DEBUG5_LOAD_CCO (1L<<12) bnx2.h 　
26862
 BNX2_EMAC_RXMAC_DEBUG5_LOAD_DATBNX2_EMAC_RXMAC_DEBUG5_LOAD_DAT (1L<<13) bnx2.h 　
26863
 BNX2_EMAC_RXMAC_DEBUG5_LOAD_STABNX2_EMAC_RXMAC_DEBUG5_LOAD_STA (1L<<14) bnx2.h 　
26864
 BNX2_EMAC_RXMAC_DEBUG5_CLR_STATBNX2_EMAC_RXMAC_DEBUG5_CLR_STAT (1L<<15) bnx2.h 　
26865
 BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_ (0x3L<<16) bnx2.h 　
26866
 BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_ (1L<<19) bnx2.h 　
26867
 BNX2_EMAC_RXMAC_DEBUG5_FMLENBNX2_EMAC_RXMAC_DEBUG5_FMLEN (0xfffL<<20) bnx2.h 　
26868
 BNX2_EMAC_RX_STAT_AC0BNX2_EMAC_RX_STAT_AC0 0x00001580 bnx2.h 　
26869
 BNX2_EMAC_RX_STAT_AC1BNX2_EMAC_RX_STAT_AC1 0x00001584 bnx2.h 　
26870
 BNX2_EMAC_RX_STAT_AC2BNX2_EMAC_RX_STAT_AC2 0x00001588 bnx2.h 　
26871
 BNX2_EMAC_RX_STAT_AC3BNX2_EMAC_RX_STAT_AC3 0x0000158c bnx2.h 　
26872
 BNX2_EMAC_RX_STAT_AC4BNX2_EMAC_RX_STAT_AC4 0x00001590 bnx2.h 　
26873
 BNX2_EMAC_RX_STAT_AC5BNX2_EMAC_RX_STAT_AC5 0x00001594 bnx2.h 　
26874
 BNX2_EMAC_RX_STAT_AC6BNX2_EMAC_RX_STAT_AC6 0x00001598 bnx2.h 　
26875
 BNX2_EMAC_RX_STAT_AC7BNX2_EMAC_RX_STAT_AC7 0x0000159c bnx2.h 　
26876
 BNX2_EMAC_RX_STAT_AC8BNX2_EMAC_RX_STAT_AC8 0x000015a0 bnx2.h 　
26877
 BNX2_EMAC_RX_STAT_AC9BNX2_EMAC_RX_STAT_AC9 0x000015a4 bnx2.h 　
26878
 BNX2_EMAC_RX_STAT_AC10BNX2_EMAC_RX_STAT_AC10 0x000015a8 bnx2.h 　
26879
 BNX2_EMAC_RX_STAT_AC11BNX2_EMAC_RX_STAT_AC11 0x000015ac bnx2.h 　
26880
 BNX2_EMAC_RX_STAT_AC12BNX2_EMAC_RX_STAT_AC12 0x000015b0 bnx2.h 　
26881
 BNX2_EMAC_RX_STAT_AC13BNX2_EMAC_RX_STAT_AC13 0x000015b4 bnx2.h 　
26882
 BNX2_EMAC_RX_STAT_AC14BNX2_EMAC_RX_STAT_AC14 0x000015b8 bnx2.h 　
26883
 BNX2_EMAC_RX_STAT_AC15BNX2_EMAC_RX_STAT_AC15 0x000015bc bnx2.h 　
26884
 BNX2_EMAC_RX_STAT_AC16BNX2_EMAC_RX_STAT_AC16 0x000015c0 bnx2.h 　
26885
 BNX2_EMAC_RX_STAT_AC17BNX2_EMAC_RX_STAT_AC17 0x000015c4 bnx2.h 　
26886
 BNX2_EMAC_RX_STAT_AC18BNX2_EMAC_RX_STAT_AC18 0x000015c8 bnx2.h 　
26887
 BNX2_EMAC_RX_STAT_AC19BNX2_EMAC_RX_STAT_AC19 0x000015cc bnx2.h 　
26888
 BNX2_EMAC_RX_STAT_AC20BNX2_EMAC_RX_STAT_AC20 0x000015d0 bnx2.h 　
26889
 BNX2_EMAC_RX_STAT_AC21BNX2_EMAC_RX_STAT_AC21 0x000015d4 bnx2.h 　
26890
 BNX2_EMAC_RX_STAT_AC22BNX2_EMAC_RX_STAT_AC22 0x000015d8 bnx2.h 　
26891
 BNX2_EMAC_RXMAC_SUC_DBG_OVERRUNBNX2_EMAC_RXMAC_SUC_DBG_OVERRUN 0x000015dc bnx2.h 　
26892
 BNX2_EMAC_TX_STAT_IFHCOUTOCTETSBNX2_EMAC_TX_STAT_IFHCOUTOCTETS 0x00001600 bnx2.h 　
26893
 BNX2_EMAC_TX_STAT_IFHCOUTBADOCTBNX2_EMAC_TX_STAT_IFHCOUTBADOCT 0x00001604 bnx2.h 　
26894
 BNX2_EMAC_TX_STAT_ETHERSTATSCOLBNX2_EMAC_TX_STAT_ETHERSTATSCOL 0x00001608 bnx2.h 　
26895
 BNX2_EMAC_TX_STAT_OUTXONSENTBNX2_EMAC_TX_STAT_OUTXONSENT 0x0000160c bnx2.h 　
26896
 BNX2_EMAC_TX_STAT_OUTXOFFSENTBNX2_EMAC_TX_STAT_OUTXOFFSENT 0x00001610 bnx2.h 　
26897
 BNX2_EMAC_TX_STAT_FLOWCONTROLDOBNX2_EMAC_TX_STAT_FLOWCONTROLDO 0x00001614 bnx2.h 　
26898
 BNX2_EMAC_TX_STAT_DOT3STATSSINGBNX2_EMAC_TX_STAT_DOT3STATSSING 0x00001618 bnx2.h 　
26899
 BNX2_EMAC_TX_STAT_DOT3STATSMULTBNX2_EMAC_TX_STAT_DOT3STATSMULT 0x0000161c bnx2.h 　
26900
 BNX2_EMAC_TX_STAT_DOT3STATSDEFEBNX2_EMAC_TX_STAT_DOT3STATSDEFE 0x00001620 bnx2.h 　
26901
 BNX2_EMAC_TX_STAT_DOT3STATSEXCEBNX2_EMAC_TX_STAT_DOT3STATSEXCE 0x00001624 bnx2.h 　
26902
 BNX2_EMAC_TX_STAT_DOT3STATSLATEBNX2_EMAC_TX_STAT_DOT3STATSLATE 0x00001628 bnx2.h 　
26903
 BNX2_EMAC_TX_STAT_IFHCOUTUCASTPBNX2_EMAC_TX_STAT_IFHCOUTUCASTP 0x0000162c bnx2.h 　
26904
 BNX2_EMAC_TX_STAT_IFHCOUTMULTICBNX2_EMAC_TX_STAT_IFHCOUTMULTIC 0x00001630 bnx2.h 　
26905
 BNX2_EMAC_TX_STAT_IFHCOUTBROADCBNX2_EMAC_TX_STAT_IFHCOUTBROADC 0x00001634 bnx2.h 　
26906
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x00001638 bnx2.h 　
26907
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x0000163c bnx2.h 　
26908
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x00001640 bnx2.h 　
26909
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x00001644 bnx2.h 　
26910
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x00001648 bnx2.h 　
26911
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x0000164c bnx2.h 　
26912
 BNX2_EMAC_TX_STAT_ETHERSTATSPKTBNX2_EMAC_TX_STAT_ETHERSTATSPKT 0x00001650 bnx2.h 　
26913
 BNX2_EMAC_TX_STAT_DOT3STATSINTEBNX2_EMAC_TX_STAT_DOT3STATSINTE 0x00001654 bnx2.h 　
26914
 BNX2_EMAC_TXMAC_DEBUG0BNX2_EMAC_TXMAC_DEBUG0 0x00001658 bnx2.h 　
26915
 BNX2_EMAC_TXMAC_DEBUG1BNX2_EMAC_TXMAC_DEBUG1 0x0000165c bnx2.h 　
26916
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0xfL<<0) bnx2.h 　
26917
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x0L<<0) bnx2.h 　
26918
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x1L<<0) bnx2.h 　
26919
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x4L<<0) bnx2.h 　
26920
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x5L<<0) bnx2.h 　
26921
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x6L<<0) bnx2.h 　
26922
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x7L<<0) bnx2.h 　
26923
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x8L<<0) bnx2.h 　
26924
 BNX2_EMAC_TXMAC_DEBUG1_ODI_STATBNX2_EMAC_TXMAC_DEBUG1_ODI_STAT (0x9L<<0) bnx2.h 　
26925
 BNX2_EMAC_TXMAC_DEBUG1_CRS_ENABBNX2_EMAC_TXMAC_DEBUG1_CRS_ENAB (1L<<4) bnx2.h 　
26926
 BNX2_EMAC_TXMAC_DEBUG1_BAD_CRCBNX2_EMAC_TXMAC_DEBUG1_BAD_CRC (1L<<5) bnx2.h 　
26927
 BNX2_EMAC_TXMAC_DEBUG1_SE_COUNTBNX2_EMAC_TXMAC_DEBUG1_SE_COUNT (0xfL<<6) bnx2.h 　
26928
 BNX2_EMAC_TXMAC_DEBUG1_SEND_PAUBNX2_EMAC_TXMAC_DEBUG1_SEND_PAU (1L<<10) bnx2.h 　
26929
 BNX2_EMAC_TXMAC_DEBUG1_LATE_COLBNX2_EMAC_TXMAC_DEBUG1_LATE_COL (1L<<11) bnx2.h 　
26930
 BNX2_EMAC_TXMAC_DEBUG1_MAX_DEFEBNX2_EMAC_TXMAC_DEBUG1_MAX_DEFE (1L<<12) bnx2.h 　
26931
 BNX2_EMAC_TXMAC_DEBUG1_DEFERREDBNX2_EMAC_TXMAC_DEBUG1_DEFERRED (1L<<13) bnx2.h 　
26932
 BNX2_EMAC_TXMAC_DEBUG1_ONE_BYTEBNX2_EMAC_TXMAC_DEBUG1_ONE_BYTE (1L<<14) bnx2.h 　
26933
 BNX2_EMAC_TXMAC_DEBUG1_IPG_TIMEBNX2_EMAC_TXMAC_DEBUG1_IPG_TIME (0xfL<<15) bnx2.h 　
26934
 BNX2_EMAC_TXMAC_DEBUG1_SLOT_TIMBNX2_EMAC_TXMAC_DEBUG1_SLOT_TIM (0xffL<<19) bnx2.h 　
26935
 BNX2_EMAC_TXMAC_DEBUG2BNX2_EMAC_TXMAC_DEBUG2 0x00001660 bnx2.h 　
26936
 BNX2_EMAC_TXMAC_DEBUG2_BACK_OFFBNX2_EMAC_TXMAC_DEBUG2_BACK_OFF (0x3ffL<<0) bnx2.h 　
26937
 BNX2_EMAC_TXMAC_DEBUG2_BYTE_COUBNX2_EMAC_TXMAC_DEBUG2_BYTE_COU (0xffffL<<10) bnx2.h 　
26938
 BNX2_EMAC_TXMAC_DEBUG2_COL_COUNBNX2_EMAC_TXMAC_DEBUG2_COL_COUN (0x1fL<<26) bnx2.h 　
26939
 BNX2_EMAC_TXMAC_DEBUG2_COL_BITBNX2_EMAC_TXMAC_DEBUG2_COL_BIT (1L<<31) bnx2.h 　
26940
 BNX2_EMAC_TXMAC_DEBUG3BNX2_EMAC_TXMAC_DEBUG3 0x00001664 bnx2.h 　
26941
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xfL<<0) bnx2.h 　
26942
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x0L<<0) bnx2.h 　
26943
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x1L<<0) bnx2.h 　
26944
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x2L<<0) bnx2.h 　
26945
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x3L<<0) bnx2.h 　
26946
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x4L<<0) bnx2.h 　
26947
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x5L<<0) bnx2.h 　
26948
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x6L<<0) bnx2.h 　
26949
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x7L<<0) bnx2.h 　
26950
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x8L<<0) bnx2.h 　
26951
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0x9L<<0) bnx2.h 　
26952
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xaL<<0) bnx2.h 　
26953
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xbL<<0) bnx2.h 　
26954
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xcL<<0) bnx2.h 　
26955
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xdL<<0) bnx2.h 　
26956
 BNX2_EMAC_TXMAC_DEBUG3_SM_STATEBNX2_EMAC_TXMAC_DEBUG3_SM_STATE (0xeL<<0) bnx2.h 　
26957
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x7L<<4) bnx2.h 　
26958
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x0L<<4) bnx2.h 　
26959
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x1L<<4) bnx2.h 　
26960
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x2L<<4) bnx2.h 　
26961
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x3L<<4) bnx2.h 　
26962
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x4L<<4) bnx2.h 　
26963
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x5L<<4) bnx2.h 　
26964
 BNX2_EMAC_TXMAC_DEBUG3_FILT_STABNX2_EMAC_TXMAC_DEBUG3_FILT_STA (0x6L<<4) bnx2.h 　
26965
 BNX2_EMAC_TXMAC_DEBUG3_CRS_DONEBNX2_EMAC_TXMAC_DEBUG3_CRS_DONE (1L<<7) bnx2.h 　
26966
 BNX2_EMAC_TXMAC_DEBUG3_XOFFBNX2_EMAC_TXMAC_DEBUG3_XOFF (1L<<8) bnx2.h 　
26967
 BNX2_EMAC_TXMAC_DEBUG3_SE_COUNTBNX2_EMAC_TXMAC_DEBUG3_SE_COUNT (0xfL<<9) bnx2.h 　
26968
 BNX2_EMAC_TXMAC_DEBUG3_QUANTA_CBNX2_EMAC_TXMAC_DEBUG3_QUANTA_C (0x1fL<<13) bnx2.h 　
26969
 BNX2_EMAC_TXMAC_DEBUG4BNX2_EMAC_TXMAC_DEBUG4 0x00001668 bnx2.h 　
26970
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_COBNX2_EMAC_TXMAC_DEBUG4_PAUSE_CO (0xffffL<<0) bnx2.h 　
26971
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0xfL<<16) bnx2.h 　
26972
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x0L<<16) bnx2.h 　
26973
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x2L<<16) bnx2.h 　
26974
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x3L<<16) bnx2.h 　
26975
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x6L<<16) bnx2.h 　
26976
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x7L<<16) bnx2.h 　
26977
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x5L<<16) bnx2.h 　
26978
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x4L<<16) bnx2.h 　
26979
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0xcL<<16) bnx2.h 　
26980
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0xeL<<16) bnx2.h 　
26981
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0xaL<<16) bnx2.h 　
26982
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x8L<<16) bnx2.h 　
26983
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0x9L<<16) bnx2.h 　
26984
 BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STBNX2_EMAC_TXMAC_DEBUG4_PAUSE_ST (0xdL<<16) bnx2.h 　
26985
 BNX2_EMAC_TXMAC_DEBUG4_STATS0_VBNX2_EMAC_TXMAC_DEBUG4_STATS0_V (1L<<20) bnx2.h 　
26986
 BNX2_EMAC_TXMAC_DEBUG4_APPEND_CBNX2_EMAC_TXMAC_DEBUG4_APPEND_C (1L<<21) bnx2.h 　
26987
 BNX2_EMAC_TXMAC_DEBUG4_SLOT_FILBNX2_EMAC_TXMAC_DEBUG4_SLOT_FIL (1L<<22) bnx2.h 　
26988
 BNX2_EMAC_TXMAC_DEBUG4_MAX_DEFEBNX2_EMAC_TXMAC_DEBUG4_MAX_DEFE (1L<<23) bnx2.h 　
26989
 BNX2_EMAC_TXMAC_DEBUG4_SEND_EXTBNX2_EMAC_TXMAC_DEBUG4_SEND_EXT (1L<<24) bnx2.h 　
26990
 BNX2_EMAC_TXMAC_DEBUG4_SEND_PADBNX2_EMAC_TXMAC_DEBUG4_SEND_PAD (1L<<25) bnx2.h 　
26991
 BNX2_EMAC_TXMAC_DEBUG4_EOF_LOCBNX2_EMAC_TXMAC_DEBUG4_EOF_LOC (1L<<26) bnx2.h 　
26992
 BNX2_EMAC_TXMAC_DEBUG4_COLLIDINBNX2_EMAC_TXMAC_DEBUG4_COLLIDIN (1L<<27) bnx2.h 　
26993
 BNX2_EMAC_TXMAC_DEBUG4_COL_INBNX2_EMAC_TXMAC_DEBUG4_COL_IN (1L<<28) bnx2.h 　
26994
 BNX2_EMAC_TXMAC_DEBUG4_BURSTINGBNX2_EMAC_TXMAC_DEBUG4_BURSTING (1L<<29) bnx2.h 　
26995
 BNX2_EMAC_TXMAC_DEBUG4_ADVANCEBNX2_EMAC_TXMAC_DEBUG4_ADVANCE (1L<<30) bnx2.h 　
26996
 BNX2_EMAC_TXMAC_DEBUG4_GOBNX2_EMAC_TXMAC_DEBUG4_GO (1L<<31) bnx2.h 　
26997
 BNX2_EMAC_TX_STAT_AC0BNX2_EMAC_TX_STAT_AC0 0x00001680 bnx2.h 　
26998
 BNX2_EMAC_TX_STAT_AC1BNX2_EMAC_TX_STAT_AC1 0x00001684 bnx2.h 　
26999
 BNX2_EMAC_TX_STAT_AC2BNX2_EMAC_TX_STAT_AC2 0x00001688 bnx2.h 　
27000
 BNX2_EMAC_TX_STAT_AC3BNX2_EMAC_TX_STAT_AC3 0x0000168c bnx2.h 　
27001
 BNX2_EMAC_TX_STAT_AC4BNX2_EMAC_TX_STAT_AC4 0x00001690 bnx2.h 　
27002
 BNX2_EMAC_TX_STAT_AC5BNX2_EMAC_TX_STAT_AC5 0x00001694 bnx2.h 　
27003
 BNX2_EMAC_TX_STAT_AC6BNX2_EMAC_TX_STAT_AC6 0x00001698 bnx2.h 　
27004
 BNX2_EMAC_TX_STAT_AC7BNX2_EMAC_TX_STAT_AC7 0x0000169c bnx2.h 　
27005
 BNX2_EMAC_TX_STAT_AC8BNX2_EMAC_TX_STAT_AC8 0x000016a0 bnx2.h 　
27006
 BNX2_EMAC_TX_STAT_AC9BNX2_EMAC_TX_STAT_AC9 0x000016a4 bnx2.h 　
27007
 BNX2_EMAC_TX_STAT_AC10BNX2_EMAC_TX_STAT_AC10 0x000016a8 bnx2.h 　
27008
 BNX2_EMAC_TX_STAT_AC11BNX2_EMAC_TX_STAT_AC11 0x000016ac bnx2.h 　
27009
 BNX2_EMAC_TX_STAT_AC12BNX2_EMAC_TX_STAT_AC12 0x000016b0 bnx2.h 　
27010
 BNX2_EMAC_TX_STAT_AC13BNX2_EMAC_TX_STAT_AC13 0x000016b4 bnx2.h 　
27011
 BNX2_EMAC_TX_STAT_AC14BNX2_EMAC_TX_STAT_AC14 0x000016b8 bnx2.h 　
27012
 BNX2_EMAC_TX_STAT_AC15BNX2_EMAC_TX_STAT_AC15 0x000016bc bnx2.h 　
27013
 BNX2_EMAC_TX_STAT_AC16BNX2_EMAC_TX_STAT_AC16 0x000016c0 bnx2.h 　
27014
 BNX2_EMAC_TX_STAT_AC17BNX2_EMAC_TX_STAT_AC17 0x000016c4 bnx2.h 　
27015
 BNX2_EMAC_TX_STAT_AC18BNX2_EMAC_TX_STAT_AC18 0x000016c8 bnx2.h 　
27016
 BNX2_EMAC_TX_STAT_AC19BNX2_EMAC_TX_STAT_AC19 0x000016cc bnx2.h 　
27017
 BNX2_EMAC_TX_STAT_AC20BNX2_EMAC_TX_STAT_AC20 0x000016d0 bnx2.h 　
27018
 BNX2_EMAC_TX_STAT_AC21BNX2_EMAC_TX_STAT_AC21 0x000016d4 bnx2.h 　
27019
 BNX2_EMAC_TXMAC_SUC_DBG_OVERRUNBNX2_EMAC_TXMAC_SUC_DBG_OVERRUN 0x000016d8 bnx2.h 　
27020
 BNX2_RPM_COMMANDBNX2_RPM_COMMAND 0x00001800 bnx2.h 　
27021
 BNX2_RPM_COMMAND_ENABLEDBNX2_RPM_COMMAND_ENABLED (1L<<0) bnx2.h 　
27022
 BNX2_RPM_COMMAND_OVERRUN_ABORTBNX2_RPM_COMMAND_OVERRUN_ABORT (1L<<4) bnx2.h 　
27023
 BNX2_RPM_STATUSBNX2_RPM_STATUS 0x00001804 bnx2.h 　
27024
 BNX2_RPM_STATUS_MBUF_WAITBNX2_RPM_STATUS_MBUF_WAIT (1L<<0) bnx2.h 　
27025
 BNX2_RPM_STATUS_FREE_WAITBNX2_RPM_STATUS_FREE_WAIT (1L<<1) bnx2.h 　
27026
 BNX2_RPM_CONFIGBNX2_RPM_CONFIG 0x00001808 bnx2.h 　
27027
 BNX2_RPM_CONFIG_NO_PSD_HDR_CKSUBNX2_RPM_CONFIG_NO_PSD_HDR_CKSU (1L<<0) bnx2.h 　
27028
 BNX2_RPM_CONFIG_ACPI_ENABNX2_RPM_CONFIG_ACPI_ENA (1L<<1) bnx2.h 　
27029
 BNX2_RPM_CONFIG_ACPI_KEEPBNX2_RPM_CONFIG_ACPI_KEEP (1L<<2) bnx2.h 　
27030
 BNX2_RPM_CONFIG_MP_KEEPBNX2_RPM_CONFIG_MP_KEEP (1L<<3) bnx2.h 　
27031
 BNX2_RPM_CONFIG_SORT_VECT_VALBNX2_RPM_CONFIG_SORT_VECT_VAL (0xfL<<4) bnx2.h 　
27032
 BNX2_RPM_CONFIG_IGNORE_VLANBNX2_RPM_CONFIG_IGNORE_VLAN (1L<<31) bnx2.h 　
27033
 BNX2_RPM_VLAN_MATCH0BNX2_RPM_VLAN_MATCH0 0x00001810 bnx2.h 　
27034
 BNX2_RPM_VLAN_MATCH0_RPM_VLAN_MBNX2_RPM_VLAN_MATCH0_RPM_VLAN_M (0xfffL<<0) bnx2.h 　
27035
 BNX2_RPM_VLAN_MATCH1BNX2_RPM_VLAN_MATCH1 0x00001814 bnx2.h 　
27036
 BNX2_RPM_VLAN_MATCH1_RPM_VLAN_MBNX2_RPM_VLAN_MATCH1_RPM_VLAN_M (0xfffL<<0) bnx2.h 　
27037
 BNX2_RPM_VLAN_MATCH2BNX2_RPM_VLAN_MATCH2 0x00001818 bnx2.h 　
27038
 BNX2_RPM_VLAN_MATCH2_RPM_VLAN_MBNX2_RPM_VLAN_MATCH2_RPM_VLAN_M (0xfffL<<0) bnx2.h 　
27039
 BNX2_RPM_VLAN_MATCH3BNX2_RPM_VLAN_MATCH3 0x0000181c bnx2.h 　
27040
 BNX2_RPM_VLAN_MATCH3_RPM_VLAN_MBNX2_RPM_VLAN_MATCH3_RPM_VLAN_M (0xfffL<<0) bnx2.h 　
27041
 BNX2_RPM_SORT_USER0BNX2_RPM_SORT_USER0 0x00001820 bnx2.h 　
27042
 BNX2_RPM_SORT_USER0_PM_ENBNX2_RPM_SORT_USER0_PM_EN (0xffffL<<0) bnx2.h 　
27043
 BNX2_RPM_SORT_USER0_BC_ENBNX2_RPM_SORT_USER0_BC_EN (1L<<16) bnx2.h 　
27044
 BNX2_RPM_SORT_USER0_MC_ENBNX2_RPM_SORT_USER0_MC_EN (1L<<17) bnx2.h 　
27045
 BNX2_RPM_SORT_USER0_MC_HSH_ENBNX2_RPM_SORT_USER0_MC_HSH_EN (1L<<18) bnx2.h 　
27046
 BNX2_RPM_SORT_USER0_PROM_ENBNX2_RPM_SORT_USER0_PROM_EN (1L<<19) bnx2.h 　
27047
 BNX2_RPM_SORT_USER0_VLAN_ENBNX2_RPM_SORT_USER0_VLAN_EN (0xfL<<20) bnx2.h 　
27048
 BNX2_RPM_SORT_USER0_PROM_VLANBNX2_RPM_SORT_USER0_PROM_VLAN (1L<<24) bnx2.h 　
27049
 BNX2_RPM_SORT_USER0_ENABNX2_RPM_SORT_USER0_ENA (1L<<31) bnx2.h 　
27050
 BNX2_RPM_SORT_USER1BNX2_RPM_SORT_USER1 0x00001824 bnx2.h 　
27051
 BNX2_RPM_SORT_USER1_PM_ENBNX2_RPM_SORT_USER1_PM_EN (0xffffL<<0) bnx2.h 　
27052
 BNX2_RPM_SORT_USER1_BC_ENBNX2_RPM_SORT_USER1_BC_EN (1L<<16) bnx2.h 　
27053
 BNX2_RPM_SORT_USER1_MC_ENBNX2_RPM_SORT_USER1_MC_EN (1L<<17) bnx2.h 　
27054
 BNX2_RPM_SORT_USER1_MC_HSH_ENBNX2_RPM_SORT_USER1_MC_HSH_EN (1L<<18) bnx2.h 　
27055
 BNX2_RPM_SORT_USER1_PROM_ENBNX2_RPM_SORT_USER1_PROM_EN (1L<<19) bnx2.h 　
27056
 BNX2_RPM_SORT_USER1_VLAN_ENBNX2_RPM_SORT_USER1_VLAN_EN (0xfL<<20) bnx2.h 　
27057
 BNX2_RPM_SORT_USER1_PROM_VLANBNX2_RPM_SORT_USER1_PROM_VLAN (1L<<24) bnx2.h 　
27058
 BNX2_RPM_SORT_USER1_ENABNX2_RPM_SORT_USER1_ENA (1L<<31) bnx2.h 　
27059
 BNX2_RPM_SORT_USER2BNX2_RPM_SORT_USER2 0x00001828 bnx2.h 　
27060
 BNX2_RPM_SORT_USER2_PM_ENBNX2_RPM_SORT_USER2_PM_EN (0xffffL<<0) bnx2.h 　
27061
 BNX2_RPM_SORT_USER2_BC_ENBNX2_RPM_SORT_USER2_BC_EN (1L<<16) bnx2.h 　
27062
 BNX2_RPM_SORT_USER2_MC_ENBNX2_RPM_SORT_USER2_MC_EN (1L<<17) bnx2.h 　
27063
 BNX2_RPM_SORT_USER2_MC_HSH_ENBNX2_RPM_SORT_USER2_MC_HSH_EN (1L<<18) bnx2.h 　
27064
 BNX2_RPM_SORT_USER2_PROM_ENBNX2_RPM_SORT_USER2_PROM_EN (1L<<19) bnx2.h 　
27065
 BNX2_RPM_SORT_USER2_VLAN_ENBNX2_RPM_SORT_USER2_VLAN_EN (0xfL<<20) bnx2.h 　
27066
 BNX2_RPM_SORT_USER2_PROM_VLANBNX2_RPM_SORT_USER2_PROM_VLAN (1L<<24) bnx2.h 　
27067
 BNX2_RPM_SORT_USER2_ENABNX2_RPM_SORT_USER2_ENA (1L<<31) bnx2.h 　
27068
 BNX2_RPM_SORT_USER3BNX2_RPM_SORT_USER3 0x0000182c bnx2.h 　
27069
 BNX2_RPM_SORT_USER3_PM_ENBNX2_RPM_SORT_USER3_PM_EN (0xffffL<<0) bnx2.h 　
27070
 BNX2_RPM_SORT_USER3_BC_ENBNX2_RPM_SORT_USER3_BC_EN (1L<<16) bnx2.h 　
27071
 BNX2_RPM_SORT_USER3_MC_ENBNX2_RPM_SORT_USER3_MC_EN (1L<<17) bnx2.h 　
27072
 BNX2_RPM_SORT_USER3_MC_HSH_ENBNX2_RPM_SORT_USER3_MC_HSH_EN (1L<<18) bnx2.h 　
27073
 BNX2_RPM_SORT_USER3_PROM_ENBNX2_RPM_SORT_USER3_PROM_EN (1L<<19) bnx2.h 　
27074
 BNX2_RPM_SORT_USER3_VLAN_ENBNX2_RPM_SORT_USER3_VLAN_EN (0xfL<<20) bnx2.h 　
27075
 BNX2_RPM_SORT_USER3_PROM_VLANBNX2_RPM_SORT_USER3_PROM_VLAN (1L<<24) bnx2.h 　
27076
 BNX2_RPM_SORT_USER3_ENABNX2_RPM_SORT_USER3_ENA (1L<<31) bnx2.h 　
27077
 BNX2_RPM_STAT_L2_FILTER_DISCARDBNX2_RPM_STAT_L2_FILTER_DISCARD 0x00001840 bnx2.h 　
27078
 BNX2_RPM_STAT_RULE_CHECKER_DISCBNX2_RPM_STAT_RULE_CHECKER_DISC 0x00001844 bnx2.h 　
27079
 BNX2_RPM_STAT_IFINFTQDISCARDSBNX2_RPM_STAT_IFINFTQDISCARDS 0x00001848 bnx2.h 　
27080
 BNX2_RPM_STAT_IFINMBUFDISCARDBNX2_RPM_STAT_IFINMBUFDISCARD 0x0000184c bnx2.h 　
27081
 BNX2_RPM_STAT_RULE_CHECKER_P4_HBNX2_RPM_STAT_RULE_CHECKER_P4_H 0x00001850 bnx2.h 　
27082
 BNX2_RPM_STAT_AC0BNX2_RPM_STAT_AC0 0x00001880 bnx2.h 　
27083
 BNX2_RPM_STAT_AC1BNX2_RPM_STAT_AC1 0x00001884 bnx2.h 　
27084
 BNX2_RPM_STAT_AC2BNX2_RPM_STAT_AC2 0x00001888 bnx2.h 　
27085
 BNX2_RPM_STAT_AC3BNX2_RPM_STAT_AC3 0x0000188c bnx2.h 　
27086
 BNX2_RPM_STAT_AC4BNX2_RPM_STAT_AC4 0x00001890 bnx2.h 　
27087
 BNX2_RPM_RC_CNTL_0BNX2_RPM_RC_CNTL_0 0x00001900 bnx2.h 　
27088
 BNX2_RPM_RC_CNTL_0_OFFSETBNX2_RPM_RC_CNTL_0_OFFSET (0xffL<<0) bnx2.h 　
27089
 BNX2_RPM_RC_CNTL_0_CLASSBNX2_RPM_RC_CNTL_0_CLASS (0x7L<<8) bnx2.h 　
27090
 BNX2_RPM_RC_CNTL_0_PRIORITYBNX2_RPM_RC_CNTL_0_PRIORITY (1L<<11) bnx2.h 　
27091
 BNX2_RPM_RC_CNTL_0_P4BNX2_RPM_RC_CNTL_0_P4 (1L<<12) bnx2.h 　
27092
 BNX2_RPM_RC_CNTL_0_HDR_TYPEBNX2_RPM_RC_CNTL_0_HDR_TYPE (0x7L<<13) bnx2.h 　
27093
 BNX2_RPM_RC_CNTL_0_HDR_TYPE_STABNX2_RPM_RC_CNTL_0_HDR_TYPE_STA (0L<<13) bnx2.h 　
27094
 BNX2_RPM_RC_CNTL_0_HDR_TYPE_IPBNX2_RPM_RC_CNTL_0_HDR_TYPE_IP (1L<<13) bnx2.h 　
27095
 BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCPBNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP (2L<<13) bnx2.h 　
27096
 BNX2_RPM_RC_CNTL_0_HDR_TYPE_UDPBNX2_RPM_RC_CNTL_0_HDR_TYPE_UDP (3L<<13) bnx2.h 　
27097
 BNX2_RPM_RC_CNTL_0_HDR_TYPE_DATBNX2_RPM_RC_CNTL_0_HDR_TYPE_DAT (4L<<13) bnx2.h 　
27098
 BNX2_RPM_RC_CNTL_0_COMPBNX2_RPM_RC_CNTL_0_COMP (0x3L<<16) bnx2.h 　
27099
 BNX2_RPM_RC_CNTL_0_COMP_EQUALBNX2_RPM_RC_CNTL_0_COMP_EQUAL (0L<<16) bnx2.h 　
27100
 BNX2_RPM_RC_CNTL_0_COMP_NEQUALBNX2_RPM_RC_CNTL_0_COMP_NEQUAL (1L<<16) bnx2.h 　
27101
 BNX2_RPM_RC_CNTL_0_COMP_GREATERBNX2_RPM_RC_CNTL_0_COMP_GREATER (2L<<16) bnx2.h 　
27102
 BNX2_RPM_RC_CNTL_0_COMP_LESSBNX2_RPM_RC_CNTL_0_COMP_LESS (3L<<16) bnx2.h 　
27103
 BNX2_RPM_RC_CNTL_0_SBITBNX2_RPM_RC_CNTL_0_SBIT (1L<<19) bnx2.h 　
27104
 BNX2_RPM_RC_CNTL_0_CMDSELBNX2_RPM_RC_CNTL_0_CMDSEL (0xfL<<20) bnx2.h 　
27105
 BNX2_RPM_RC_CNTL_0_MAPBNX2_RPM_RC_CNTL_0_MAP (1L<<24) bnx2.h 　
27106
 BNX2_RPM_RC_CNTL_0_DISCARDBNX2_RPM_RC_CNTL_0_DISCARD (1L<<25) bnx2.h 　
27107
 BNX2_RPM_RC_CNTL_0_MASKBNX2_RPM_RC_CNTL_0_MASK (1L<<26) bnx2.h 　
27108
 BNX2_RPM_RC_CNTL_0_P1BNX2_RPM_RC_CNTL_0_P1 (1L<<27) bnx2.h 　
27109
 BNX2_RPM_RC_CNTL_0_P2BNX2_RPM_RC_CNTL_0_P2 (1L<<28) bnx2.h 　
27110
 BNX2_RPM_RC_CNTL_0_P3BNX2_RPM_RC_CNTL_0_P3 (1L<<29) bnx2.h 　
27111
 BNX2_RPM_RC_CNTL_0_NBITBNX2_RPM_RC_CNTL_0_NBIT (1L<<30) bnx2.h 　
27112
 BNX2_RPM_RC_VALUE_MASK_0BNX2_RPM_RC_VALUE_MASK_0 0x00001904 bnx2.h 　
27113
 BNX2_RPM_RC_VALUE_MASK_0_VALUEBNX2_RPM_RC_VALUE_MASK_0_VALUE (0xffffL<<0) bnx2.h 　
27114
 BNX2_RPM_RC_VALUE_MASK_0_MASKBNX2_RPM_RC_VALUE_MASK_0_MASK (0xffffL<<16) bnx2.h 　
27115
 BNX2_RPM_RC_CNTL_1BNX2_RPM_RC_CNTL_1 0x00001908 bnx2.h 　
27116
 BNX2_RPM_RC_CNTL_1_ABNX2_RPM_RC_CNTL_1_A (0x3ffffL<<0) bnx2.h 　
27117
 BNX2_RPM_RC_CNTL_1_BBNX2_RPM_RC_CNTL_1_B (0xfffL<<19) bnx2.h 　
27118
 BNX2_RPM_RC_VALUE_MASK_1BNX2_RPM_RC_VALUE_MASK_1 0x0000190c bnx2.h 　
27119
 BNX2_RPM_RC_CNTL_2BNX2_RPM_RC_CNTL_2 0x00001910 bnx2.h 　
27120
 BNX2_RPM_RC_CNTL_2_ABNX2_RPM_RC_CNTL_2_A (0x3ffffL<<0) bnx2.h 　
27121
 BNX2_RPM_RC_CNTL_2_BBNX2_RPM_RC_CNTL_2_B (0xfffL<<19) bnx2.h 　
27122
 BNX2_RPM_RC_VALUE_MASK_2BNX2_RPM_RC_VALUE_MASK_2 0x00001914 bnx2.h 　
27123
 BNX2_RPM_RC_CNTL_3BNX2_RPM_RC_CNTL_3 0x00001918 bnx2.h 　
27124
 BNX2_RPM_RC_CNTL_3_ABNX2_RPM_RC_CNTL_3_A (0x3ffffL<<0) bnx2.h 　
27125
 BNX2_RPM_RC_CNTL_3_BBNX2_RPM_RC_CNTL_3_B (0xfffL<<19) bnx2.h 　
27126
 BNX2_RPM_RC_VALUE_MASK_3BNX2_RPM_RC_VALUE_MASK_3 0x0000191c bnx2.h 　
27127
 BNX2_RPM_RC_CNTL_4BNX2_RPM_RC_CNTL_4 0x00001920 bnx2.h 　
27128
 BNX2_RPM_RC_CNTL_4_ABNX2_RPM_RC_CNTL_4_A (0x3ffffL<<0) bnx2.h 　
27129
 BNX2_RPM_RC_CNTL_4_BBNX2_RPM_RC_CNTL_4_B (0xfffL<<19) bnx2.h 　
27130
 BNX2_RPM_RC_VALUE_MASK_4BNX2_RPM_RC_VALUE_MASK_4 0x00001924 bnx2.h 　
27131
 BNX2_RPM_RC_CNTL_5BNX2_RPM_RC_CNTL_5 0x00001928 bnx2.h 　
27132
 BNX2_RPM_RC_CNTL_5_ABNX2_RPM_RC_CNTL_5_A (0x3ffffL<<0) bnx2.h 　
27133
 BNX2_RPM_RC_CNTL_5_BBNX2_RPM_RC_CNTL_5_B (0xfffL<<19) bnx2.h 　
27134
 BNX2_RPM_RC_VALUE_MASK_5BNX2_RPM_RC_VALUE_MASK_5 0x0000192c bnx2.h 　
27135
 BNX2_RPM_RC_CNTL_6BNX2_RPM_RC_CNTL_6 0x00001930 bnx2.h 　
27136
 BNX2_RPM_RC_CNTL_6_ABNX2_RPM_RC_CNTL_6_A (0x3ffffL<<0) bnx2.h 　
27137
 BNX2_RPM_RC_CNTL_6_BBNX2_RPM_RC_CNTL_6_B (0xfffL<<19) bnx2.h 　
27138
 BNX2_RPM_RC_VALUE_MASK_6BNX2_RPM_RC_VALUE_MASK_6 0x00001934 bnx2.h 　
27139
 BNX2_RPM_RC_CNTL_7BNX2_RPM_RC_CNTL_7 0x00001938 bnx2.h 　
27140
 BNX2_RPM_RC_CNTL_7_ABNX2_RPM_RC_CNTL_7_A (0x3ffffL<<0) bnx2.h 　
27141
 BNX2_RPM_RC_CNTL_7_BBNX2_RPM_RC_CNTL_7_B (0xfffL<<19) bnx2.h 　
27142
 BNX2_RPM_RC_VALUE_MASK_7BNX2_RPM_RC_VALUE_MASK_7 0x0000193c bnx2.h 　
27143
 BNX2_RPM_RC_CNTL_8BNX2_RPM_RC_CNTL_8 0x00001940 bnx2.h 　
27144
 BNX2_RPM_RC_CNTL_8_ABNX2_RPM_RC_CNTL_8_A (0x3ffffL<<0) bnx2.h 　
27145
 BNX2_RPM_RC_CNTL_8_BBNX2_RPM_RC_CNTL_8_B (0xfffL<<19) bnx2.h 　
27146
 BNX2_RPM_RC_VALUE_MASK_8BNX2_RPM_RC_VALUE_MASK_8 0x00001944 bnx2.h 　
27147
 BNX2_RPM_RC_CNTL_9BNX2_RPM_RC_CNTL_9 0x00001948 bnx2.h 　
27148
 BNX2_RPM_RC_CNTL_9_ABNX2_RPM_RC_CNTL_9_A (0x3ffffL<<0) bnx2.h 　
27149
 BNX2_RPM_RC_CNTL_9_BBNX2_RPM_RC_CNTL_9_B (0xfffL<<19) bnx2.h 　
27150
 BNX2_RPM_RC_VALUE_MASK_9BNX2_RPM_RC_VALUE_MASK_9 0x0000194c bnx2.h 　
27151
 BNX2_RPM_RC_CNTL_10BNX2_RPM_RC_CNTL_10 0x00001950 bnx2.h 　
27152
 BNX2_RPM_RC_CNTL_10_ABNX2_RPM_RC_CNTL_10_A (0x3ffffL<<0) bnx2.h 　
27153
 BNX2_RPM_RC_CNTL_10_BBNX2_RPM_RC_CNTL_10_B (0xfffL<<19) bnx2.h 　
27154
 BNX2_RPM_RC_VALUE_MASK_10BNX2_RPM_RC_VALUE_MASK_10 0x00001954 bnx2.h 　
27155
 BNX2_RPM_RC_CNTL_11BNX2_RPM_RC_CNTL_11 0x00001958 bnx2.h 　
27156
 BNX2_RPM_RC_CNTL_11_ABNX2_RPM_RC_CNTL_11_A (0x3ffffL<<0) bnx2.h 　
27157
 BNX2_RPM_RC_CNTL_11_BBNX2_RPM_RC_CNTL_11_B (0xfffL<<19) bnx2.h 　
27158
 BNX2_RPM_RC_VALUE_MASK_11BNX2_RPM_RC_VALUE_MASK_11 0x0000195c bnx2.h 　
27159
 BNX2_RPM_RC_CNTL_12BNX2_RPM_RC_CNTL_12 0x00001960 bnx2.h 　
27160
 BNX2_RPM_RC_CNTL_12_ABNX2_RPM_RC_CNTL_12_A (0x3ffffL<<0) bnx2.h 　
27161
 BNX2_RPM_RC_CNTL_12_BBNX2_RPM_RC_CNTL_12_B (0xfffL<<19) bnx2.h 　
27162
 BNX2_RPM_RC_VALUE_MASK_12BNX2_RPM_RC_VALUE_MASK_12 0x00001964 bnx2.h 　
27163
 BNX2_RPM_RC_CNTL_13BNX2_RPM_RC_CNTL_13 0x00001968 bnx2.h 　
27164
 BNX2_RPM_RC_CNTL_13_ABNX2_RPM_RC_CNTL_13_A (0x3ffffL<<0) bnx2.h 　
27165
 BNX2_RPM_RC_CNTL_13_BBNX2_RPM_RC_CNTL_13_B (0xfffL<<19) bnx2.h 　
27166
 BNX2_RPM_RC_VALUE_MASK_13BNX2_RPM_RC_VALUE_MASK_13 0x0000196c bnx2.h 　
27167
 BNX2_RPM_RC_CNTL_14BNX2_RPM_RC_CNTL_14 0x00001970 bnx2.h 　
27168
 BNX2_RPM_RC_CNTL_14_ABNX2_RPM_RC_CNTL_14_A (0x3ffffL<<0) bnx2.h 　
27169
 BNX2_RPM_RC_CNTL_14_BBNX2_RPM_RC_CNTL_14_B (0xfffL<<19) bnx2.h 　
27170
 BNX2_RPM_RC_VALUE_MASK_14BNX2_RPM_RC_VALUE_MASK_14 0x00001974 bnx2.h 　
27171
 BNX2_RPM_RC_CNTL_15BNX2_RPM_RC_CNTL_15 0x00001978 bnx2.h 　
27172
 BNX2_RPM_RC_CNTL_15_ABNX2_RPM_RC_CNTL_15_A (0x3ffffL<<0) bnx2.h 　
27173
 BNX2_RPM_RC_CNTL_15_BBNX2_RPM_RC_CNTL_15_B (0xfffL<<19) bnx2.h 　
27174
 BNX2_RPM_RC_VALUE_MASK_15BNX2_RPM_RC_VALUE_MASK_15 0x0000197c bnx2.h 　
27175
 BNX2_RPM_RC_CONFIGBNX2_RPM_RC_CONFIG 0x00001980 bnx2.h 　
27176
 BNX2_RPM_RC_CONFIG_RULE_ENABLEBNX2_RPM_RC_CONFIG_RULE_ENABLE (0xffffL<<0) bnx2.h 　
27177
 BNX2_RPM_RC_CONFIG_DEF_CLASSBNX2_RPM_RC_CONFIG_DEF_CLASS (0x7L<<24) bnx2.h 　
27178
 BNX2_RPM_DEBUG0BNX2_RPM_DEBUG0 0x00001984 bnx2.h 　
27179
 BNX2_RPM_DEBUG0_FM_BCNTBNX2_RPM_DEBUG0_FM_BCNT (0xffffL<<0) bnx2.h 　
27180
 BNX2_RPM_DEBUG0_T_DATA_OFST_VLDBNX2_RPM_DEBUG0_T_DATA_OFST_VLD (1L<<16) bnx2.h 　
27181
 BNX2_RPM_DEBUG0_T_UDP_OFST_VLDBNX2_RPM_DEBUG0_T_UDP_OFST_VLD (1L<<17) bnx2.h 　
27182
 BNX2_RPM_DEBUG0_T_TCP_OFST_VLDBNX2_RPM_DEBUG0_T_TCP_OFST_VLD (1L<<18) bnx2.h 　
27183
 BNX2_RPM_DEBUG0_T_IP_OFST_VLDBNX2_RPM_DEBUG0_T_IP_OFST_VLD (1L<<19) bnx2.h 　
27184
 BNX2_RPM_DEBUG0_IP_MORE_FRGMTBNX2_RPM_DEBUG0_IP_MORE_FRGMT (1L<<20) bnx2.h 　
27185
 BNX2_RPM_DEBUG0_T_IP_NO_TCP_UDPBNX2_RPM_DEBUG0_T_IP_NO_TCP_UDP (1L<<21) bnx2.h 　
27186
 BNX2_RPM_DEBUG0_LLC_SNAPBNX2_RPM_DEBUG0_LLC_SNAP (1L<<22) bnx2.h 　
27187
 BNX2_RPM_DEBUG0_FM_STARTEDBNX2_RPM_DEBUG0_FM_STARTED (1L<<23) bnx2.h 　
27188
 BNX2_RPM_DEBUG0_DONEBNX2_RPM_DEBUG0_DONE (1L<<24) bnx2.h 　
27189
 BNX2_RPM_DEBUG0_WAIT_4_DONEBNX2_RPM_DEBUG0_WAIT_4_DONE (1L<<25) bnx2.h 　
27190
 BNX2_RPM_DEBUG0_USE_TPBUF_CKSUMBNX2_RPM_DEBUG0_USE_TPBUF_CKSUM (1L<<26) bnx2.h 　
27191
 BNX2_RPM_DEBUG0_RX_NO_PSD_HDR_CBNX2_RPM_DEBUG0_RX_NO_PSD_HDR_C (1L<<27) bnx2.h 　
27192
 BNX2_RPM_DEBUG0_IGNORE_VLANBNX2_RPM_DEBUG0_IGNORE_VLAN (1L<<28) bnx2.h 　
27193
 BNX2_RPM_DEBUG0_RP_ENA_ACTIVEBNX2_RPM_DEBUG0_RP_ENA_ACTIVE (1L<<31) bnx2.h 　
27194
 BNX2_RPM_DEBUG1BNX2_RPM_DEBUG1 0x00001988 bnx2.h 　
27195
 BNX2_RPM_DEBUG1_FSM_CUR_STBNX2_RPM_DEBUG1_FSM_CUR_ST (0xffffL<<0) bnx2.h 　
27196
 BNX2_RPM_DEBUG1_FSM_CUR_ST_IDLEBNX2_RPM_DEBUG1_FSM_CUR_ST_IDLE (0L<<0) bnx2.h 　
27197
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPBNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP (1L<<0) bnx2.h 　
27198
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPBNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP (2L<<0) bnx2.h 　
27199
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPBNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP (4L<<0) bnx2.h 　
27200
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPBNX2_RPM_DEBUG1_FSM_CUR_ST_ETYP (8L<<0) bnx2.h 　
27201
 BNX2_RPM_DEBUG1_FSM_CUR_ST_IP_SBNX2_RPM_DEBUG1_FSM_CUR_ST_IP_S (16L<<0) bnx2.h 　
27202
 BNX2_RPM_DEBUG1_FSM_CUR_ST_IPBNX2_RPM_DEBUG1_FSM_CUR_ST_IP (32L<<0) bnx2.h 　
27203
 BNX2_RPM_DEBUG1_FSM_CUR_ST_TCPBNX2_RPM_DEBUG1_FSM_CUR_ST_TCP (64L<<0) bnx2.h 　
27204
 BNX2_RPM_DEBUG1_FSM_CUR_ST_UDPBNX2_RPM_DEBUG1_FSM_CUR_ST_UDP (128L<<0) bnx2.h 　
27205
 BNX2_RPM_DEBUG1_FSM_CUR_ST_AHBNX2_RPM_DEBUG1_FSM_CUR_ST_AH (256L<<0) bnx2.h 　
27206
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ESPBNX2_RPM_DEBUG1_FSM_CUR_ST_ESP (512L<<0) bnx2.h 　
27207
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_ (1024L<<0) bnx2.h 　
27208
 BNX2_RPM_DEBUG1_FSM_CUR_ST_DATABNX2_RPM_DEBUG1_FSM_CUR_ST_DATA (2048L<<0) bnx2.h 　
27209
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_ (0x2000L<<0) bnx2.h 　
27210
 BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_ (0x4000L<<0) bnx2.h 　
27211
 BNX2_RPM_DEBUG1_FSM_CUR_ST_LATCBNX2_RPM_DEBUG1_FSM_CUR_ST_LATC (0x8000L<<0) bnx2.h 　
27212
 BNX2_RPM_DEBUG1_HDR_BCNTBNX2_RPM_DEBUG1_HDR_BCNT (0x7ffL<<16) bnx2.h 　
27213
 BNX2_RPM_DEBUG1_UNKNOWN_ETYPE_DBNX2_RPM_DEBUG1_UNKNOWN_ETYPE_D (1L<<28) bnx2.h 　
27214
 BNX2_RPM_DEBUG1_VLAN_REMOVED_D2BNX2_RPM_DEBUG1_VLAN_REMOVED_D2 (1L<<29) bnx2.h 　
27215
 BNX2_RPM_DEBUG1_VLAN_REMOVED_D1BNX2_RPM_DEBUG1_VLAN_REMOVED_D1 (1L<<30) bnx2.h 　
27216
 BNX2_RPM_DEBUG1_EOF_0XTRA_WDBNX2_RPM_DEBUG1_EOF_0XTRA_WD (1L<<31) bnx2.h 　
27217
 BNX2_RPM_DEBUG2BNX2_RPM_DEBUG2 0x0000198c bnx2.h 　
27218
 BNX2_RPM_DEBUG2_CMD_HIT_VECBNX2_RPM_DEBUG2_CMD_HIT_VEC (0xffffL<<0) bnx2.h 　
27219
 BNX2_RPM_DEBUG2_IP_BCNTBNX2_RPM_DEBUG2_IP_BCNT (0xffL<<16) bnx2.h 　
27220
 BNX2_RPM_DEBUG2_THIS_CMD_M4BNX2_RPM_DEBUG2_THIS_CMD_M4 (1L<<24) bnx2.h 　
27221
 BNX2_RPM_DEBUG2_THIS_CMD_M3BNX2_RPM_DEBUG2_THIS_CMD_M3 (1L<<25) bnx2.h 　
27222
 BNX2_RPM_DEBUG2_THIS_CMD_M2BNX2_RPM_DEBUG2_THIS_CMD_M2 (1L<<26) bnx2.h 　
27223
 BNX2_RPM_DEBUG2_THIS_CMD_M1BNX2_RPM_DEBUG2_THIS_CMD_M1 (1L<<27) bnx2.h 　
27224
 BNX2_RPM_DEBUG2_IPIPE_EMPTYBNX2_RPM_DEBUG2_IPIPE_EMPTY (1L<<28) bnx2.h 　
27225
 BNX2_RPM_DEBUG2_FM_DISCARDBNX2_RPM_DEBUG2_FM_DISCARD (1L<<29) bnx2.h 　
27226
 BNX2_RPM_DEBUG2_LAST_RULE_IN_FMBNX2_RPM_DEBUG2_LAST_RULE_IN_FM (1L<<30) bnx2.h 　
27227
 BNX2_RPM_DEBUG2_LAST_RULE_IN_FMBNX2_RPM_DEBUG2_LAST_RULE_IN_FM (1L<<31) bnx2.h 　
27228
 BNX2_RPM_DEBUG3BNX2_RPM_DEBUG3 0x00001990 bnx2.h 　
27229
 BNX2_RPM_DEBUG3_AVAIL_MBUF_PTRBNX2_RPM_DEBUG3_AVAIL_MBUF_PTR (0x1ffL<<0) bnx2.h 　
27230
 BNX2_RPM_DEBUG3_RDE_RLUPQ_WR_REBNX2_RPM_DEBUG3_RDE_RLUPQ_WR_RE (1L<<9) bnx2.h 　
27231
 BNX2_RPM_DEBUG3_RDE_RBUF_WR_LASBNX2_RPM_DEBUG3_RDE_RBUF_WR_LAS (1L<<10) bnx2.h 　
27232
 BNX2_RPM_DEBUG3_RDE_RBUF_WR_REQBNX2_RPM_DEBUG3_RDE_RBUF_WR_REQ (1L<<11) bnx2.h 　
27233
 BNX2_RPM_DEBUG3_RDE_RBUF_FREE_RBNX2_RPM_DEBUG3_RDE_RBUF_FREE_R (1L<<12) bnx2.h 　
27234
 BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_ (1L<<13) bnx2.h 　
27235
 BNX2_RPM_DEBUG3_DFSM_MBUF_NOTAVBNX2_RPM_DEBUG3_DFSM_MBUF_NOTAV (1L<<14) bnx2.h 　
27236
 BNX2_RPM_DEBUG3_RBUF_RDE_SOF_DRBNX2_RPM_DEBUG3_RBUF_RDE_SOF_DR (1L<<15) bnx2.h 　
27237
 BNX2_RPM_DEBUG3_DFIFO_VLD_ENTRYBNX2_RPM_DEBUG3_DFIFO_VLD_ENTRY (0xfL<<16) bnx2.h 　
27238
 BNX2_RPM_DEBUG3_RDE_SRC_FIFO_ALBNX2_RPM_DEBUG3_RDE_SRC_FIFO_AL (1L<<21) bnx2.h 　
27239
 BNX2_RPM_DEBUG3_DROP_NXT_VLDBNX2_RPM_DEBUG3_DROP_NXT_VLD (1L<<22) bnx2.h 　
27240
 BNX2_RPM_DEBUG3_DROP_NXTBNX2_RPM_DEBUG3_DROP_NXT (1L<<23) bnx2.h 　
27241
 BNX2_RPM_DEBUG3_FTQ_FSMBNX2_RPM_DEBUG3_FTQ_FSM (0x3L<<24) bnx2.h 　
27242
 BNX2_RPM_DEBUG3_FTQ_FSM_IDLEBNX2_RPM_DEBUG3_FTQ_FSM_IDLE (0x0L<<24) bnx2.h 　
27243
 BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_ACBNX2_RPM_DEBUG3_FTQ_FSM_WAIT_AC (0x1L<<24) bnx2.h 　
27244
 BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FRBNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FR (0x2L<<24) bnx2.h 　
27245
 BNX2_RPM_DEBUG3_MBWRITE_FSMBNX2_RPM_DEBUG3_MBWRITE_FSM (0x3L<<26) bnx2.h 　
27246
 BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIBNX2_RPM_DEBUG3_MBWRITE_FSM_WAI (0x0L<<26) bnx2.h 　
27247
 BNX2_RPM_DEBUG3_MBWRITE_FSM_GETBNX2_RPM_DEBUG3_MBWRITE_FSM_GET (0x1L<<26) bnx2.h 　
27248
 BNX2_RPM_DEBUG3_MBWRITE_FSM_DMABNX2_RPM_DEBUG3_MBWRITE_FSM_DMA (0x2L<<26) bnx2.h 　
27249
 BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIBNX2_RPM_DEBUG3_MBWRITE_FSM_WAI (0x3L<<26) bnx2.h 　
27250
 BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIBNX2_RPM_DEBUG3_MBWRITE_FSM_WAI (0x4L<<26) bnx2.h 　
27251
 BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIBNX2_RPM_DEBUG3_MBWRITE_FSM_WAI (0x5L<<26) bnx2.h 　
27252
 BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIBNX2_RPM_DEBUG3_MBWRITE_FSM_WAI (0x6L<<26) bnx2.h 　
27253
 BNX2_RPM_DEBUG3_MBWRITE_FSM_DONBNX2_RPM_DEBUG3_MBWRITE_FSM_DON (0x7L<<26) bnx2.h 　
27254
 BNX2_RPM_DEBUG3_MBFREE_FSMBNX2_RPM_DEBUG3_MBFREE_FSM (1L<<29) bnx2.h 　
27255
 BNX2_RPM_DEBUG3_MBFREE_FSM_IDLEBNX2_RPM_DEBUG3_MBFREE_FSM_IDLE (0L<<29) bnx2.h 　
27256
 BNX2_RPM_DEBUG3_MBFREE_FSM_WAITBNX2_RPM_DEBUG3_MBFREE_FSM_WAIT (1L<<29) bnx2.h 　
27257
 BNX2_RPM_DEBUG3_MBALLOC_FSMBNX2_RPM_DEBUG3_MBALLOC_FSM (1L<<30) bnx2.h 　
27258
 BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_ (0x0L<<30) bnx2.h 　
27259
 BNX2_RPM_DEBUG3_MBALLOC_FSM_IVEBNX2_RPM_DEBUG3_MBALLOC_FSM_IVE (0x1L<<30) bnx2.h 　
27260
 BNX2_RPM_DEBUG3_CCODE_EOF_ERRORBNX2_RPM_DEBUG3_CCODE_EOF_ERROR (1L<<31) bnx2.h 　
27261
 BNX2_RPM_DEBUG4BNX2_RPM_DEBUG4 0x00001994 bnx2.h 　
27262
 BNX2_RPM_DEBUG4_DFSM_MBUF_CLUSTBNX2_RPM_DEBUG4_DFSM_MBUF_CLUST (0x1ffffffL<<0) bnx2.h 　
27263
 BNX2_RPM_DEBUG4_DFIFO_CUR_CCODEBNX2_RPM_DEBUG4_DFIFO_CUR_CCODE (0x7L<<25) bnx2.h 　
27264
 BNX2_RPM_DEBUG4_MBWRITE_FSMBNX2_RPM_DEBUG4_MBWRITE_FSM (0x7L<<28) bnx2.h 　
27265
 BNX2_RPM_DEBUG4_DFIFO_EMPTYBNX2_RPM_DEBUG4_DFIFO_EMPTY (1L<<31) bnx2.h 　
27266
 BNX2_RPM_DEBUG5BNX2_RPM_DEBUG5 0x00001998 bnx2.h 　
27267
 BNX2_RPM_DEBUG5_RDROP_WPTRBNX2_RPM_DEBUG5_RDROP_WPTR (0x1fL<<0) bnx2.h 　
27268
 BNX2_RPM_DEBUG5_RDROP_ACPI_RPTRBNX2_RPM_DEBUG5_RDROP_ACPI_RPTR (0x1fL<<5) bnx2.h 　
27269
 BNX2_RPM_DEBUG5_RDROP_MC_RPTRBNX2_RPM_DEBUG5_RDROP_MC_RPTR (0x1fL<<10) bnx2.h 　
27270
 BNX2_RPM_DEBUG5_RDROP_RC_RPTRBNX2_RPM_DEBUG5_RDROP_RC_RPTR (0x1fL<<15) bnx2.h 　
27271
 BNX2_RPM_DEBUG5_RDROP_ACPI_EMPTBNX2_RPM_DEBUG5_RDROP_ACPI_EMPT (1L<<20) bnx2.h 　
27272
 BNX2_RPM_DEBUG5_RDROP_MC_EMPTYBNX2_RPM_DEBUG5_RDROP_MC_EMPTY (1L<<21) bnx2.h 　
27273
 BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_ (1L<<22) bnx2.h 　
27274
 BNX2_RPM_DEBUG5_HOLDREG_WOL_DROBNX2_RPM_DEBUG5_HOLDREG_WOL_DRO (1L<<23) bnx2.h 　
27275
 BNX2_RPM_DEBUG5_HOLDREG_DISCARDBNX2_RPM_DEBUG5_HOLDREG_DISCARD (1L<<24) bnx2.h 　
27276
 BNX2_RPM_DEBUG5_HOLDREG_MBUF_NOBNX2_RPM_DEBUG5_HOLDREG_MBUF_NO (1L<<25) bnx2.h 　
27277
 BNX2_RPM_DEBUG5_HOLDREG_MC_EMPTBNX2_RPM_DEBUG5_HOLDREG_MC_EMPT (1L<<26) bnx2.h 　
27278
 BNX2_RPM_DEBUG5_HOLDREG_RC_EMPTBNX2_RPM_DEBUG5_HOLDREG_RC_EMPT (1L<<27) bnx2.h 　
27279
 BNX2_RPM_DEBUG5_HOLDREG_FC_EMPTBNX2_RPM_DEBUG5_HOLDREG_FC_EMPT (1L<<28) bnx2.h 　
27280
 BNX2_RPM_DEBUG5_HOLDREG_ACPI_EMBNX2_RPM_DEBUG5_HOLDREG_ACPI_EM (1L<<29) bnx2.h 　
27281
 BNX2_RPM_DEBUG5_HOLDREG_FULL_TBNX2_RPM_DEBUG5_HOLDREG_FULL_T (1L<<30) bnx2.h 　
27282
 BNX2_RPM_DEBUG5_HOLDREG_RDBNX2_RPM_DEBUG5_HOLDREG_RD (1L<<31) bnx2.h 　
27283
 BNX2_RPM_DEBUG6BNX2_RPM_DEBUG6 0x0000199c bnx2.h 　
27284
 BNX2_RPM_DEBUG6_ACPI_VECBNX2_RPM_DEBUG6_ACPI_VEC (0xffffL<<0) bnx2.h 　
27285
 BNX2_RPM_DEBUG6_VECBNX2_RPM_DEBUG6_VEC (0xffffL<<16) bnx2.h 　
27286
 BNX2_RPM_DEBUG7BNX2_RPM_DEBUG7 0x000019a0 bnx2.h 　
27287
 BNX2_RPM_DEBUG7_RPM_DBG7_LAST_CBNX2_RPM_DEBUG7_RPM_DBG7_LAST_C (0xffffffffL<<0) bnx2.h 　
27288
 BNX2_RPM_DEBUG8BNX2_RPM_DEBUG8 0x000019a4 bnx2.h 　
27289
 BNX2_RPM_DEBUG8_PS_ACPI_FSMBNX2_RPM_DEBUG8_PS_ACPI_FSM (0xfL<<0) bnx2.h 　
27290
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_IDLBNX2_RPM_DEBUG8_PS_ACPI_FSM_IDL (0L<<0) bnx2.h 　
27291
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOFBNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF (1L<<0) bnx2.h 　
27292
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOFBNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF (2L<<0) bnx2.h 　
27293
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOFBNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF (3L<<0) bnx2.h 　
27294
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOFBNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF (4L<<0) bnx2.h 　
27295
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_ (5L<<0) bnx2.h 　
27296
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_ (6L<<0) bnx2.h 　
27297
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_ (7L<<0) bnx2.h 　
27298
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_ (8L<<0) bnx2.h 　
27299
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_ (9L<<0) bnx2.h 　
27300
 BNX2_RPM_DEBUG8_PS_ACPI_FSM_WAIBNX2_RPM_DEBUG8_PS_ACPI_FSM_WAI (10L<<0) bnx2.h 　
27301
 BNX2_RPM_DEBUG8_COMPARE_AT_W0BNX2_RPM_DEBUG8_COMPARE_AT_W0 (1L<<4) bnx2.h 　
27302
 BNX2_RPM_DEBUG8_COMPARE_AT_W3_DBNX2_RPM_DEBUG8_COMPARE_AT_W3_D (1L<<5) bnx2.h 　
27303
 BNX2_RPM_DEBUG8_COMPARE_AT_SOF_BNX2_RPM_DEBUG8_COMPARE_AT_SOF_ (1L<<6) bnx2.h 　
27304
 BNX2_RPM_DEBUG8_COMPARE_AT_SOF_BNX2_RPM_DEBUG8_COMPARE_AT_SOF_ (1L<<7) bnx2.h 　
27305
 BNX2_RPM_DEBUG8_COMPARE_AT_SOF_BNX2_RPM_DEBUG8_COMPARE_AT_SOF_ (1L<<8) bnx2.h 　
27306
 BNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLDBNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLD (1L<<9) bnx2.h 　
27307
 BNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLDBNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLD (1L<<10) bnx2.h 　
27308
 BNX2_RPM_DEBUG8_NXT_EOF_W_12_VLBNX2_RPM_DEBUG8_NXT_EOF_W_12_VL (1L<<11) bnx2.h 　
27309
 BNX2_RPM_DEBUG8_EOF_DETBNX2_RPM_DEBUG8_EOF_DET (1L<<12) bnx2.h 　
27310
 BNX2_RPM_DEBUG8_SOF_DETBNX2_RPM_DEBUG8_SOF_DET (1L<<13) bnx2.h 　
27311
 BNX2_RPM_DEBUG8_WAIT_4_SOFBNX2_RPM_DEBUG8_WAIT_4_SOF (1L<<14) bnx2.h 　
27312
 BNX2_RPM_DEBUG8_ALL_DONEBNX2_RPM_DEBUG8_ALL_DONE (1L<<15) bnx2.h 　
27313
 BNX2_RPM_DEBUG8_THBUF_ADDRBNX2_RPM_DEBUG8_THBUF_ADDR (0x7fL<<16) bnx2.h 　
27314
 BNX2_RPM_DEBUG8_BYTE_CTRBNX2_RPM_DEBUG8_BYTE_CTR (0xffL<<24) bnx2.h 　
27315
 BNX2_RPM_DEBUG9BNX2_RPM_DEBUG9 0x000019a8 bnx2.h 　
27316
 BNX2_RPM_DEBUG9_OUTFIFO_COUNTBNX2_RPM_DEBUG9_OUTFIFO_COUNT (0x7L<<0) bnx2.h 　
27317
 BNX2_RPM_DEBUG9_RDE_ACPI_RDYBNX2_RPM_DEBUG9_RDE_ACPI_RDY (1L<<3) bnx2.h 　
27318
 BNX2_RPM_DEBUG9_VLD_RD_ENTRY_CTBNX2_RPM_DEBUG9_VLD_RD_ENTRY_CT (0x7L<<4) bnx2.h 　
27319
 BNX2_RPM_DEBUG9_OUTFIFO_OVERRUNBNX2_RPM_DEBUG9_OUTFIFO_OVERRUN (1L<<28) bnx2.h 　
27320
 BNX2_RPM_DEBUG9_INFIFO_OVERRUN_BNX2_RPM_DEBUG9_INFIFO_OVERRUN_ (1L<<29) bnx2.h 　
27321
 BNX2_RPM_DEBUG9_ACPI_MATCH_INTBNX2_RPM_DEBUG9_ACPI_MATCH_INT (1L<<30) bnx2.h 　
27322
 BNX2_RPM_DEBUG9_ACPI_ENABLE_SYNBNX2_RPM_DEBUG9_ACPI_ENABLE_SYN (1L<<31) bnx2.h 　
27323
 BNX2_RPM_ACPI_DBG_BUF_W00BNX2_RPM_ACPI_DBG_BUF_W00 0x000019c0 bnx2.h 　
27324
 BNX2_RPM_ACPI_DBG_BUF_W01BNX2_RPM_ACPI_DBG_BUF_W01 0x000019c4 bnx2.h 　
27325
 BNX2_RPM_ACPI_DBG_BUF_W02BNX2_RPM_ACPI_DBG_BUF_W02 0x000019c8 bnx2.h 　
27326
 BNX2_RPM_ACPI_DBG_BUF_W03BNX2_RPM_ACPI_DBG_BUF_W03 0x000019cc bnx2.h 　
27327
 BNX2_RPM_ACPI_DBG_BUF_W10BNX2_RPM_ACPI_DBG_BUF_W10 0x000019d0 bnx2.h 　
27328
 BNX2_RPM_ACPI_DBG_BUF_W11BNX2_RPM_ACPI_DBG_BUF_W11 0x000019d4 bnx2.h 　
27329
 BNX2_RPM_ACPI_DBG_BUF_W12BNX2_RPM_ACPI_DBG_BUF_W12 0x000019d8 bnx2.h 　
27330
 BNX2_RPM_ACPI_DBG_BUF_W13BNX2_RPM_ACPI_DBG_BUF_W13 0x000019dc bnx2.h 　
27331
 BNX2_RPM_ACPI_DBG_BUF_W20BNX2_RPM_ACPI_DBG_BUF_W20 0x000019e0 bnx2.h 　
27332
 BNX2_RPM_ACPI_DBG_BUF_W21BNX2_RPM_ACPI_DBG_BUF_W21 0x000019e4 bnx2.h 　
27333
 BNX2_RPM_ACPI_DBG_BUF_W22BNX2_RPM_ACPI_DBG_BUF_W22 0x000019e8 bnx2.h 　
27334
 BNX2_RPM_ACPI_DBG_BUF_W23BNX2_RPM_ACPI_DBG_BUF_W23 0x000019ec bnx2.h 　
27335
 BNX2_RPM_ACPI_DBG_BUF_W30BNX2_RPM_ACPI_DBG_BUF_W30 0x000019f0 bnx2.h 　
27336
 BNX2_RPM_ACPI_DBG_BUF_W31BNX2_RPM_ACPI_DBG_BUF_W31 0x000019f4 bnx2.h 　
27337
 BNX2_RPM_ACPI_DBG_BUF_W32BNX2_RPM_ACPI_DBG_BUF_W32 0x000019f8 bnx2.h 　
27338
 BNX2_RPM_ACPI_DBG_BUF_W33BNX2_RPM_ACPI_DBG_BUF_W33 0x000019fc bnx2.h 　
27339
 BNX2_RBUF_COMMANDBNX2_RBUF_COMMAND 0x00200000 bnx2.h 　
27340
 BNX2_RBUF_COMMAND_ENABLEDBNX2_RBUF_COMMAND_ENABLED (1L<<0) bnx2.h 　
27341
 BNX2_RBUF_COMMAND_FREE_INITBNX2_RBUF_COMMAND_FREE_INIT (1L<<1) bnx2.h 　
27342
 BNX2_RBUF_COMMAND_RAM_INITBNX2_RBUF_COMMAND_RAM_INIT (1L<<2) bnx2.h 　
27343
 BNX2_RBUF_COMMAND_OVER_FREEBNX2_RBUF_COMMAND_OVER_FREE (1L<<4) bnx2.h 　
27344
 BNX2_RBUF_COMMAND_ALLOC_REQBNX2_RBUF_COMMAND_ALLOC_REQ (1L<<5) bnx2.h 　
27345
 BNX2_RBUF_STATUS1BNX2_RBUF_STATUS1 0x00200004 bnx2.h 　
27346
 BNX2_RBUF_STATUS1_FREE_COUNTBNX2_RBUF_STATUS1_FREE_COUNT (0x3ffL<<0) bnx2.h 　
27347
 BNX2_RBUF_STATUS2BNX2_RBUF_STATUS2 0x00200008 bnx2.h 　
27348
 BNX2_RBUF_STATUS2_FREE_TAILBNX2_RBUF_STATUS2_FREE_TAIL (0x3ffL<<0) bnx2.h 　
27349
 BNX2_RBUF_STATUS2_FREE_HEADBNX2_RBUF_STATUS2_FREE_HEAD (0x3ffL<<16) bnx2.h 　
27350
 BNX2_RBUF_CONFIGBNX2_RBUF_CONFIG 0x0020000c bnx2.h 　
27351
 BNX2_RBUF_CONFIG_XOFF_TRIPBNX2_RBUF_CONFIG_XOFF_TRIP (0x3ffL<<0) bnx2.h 　
27352
 BNX2_RBUF_CONFIG_XON_TRIPBNX2_RBUF_CONFIG_XON_TRIP (0x3ffL<<16) bnx2.h 　
27353
 BNX2_RBUF_FW_BUF_ALLOCBNX2_RBUF_FW_BUF_ALLOC 0x00200010 bnx2.h 　
27354
 BNX2_RBUF_FW_BUF_ALLOC_VALUEBNX2_RBUF_FW_BUF_ALLOC_VALUE (0x1ffL<<7) bnx2.h 　
27355
 BNX2_RBUF_FW_BUF_FREEBNX2_RBUF_FW_BUF_FREE 0x00200014 bnx2.h 　
27356
 BNX2_RBUF_FW_BUF_FREE_COUNTBNX2_RBUF_FW_BUF_FREE_COUNT (0x7fL<<0) bnx2.h 　
27357
 BNX2_RBUF_FW_BUF_FREE_TAILBNX2_RBUF_FW_BUF_FREE_TAIL (0x1ffL<<7) bnx2.h 　
27358
 BNX2_RBUF_FW_BUF_FREE_HEADBNX2_RBUF_FW_BUF_FREE_HEAD (0x1ffL<<16) bnx2.h 　
27359
 BNX2_RBUF_FW_BUF_SELBNX2_RBUF_FW_BUF_SEL 0x00200018 bnx2.h 　
27360
 BNX2_RBUF_FW_BUF_SEL_COUNTBNX2_RBUF_FW_BUF_SEL_COUNT (0x7fL<<0) bnx2.h 　
27361
 BNX2_RBUF_FW_BUF_SEL_TAILBNX2_RBUF_FW_BUF_SEL_TAIL (0x1ffL<<7) bnx2.h 　
27362
 BNX2_RBUF_FW_BUF_SEL_HEADBNX2_RBUF_FW_BUF_SEL_HEAD (0x1ffL<<16) bnx2.h 　
27363
 BNX2_RBUF_CONFIG2BNX2_RBUF_CONFIG2 0x0020001c bnx2.h 　
27364
 BNX2_RBUF_CONFIG2_MAC_DROP_TRIPBNX2_RBUF_CONFIG2_MAC_DROP_TRIP (0x3ffL<<0) bnx2.h 　
27365
 BNX2_RBUF_CONFIG2_MAC_KEEP_TRIPBNX2_RBUF_CONFIG2_MAC_KEEP_TRIP (0x3ffL<<16) bnx2.h 　
27366
 BNX2_RBUF_CONFIG3BNX2_RBUF_CONFIG3 0x00200020 bnx2.h 　
27367
 BNX2_RBUF_CONFIG3_CU_DROP_TRIPBNX2_RBUF_CONFIG3_CU_DROP_TRIP (0x3ffL<<0) bnx2.h 　
27368
 BNX2_RBUF_CONFIG3_CU_KEEP_TRIPBNX2_RBUF_CONFIG3_CU_KEEP_TRIP (0x3ffL<<16) bnx2.h 　
27369
 BNX2_RBUF_PKT_DATABNX2_RBUF_PKT_DATA 0x00208000 bnx2.h 　
27370
 BNX2_RBUF_CLIST_DATABNX2_RBUF_CLIST_DATA 0x00210000 bnx2.h 　
27371
 BNX2_RBUF_BUF_DATABNX2_RBUF_BUF_DATA 0x00220000 bnx2.h 　
27372
 BNX2_RV2P_COMMANDBNX2_RV2P_COMMAND 0x00002800 bnx2.h 　
27373
 BNX2_RV2P_COMMAND_ENABLEDBNX2_RV2P_COMMAND_ENABLED (1L<<0) bnx2.h 　
27374
 BNX2_RV2P_COMMAND_PROC1_INTRPTBNX2_RV2P_COMMAND_PROC1_INTRPT (1L<<1) bnx2.h 　
27375
 BNX2_RV2P_COMMAND_PROC2_INTRPTBNX2_RV2P_COMMAND_PROC2_INTRPT (1L<<2) bnx2.h 　
27376
 BNX2_RV2P_COMMAND_ABORT0BNX2_RV2P_COMMAND_ABORT0 (1L<<4) bnx2.h 　
27377
 BNX2_RV2P_COMMAND_ABORT1BNX2_RV2P_COMMAND_ABORT1 (1L<<5) bnx2.h 　
27378
 BNX2_RV2P_COMMAND_ABORT2BNX2_RV2P_COMMAND_ABORT2 (1L<<6) bnx2.h 　
27379
 BNX2_RV2P_COMMAND_ABORT3BNX2_RV2P_COMMAND_ABORT3 (1L<<7) bnx2.h 　
27380
 BNX2_RV2P_COMMAND_ABORT4BNX2_RV2P_COMMAND_ABORT4 (1L<<8) bnx2.h 　
27381
 BNX2_RV2P_COMMAND_ABORT5BNX2_RV2P_COMMAND_ABORT5 (1L<<9) bnx2.h 　
27382
 BNX2_RV2P_COMMAND_PROC1_RESETBNX2_RV2P_COMMAND_PROC1_RESET (1L<<16) bnx2.h 　
27383
 BNX2_RV2P_COMMAND_PROC2_RESETBNX2_RV2P_COMMAND_PROC2_RESET (1L<<17) bnx2.h 　
27384
 BNX2_RV2P_COMMAND_CTXIF_RESETBNX2_RV2P_COMMAND_CTXIF_RESET (1L<<18) bnx2.h 　
27385
 BNX2_RV2P_STATUSBNX2_RV2P_STATUS 0x00002804 bnx2.h 　
27386
 BNX2_RV2P_STATUS_ALWAYS_0BNX2_RV2P_STATUS_ALWAYS_0 (1L<<0) bnx2.h 　
27387
 BNX2_RV2P_STATUS_RV2P_GEN_STAT0BNX2_RV2P_STATUS_RV2P_GEN_STAT0 (1L<<8) bnx2.h 　
27388
 BNX2_RV2P_STATUS_RV2P_GEN_STAT1BNX2_RV2P_STATUS_RV2P_GEN_STAT1 (1L<<9) bnx2.h 　
27389
 BNX2_RV2P_STATUS_RV2P_GEN_STAT2BNX2_RV2P_STATUS_RV2P_GEN_STAT2 (1L<<10) bnx2.h 　
27390
 BNX2_RV2P_STATUS_RV2P_GEN_STAT3BNX2_RV2P_STATUS_RV2P_GEN_STAT3 (1L<<11) bnx2.h 　
27391
 BNX2_RV2P_STATUS_RV2P_GEN_STAT4BNX2_RV2P_STATUS_RV2P_GEN_STAT4 (1L<<12) bnx2.h 　
27392
 BNX2_RV2P_STATUS_RV2P_GEN_STAT5BNX2_RV2P_STATUS_RV2P_GEN_STAT5 (1L<<13) bnx2.h 　
27393
 BNX2_RV2P_CONFIGBNX2_RV2P_CONFIG 0x00002808 bnx2.h 　
27394
 BNX2_RV2P_CONFIG_STALL_PROC1BNX2_RV2P_CONFIG_STALL_PROC1 (1L<<0) bnx2.h 　
27395
 BNX2_RV2P_CONFIG_STALL_PROC2BNX2_RV2P_CONFIG_STALL_PROC2 (1L<<1) bnx2.h 　
27396
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<8) bnx2.h 　
27397
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<9) bnx2.h 　
27398
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<10) bnx2.h 　
27399
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<11) bnx2.h 　
27400
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<12) bnx2.h 　
27401
 BNX2_RV2P_CONFIG_PROC1_STALL_ONBNX2_RV2P_CONFIG_PROC1_STALL_ON (1L<<13) bnx2.h 　
27402
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<16) bnx2.h 　
27403
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<17) bnx2.h 　
27404
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<18) bnx2.h 　
27405
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<19) bnx2.h 　
27406
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<20) bnx2.h 　
27407
 BNX2_RV2P_CONFIG_PROC2_STALL_ONBNX2_RV2P_CONFIG_PROC2_STALL_ON (1L<<21) bnx2.h 　
27408
 BNX2_RV2P_CONFIG_PAGE_SIZEBNX2_RV2P_CONFIG_PAGE_SIZE (0xfL<<24) bnx2.h 　
27409
 BNX2_RV2P_CONFIG_PAGE_SIZE_256BNX2_RV2P_CONFIG_PAGE_SIZE_256 (0L<<24) bnx2.h 　
27410
 BNX2_RV2P_CONFIG_PAGE_SIZE_512BNX2_RV2P_CONFIG_PAGE_SIZE_512 (1L<<24) bnx2.h 　
27411
 BNX2_RV2P_CONFIG_PAGE_SIZE_1KBNX2_RV2P_CONFIG_PAGE_SIZE_1K (2L<<24) bnx2.h 　
27412
 BNX2_RV2P_CONFIG_PAGE_SIZE_2KBNX2_RV2P_CONFIG_PAGE_SIZE_2K (3L<<24) bnx2.h 　
27413
 BNX2_RV2P_CONFIG_PAGE_SIZE_4KBNX2_RV2P_CONFIG_PAGE_SIZE_4K (4L<<24) bnx2.h 　
27414
 BNX2_RV2P_CONFIG_PAGE_SIZE_8KBNX2_RV2P_CONFIG_PAGE_SIZE_8K (5L<<24) bnx2.h 　
27415
 BNX2_RV2P_CONFIG_PAGE_SIZE_16KBNX2_RV2P_CONFIG_PAGE_SIZE_16K (6L<<24) bnx2.h 　
27416
 BNX2_RV2P_CONFIG_PAGE_SIZE_32KBNX2_RV2P_CONFIG_PAGE_SIZE_32K (7L<<24) bnx2.h 　
27417
 BNX2_RV2P_CONFIG_PAGE_SIZE_64KBNX2_RV2P_CONFIG_PAGE_SIZE_64K (8L<<24) bnx2.h 　
27418
 BNX2_RV2P_CONFIG_PAGE_SIZE_128KBNX2_RV2P_CONFIG_PAGE_SIZE_128K (9L<<24) bnx2.h 　
27419
 BNX2_RV2P_CONFIG_PAGE_SIZE_256KBNX2_RV2P_CONFIG_PAGE_SIZE_256K (10L<<24) bnx2.h 　
27420
 BNX2_RV2P_CONFIG_PAGE_SIZE_512KBNX2_RV2P_CONFIG_PAGE_SIZE_512K (11L<<24) bnx2.h 　
27421
 BNX2_RV2P_CONFIG_PAGE_SIZE_1MBNX2_RV2P_CONFIG_PAGE_SIZE_1M (12L<<24) bnx2.h 　
27422
 BNX2_RV2P_GEN_BFR_ADDR_0BNX2_RV2P_GEN_BFR_ADDR_0 0x00002810 bnx2.h 　
27423
 BNX2_RV2P_GEN_BFR_ADDR_0_VALUEBNX2_RV2P_GEN_BFR_ADDR_0_VALUE (0xffffL<<16) bnx2.h 　
27424
 BNX2_RV2P_GEN_BFR_ADDR_1BNX2_RV2P_GEN_BFR_ADDR_1 0x00002814 bnx2.h 　
27425
 BNX2_RV2P_GEN_BFR_ADDR_1_VALUEBNX2_RV2P_GEN_BFR_ADDR_1_VALUE (0xffffL<<16) bnx2.h 　
27426
 BNX2_RV2P_GEN_BFR_ADDR_2BNX2_RV2P_GEN_BFR_ADDR_2 0x00002818 bnx2.h 　
27427
 BNX2_RV2P_GEN_BFR_ADDR_2_VALUEBNX2_RV2P_GEN_BFR_ADDR_2_VALUE (0xffffL<<16) bnx2.h 　
27428
 BNX2_RV2P_GEN_BFR_ADDR_3BNX2_RV2P_GEN_BFR_ADDR_3 0x0000281c bnx2.h 　
27429
 BNX2_RV2P_GEN_BFR_ADDR_3_VALUEBNX2_RV2P_GEN_BFR_ADDR_3_VALUE (0xffffL<<16) bnx2.h 　
27430
 BNX2_RV2P_INSTR_HIGHBNX2_RV2P_INSTR_HIGH 0x00002830 bnx2.h 　
27431
 BNX2_RV2P_INSTR_HIGH_HIGHBNX2_RV2P_INSTR_HIGH_HIGH (0x1fL<<0) bnx2.h 　
27432
 BNX2_RV2P_INSTR_LOWBNX2_RV2P_INSTR_LOW 0x00002834 bnx2.h 　
27433
 BNX2_RV2P_PROC1_ADDR_CMDBNX2_RV2P_PROC1_ADDR_CMD 0x00002838 bnx2.h 　
27434
 BNX2_RV2P_PROC1_ADDR_CMD_ADDBNX2_RV2P_PROC1_ADDR_CMD_ADD (0x3ffL<<0) bnx2.h 　
27435
 BNX2_RV2P_PROC1_ADDR_CMD_RDWRBNX2_RV2P_PROC1_ADDR_CMD_RDWR (1L<<31) bnx2.h 　
27436
 BNX2_RV2P_PROC2_ADDR_CMDBNX2_RV2P_PROC2_ADDR_CMD 0x0000283c bnx2.h 　
27437
 BNX2_RV2P_PROC2_ADDR_CMD_ADDBNX2_RV2P_PROC2_ADDR_CMD_ADD (0x3ffL<<0) bnx2.h 　
27438
 BNX2_RV2P_PROC2_ADDR_CMD_RDWRBNX2_RV2P_PROC2_ADDR_CMD_RDWR (1L<<31) bnx2.h 　
27439
 BNX2_RV2P_PROC1_GRC_DEBUGBNX2_RV2P_PROC1_GRC_DEBUG 0x00002840 bnx2.h 　
27440
 BNX2_RV2P_PROC2_GRC_DEBUGBNX2_RV2P_PROC2_GRC_DEBUG 0x00002844 bnx2.h 　
27441
 BNX2_RV2P_GRC_PROC_DEBUGBNX2_RV2P_GRC_PROC_DEBUG 0x00002848 bnx2.h 　
27442
 BNX2_RV2P_DEBUG_VECT_PEEKBNX2_RV2P_DEBUG_VECT_PEEK 0x0000284c bnx2.h 　
27443
 BNX2_RV2P_DEBUG_VECT_PEEK_1_VALBNX2_RV2P_DEBUG_VECT_PEEK_1_VAL (0x7ffL<<0) bnx2.h 　
27444
 BNX2_RV2P_DEBUG_VECT_PEEK_1_PEEBNX2_RV2P_DEBUG_VECT_PEEK_1_PEE (1L<<11) bnx2.h 　
27445
 BNX2_RV2P_DEBUG_VECT_PEEK_1_SELBNX2_RV2P_DEBUG_VECT_PEEK_1_SEL (0xfL<<12) bnx2.h 　
27446
 BNX2_RV2P_DEBUG_VECT_PEEK_2_VALBNX2_RV2P_DEBUG_VECT_PEEK_2_VAL (0x7ffL<<16) bnx2.h 　
27447
 BNX2_RV2P_DEBUG_VECT_PEEK_2_PEEBNX2_RV2P_DEBUG_VECT_PEEK_2_PEE (1L<<27) bnx2.h 　
27448
 BNX2_RV2P_DEBUG_VECT_PEEK_2_SELBNX2_RV2P_DEBUG_VECT_PEEK_2_SEL (0xfL<<28) bnx2.h 　
27449
 BNX2_RV2P_PFTQ_DATABNX2_RV2P_PFTQ_DATA 0x00002b40 bnx2.h 　
27450
 BNX2_RV2P_PFTQ_CMDBNX2_RV2P_PFTQ_CMD 0x00002b78 bnx2.h 　
27451
 BNX2_RV2P_PFTQ_CMD_OFFSETBNX2_RV2P_PFTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
27452
 BNX2_RV2P_PFTQ_CMD_WR_TOPBNX2_RV2P_PFTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
27453
 BNX2_RV2P_PFTQ_CMD_WR_TOP_0BNX2_RV2P_PFTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
27454
 BNX2_RV2P_PFTQ_CMD_WR_TOP_1BNX2_RV2P_PFTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
27455
 BNX2_RV2P_PFTQ_CMD_SFT_RESETBNX2_RV2P_PFTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
27456
 BNX2_RV2P_PFTQ_CMD_RD_DATABNX2_RV2P_PFTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
27457
 BNX2_RV2P_PFTQ_CMD_ADD_INTERVENBNX2_RV2P_PFTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
27458
 BNX2_RV2P_PFTQ_CMD_ADD_DATABNX2_RV2P_PFTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
27459
 BNX2_RV2P_PFTQ_CMD_INTERVENE_CLBNX2_RV2P_PFTQ_CMD_INTERVENE_CL (1L<<29) bnx2.h 　
27460
 BNX2_RV2P_PFTQ_CMD_POPBNX2_RV2P_PFTQ_CMD_POP (1L<<30) bnx2.h 　
27461
 BNX2_RV2P_PFTQ_CMD_BUSYBNX2_RV2P_PFTQ_CMD_BUSY (1L<<31) bnx2.h 　
27462
 BNX2_RV2P_PFTQ_CTLBNX2_RV2P_PFTQ_CTL 0x00002b7c bnx2.h 　
27463
 BNX2_RV2P_PFTQ_CTL_INTERVENEBNX2_RV2P_PFTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
27464
 BNX2_RV2P_PFTQ_CTL_OVERFLOWBNX2_RV2P_PFTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
27465
 BNX2_RV2P_PFTQ_CTL_FORCE_INTERVBNX2_RV2P_PFTQ_CTL_FORCE_INTERV (1L<<2) bnx2.h 　
27466
 BNX2_RV2P_PFTQ_CTL_MAX_DEPTHBNX2_RV2P_PFTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
27467
 BNX2_RV2P_PFTQ_CTL_CUR_DEPTHBNX2_RV2P_PFTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
27468
 BNX2_RV2P_TFTQ_DATABNX2_RV2P_TFTQ_DATA 0x00002b80 bnx2.h 　
27469
 BNX2_RV2P_TFTQ_CMDBNX2_RV2P_TFTQ_CMD 0x00002bb8 bnx2.h 　
27470
 BNX2_RV2P_TFTQ_CMD_OFFSETBNX2_RV2P_TFTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
27471
 BNX2_RV2P_TFTQ_CMD_WR_TOPBNX2_RV2P_TFTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
27472
 BNX2_RV2P_TFTQ_CMD_WR_TOP_0BNX2_RV2P_TFTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
27473
 BNX2_RV2P_TFTQ_CMD_WR_TOP_1BNX2_RV2P_TFTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
27474
 BNX2_RV2P_TFTQ_CMD_SFT_RESETBNX2_RV2P_TFTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
27475
 BNX2_RV2P_TFTQ_CMD_RD_DATABNX2_RV2P_TFTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
27476
 BNX2_RV2P_TFTQ_CMD_ADD_INTERVENBNX2_RV2P_TFTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
27477
 BNX2_RV2P_TFTQ_CMD_ADD_DATABNX2_RV2P_TFTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
27478
 BNX2_RV2P_TFTQ_CMD_INTERVENE_CLBNX2_RV2P_TFTQ_CMD_INTERVENE_CL (1L<<29) bnx2.h 　
27479
 BNX2_RV2P_TFTQ_CMD_POPBNX2_RV2P_TFTQ_CMD_POP (1L<<30) bnx2.h 　
27480
 BNX2_RV2P_TFTQ_CMD_BUSYBNX2_RV2P_TFTQ_CMD_BUSY (1L<<31) bnx2.h 　
27481
 BNX2_RV2P_TFTQ_CTLBNX2_RV2P_TFTQ_CTL 0x00002bbc bnx2.h 　
27482
 BNX2_RV2P_TFTQ_CTL_INTERVENEBNX2_RV2P_TFTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
27483
 BNX2_RV2P_TFTQ_CTL_OVERFLOWBNX2_RV2P_TFTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
27484
 BNX2_RV2P_TFTQ_CTL_FORCE_INTERVBNX2_RV2P_TFTQ_CTL_FORCE_INTERV (1L<<2) bnx2.h 　
27485
 BNX2_RV2P_TFTQ_CTL_MAX_DEPTHBNX2_RV2P_TFTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
27486
 BNX2_RV2P_TFTQ_CTL_CUR_DEPTHBNX2_RV2P_TFTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
27487
 BNX2_RV2P_MFTQ_DATABNX2_RV2P_MFTQ_DATA 0x00002bc0 bnx2.h 　
27488
 BNX2_RV2P_MFTQ_CMDBNX2_RV2P_MFTQ_CMD 0x00002bf8 bnx2.h 　
27489
 BNX2_RV2P_MFTQ_CMD_OFFSETBNX2_RV2P_MFTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
27490
 BNX2_RV2P_MFTQ_CMD_WR_TOPBNX2_RV2P_MFTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
27491
 BNX2_RV2P_MFTQ_CMD_WR_TOP_0BNX2_RV2P_MFTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
27492
 BNX2_RV2P_MFTQ_CMD_WR_TOP_1BNX2_RV2P_MFTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
27493
 BNX2_RV2P_MFTQ_CMD_SFT_RESETBNX2_RV2P_MFTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
27494
 BNX2_RV2P_MFTQ_CMD_RD_DATABNX2_RV2P_MFTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
27495
 BNX2_RV2P_MFTQ_CMD_ADD_INTERVENBNX2_RV2P_MFTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
27496
 BNX2_RV2P_MFTQ_CMD_ADD_DATABNX2_RV2P_MFTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
27497
 BNX2_RV2P_MFTQ_CMD_INTERVENE_CLBNX2_RV2P_MFTQ_CMD_INTERVENE_CL (1L<<29) bnx2.h 　
27498
 BNX2_RV2P_MFTQ_CMD_POPBNX2_RV2P_MFTQ_CMD_POP (1L<<30) bnx2.h 　
27499
 BNX2_RV2P_MFTQ_CMD_BUSYBNX2_RV2P_MFTQ_CMD_BUSY (1L<<31) bnx2.h 　
27500
 BNX2_RV2P_MFTQ_CTLBNX2_RV2P_MFTQ_CTL 0x00002bfc bnx2.h 　
27501
 BNX2_RV2P_MFTQ_CTL_INTERVENEBNX2_RV2P_MFTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
27502
 BNX2_RV2P_MFTQ_CTL_OVERFLOWBNX2_RV2P_MFTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
27503
 BNX2_RV2P_MFTQ_CTL_FORCE_INTERVBNX2_RV2P_MFTQ_CTL_FORCE_INTERV (1L<<2) bnx2.h 　
27504
 BNX2_RV2P_MFTQ_CTL_MAX_DEPTHBNX2_RV2P_MFTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
27505
 BNX2_RV2P_MFTQ_CTL_CUR_DEPTHBNX2_RV2P_MFTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
27506
 BNX2_MQ_COMMANDBNX2_MQ_COMMAND 0x00003c00 bnx2.h 　
27507
 BNX2_MQ_COMMAND_ENABLEDBNX2_MQ_COMMAND_ENABLED (1L<<0) bnx2.h 　
27508
 BNX2_MQ_COMMAND_OVERFLOWBNX2_MQ_COMMAND_OVERFLOW (1L<<4) bnx2.h 　
27509
 BNX2_MQ_COMMAND_WR_ERRORBNX2_MQ_COMMAND_WR_ERROR (1L<<5) bnx2.h 　
27510
 BNX2_MQ_COMMAND_RD_ERRORBNX2_MQ_COMMAND_RD_ERROR (1L<<6) bnx2.h 　
27511
 BNX2_MQ_STATUSBNX2_MQ_STATUS 0x00003c04 bnx2.h 　
27512
 BNX2_MQ_STATUS_CTX_ACCESS_STATBNX2_MQ_STATUS_CTX_ACCESS_STAT (1L<<16) bnx2.h 　
27513
 BNX2_MQ_STATUS_CTX_ACCESS64_STABNX2_MQ_STATUS_CTX_ACCESS64_STA (1L<<17) bnx2.h 　
27514
 BNX2_MQ_STATUS_PCI_STALL_STATBNX2_MQ_STATUS_PCI_STALL_STAT (1L<<18) bnx2.h 　
27515
 BNX2_MQ_CONFIGBNX2_MQ_CONFIG 0x00003c08 bnx2.h 　
27516
 BNX2_MQ_CONFIG_TX_HIGH_PRIBNX2_MQ_CONFIG_TX_HIGH_PRI (1L<<0) bnx2.h 　
27517
 BNX2_MQ_CONFIG_HALT_DISBNX2_MQ_CONFIG_HALT_DIS (1L<<1) bnx2.h 　
27518
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (0x7L<<4) bnx2.h 　
27519
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (0L<<4) bnx2.h 　
27520
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (1L<<4) bnx2.h 　
27521
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (2L<<4) bnx2.h 　
27522
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (3L<<4) bnx2.h 　
27523
 BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZEBNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE (4L<<4) bnx2.h 　
27524
 BNX2_MQ_CONFIG_MAX_DEPTHBNX2_MQ_CONFIG_MAX_DEPTH (0x7fL<<8) bnx2.h 　
27525
 BNX2_MQ_CONFIG_CUR_DEPTHBNX2_MQ_CONFIG_CUR_DEPTH (0x7fL<<20) bnx2.h 　
27526
 BNX2_MQ_ENQUEUE1BNX2_MQ_ENQUEUE1 0x00003c0c bnx2.h 　
27527
 BNX2_MQ_ENQUEUE1_OFFSETBNX2_MQ_ENQUEUE1_OFFSET (0x3fL<<2) bnx2.h 　
27528
 BNX2_MQ_ENQUEUE1_CIDBNX2_MQ_ENQUEUE1_CID (0x3fffL<<8) bnx2.h 　
27529
 BNX2_MQ_ENQUEUE1_BYTE_MASKBNX2_MQ_ENQUEUE1_BYTE_MASK (0xfL<<24) bnx2.h 　
27530
 BNX2_MQ_ENQUEUE1_KNL_MODEBNX2_MQ_ENQUEUE1_KNL_MODE (1L<<28) bnx2.h 　
27531
 BNX2_MQ_ENQUEUE2BNX2_MQ_ENQUEUE2 0x00003c10 bnx2.h 　
27532
 BNX2_MQ_BAD_WR_ADDRBNX2_MQ_BAD_WR_ADDR 0x00003c14 bnx2.h 　
27533
 BNX2_MQ_BAD_RD_ADDRBNX2_MQ_BAD_RD_ADDR 0x00003c18 bnx2.h 　
27534
 BNX2_MQ_KNL_BYP_WIND_STARTBNX2_MQ_KNL_BYP_WIND_START 0x00003c1c bnx2.h 　
27535
 BNX2_MQ_KNL_BYP_WIND_START_VALUBNX2_MQ_KNL_BYP_WIND_START_VALU (0xfffffL<<12) bnx2.h 　
27536
 BNX2_MQ_KNL_WIND_ENDBNX2_MQ_KNL_WIND_END 0x00003c20 bnx2.h 　
27537
 BNX2_MQ_KNL_WIND_END_VALUEBNX2_MQ_KNL_WIND_END_VALUE (0xffffffL<<8) bnx2.h 　
27538
 BNX2_MQ_KNL_WRITE_MASK1BNX2_MQ_KNL_WRITE_MASK1 0x00003c24 bnx2.h 　
27539
 BNX2_MQ_KNL_TX_MASK1BNX2_MQ_KNL_TX_MASK1 0x00003c28 bnx2.h 　
27540
 BNX2_MQ_KNL_CMD_MASK1BNX2_MQ_KNL_CMD_MASK1 0x00003c2c bnx2.h 　
27541
 BNX2_MQ_KNL_COND_ENQUEUE_MASK1BNX2_MQ_KNL_COND_ENQUEUE_MASK1 0x00003c30 bnx2.h 　
27542
 BNX2_MQ_KNL_RX_V2P_MASK1BNX2_MQ_KNL_RX_V2P_MASK1 0x00003c34 bnx2.h 　
27543
 BNX2_MQ_KNL_WRITE_MASK2BNX2_MQ_KNL_WRITE_MASK2 0x00003c38 bnx2.h 　
27544
 BNX2_MQ_KNL_TX_MASK2BNX2_MQ_KNL_TX_MASK2 0x00003c3c bnx2.h 　
27545
 BNX2_MQ_KNL_CMD_MASK2BNX2_MQ_KNL_CMD_MASK2 0x00003c40 bnx2.h 　
27546
 BNX2_MQ_KNL_COND_ENQUEUE_MASK2BNX2_MQ_KNL_COND_ENQUEUE_MASK2 0x00003c44 bnx2.h 　
27547
 BNX2_MQ_KNL_RX_V2P_MASK2BNX2_MQ_KNL_RX_V2P_MASK2 0x00003c48 bnx2.h 　
27548
 BNX2_MQ_KNL_BYP_WRITE_MASK1BNX2_MQ_KNL_BYP_WRITE_MASK1 0x00003c4c bnx2.h 　
27549
 BNX2_MQ_KNL_BYP_TX_MASK1BNX2_MQ_KNL_BYP_TX_MASK1 0x00003c50 bnx2.h 　
27550
 BNX2_MQ_KNL_BYP_CMD_MASK1BNX2_MQ_KNL_BYP_CMD_MASK1 0x00003c54 bnx2.h 　
27551
 BNX2_MQ_KNL_BYP_COND_ENQUEUE_MABNX2_MQ_KNL_BYP_COND_ENQUEUE_MA 0x00003c58 bnx2.h 　
27552
 BNX2_MQ_KNL_BYP_RX_V2P_MASK1BNX2_MQ_KNL_BYP_RX_V2P_MASK1 0x00003c5c bnx2.h 　
27553
 BNX2_MQ_KNL_BYP_WRITE_MASK2BNX2_MQ_KNL_BYP_WRITE_MASK2 0x00003c60 bnx2.h 　
27554
 BNX2_MQ_KNL_BYP_TX_MASK2BNX2_MQ_KNL_BYP_TX_MASK2 0x00003c64 bnx2.h 　
27555
 BNX2_MQ_KNL_BYP_CMD_MASK2BNX2_MQ_KNL_BYP_CMD_MASK2 0x00003c68 bnx2.h 　
27556
 BNX2_MQ_KNL_BYP_COND_ENQUEUE_MABNX2_MQ_KNL_BYP_COND_ENQUEUE_MA 0x00003c6c bnx2.h 　
27557
 BNX2_MQ_KNL_BYP_RX_V2P_MASK2BNX2_MQ_KNL_BYP_RX_V2P_MASK2 0x00003c70 bnx2.h 　
27558
 BNX2_MQ_MEM_WR_ADDRBNX2_MQ_MEM_WR_ADDR 0x00003c74 bnx2.h 　
27559
 BNX2_MQ_MEM_WR_ADDR_VALUEBNX2_MQ_MEM_WR_ADDR_VALUE (0x3fL<<0) bnx2.h 　
27560
 BNX2_MQ_MEM_WR_DATA0BNX2_MQ_MEM_WR_DATA0 0x00003c78 bnx2.h 　
27561
 BNX2_MQ_MEM_WR_DATA0_VALUEBNX2_MQ_MEM_WR_DATA0_VALUE (0xffffffffL<<0) bnx2.h 　
27562
 BNX2_MQ_MEM_WR_DATA1BNX2_MQ_MEM_WR_DATA1 0x00003c7c bnx2.h 　
27563
 BNX2_MQ_MEM_WR_DATA1_VALUEBNX2_MQ_MEM_WR_DATA1_VALUE (0xffffffffL<<0) bnx2.h 　
27564
 BNX2_MQ_MEM_WR_DATA2BNX2_MQ_MEM_WR_DATA2 0x00003c80 bnx2.h 　
27565
 BNX2_MQ_MEM_WR_DATA2_VALUEBNX2_MQ_MEM_WR_DATA2_VALUE (0x3fffffffL<<0) bnx2.h 　
27566
 BNX2_MQ_MEM_RD_ADDRBNX2_MQ_MEM_RD_ADDR 0x00003c84 bnx2.h 　
27567
 BNX2_MQ_MEM_RD_ADDR_VALUEBNX2_MQ_MEM_RD_ADDR_VALUE (0x3fL<<0) bnx2.h 　
27568
 BNX2_MQ_MEM_RD_DATA0BNX2_MQ_MEM_RD_DATA0 0x00003c88 bnx2.h 　
27569
 BNX2_MQ_MEM_RD_DATA0_VALUEBNX2_MQ_MEM_RD_DATA0_VALUE (0xffffffffL<<0) bnx2.h 　
27570
 BNX2_MQ_MEM_RD_DATA1BNX2_MQ_MEM_RD_DATA1 0x00003c8c bnx2.h 　
27571
 BNX2_MQ_MEM_RD_DATA1_VALUEBNX2_MQ_MEM_RD_DATA1_VALUE (0xffffffffL<<0) bnx2.h 　
27572
 BNX2_MQ_MEM_RD_DATA2BNX2_MQ_MEM_RD_DATA2 0x00003c90 bnx2.h 　
27573
 BNX2_MQ_MEM_RD_DATA2_VALUEBNX2_MQ_MEM_RD_DATA2_VALUE (0x3fffffffL<<0) bnx2.h 　
27574
 BNX2_TBDR_COMMANDBNX2_TBDR_COMMAND 0x00005000 bnx2.h 　
27575
 BNX2_TBDR_COMMAND_ENABLEBNX2_TBDR_COMMAND_ENABLE (1L<<0) bnx2.h 　
27576
 BNX2_TBDR_COMMAND_SOFT_RSTBNX2_TBDR_COMMAND_SOFT_RST (1L<<1) bnx2.h 　
27577
 BNX2_TBDR_COMMAND_MSTR_ABORTBNX2_TBDR_COMMAND_MSTR_ABORT (1L<<4) bnx2.h 　
27578
 BNX2_TBDR_STATUSBNX2_TBDR_STATUS 0x00005004 bnx2.h 　
27579
 BNX2_TBDR_STATUS_DMA_WAITBNX2_TBDR_STATUS_DMA_WAIT (1L<<0) bnx2.h 　
27580
 BNX2_TBDR_STATUS_FTQ_WAITBNX2_TBDR_STATUS_FTQ_WAIT (1L<<1) bnx2.h 　
27581
 BNX2_TBDR_STATUS_FIFO_OVERFLOWBNX2_TBDR_STATUS_FIFO_OVERFLOW (1L<<2) bnx2.h 　
27582
 BNX2_TBDR_STATUS_FIFO_UNDERFLOWBNX2_TBDR_STATUS_FIFO_UNDERFLOW (1L<<3) bnx2.h 　
27583
 BNX2_TBDR_STATUS_SEARCHMISS_ERRBNX2_TBDR_STATUS_SEARCHMISS_ERR (1L<<4) bnx2.h 　
27584
 BNX2_TBDR_STATUS_FTQ_ENTRY_CNTBNX2_TBDR_STATUS_FTQ_ENTRY_CNT (1L<<5) bnx2.h 　
27585
 BNX2_TBDR_STATUS_BURST_CNTBNX2_TBDR_STATUS_BURST_CNT (1L<<6) bnx2.h 　
27586
 BNX2_TBDR_CONFIGBNX2_TBDR_CONFIG 0x00005008 bnx2.h 　
27587
 BNX2_TBDR_CONFIG_MAX_BDSBNX2_TBDR_CONFIG_MAX_BDS (0xffL<<0) bnx2.h 　
27588
 BNX2_TBDR_CONFIG_SWAP_MODEBNX2_TBDR_CONFIG_SWAP_MODE (1L<<8) bnx2.h 　
27589
 BNX2_TBDR_CONFIG_PRIORITYBNX2_TBDR_CONFIG_PRIORITY (1L<<9) bnx2.h 　
27590
 BNX2_TBDR_CONFIG_CACHE_NEXT_PAGBNX2_TBDR_CONFIG_CACHE_NEXT_PAG (1L<<10) bnx2.h 　
27591
 BNX2_TBDR_CONFIG_PAGE_SIZEBNX2_TBDR_CONFIG_PAGE_SIZE (0xfL<<24) bnx2.h 　
27592
 BNX2_TBDR_CONFIG_PAGE_SIZE_256BNX2_TBDR_CONFIG_PAGE_SIZE_256 (0L<<24) bnx2.h 　
27593
 BNX2_TBDR_CONFIG_PAGE_SIZE_512BNX2_TBDR_CONFIG_PAGE_SIZE_512 (1L<<24) bnx2.h 　
27594
 BNX2_TBDR_CONFIG_PAGE_SIZE_1KBNX2_TBDR_CONFIG_PAGE_SIZE_1K (2L<<24) bnx2.h 　
27595
 BNX2_TBDR_CONFIG_PAGE_SIZE_2KBNX2_TBDR_CONFIG_PAGE_SIZE_2K (3L<<24) bnx2.h 　
27596
 BNX2_TBDR_CONFIG_PAGE_SIZE_4KBNX2_TBDR_CONFIG_PAGE_SIZE_4K (4L<<24) bnx2.h 　
27597
 BNX2_TBDR_CONFIG_PAGE_SIZE_8KBNX2_TBDR_CONFIG_PAGE_SIZE_8K (5L<<24) bnx2.h 　
27598
 BNX2_TBDR_CONFIG_PAGE_SIZE_16KBNX2_TBDR_CONFIG_PAGE_SIZE_16K (6L<<24) bnx2.h 　
27599
 BNX2_TBDR_CONFIG_PAGE_SIZE_32KBNX2_TBDR_CONFIG_PAGE_SIZE_32K (7L<<24) bnx2.h 　
27600
 BNX2_TBDR_CONFIG_PAGE_SIZE_64KBNX2_TBDR_CONFIG_PAGE_SIZE_64K (8L<<24) bnx2.h 　
27601
 BNX2_TBDR_CONFIG_PAGE_SIZE_128KBNX2_TBDR_CONFIG_PAGE_SIZE_128K (9L<<24) bnx2.h 　
27602
 BNX2_TBDR_CONFIG_PAGE_SIZE_256KBNX2_TBDR_CONFIG_PAGE_SIZE_256K (10L<<24) bnx2.h 　
27603
 BNX2_TBDR_CONFIG_PAGE_SIZE_512KBNX2_TBDR_CONFIG_PAGE_SIZE_512K (11L<<24) bnx2.h 　
27604
 BNX2_TBDR_CONFIG_PAGE_SIZE_1MBNX2_TBDR_CONFIG_PAGE_SIZE_1M (12L<<24) bnx2.h 　
27605
 BNX2_TBDR_DEBUG_VECT_PEEKBNX2_TBDR_DEBUG_VECT_PEEK 0x0000500c bnx2.h 　
27606
 BNX2_TBDR_DEBUG_VECT_PEEK_1_VALBNX2_TBDR_DEBUG_VECT_PEEK_1_VAL (0x7ffL<<0) bnx2.h 　
27607
 BNX2_TBDR_DEBUG_VECT_PEEK_1_PEEBNX2_TBDR_DEBUG_VECT_PEEK_1_PEE (1L<<11) bnx2.h 　
27608
 BNX2_TBDR_DEBUG_VECT_PEEK_1_SELBNX2_TBDR_DEBUG_VECT_PEEK_1_SEL (0xfL<<12) bnx2.h 　
27609
 BNX2_TBDR_DEBUG_VECT_PEEK_2_VALBNX2_TBDR_DEBUG_VECT_PEEK_2_VAL (0x7ffL<<16) bnx2.h 　
27610
 BNX2_TBDR_DEBUG_VECT_PEEK_2_PEEBNX2_TBDR_DEBUG_VECT_PEEK_2_PEE (1L<<27) bnx2.h 　
27611
 BNX2_TBDR_DEBUG_VECT_PEEK_2_SELBNX2_TBDR_DEBUG_VECT_PEEK_2_SEL (0xfL<<28) bnx2.h 　
27612
 BNX2_TBDR_FTQ_DATABNX2_TBDR_FTQ_DATA 0x000053c0 bnx2.h 　
27613
 BNX2_TBDR_FTQ_CMDBNX2_TBDR_FTQ_CMD 0x000053f8 bnx2.h 　
27614
 BNX2_TBDR_FTQ_CMD_OFFSETBNX2_TBDR_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
27615
 BNX2_TBDR_FTQ_CMD_WR_TOPBNX2_TBDR_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
27616
 BNX2_TBDR_FTQ_CMD_WR_TOP_0BNX2_TBDR_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
27617
 BNX2_TBDR_FTQ_CMD_WR_TOP_1BNX2_TBDR_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
27618
 BNX2_TBDR_FTQ_CMD_SFT_RESETBNX2_TBDR_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
27619
 BNX2_TBDR_FTQ_CMD_RD_DATABNX2_TBDR_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
27620
 BNX2_TBDR_FTQ_CMD_ADD_INTERVENBNX2_TBDR_FTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
27621
 BNX2_TBDR_FTQ_CMD_ADD_DATABNX2_TBDR_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
27622
 BNX2_TBDR_FTQ_CMD_INTERVENE_CLRBNX2_TBDR_FTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
27623
 BNX2_TBDR_FTQ_CMD_POPBNX2_TBDR_FTQ_CMD_POP (1L<<30) bnx2.h 　
27624
 BNX2_TBDR_FTQ_CMD_BUSYBNX2_TBDR_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
27625
 BNX2_TBDR_FTQ_CTLBNX2_TBDR_FTQ_CTL 0x000053fc bnx2.h 　
27626
 BNX2_TBDR_FTQ_CTL_INTERVENEBNX2_TBDR_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
27627
 BNX2_TBDR_FTQ_CTL_OVERFLOWBNX2_TBDR_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
27628
 BNX2_TBDR_FTQ_CTL_FORCE_INTERVEBNX2_TBDR_FTQ_CTL_FORCE_INTERVE (1L<<2) bnx2.h 　
27629
 BNX2_TBDR_FTQ_CTL_MAX_DEPTHBNX2_TBDR_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
27630
 BNX2_TBDR_FTQ_CTL_CUR_DEPTHBNX2_TBDR_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
27631
 BNX2_TDMA_COMMANDBNX2_TDMA_COMMAND 0x00005c00 bnx2.h 　
27632
 BNX2_TDMA_COMMAND_ENABLEDBNX2_TDMA_COMMAND_ENABLED (1L<<0) bnx2.h 　
27633
 BNX2_TDMA_COMMAND_MASTER_ABORTBNX2_TDMA_COMMAND_MASTER_ABORT (1L<<4) bnx2.h 　
27634
 BNX2_TDMA_COMMAND_BAD_L2_LENGTHBNX2_TDMA_COMMAND_BAD_L2_LENGTH (1L<<7) bnx2.h 　
27635
 BNX2_TDMA_STATUSBNX2_TDMA_STATUS 0x00005c04 bnx2.h 　
27636
 BNX2_TDMA_STATUS_DMA_WAITBNX2_TDMA_STATUS_DMA_WAIT (1L<<0) bnx2.h 　
27637
 BNX2_TDMA_STATUS_PAYLOAD_WAITBNX2_TDMA_STATUS_PAYLOAD_WAIT (1L<<1) bnx2.h 　
27638
 BNX2_TDMA_STATUS_PATCH_FTQ_WAITBNX2_TDMA_STATUS_PATCH_FTQ_WAIT (1L<<2) bnx2.h 　
27639
 BNX2_TDMA_STATUS_LOCK_WAITBNX2_TDMA_STATUS_LOCK_WAIT (1L<<3) bnx2.h 　
27640
 BNX2_TDMA_STATUS_FTQ_ENTRY_CNTBNX2_TDMA_STATUS_FTQ_ENTRY_CNT (1L<<16) bnx2.h 　
27641
 BNX2_TDMA_STATUS_BURST_CNTBNX2_TDMA_STATUS_BURST_CNT (1L<<17) bnx2.h 　
27642
 BNX2_TDMA_CONFIGBNX2_TDMA_CONFIG 0x00005c08 bnx2.h 　
27643
 BNX2_TDMA_CONFIG_ONE_DMABNX2_TDMA_CONFIG_ONE_DMA (1L<<0) bnx2.h 　
27644
 BNX2_TDMA_CONFIG_ONE_RECORDBNX2_TDMA_CONFIG_ONE_RECORD (1L<<1) bnx2.h 　
27645
 BNX2_TDMA_CONFIG_LIMIT_SZBNX2_TDMA_CONFIG_LIMIT_SZ (0xfL<<4) bnx2.h 　
27646
 BNX2_TDMA_CONFIG_LIMIT_SZ_64BNX2_TDMA_CONFIG_LIMIT_SZ_64 (0L<<4) bnx2.h 　
27647
 BNX2_TDMA_CONFIG_LIMIT_SZ_128BNX2_TDMA_CONFIG_LIMIT_SZ_128 (0x4L<<4) bnx2.h 　
27648
 BNX2_TDMA_CONFIG_LIMIT_SZ_256BNX2_TDMA_CONFIG_LIMIT_SZ_256 (0x6L<<4) bnx2.h 　
27649
 BNX2_TDMA_CONFIG_LIMIT_SZ_512BNX2_TDMA_CONFIG_LIMIT_SZ_512 (0x8L<<4) bnx2.h 　
27650
 BNX2_TDMA_CONFIG_LINE_SZBNX2_TDMA_CONFIG_LINE_SZ (0xfL<<8) bnx2.h 　
27651
 BNX2_TDMA_CONFIG_LINE_SZ_64BNX2_TDMA_CONFIG_LINE_SZ_64 (0L<<8) bnx2.h 　
27652
 BNX2_TDMA_CONFIG_LINE_SZ_128BNX2_TDMA_CONFIG_LINE_SZ_128 (4L<<8) bnx2.h 　
27653
 BNX2_TDMA_CONFIG_LINE_SZ_256BNX2_TDMA_CONFIG_LINE_SZ_256 (6L<<8) bnx2.h 　
27654
 BNX2_TDMA_CONFIG_LINE_SZ_512BNX2_TDMA_CONFIG_LINE_SZ_512 (8L<<8) bnx2.h 　
27655
 BNX2_TDMA_CONFIG_ALIGN_ENABNX2_TDMA_CONFIG_ALIGN_ENA (1L<<15) bnx2.h 　
27656
 BNX2_TDMA_CONFIG_CHK_L2_BDBNX2_TDMA_CONFIG_CHK_L2_BD (1L<<16) bnx2.h 　
27657
 BNX2_TDMA_CONFIG_FIFO_CMPBNX2_TDMA_CONFIG_FIFO_CMP (0xfL<<20) bnx2.h 　
27658
 BNX2_TDMA_PAYLOAD_PRODBNX2_TDMA_PAYLOAD_PROD 0x00005c0c bnx2.h 　
27659
 BNX2_TDMA_PAYLOAD_PROD_VALUEBNX2_TDMA_PAYLOAD_PROD_VALUE (0x1fffL<<3) bnx2.h 　
27660
 BNX2_TDMA_DBG_WATCHDOGBNX2_TDMA_DBG_WATCHDOG 0x00005c10 bnx2.h 　
27661
 BNX2_TDMA_DBG_TRIGGERBNX2_TDMA_DBG_TRIGGER 0x00005c14 bnx2.h 　
27662
 BNX2_TDMA_DMAD_FSMBNX2_TDMA_DMAD_FSM 0x00005c80 bnx2.h 　
27663
 BNX2_TDMA_DMAD_FSM_BD_INVLDBNX2_TDMA_DMAD_FSM_BD_INVLD (1L<<0) bnx2.h 　
27664
 BNX2_TDMA_DMAD_FSM_PUSHBNX2_TDMA_DMAD_FSM_PUSH (0xfL<<4) bnx2.h 　
27665
 BNX2_TDMA_DMAD_FSM_ARB_TBDCBNX2_TDMA_DMAD_FSM_ARB_TBDC (0x3L<<8) bnx2.h 　
27666
 BNX2_TDMA_DMAD_FSM_ARB_CTXBNX2_TDMA_DMAD_FSM_ARB_CTX (1L<<12) bnx2.h 　
27667
 BNX2_TDMA_DMAD_FSM_DR_INTFBNX2_TDMA_DMAD_FSM_DR_INTF (1L<<16) bnx2.h 　
27668
 BNX2_TDMA_DMAD_FSM_DMADBNX2_TDMA_DMAD_FSM_DMAD (0x7L<<20) bnx2.h 　
27669
 BNX2_TDMA_DMAD_FSM_BDBNX2_TDMA_DMAD_FSM_BD (0xfL<<24) bnx2.h 　
27670
 BNX2_TDMA_DMAD_STATUSBNX2_TDMA_DMAD_STATUS 0x00005c84 bnx2.h 　
27671
 BNX2_TDMA_DMAD_STATUS_RHOLD_PUSBNX2_TDMA_DMAD_STATUS_RHOLD_PUS (0x3L<<0) bnx2.h 　
27672
 BNX2_TDMA_DMAD_STATUS_RHOLD_DMABNX2_TDMA_DMAD_STATUS_RHOLD_DMA (0x3L<<4) bnx2.h 　
27673
 BNX2_TDMA_DMAD_STATUS_RHOLD_BD_BNX2_TDMA_DMAD_STATUS_RHOLD_BD_ (0x3L<<8) bnx2.h 　
27674
 BNX2_TDMA_DMAD_STATUS_IFTQ_ENUMBNX2_TDMA_DMAD_STATUS_IFTQ_ENUM (0xfL<<12) bnx2.h 　
27675
 BNX2_TDMA_DR_INTF_FSMBNX2_TDMA_DR_INTF_FSM 0x00005c88 bnx2.h 　
27676
 BNX2_TDMA_DR_INTF_FSM_L2_COMPBNX2_TDMA_DR_INTF_FSM_L2_COMP (0x3L<<0) bnx2.h 　
27677
 BNX2_TDMA_DR_INTF_FSM_TPATQBNX2_TDMA_DR_INTF_FSM_TPATQ (0x7L<<4) bnx2.h 　
27678
 BNX2_TDMA_DR_INTF_FSM_TPBUFBNX2_TDMA_DR_INTF_FSM_TPBUF (0x3L<<8) bnx2.h 　
27679
 BNX2_TDMA_DR_INTF_FSM_DR_BUFBNX2_TDMA_DR_INTF_FSM_DR_BUF (0x7L<<12) bnx2.h 　
27680
 BNX2_TDMA_DR_INTF_FSM_DMADBNX2_TDMA_DR_INTF_FSM_DMAD (0x7L<<16) bnx2.h 　
27681
 BNX2_TDMA_DR_INTF_STATUSBNX2_TDMA_DR_INTF_STATUS 0x00005c8c bnx2.h 　
27682
 BNX2_TDMA_DR_INTF_STATUS_HOLE_PBNX2_TDMA_DR_INTF_STATUS_HOLE_P (0x7L<<0) bnx2.h 　
27683
 BNX2_TDMA_DR_INTF_STATUS_DATA_ABNX2_TDMA_DR_INTF_STATUS_DATA_A (0x3L<<4) bnx2.h 　
27684
 BNX2_TDMA_DR_INTF_STATUS_SHIFT_BNX2_TDMA_DR_INTF_STATUS_SHIFT_ (0x7L<<8) bnx2.h 　
27685
 BNX2_TDMA_DR_INTF_STATUS_NXT_PNBNX2_TDMA_DR_INTF_STATUS_NXT_PN (0xfL<<12) bnx2.h 　
27686
 BNX2_TDMA_DR_INTF_STATUS_BYTE_CBNX2_TDMA_DR_INTF_STATUS_BYTE_C (0x7L<<16) bnx2.h 　
27687
 BNX2_TDMA_FTQ_DATABNX2_TDMA_FTQ_DATA 0x00005fc0 bnx2.h 　
27688
 BNX2_TDMA_FTQ_CMDBNX2_TDMA_FTQ_CMD 0x00005ff8 bnx2.h 　
27689
 BNX2_TDMA_FTQ_CMD_OFFSETBNX2_TDMA_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
27690
 BNX2_TDMA_FTQ_CMD_WR_TOPBNX2_TDMA_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
27691
 BNX2_TDMA_FTQ_CMD_WR_TOP_0BNX2_TDMA_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
27692
 BNX2_TDMA_FTQ_CMD_WR_TOP_1BNX2_TDMA_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
27693
 BNX2_TDMA_FTQ_CMD_SFT_RESETBNX2_TDMA_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
27694
 BNX2_TDMA_FTQ_CMD_RD_DATABNX2_TDMA_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
27695
 BNX2_TDMA_FTQ_CMD_ADD_INTERVENBNX2_TDMA_FTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
27696
 BNX2_TDMA_FTQ_CMD_ADD_DATABNX2_TDMA_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
27697
 BNX2_TDMA_FTQ_CMD_INTERVENE_CLRBNX2_TDMA_FTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
27698
 BNX2_TDMA_FTQ_CMD_POPBNX2_TDMA_FTQ_CMD_POP (1L<<30) bnx2.h 　
27699
 BNX2_TDMA_FTQ_CMD_BUSYBNX2_TDMA_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
27700
 BNX2_TDMA_FTQ_CTLBNX2_TDMA_FTQ_CTL 0x00005ffc bnx2.h 　
27701
 BNX2_TDMA_FTQ_CTL_INTERVENEBNX2_TDMA_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
27702
 BNX2_TDMA_FTQ_CTL_OVERFLOWBNX2_TDMA_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
27703
 BNX2_TDMA_FTQ_CTL_FORCE_INTERVEBNX2_TDMA_FTQ_CTL_FORCE_INTERVE (1L<<2) bnx2.h 　
27704
 BNX2_TDMA_FTQ_CTL_MAX_DEPTHBNX2_TDMA_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
27705
 BNX2_TDMA_FTQ_CTL_CUR_DEPTHBNX2_TDMA_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
27706
 BNX2_HC_COMMANDBNX2_HC_COMMAND 0x00006800 bnx2.h 　
27707
 BNX2_HC_COMMAND_ENABLEBNX2_HC_COMMAND_ENABLE (1L<<0) bnx2.h 　
27708
 BNX2_HC_COMMAND_SKIP_ABORTBNX2_HC_COMMAND_SKIP_ABORT (1L<<4) bnx2.h 　
27709
 BNX2_HC_COMMAND_COAL_NOWBNX2_HC_COMMAND_COAL_NOW (1L<<16) bnx2.h 　
27710
 BNX2_HC_COMMAND_COAL_NOW_WO_INTBNX2_HC_COMMAND_COAL_NOW_WO_INT (1L<<17) bnx2.h 　
27711
 BNX2_HC_COMMAND_STATS_NOWBNX2_HC_COMMAND_STATS_NOW (1L<<18) bnx2.h 　
27712
 BNX2_HC_COMMAND_FORCE_INTBNX2_HC_COMMAND_FORCE_INT (0x3L<<19) bnx2.h 　
27713
 BNX2_HC_COMMAND_FORCE_INT_NULLBNX2_HC_COMMAND_FORCE_INT_NULL (0L<<19) bnx2.h 　
27714
 BNX2_HC_COMMAND_FORCE_INT_HIGHBNX2_HC_COMMAND_FORCE_INT_HIGH (1L<<19) bnx2.h 　
27715
 BNX2_HC_COMMAND_FORCE_INT_LOWBNX2_HC_COMMAND_FORCE_INT_LOW (2L<<19) bnx2.h 　
27716
 BNX2_HC_COMMAND_FORCE_INT_FREEBNX2_HC_COMMAND_FORCE_INT_FREE (3L<<19) bnx2.h 　
27717
 BNX2_HC_COMMAND_CLR_STAT_NOWBNX2_HC_COMMAND_CLR_STAT_NOW (1L<<21) bnx2.h 　
27718
 BNX2_HC_STATUSBNX2_HC_STATUS 0x00006804 bnx2.h 　
27719
 BNX2_HC_STATUS_MASTER_ABORTBNX2_HC_STATUS_MASTER_ABORT (1L<<0) bnx2.h 　
27720
 BNX2_HC_STATUS_PARITY_ERROR_STABNX2_HC_STATUS_PARITY_ERROR_STA (1L<<1) bnx2.h 　
27721
 BNX2_HC_STATUS_PCI_CLK_CNT_STATBNX2_HC_STATUS_PCI_CLK_CNT_STAT (1L<<16) bnx2.h 　
27722
 BNX2_HC_STATUS_CORE_CLK_CNT_STABNX2_HC_STATUS_CORE_CLK_CNT_STA (1L<<17) bnx2.h 　
27723
 BNX2_HC_STATUS_NUM_STATUS_BLOCKBNX2_HC_STATUS_NUM_STATUS_BLOCK (1L<<18) bnx2.h 　
27724
 BNX2_HC_STATUS_NUM_INT_GEN_STATBNX2_HC_STATUS_NUM_INT_GEN_STAT (1L<<19) bnx2.h 　
27725
 BNX2_HC_STATUS_NUM_INT_MBOX_WR_BNX2_HC_STATUS_NUM_INT_MBOX_WR_ (1L<<20) bnx2.h 　
27726
 BNX2_HC_STATUS_CORE_CLKS_TO_HW_BNX2_HC_STATUS_CORE_CLKS_TO_HW_ (1L<<23) bnx2.h 　
27727
 BNX2_HC_STATUS_CORE_CLKS_TO_SW_BNX2_HC_STATUS_CORE_CLKS_TO_SW_ (1L<<24) bnx2.h 　
27728
 BNX2_HC_STATUS_CORE_CLKS_DURINGBNX2_HC_STATUS_CORE_CLKS_DURING (1L<<25) bnx2.h 　
27729
 BNX2_HC_CONFIGBNX2_HC_CONFIG 0x00006808 bnx2.h 　
27730
 BNX2_HC_CONFIG_COLLECT_STATSBNX2_HC_CONFIG_COLLECT_STATS (1L<<0) bnx2.h 　
27731
 BNX2_HC_CONFIG_RX_TMR_MODEBNX2_HC_CONFIG_RX_TMR_MODE (1L<<1) bnx2.h 　
27732
 BNX2_HC_CONFIG_TX_TMR_MODEBNX2_HC_CONFIG_TX_TMR_MODE (1L<<2) bnx2.h 　
27733
 BNX2_HC_CONFIG_COM_TMR_MODEBNX2_HC_CONFIG_COM_TMR_MODE (1L<<3) bnx2.h 　
27734
 BNX2_HC_CONFIG_CMD_TMR_MODEBNX2_HC_CONFIG_CMD_TMR_MODE (1L<<4) bnx2.h 　
27735
 BNX2_HC_CONFIG_STATISTIC_PRIORIBNX2_HC_CONFIG_STATISTIC_PRIORI (1L<<5) bnx2.h 　
27736
 BNX2_HC_CONFIG_STATUS_PRIORITYBNX2_HC_CONFIG_STATUS_PRIORITY (1L<<6) bnx2.h 　
27737
 BNX2_HC_CONFIG_STAT_MEM_ADDRBNX2_HC_CONFIG_STAT_MEM_ADDR (0xffL<<8) bnx2.h 　
27738
 BNX2_HC_ATTN_BITS_ENABLEBNX2_HC_ATTN_BITS_ENABLE 0x0000680c bnx2.h 　
27739
 BNX2_HC_STATUS_ADDR_LBNX2_HC_STATUS_ADDR_L 0x00006810 bnx2.h 　
27740
 BNX2_HC_STATUS_ADDR_HBNX2_HC_STATUS_ADDR_H 0x00006814 bnx2.h 　
27741
 BNX2_HC_STATISTICS_ADDR_LBNX2_HC_STATISTICS_ADDR_L 0x00006818 bnx2.h 　
27742
 BNX2_HC_STATISTICS_ADDR_HBNX2_HC_STATISTICS_ADDR_H 0x0000681c bnx2.h 　
27743
 BNX2_HC_TX_QUICK_CONS_TRIPBNX2_HC_TX_QUICK_CONS_TRIP 0x00006820 bnx2.h 　
27744
 BNX2_HC_TX_QUICK_CONS_TRIP_VALUBNX2_HC_TX_QUICK_CONS_TRIP_VALU (0xffL<<0) bnx2.h 　
27745
 BNX2_HC_TX_QUICK_CONS_TRIP_INTBNX2_HC_TX_QUICK_CONS_TRIP_INT (0xffL<<16) bnx2.h 　
27746
 BNX2_HC_COMP_PROD_TRIPBNX2_HC_COMP_PROD_TRIP 0x00006824 bnx2.h 　
27747
 BNX2_HC_COMP_PROD_TRIP_VALUEBNX2_HC_COMP_PROD_TRIP_VALUE (0xffL<<0) bnx2.h 　
27748
 BNX2_HC_COMP_PROD_TRIP_INTBNX2_HC_COMP_PROD_TRIP_INT (0xffL<<16) bnx2.h 　
27749
 BNX2_HC_RX_QUICK_CONS_TRIPBNX2_HC_RX_QUICK_CONS_TRIP 0x00006828 bnx2.h 　
27750
 BNX2_HC_RX_QUICK_CONS_TRIP_VALUBNX2_HC_RX_QUICK_CONS_TRIP_VALU (0xffL<<0) bnx2.h 　
27751
 BNX2_HC_RX_QUICK_CONS_TRIP_INTBNX2_HC_RX_QUICK_CONS_TRIP_INT (0xffL<<16) bnx2.h 　
27752
 BNX2_HC_RX_TICKSBNX2_HC_RX_TICKS 0x0000682c bnx2.h 　
27753
 BNX2_HC_RX_TICKS_VALUEBNX2_HC_RX_TICKS_VALUE (0x3ffL<<0) bnx2.h 　
27754
 BNX2_HC_RX_TICKS_INTBNX2_HC_RX_TICKS_INT (0x3ffL<<16) bnx2.h 　
27755
 BNX2_HC_TX_TICKSBNX2_HC_TX_TICKS 0x00006830 bnx2.h 　
27756
 BNX2_HC_TX_TICKS_VALUEBNX2_HC_TX_TICKS_VALUE (0x3ffL<<0) bnx2.h 　
27757
 BNX2_HC_TX_TICKS_INTBNX2_HC_TX_TICKS_INT (0x3ffL<<16) bnx2.h 　
27758
 BNX2_HC_COM_TICKSBNX2_HC_COM_TICKS 0x00006834 bnx2.h 　
27759
 BNX2_HC_COM_TICKS_VALUEBNX2_HC_COM_TICKS_VALUE (0x3ffL<<0) bnx2.h 　
27760
 BNX2_HC_COM_TICKS_INTBNX2_HC_COM_TICKS_INT (0x3ffL<<16) bnx2.h 　
27761
 BNX2_HC_CMD_TICKSBNX2_HC_CMD_TICKS 0x00006838 bnx2.h 　
27762
 BNX2_HC_CMD_TICKS_VALUEBNX2_HC_CMD_TICKS_VALUE (0x3ffL<<0) bnx2.h 　
27763
 BNX2_HC_CMD_TICKS_INTBNX2_HC_CMD_TICKS_INT (0x3ffL<<16) bnx2.h 　
27764
 BNX2_HC_PERIODIC_TICKSBNX2_HC_PERIODIC_TICKS 0x0000683c bnx2.h 　
27765
 BNX2_HC_PERIODIC_TICKS_HC_PERIOBNX2_HC_PERIODIC_TICKS_HC_PERIO (0xffffL<<0) bnx2.h 　
27766
 BNX2_HC_STAT_COLLECT_TICKSBNX2_HC_STAT_COLLECT_TICKS 0x00006840 bnx2.h 　
27767
 BNX2_HC_STAT_COLLECT_TICKS_HC_SBNX2_HC_STAT_COLLECT_TICKS_HC_S (0xffL<<4) bnx2.h 　
27768
 BNX2_HC_STATS_TICKSBNX2_HC_STATS_TICKS 0x00006844 bnx2.h 　
27769
 BNX2_HC_STATS_TICKS_HC_STAT_TICBNX2_HC_STATS_TICKS_HC_STAT_TIC (0xffffL<<8) bnx2.h 　
27770
 BNX2_HC_STAT_MEM_DATABNX2_HC_STAT_MEM_DATA 0x0000684c bnx2.h 　
27771
 BNX2_HC_STAT_GEN_SEL_0BNX2_HC_STAT_GEN_SEL_0 0x00006850 bnx2.h 　
27772
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (0x7fL<<0) bnx2.h 　
27773
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (0L<<0) bnx2.h 　
27774
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (1L<<0) bnx2.h 　
27775
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (2L<<0) bnx2.h 　
27776
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (3L<<0) bnx2.h 　
27777
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (4L<<0) bnx2.h 　
27778
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (5L<<0) bnx2.h 　
27779
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (6L<<0) bnx2.h 　
27780
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (7L<<0) bnx2.h 　
27781
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (8L<<0) bnx2.h 　
27782
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (9L<<0) bnx2.h 　
27783
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (10L<<0) bnx2.h 　
27784
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (11L<<0) bnx2.h 　
27785
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (12L<<0) bnx2.h 　
27786
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (13L<<0) bnx2.h 　
27787
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (14L<<0) bnx2.h 　
27788
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (15L<<0) bnx2.h 　
27789
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (16L<<0) bnx2.h 　
27790
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (17L<<0) bnx2.h 　
27791
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (18L<<0) bnx2.h 　
27792
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (19L<<0) bnx2.h 　
27793
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (20L<<0) bnx2.h 　
27794
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (21L<<0) bnx2.h 　
27795
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (22L<<0) bnx2.h 　
27796
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (23L<<0) bnx2.h 　
27797
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (24L<<0) bnx2.h 　
27798
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (25L<<0) bnx2.h 　
27799
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (26L<<0) bnx2.h 　
27800
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (27L<<0) bnx2.h 　
27801
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (28L<<0) bnx2.h 　
27802
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (29L<<0) bnx2.h 　
27803
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (30L<<0) bnx2.h 　
27804
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (31L<<0) bnx2.h 　
27805
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (32L<<0) bnx2.h 　
27806
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (33L<<0) bnx2.h 　
27807
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (34L<<0) bnx2.h 　
27808
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (35L<<0) bnx2.h 　
27809
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (36L<<0) bnx2.h 　
27810
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (37L<<0) bnx2.h 　
27811
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (38L<<0) bnx2.h 　
27812
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (39L<<0) bnx2.h 　
27813
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (40L<<0) bnx2.h 　
27814
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (41L<<0) bnx2.h 　
27815
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (42L<<0) bnx2.h 　
27816
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (43L<<0) bnx2.h 　
27817
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (44L<<0) bnx2.h 　
27818
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (45L<<0) bnx2.h 　
27819
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (46L<<0) bnx2.h 　
27820
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (47L<<0) bnx2.h 　
27821
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (48L<<0) bnx2.h 　
27822
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (49L<<0) bnx2.h 　
27823
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (50L<<0) bnx2.h 　
27824
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (51L<<0) bnx2.h 　
27825
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (52L<<0) bnx2.h 　
27826
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (53L<<0) bnx2.h 　
27827
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (54L<<0) bnx2.h 　
27828
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (55L<<0) bnx2.h 　
27829
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (56L<<0) bnx2.h 　
27830
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (59L<<0) bnx2.h 　
27831
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (60L<<0) bnx2.h 　
27832
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (61L<<0) bnx2.h 　
27833
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (62L<<0) bnx2.h 　
27834
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (63L<<0) bnx2.h 　
27835
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (64L<<0) bnx2.h 　
27836
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (65L<<0) bnx2.h 　
27837
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (66L<<0) bnx2.h 　
27838
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (67L<<0) bnx2.h 　
27839
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (68L<<0) bnx2.h 　
27840
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (69L<<0) bnx2.h 　
27841
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (70L<<0) bnx2.h 　
27842
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (71L<<0) bnx2.h 　
27843
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (72L<<0) bnx2.h 　
27844
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (73L<<0) bnx2.h 　
27845
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (74L<<0) bnx2.h 　
27846
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (75L<<0) bnx2.h 　
27847
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (76L<<0) bnx2.h 　
27848
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (77L<<0) bnx2.h 　
27849
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (78L<<0) bnx2.h 　
27850
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (79L<<0) bnx2.h 　
27851
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (80L<<0) bnx2.h 　
27852
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (81L<<0) bnx2.h 　
27853
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (82L<<0) bnx2.h 　
27854
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (83L<<0) bnx2.h 　
27855
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (84L<<0) bnx2.h 　
27856
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (85L<<0) bnx2.h 　
27857
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (86L<<0) bnx2.h 　
27858
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (87L<<0) bnx2.h 　
27859
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (88L<<0) bnx2.h 　
27860
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (89L<<0) bnx2.h 　
27861
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (90L<<0) bnx2.h 　
27862
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (91L<<0) bnx2.h 　
27863
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (92L<<0) bnx2.h 　
27864
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (93L<<0) bnx2.h 　
27865
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (94L<<0) bnx2.h 　
27866
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (95L<<0) bnx2.h 　
27867
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (96L<<0) bnx2.h 　
27868
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (97L<<0) bnx2.h 　
27869
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (98L<<0) bnx2.h 　
27870
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (99L<<0) bnx2.h 　
27871
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (100L<<0) bnx2.h 　
27872
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (101L<<0) bnx2.h 　
27873
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (102L<<0) bnx2.h 　
27874
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (103L<<0) bnx2.h 　
27875
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (104L<<0) bnx2.h 　
27876
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (105L<<0) bnx2.h 　
27877
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (106L<<0) bnx2.h 　
27878
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (107L<<0) bnx2.h 　
27879
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (108L<<0) bnx2.h 　
27880
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (109L<<0) bnx2.h 　
27881
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (110L<<0) bnx2.h 　
27882
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (111L<<0) bnx2.h 　
27883
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (112L<<0) bnx2.h 　
27884
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (113L<<0) bnx2.h 　
27885
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (114L<<0) bnx2.h 　
27886
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (115L<<0) bnx2.h 　
27887
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (116L<<0) bnx2.h 　
27888
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (117L<<0) bnx2.h 　
27889
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (118L<<0) bnx2.h 　
27890
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (119L<<0) bnx2.h 　
27891
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (120L<<0) bnx2.h 　
27892
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (121L<<0) bnx2.h 　
27893
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (122L<<0) bnx2.h 　
27894
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (127L<<0) bnx2.h 　
27895
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (0x7fL<<8) bnx2.h 　
27896
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (0x7fL<<16) bnx2.h 　
27897
 BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_ (0x7fL<<24) bnx2.h 　
27898
 BNX2_HC_STAT_GEN_SEL_1BNX2_HC_STAT_GEN_SEL_1 0x00006854 bnx2.h 　
27899
 BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_ (0x7fL<<0) bnx2.h 　
27900
 BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_ (0x7fL<<8) bnx2.h 　
27901
 BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_ (0x7fL<<16) bnx2.h 　
27902
 BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_ (0x7fL<<24) bnx2.h 　
27903
 BNX2_HC_STAT_GEN_SEL_2BNX2_HC_STAT_GEN_SEL_2 0x00006858 bnx2.h 　
27904
 BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_ (0x7fL<<0) bnx2.h 　
27905
 BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_ (0x7fL<<8) bnx2.h 　
27906
 BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_ (0x7fL<<16) bnx2.h 　
27907
 BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_ (0x7fL<<24) bnx2.h 　
27908
 BNX2_HC_STAT_GEN_SEL_3BNX2_HC_STAT_GEN_SEL_3 0x0000685c bnx2.h 　
27909
 BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_ (0x7fL<<0) bnx2.h 　
27910
 BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_ (0x7fL<<8) bnx2.h 　
27911
 BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_ (0x7fL<<16) bnx2.h 　
27912
 BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_ (0x7fL<<24) bnx2.h 　
27913
 BNX2_HC_STAT_GEN_STAT0BNX2_HC_STAT_GEN_STAT0 0x00006888 bnx2.h 　
27914
 BNX2_HC_STAT_GEN_STAT1BNX2_HC_STAT_GEN_STAT1 0x0000688c bnx2.h 　
27915
 BNX2_HC_STAT_GEN_STAT2BNX2_HC_STAT_GEN_STAT2 0x00006890 bnx2.h 　
27916
 BNX2_HC_STAT_GEN_STAT3BNX2_HC_STAT_GEN_STAT3 0x00006894 bnx2.h 　
27917
 BNX2_HC_STAT_GEN_STAT4BNX2_HC_STAT_GEN_STAT4 0x00006898 bnx2.h 　
27918
 BNX2_HC_STAT_GEN_STAT5BNX2_HC_STAT_GEN_STAT5 0x0000689c bnx2.h 　
27919
 BNX2_HC_STAT_GEN_STAT6BNX2_HC_STAT_GEN_STAT6 0x000068a0 bnx2.h 　
27920
 BNX2_HC_STAT_GEN_STAT7BNX2_HC_STAT_GEN_STAT7 0x000068a4 bnx2.h 　
27921
 BNX2_HC_STAT_GEN_STAT8BNX2_HC_STAT_GEN_STAT8 0x000068a8 bnx2.h 　
27922
 BNX2_HC_STAT_GEN_STAT9BNX2_HC_STAT_GEN_STAT9 0x000068ac bnx2.h 　
27923
 BNX2_HC_STAT_GEN_STAT10BNX2_HC_STAT_GEN_STAT10 0x000068b0 bnx2.h 　
27924
 BNX2_HC_STAT_GEN_STAT11BNX2_HC_STAT_GEN_STAT11 0x000068b4 bnx2.h 　
27925
 BNX2_HC_STAT_GEN_STAT12BNX2_HC_STAT_GEN_STAT12 0x000068b8 bnx2.h 　
27926
 BNX2_HC_STAT_GEN_STAT13BNX2_HC_STAT_GEN_STAT13 0x000068bc bnx2.h 　
27927
 BNX2_HC_STAT_GEN_STAT14BNX2_HC_STAT_GEN_STAT14 0x000068c0 bnx2.h 　
27928
 BNX2_HC_STAT_GEN_STAT15BNX2_HC_STAT_GEN_STAT15 0x000068c4 bnx2.h 　
27929
 BNX2_HC_STAT_GEN_STAT_AC0BNX2_HC_STAT_GEN_STAT_AC0 0x000068c8 bnx2.h 　
27930
 BNX2_HC_STAT_GEN_STAT_AC1BNX2_HC_STAT_GEN_STAT_AC1 0x000068cc bnx2.h 　
27931
 BNX2_HC_STAT_GEN_STAT_AC2BNX2_HC_STAT_GEN_STAT_AC2 0x000068d0 bnx2.h 　
27932
 BNX2_HC_STAT_GEN_STAT_AC3BNX2_HC_STAT_GEN_STAT_AC3 0x000068d4 bnx2.h 　
27933
 BNX2_HC_STAT_GEN_STAT_AC4BNX2_HC_STAT_GEN_STAT_AC4 0x000068d8 bnx2.h 　
27934
 BNX2_HC_STAT_GEN_STAT_AC5BNX2_HC_STAT_GEN_STAT_AC5 0x000068dc bnx2.h 　
27935
 BNX2_HC_STAT_GEN_STAT_AC6BNX2_HC_STAT_GEN_STAT_AC6 0x000068e0 bnx2.h 　
27936
 BNX2_HC_STAT_GEN_STAT_AC7BNX2_HC_STAT_GEN_STAT_AC7 0x000068e4 bnx2.h 　
27937
 BNX2_HC_STAT_GEN_STAT_AC8BNX2_HC_STAT_GEN_STAT_AC8 0x000068e8 bnx2.h 　
27938
 BNX2_HC_STAT_GEN_STAT_AC9BNX2_HC_STAT_GEN_STAT_AC9 0x000068ec bnx2.h 　
27939
 BNX2_HC_STAT_GEN_STAT_AC10BNX2_HC_STAT_GEN_STAT_AC10 0x000068f0 bnx2.h 　
27940
 BNX2_HC_STAT_GEN_STAT_AC11BNX2_HC_STAT_GEN_STAT_AC11 0x000068f4 bnx2.h 　
27941
 BNX2_HC_STAT_GEN_STAT_AC12BNX2_HC_STAT_GEN_STAT_AC12 0x000068f8 bnx2.h 　
27942
 BNX2_HC_STAT_GEN_STAT_AC13BNX2_HC_STAT_GEN_STAT_AC13 0x000068fc bnx2.h 　
27943
 BNX2_HC_STAT_GEN_STAT_AC14BNX2_HC_STAT_GEN_STAT_AC14 0x00006900 bnx2.h 　
27944
 BNX2_HC_STAT_GEN_STAT_AC15BNX2_HC_STAT_GEN_STAT_AC15 0x00006904 bnx2.h 　
27945
 BNX2_HC_VISBNX2_HC_VIS 0x00006908 bnx2.h 　
27946
 BNX2_HC_VIS_STAT_BUILD_STATEBNX2_HC_VIS_STAT_BUILD_STATE (0xfL<<0) bnx2.h 　
27947
 BNX2_HC_VIS_STAT_BUILD_STATE_IDBNX2_HC_VIS_STAT_BUILD_STATE_ID (0L<<0) bnx2.h 　
27948
 BNX2_HC_VIS_STAT_BUILD_STATE_STBNX2_HC_VIS_STAT_BUILD_STATE_ST (1L<<0) bnx2.h 　
27949
 BNX2_HC_VIS_STAT_BUILD_STATE_REBNX2_HC_VIS_STAT_BUILD_STATE_RE (2L<<0) bnx2.h 　
27950
 BNX2_HC_VIS_STAT_BUILD_STATE_UPBNX2_HC_VIS_STAT_BUILD_STATE_UP (3L<<0) bnx2.h 　
27951
 BNX2_HC_VIS_STAT_BUILD_STATE_UPBNX2_HC_VIS_STAT_BUILD_STATE_UP (4L<<0) bnx2.h 　
27952
 BNX2_HC_VIS_STAT_BUILD_STATE_UPBNX2_HC_VIS_STAT_BUILD_STATE_UP (5L<<0) bnx2.h 　
27953
 BNX2_HC_VIS_STAT_BUILD_STATE_DMBNX2_HC_VIS_STAT_BUILD_STATE_DM (6L<<0) bnx2.h 　
27954
 BNX2_HC_VIS_STAT_BUILD_STATE_MSBNX2_HC_VIS_STAT_BUILD_STATE_MS (7L<<0) bnx2.h 　
27955
 BNX2_HC_VIS_STAT_BUILD_STATE_MSBNX2_HC_VIS_STAT_BUILD_STATE_MS (8L<<0) bnx2.h 　
27956
 BNX2_HC_VIS_STAT_BUILD_STATE_MSBNX2_HC_VIS_STAT_BUILD_STATE_MS (9L<<0) bnx2.h 　
27957
 BNX2_HC_VIS_STAT_BUILD_STATE_MSBNX2_HC_VIS_STAT_BUILD_STATE_MS (10L<<0) bnx2.h 　
27958
 BNX2_HC_VIS_DMA_STAT_STATEBNX2_HC_VIS_DMA_STAT_STATE (0xfL<<8) bnx2.h 　
27959
 BNX2_HC_VIS_DMA_STAT_STATE_IDLEBNX2_HC_VIS_DMA_STAT_STATE_IDLE (0L<<8) bnx2.h 　
27960
 BNX2_HC_VIS_DMA_STAT_STATE_STATBNX2_HC_VIS_DMA_STAT_STATE_STAT (1L<<8) bnx2.h 　
27961
 BNX2_HC_VIS_DMA_STAT_STATE_STATBNX2_HC_VIS_DMA_STAT_STATE_STAT (2L<<8) bnx2.h 　
27962
 BNX2_HC_VIS_DMA_STAT_STATE_WRITBNX2_HC_VIS_DMA_STAT_STATE_WRIT (3L<<8) bnx2.h 　
27963
 BNX2_HC_VIS_DMA_STAT_STATE_COMPBNX2_HC_VIS_DMA_STAT_STATE_COMP (4L<<8) bnx2.h 　
27964
 BNX2_HC_VIS_DMA_STAT_STATE_STATBNX2_HC_VIS_DMA_STAT_STATE_STAT (5L<<8) bnx2.h 　
27965
 BNX2_HC_VIS_DMA_STAT_STATE_STATBNX2_HC_VIS_DMA_STAT_STATE_STAT (6L<<8) bnx2.h 　
27966
 BNX2_HC_VIS_DMA_STAT_STATE_WRITBNX2_HC_VIS_DMA_STAT_STATE_WRIT (7L<<8) bnx2.h 　
27967
 BNX2_HC_VIS_DMA_STAT_STATE_WRITBNX2_HC_VIS_DMA_STAT_STATE_WRIT (8L<<8) bnx2.h 　
27968
 BNX2_HC_VIS_DMA_STAT_STATE_WAITBNX2_HC_VIS_DMA_STAT_STATE_WAIT (9L<<8) bnx2.h 　
27969
 BNX2_HC_VIS_DMA_STAT_STATE_ABORBNX2_HC_VIS_DMA_STAT_STATE_ABOR (15L<<8) bnx2.h 　
27970
 BNX2_HC_VIS_DMA_MSI_STATEBNX2_HC_VIS_DMA_MSI_STATE (0x7L<<12) bnx2.h 　
27971
 BNX2_HC_VIS_STATISTIC_DMA_EN_STBNX2_HC_VIS_STATISTIC_DMA_EN_ST (0x3L<<15) bnx2.h 　
27972
 BNX2_HC_VIS_STATISTIC_DMA_EN_STBNX2_HC_VIS_STATISTIC_DMA_EN_ST (0L<<15) bnx2.h 　
27973
 BNX2_HC_VIS_STATISTIC_DMA_EN_STBNX2_HC_VIS_STATISTIC_DMA_EN_ST (1L<<15) bnx2.h 　
27974
 BNX2_HC_VIS_STATISTIC_DMA_EN_STBNX2_HC_VIS_STATISTIC_DMA_EN_ST (2L<<15) bnx2.h 　
27975
 BNX2_HC_VIS_1BNX2_HC_VIS_1 0x0000690c bnx2.h 　
27976
 BNX2_HC_VIS_1_HW_INTACK_STATEBNX2_HC_VIS_1_HW_INTACK_STATE (1L<<4) bnx2.h 　
27977
 BNX2_HC_VIS_1_HW_INTACK_STATE_IBNX2_HC_VIS_1_HW_INTACK_STATE_I (0L<<4) bnx2.h 　
27978
 BNX2_HC_VIS_1_HW_INTACK_STATE_CBNX2_HC_VIS_1_HW_INTACK_STATE_C (1L<<4) bnx2.h 　
27979
 BNX2_HC_VIS_1_SW_INTACK_STATEBNX2_HC_VIS_1_SW_INTACK_STATE (1L<<5) bnx2.h 　
27980
 BNX2_HC_VIS_1_SW_INTACK_STATE_IBNX2_HC_VIS_1_SW_INTACK_STATE_I (0L<<5) bnx2.h 　
27981
 BNX2_HC_VIS_1_SW_INTACK_STATE_CBNX2_HC_VIS_1_SW_INTACK_STATE_C (1L<<5) bnx2.h 　
27982
 BNX2_HC_VIS_1_DURING_SW_INTACK_BNX2_HC_VIS_1_DURING_SW_INTACK_ (1L<<6) bnx2.h 　
27983
 BNX2_HC_VIS_1_DURING_SW_INTACK_BNX2_HC_VIS_1_DURING_SW_INTACK_ (0L<<6) bnx2.h 　
27984
 BNX2_HC_VIS_1_DURING_SW_INTACK_BNX2_HC_VIS_1_DURING_SW_INTACK_ (1L<<6) bnx2.h 　
27985
 BNX2_HC_VIS_1_MAILBOX_COUNT_STABNX2_HC_VIS_1_MAILBOX_COUNT_STA (1L<<7) bnx2.h 　
27986
 BNX2_HC_VIS_1_MAILBOX_COUNT_STABNX2_HC_VIS_1_MAILBOX_COUNT_STA (0L<<7) bnx2.h 　
27987
 BNX2_HC_VIS_1_MAILBOX_COUNT_STABNX2_HC_VIS_1_MAILBOX_COUNT_STA (1L<<7) bnx2.h 　
27988
 BNX2_HC_VIS_1_RAM_RD_ARB_STATEBNX2_HC_VIS_1_RAM_RD_ARB_STATE (0xfL<<17) bnx2.h 　
27989
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (0L<<17) bnx2.h 　
27990
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (1L<<17) bnx2.h 　
27991
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (2L<<17) bnx2.h 　
27992
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (3L<<17) bnx2.h 　
27993
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (4L<<17) bnx2.h 　
27994
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (5L<<17) bnx2.h 　
27995
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (6L<<17) bnx2.h 　
27996
 BNX2_HC_VIS_1_RAM_RD_ARB_STATE_BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ (7L<<17) bnx2.h 　
27997
 BNX2_HC_VIS_1_RAM_WR_ARB_STATEBNX2_HC_VIS_1_RAM_WR_ARB_STATE (0x3L<<21) bnx2.h 　
27998
 BNX2_HC_VIS_1_RAM_WR_ARB_STATE_BNX2_HC_VIS_1_RAM_WR_ARB_STATE_ (0L<<21) bnx2.h 　
27999
 BNX2_HC_VIS_1_RAM_WR_ARB_STATE_BNX2_HC_VIS_1_RAM_WR_ARB_STATE_ (1L<<21) bnx2.h 　
28000
 BNX2_HC_VIS_1_INT_GEN_STATEBNX2_HC_VIS_1_INT_GEN_STATE (1L<<23) bnx2.h 　
28001
 BNX2_HC_VIS_1_INT_GEN_STATE_DLEBNX2_HC_VIS_1_INT_GEN_STATE_DLE (0L<<23) bnx2.h 　
28002
 BNX2_HC_VIS_1_INT_GEN_STATE_NTEBNX2_HC_VIS_1_INT_GEN_STATE_NTE (1L<<23) bnx2.h 　
28003
 BNX2_HC_VIS_1_STAT_CHAN_IDBNX2_HC_VIS_1_STAT_CHAN_ID (0x7L<<24) bnx2.h 　
28004
 BNX2_HC_VIS_1_INT_BBNX2_HC_VIS_1_INT_B (1L<<27) bnx2.h 　
28005
 BNX2_HC_DEBUG_VECT_PEEKBNX2_HC_DEBUG_VECT_PEEK 0x00006910 bnx2.h 　
28006
 BNX2_HC_DEBUG_VECT_PEEK_1_VALUEBNX2_HC_DEBUG_VECT_PEEK_1_VALUE (0x7ffL<<0) bnx2.h 　
28007
 BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_ (1L<<11) bnx2.h 　
28008
 BNX2_HC_DEBUG_VECT_PEEK_1_SELBNX2_HC_DEBUG_VECT_PEEK_1_SEL (0xfL<<12) bnx2.h 　
28009
 BNX2_HC_DEBUG_VECT_PEEK_2_VALUEBNX2_HC_DEBUG_VECT_PEEK_2_VALUE (0x7ffL<<16) bnx2.h 　
28010
 BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_ (1L<<27) bnx2.h 　
28011
 BNX2_HC_DEBUG_VECT_PEEK_2_SELBNX2_HC_DEBUG_VECT_PEEK_2_SEL (0xfL<<28) bnx2.h 　
28012
 BNX2_TXP_CPU_MODEBNX2_TXP_CPU_MODE 0x00045000 bnx2.h 　
28013
 BNX2_TXP_CPU_MODE_LOCAL_RSTBNX2_TXP_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
28014
 BNX2_TXP_CPU_MODE_STEP_ENABNX2_TXP_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
28015
 BNX2_TXP_CPU_MODE_PAGE_0_DATA_EBNX2_TXP_CPU_MODE_PAGE_0_DATA_E (1L<<2) bnx2.h 　
28016
 BNX2_TXP_CPU_MODE_PAGE_0_INST_EBNX2_TXP_CPU_MODE_PAGE_0_INST_E (1L<<3) bnx2.h 　
28017
 BNX2_TXP_CPU_MODE_MSG_BIT1BNX2_TXP_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
28018
 BNX2_TXP_CPU_MODE_INTERRUPT_ENABNX2_TXP_CPU_MODE_INTERRUPT_ENA (1L<<7) bnx2.h 　
28019
 BNX2_TXP_CPU_MODE_SOFT_HALTBNX2_TXP_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
28020
 BNX2_TXP_CPU_MODE_BAD_DATA_HALTBNX2_TXP_CPU_MODE_BAD_DATA_HALT (1L<<11) bnx2.h 　
28021
 BNX2_TXP_CPU_MODE_BAD_INST_HALTBNX2_TXP_CPU_MODE_BAD_INST_HALT (1L<<12) bnx2.h 　
28022
 BNX2_TXP_CPU_MODE_FIO_ABORT_HALBNX2_TXP_CPU_MODE_FIO_ABORT_HAL (1L<<13) bnx2.h 　
28023
 BNX2_TXP_CPU_MODE_SPAD_UNDERFLOBNX2_TXP_CPU_MODE_SPAD_UNDERFLO (1L<<15) bnx2.h 　
28024
 BNX2_TXP_CPU_STATEBNX2_TXP_CPU_STATE 0x00045004 bnx2.h 　
28025
 BNX2_TXP_CPU_STATE_BREAKPOINTBNX2_TXP_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
28026
 BNX2_TXP_CPU_STATE_BAD_INST_HALBNX2_TXP_CPU_STATE_BAD_INST_HAL (1L<<2) bnx2.h 　
28027
 BNX2_TXP_CPU_STATE_PAGE_0_DATA_BNX2_TXP_CPU_STATE_PAGE_0_DATA_ (1L<<3) bnx2.h 　
28028
 BNX2_TXP_CPU_STATE_PAGE_0_INST_BNX2_TXP_CPU_STATE_PAGE_0_INST_ (1L<<4) bnx2.h 　
28029
 BNX2_TXP_CPU_STATE_BAD_DATA_ADDBNX2_TXP_CPU_STATE_BAD_DATA_ADD (1L<<5) bnx2.h 　
28030
 BNX2_TXP_CPU_STATE_BAD_pc_HALTEBNX2_TXP_CPU_STATE_BAD_pc_HALTE (1L<<6) bnx2.h 　
28031
 BNX2_TXP_CPU_STATE_ALIGN_HALTEDBNX2_TXP_CPU_STATE_ALIGN_HALTED (1L<<7) bnx2.h 　
28032
 BNX2_TXP_CPU_STATE_FIO_ABORT_HABNX2_TXP_CPU_STATE_FIO_ABORT_HA (1L<<8) bnx2.h 　
28033
 BNX2_TXP_CPU_STATE_SOFT_HALTEDBNX2_TXP_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
28034
 BNX2_TXP_CPU_STATE_SPAD_UNDERFLBNX2_TXP_CPU_STATE_SPAD_UNDERFL (1L<<11) bnx2.h 　
28035
 BNX2_TXP_CPU_STATE_INTERRRUPTBNX2_TXP_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
28036
 BNX2_TXP_CPU_STATE_DATA_ACCESS_BNX2_TXP_CPU_STATE_DATA_ACCESS_ (1L<<14) bnx2.h 　
28037
 BNX2_TXP_CPU_STATE_INST_FETCH_SBNX2_TXP_CPU_STATE_INST_FETCH_S (1L<<15) bnx2.h 　
28038
 BNX2_TXP_CPU_STATE_BLOCKED_READBNX2_TXP_CPU_STATE_BLOCKED_READ (1L<<31) bnx2.h 　
28039
 BNX2_TXP_CPU_EVENT_MASKBNX2_TXP_CPU_EVENT_MASK 0x00045008 bnx2.h 　
28040
 BNX2_TXP_CPU_EVENT_MASK_BREAKPOBNX2_TXP_CPU_EVENT_MASK_BREAKPO (1L<<0) bnx2.h 　
28041
 BNX2_TXP_CPU_EVENT_MASK_BAD_INSBNX2_TXP_CPU_EVENT_MASK_BAD_INS (1L<<2) bnx2.h 　
28042
 BNX2_TXP_CPU_EVENT_MASK_PAGE_0_BNX2_TXP_CPU_EVENT_MASK_PAGE_0_ (1L<<3) bnx2.h 　
28043
 BNX2_TXP_CPU_EVENT_MASK_PAGE_0_BNX2_TXP_CPU_EVENT_MASK_PAGE_0_ (1L<<4) bnx2.h 　
28044
 BNX2_TXP_CPU_EVENT_MASK_BAD_DATBNX2_TXP_CPU_EVENT_MASK_BAD_DAT (1L<<5) bnx2.h 　
28045
 BNX2_TXP_CPU_EVENT_MASK_BAD_PC_BNX2_TXP_CPU_EVENT_MASK_BAD_PC_ (1L<<6) bnx2.h 　
28046
 BNX2_TXP_CPU_EVENT_MASK_ALIGN_HBNX2_TXP_CPU_EVENT_MASK_ALIGN_H (1L<<7) bnx2.h 　
28047
 BNX2_TXP_CPU_EVENT_MASK_FIO_ABOBNX2_TXP_CPU_EVENT_MASK_FIO_ABO (1L<<8) bnx2.h 　
28048
 BNX2_TXP_CPU_EVENT_MASK_SOFT_HABNX2_TXP_CPU_EVENT_MASK_SOFT_HA (1L<<10) bnx2.h 　
28049
 BNX2_TXP_CPU_EVENT_MASK_SPAD_UNBNX2_TXP_CPU_EVENT_MASK_SPAD_UN (1L<<11) bnx2.h 　
28050
 BNX2_TXP_CPU_EVENT_MASK_INTERRUBNX2_TXP_CPU_EVENT_MASK_INTERRU (1L<<12) bnx2.h 　
28051
 BNX2_TXP_CPU_PROGRAM_COUNTERBNX2_TXP_CPU_PROGRAM_COUNTER 0x0004501c bnx2.h 　
28052
 BNX2_TXP_CPU_INSTRUCTIONBNX2_TXP_CPU_INSTRUCTION 0x00045020 bnx2.h 　
28053
 BNX2_TXP_CPU_DATA_ACCESSBNX2_TXP_CPU_DATA_ACCESS 0x00045024 bnx2.h 　
28054
 BNX2_TXP_CPU_INTERRUPT_ENABLEBNX2_TXP_CPU_INTERRUPT_ENABLE 0x00045028 bnx2.h 　
28055
 BNX2_TXP_CPU_INTERRUPT_VECTORBNX2_TXP_CPU_INTERRUPT_VECTOR 0x0004502c bnx2.h 　
28056
 BNX2_TXP_CPU_INTERRUPT_SAVED_PCBNX2_TXP_CPU_INTERRUPT_SAVED_PC 0x00045030 bnx2.h 　
28057
 BNX2_TXP_CPU_HW_BREAKPOINTBNX2_TXP_CPU_HW_BREAKPOINT 0x00045034 bnx2.h 　
28058
 BNX2_TXP_CPU_HW_BREAKPOINT_DISABNX2_TXP_CPU_HW_BREAKPOINT_DISA (1L<<0) bnx2.h 　
28059
 BNX2_TXP_CPU_HW_BREAKPOINT_ADDRBNX2_TXP_CPU_HW_BREAKPOINT_ADDR (0x3fffffffL<<2) bnx2.h 　
28060
 BNX2_TXP_CPU_DEBUG_VECT_PEEKBNX2_TXP_CPU_DEBUG_VECT_PEEK 0x00045038 bnx2.h 　
28061
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_ (0x7ffL<<0) bnx2.h 　
28062
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_ (1L<<11) bnx2.h 　
28063
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_ (0xfL<<12) bnx2.h 　
28064
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_ (0x7ffL<<16) bnx2.h 　
28065
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_ (1L<<27) bnx2.h 　
28066
 BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_ (0xfL<<28) bnx2.h 　
28067
 BNX2_TXP_CPU_LAST_BRANCH_ADDRBNX2_TXP_CPU_LAST_BRANCH_ADDR 0x00045048 bnx2.h 　
28068
 BNX2_TXP_CPU_LAST_BRANCH_ADDR_TBNX2_TXP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
28069
 BNX2_TXP_CPU_LAST_BRANCH_ADDR_TBNX2_TXP_CPU_LAST_BRANCH_ADDR_T (0L<<1) bnx2.h 　
28070
 BNX2_TXP_CPU_LAST_BRANCH_ADDR_TBNX2_TXP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
28071
 BNX2_TXP_CPU_LAST_BRANCH_ADDR_LBNX2_TXP_CPU_LAST_BRANCH_ADDR_L (0x3fffffffL<<2) bnx2.h 　
28072
 BNX2_TXP_CPU_REG_FILEBNX2_TXP_CPU_REG_FILE 0x00045200 bnx2.h 　
28073
 BNX2_TXP_FTQ_DATABNX2_TXP_FTQ_DATA 0x000453c0 bnx2.h 　
28074
 BNX2_TXP_FTQ_CMDBNX2_TXP_FTQ_CMD 0x000453f8 bnx2.h 　
28075
 BNX2_TXP_FTQ_CMD_OFFSETBNX2_TXP_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
28076
 BNX2_TXP_FTQ_CMD_WR_TOPBNX2_TXP_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
28077
 BNX2_TXP_FTQ_CMD_WR_TOP_0BNX2_TXP_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
28078
 BNX2_TXP_FTQ_CMD_WR_TOP_1BNX2_TXP_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
28079
 BNX2_TXP_FTQ_CMD_SFT_RESETBNX2_TXP_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
28080
 BNX2_TXP_FTQ_CMD_RD_DATABNX2_TXP_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
28081
 BNX2_TXP_FTQ_CMD_ADD_INTERVENBNX2_TXP_FTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
28082
 BNX2_TXP_FTQ_CMD_ADD_DATABNX2_TXP_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
28083
 BNX2_TXP_FTQ_CMD_INTERVENE_CLRBNX2_TXP_FTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
28084
 BNX2_TXP_FTQ_CMD_POPBNX2_TXP_FTQ_CMD_POP (1L<<30) bnx2.h 　
28085
 BNX2_TXP_FTQ_CMD_BUSYBNX2_TXP_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
28086
 BNX2_TXP_FTQ_CTLBNX2_TXP_FTQ_CTL 0x000453fc bnx2.h 　
28087
 BNX2_TXP_FTQ_CTL_INTERVENEBNX2_TXP_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
28088
 BNX2_TXP_FTQ_CTL_OVERFLOWBNX2_TXP_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
28089
 BNX2_TXP_FTQ_CTL_FORCE_INTERVENBNX2_TXP_FTQ_CTL_FORCE_INTERVEN (1L<<2) bnx2.h 　
28090
 BNX2_TXP_FTQ_CTL_MAX_DEPTHBNX2_TXP_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
28091
 BNX2_TXP_FTQ_CTL_CUR_DEPTHBNX2_TXP_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
28092
 BNX2_TXP_SCRATCHBNX2_TXP_SCRATCH 0x00060000 bnx2.h 　
28093
 BNX2_TPAT_CPU_MODEBNX2_TPAT_CPU_MODE 0x00085000 bnx2.h 　
28094
 BNX2_TPAT_CPU_MODE_LOCAL_RSTBNX2_TPAT_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
28095
 BNX2_TPAT_CPU_MODE_STEP_ENABNX2_TPAT_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
28096
 BNX2_TPAT_CPU_MODE_PAGE_0_DATA_BNX2_TPAT_CPU_MODE_PAGE_0_DATA_ (1L<<2) bnx2.h 　
28097
 BNX2_TPAT_CPU_MODE_PAGE_0_INST_BNX2_TPAT_CPU_MODE_PAGE_0_INST_ (1L<<3) bnx2.h 　
28098
 BNX2_TPAT_CPU_MODE_MSG_BIT1BNX2_TPAT_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
28099
 BNX2_TPAT_CPU_MODE_INTERRUPT_ENBNX2_TPAT_CPU_MODE_INTERRUPT_EN (1L<<7) bnx2.h 　
28100
 BNX2_TPAT_CPU_MODE_SOFT_HALTBNX2_TPAT_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
28101
 BNX2_TPAT_CPU_MODE_BAD_DATA_HALBNX2_TPAT_CPU_MODE_BAD_DATA_HAL (1L<<11) bnx2.h 　
28102
 BNX2_TPAT_CPU_MODE_BAD_INST_HALBNX2_TPAT_CPU_MODE_BAD_INST_HAL (1L<<12) bnx2.h 　
28103
 BNX2_TPAT_CPU_MODE_FIO_ABORT_HABNX2_TPAT_CPU_MODE_FIO_ABORT_HA (1L<<13) bnx2.h 　
28104
 BNX2_TPAT_CPU_MODE_SPAD_UNDERFLBNX2_TPAT_CPU_MODE_SPAD_UNDERFL (1L<<15) bnx2.h 　
28105
 BNX2_TPAT_CPU_STATEBNX2_TPAT_CPU_STATE 0x00085004 bnx2.h 　
28106
 BNX2_TPAT_CPU_STATE_BREAKPOINTBNX2_TPAT_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
28107
 BNX2_TPAT_CPU_STATE_BAD_INST_HABNX2_TPAT_CPU_STATE_BAD_INST_HA (1L<<2) bnx2.h 　
28108
 BNX2_TPAT_CPU_STATE_PAGE_0_DATABNX2_TPAT_CPU_STATE_PAGE_0_DATA (1L<<3) bnx2.h 　
28109
 BNX2_TPAT_CPU_STATE_PAGE_0_INSTBNX2_TPAT_CPU_STATE_PAGE_0_INST (1L<<4) bnx2.h 　
28110
 BNX2_TPAT_CPU_STATE_BAD_DATA_ADBNX2_TPAT_CPU_STATE_BAD_DATA_AD (1L<<5) bnx2.h 　
28111
 BNX2_TPAT_CPU_STATE_BAD_pc_HALTBNX2_TPAT_CPU_STATE_BAD_pc_HALT (1L<<6) bnx2.h 　
28112
 BNX2_TPAT_CPU_STATE_ALIGN_HALTEBNX2_TPAT_CPU_STATE_ALIGN_HALTE (1L<<7) bnx2.h 　
28113
 BNX2_TPAT_CPU_STATE_FIO_ABORT_HBNX2_TPAT_CPU_STATE_FIO_ABORT_H (1L<<8) bnx2.h 　
28114
 BNX2_TPAT_CPU_STATE_SOFT_HALTEDBNX2_TPAT_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
28115
 BNX2_TPAT_CPU_STATE_SPAD_UNDERFBNX2_TPAT_CPU_STATE_SPAD_UNDERF (1L<<11) bnx2.h 　
28116
 BNX2_TPAT_CPU_STATE_INTERRRUPTBNX2_TPAT_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
28117
 BNX2_TPAT_CPU_STATE_DATA_ACCESSBNX2_TPAT_CPU_STATE_DATA_ACCESS (1L<<14) bnx2.h 　
28118
 BNX2_TPAT_CPU_STATE_INST_FETCH_BNX2_TPAT_CPU_STATE_INST_FETCH_ (1L<<15) bnx2.h 　
28119
 BNX2_TPAT_CPU_STATE_BLOCKED_REABNX2_TPAT_CPU_STATE_BLOCKED_REA (1L<<31) bnx2.h 　
28120
 BNX2_TPAT_CPU_EVENT_MASKBNX2_TPAT_CPU_EVENT_MASK 0x00085008 bnx2.h 　
28121
 BNX2_TPAT_CPU_EVENT_MASK_BREAKPBNX2_TPAT_CPU_EVENT_MASK_BREAKP (1L<<0) bnx2.h 　
28122
 BNX2_TPAT_CPU_EVENT_MASK_BAD_INBNX2_TPAT_CPU_EVENT_MASK_BAD_IN (1L<<2) bnx2.h 　
28123
 BNX2_TPAT_CPU_EVENT_MASK_PAGE_0BNX2_TPAT_CPU_EVENT_MASK_PAGE_0 (1L<<3) bnx2.h 　
28124
 BNX2_TPAT_CPU_EVENT_MASK_PAGE_0BNX2_TPAT_CPU_EVENT_MASK_PAGE_0 (1L<<4) bnx2.h 　
28125
 BNX2_TPAT_CPU_EVENT_MASK_BAD_DABNX2_TPAT_CPU_EVENT_MASK_BAD_DA (1L<<5) bnx2.h 　
28126
 BNX2_TPAT_CPU_EVENT_MASK_BAD_PCBNX2_TPAT_CPU_EVENT_MASK_BAD_PC (1L<<6) bnx2.h 　
28127
 BNX2_TPAT_CPU_EVENT_MASK_ALIGN_BNX2_TPAT_CPU_EVENT_MASK_ALIGN_ (1L<<7) bnx2.h 　
28128
 BNX2_TPAT_CPU_EVENT_MASK_FIO_ABBNX2_TPAT_CPU_EVENT_MASK_FIO_AB (1L<<8) bnx2.h 　
28129
 BNX2_TPAT_CPU_EVENT_MASK_SOFT_HBNX2_TPAT_CPU_EVENT_MASK_SOFT_H (1L<<10) bnx2.h 　
28130
 BNX2_TPAT_CPU_EVENT_MASK_SPAD_UBNX2_TPAT_CPU_EVENT_MASK_SPAD_U (1L<<11) bnx2.h 　
28131
 BNX2_TPAT_CPU_EVENT_MASK_INTERRBNX2_TPAT_CPU_EVENT_MASK_INTERR (1L<<12) bnx2.h 　
28132
 BNX2_TPAT_CPU_PROGRAM_COUNTERBNX2_TPAT_CPU_PROGRAM_COUNTER 0x0008501c bnx2.h 　
28133
 BNX2_TPAT_CPU_INSTRUCTIONBNX2_TPAT_CPU_INSTRUCTION 0x00085020 bnx2.h 　
28134
 BNX2_TPAT_CPU_DATA_ACCESSBNX2_TPAT_CPU_DATA_ACCESS 0x00085024 bnx2.h 　
28135
 BNX2_TPAT_CPU_INTERRUPT_ENABLEBNX2_TPAT_CPU_INTERRUPT_ENABLE 0x00085028 bnx2.h 　
28136
 BNX2_TPAT_CPU_INTERRUPT_VECTORBNX2_TPAT_CPU_INTERRUPT_VECTOR 0x0008502c bnx2.h 　
28137
 BNX2_TPAT_CPU_INTERRUPT_SAVED_PBNX2_TPAT_CPU_INTERRUPT_SAVED_P 0x00085030 bnx2.h 　
28138
 BNX2_TPAT_CPU_HW_BREAKPOINTBNX2_TPAT_CPU_HW_BREAKPOINT 0x00085034 bnx2.h 　
28139
 BNX2_TPAT_CPU_HW_BREAKPOINT_DISBNX2_TPAT_CPU_HW_BREAKPOINT_DIS (1L<<0) bnx2.h 　
28140
 BNX2_TPAT_CPU_HW_BREAKPOINT_ADDBNX2_TPAT_CPU_HW_BREAKPOINT_ADD (0x3fffffffL<<2) bnx2.h 　
28141
 BNX2_TPAT_CPU_DEBUG_VECT_PEEKBNX2_TPAT_CPU_DEBUG_VECT_PEEK 0x00085038 bnx2.h 　
28142
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1 (0x7ffL<<0) bnx2.h 　
28143
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1 (1L<<11) bnx2.h 　
28144
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1 (0xfL<<12) bnx2.h 　
28145
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2 (0x7ffL<<16) bnx2.h 　
28146
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2 (1L<<27) bnx2.h 　
28147
 BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2 (0xfL<<28) bnx2.h 　
28148
 BNX2_TPAT_CPU_LAST_BRANCH_ADDRBNX2_TPAT_CPU_LAST_BRANCH_ADDR 0x00085048 bnx2.h 　
28149
 BNX2_TPAT_CPU_LAST_BRANCH_ADDR_BNX2_TPAT_CPU_LAST_BRANCH_ADDR_ (1L<<1) bnx2.h 　
28150
 BNX2_TPAT_CPU_LAST_BRANCH_ADDR_BNX2_TPAT_CPU_LAST_BRANCH_ADDR_ (0L<<1) bnx2.h 　
28151
 BNX2_TPAT_CPU_LAST_BRANCH_ADDR_BNX2_TPAT_CPU_LAST_BRANCH_ADDR_ (1L<<1) bnx2.h 　
28152
 BNX2_TPAT_CPU_LAST_BRANCH_ADDR_BNX2_TPAT_CPU_LAST_BRANCH_ADDR_ (0x3fffffffL<<2) bnx2.h 　
28153
 BNX2_TPAT_CPU_REG_FILEBNX2_TPAT_CPU_REG_FILE 0x00085200 bnx2.h 　
28154
 BNX2_TPAT_FTQ_DATABNX2_TPAT_FTQ_DATA 0x000853c0 bnx2.h 　
28155
 BNX2_TPAT_FTQ_CMDBNX2_TPAT_FTQ_CMD 0x000853f8 bnx2.h 　
28156
 BNX2_TPAT_FTQ_CMD_OFFSETBNX2_TPAT_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
28157
 BNX2_TPAT_FTQ_CMD_WR_TOPBNX2_TPAT_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
28158
 BNX2_TPAT_FTQ_CMD_WR_TOP_0BNX2_TPAT_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
28159
 BNX2_TPAT_FTQ_CMD_WR_TOP_1BNX2_TPAT_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
28160
 BNX2_TPAT_FTQ_CMD_SFT_RESETBNX2_TPAT_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
28161
 BNX2_TPAT_FTQ_CMD_RD_DATABNX2_TPAT_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
28162
 BNX2_TPAT_FTQ_CMD_ADD_INTERVENBNX2_TPAT_FTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
28163
 BNX2_TPAT_FTQ_CMD_ADD_DATABNX2_TPAT_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
28164
 BNX2_TPAT_FTQ_CMD_INTERVENE_CLRBNX2_TPAT_FTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
28165
 BNX2_TPAT_FTQ_CMD_POPBNX2_TPAT_FTQ_CMD_POP (1L<<30) bnx2.h 　
28166
 BNX2_TPAT_FTQ_CMD_BUSYBNX2_TPAT_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
28167
 BNX2_TPAT_FTQ_CTLBNX2_TPAT_FTQ_CTL 0x000853fc bnx2.h 　
28168
 BNX2_TPAT_FTQ_CTL_INTERVENEBNX2_TPAT_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
28169
 BNX2_TPAT_FTQ_CTL_OVERFLOWBNX2_TPAT_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
28170
 BNX2_TPAT_FTQ_CTL_FORCE_INTERVEBNX2_TPAT_FTQ_CTL_FORCE_INTERVE (1L<<2) bnx2.h 　
28171
 BNX2_TPAT_FTQ_CTL_MAX_DEPTHBNX2_TPAT_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
28172
 BNX2_TPAT_FTQ_CTL_CUR_DEPTHBNX2_TPAT_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
28173
 BNX2_TPAT_SCRATCHBNX2_TPAT_SCRATCH 0x000a0000 bnx2.h 　
28174
 BNX2_RXP_CPU_MODEBNX2_RXP_CPU_MODE 0x000c5000 bnx2.h 　
28175
 BNX2_RXP_CPU_MODE_LOCAL_RSTBNX2_RXP_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
28176
 BNX2_RXP_CPU_MODE_STEP_ENABNX2_RXP_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
28177
 BNX2_RXP_CPU_MODE_PAGE_0_DATA_EBNX2_RXP_CPU_MODE_PAGE_0_DATA_E (1L<<2) bnx2.h 　
28178
 BNX2_RXP_CPU_MODE_PAGE_0_INST_EBNX2_RXP_CPU_MODE_PAGE_0_INST_E (1L<<3) bnx2.h 　
28179
 BNX2_RXP_CPU_MODE_MSG_BIT1BNX2_RXP_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
28180
 BNX2_RXP_CPU_MODE_INTERRUPT_ENABNX2_RXP_CPU_MODE_INTERRUPT_ENA (1L<<7) bnx2.h 　
28181
 BNX2_RXP_CPU_MODE_SOFT_HALTBNX2_RXP_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
28182
 BNX2_RXP_CPU_MODE_BAD_DATA_HALTBNX2_RXP_CPU_MODE_BAD_DATA_HALT (1L<<11) bnx2.h 　
28183
 BNX2_RXP_CPU_MODE_BAD_INST_HALTBNX2_RXP_CPU_MODE_BAD_INST_HALT (1L<<12) bnx2.h 　
28184
 BNX2_RXP_CPU_MODE_FIO_ABORT_HALBNX2_RXP_CPU_MODE_FIO_ABORT_HAL (1L<<13) bnx2.h 　
28185
 BNX2_RXP_CPU_MODE_SPAD_UNDERFLOBNX2_RXP_CPU_MODE_SPAD_UNDERFLO (1L<<15) bnx2.h 　
28186
 BNX2_RXP_CPU_STATEBNX2_RXP_CPU_STATE 0x000c5004 bnx2.h 　
28187
 BNX2_RXP_CPU_STATE_BREAKPOINTBNX2_RXP_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
28188
 BNX2_RXP_CPU_STATE_BAD_INST_HALBNX2_RXP_CPU_STATE_BAD_INST_HAL (1L<<2) bnx2.h 　
28189
 BNX2_RXP_CPU_STATE_PAGE_0_DATA_BNX2_RXP_CPU_STATE_PAGE_0_DATA_ (1L<<3) bnx2.h 　
28190
 BNX2_RXP_CPU_STATE_PAGE_0_INST_BNX2_RXP_CPU_STATE_PAGE_0_INST_ (1L<<4) bnx2.h 　
28191
 BNX2_RXP_CPU_STATE_BAD_DATA_ADDBNX2_RXP_CPU_STATE_BAD_DATA_ADD (1L<<5) bnx2.h 　
28192
 BNX2_RXP_CPU_STATE_BAD_pc_HALTEBNX2_RXP_CPU_STATE_BAD_pc_HALTE (1L<<6) bnx2.h 　
28193
 BNX2_RXP_CPU_STATE_ALIGN_HALTEDBNX2_RXP_CPU_STATE_ALIGN_HALTED (1L<<7) bnx2.h 　
28194
 BNX2_RXP_CPU_STATE_FIO_ABORT_HABNX2_RXP_CPU_STATE_FIO_ABORT_HA (1L<<8) bnx2.h 　
28195
 BNX2_RXP_CPU_STATE_SOFT_HALTEDBNX2_RXP_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
28196
 BNX2_RXP_CPU_STATE_SPAD_UNDERFLBNX2_RXP_CPU_STATE_SPAD_UNDERFL (1L<<11) bnx2.h 　
28197
 BNX2_RXP_CPU_STATE_INTERRRUPTBNX2_RXP_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
28198
 BNX2_RXP_CPU_STATE_DATA_ACCESS_BNX2_RXP_CPU_STATE_DATA_ACCESS_ (1L<<14) bnx2.h 　
28199
 BNX2_RXP_CPU_STATE_INST_FETCH_SBNX2_RXP_CPU_STATE_INST_FETCH_S (1L<<15) bnx2.h 　
28200
 BNX2_RXP_CPU_STATE_BLOCKED_READBNX2_RXP_CPU_STATE_BLOCKED_READ (1L<<31) bnx2.h 　
28201
 BNX2_RXP_CPU_EVENT_MASKBNX2_RXP_CPU_EVENT_MASK 0x000c5008 bnx2.h 　
28202
 BNX2_RXP_CPU_EVENT_MASK_BREAKPOBNX2_RXP_CPU_EVENT_MASK_BREAKPO (1L<<0) bnx2.h 　
28203
 BNX2_RXP_CPU_EVENT_MASK_BAD_INSBNX2_RXP_CPU_EVENT_MASK_BAD_INS (1L<<2) bnx2.h 　
28204
 BNX2_RXP_CPU_EVENT_MASK_PAGE_0_BNX2_RXP_CPU_EVENT_MASK_PAGE_0_ (1L<<3) bnx2.h 　
28205
 BNX2_RXP_CPU_EVENT_MASK_PAGE_0_BNX2_RXP_CPU_EVENT_MASK_PAGE_0_ (1L<<4) bnx2.h 　
28206
 BNX2_RXP_CPU_EVENT_MASK_BAD_DATBNX2_RXP_CPU_EVENT_MASK_BAD_DAT (1L<<5) bnx2.h 　
28207
 BNX2_RXP_CPU_EVENT_MASK_BAD_PC_BNX2_RXP_CPU_EVENT_MASK_BAD_PC_ (1L<<6) bnx2.h 　
28208
 BNX2_RXP_CPU_EVENT_MASK_ALIGN_HBNX2_RXP_CPU_EVENT_MASK_ALIGN_H (1L<<7) bnx2.h 　
28209
 BNX2_RXP_CPU_EVENT_MASK_FIO_ABOBNX2_RXP_CPU_EVENT_MASK_FIO_ABO (1L<<8) bnx2.h 　
28210
 BNX2_RXP_CPU_EVENT_MASK_SOFT_HABNX2_RXP_CPU_EVENT_MASK_SOFT_HA (1L<<10) bnx2.h 　
28211
 BNX2_RXP_CPU_EVENT_MASK_SPAD_UNBNX2_RXP_CPU_EVENT_MASK_SPAD_UN (1L<<11) bnx2.h 　
28212
 BNX2_RXP_CPU_EVENT_MASK_INTERRUBNX2_RXP_CPU_EVENT_MASK_INTERRU (1L<<12) bnx2.h 　
28213
 BNX2_RXP_CPU_PROGRAM_COUNTERBNX2_RXP_CPU_PROGRAM_COUNTER 0x000c501c bnx2.h 　
28214
 BNX2_RXP_CPU_INSTRUCTIONBNX2_RXP_CPU_INSTRUCTION 0x000c5020 bnx2.h 　
28215
 BNX2_RXP_CPU_DATA_ACCESSBNX2_RXP_CPU_DATA_ACCESS 0x000c5024 bnx2.h 　
28216
 BNX2_RXP_CPU_INTERRUPT_ENABLEBNX2_RXP_CPU_INTERRUPT_ENABLE 0x000c5028 bnx2.h 　
28217
 BNX2_RXP_CPU_INTERRUPT_VECTORBNX2_RXP_CPU_INTERRUPT_VECTOR 0x000c502c bnx2.h 　
28218
 BNX2_RXP_CPU_INTERRUPT_SAVED_PCBNX2_RXP_CPU_INTERRUPT_SAVED_PC 0x000c5030 bnx2.h 　
28219
 BNX2_RXP_CPU_HW_BREAKPOINTBNX2_RXP_CPU_HW_BREAKPOINT 0x000c5034 bnx2.h 　
28220
 BNX2_RXP_CPU_HW_BREAKPOINT_DISABNX2_RXP_CPU_HW_BREAKPOINT_DISA (1L<<0) bnx2.h 　
28221
 BNX2_RXP_CPU_HW_BREAKPOINT_ADDRBNX2_RXP_CPU_HW_BREAKPOINT_ADDR (0x3fffffffL<<2) bnx2.h 　
28222
 BNX2_RXP_CPU_DEBUG_VECT_PEEKBNX2_RXP_CPU_DEBUG_VECT_PEEK 0x000c5038 bnx2.h 　
28223
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_ (0x7ffL<<0) bnx2.h 　
28224
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_ (1L<<11) bnx2.h 　
28225
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_ (0xfL<<12) bnx2.h 　
28226
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_ (0x7ffL<<16) bnx2.h 　
28227
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_ (1L<<27) bnx2.h 　
28228
 BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_ (0xfL<<28) bnx2.h 　
28229
 BNX2_RXP_CPU_LAST_BRANCH_ADDRBNX2_RXP_CPU_LAST_BRANCH_ADDR 0x000c5048 bnx2.h 　
28230
 BNX2_RXP_CPU_LAST_BRANCH_ADDR_TBNX2_RXP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
28231
 BNX2_RXP_CPU_LAST_BRANCH_ADDR_TBNX2_RXP_CPU_LAST_BRANCH_ADDR_T (0L<<1) bnx2.h 　
28232
 BNX2_RXP_CPU_LAST_BRANCH_ADDR_TBNX2_RXP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
28233
 BNX2_RXP_CPU_LAST_BRANCH_ADDR_LBNX2_RXP_CPU_LAST_BRANCH_ADDR_L (0x3fffffffL<<2) bnx2.h 　
28234
 BNX2_RXP_CPU_REG_FILEBNX2_RXP_CPU_REG_FILE 0x000c5200 bnx2.h 　
28235
 BNX2_RXP_CFTQ_DATABNX2_RXP_CFTQ_DATA 0x000c5380 bnx2.h 　
28236
 BNX2_RXP_CFTQ_CMDBNX2_RXP_CFTQ_CMD 0x000c53b8 bnx2.h 　
28237
 BNX2_RXP_CFTQ_CMD_OFFSETBNX2_RXP_CFTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
28238
 BNX2_RXP_CFTQ_CMD_WR_TOPBNX2_RXP_CFTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
28239
 BNX2_RXP_CFTQ_CMD_WR_TOP_0BNX2_RXP_CFTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
28240
 BNX2_RXP_CFTQ_CMD_WR_TOP_1BNX2_RXP_CFTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
28241
 BNX2_RXP_CFTQ_CMD_SFT_RESETBNX2_RXP_CFTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
28242
 BNX2_RXP_CFTQ_CMD_RD_DATABNX2_RXP_CFTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
28243
 BNX2_RXP_CFTQ_CMD_ADD_INTERVENBNX2_RXP_CFTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
28244
 BNX2_RXP_CFTQ_CMD_ADD_DATABNX2_RXP_CFTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
28245
 BNX2_RXP_CFTQ_CMD_INTERVENE_CLRBNX2_RXP_CFTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
28246
 BNX2_RXP_CFTQ_CMD_POPBNX2_RXP_CFTQ_CMD_POP (1L<<30) bnx2.h 　
28247
 BNX2_RXP_CFTQ_CMD_BUSYBNX2_RXP_CFTQ_CMD_BUSY (1L<<31) bnx2.h 　
28248
 BNX2_RXP_CFTQ_CTLBNX2_RXP_CFTQ_CTL 0x000c53bc bnx2.h 　
28249
 BNX2_RXP_CFTQ_CTL_INTERVENEBNX2_RXP_CFTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
28250
 BNX2_RXP_CFTQ_CTL_OVERFLOWBNX2_RXP_CFTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
28251
 BNX2_RXP_CFTQ_CTL_FORCE_INTERVEBNX2_RXP_CFTQ_CTL_FORCE_INTERVE (1L<<2) bnx2.h 　
28252
 BNX2_RXP_CFTQ_CTL_MAX_DEPTHBNX2_RXP_CFTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
28253
 BNX2_RXP_CFTQ_CTL_CUR_DEPTHBNX2_RXP_CFTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
28254
 BNX2_RXP_FTQ_DATABNX2_RXP_FTQ_DATA 0x000c53c0 bnx2.h 　
28255
 BNX2_RXP_FTQ_CMDBNX2_RXP_FTQ_CMD 0x000c53f8 bnx2.h 　
28256
 BNX2_RXP_FTQ_CMD_OFFSETBNX2_RXP_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
28257
 BNX2_RXP_FTQ_CMD_WR_TOPBNX2_RXP_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
28258
 BNX2_RXP_FTQ_CMD_WR_TOP_0BNX2_RXP_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
28259
 BNX2_RXP_FTQ_CMD_WR_TOP_1BNX2_RXP_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
28260
 BNX2_RXP_FTQ_CMD_SFT_RESETBNX2_RXP_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
28261
 BNX2_RXP_FTQ_CMD_RD_DATABNX2_RXP_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
28262
 BNX2_RXP_FTQ_CMD_ADD_INTERVENBNX2_RXP_FTQ_CMD_ADD_INTERVEN (1L<<27) bnx2.h 　
28263
 BNX2_RXP_FTQ_CMD_ADD_DATABNX2_RXP_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
28264
 BNX2_RXP_FTQ_CMD_INTERVENE_CLRBNX2_RXP_FTQ_CMD_INTERVENE_CLR (1L<<29) bnx2.h 　
28265
 BNX2_RXP_FTQ_CMD_POPBNX2_RXP_FTQ_CMD_POP (1L<<30) bnx2.h 　
28266
 BNX2_RXP_FTQ_CMD_BUSYBNX2_RXP_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
28267
 BNX2_RXP_FTQ_CTLBNX2_RXP_FTQ_CTL 0x000c53fc bnx2.h 　
28268
 BNX2_RXP_FTQ_CTL_INTERVENEBNX2_RXP_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
28269
 BNX2_RXP_FTQ_CTL_OVERFLOWBNX2_RXP_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
28270
 BNX2_RXP_FTQ_CTL_FORCE_INTERVENBNX2_RXP_FTQ_CTL_FORCE_INTERVEN (1L<<2) bnx2.h 　
28271
 BNX2_RXP_FTQ_CTL_MAX_DEPTHBNX2_RXP_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
28272
 BNX2_RXP_FTQ_CTL_CUR_DEPTHBNX2_RXP_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
28273
 BNX2_RXP_SCRATCHBNX2_RXP_SCRATCH 0x000e0000 bnx2.h 　
28274
 BNX2_COM_CPU_MODEBNX2_COM_CPU_MODE 0x00105000 bnx2.h 　
28275
 BNX2_COM_CPU_MODE_LOCAL_RSTBNX2_COM_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
28276
 BNX2_COM_CPU_MODE_STEP_ENABNX2_COM_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
28277
 BNX2_COM_CPU_MODE_PAGE_0_DATA_EBNX2_COM_CPU_MODE_PAGE_0_DATA_E (1L<<2) bnx2.h 　
28278
 BNX2_COM_CPU_MODE_PAGE_0_INST_EBNX2_COM_CPU_MODE_PAGE_0_INST_E (1L<<3) bnx2.h 　
28279
 BNX2_COM_CPU_MODE_MSG_BIT1BNX2_COM_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
28280
 BNX2_COM_CPU_MODE_INTERRUPT_ENABNX2_COM_CPU_MODE_INTERRUPT_ENA (1L<<7) bnx2.h 　
28281
 BNX2_COM_CPU_MODE_SOFT_HALTBNX2_COM_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
28282
 BNX2_COM_CPU_MODE_BAD_DATA_HALTBNX2_COM_CPU_MODE_BAD_DATA_HALT (1L<<11) bnx2.h 　
28283
 BNX2_COM_CPU_MODE_BAD_INST_HALTBNX2_COM_CPU_MODE_BAD_INST_HALT (1L<<12) bnx2.h 　
28284
 BNX2_COM_CPU_MODE_FIO_ABORT_HALBNX2_COM_CPU_MODE_FIO_ABORT_HAL (1L<<13) bnx2.h 　
28285
 BNX2_COM_CPU_MODE_SPAD_UNDERFLOBNX2_COM_CPU_MODE_SPAD_UNDERFLO (1L<<15) bnx2.h 　
28286
 BNX2_COM_CPU_STATEBNX2_COM_CPU_STATE 0x00105004 bnx2.h 　
28287
 BNX2_COM_CPU_STATE_BREAKPOINTBNX2_COM_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
28288
 BNX2_COM_CPU_STATE_BAD_INST_HALBNX2_COM_CPU_STATE_BAD_INST_HAL (1L<<2) bnx2.h 　
28289
 BNX2_COM_CPU_STATE_PAGE_0_DATA_BNX2_COM_CPU_STATE_PAGE_0_DATA_ (1L<<3) bnx2.h 　
28290
 BNX2_COM_CPU_STATE_PAGE_0_INST_BNX2_COM_CPU_STATE_PAGE_0_INST_ (1L<<4) bnx2.h 　
28291
 BNX2_COM_CPU_STATE_BAD_DATA_ADDBNX2_COM_CPU_STATE_BAD_DATA_ADD (1L<<5) bnx2.h 　
28292
 BNX2_COM_CPU_STATE_BAD_pc_HALTEBNX2_COM_CPU_STATE_BAD_pc_HALTE (1L<<6) bnx2.h 　
28293
 BNX2_COM_CPU_STATE_ALIGN_HALTEDBNX2_COM_CPU_STATE_ALIGN_HALTED (1L<<7) bnx2.h 　
28294
 BNX2_COM_CPU_STATE_FIO_ABORT_HABNX2_COM_CPU_STATE_FIO_ABORT_HA (1L<<8) bnx2.h 　
28295
 BNX2_COM_CPU_STATE_SOFT_HALTEDBNX2_COM_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
28296
 BNX2_COM_CPU_STATE_SPAD_UNDERFLBNX2_COM_CPU_STATE_SPAD_UNDERFL (1L<<11) bnx2.h 　
28297
 BNX2_COM_CPU_STATE_INTERRRUPTBNX2_COM_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
28298
 BNX2_COM_CPU_STATE_DATA_ACCESS_BNX2_COM_CPU_STATE_DATA_ACCESS_ (1L<<14) bnx2.h 　
28299
 BNX2_COM_CPU_STATE_INST_FETCH_SBNX2_COM_CPU_STATE_INST_FETCH_S (1L<<15) bnx2.h 　
28300
 BNX2_COM_CPU_STATE_BLOCKED_READBNX2_COM_CPU_STATE_BLOCKED_READ (1L<<31) bnx2.h 　
28301
 BNX2_COM_CPU_EVENT_MASKBNX2_COM_CPU_EVENT_MASK 0x00105008 bnx2.h 　
28302
 BNX2_COM_CPU_EVENT_MASK_BREAKPOBNX2_COM_CPU_EVENT_MASK_BREAKPO (1L<<0) bnx2.h 　
28303
 BNX2_COM_CPU_EVENT_MASK_BAD_INSBNX2_COM_CPU_EVENT_MASK_BAD_INS (1L<<2) bnx2.h 　
28304
 BNX2_COM_CPU_EVENT_MASK_PAGE_0_BNX2_COM_CPU_EVENT_MASK_PAGE_0_ (1L<<3) bnx2.h 　
28305
 BNX2_COM_CPU_EVENT_MASK_PAGE_0_BNX2_COM_CPU_EVENT_MASK_PAGE_0_ (1L<<4) bnx2.h 　
28306
 BNX2_COM_CPU_EVENT_MASK_BAD_DATBNX2_COM_CPU_EVENT_MASK_BAD_DAT (1L<<5) bnx2.h 　
28307
 BNX2_COM_CPU_EVENT_MASK_BAD_PC_BNX2_COM_CPU_EVENT_MASK_BAD_PC_ (1L<<6) bnx2.h 　
28308
 BNX2_COM_CPU_EVENT_MASK_ALIGN_HBNX2_COM_CPU_EVENT_MASK_ALIGN_H (1L<<7) bnx2.h 　
28309
 BNX2_COM_CPU_EVENT_MASK_FIO_ABOBNX2_COM_CPU_EVENT_MASK_FIO_ABO (1L<<8) bnx2.h 　
28310
 BNX2_COM_CPU_EVENT_MASK_SOFT_HABNX2_COM_CPU_EVENT_MASK_SOFT_HA (1L<<10) bnx2.h 　
28311
 BNX2_COM_CPU_EVENT_MASK_SPAD_UNBNX2_COM_CPU_EVENT_MASK_SPAD_UN (1L<<11) bnx2.h 　
28312
 BNX2_COM_CPU_EVENT_MASK_INTERRUBNX2_COM_CPU_EVENT_MASK_INTERRU (1L<<12) bnx2.h 　
28313
 BNX2_COM_CPU_PROGRAM_COUNTERBNX2_COM_CPU_PROGRAM_COUNTER 0x0010501c bnx2.h 　
28314
 BNX2_COM_CPU_INSTRUCTIONBNX2_COM_CPU_INSTRUCTION 0x00105020 bnx2.h 　
28315
 BNX2_COM_CPU_DATA_ACCESSBNX2_COM_CPU_DATA_ACCESS 0x00105024 bnx2.h 　
28316
 BNX2_COM_CPU_INTERRUPT_ENABLEBNX2_COM_CPU_INTERRUPT_ENABLE 0x00105028 bnx2.h 　
28317
 BNX2_COM_CPU_INTERRUPT_VECTORBNX2_COM_CPU_INTERRUPT_VECTOR 0x0010502c bnx2.h 　
28318
 BNX2_COM_CPU_INTERRUPT_SAVED_PCBNX2_COM_CPU_INTERRUPT_SAVED_PC 0x00105030 bnx2.h 　
28319
 BNX2_COM_CPU_HW_BREAKPOINTBNX2_COM_CPU_HW_BREAKPOINT 0x00105034 bnx2.h 　
28320
 BNX2_COM_CPU_HW_BREAKPOINT_DISABNX2_COM_CPU_HW_BREAKPOINT_DISA (1L<<0) bnx2.h 　
28321
 BNX2_COM_CPU_HW_BREAKPOINT_ADDRBNX2_COM_CPU_HW_BREAKPOINT_ADDR (0x3fffffffL<<2) bnx2.h 　
28322
 BNX2_COM_CPU_DEBUG_VECT_PEEKBNX2_COM_CPU_DEBUG_VECT_PEEK 0x00105038 bnx2.h 　
28323
 BNX2_COM_CPU_DEBUG_VECT_PEEK_1_BNX2_COM_CPU_DEBUG_VECT_PEEK_1_ (0x7ffL<<0) bnx2.h 　
28324
 BNX2_COM_CPU_DEBUG_VECT_PEEK_1_BNX2_COM_CPU_DEBUG_VECT_PEEK_1_ (1L<<11) bnx2.h 　
28325
 BNX2_COM_CPU_DEBUG_VECT_PEEK_1_BNX2_COM_CPU_DEBUG_VECT_PEEK_1_ (0xfL<<12) bnx2.h 　
28326
 BNX2_COM_CPU_DEBUG_VECT_PEEK_2_BNX2_COM_CPU_DEBUG_VECT_PEEK_2_ (0x7ffL<<16) bnx2.h 　
28327
 BNX2_COM_CPU_DEBUG_VECT_PEEK_2_BNX2_COM_CPU_DEBUG_VECT_PEEK_2_ (1L<<27) bnx2.h 　
28328
 BNX2_COM_CPU_DEBUG_VECT_PEEK_2_BNX2_COM_CPU_DEBUG_VECT_PEEK_2_ (0xfL<<28) bnx2.h 　
28329
 BNX2_COM_CPU_LAST_BRANCH_ADDRBNX2_COM_CPU_LAST_BRANCH_ADDR 0x00105048 bnx2.h 　
28330
 BNX2_COM_CPU_LAST_BRANCH_ADDR_TBNX2_COM_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
28331
 BNX2_COM_CPU_LAST_BRANCH_ADDR_TBNX2_COM_CPU_LAST_BRANCH_ADDR_T (0L<<1) bnx2.h 　
28332
 BNX2_COM_CPU_LAST_BRANCH_ADDR_TBNX2_COM_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
28333
 BNX2_COM_CPU_LAST_BRANCH_ADDR_LBNX2_COM_CPU_LAST_BRANCH_ADDR_L (0x3fffffffL<<2) bnx2.h 　
28334
 BNX2_COM_CPU_REG_FILEBNX2_COM_CPU_REG_FILE 0x00105200 bnx2.h 　
28335
 BNX2_COM_COMXQ_FTQ_DATABNX2_COM_COMXQ_FTQ_DATA 0x00105340 bnx2.h 　
28336
 BNX2_COM_COMXQ_FTQ_CMDBNX2_COM_COMXQ_FTQ_CMD 0x00105378 bnx2.h 　
28337
 BNX2_COM_COMXQ_FTQ_CMD_OFFSETBNX2_COM_COMXQ_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
28338
 BNX2_COM_COMXQ_FTQ_CMD_WR_TOPBNX2_COM_COMXQ_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
28339
 BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
28340
 BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
28341
 BNX2_COM_COMXQ_FTQ_CMD_SFT_RESEBNX2_COM_COMXQ_FTQ_CMD_SFT_RESE (1L<<25) bnx2.h 　
28342
 BNX2_COM_COMXQ_FTQ_CMD_RD_DATABNX2_COM_COMXQ_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
28343
 BNX2_COM_COMXQ_FTQ_CMD_ADD_INTEBNX2_COM_COMXQ_FTQ_CMD_ADD_INTE (1L<<27) bnx2.h 　
28344
 BNX2_COM_COMXQ_FTQ_CMD_ADD_DATABNX2_COM_COMXQ_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
28345
 BNX2_COM_COMXQ_FTQ_CMD_INTERVENBNX2_COM_COMXQ_FTQ_CMD_INTERVEN (1L<<29) bnx2.h 　
28346
 BNX2_COM_COMXQ_FTQ_CMD_POPBNX2_COM_COMXQ_FTQ_CMD_POP (1L<<30) bnx2.h 　
28347
 BNX2_COM_COMXQ_FTQ_CMD_BUSYBNX2_COM_COMXQ_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
28348
 BNX2_COM_COMXQ_FTQ_CTLBNX2_COM_COMXQ_FTQ_CTL 0x0010537c bnx2.h 　
28349
 BNX2_COM_COMXQ_FTQ_CTL_INTERVENBNX2_COM_COMXQ_FTQ_CTL_INTERVEN (1L<<0) bnx2.h 　
28350
 BNX2_COM_COMXQ_FTQ_CTL_OVERFLOWBNX2_COM_COMXQ_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
28351
 BNX2_COM_COMXQ_FTQ_CTL_FORCE_INBNX2_COM_COMXQ_FTQ_CTL_FORCE_IN (1L<<2) bnx2.h 　
28352
 BNX2_COM_COMXQ_FTQ_CTL_MAX_DEPTBNX2_COM_COMXQ_FTQ_CTL_MAX_DEPT (0x3ffL<<12) bnx2.h 　
28353
 BNX2_COM_COMXQ_FTQ_CTL_CUR_DEPTBNX2_COM_COMXQ_FTQ_CTL_CUR_DEPT (0x3ffL<<22) bnx2.h 　
28354
 BNX2_COM_COMTQ_FTQ_DATABNX2_COM_COMTQ_FTQ_DATA 0x00105380 bnx2.h 　
28355
 BNX2_COM_COMTQ_FTQ_CMDBNX2_COM_COMTQ_FTQ_CMD 0x001053b8 bnx2.h 　
28356
 BNX2_COM_COMTQ_FTQ_CMD_OFFSETBNX2_COM_COMTQ_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
28357
 BNX2_COM_COMTQ_FTQ_CMD_WR_TOPBNX2_COM_COMTQ_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
28358
 BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
28359
 BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
28360
 BNX2_COM_COMTQ_FTQ_CMD_SFT_RESEBNX2_COM_COMTQ_FTQ_CMD_SFT_RESE (1L<<25) bnx2.h 　
28361
 BNX2_COM_COMTQ_FTQ_CMD_RD_DATABNX2_COM_COMTQ_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
28362
 BNX2_COM_COMTQ_FTQ_CMD_ADD_INTEBNX2_COM_COMTQ_FTQ_CMD_ADD_INTE (1L<<27) bnx2.h 　
28363
 BNX2_COM_COMTQ_FTQ_CMD_ADD_DATABNX2_COM_COMTQ_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
28364
 BNX2_COM_COMTQ_FTQ_CMD_INTERVENBNX2_COM_COMTQ_FTQ_CMD_INTERVEN (1L<<29) bnx2.h 　
28365
 BNX2_COM_COMTQ_FTQ_CMD_POPBNX2_COM_COMTQ_FTQ_CMD_POP (1L<<30) bnx2.h 　
28366
 BNX2_COM_COMTQ_FTQ_CMD_BUSYBNX2_COM_COMTQ_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
28367
 BNX2_COM_COMTQ_FTQ_CTLBNX2_COM_COMTQ_FTQ_CTL 0x001053bc bnx2.h 　
28368
 BNX2_COM_COMTQ_FTQ_CTL_INTERVENBNX2_COM_COMTQ_FTQ_CTL_INTERVEN (1L<<0) bnx2.h 　
28369
 BNX2_COM_COMTQ_FTQ_CTL_OVERFLOWBNX2_COM_COMTQ_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
28370
 BNX2_COM_COMTQ_FTQ_CTL_FORCE_INBNX2_COM_COMTQ_FTQ_CTL_FORCE_IN (1L<<2) bnx2.h 　
28371
 BNX2_COM_COMTQ_FTQ_CTL_MAX_DEPTBNX2_COM_COMTQ_FTQ_CTL_MAX_DEPT (0x3ffL<<12) bnx2.h 　
28372
 BNX2_COM_COMTQ_FTQ_CTL_CUR_DEPTBNX2_COM_COMTQ_FTQ_CTL_CUR_DEPT (0x3ffL<<22) bnx2.h 　
28373
 BNX2_COM_COMQ_FTQ_DATABNX2_COM_COMQ_FTQ_DATA 0x001053c0 bnx2.h 　
28374
 BNX2_COM_COMQ_FTQ_CMDBNX2_COM_COMQ_FTQ_CMD 0x001053f8 bnx2.h 　
28375
 BNX2_COM_COMQ_FTQ_CMD_OFFSETBNX2_COM_COMQ_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
28376
 BNX2_COM_COMQ_FTQ_CMD_WR_TOPBNX2_COM_COMQ_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
28377
 BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
28378
 BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
28379
 BNX2_COM_COMQ_FTQ_CMD_SFT_RESETBNX2_COM_COMQ_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
28380
 BNX2_COM_COMQ_FTQ_CMD_RD_DATABNX2_COM_COMQ_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
28381
 BNX2_COM_COMQ_FTQ_CMD_ADD_INTERBNX2_COM_COMQ_FTQ_CMD_ADD_INTER (1L<<27) bnx2.h 　
28382
 BNX2_COM_COMQ_FTQ_CMD_ADD_DATABNX2_COM_COMQ_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
28383
 BNX2_COM_COMQ_FTQ_CMD_INTERVENEBNX2_COM_COMQ_FTQ_CMD_INTERVENE (1L<<29) bnx2.h 　
28384
 BNX2_COM_COMQ_FTQ_CMD_POPBNX2_COM_COMQ_FTQ_CMD_POP (1L<<30) bnx2.h 　
28385
 BNX2_COM_COMQ_FTQ_CMD_BUSYBNX2_COM_COMQ_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
28386
 BNX2_COM_COMQ_FTQ_CTLBNX2_COM_COMQ_FTQ_CTL 0x001053fc bnx2.h 　
28387
 BNX2_COM_COMQ_FTQ_CTL_INTERVENEBNX2_COM_COMQ_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
28388
 BNX2_COM_COMQ_FTQ_CTL_OVERFLOWBNX2_COM_COMQ_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
28389
 BNX2_COM_COMQ_FTQ_CTL_FORCE_INTBNX2_COM_COMQ_FTQ_CTL_FORCE_INT (1L<<2) bnx2.h 　
28390
 BNX2_COM_COMQ_FTQ_CTL_MAX_DEPTHBNX2_COM_COMQ_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
28391
 BNX2_COM_COMQ_FTQ_CTL_CUR_DEPTHBNX2_COM_COMQ_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
28392
 BNX2_COM_SCRATCHBNX2_COM_SCRATCH 0x00120000 bnx2.h 　
28393
 BNX2_CP_CPU_MODEBNX2_CP_CPU_MODE 0x00185000 bnx2.h 　
28394
 BNX2_CP_CPU_MODE_LOCAL_RSTBNX2_CP_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
28395
 BNX2_CP_CPU_MODE_STEP_ENABNX2_CP_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
28396
 BNX2_CP_CPU_MODE_PAGE_0_DATA_ENBNX2_CP_CPU_MODE_PAGE_0_DATA_EN (1L<<2) bnx2.h 　
28397
 BNX2_CP_CPU_MODE_PAGE_0_INST_ENBNX2_CP_CPU_MODE_PAGE_0_INST_EN (1L<<3) bnx2.h 　
28398
 BNX2_CP_CPU_MODE_MSG_BIT1BNX2_CP_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
28399
 BNX2_CP_CPU_MODE_INTERRUPT_ENABNX2_CP_CPU_MODE_INTERRUPT_ENA (1L<<7) bnx2.h 　
28400
 BNX2_CP_CPU_MODE_SOFT_HALTBNX2_CP_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
28401
 BNX2_CP_CPU_MODE_BAD_DATA_HALT_BNX2_CP_CPU_MODE_BAD_DATA_HALT_ (1L<<11) bnx2.h 　
28402
 BNX2_CP_CPU_MODE_BAD_INST_HALT_BNX2_CP_CPU_MODE_BAD_INST_HALT_ (1L<<12) bnx2.h 　
28403
 BNX2_CP_CPU_MODE_FIO_ABORT_HALTBNX2_CP_CPU_MODE_FIO_ABORT_HALT (1L<<13) bnx2.h 　
28404
 BNX2_CP_CPU_MODE_SPAD_UNDERFLOWBNX2_CP_CPU_MODE_SPAD_UNDERFLOW (1L<<15) bnx2.h 　
28405
 BNX2_CP_CPU_STATEBNX2_CP_CPU_STATE 0x00185004 bnx2.h 　
28406
 BNX2_CP_CPU_STATE_BREAKPOINTBNX2_CP_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
28407
 BNX2_CP_CPU_STATE_BAD_INST_HALTBNX2_CP_CPU_STATE_BAD_INST_HALT (1L<<2) bnx2.h 　
28408
 BNX2_CP_CPU_STATE_PAGE_0_DATA_HBNX2_CP_CPU_STATE_PAGE_0_DATA_H (1L<<3) bnx2.h 　
28409
 BNX2_CP_CPU_STATE_PAGE_0_INST_HBNX2_CP_CPU_STATE_PAGE_0_INST_H (1L<<4) bnx2.h 　
28410
 BNX2_CP_CPU_STATE_BAD_DATA_ADDRBNX2_CP_CPU_STATE_BAD_DATA_ADDR (1L<<5) bnx2.h 　
28411
 BNX2_CP_CPU_STATE_BAD_pc_HALTEDBNX2_CP_CPU_STATE_BAD_pc_HALTED (1L<<6) bnx2.h 　
28412
 BNX2_CP_CPU_STATE_ALIGN_HALTEDBNX2_CP_CPU_STATE_ALIGN_HALTED (1L<<7) bnx2.h 　
28413
 BNX2_CP_CPU_STATE_FIO_ABORT_HALBNX2_CP_CPU_STATE_FIO_ABORT_HAL (1L<<8) bnx2.h 　
28414
 BNX2_CP_CPU_STATE_SOFT_HALTEDBNX2_CP_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
28415
 BNX2_CP_CPU_STATE_SPAD_UNDERFLOBNX2_CP_CPU_STATE_SPAD_UNDERFLO (1L<<11) bnx2.h 　
28416
 BNX2_CP_CPU_STATE_INTERRRUPTBNX2_CP_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
28417
 BNX2_CP_CPU_STATE_DATA_ACCESS_SBNX2_CP_CPU_STATE_DATA_ACCESS_S (1L<<14) bnx2.h 　
28418
 BNX2_CP_CPU_STATE_INST_FETCH_STBNX2_CP_CPU_STATE_INST_FETCH_ST (1L<<15) bnx2.h 　
28419
 BNX2_CP_CPU_STATE_BLOCKED_READBNX2_CP_CPU_STATE_BLOCKED_READ (1L<<31) bnx2.h 　
28420
 BNX2_CP_CPU_EVENT_MASKBNX2_CP_CPU_EVENT_MASK 0x00185008 bnx2.h 　
28421
 BNX2_CP_CPU_EVENT_MASK_BREAKPOIBNX2_CP_CPU_EVENT_MASK_BREAKPOI (1L<<0) bnx2.h 　
28422
 BNX2_CP_CPU_EVENT_MASK_BAD_INSTBNX2_CP_CPU_EVENT_MASK_BAD_INST (1L<<2) bnx2.h 　
28423
 BNX2_CP_CPU_EVENT_MASK_PAGE_0_DBNX2_CP_CPU_EVENT_MASK_PAGE_0_D (1L<<3) bnx2.h 　
28424
 BNX2_CP_CPU_EVENT_MASK_PAGE_0_IBNX2_CP_CPU_EVENT_MASK_PAGE_0_I (1L<<4) bnx2.h 　
28425
 BNX2_CP_CPU_EVENT_MASK_BAD_DATABNX2_CP_CPU_EVENT_MASK_BAD_DATA (1L<<5) bnx2.h 　
28426
 BNX2_CP_CPU_EVENT_MASK_BAD_PC_HBNX2_CP_CPU_EVENT_MASK_BAD_PC_H (1L<<6) bnx2.h 　
28427
 BNX2_CP_CPU_EVENT_MASK_ALIGN_HABNX2_CP_CPU_EVENT_MASK_ALIGN_HA (1L<<7) bnx2.h 　
28428
 BNX2_CP_CPU_EVENT_MASK_FIO_ABORBNX2_CP_CPU_EVENT_MASK_FIO_ABOR (1L<<8) bnx2.h 　
28429
 BNX2_CP_CPU_EVENT_MASK_SOFT_HALBNX2_CP_CPU_EVENT_MASK_SOFT_HAL (1L<<10) bnx2.h 　
28430
 BNX2_CP_CPU_EVENT_MASK_SPAD_UNDBNX2_CP_CPU_EVENT_MASK_SPAD_UND (1L<<11) bnx2.h 　
28431
 BNX2_CP_CPU_EVENT_MASK_INTERRUPBNX2_CP_CPU_EVENT_MASK_INTERRUP (1L<<12) bnx2.h 　
28432
 BNX2_CP_CPU_PROGRAM_COUNTERBNX2_CP_CPU_PROGRAM_COUNTER 0x0018501c bnx2.h 　
28433
 BNX2_CP_CPU_INSTRUCTIONBNX2_CP_CPU_INSTRUCTION 0x00185020 bnx2.h 　
28434
 BNX2_CP_CPU_DATA_ACCESSBNX2_CP_CPU_DATA_ACCESS 0x00185024 bnx2.h 　
28435
 BNX2_CP_CPU_INTERRUPT_ENABLEBNX2_CP_CPU_INTERRUPT_ENABLE 0x00185028 bnx2.h 　
28436
 BNX2_CP_CPU_INTERRUPT_VECTORBNX2_CP_CPU_INTERRUPT_VECTOR 0x0018502c bnx2.h 　
28437
 BNX2_CP_CPU_INTERRUPT_SAVED_PCBNX2_CP_CPU_INTERRUPT_SAVED_PC 0x00185030 bnx2.h 　
28438
 BNX2_CP_CPU_HW_BREAKPOINTBNX2_CP_CPU_HW_BREAKPOINT 0x00185034 bnx2.h 　
28439
 BNX2_CP_CPU_HW_BREAKPOINT_DISABBNX2_CP_CPU_HW_BREAKPOINT_DISAB (1L<<0) bnx2.h 　
28440
 BNX2_CP_CPU_HW_BREAKPOINT_ADDREBNX2_CP_CPU_HW_BREAKPOINT_ADDRE (0x3fffffffL<<2) bnx2.h 　
28441
 BNX2_CP_CPU_DEBUG_VECT_PEEKBNX2_CP_CPU_DEBUG_VECT_PEEK 0x00185038 bnx2.h 　
28442
 BNX2_CP_CPU_DEBUG_VECT_PEEK_1_VBNX2_CP_CPU_DEBUG_VECT_PEEK_1_V (0x7ffL<<0) bnx2.h 　
28443
 BNX2_CP_CPU_DEBUG_VECT_PEEK_1_PBNX2_CP_CPU_DEBUG_VECT_PEEK_1_P (1L<<11) bnx2.h 　
28444
 BNX2_CP_CPU_DEBUG_VECT_PEEK_1_SBNX2_CP_CPU_DEBUG_VECT_PEEK_1_S (0xfL<<12) bnx2.h 　
28445
 BNX2_CP_CPU_DEBUG_VECT_PEEK_2_VBNX2_CP_CPU_DEBUG_VECT_PEEK_2_V (0x7ffL<<16) bnx2.h 　
28446
 BNX2_CP_CPU_DEBUG_VECT_PEEK_2_PBNX2_CP_CPU_DEBUG_VECT_PEEK_2_P (1L<<27) bnx2.h 　
28447
 BNX2_CP_CPU_DEBUG_VECT_PEEK_2_SBNX2_CP_CPU_DEBUG_VECT_PEEK_2_S (0xfL<<28) bnx2.h 　
28448
 BNX2_CP_CPU_LAST_BRANCH_ADDRBNX2_CP_CPU_LAST_BRANCH_ADDR 0x00185048 bnx2.h 　
28449
 BNX2_CP_CPU_LAST_BRANCH_ADDR_TYBNX2_CP_CPU_LAST_BRANCH_ADDR_TY (1L<<1) bnx2.h 　
28450
 BNX2_CP_CPU_LAST_BRANCH_ADDR_TYBNX2_CP_CPU_LAST_BRANCH_ADDR_TY (0L<<1) bnx2.h 　
28451
 BNX2_CP_CPU_LAST_BRANCH_ADDR_TYBNX2_CP_CPU_LAST_BRANCH_ADDR_TY (1L<<1) bnx2.h 　
28452
 BNX2_CP_CPU_LAST_BRANCH_ADDR_LBBNX2_CP_CPU_LAST_BRANCH_ADDR_LB (0x3fffffffL<<2) bnx2.h 　
28453
 BNX2_CP_CPU_REG_FILEBNX2_CP_CPU_REG_FILE 0x00185200 bnx2.h 　
28454
 BNX2_CP_CPQ_FTQ_DATABNX2_CP_CPQ_FTQ_DATA 0x001853c0 bnx2.h 　
28455
 BNX2_CP_CPQ_FTQ_CMDBNX2_CP_CPQ_FTQ_CMD 0x001853f8 bnx2.h 　
28456
 BNX2_CP_CPQ_FTQ_CMD_OFFSETBNX2_CP_CPQ_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
28457
 BNX2_CP_CPQ_FTQ_CMD_WR_TOPBNX2_CP_CPQ_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
28458
 BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
28459
 BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
28460
 BNX2_CP_CPQ_FTQ_CMD_SFT_RESETBNX2_CP_CPQ_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
28461
 BNX2_CP_CPQ_FTQ_CMD_RD_DATABNX2_CP_CPQ_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
28462
 BNX2_CP_CPQ_FTQ_CMD_ADD_INTERVEBNX2_CP_CPQ_FTQ_CMD_ADD_INTERVE (1L<<27) bnx2.h 　
28463
 BNX2_CP_CPQ_FTQ_CMD_ADD_DATABNX2_CP_CPQ_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
28464
 BNX2_CP_CPQ_FTQ_CMD_INTERVENE_CBNX2_CP_CPQ_FTQ_CMD_INTERVENE_C (1L<<29) bnx2.h 　
28465
 BNX2_CP_CPQ_FTQ_CMD_POPBNX2_CP_CPQ_FTQ_CMD_POP (1L<<30) bnx2.h 　
28466
 BNX2_CP_CPQ_FTQ_CMD_BUSYBNX2_CP_CPQ_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
28467
 BNX2_CP_CPQ_FTQ_CTLBNX2_CP_CPQ_FTQ_CTL 0x001853fc bnx2.h 　
28468
 BNX2_CP_CPQ_FTQ_CTL_INTERVENEBNX2_CP_CPQ_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
28469
 BNX2_CP_CPQ_FTQ_CTL_OVERFLOWBNX2_CP_CPQ_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
28470
 BNX2_CP_CPQ_FTQ_CTL_FORCE_INTERBNX2_CP_CPQ_FTQ_CTL_FORCE_INTER (1L<<2) bnx2.h 　
28471
 BNX2_CP_CPQ_FTQ_CTL_MAX_DEPTHBNX2_CP_CPQ_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
28472
 BNX2_CP_CPQ_FTQ_CTL_CUR_DEPTHBNX2_CP_CPQ_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
28473
 BNX2_CP_SCRATCHBNX2_CP_SCRATCH 0x001a0000 bnx2.h 　
28474
 BNX2_MCP_CPU_MODEBNX2_MCP_CPU_MODE 0x00145000 bnx2.h 　
28475
 BNX2_MCP_CPU_MODE_LOCAL_RSTBNX2_MCP_CPU_MODE_LOCAL_RST (1L<<0) bnx2.h 　
28476
 BNX2_MCP_CPU_MODE_STEP_ENABNX2_MCP_CPU_MODE_STEP_ENA (1L<<1) bnx2.h 　
28477
 BNX2_MCP_CPU_MODE_PAGE_0_DATA_EBNX2_MCP_CPU_MODE_PAGE_0_DATA_E (1L<<2) bnx2.h 　
28478
 BNX2_MCP_CPU_MODE_PAGE_0_INST_EBNX2_MCP_CPU_MODE_PAGE_0_INST_E (1L<<3) bnx2.h 　
28479
 BNX2_MCP_CPU_MODE_MSG_BIT1BNX2_MCP_CPU_MODE_MSG_BIT1 (1L<<6) bnx2.h 　
28480
 BNX2_MCP_CPU_MODE_INTERRUPT_ENABNX2_MCP_CPU_MODE_INTERRUPT_ENA (1L<<7) bnx2.h 　
28481
 BNX2_MCP_CPU_MODE_SOFT_HALTBNX2_MCP_CPU_MODE_SOFT_HALT (1L<<10) bnx2.h 　
28482
 BNX2_MCP_CPU_MODE_BAD_DATA_HALTBNX2_MCP_CPU_MODE_BAD_DATA_HALT (1L<<11) bnx2.h 　
28483
 BNX2_MCP_CPU_MODE_BAD_INST_HALTBNX2_MCP_CPU_MODE_BAD_INST_HALT (1L<<12) bnx2.h 　
28484
 BNX2_MCP_CPU_MODE_FIO_ABORT_HALBNX2_MCP_CPU_MODE_FIO_ABORT_HAL (1L<<13) bnx2.h 　
28485
 BNX2_MCP_CPU_MODE_SPAD_UNDERFLOBNX2_MCP_CPU_MODE_SPAD_UNDERFLO (1L<<15) bnx2.h 　
28486
 BNX2_MCP_CPU_STATEBNX2_MCP_CPU_STATE 0x00145004 bnx2.h 　
28487
 BNX2_MCP_CPU_STATE_BREAKPOINTBNX2_MCP_CPU_STATE_BREAKPOINT (1L<<0) bnx2.h 　
28488
 BNX2_MCP_CPU_STATE_BAD_INST_HALBNX2_MCP_CPU_STATE_BAD_INST_HAL (1L<<2) bnx2.h 　
28489
 BNX2_MCP_CPU_STATE_PAGE_0_DATA_BNX2_MCP_CPU_STATE_PAGE_0_DATA_ (1L<<3) bnx2.h 　
28490
 BNX2_MCP_CPU_STATE_PAGE_0_INST_BNX2_MCP_CPU_STATE_PAGE_0_INST_ (1L<<4) bnx2.h 　
28491
 BNX2_MCP_CPU_STATE_BAD_DATA_ADDBNX2_MCP_CPU_STATE_BAD_DATA_ADD (1L<<5) bnx2.h 　
28492
 BNX2_MCP_CPU_STATE_BAD_pc_HALTEBNX2_MCP_CPU_STATE_BAD_pc_HALTE (1L<<6) bnx2.h 　
28493
 BNX2_MCP_CPU_STATE_ALIGN_HALTEDBNX2_MCP_CPU_STATE_ALIGN_HALTED (1L<<7) bnx2.h 　
28494
 BNX2_MCP_CPU_STATE_FIO_ABORT_HABNX2_MCP_CPU_STATE_FIO_ABORT_HA (1L<<8) bnx2.h 　
28495
 BNX2_MCP_CPU_STATE_SOFT_HALTEDBNX2_MCP_CPU_STATE_SOFT_HALTED (1L<<10) bnx2.h 　
28496
 BNX2_MCP_CPU_STATE_SPAD_UNDERFLBNX2_MCP_CPU_STATE_SPAD_UNDERFL (1L<<11) bnx2.h 　
28497
 BNX2_MCP_CPU_STATE_INTERRRUPTBNX2_MCP_CPU_STATE_INTERRRUPT (1L<<12) bnx2.h 　
28498
 BNX2_MCP_CPU_STATE_DATA_ACCESS_BNX2_MCP_CPU_STATE_DATA_ACCESS_ (1L<<14) bnx2.h 　
28499
 BNX2_MCP_CPU_STATE_INST_FETCH_SBNX2_MCP_CPU_STATE_INST_FETCH_S (1L<<15) bnx2.h 　
28500
 BNX2_MCP_CPU_STATE_BLOCKED_READBNX2_MCP_CPU_STATE_BLOCKED_READ (1L<<31) bnx2.h 　
28501
 BNX2_MCP_CPU_EVENT_MASKBNX2_MCP_CPU_EVENT_MASK 0x00145008 bnx2.h 　
28502
 BNX2_MCP_CPU_EVENT_MASK_BREAKPOBNX2_MCP_CPU_EVENT_MASK_BREAKPO (1L<<0) bnx2.h 　
28503
 BNX2_MCP_CPU_EVENT_MASK_BAD_INSBNX2_MCP_CPU_EVENT_MASK_BAD_INS (1L<<2) bnx2.h 　
28504
 BNX2_MCP_CPU_EVENT_MASK_PAGE_0_BNX2_MCP_CPU_EVENT_MASK_PAGE_0_ (1L<<3) bnx2.h 　
28505
 BNX2_MCP_CPU_EVENT_MASK_PAGE_0_BNX2_MCP_CPU_EVENT_MASK_PAGE_0_ (1L<<4) bnx2.h 　
28506
 BNX2_MCP_CPU_EVENT_MASK_BAD_DATBNX2_MCP_CPU_EVENT_MASK_BAD_DAT (1L<<5) bnx2.h 　
28507
 BNX2_MCP_CPU_EVENT_MASK_BAD_PC_BNX2_MCP_CPU_EVENT_MASK_BAD_PC_ (1L<<6) bnx2.h 　
28508
 BNX2_MCP_CPU_EVENT_MASK_ALIGN_HBNX2_MCP_CPU_EVENT_MASK_ALIGN_H (1L<<7) bnx2.h 　
28509
 BNX2_MCP_CPU_EVENT_MASK_FIO_ABOBNX2_MCP_CPU_EVENT_MASK_FIO_ABO (1L<<8) bnx2.h 　
28510
 BNX2_MCP_CPU_EVENT_MASK_SOFT_HABNX2_MCP_CPU_EVENT_MASK_SOFT_HA (1L<<10) bnx2.h 　
28511
 BNX2_MCP_CPU_EVENT_MASK_SPAD_UNBNX2_MCP_CPU_EVENT_MASK_SPAD_UN (1L<<11) bnx2.h 　
28512
 BNX2_MCP_CPU_EVENT_MASK_INTERRUBNX2_MCP_CPU_EVENT_MASK_INTERRU (1L<<12) bnx2.h 　
28513
 BNX2_MCP_CPU_PROGRAM_COUNTERBNX2_MCP_CPU_PROGRAM_COUNTER 0x0014501c bnx2.h 　
28514
 BNX2_MCP_CPU_INSTRUCTIONBNX2_MCP_CPU_INSTRUCTION 0x00145020 bnx2.h 　
28515
 BNX2_MCP_CPU_DATA_ACCESSBNX2_MCP_CPU_DATA_ACCESS 0x00145024 bnx2.h 　
28516
 BNX2_MCP_CPU_INTERRUPT_ENABLEBNX2_MCP_CPU_INTERRUPT_ENABLE 0x00145028 bnx2.h 　
28517
 BNX2_MCP_CPU_INTERRUPT_VECTORBNX2_MCP_CPU_INTERRUPT_VECTOR 0x0014502c bnx2.h 　
28518
 BNX2_MCP_CPU_INTERRUPT_SAVED_PCBNX2_MCP_CPU_INTERRUPT_SAVED_PC 0x00145030 bnx2.h 　
28519
 BNX2_MCP_CPU_HW_BREAKPOINTBNX2_MCP_CPU_HW_BREAKPOINT 0x00145034 bnx2.h 　
28520
 BNX2_MCP_CPU_HW_BREAKPOINT_DISABNX2_MCP_CPU_HW_BREAKPOINT_DISA (1L<<0) bnx2.h 　
28521
 BNX2_MCP_CPU_HW_BREAKPOINT_ADDRBNX2_MCP_CPU_HW_BREAKPOINT_ADDR (0x3fffffffL<<2) bnx2.h 　
28522
 BNX2_MCP_CPU_DEBUG_VECT_PEEKBNX2_MCP_CPU_DEBUG_VECT_PEEK 0x00145038 bnx2.h 　
28523
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_ (0x7ffL<<0) bnx2.h 　
28524
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_ (1L<<11) bnx2.h 　
28525
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_ (0xfL<<12) bnx2.h 　
28526
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_ (0x7ffL<<16) bnx2.h 　
28527
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_ (1L<<27) bnx2.h 　
28528
 BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_ (0xfL<<28) bnx2.h 　
28529
 BNX2_MCP_CPU_LAST_BRANCH_ADDRBNX2_MCP_CPU_LAST_BRANCH_ADDR 0x00145048 bnx2.h 　
28530
 BNX2_MCP_CPU_LAST_BRANCH_ADDR_TBNX2_MCP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
28531
 BNX2_MCP_CPU_LAST_BRANCH_ADDR_TBNX2_MCP_CPU_LAST_BRANCH_ADDR_T (0L<<1) bnx2.h 　
28532
 BNX2_MCP_CPU_LAST_BRANCH_ADDR_TBNX2_MCP_CPU_LAST_BRANCH_ADDR_T (1L<<1) bnx2.h 　
28533
 BNX2_MCP_CPU_LAST_BRANCH_ADDR_LBNX2_MCP_CPU_LAST_BRANCH_ADDR_L (0x3fffffffL<<2) bnx2.h 　
28534
 BNX2_MCP_CPU_REG_FILEBNX2_MCP_CPU_REG_FILE 0x00145200 bnx2.h 　
28535
 BNX2_MCP_MCPQ_FTQ_DATABNX2_MCP_MCPQ_FTQ_DATA 0x001453c0 bnx2.h 　
28536
 BNX2_MCP_MCPQ_FTQ_CMDBNX2_MCP_MCPQ_FTQ_CMD 0x001453f8 bnx2.h 　
28537
 BNX2_MCP_MCPQ_FTQ_CMD_OFFSETBNX2_MCP_MCPQ_FTQ_CMD_OFFSET (0x3ffL<<0) bnx2.h 　
28538
 BNX2_MCP_MCPQ_FTQ_CMD_WR_TOPBNX2_MCP_MCPQ_FTQ_CMD_WR_TOP (1L<<10) bnx2.h 　
28539
 BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0 (0L<<10) bnx2.h 　
28540
 BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1 (1L<<10) bnx2.h 　
28541
 BNX2_MCP_MCPQ_FTQ_CMD_SFT_RESETBNX2_MCP_MCPQ_FTQ_CMD_SFT_RESET (1L<<25) bnx2.h 　
28542
 BNX2_MCP_MCPQ_FTQ_CMD_RD_DATABNX2_MCP_MCPQ_FTQ_CMD_RD_DATA (1L<<26) bnx2.h 　
28543
 BNX2_MCP_MCPQ_FTQ_CMD_ADD_INTERBNX2_MCP_MCPQ_FTQ_CMD_ADD_INTER (1L<<27) bnx2.h 　
28544
 BNX2_MCP_MCPQ_FTQ_CMD_ADD_DATABNX2_MCP_MCPQ_FTQ_CMD_ADD_DATA (1L<<28) bnx2.h 　
28545
 BNX2_MCP_MCPQ_FTQ_CMD_INTERVENEBNX2_MCP_MCPQ_FTQ_CMD_INTERVENE (1L<<29) bnx2.h 　
28546
 BNX2_MCP_MCPQ_FTQ_CMD_POPBNX2_MCP_MCPQ_FTQ_CMD_POP (1L<<30) bnx2.h 　
28547
 BNX2_MCP_MCPQ_FTQ_CMD_BUSYBNX2_MCP_MCPQ_FTQ_CMD_BUSY (1L<<31) bnx2.h 　
28548
 BNX2_MCP_MCPQ_FTQ_CTLBNX2_MCP_MCPQ_FTQ_CTL 0x001453fc bnx2.h 　
28549
 BNX2_MCP_MCPQ_FTQ_CTL_INTERVENEBNX2_MCP_MCPQ_FTQ_CTL_INTERVENE (1L<<0) bnx2.h 　
28550
 BNX2_MCP_MCPQ_FTQ_CTL_OVERFLOWBNX2_MCP_MCPQ_FTQ_CTL_OVERFLOW (1L<<1) bnx2.h 　
28551
 BNX2_MCP_MCPQ_FTQ_CTL_FORCE_INTBNX2_MCP_MCPQ_FTQ_CTL_FORCE_INT (1L<<2) bnx2.h 　
28552
 BNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTHBNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) bnx2.h 　
28553
 BNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTHBNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) bnx2.h 　
28554
 BNX2_MCP_ROMBNX2_MCP_ROM 0x00150000 bnx2.h 　
28555
 BNX2_MCP_SCRATCHBNX2_MCP_SCRATCH 0x00160000 bnx2.h 　
28556
 BNX2_SHM_HDR_SIGNATUREBNX2_SHM_HDR_SIGNATURE BNX2_MCP_SCRATCH bnx2.h 　
28557
 BNX2_SHM_HDR_SIGNATURE_SIG_MASKBNX2_SHM_HDR_SIGNATURE_SIG_MASK 0xffff0000 bnx2.h 　
28558
 BNX2_SHM_HDR_SIGNATURE_SIGBNX2_SHM_HDR_SIGNATURE_SIG 0x53530000 bnx2.h 　
28559
 BNX2_SHM_HDR_SIGNATURE_VER_MASKBNX2_SHM_HDR_SIGNATURE_VER_MASK 0x000000ff bnx2.h 　
28560
 BNX2_SHM_HDR_SIGNATURE_VER_ONEBNX2_SHM_HDR_SIGNATURE_VER_ONE 0x00000001 bnx2.h 　
28561
 BNX2_SHM_HDR_ADDR_0BNX2_SHM_HDR_ADDR_0 BNX2_MCP_SCRATCH + 4 bnx2.h 　
28562
 BNX2_SHM_HDR_ADDR_1BNX2_SHM_HDR_ADDR_1 BNX2_MCP_SCRATCH + 8 bnx2.h 　
28563
 NUM_MC_HASH_REGISTERSNUM_MC_HASH_REGISTERS 8 bnx2.h 　
28564
 PHY_BCM5706_PHY_IDPHY_BCM5706_PHY_ID 0x00206160 bnx2.h 　
28565
 BCM5708S_UP1BCM5708S_UP1 0xb bnx2.h 　
28566
 BCM5708S_UP1_2G5BCM5708S_UP1_2G5 0x1 bnx2.h 　
28567
 BCM5708S_BLK_ADDRBCM5708S_BLK_ADDR 0x1f bnx2.h 　
28568
 BCM5708S_BLK_ADDR_DIGBCM5708S_BLK_ADDR_DIG 0x0000 bnx2.h 　
28569
 BCM5708S_BLK_ADDR_DIG3BCM5708S_BLK_ADDR_DIG3 0x0002 bnx2.h 　
28570
 BCM5708S_BLK_ADDR_TX_MISCBCM5708S_BLK_ADDR_TX_MISC 0x0005 bnx2.h 　
28571
 BCM5708S_1000X_CTL1BCM5708S_1000X_CTL1 0x10 bnx2.h 　
28572
 BCM5708S_1000X_CTL1_FIBER_MODEBCM5708S_1000X_CTL1_FIBER_MODE 0x0001 bnx2.h 　
28573
 BCM5708S_1000X_CTL1_AUTODET_ENBCM5708S_1000X_CTL1_AUTODET_EN 0x0010 bnx2.h 　
28574
 BCM5708S_1000X_CTL2BCM5708S_1000X_CTL2 0x11 bnx2.h 　
28575
 BCM5708S_1000X_CTL2_PLLEL_DET_EBCM5708S_1000X_CTL2_PLLEL_DET_E 0x0001 bnx2.h 　
28576
 BCM5708S_1000X_STAT1BCM5708S_1000X_STAT1 0x14 bnx2.h 　
28577
 BCM5708S_1000X_STAT1_SGMIIBCM5708S_1000X_STAT1_SGMII 0x0001 bnx2.h 　
28578
 BCM5708S_1000X_STAT1_LINKBCM5708S_1000X_STAT1_LINK 0x0002 bnx2.h 　
28579
 BCM5708S_1000X_STAT1_FDBCM5708S_1000X_STAT1_FD 0x0004 bnx2.h 　
28580
 BCM5708S_1000X_STAT1_SPEED_MASKBCM5708S_1000X_STAT1_SPEED_MASK 0x0018 bnx2.h 　
28581
 BCM5708S_1000X_STAT1_SPEED_10BCM5708S_1000X_STAT1_SPEED_10 0x0000 bnx2.h 　
28582
 BCM5708S_1000X_STAT1_SPEED_100BCM5708S_1000X_STAT1_SPEED_100 0x0008 bnx2.h 　
28583
 BCM5708S_1000X_STAT1_SPEED_1GBCM5708S_1000X_STAT1_SPEED_1G 0x0010 bnx2.h 　
28584
 BCM5708S_1000X_STAT1_SPEED_2G5BCM5708S_1000X_STAT1_SPEED_2G5 0x0018 bnx2.h 　
28585
 BCM5708S_1000X_STAT1_TX_PAUSEBCM5708S_1000X_STAT1_TX_PAUSE 0x0020 bnx2.h 　
28586
 BCM5708S_1000X_STAT1_RX_PAUSEBCM5708S_1000X_STAT1_RX_PAUSE 0x0040 bnx2.h 　
28587
 BCM5708S_DIG_3_0BCM5708S_DIG_3_0 0x10 bnx2.h 　
28588
 BCM5708S_DIG_3_0_USE_IEEEBCM5708S_DIG_3_0_USE_IEEE 0x0001 bnx2.h 　
28589
 BCM5708S_TX_ACTL1BCM5708S_TX_ACTL1 0x15 bnx2.h 　
28590
 BCM5708S_TX_ACTL1_DRIVER_VCMBCM5708S_TX_ACTL1_DRIVER_VCM 0x30 bnx2.h 　
28591
 BCM5708S_TX_ACTL3BCM5708S_TX_ACTL3 0x17 bnx2.h 　
28592
 MIN_ETHERNET_PACKET_SIZEMIN_ETHERNET_PACKET_SIZE 60 bnx2.h 　
28593
 MAX_ETHERNET_PACKET_SIZEMAX_ETHERNET_PACKET_SIZE 1514 bnx2.h 　
28594
 MAX_ETHERNET_JUMBO_PACKET_SIZEMAX_ETHERNET_JUMBO_PACKET_SIZE 9014 bnx2.h 　
28595
 RX_COPY_THRESHRX_COPY_THRESH 92 bnx2.h 　
28596
 DMA_READ_CHANSDMA_READ_CHANS 5 bnx2.h 　
28597
 DMA_WRITE_CHANSDMA_WRITE_CHANS 3 bnx2.h 　
28598
 BCM_PAGE_BITSBCM_PAGE_BITS 12 bnx2.h 　
28599
 BCM_PAGE_SIZEBCM_PAGE_SIZE (1 << BCM_PAGE_BITS) bnx2.h 　
28600
 TX_DESC_CNTTX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct tx_bd)) bnx2.h 　
28601
 MAX_TX_DESC_CNTMAX_TX_DESC_CNT (TX_DESC_CNT - 1) bnx2.h 　
28602
 MAX_RX_RINGSMAX_RX_RINGS 4 bnx2.h 　
28603
 RX_DESC_CNTRX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct rx_bd)) bnx2.h 　
28604
 MAX_RX_DESC_CNTMAX_RX_DESC_CNT (RX_DESC_CNT - 1) bnx2.h 　
28605
 MAX_TOTAL_RX_DESC_CNTMAX_TOTAL_RX_DESC_CNT (MAX_RX_DESC_CNT * MAX_RX_RINGS) bnx2.h 　
28606
 CTX_SHIFTCTX_SHIFT 7 bnx2.h 　
28607
 CTX_SIZECTX_SIZE (1 << CTX_SHIFT) bnx2.h 　
28608
 CTX_MASKCTX_MASK (CTX_SIZE - 1) bnx2.h 　
28609
 PHY_CTX_SHIFTPHY_CTX_SHIFT 6 bnx2.h 　
28610
 PHY_CTX_SIZEPHY_CTX_SIZE (1 << PHY_CTX_SHIFT) bnx2.h 　
28611
 PHY_CTX_MASKPHY_CTX_MASK (PHY_CTX_SIZE - 1) bnx2.h 　
28612
 MB_KERNEL_CTX_SHIFTMB_KERNEL_CTX_SHIFT 8 bnx2.h 　
28613
 MB_KERNEL_CTX_SIZEMB_KERNEL_CTX_SIZE (1 << MB_KERNEL_CTX_SHIFT) bnx2.h 　
28614
 MB_KERNEL_CTX_MASKMB_KERNEL_CTX_MASK (MB_KERNEL_CTX_SIZE - 1) bnx2.h 　
28615
 MAX_CID_CNTMAX_CID_CNT 0x4000 bnx2.h 　
28616
 MAX_CID_ADDRMAX_CID_ADDR (GET_CID_ADDR(MAX_CID_CNT)) bnx2.h 　
28617
 INVALID_CID_ADDRINVALID_CID_ADDR 0xffffffff bnx2.h 　
28618
 TX_CIDTX_CID 16 bnx2.h 　
28619
 RX_CIDRX_CID 0 bnx2.h 　
28620
 MB_TX_CID_ADDRMB_TX_CID_ADDR MB_GET_CID_ADDR(TX_CID) bnx2.h 　
28621
 MB_RX_CID_ADDRMB_RX_CID_ADDR MB_GET_CID_ADDR(RX_CID) bnx2.h 　
28622
 SEEPROM_PAGE_BITSSEEPROM_PAGE_BITS 2 bnx2.h 　
28623
 SEEPROM_PHY_PAGE_SIZESEEPROM_PHY_PAGE_SIZE (1 << SEEPROM_PAGE_BITS) bnx2.h 　
28624
 SEEPROM_BYTE_ADDR_MASKSEEPROM_BYTE_ADDR_MASK (SEEPROM_PHY_PAGE_SIZE-1) bnx2.h 　
28625
 SEEPROM_PAGE_SIZESEEPROM_PAGE_SIZE 4 bnx2.h 　
28626
 SEEPROM_TOTAL_SIZESEEPROM_TOTAL_SIZE 65536 bnx2.h 　
28627
 BUFFERED_FLASH_PAGE_BITSBUFFERED_FLASH_PAGE_BITS 9 bnx2.h 　
28628
 BUFFERED_FLASH_PHY_PAGE_SIZEBUFFERED_FLASH_PHY_PAGE_SIZE (1 << BUFFERED_FLASH_PAGE_BITS) bnx2.h 　
28629
 BUFFERED_FLASH_BYTE_ADDR_MASKBUFFERED_FLASH_BYTE_ADDR_MASK (BUFFERED_FLASH_PHY_PAGE_SIZE-1) bnx2.h 　
28630
 BUFFERED_FLASH_PAGE_SIZEBUFFERED_FLASH_PAGE_SIZE 264 bnx2.h 　
28631
 BUFFERED_FLASH_TOTAL_SIZEBUFFERED_FLASH_TOTAL_SIZE 0x21000 bnx2.h 　
28632
 SAIFUN_FLASH_PAGE_BITSSAIFUN_FLASH_PAGE_BITS 8 bnx2.h 　
28633
 SAIFUN_FLASH_PHY_PAGE_SIZESAIFUN_FLASH_PHY_PAGE_SIZE (1 << SAIFUN_FLASH_PAGE_BITS) bnx2.h 　
28634
 SAIFUN_FLASH_BYTE_ADDR_MASKSAIFUN_FLASH_BYTE_ADDR_MASK (SAIFUN_FLASH_PHY_PAGE_SIZE-1) bnx2.h 　
28635
 SAIFUN_FLASH_PAGE_SIZESAIFUN_FLASH_PAGE_SIZE 256 bnx2.h 　
28636
 SAIFUN_FLASH_BASE_TOTAL_SIZESAIFUN_FLASH_BASE_TOTAL_SIZE 65536 bnx2.h 　
28637
 ST_MICRO_FLASH_PAGE_BITSST_MICRO_FLASH_PAGE_BITS 8 bnx2.h 　
28638
 ST_MICRO_FLASH_PHY_PAGE_SIZEST_MICRO_FLASH_PHY_PAGE_SIZE (1 << ST_MICRO_FLASH_PAGE_BITS) bnx2.h 　
28639
 ST_MICRO_FLASH_BYTE_ADDR_MASKST_MICRO_FLASH_BYTE_ADDR_MASK (ST_MICRO_FLASH_PHY_PAGE_SIZE-1) bnx2.h 　
28640
 ST_MICRO_FLASH_PAGE_SIZEST_MICRO_FLASH_PAGE_SIZE 256 bnx2.h 　
28641
 ST_MICRO_FLASH_BASE_TOTAL_SIZEST_MICRO_FLASH_BASE_TOTAL_SIZE 65536 bnx2.h 　
28642
 NVRAM_TIMEOUT_COUNTNVRAM_TIMEOUT_COUNT 30000 bnx2.h 　
28643
 FLASH_STRAP_MASKFLASH_STRAP_MASK (BNX2_NVM_CFG1_FLASH_MODE | \ BNX2_NVM_CFG1_BUFFER_MODE | \ BNX2_NVM_CFG1_PROTECT_MODE | \ BNX2_NVM_CFG1_FLASH_SIZE) bnx2.h 　
28644
 FLASH_BACKUP_STRAP_MASKFLASH_BACKUP_STRAP_MASK (0xf << 26) bnx2.h 　
28645
 RV2P_PROC1RV2P_PROC1 0 bnx2.h 　
28646
 RV2P_PROC2RV2P_PROC2 1 bnx2.h 　
28647
 DRV_PULSE_PERIOD_MSDRV_PULSE_PERIOD_MS 250 bnx2.h 　
28648
 FW_ACK_TIME_OUT_MSFW_ACK_TIME_OUT_MS 100 bnx2.h 　
28649
 BNX2_DRV_RESET_SIGNATUREBNX2_DRV_RESET_SIGNATURE 0x00000000 bnx2.h 　
28650
 BNX2_DRV_RESET_SIGNATURE_MAGICBNX2_DRV_RESET_SIGNATURE_MAGIC 0x4841564b bnx2.h HAVK
28651
 BNX2_DRV_MBBNX2_DRV_MB 0x00000004 bnx2.h 　
28652
 BNX2_DRV_MSG_CODEBNX2_DRV_MSG_CODE 0xff000000 bnx2.h 　
28653
 BNX2_DRV_MSG_CODE_RESETBNX2_DRV_MSG_CODE_RESET 0x01000000 bnx2.h 　
28654
 BNX2_DRV_MSG_CODE_UNLOADBNX2_DRV_MSG_CODE_UNLOAD 0x02000000 bnx2.h 　
28655
 BNX2_DRV_MSG_CODE_SHUTDOWNBNX2_DRV_MSG_CODE_SHUTDOWN 0x03000000 bnx2.h 　
28656
 BNX2_DRV_MSG_CODE_SUSPEND_WOLBNX2_DRV_MSG_CODE_SUSPEND_WOL 0x04000000 bnx2.h 　
28657
 BNX2_DRV_MSG_CODE_FW_TIMEOUTBNX2_DRV_MSG_CODE_FW_TIMEOUT 0x05000000 bnx2.h 　
28658
 BNX2_DRV_MSG_CODE_PULSEBNX2_DRV_MSG_CODE_PULSE 0x06000000 bnx2.h 　
28659
 BNX2_DRV_MSG_CODE_DIAGBNX2_DRV_MSG_CODE_DIAG 0x07000000 bnx2.h 　
28660
 BNX2_DRV_MSG_CODE_SUSPEND_NO_WOBNX2_DRV_MSG_CODE_SUSPEND_NO_WO 0x09000000 bnx2.h 　
28661
 BNX2_DRV_MSG_DATABNX2_DRV_MSG_DATA 0x00ff0000 bnx2.h 　
28662
 BNX2_DRV_MSG_DATA_WAIT0BNX2_DRV_MSG_DATA_WAIT0 0x00010000 bnx2.h 　
28663
 BNX2_DRV_MSG_DATA_WAIT1BNX2_DRV_MSG_DATA_WAIT1 0x00020000 bnx2.h 　
28664
 BNX2_DRV_MSG_DATA_WAIT2BNX2_DRV_MSG_DATA_WAIT2 0x00030000 bnx2.h 　
28665
 BNX2_DRV_MSG_DATA_WAIT3BNX2_DRV_MSG_DATA_WAIT3 0x00040000 bnx2.h 　
28666
 BNX2_DRV_MSG_SEQBNX2_DRV_MSG_SEQ 0x0000ffff bnx2.h 　
28667
 BNX2_FW_MBBNX2_FW_MB 0x00000008 bnx2.h 　
28668
 BNX2_FW_MSG_ACKBNX2_FW_MSG_ACK 0x0000ffff bnx2.h 　
28669
 BNX2_FW_MSG_STATUS_MASKBNX2_FW_MSG_STATUS_MASK 0x00ff0000 bnx2.h 　
28670
 BNX2_FW_MSG_STATUS_OKBNX2_FW_MSG_STATUS_OK 0x00000000 bnx2.h 　
28671
 BNX2_FW_MSG_STATUS_FAILUREBNX2_FW_MSG_STATUS_FAILURE 0x00ff0000 bnx2.h 　
28672
 BNX2_LINK_STATUSBNX2_LINK_STATUS 0x0000000c bnx2.h 　
28673
 BNX2_LINK_STATUS_INIT_VALUEBNX2_LINK_STATUS_INIT_VALUE 0xffffffff bnx2.h 　
28674
 BNX2_LINK_STATUS_LINK_UPBNX2_LINK_STATUS_LINK_UP 0x1 bnx2.h 　
28675
 BNX2_LINK_STATUS_LINK_DOWNBNX2_LINK_STATUS_LINK_DOWN 0x0 bnx2.h 　
28676
 BNX2_LINK_STATUS_SPEED_MASKBNX2_LINK_STATUS_SPEED_MASK 0x1e bnx2.h 　
28677
 BNX2_LINK_STATUS_AN_INCOMPLETEBNX2_LINK_STATUS_AN_INCOMPLETE (0<<1) bnx2.h 　
28678
 BNX2_LINK_STATUS_10HALFBNX2_LINK_STATUS_10HALF (1<<1) bnx2.h 　
28679
 BNX2_LINK_STATUS_10FULLBNX2_LINK_STATUS_10FULL (2<<1) bnx2.h 　
28680
 BNX2_LINK_STATUS_100HALFBNX2_LINK_STATUS_100HALF (3<<1) bnx2.h 　
28681
 BNX2_LINK_STATUS_100BASE_T4BNX2_LINK_STATUS_100BASE_T4 (4<<1) bnx2.h 　
28682
 BNX2_LINK_STATUS_100FULLBNX2_LINK_STATUS_100FULL (5<<1) bnx2.h 　
28683
 BNX2_LINK_STATUS_1000HALFBNX2_LINK_STATUS_1000HALF (6<<1) bnx2.h 　
28684
 BNX2_LINK_STATUS_1000FULLBNX2_LINK_STATUS_1000FULL (7<<1) bnx2.h 　
28685
 BNX2_LINK_STATUS_2500HALFBNX2_LINK_STATUS_2500HALF (8<<1) bnx2.h 　
28686
 BNX2_LINK_STATUS_2500FULLBNX2_LINK_STATUS_2500FULL (9<<1) bnx2.h 　
28687
 BNX2_LINK_STATUS_AN_ENABLEDBNX2_LINK_STATUS_AN_ENABLED (1<<5) bnx2.h 　
28688
 BNX2_LINK_STATUS_AN_COMPLETEBNX2_LINK_STATUS_AN_COMPLETE (1<<6) bnx2.h 　
28689
 BNX2_LINK_STATUS_PARALLEL_DETBNX2_LINK_STATUS_PARALLEL_DET (1<<7) bnx2.h 　
28690
 BNX2_LINK_STATUS_RESERVEDBNX2_LINK_STATUS_RESERVED (1<<8) bnx2.h 　
28691
 BNX2_LINK_STATUS_PARTNER_AD_100BNX2_LINK_STATUS_PARTNER_AD_100 (1<<9) bnx2.h 　
28692
 BNX2_LINK_STATUS_PARTNER_AD_100BNX2_LINK_STATUS_PARTNER_AD_100 (1<<10) bnx2.h 　
28693
 BNX2_LINK_STATUS_PARTNER_AD_100BNX2_LINK_STATUS_PARTNER_AD_100 (1<<11) bnx2.h 　
28694
 BNX2_LINK_STATUS_PARTNER_AD_100BNX2_LINK_STATUS_PARTNER_AD_100 (1<<12) bnx2.h 　
28695
 BNX2_LINK_STATUS_PARTNER_AD_100BNX2_LINK_STATUS_PARTNER_AD_100 (1<<13) bnx2.h 　
28696
 BNX2_LINK_STATUS_PARTNER_AD_10FBNX2_LINK_STATUS_PARTNER_AD_10F (1<<14) bnx2.h 　
28697
 BNX2_LINK_STATUS_PARTNER_AD_10HBNX2_LINK_STATUS_PARTNER_AD_10H (1<<15) bnx2.h 　
28698
 BNX2_LINK_STATUS_TX_FC_ENABLEDBNX2_LINK_STATUS_TX_FC_ENABLED (1<<16) bnx2.h 　
28699
 BNX2_LINK_STATUS_RX_FC_ENABLEDBNX2_LINK_STATUS_RX_FC_ENABLED (1<<17) bnx2.h 　
28700
 BNX2_LINK_STATUS_PARTNER_SYM_PABNX2_LINK_STATUS_PARTNER_SYM_PA (1<<18) bnx2.h 　
28701
 BNX2_LINK_STATUS_PARTNER_ASYM_PBNX2_LINK_STATUS_PARTNER_ASYM_P (1<<19) bnx2.h 　
28702
 BNX2_LINK_STATUS_SERDES_LINKBNX2_LINK_STATUS_SERDES_LINK (1<<20) bnx2.h 　
28703
 BNX2_LINK_STATUS_PARTNER_AD_250BNX2_LINK_STATUS_PARTNER_AD_250 (1<<21) bnx2.h 　
28704
 BNX2_LINK_STATUS_PARTNER_AD_250BNX2_LINK_STATUS_PARTNER_AD_250 (1<<22) bnx2.h 　
28705
 BNX2_DRV_PULSE_MBBNX2_DRV_PULSE_MB 0x00000010 bnx2.h 　
28706
 BNX2_DRV_PULSE_SEQ_MASKBNX2_DRV_PULSE_SEQ_MASK 0x00007fff bnx2.h 　
28707
 BNX2_DRV_MSG_DATA_PULSE_CODE_ALBNX2_DRV_MSG_DATA_PULSE_CODE_AL 0x00080000 bnx2.h 　
28708
 BNX2_DEV_INFO_SIGNATUREBNX2_DEV_INFO_SIGNATURE 0x00000020 bnx2.h 　
28709
 BNX2_DEV_INFO_SIGNATURE_MAGICBNX2_DEV_INFO_SIGNATURE_MAGIC 0x44564900 bnx2.h 　
28710
 BNX2_DEV_INFO_SIGNATURE_MAGIC_MBNX2_DEV_INFO_SIGNATURE_MAGIC_M 0xffffff00 bnx2.h 　
28711
 BNX2_DEV_INFO_FEATURE_CFG_VALIDBNX2_DEV_INFO_FEATURE_CFG_VALID 0x01 bnx2.h 　
28712
 BNX2_DEV_INFO_SECONDARY_PORTBNX2_DEV_INFO_SECONDARY_PORT 0x80 bnx2.h 　
28713
 BNX2_DEV_INFO_DRV_ALWAYS_ALIVEBNX2_DEV_INFO_DRV_ALWAYS_ALIVE 0x40 bnx2.h 　
28714
 BNX2_SHARED_HW_CFG_PART_NUMBNX2_SHARED_HW_CFG_PART_NUM 0x00000024 bnx2.h 　
28715
 BNX2_SHARED_HW_CFG_POWER_DISSIPBNX2_SHARED_HW_CFG_POWER_DISSIP 0x00000034 bnx2.h 　
28716
 BNX2_SHARED_HW_CFG_POWER_STATE_BNX2_SHARED_HW_CFG_POWER_STATE_ 0xff000000 bnx2.h 　
28717
 BNX2_SHARED_HW_CFG_POWER_STATE_BNX2_SHARED_HW_CFG_POWER_STATE_ 0xff0000 bnx2.h 　
28718
 BNX2_SHARED_HW_CFG_POWER_STATE_BNX2_SHARED_HW_CFG_POWER_STATE_ 0xff00 bnx2.h 　
28719
 BNX2_SHARED_HW_CFG_POWER_STATE_BNX2_SHARED_HW_CFG_POWER_STATE_ 0xff bnx2.h 　
28720
 BNX2_SHARED_HW_CFGBNX2_SHARED_HW_CFG POWER_CONSUMED 0x00000038 bnx2.h 　
28721
 BNX2_SHARED_HW_CFG_CONFIGBNX2_SHARED_HW_CFG_CONFIG 0x0000003c bnx2.h 　
28722
 BNX2_SHARED_HW_CFG_DESIGN_NICBNX2_SHARED_HW_CFG_DESIGN_NIC 0 bnx2.h 　
28723
 BNX2_SHARED_HW_CFG_DESIGN_LOMBNX2_SHARED_HW_CFG_DESIGN_LOM 0x1 bnx2.h 　
28724
 BNX2_SHARED_HW_CFG_PHY_COPPERBNX2_SHARED_HW_CFG_PHY_COPPER 0 bnx2.h 　
28725
 BNX2_SHARED_HW_CFG_PHY_FIBERBNX2_SHARED_HW_CFG_PHY_FIBER 0x2 bnx2.h 　
28726
 BNX2_SHARED_HW_CFG_PHY_2_5GBNX2_SHARED_HW_CFG_PHY_2_5G 0x20 bnx2.h 　
28727
 BNX2_SHARED_HW_CFG_PHY_BACKPLANBNX2_SHARED_HW_CFG_PHY_BACKPLAN 0x40 bnx2.h 　
28728
 BNX2_SHARED_HW_CFG_LED_MODE_SHIBNX2_SHARED_HW_CFG_LED_MODE_SHI 8 bnx2.h 　
28729
 BNX2_SHARED_HW_CFG_LED_MODE_MASBNX2_SHARED_HW_CFG_LED_MODE_MAS 0x300 bnx2.h 　
28730
 BNX2_SHARED_HW_CFG_LED_MODE_MACBNX2_SHARED_HW_CFG_LED_MODE_MAC 0 bnx2.h 　
28731
 BNX2_SHARED_HW_CFG_LED_MODE_GPHBNX2_SHARED_HW_CFG_LED_MODE_GPH 0x100 bnx2.h 　
28732
 BNX2_SHARED_HW_CFG_LED_MODE_GPHBNX2_SHARED_HW_CFG_LED_MODE_GPH 0x200 bnx2.h 　
28733
 BNX2_SHARED_HW_CFG_CONFIG2BNX2_SHARED_HW_CFG_CONFIG2 0x00000040 bnx2.h 　
28734
 BNX2_SHARED_HW_CFG2_NVM_SIZE_MABNX2_SHARED_HW_CFG2_NVM_SIZE_MA 0x00fff000 bnx2.h 　
28735
 BNX2_DEV_INFO_BC_REVBNX2_DEV_INFO_BC_REV 0x0000004c bnx2.h 　
28736
 BNX2_PORT_HW_CFG_MAC_UPPERBNX2_PORT_HW_CFG_MAC_UPPER 0x00000050 bnx2.h 　
28737
 BNX2_PORT_HW_CFG_UPPERMAC_MASKBNX2_PORT_HW_CFG_UPPERMAC_MASK 0xffff bnx2.h 　
28738
 BNX2_PORT_HW_CFG_MAC_LOWERBNX2_PORT_HW_CFG_MAC_LOWER 0x00000054 bnx2.h 　
28739
 BNX2_PORT_HW_CFG_CONFIGBNX2_PORT_HW_CFG_CONFIG 0x00000058 bnx2.h 　
28740
 BNX2_PORT_HW_CFG_CFG_TXCTL3_MASBNX2_PORT_HW_CFG_CFG_TXCTL3_MAS 0x0000ffff bnx2.h 　
28741
 BNX2_PORT_HW_CFG_CFG_DFLT_LINK_BNX2_PORT_HW_CFG_CFG_DFLT_LINK_ 0x001f0000 bnx2.h 　
28742
 BNX2_PORT_HW_CFG_CFG_DFLT_LINK_BNX2_PORT_HW_CFG_CFG_DFLT_LINK_ 0x00000000 bnx2.h 　
28743
 BNX2_PORT_HW_CFG_CFG_DFLT_LINK_BNX2_PORT_HW_CFG_CFG_DFLT_LINK_ 0x00030000 bnx2.h 　
28744
 BNX2_PORT_HW_CFG_CFG_DFLT_LINK_BNX2_PORT_HW_CFG_CFG_DFLT_LINK_ 0x00040000 bnx2.h 　
28745
 BNX2_PORT_HW_CFG_IMD_MAC_A_UPPEBNX2_PORT_HW_CFG_IMD_MAC_A_UPPE 0x00000068 bnx2.h 　
28746
 BNX2_PORT_HW_CFG_IMD_MAC_A_LOWEBNX2_PORT_HW_CFG_IMD_MAC_A_LOWE 0x0000006c bnx2.h 　
28747
 BNX2_PORT_HW_CFG_IMD_MAC_B_UPPEBNX2_PORT_HW_CFG_IMD_MAC_B_UPPE 0x00000070 bnx2.h 　
28748
 BNX2_PORT_HW_CFG_IMD_MAC_B_LOWEBNX2_PORT_HW_CFG_IMD_MAC_B_LOWE 0x00000074 bnx2.h 　
28749
 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPEBNX2_PORT_HW_CFG_ISCSI_MAC_UPPE 0x00000078 bnx2.h 　
28750
 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWEBNX2_PORT_HW_CFG_ISCSI_MAC_LOWE 0x0000007c bnx2.h 　
28751
 BNX2_DEV_INFO_PER_PORT_HW_CONFIBNX2_DEV_INFO_PER_PORT_HW_CONFI 0x000000b4 bnx2.h 　
28752
 BNX2_DEV_INFO_FORMAT_REVBNX2_DEV_INFO_FORMAT_REV 0x000000c4 bnx2.h 　
28753
 BNX2_DEV_INFO_FORMAT_REV_MASKBNX2_DEV_INFO_FORMAT_REV_MASK 0xff000000 bnx2.h 　
28754
 BNX2_DEV_INFO_FORMAT_REV_IDBNX2_DEV_INFO_FORMAT_REV_ID ('A' << 24) bnx2.h 　
28755
 BNX2_SHARED_FEATUREBNX2_SHARED_FEATURE 0x000000c8 bnx2.h 　
28756
 BNX2_SHARED_FEATURE_MASKBNX2_SHARED_FEATURE_MASK 0xffffffff bnx2.h 　
28757
 BNX2_PORT_FEATUREBNX2_PORT_FEATURE 0x000000d8 bnx2.h 　
28758
 BNX2_PORT2_FEATUREBNX2_PORT2_FEATURE 0x00000014c bnx2.h 　
28759
 BNX2_PORT_FEATURE_WOL_ENABLEDBNX2_PORT_FEATURE_WOL_ENABLED 0x01000000 bnx2.h 　
28760
 BNX2_PORT_FEATURE_MBA_ENABLEDBNX2_PORT_FEATURE_MBA_ENABLED 0x02000000 bnx2.h 　
28761
 BNX2_PORT_FEATURE_ASF_ENABLEDBNX2_PORT_FEATURE_ASF_ENABLED 0x04000000 bnx2.h 　
28762
 BNX2_PORT_FEATURE_IMD_ENABLEDBNX2_PORT_FEATURE_IMD_ENABLED 0x08000000 bnx2.h 　
28763
 BNX2_PORT_FEATURE_BAR1_SIZE_MASBNX2_PORT_FEATURE_BAR1_SIZE_MAS 0xf bnx2.h 　
28764
 BNX2_PORT_FEATURE_BAR1_SIZE_DISBNX2_PORT_FEATURE_BAR1_SIZE_DIS 0x0 bnx2.h 　
28765
 BNX2_PORT_FEATURE_BAR1_SIZE_64KBNX2_PORT_FEATURE_BAR1_SIZE_64K 0x1 bnx2.h 　
28766
 BNX2_PORT_FEATURE_BAR1_SIZE_128BNX2_PORT_FEATURE_BAR1_SIZE_128 0x2 bnx2.h 　
28767
 BNX2_PORT_FEATURE_BAR1_SIZE_256BNX2_PORT_FEATURE_BAR1_SIZE_256 0x3 bnx2.h 　
28768
 BNX2_PORT_FEATURE_BAR1_SIZE_512BNX2_PORT_FEATURE_BAR1_SIZE_512 0x4 bnx2.h 　
28769
 BNX2_PORT_FEATURE_BAR1_SIZE_1MBNX2_PORT_FEATURE_BAR1_SIZE_1M 0x5 bnx2.h 　
28770
 BNX2_PORT_FEATURE_BAR1_SIZE_2MBNX2_PORT_FEATURE_BAR1_SIZE_2M 0x6 bnx2.h 　
28771
 BNX2_PORT_FEATURE_BAR1_SIZE_4MBNX2_PORT_FEATURE_BAR1_SIZE_4M 0x7 bnx2.h 　
28772
 BNX2_PORT_FEATURE_BAR1_SIZE_8MBNX2_PORT_FEATURE_BAR1_SIZE_8M 0x8 bnx2.h 　
28773
 BNX2_PORT_FEATURE_BAR1_SIZE_16MBNX2_PORT_FEATURE_BAR1_SIZE_16M 0x9 bnx2.h 　
28774
 BNX2_PORT_FEATURE_BAR1_SIZE_32MBNX2_PORT_FEATURE_BAR1_SIZE_32M 0xa bnx2.h 　
28775
 BNX2_PORT_FEATURE_BAR1_SIZE_64MBNX2_PORT_FEATURE_BAR1_SIZE_64M 0xb bnx2.h 　
28776
 BNX2_PORT_FEATURE_BAR1_SIZE_128BNX2_PORT_FEATURE_BAR1_SIZE_128 0xc bnx2.h 　
28777
 BNX2_PORT_FEATURE_BAR1_SIZE_256BNX2_PORT_FEATURE_BAR1_SIZE_256 0xd bnx2.h 　
28778
 BNX2_PORT_FEATURE_BAR1_SIZE_512BNX2_PORT_FEATURE_BAR1_SIZE_512 0xe bnx2.h 　
28779
 BNX2_PORT_FEATURE_BAR1_SIZE_1GBNX2_PORT_FEATURE_BAR1_SIZE_1G 0xf bnx2.h 　
28780
 BNX2_PORT_FEATURE_WOLBNX2_PORT_FEATURE_WOL 0xdc bnx2.h 　
28781
 BNX2_PORT2_FEATURE_WOLBNX2_PORT2_FEATURE_WOL 0x150 bnx2.h 　
28782
 BNX2_PORT_FEATURE_WOL_DEFAULT_SBNX2_PORT_FEATURE_WOL_DEFAULT_S 4 bnx2.h 　
28783
 BNX2_PORT_FEATURE_WOL_DEFAULT_MBNX2_PORT_FEATURE_WOL_DEFAULT_M 0x30 bnx2.h 　
28784
 BNX2_PORT_FEATURE_WOL_DEFAULT_DBNX2_PORT_FEATURE_WOL_DEFAULT_D 0 bnx2.h 　
28785
 BNX2_PORT_FEATURE_WOL_DEFAULT_MBNX2_PORT_FEATURE_WOL_DEFAULT_M 0x10 bnx2.h 　
28786
 BNX2_PORT_FEATURE_WOL_DEFAULT_ABNX2_PORT_FEATURE_WOL_DEFAULT_A 0x20 bnx2.h 　
28787
 BNX2_PORT_FEATURE_WOL_DEFAULT_MBNX2_PORT_FEATURE_WOL_DEFAULT_M 0x30 bnx2.h 　
28788
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 0xf bnx2.h 　
28789
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 0 bnx2.h 　
28790
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 1 bnx2.h 　
28791
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 2 bnx2.h 　
28792
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 3 bnx2.h 　
28793
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 4 bnx2.h 　
28794
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 5 bnx2.h 　
28795
 BNX2_PORT_FEATURE_WOL_LINK_SPEEBNX2_PORT_FEATURE_WOL_LINK_SPEE 6 bnx2.h 　
28796
 BNX2_PORT_FEATURE_WOL_AUTONEG_ABNX2_PORT_FEATURE_WOL_AUTONEG_A 0x40 bnx2.h 　
28797
 BNX2_PORT_FEATURE_WOL_RESERVED_BNX2_PORT_FEATURE_WOL_RESERVED_ 0x400 bnx2.h 　
28798
 BNX2_PORT_FEATURE_WOL_RESERVED_BNX2_PORT_FEATURE_WOL_RESERVED_ 0x800 bnx2.h 　
28799
 BNX2_PORT_FEATURE_MBABNX2_PORT_FEATURE_MBA 0xe0 bnx2.h 　
28800
 BNX2_PORT2_FEATURE_MBABNX2_PORT2_FEATURE_MBA 0x154 bnx2.h 　
28801
 BNX2_PORT_FEATURE_MBA_BOOT_AGENBNX2_PORT_FEATURE_MBA_BOOT_AGEN 0 bnx2.h 　
28802
 BNX2_PORT_FEATURE_MBA_BOOT_AGENBNX2_PORT_FEATURE_MBA_BOOT_AGEN 0x3 bnx2.h 　
28803
 BNX2_PORT_FEATURE_MBA_BOOT_AGENBNX2_PORT_FEATURE_MBA_BOOT_AGEN 0 bnx2.h 　
28804
 BNX2_PORT_FEATURE_MBA_BOOT_AGENBNX2_PORT_FEATURE_MBA_BOOT_AGEN 1 bnx2.h 　
28805
 BNX2_PORT_FEATURE_MBA_BOOT_AGENBNX2_PORT_FEATURE_MBA_BOOT_AGEN 2 bnx2.h 　
28806
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 2 bnx2.h 　
28807
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x3c bnx2.h 　
28808
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0 bnx2.h 　
28809
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x4 bnx2.h 　
28810
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x8 bnx2.h 　
28811
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0xc bnx2.h 　
28812
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x10 bnx2.h 　
28813
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x14 bnx2.h 　
28814
 BNX2_PORT_FEATURE_MBA_LINK_SPEEBNX2_PORT_FEATURE_MBA_LINK_SPEE 0x18 bnx2.h 　
28815
 BNX2_PORT_FEATURE_MBA_SETUP_PROBNX2_PORT_FEATURE_MBA_SETUP_PRO 0x40 bnx2.h 　
28816
 BNX2_PORT_FEATURE_MBA_HOTKEY_CTBNX2_PORT_FEATURE_MBA_HOTKEY_CT 0 bnx2.h 　
28817
 BNX2_PORT_FEATURE_MBA_HOTKEY_CTBNX2_PORT_FEATURE_MBA_HOTKEY_CT 0x80 bnx2.h 　
28818
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 8 bnx2.h 　
28819
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xff00 bnx2.h 　
28820
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0 bnx2.h 　
28821
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x100 bnx2.h 　
28822
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x200 bnx2.h 　
28823
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x300 bnx2.h 　
28824
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x400 bnx2.h 　
28825
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x500 bnx2.h 　
28826
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x600 bnx2.h 　
28827
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x700 bnx2.h 　
28828
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x800 bnx2.h 　
28829
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0x900 bnx2.h 　
28830
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xa00 bnx2.h 　
28831
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xb00 bnx2.h 　
28832
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xc00 bnx2.h 　
28833
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xd00 bnx2.h 　
28834
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xe00 bnx2.h 　
28835
 BNX2_PORT_FEATURE_MBA_EXP_ROM_SBNX2_PORT_FEATURE_MBA_EXP_ROM_S 0xf00 bnx2.h 　
28836
 BNX2_PORT_FEATURE_MBA_MSG_TIMEOBNX2_PORT_FEATURE_MBA_MSG_TIMEO 16 bnx2.h 　
28837
 BNX2_PORT_FEATURE_MBA_MSG_TIMEOBNX2_PORT_FEATURE_MBA_MSG_TIMEO 0xf0000 bnx2.h 　
28838
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 20 bnx2.h 　
28839
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 0x300000 bnx2.h 　
28840
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 0 bnx2.h 　
28841
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 0x100000 bnx2.h 　
28842
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 0x200000 bnx2.h 　
28843
 BNX2_PORT_FEATURE_MBA_BIOS_BOOTBNX2_PORT_FEATURE_MBA_BIOS_BOOT 0x300000 bnx2.h 　
28844
 BNX2_PORT_FEATURE_IMDBNX2_PORT_FEATURE_IMD 0xe4 bnx2.h 　
28845
 BNX2_PORT2_FEATURE_IMDBNX2_PORT2_FEATURE_IMD 0x158 bnx2.h 　
28846
 BNX2_PORT_FEATURE_IMD_LINK_OVERBNX2_PORT_FEATURE_IMD_LINK_OVER 0 bnx2.h 　
28847
 BNX2_PORT_FEATURE_IMD_LINK_OVERBNX2_PORT_FEATURE_IMD_LINK_OVER 1 bnx2.h 　
28848
 BNX2_PORT_FEATURE_VLANBNX2_PORT_FEATURE_VLAN 0xe8 bnx2.h 　
28849
 BNX2_PORT2_FEATURE_VLANBNX2_PORT2_FEATURE_VLAN 0x15c bnx2.h 　
28850
 BNX2_PORT_FEATURE_MBA_VLAN_TAG_BNX2_PORT_FEATURE_MBA_VLAN_TAG_ 0xffff bnx2.h 　
28851
 BNX2_PORT_FEATURE_MBA_VLAN_ENABBNX2_PORT_FEATURE_MBA_VLAN_ENAB 0x10000 bnx2.h 　
28852
 BNX2_BC_STATE_RESET_TYPEBNX2_BC_STATE_RESET_TYPE 0x000001c0 bnx2.h 　
28853
 BNX2_BC_STATE_RESET_TYPE_SIGBNX2_BC_STATE_RESET_TYPE_SIG 0x00005254 bnx2.h 　
28854
 BNX2_BC_STATE_RESET_TYPE_SIG_MABNX2_BC_STATE_RESET_TYPE_SIG_MA 0x0000ffff bnx2.h 　
28855
 BNX2_BC_STATE_RESET_TYPE_NONEBNX2_BC_STATE_RESET_TYPE_NONE (BNX2_BC_STATE_RESET_TYPE_SIG | \ 0x00010000) bnx2.h 　
28856
 BNX2_BC_STATE_RESET_TYPE_PCIBNX2_BC_STATE_RESET_TYPE_PCI (BNX2_BC_STATE_RESET_TYPE_SIG | \ 0x00020000) bnx2.h 　
28857
 BNX2_BC_STATE_RESET_TYPE_VAUXBNX2_BC_STATE_RESET_TYPE_VAUX (BNX2_BC_STATE_RESET_TYPE_SIG | \ 0x00030000) bnx2.h 　
28858
 BNX2_BC_STATE_RESET_TYPE_DRV_MABNX2_BC_STATE_RESET_TYPE_DRV_MA DRV_MSG_CODE bnx2.h 　
28859
 BNX2_BC_STATE_RESET_TYPE_DRV_REBNX2_BC_STATE_RESET_TYPE_DRV_RE (BNX2_BC_STATE_RESET_TYPE_SIG | \ DRV_MSG_CODE_RESET) bnx2.h 　
28860
 BNX2_BC_STATE_RESET_TYPE_DRV_UNBNX2_BC_STATE_RESET_TYPE_DRV_UN (BNX2_BC_STATE_RESET_TYPE_SIG | \ DRV_MSG_CODE_UNLOAD) bnx2.h 　
28861
 BNX2_BC_STATE_RESET_TYPE_DRV_SHBNX2_BC_STATE_RESET_TYPE_DRV_SH (BNX2_BC_STATE_RESET_TYPE_SIG | \ DRV_MSG_CODE_SHUTDOWN) bnx2.h 　
28862
 BNX2_BC_STATE_RESET_TYPE_DRV_WOBNX2_BC_STATE_RESET_TYPE_DRV_WO (BNX2_BC_STATE_RESET_TYPE_SIG | \ DRV_MSG_CODE_WOL) bnx2.h 　
28863
 BNX2_BC_STATE_RESET_TYPE_DRV_DIBNX2_BC_STATE_RESET_TYPE_DRV_DI (BNX2_BC_STATE_RESET_TYPE_SIG | \ DRV_MSG_CODE_DIAG) bnx2.h 　
28864
 BNX2_BC_STATEBNX2_BC_STATE 0x000001c4 bnx2.h 　
28865
 BNX2_BC_STATE_ERR_MASKBNX2_BC_STATE_ERR_MASK 0x0000ff00 bnx2.h 　
28866
 BNX2_BC_STATE_SIGNBNX2_BC_STATE_SIGN 0x42530000 bnx2.h 　
28867
 BNX2_BC_STATE_SIGN_MASKBNX2_BC_STATE_SIGN_MASK 0xffff0000 bnx2.h 　
28868
 BNX2_BC_STATE_BC1_STARTBNX2_BC_STATE_BC1_START (BNX2_BC_STATE_SIGN | 0x1) bnx2.h 　
28869
 BNX2_BC_STATE_GET_NVM_CFG1BNX2_BC_STATE_GET_NVM_CFG1 (BNX2_BC_STATE_SIGN | 0x2) bnx2.h 　
28870
 BNX2_BC_STATE_PROG_BARBNX2_BC_STATE_PROG_BAR (BNX2_BC_STATE_SIGN | 0x3) bnx2.h 　
28871
 BNX2_BC_STATE_INIT_VIDBNX2_BC_STATE_INIT_VID (BNX2_BC_STATE_SIGN | 0x4) bnx2.h 　
28872
 BNX2_BC_STATE_GET_NVM_CFG2BNX2_BC_STATE_GET_NVM_CFG2 (BNX2_BC_STATE_SIGN | 0x5) bnx2.h 　
28873
 BNX2_BC_STATE_APPLY_WKARNDBNX2_BC_STATE_APPLY_WKARND (BNX2_BC_STATE_SIGN | 0x6) bnx2.h 　
28874
 BNX2_BC_STATE_LOAD_BC2BNX2_BC_STATE_LOAD_BC2 (BNX2_BC_STATE_SIGN | 0x7) bnx2.h 　
28875
 BNX2_BC_STATE_GOING_BC2BNX2_BC_STATE_GOING_BC2 (BNX2_BC_STATE_SIGN | 0x8) bnx2.h 　
28876
 BNX2_BC_STATE_GOING_DIAGBNX2_BC_STATE_GOING_DIAG (BNX2_BC_STATE_SIGN | 0x9) bnx2.h 　
28877
 BNX2_BC_STATE_RT_FINAL_INITBNX2_BC_STATE_RT_FINAL_INIT (BNX2_BC_STATE_SIGN | 0x81) bnx2.h 　
28878
 BNX2_BC_STATE_RT_WKARNDBNX2_BC_STATE_RT_WKARND (BNX2_BC_STATE_SIGN | 0x82) bnx2.h 　
28879
 BNX2_BC_STATE_RT_DRV_PULSEBNX2_BC_STATE_RT_DRV_PULSE (BNX2_BC_STATE_SIGN | 0x83) bnx2.h 　
28880
 BNX2_BC_STATE_RT_FIOEVTSBNX2_BC_STATE_RT_FIOEVTS (BNX2_BC_STATE_SIGN | 0x84) bnx2.h 　
28881
 BNX2_BC_STATE_RT_DRV_CMDBNX2_BC_STATE_RT_DRV_CMD (BNX2_BC_STATE_SIGN | 0x85) bnx2.h 　
28882
 BNX2_BC_STATE_RT_LOW_POWERBNX2_BC_STATE_RT_LOW_POWER (BNX2_BC_STATE_SIGN | 0x86) bnx2.h 　
28883
 BNX2_BC_STATE_RT_SET_WOLBNX2_BC_STATE_RT_SET_WOL (BNX2_BC_STATE_SIGN | 0x87) bnx2.h 　
28884
 BNX2_BC_STATE_RT_OTHER_FWBNX2_BC_STATE_RT_OTHER_FW (BNX2_BC_STATE_SIGN | 0x88) bnx2.h 　
28885
 BNX2_BC_STATE_RT_GOING_D3BNX2_BC_STATE_RT_GOING_D3 (BNX2_BC_STATE_SIGN | 0x89) bnx2.h 　
28886
 BNX2_BC_STATE_ERR_BAD_VERSIONBNX2_BC_STATE_ERR_BAD_VERSION (BNX2_BC_STATE_SIGN | 0x0100) bnx2.h 　
28887
 BNX2_BC_STATE_ERR_BAD_BC2_CRCBNX2_BC_STATE_ERR_BAD_BC2_CRC (BNX2_BC_STATE_SIGN | 0x0200) bnx2.h 　
28888
 BNX2_BC_STATE_ERR_BC1_LOOPBNX2_BC_STATE_ERR_BC1_LOOP (BNX2_BC_STATE_SIGN | 0x0300) bnx2.h 　
28889
 BNX2_BC_STATE_ERR_UNKNOWN_CMDBNX2_BC_STATE_ERR_UNKNOWN_CMD (BNX2_BC_STATE_SIGN | 0x0400) bnx2.h 　
28890
 BNX2_BC_STATE_ERR_DRV_DEADBNX2_BC_STATE_ERR_DRV_DEAD (BNX2_BC_STATE_SIGN | 0x0500) bnx2.h 　
28891
 BNX2_BC_STATE_ERR_NO_RXPBNX2_BC_STATE_ERR_NO_RXP (BNX2_BC_STATE_SIGN | 0x0600) bnx2.h 　
28892
 BNX2_BC_STATE_ERR_TOO_MANY_RBUFBNX2_BC_STATE_ERR_TOO_MANY_RBUF (BNX2_BC_STATE_SIGN | 0x0700) bnx2.h 　
28893
 BNX2_BC_STATE_DEBUG_CMDBNX2_BC_STATE_DEBUG_CMD 0x1dc bnx2.h 　
28894
 BNX2_BC_STATE_BC_DBG_CMD_SIGNATBNX2_BC_STATE_BC_DBG_CMD_SIGNAT 0x42440000 bnx2.h 　
28895
 BNX2_BC_STATE_BC_DBG_CMD_SIGNATBNX2_BC_STATE_BC_DBG_CMD_SIGNAT 0xffff0000 bnx2.h 　
28896
 BNX2_BC_STATE_BC_DBG_CMD_LOOP_CBNX2_BC_STATE_BC_DBG_CMD_LOOP_C 0xffff bnx2.h 　
28897
 BNX2_BC_STATE_BC_DBG_CMD_LOOP_IBNX2_BC_STATE_BC_DBG_CMD_LOOP_I 0xffff bnx2.h 　
28898
 HOST_VIEW_SHMEM_BASEHOST_VIEW_SHMEM_BASE 0x167c00 bnx2.h 　
28899
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 bnx2.h 　
28900
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 bnx2.h 　
28901
 RX_OFFSETRX_OFFSET (sizeof(struct l2_fhdr) + 2) bnx2.h 　
28902
 RX_BUF_CNTRX_BUF_CNT 20 bnx2.h 　
28903
 RX_BUF_USE_SIZERX_BUF_USE_SIZE (ETH_MAX_MTU + ETH_HLEN + RX_OFFSET + 8) bnx2.h 　
28904
 RX_BUF_SIZERX_BUF_SIZE (L1_CACHE_ALIGN(RX_BUF_USE_SIZE + 8)) bnx2.h 　
28905
 PP_ChipIDPP_ChipID 0x0000 cs89x0.h offset 0h -> Corp -ID
28906
 PP_ISAIOBPP_ISAIOB 0x0020 cs89x0.h IO base address
28907
 PP_CS8900_ISAINTPP_CS8900_ISAINT 0x0022 cs89x0.h ISA interrupt select
28908
 PP_CS8920_ISAINTPP_CS8920_ISAINT 0x0370 cs89x0.h ISA interrupt select
28909
 PP_CS8900_ISADMAPP_CS8900_ISADMA 0x0024 cs89x0.h ISA Rec DMA channel
28910
 PP_CS8920_ISADMAPP_CS8920_ISADMA 0x0374 cs89x0.h ISA Rec DMA channel
28911
 PP_ISASOFPP_ISASOF 0x0026 cs89x0.h ISA DMA offset
28912
 PP_DmaFrameCntPP_DmaFrameCnt 0x0028 cs89x0.h ISA DMA Frame count
28913
 PP_DmaByteCntPP_DmaByteCnt 0x002A cs89x0.h ISA DMA Byte count
28914
 PP_CS8900_ISAMemBPP_CS8900_ISAMemB 0x002C cs89x0.h Memory base
28915
 PP_CS8920_ISAMemBPP_CS8920_ISAMemB 0x0348 cs89x0.h 　
28916
 PP_ISABootBasePP_ISABootBase 0x0030 cs89x0.h Boot Prom base
28917
 PP_ISABootMaskPP_ISABootMask 0x0034 cs89x0.h Boot Prom Mask
28918
 PP_EECMDPP_EECMD 0x0040 cs89x0.h NVR Interface Command register
28919
 PP_EEDataPP_EEData 0x0042 cs89x0.h NVR Interface Data Register
28920
 PP_DebugRegPP_DebugReg 0x0044 cs89x0.h Debug Register
28921
 PP_RxCFGPP_RxCFG 0x0102 cs89x0.h Rx Bus config
28922
 PP_RxCTLPP_RxCTL 0x0104 cs89x0.h Receive Control Register
28923
 PP_TxCFGPP_TxCFG 0x0106 cs89x0.h Transmit Config Register
28924
 PP_TxCMDPP_TxCMD 0x0108 cs89x0.h Transmit Command Register
28925
 PP_BufCFGPP_BufCFG 0x010A cs89x0.h Bus configuration Register
28926
 PP_LineCTLPP_LineCTL 0x0112 cs89x0.h Line Config Register
28927
 PP_SelfCTLPP_SelfCTL 0x0114 cs89x0.h Self Command Register
28928
 PP_BusCTLPP_BusCTL 0x0116 cs89x0.h ISA bus control Register
28929
 PP_TestCTLPP_TestCTL 0x0118 cs89x0.h Test Register
28930
 PP_AutoNegCTLPP_AutoNegCTL 0x011C cs89x0.h Auto Negotiation Ctrl
28931
 PP_ISQPP_ISQ 0x0120 cs89x0.h Interrupt Status
28932
 PP_RxEventPP_RxEvent 0x0124 cs89x0.h Rx Event Register
28933
 PP_TxEventPP_TxEvent 0x0128 cs89x0.h Tx Event Register
28934
 PP_BufEventPP_BufEvent 0x012C cs89x0.h Bus Event Register
28935
 PP_RxMissPP_RxMiss 0x0130 cs89x0.h Receive Miss Count
28936
 PP_TxColPP_TxCol 0x0132 cs89x0.h Transmit Collision Count
28937
 PP_LineSTPP_LineST 0x0134 cs89x0.h Line State Register
28938
 PP_SelfSTPP_SelfST 0x0136 cs89x0.h Self State register
28939
 PP_BusSTPP_BusST 0x0138 cs89x0.h Bus Status
28940
 PP_TDRPP_TDR 0x013C cs89x0.h Time Domain Reflectometry
28941
 PP_AutoNegSTPP_AutoNegST 0x013E cs89x0.h Auto Neg Status
28942
 PP_TxCommandPP_TxCommand 0x0144 cs89x0.h Tx Command
28943
 PP_TxLengthPP_TxLength 0x0146 cs89x0.h Tx Length
28944
 PP_LAFPP_LAF 0x0150 cs89x0.h Hash Table
28945
 PP_IAPP_IA 0x0158 cs89x0.h Physical Address Register
28946
 PP_RxStatusPP_RxStatus 0x0400 cs89x0.h Receive start of frame
28947
 PP_RxLengthPP_RxLength 0x0402 cs89x0.h Receive Length of frame
28948
 PP_RxFramePP_RxFrame 0x0404 cs89x0.h Receive frame pointer
28949
 PP_TxFramePP_TxFrame 0x0A00 cs89x0.h Transmit frame pointer
28950
 DEFAULTIOBASEDEFAULTIOBASE 0x0300 cs89x0.h 　
28951
 FIRST_IOFIRST_IO 0x020C cs89x0.h First I/O port to check
28952
 LAST_IOLAST_IO 0x037C cs89x0.h Last I/O port to check (+10h)
28953
 ADD_MASKADD_MASK 0x3000 cs89x0.h Mask it use of the ADD_PORT register
28954
 ADD_SIGADD_SIG 0x3000 cs89x0.h Expected ID signature
28955
 CHIP_EISA_ID_SIGCHIP_EISA_ID_SIG 0x630E cs89x0.h Product ID Code for Crystal Chip (CS8900 spec 4.3)
28956
 EISA_ID_SIGEISA_ID_SIG 0x4D24 cs89x0.h IBM
28957
 PART_NO_SIGPART_NO_SIG 0x1010 cs89x0.h IBM
28958
 MONGOOSE_BITMONGOOSE_BIT 0x0000 cs89x0.h IBM
28959
 EISA_ID_SIGEISA_ID_SIG 0x630E cs89x0.h PnP Vendor ID (same as chip id for Crystal board)
28960
 PART_NO_SIGPART_NO_SIG 0x4000 cs89x0.h ID code CS8920 board (PnP Vendor Product code)
28961
 MONGOOSE_BITMONGOOSE_BIT 0x2000 cs89x0.h PART_NO_SIG + MONGOOSE_BUT => ID of mongoose
28962
 PRODUCT_ID_ADDPRODUCT_ID_ADD 0x0002 cs89x0.h Address of product ID
28963
 REG_TYPE_MASKREG_TYPE_MASK 0x001F cs89x0.h 　
28964
 ERSE_WR_ENBLERSE_WR_ENBL 0x00F0 cs89x0.h 　
28965
 ERSE_WR_DISABLEERSE_WR_DISABLE 0x0000 cs89x0.h 　
28966
 RX_BUF_CFGRX_BUF_CFG 0x0003 cs89x0.h 　
28967
 RX_CONTROLRX_CONTROL 0x0005 cs89x0.h 　
28968
 TX_CFGTX_CFG 0x0007 cs89x0.h 　
28969
 TX_COMMANDTX_COMMAND 0x0009 cs89x0.h 　
28970
 BUF_CFGBUF_CFG 0x000B cs89x0.h 　
28971
 LINE_CONTROLLINE_CONTROL 0x0013 cs89x0.h 　
28972
 SELF_CONTROLSELF_CONTROL 0x0015 cs89x0.h 　
28973
 BUS_CONTROLBUS_CONTROL 0x0017 cs89x0.h 　
28974
 TEST_CONTROLTEST_CONTROL 0x0019 cs89x0.h 　
28975
 RX_EVENTRX_EVENT 0x0004 cs89x0.h 　
28976
 TX_EVENTTX_EVENT 0x0008 cs89x0.h 　
28977
 BUF_EVENTBUF_EVENT 0x000C cs89x0.h 　
28978
 RX_MISS_COUNTRX_MISS_COUNT 0x0010 cs89x0.h 　
28979
 TX_COL_COUNTTX_COL_COUNT 0x0012 cs89x0.h 　
28980
 LINE_STATUSLINE_STATUS 0x0014 cs89x0.h 　
28981
 SELF_STATUSSELF_STATUS 0x0016 cs89x0.h 　
28982
 BUS_STATUSBUS_STATUS 0x0018 cs89x0.h 　
28983
 TDRTDR 0x001C cs89x0.h 　
28984
 SKIP_1SKIP_1 0x0040 cs89x0.h 　
28985
 RX_STREAM_ENBLRX_STREAM_ENBL 0x0080 cs89x0.h 　
28986
 RX_OK_ENBLRX_OK_ENBL 0x0100 cs89x0.h 　
28987
 RX_DMA_ONLYRX_DMA_ONLY 0x0200 cs89x0.h 　
28988
 AUTO_RX_DMAAUTO_RX_DMA 0x0400 cs89x0.h 　
28989
 BUFFER_CRCBUFFER_CRC 0x0800 cs89x0.h 　
28990
 RX_CRC_ERROR_ENBLRX_CRC_ERROR_ENBL 0x1000 cs89x0.h 　
28991
 RX_RUNT_ENBLRX_RUNT_ENBL 0x2000 cs89x0.h 　
28992
 RX_EXTRA_DATA_ENBLRX_EXTRA_DATA_ENBL 0x4000 cs89x0.h 　
28993
 RX_IA_HASH_ACCEPTRX_IA_HASH_ACCEPT 0x0040 cs89x0.h 　
28994
 RX_PROM_ACCEPTRX_PROM_ACCEPT 0x0080 cs89x0.h 　
28995
 RX_OK_ACCEPTRX_OK_ACCEPT 0x0100 cs89x0.h 　
28996
 RX_MULTCAST_ACCEPTRX_MULTCAST_ACCEPT 0x0200 cs89x0.h 　
28997
 RX_IA_ACCEPTRX_IA_ACCEPT 0x0400 cs89x0.h 　
28998
 RX_BROADCAST_ACCEPTRX_BROADCAST_ACCEPT 0x0800 cs89x0.h 　
28999
 RX_BAD_CRC_ACCEPTRX_BAD_CRC_ACCEPT 0x1000 cs89x0.h 　
29000
 RX_RUNT_ACCEPTRX_RUNT_ACCEPT 0x2000 cs89x0.h 　
29001
 RX_EXTRA_DATA_ACCEPTRX_EXTRA_DATA_ACCEPT 0x4000 cs89x0.h 　
29002
 RX_ALL_ACCEPTRX_ALL_ACCEPT (RX_PROM_ACCEPT|RX_BAD_CRC_ACCEPT|RX_RUNT_ACCEPT|RX_EXTRA_DATA_ACCEPT) cs89x0.h 　
29003
 DEF_RX_ACCEPTDEF_RX_ACCEPT (RX_IA_ACCEPT | RX_BROADCAST_ACCEPT | RX_OK_ACCEPT) cs89x0.h 　
29004
 TX_LOST_CRS_ENBLTX_LOST_CRS_ENBL 0x0040 cs89x0.h 　
29005
 TX_SQE_ERROR_ENBLTX_SQE_ERROR_ENBL 0x0080 cs89x0.h 　
29006
 TX_OK_ENBLTX_OK_ENBL 0x0100 cs89x0.h 　
29007
 TX_LATE_COL_ENBLTX_LATE_COL_ENBL 0x0200 cs89x0.h 　
29008
 TX_JBR_ENBLTX_JBR_ENBL 0x0400 cs89x0.h 　
29009
 TX_ANY_COL_ENBLTX_ANY_COL_ENBL 0x0800 cs89x0.h 　
29010
 TX_16_COL_ENBLTX_16_COL_ENBL 0x8000 cs89x0.h 　
29011
 TX_START_4_BYTESTX_START_4_BYTES 0x0000 cs89x0.h 　
29012
 TX_START_64_BYTESTX_START_64_BYTES 0x0040 cs89x0.h 　
29013
 TX_START_128_BYTESTX_START_128_BYTES 0x0080 cs89x0.h 　
29014
 TX_START_ALL_BYTESTX_START_ALL_BYTES 0x00C0 cs89x0.h 　
29015
 TX_FORCETX_FORCE 0x0100 cs89x0.h 　
29016
 TX_ONE_COLTX_ONE_COL 0x0200 cs89x0.h 　
29017
 TX_TWO_PART_DEFF_DISABLETX_TWO_PART_DEFF_DISABLE 0x0400 cs89x0.h 　
29018
 TX_NO_CRCTX_NO_CRC 0x1000 cs89x0.h 　
29019
 TX_RUNTTX_RUNT 0x2000 cs89x0.h 　
29020
 GENERATE_SW_INTERRUPTGENERATE_SW_INTERRUPT 0x0040 cs89x0.h 　
29021
 RX_DMA_ENBLRX_DMA_ENBL 0x0080 cs89x0.h 　
29022
 READY_FOR_TX_ENBLREADY_FOR_TX_ENBL 0x0100 cs89x0.h 　
29023
 TX_UNDERRUN_ENBLTX_UNDERRUN_ENBL 0x0200 cs89x0.h 　
29024
 RX_MISS_ENBLRX_MISS_ENBL 0x0400 cs89x0.h 　
29025
 RX_128_BYTE_ENBLRX_128_BYTE_ENBL 0x0800 cs89x0.h 　
29026
 TX_COL_COUNT_OVRFLOW_ENBLTX_COL_COUNT_OVRFLOW_ENBL 0x1000 cs89x0.h 　
29027
 RX_MISS_COUNT_OVRFLOW_ENBLRX_MISS_COUNT_OVRFLOW_ENBL 0x2000 cs89x0.h 　
29028
 RX_DEST_MATCH_ENBLRX_DEST_MATCH_ENBL 0x8000 cs89x0.h 　
29029
 SERIAL_RX_ONSERIAL_RX_ON 0x0040 cs89x0.h 　
29030
 SERIAL_TX_ONSERIAL_TX_ON 0x0080 cs89x0.h 　
29031
 AUI_ONLYAUI_ONLY 0x0100 cs89x0.h 　
29032
 AUTO_AUI_10BASETAUTO_AUI_10BASET 0x0200 cs89x0.h 　
29033
 MODIFIED_BACKOFFMODIFIED_BACKOFF 0x0800 cs89x0.h 　
29034
 NO_AUTO_POLARITYNO_AUTO_POLARITY 0x1000 cs89x0.h 　
29035
 TWO_PART_DEFDISTWO_PART_DEFDIS 0x2000 cs89x0.h 　
29036
 LOW_RX_SQUELCHLOW_RX_SQUELCH 0x4000 cs89x0.h 　
29037
 POWER_ON_RESETPOWER_ON_RESET 0x0040 cs89x0.h 　
29038
 SW_STOPSW_STOP 0x0100 cs89x0.h 　
29039
 SLEEP_ONSLEEP_ON 0x0200 cs89x0.h 　
29040
 AUTO_WAKEUPAUTO_WAKEUP 0x0400 cs89x0.h 　
29041
 HCB0_ENBLHCB0_ENBL 0x1000 cs89x0.h 　
29042
 HCB1_ENBLHCB1_ENBL 0x2000 cs89x0.h 　
29043
 HCB0HCB0 0x4000 cs89x0.h 　
29044
 HCB1HCB1 0x8000 cs89x0.h 　
29045
 RESET_RX_DMARESET_RX_DMA 0x0040 cs89x0.h 　
29046
 MEMORY_ONMEMORY_ON 0x0400 cs89x0.h 　
29047
 DMA_BURST_MODEDMA_BURST_MODE 0x0800 cs89x0.h 　
29048
 IO_CHANNEL_READY_ONIO_CHANNEL_READY_ON 0x1000 cs89x0.h 　
29049
 RX_DMA_SIZE_64KRX_DMA_SIZE_64K 0x2000 cs89x0.h 　
29050
 ENABLE_IRQENABLE_IRQ 0x8000 cs89x0.h 　
29051
 LINK_OFFLINK_OFF 0x0080 cs89x0.h 　
29052
 ENDEC_LOOPBACKENDEC_LOOPBACK 0x0200 cs89x0.h 　
29053
 AUI_LOOPBACKAUI_LOOPBACK 0x0400 cs89x0.h 　
29054
 BACKOFF_OFFBACKOFF_OFF 0x0800 cs89x0.h 　
29055
 FAST_TESTFAST_TEST 0x8000 cs89x0.h 　
29056
 RX_IA_HASHEDRX_IA_HASHED 0x0040 cs89x0.h 　
29057
 RX_DRIBBLERX_DRIBBLE 0x0080 cs89x0.h 　
29058
 RX_OKRX_OK 0x0100 cs89x0.h 　
29059
 RX_HASHEDRX_HASHED 0x0200 cs89x0.h 　
29060
 RX_IARX_IA 0x0400 cs89x0.h 　
29061
 RX_BROADCASTRX_BROADCAST 0x0800 cs89x0.h 　
29062
 RX_CRC_ERRORRX_CRC_ERROR 0x1000 cs89x0.h 　
29063
 RX_RUNTRX_RUNT 0x2000 cs89x0.h 　
29064
 RX_EXTRA_DATARX_EXTRA_DATA 0x4000 cs89x0.h 　
29065
 HASH_INDEX_MASKHASH_INDEX_MASK 0x0FC00 cs89x0.h 　
29066
 TX_LOST_CRSTX_LOST_CRS 0x0040 cs89x0.h 　
29067
 TX_SQE_ERRORTX_SQE_ERROR 0x0080 cs89x0.h 　
29068
 TX_OKTX_OK 0x0100 cs89x0.h 　
29069
 TX_LATE_COLTX_LATE_COL 0x0200 cs89x0.h 　
29070
 TX_JBRTX_JBR 0x0400 cs89x0.h 　
29071
 TX_16_COLTX_16_COL 0x8000 cs89x0.h 　
29072
 TX_SEND_OK_BITSTX_SEND_OK_BITS (TX_OK|TX_LOST_CRS) cs89x0.h 　
29073
 TX_COL_COUNT_MASKTX_COL_COUNT_MASK 0x7800 cs89x0.h 　
29074
 SW_INTERRUPTSW_INTERRUPT 0x0040 cs89x0.h 　
29075
 RX_DMARX_DMA 0x0080 cs89x0.h 　
29076
 READY_FOR_TXREADY_FOR_TX 0x0100 cs89x0.h 　
29077
 TX_UNDERRUNTX_UNDERRUN 0x0200 cs89x0.h 　
29078
 RX_MISSRX_MISS 0x0400 cs89x0.h 　
29079
 RX_128_BYTERX_128_BYTE 0x0800 cs89x0.h 　
29080
 TX_COL_OVRFLWTX_COL_OVRFLW 0x1000 cs89x0.h 　
29081
 RX_MISS_OVRFLWRX_MISS_OVRFLW 0x2000 cs89x0.h 　
29082
 RX_DEST_MATCHRX_DEST_MATCH 0x8000 cs89x0.h 　
29083
 LINK_OKLINK_OK 0x0080 cs89x0.h 　
29084
 AUI_ONAUI_ON 0x0100 cs89x0.h 　
29085
 TENBASET_ONTENBASET_ON 0x0200 cs89x0.h 　
29086
 POLARITY_OKPOLARITY_OK 0x1000 cs89x0.h 　
29087
 CRS_OKCRS_OK 0x4000 cs89x0.h 　
29088
 ACTIVE_33VACTIVE_33V 0x0040 cs89x0.h 　
29089
 INIT_DONEINIT_DONE 0x0080 cs89x0.h 　
29090
 SI_BUSYSI_BUSY 0x0100 cs89x0.h 　
29091
 EEPROM_PRESENTEEPROM_PRESENT 0x0200 cs89x0.h 　
29092
 EEPROM_OKEEPROM_OK 0x0400 cs89x0.h 　
29093
 EL_PRESENTEL_PRESENT 0x0800 cs89x0.h 　
29094
 EE_SIZE_64EE_SIZE_64 0x1000 cs89x0.h 　
29095
 TX_BID_ERRORTX_BID_ERROR 0x0080 cs89x0.h 　
29096
 READY_FOR_TX_NOWREADY_FOR_TX_NOW 0x0100 cs89x0.h 　
29097
 RE_NEG_NOWRE_NEG_NOW 0x0040 cs89x0.h 　
29098
 ALLOW_FDXALLOW_FDX 0x0080 cs89x0.h 　
29099
 AUTO_NEG_ENABLEAUTO_NEG_ENABLE 0x0100 cs89x0.h 　
29100
 NLP_ENABLENLP_ENABLE 0x0200 cs89x0.h 　
29101
 FORCE_FDXFORCE_FDX 0x8000 cs89x0.h 　
29102
 AUTO_NEG_BITSAUTO_NEG_BITS (FORCE_FDX|NLP_ENABLE|AUTO_NEG_ENABLE) cs89x0.h 　
29103
 AUTO_NEG_MASKAUTO_NEG_MASK (FORCE_FDX|NLP_ENABLE|AUTO_NEG_ENABLE|ALLOW_FDX|RE_NEG_NOW) cs89x0.h 　
29104
 AUTO_NEG_BUSYAUTO_NEG_BUSY 0x0080 cs89x0.h 　
29105
 FLP_LINKFLP_LINK 0x0100 cs89x0.h 　
29106
 FLP_LINK_GOODFLP_LINK_GOOD 0x0800 cs89x0.h 　
29107
 LINK_FAULTLINK_FAULT 0x1000 cs89x0.h 　
29108
 HDX_ACTIVEHDX_ACTIVE 0x4000 cs89x0.h 　
29109
 FDX_ACTIVEFDX_ACTIVE 0x8000 cs89x0.h 　
29110
 ISQ_RECEIVER_EVENTISQ_RECEIVER_EVENT 0x04 cs89x0.h 　
29111
 ISQ_TRANSMITTER_EVENTISQ_TRANSMITTER_EVENT 0x08 cs89x0.h 　
29112
 ISQ_BUFFER_EVENTISQ_BUFFER_EVENT 0x0c cs89x0.h 　
29113
 ISQ_RX_MISS_EVENTISQ_RX_MISS_EVENT 0x10 cs89x0.h 　
29114
 ISQ_TX_COL_EVENTISQ_TX_COL_EVENT 0x12 cs89x0.h 　
29115
 ISQ_EVENT_MASKISQ_EVENT_MASK 0x003F cs89x0.h ISQ mask to find out type of event
29116
 ISQ_HISTISQ_HIST 16 cs89x0.h small history buffer
29117
 AUTOINCREMENTAUTOINCREMENT 0x8000 cs89x0.h Bit mask to set bit-15 for autoincrement
29118
 TXRXBUFSIZETXRXBUFSIZE 0x0600 cs89x0.h 　
29119
 RXDMABUFSIZERXDMABUFSIZE 0x8000 cs89x0.h 　
29120
 RXDMASIZERXDMASIZE 0x4000 cs89x0.h 　
29121
 TXRX_LENGTH_MASKTXRX_LENGTH_MASK 0x07FF cs89x0.h 　
29122
 RCV_WITH_RXONRCV_WITH_RXON 1 cs89x0.h Set SerRx ON
29123
 RCV_COUNTSRCV_COUNTS 2 cs89x0.h Use Framecnt1
29124
 RCV_PONGRCV_PONG 4 cs89x0.h Pong respondent
29125
 RCV_DONGRCV_DONG 8 cs89x0.h Dong operation
29126
 RCV_POLLINGRCV_POLLING 0x10 cs89x0.h Poll RxEvent
29127
 RCV_ISQRCV_ISQ 0x20 cs89x0.h Use ISQ, int
29128
 RCV_AUTO_DMARCV_AUTO_DMA 0x100 cs89x0.h Set AutoRxDMAE
29129
 RCV_DMARCV_DMA 0x200 cs89x0.h Set RxDMA only
29130
 RCV_DMA_ALLRCV_DMA_ALL 0x400 cs89x0.h Copy all DMA'ed
29131
 RCV_FIXED_DATARCV_FIXED_DATA 0x800 cs89x0.h Every frame same
29132
 RCV_IORCV_IO 0x1000 cs89x0.h Use ISA IO only
29133
 RCV_MEMORYRCV_MEMORY 0x2000 cs89x0.h Use ISA Memory
29134
 RAM_SIZERAM_SIZE 0x1000 cs89x0.h The card has 4k bytes or RAM
29135
 PKT_STARTPKT_START PP_TxFrame cs89x0.h Start of packet RAM
29136
 RX_FRAME_PORTRX_FRAME_PORT 0x0000 cs89x0.h 　
29137
 TX_FRAME_PORTTX_FRAME_PORT RX_FRAME_PORT cs89x0.h 　
29138
 TX_CMD_PORTTX_CMD_PORT 0x0004 cs89x0.h 　
29139
 TX_NOWTX_NOW 0x0000 cs89x0.h Tx packet after 5 bytes copied
29140
 TX_AFTER_381TX_AFTER_381 0x0020 cs89x0.h Tx packet after 381 bytes copied
29141
 TX_AFTER_ALLTX_AFTER_ALL 0x00C0 cs89x0.h Tx packet after all bytes copied
29142
 TX_LEN_PORTTX_LEN_PORT 0x0006 cs89x0.h 　
29143
 ISQ_PORTISQ_PORT 0x0008 cs89x0.h 　
29144
 ADD_PORTADD_PORT 0x000A cs89x0.h 　
29145
 DATA_PORTDATA_PORT 0x000C cs89x0.h 　
29146
 EEPROM_WRITE_ENEEPROM_WRITE_EN 0x00F0 cs89x0.h 　
29147
 EEPROM_WRITE_DISEEPROM_WRITE_DIS 0x0000 cs89x0.h 　
29148
 EEPROM_WRITE_CMDEEPROM_WRITE_CMD 0x0100 cs89x0.h 　
29149
 EEPROM_READ_CMDEEPROM_READ_CMD 0x0200 cs89x0.h 　
29150
 RBUF_EVENT_LOWRBUF_EVENT_LOW 0 cs89x0.h Low byte of RxEvent - status of received frame
29151
 RBUF_EVENT_HIGHRBUF_EVENT_HIGH 1 cs89x0.h High byte of RxEvent - status of received frame
29152
 RBUF_LEN_LOWRBUF_LEN_LOW 2 cs89x0.h Length of received data - low byte
29153
 RBUF_LEN_HIRBUF_LEN_HI 3 cs89x0.h Length of received data - high byte
29154
 RBUF_HEAD_LENRBUF_HEAD_LEN 4 cs89x0.h Length of this header
29155
 CHIP_READCHIP_READ 0x1 cs89x0.h Used to mark state of the repins code (chip or dma)
29156
 DMA_READDMA_READ 0x2 cs89x0.h Used to mark state of the repins code (chip or dma)
29157
 BIOS_START_SEGBIOS_START_SEG 0x00000 cs89x0.h 　
29158
 BIOS_OFFSET_INCBIOS_OFFSET_INC 0x0010 cs89x0.h 　
29159
 BIOS_START_SEGBIOS_START_SEG 0x0c000 cs89x0.h 　
29160
 BIOS_OFFSET_INCBIOS_OFFSET_INC 0x0200 cs89x0.h 　
29161
 BIOS_LAST_OFFSETBIOS_LAST_OFFSET 0x0fc00 cs89x0.h 　
29162
 ISA_CNF_OFFSETISA_CNF_OFFSET 0x6 cs89x0.h 　
29163
 TX_CTL_OFFSETTX_CTL_OFFSET (ISA_CNF_OFFSET + 8) cs89x0.h 8900 eeprom
29164
 AUTO_NEG_CNF_OFFSETAUTO_NEG_CNF_OFFSET (ISA_CNF_OFFSET + 8) cs89x0.h 8920 eeprom
29165
 EE_FORCE_FDXEE_FORCE_FDX 0x8000 cs89x0.h 　
29166
 EE_NLP_ENABLEEE_NLP_ENABLE 0x0200 cs89x0.h 　
29167
 EE_AUTO_NEG_ENABLEEE_AUTO_NEG_ENABLE 0x0100 cs89x0.h 　
29168
 EE_ALLOW_FDXEE_ALLOW_FDX 0x0080 cs89x0.h 　
29169
 EE_AUTO_NEG_CNF_MASKEE_AUTO_NEG_CNF_MASK (EE_FORCE_FDX|EE_NLP_ENABLE|EE_AUTO_NEG_ENABLE|EE_ALLOW_FDX) cs89x0.h 　
29170
 IMM_BITIMM_BIT 0x0040 cs89x0.h ignore missing media
29171
 ADAPTER_CNF_OFFSETADAPTER_CNF_OFFSET (AUTO_NEG_CNF_OFFSET + 2) cs89x0.h 　
29172
 A_CNF_10B_TA_CNF_10B_T 0x0001 cs89x0.h 　
29173
 A_CNF_AUIA_CNF_AUI 0x0002 cs89x0.h 　
29174
 A_CNF_10B_2A_CNF_10B_2 0x0004 cs89x0.h 　
29175
 A_CNF_MEDIA_TYPEA_CNF_MEDIA_TYPE 0x0060 cs89x0.h 　
29176
 A_CNF_MEDIA_AUTOA_CNF_MEDIA_AUTO 0x0000 cs89x0.h 　
29177
 A_CNF_MEDIA_10B_TA_CNF_MEDIA_10B_T 0x0020 cs89x0.h 　
29178
 A_CNF_MEDIA_AUIA_CNF_MEDIA_AUI 0x0040 cs89x0.h 　
29179
 A_CNF_MEDIA_10B_2A_CNF_MEDIA_10B_2 0x0060 cs89x0.h 　
29180
 A_CNF_DC_DC_POLARITYA_CNF_DC_DC_POLARITY 0x0080 cs89x0.h 　
29181
 A_CNF_NO_AUTO_POLARITYA_CNF_NO_AUTO_POLARITY 0x2000 cs89x0.h 　
29182
 A_CNF_LOW_RX_SQUELCHA_CNF_LOW_RX_SQUELCH 0x4000 cs89x0.h 　
29183
 A_CNF_EXTND_10B_2A_CNF_EXTND_10B_2 0x8000 cs89x0.h 　
29184
 PACKET_PAGE_OFFSETPACKET_PAGE_OFFSET 0x8 cs89x0.h 　
29185
 INT_NO_MASKINT_NO_MASK 0x000F cs89x0.h 　
29186
 DMA_NO_MASKDMA_NO_MASK 0x0070 cs89x0.h 　
29187
 ISA_DMA_SIZEISA_DMA_SIZE 0x0200 cs89x0.h 　
29188
 ISA_AUTO_RxDMAISA_AUTO_RxDMA 0x0400 cs89x0.h 　
29189
 ISA_RxDMAISA_RxDMA 0x0800 cs89x0.h 　
29190
 DMA_BURSTDMA_BURST 0x1000 cs89x0.h 　
29191
 STREAM_TRANSFERSTREAM_TRANSFER 0x2000 cs89x0.h 　
29192
 ANY_ISA_DMAANY_ISA_DMA (ISA_AUTO_RxDMA | ISA_RxDMA) cs89x0.h 　
29193
 DMA_BASEDMA_BASE 0x00 cs89x0.h DMA controller base
29194
 DMA_BASE_2DMA_BASE_2 0x0C0 cs89x0.h DMA controller base
29195
 DMA_STATDMA_STAT 0x0D0 cs89x0.h DMA controller status register
29196
 DMA_MASKDMA_MASK 0x0D4 cs89x0.h DMA controller mask register
29197
 DMA_MODEDMA_MODE 0x0D6 cs89x0.h DMA controller mode register
29198
 DMA_RESETFFDMA_RESETFF 0x0D8 cs89x0.h DMA controller first/last flip flop
29199
 DMA_DISABLEDMA_DISABLE 0x04 cs89x0.h Disable channel n
29200
 DMA_ENABLEDMA_ENABLE 0x00 cs89x0.h Enable channel n
29201
 DMA_RX_MODEDMA_RX_MODE 0x14 cs89x0.h 　
29202
 DMA_TX_MODEDMA_TX_MODE 0x18 cs89x0.h 　
29203
 DMA_SIZEDMA_SIZE (16*1024) cs89x0.h Size of dma buffer - 16k
29204
 CS8900CS8900 0x0000 cs89x0.h 　
29205
 CS8920CS8920 0x4000 cs89x0.h 　
29206
 CS8920MCS8920M 0x6000 cs89x0.h 　
29207
 REVISON_BITSREVISON_BITS 0x1F00 cs89x0.h 　
29208
 EEVER_NUMBEREEVER_NUMBER 0x12 cs89x0.h 　
29209
 CHKSUM_LENCHKSUM_LEN 0x14 cs89x0.h 　
29210
 CHKSUM_VALCHKSUM_VAL 0x0000 cs89x0.h 　
29211
 START_EEPROM_DATASTART_EEPROM_DATA 0x001c cs89x0.h Offset into eeprom for start of data
29212
 IRQ_MAP_EEPROM_DATAIRQ_MAP_EEPROM_DATA 0x0046 cs89x0.h Offset into eeprom for the IRQ map
29213
 IRQ_MAP_LENIRQ_MAP_LEN 0x0004 cs89x0.h No of bytes to read for the IRQ map
29214
 PNP_IRQ_FRMTPNP_IRQ_FRMT 0x0022 cs89x0.h PNP small item IRQ format
29215
 CS8900_IRQ_MAPCS8900_IRQ_MAP 0x1c20 cs89x0.h This IRQ map is fixed
29216
 CS8920_NO_INTSCS8920_NO_INTS 0x0F cs89x0.h Max CS8920 interrupt select #
29217
 PNP_ADD_PORTPNP_ADD_PORT 0x0279 cs89x0.h 　
29218
 PNP_WRITE_PORTPNP_WRITE_PORT 0x0A79 cs89x0.h 　
29219
 GET_PNP_ISA_STRUCTGET_PNP_ISA_STRUCT 0x40 cs89x0.h 　
29220
 PNP_ISA_STRUCT_LENPNP_ISA_STRUCT_LEN 0x06 cs89x0.h 　
29221
 PNP_CSN_CNT_OFFPNP_CSN_CNT_OFF 0x01 cs89x0.h 　
29222
 PNP_RD_PORT_OFFPNP_RD_PORT_OFF 0x02 cs89x0.h 　
29223
 PNP_FUNCTION_OKPNP_FUNCTION_OK 0x00 cs89x0.h 　
29224
 PNP_WAKEPNP_WAKE 0x03 cs89x0.h 　
29225
 PNP_RSRC_DATAPNP_RSRC_DATA 0x04 cs89x0.h 　
29226
 PNP_RSRC_READYPNP_RSRC_READY 0x01 cs89x0.h 　
29227
 PNP_STATUSPNP_STATUS 0x05 cs89x0.h 　
29228
 PNP_ACTIVATEPNP_ACTIVATE 0x30 cs89x0.h 　
29229
 PNP_CNF_IO_HPNP_CNF_IO_H 0x60 cs89x0.h 　
29230
 PNP_CNF_IO_LPNP_CNF_IO_L 0x61 cs89x0.h 　
29231
 PNP_CNF_INTPNP_CNF_INT 0x70 cs89x0.h 　
29232
 PNP_CNF_DMAPNP_CNF_DMA 0x74 cs89x0.h 　
29233
 PNP_CNF_MEMPNP_CNF_MEM 0x48 cs89x0.h 　
29234
 BIT0BIT0 1 cs89x0.h 　
29235
 BIT15BIT15 0x8000 cs89x0.h 　
29236
 CONGENBCONGENB 0 eepro100.h Enable congestion control in the DP83840.
29237
 TX_FIFOTX_FIFO 8 eepro100.h Tx FIFO threshold in 4 byte units, 0-15
29238
 RX_FIFORX_FIFO 8 eepro100.h Rx FIFO threshold, default 32 bytes.
29239
 TX_DMA_COUNTTX_DMA_COUNT 0 eepro100.h Tx DMA burst length, 0-127, default 0.
29240
 RX_DMA_COUNTRX_DMA_COUNT 0 eepro100.h Rx DMA length, 0 means no preemption.
29241
 CU_CMD_TIMEOUTCU_CMD_TIMEOUT 1000 eepro100.h CU command accept timeout in microseconds
29242
 LINK_CHECK_PERIODLINK_CHECK_PERIOD 1000 eepro100.h # of poll() calls between link checks
29243
 RFD_PACKET_LENRFD_PACKET_LEN 1518 eepro100.h 　
29244
 RFD_IOB_LENRFD_IOB_LEN 1536 eepro100.h 　
29245
 RFD_HEADER_LENRFD_HEADER_LEN 16 eepro100.h 　
29246
 CB_ALIGNCB_ALIGN 2 eepro100.h Alignment of command blocks
29247
 RFD_COUNTRFD_COUNT 4 eepro100.h 　
29248
 TCB_COUNTTCB_COUNT 4 eepro100.h 　
29249
 RX_RING_BYTESRX_RING_BYTES ( RFD_COUNT * sizeof ( struct ifec_rfd ) ) eepro100.h 　
29250
 TX_RING_BYTESTX_RING_BYTES ( TCB_COUNT * sizeof ( struct ifec_tcb ) ) eepro100.h 　
29251
 EEPROM_ADDR_MAC_0EEPROM_ADDR_MAC_0 0 eepro100.h 　
29252
 EEPROM_ADDR_MDIO_REGISTEREEPROM_ADDR_MDIO_REGISTER 6 eepro100.h 　
29253
 EE_SHIFT_CLKEE_SHIFT_CLK 0x01 eepro100.h EEPROM shift clock.
29254
 EE_CSEE_CS 0x02 eepro100.h EEPROM chip select.
29255
 EE_DATA_WRITEEE_DATA_WRITE 0x04 eepro100.h EEPROM chip data in.
29256
 EE_DATA_READEE_DATA_READ 0x08 eepro100.h EEPROM chip data out.
29257
 EE_ENBEE_ENB ( 0x4800 | EE_CS ) eepro100.h 　
29258
 PCI_VENDOR_SMCPCI_VENDOR_SMC 0x10B8 epic100.h 　
29259
 PCI_DEVICE_SMC_EPIC100PCI_DEVICE_SMC_EPIC100 0x0005 epic100.h 　
29260
 PCI_DEVICE_ID_NONEPCI_DEVICE_ID_NONE 0xFFFF epic100.h 　
29261
 CR_STOP_RXCR_STOP_RX (0x00000001) epic100.h 　
29262
 CR_START_RXCR_START_RX (0x00000002) epic100.h 　
29263
 CR_QUEUE_TXCR_QUEUE_TX (0x00000004) epic100.h 　
29264
 CR_QUEUE_RXCR_QUEUE_RX (0x00000008) epic100.h 　
29265
 CR_NEXTFRAMECR_NEXTFRAME (0x00000010) epic100.h 　
29266
 CR_STOP_TX_DMACR_STOP_TX_DMA (0x00000020) epic100.h 　
29267
 CR_STOP_RX_DMACR_STOP_RX_DMA (0x00000040) epic100.h 　
29268
 CR_TX_UGOCR_TX_UGO (0x00000080) epic100.h 　
29269
 INTR_RX_THR_STAINTR_RX_THR_STA (0x00400000) epic100.h rx copy threshold status NI
29270
 INTR_RX_BUFF_EMPTYINTR_RX_BUFF_EMPTY (0x00200000) epic100.h rx buffers empty. NI
29271
 INTR_TX_IN_PROGINTR_TX_IN_PROG (0x00100000) epic100.h tx copy in progess. NI
29272
 INTR_RX_IN_PROGINTR_RX_IN_PROG (0x00080000) epic100.h rx copy in progress. NI
29273
 INTR_TXIDLEINTR_TXIDLE (0x00040000) epic100.h tx idle. NI
29274
 INTR_RXIDLEINTR_RXIDLE (0x00020000) epic100.h rx idle. NI
29275
 INTR_INTR_ACTIVEINTR_INTR_ACTIVE (0x00010000) epic100.h Interrupt active. NI
29276
 INTR_RX_STATUS_OKINTR_RX_STATUS_OK (0x00008000) epic100.h rx status valid. NI
29277
 INTR_PCI_TGT_ABTINTR_PCI_TGT_ABT (0x00004000) epic100.h PCI Target abort
29278
 INTR_PCI_MASTER_ABTINTR_PCI_MASTER_ABT (0x00002000) epic100.h PCI Master abort
29279
 INTR_PCI_PARITY_ERRINTR_PCI_PARITY_ERR (0x00001000) epic100.h PCI adress parity error
29280
 INTR_PCI_DATA_ERRINTR_PCI_DATA_ERR (0x00000800) epic100.h PCI data parity error
29281
 INTR_RX_THR_CROSSEDINTR_RX_THR_CROSSED (0x00000400) epic100.h rx copy threshold crossed
29282
 INTR_CNTFULLINTR_CNTFULL (0x00000200) epic100.h Counter overflow
29283
 INTR_TXUNDERRUNINTR_TXUNDERRUN (0x00000100) epic100.h tx underrun.
29284
 INTR_TXEMPTYINTR_TXEMPTY (0x00000080) epic100.h tx queue empty
29285
 INTR_TX_CH_COMPLETEINTR_TX_CH_COMPLETE (0x00000040) epic100.h tx chain complete
29286
 INTR_TXDONEINTR_TXDONE (0x00000020) epic100.h tx complete (w or w/o err)
29287
 INTR_RXERRORINTR_RXERROR (0x00000010) epic100.h rx error (CRC)
29288
 INTR_RXOVERFLOWINTR_RXOVERFLOW (0x00000008) epic100.h rx buffer overflow
29289
 INTR_RX_QUEUE_EMPTYINTR_RX_QUEUE_EMPTY (0x00000004) epic100.h rx queue empty.
29290
 INTR_RXHEADERINTR_RXHEADER (0x00000002) epic100.h header copy complete
29291
 INTR_RXDONEINTR_RXDONE (0x00000001) epic100.h Receive copy complete
29292
 INTR_CLEARINTRINTR_CLEARINTR (0x00007FFF) epic100.h 　
29293
 INTR_VALIDBITSINTR_VALIDBITS (0x007FFFFF) epic100.h 　
29294
 INTR_DISABLEINTR_DISABLE (0x00000000) epic100.h 　
29295
 INTR_CLEARERRSINTR_CLEARERRS (0x00007F18) epic100.h 　
29296
 INTR_ABNINTRINTR_ABNINTR (INTR_CNTFULL | INTR_TXUNDERRUN | INTR_RXOVERFLOW) epic100.h 　
29297
 GC_SOFT_RESETGC_SOFT_RESET (0x00000001) epic100.h 　
29298
 GC_INTR_ENABLEGC_INTR_ENABLE (0x00000002) epic100.h 　
29299
 GC_SOFT_INTRGC_SOFT_INTR (0x00000004) epic100.h 　
29300
 GC_POWER_DOWNGC_POWER_DOWN (0x00000008) epic100.h 　
29301
 GC_ONE_COPYGC_ONE_COPY (0x00000010) epic100.h 　
29302
 GC_BIG_ENDIANGC_BIG_ENDIAN (0x00000020) epic100.h 　
29303
 GC_RX_PREEMPT_TXGC_RX_PREEMPT_TX (0x00000040) epic100.h 　
29304
 GC_TX_PREEMPT_RXGC_TX_PREEMPT_RX (0x00000080) epic100.h 　
29305
 GC_RX_FIFO_THR_32GC_RX_FIFO_THR_32 (0x00000000) epic100.h 　
29306
 GC_RX_FIFO_THR_64GC_RX_FIFO_THR_64 (0x00000100) epic100.h 　
29307
 GC_RX_FIFO_THR_96GC_RX_FIFO_THR_96 (0x00000200) epic100.h 　
29308
 GC_RX_FIFO_THR_128GC_RX_FIFO_THR_128 (0x00000300) epic100.h 　
29309
 GC_MRC_MEM_READGC_MRC_MEM_READ (0x00000000) epic100.h 　
29310
 GC_MRC_READ_MULTGC_MRC_READ_MULT (0x00000400) epic100.h 　
29311
 GC_MRC_READ_LINEGC_MRC_READ_LINE (0x00000800) epic100.h 　
29312
 GC_SOFTBIT0GC_SOFTBIT0 (0x00001000) epic100.h 　
29313
 GC_SOFTBIT1GC_SOFTBIT1 (0x00002000) epic100.h 　
29314
 GC_RESET_PHYGC_RESET_PHY (0x00004000) epic100.h 　
29315
 RC_SAVE_ERRORED_PKTRC_SAVE_ERRORED_PKT (0x00000001) epic100.h 　
29316
 RC_SAVE_RUNT_FRAMESRC_SAVE_RUNT_FRAMES (0x00000002) epic100.h 　
29317
 RC_RCV_BROADCASTRC_RCV_BROADCAST (0x00000004) epic100.h 　
29318
 RC_RCV_MULTICASTRC_RCV_MULTICAST (0x00000008) epic100.h 　
29319
 RC_RCV_INVERSE_PKTRC_RCV_INVERSE_PKT (0x00000010) epic100.h 　
29320
 RC_PROMISCUOUS_MODERC_PROMISCUOUS_MODE (0x00000020) epic100.h 　
29321
 RC_MONITOR_MODERC_MONITOR_MODE (0x00000040) epic100.h 　
29322
 RC_EARLY_RCV_ENABLERC_EARLY_RCV_ENABLE (0x00000080) epic100.h 　
29323
 RD_FRAGLISTRD_FRAGLIST (0x0001) epic100.h Desc points to a fragment list
29324
 RD_LLFORMRD_LLFORM (0x0002) epic100.h Frag list format
29325
 RD_HDR_CPYRD_HDR_CPY (0x0004) epic100.h Desc used for header copy
29326
 TC_EARLY_TX_ENABLETC_EARLY_TX_ENABLE (0x00000001) epic100.h 　
29327
 TC_LM_NORMALTC_LM_NORMAL (0x00000000) epic100.h 　
29328
 TC_LM_INTERNALTC_LM_INTERNAL (0x00000002) epic100.h 　
29329
 TC_LM_EXTERNALTC_LM_EXTERNAL (0x00000004) epic100.h 　
29330
 TC_LM_FULL_DPXTC_LM_FULL_DPX (0x00000006) epic100.h 　
29331
 TX_SLOT_TIMETX_SLOT_TIME (0x00000078) epic100.h 　
29332
 TX_FIFO_THRESHTX_FIFO_THRESH 128 epic100.h Rounded down to 4 byte units.
29333
 RRING_PKT_INTACTRRING_PKT_INTACT (0x0001) epic100.h 　
29334
 RRING_ALIGN_ERRRRING_ALIGN_ERR (0x0002) epic100.h 　
29335
 RRING_CRC_ERRRRING_CRC_ERR (0x0004) epic100.h 　
29336
 RRING_MISSED_PKTRRING_MISSED_PKT (0x0008) epic100.h 　
29337
 RRING_MULTICASTRRING_MULTICAST (0x0010) epic100.h 　
29338
 RRING_BROADCASTRRING_BROADCAST (0x0020) epic100.h 　
29339
 RRING_RECEIVER_DISABLERRING_RECEIVER_DISABLE (0x0040) epic100.h 　
29340
 RRING_STATUS_VALIDRRING_STATUS_VALID (0x1000) epic100.h 　
29341
 RRING_FRAGLIST_ERRRRING_FRAGLIST_ERR (0x2000) epic100.h 　
29342
 RRING_HDR_COPIEDRRING_HDR_COPIED (0x4000) epic100.h 　
29343
 RRING_OWNRRING_OWN (0x8000) epic100.h 　
29344
 RRING_ERRORRRING_ERROR (RRING_ALIGN_ERR|RRING_CRC_ERR) epic100.h 　
29345
 TRING_PKT_INTACTTRING_PKT_INTACT (0x0001) epic100.h pkt transmitted.
29346
 TRING_PKT_NONDEFERTRING_PKT_NONDEFER (0x0002) epic100.h pkt xmitted w/o deferring
29347
 TRING_COLLTRING_COLL (0x0004) epic100.h pkt xmitted w collisions
29348
 TRING_CARRTRING_CARR (0x0008) epic100.h carrier sense lost
29349
 TRING_UNDERRUNTRING_UNDERRUN (0x0010) epic100.h DMA underrun
29350
 TRING_HB_COLLTRING_HB_COLL (0x0020) epic100.h Collision detect Heartbeat
29351
 TRING_WIN_COLLTRING_WIN_COLL (0x0040) epic100.h out of window collision
29352
 TRING_DEFERREDTRING_DEFERRED (0x0080) epic100.h Deferring
29353
 TRING_COLL_COUNTTRING_COLL_COUNT (0x0F00) epic100.h collision counter (mask)
29354
 TRING_COLL_EXCESSTRING_COLL_EXCESS (0x1000) epic100.h tx aborted: excessive colls
29355
 TRING_OWNTRING_OWN (0x8000) epic100.h desc ownership bit
29356
 TRING_ABORTTRING_ABORT (TRING_COLL_EXCESS|TRING_WIN_COLL|TRING_UNDERRUN) epic100.h 　
29357
 TRING_ERRORTRING_ERROR (TRING_DEFERRED|TRING_WIN_COLL|TRING_UNDERRUN|TRING_CARR ) epic100.h |TRING_COLL
29358
 TD_FRAGLISTTD_FRAGLIST (0x0001) epic100.h Desc points to a fragment list
29359
 TD_LLFORMTD_LLFORM (0x0002) epic100.h Frag list format
29360
 TD_IAFTD_IAF (0x0004) epic100.h Generate Interrupt after tx
29361
 TD_NOCRCTD_NOCRC (0x0008) epic100.h No CRC generated
29362
 TD_LASTDESCTD_LASTDESC (0x0010) epic100.h Last desc for this frame
29363
 EFAB_DUMMY_FIELD_LBNEFAB_DUMMY_FIELD_LBN 0 etherfabric.h 　
29364
 EFAB_DUMMY_FIELD_WIDTHEFAB_DUMMY_FIELD_WIDTH 0 etherfabric.h 　
29365
 EFAB_DWORD_0_LBNEFAB_DWORD_0_LBN 0 etherfabric.h 　
29366
 EFAB_DWORD_0_WIDTHEFAB_DWORD_0_WIDTH 32 etherfabric.h 　
29367
 EFAB_DWORD_1_LBNEFAB_DWORD_1_LBN 32 etherfabric.h 　
29368
 EFAB_DWORD_1_WIDTHEFAB_DWORD_1_WIDTH 32 etherfabric.h 　
29369
 EFAB_DWORD_2_LBNEFAB_DWORD_2_LBN 64 etherfabric.h 　
29370
 EFAB_DWORD_2_WIDTHEFAB_DWORD_2_WIDTH 32 etherfabric.h 　
29371
 EFAB_DWORD_3_LBNEFAB_DWORD_3_LBN 96 etherfabric.h 　
29372
 EFAB_DWORD_3_WIDTHEFAB_DWORD_3_WIDTH 32 etherfabric.h 　
29373
 EFAB_DWORD_FMTEFAB_DWORD_FMT "%08x" etherfabric.h 　
29374
 EFAB_QWORD_FMTEFAB_QWORD_FMT "%08x:%08x" etherfabric.h 　
29375
 EFAB_OWORD_FMTEFAB_OWORD_FMT "%08x:%08x:%08x:%08x" etherfabric.h 　
29376
 EFAB_OWORD_FIELDEFAB_OWORD_FIELD EFAB_OWORD_FIELD64 etherfabric.h 　
29377
 EFAB_QWORD_FIELDEFAB_QWORD_FIELD EFAB_QWORD_FIELD64 etherfabric.h 　
29378
 EFAB_OWORD_IS_ZEROEFAB_OWORD_IS_ZERO EFAB_OWORD_IS_ZERO64 etherfabric.h 　
29379
 EFAB_QWORD_IS_ZEROEFAB_QWORD_IS_ZERO EFAB_QWORD_IS_ZERO64 etherfabric.h 　
29380
 EFAB_OWORD_IS_ALL_ONESEFAB_OWORD_IS_ALL_ONES EFAB_OWORD_IS_ALL_ONES64 etherfabric.h 　
29381
 EFAB_QWORD_IS_ALL_ONESEFAB_QWORD_IS_ALL_ONES EFAB_QWORD_IS_ALL_ONES64 etherfabric.h 　
29382
 EFAB_OWORD_FIELDEFAB_OWORD_FIELD EFAB_OWORD_FIELD32 etherfabric.h 　
29383
 EFAB_QWORD_FIELDEFAB_QWORD_FIELD EFAB_QWORD_FIELD32 etherfabric.h 　
29384
 EFAB_OWORD_IS_ZEROEFAB_OWORD_IS_ZERO EFAB_OWORD_IS_ZERO32 etherfabric.h 　
29385
 EFAB_QWORD_IS_ZEROEFAB_QWORD_IS_ZERO EFAB_QWORD_IS_ZERO32 etherfabric.h 　
29386
 EFAB_OWORD_IS_ALL_ONESEFAB_OWORD_IS_ALL_ONES EFAB_OWORD_IS_ALL_ONES32 etherfabric.h 　
29387
 EFAB_QWORD_IS_ALL_ONESEFAB_QWORD_IS_ALL_ONES EFAB_QWORD_IS_ALL_ONES32 etherfabric.h 　
29388
 EFAB_POPULATE_OWORDEFAB_POPULATE_OWORD EFAB_POPULATE_OWORD64 etherfabric.h 　
29389
 EFAB_POPULATE_QWORDEFAB_POPULATE_QWORD EFAB_POPULATE_QWORD64 etherfabric.h 　
29390
 EFAB_POPULATE_OWORDEFAB_POPULATE_OWORD EFAB_POPULATE_OWORD32 etherfabric.h 　
29391
 EFAB_POPULATE_QWORDEFAB_POPULATE_QWORD EFAB_POPULATE_QWORD32 etherfabric.h 　
29392
 EFAB_POPULATE_OWORD_10EFAB_POPULATE_OWORD_10 EFAB_POPULATE_OWORD etherfabric.h 　
29393
 EFAB_POPULATE_QWORD_10EFAB_POPULATE_QWORD_10 EFAB_POPULATE_QWORD etherfabric.h 　
29394
 EFAB_POPULATE_DWORD_10EFAB_POPULATE_DWORD_10 EFAB_POPULATE_DWORD etherfabric.h 　
29395
 EFAB_SET_OWORD_FIELDEFAB_SET_OWORD_FIELD EFAB_SET_OWORD_FIELD64 etherfabric.h 　
29396
 EFAB_SET_QWORD_FIELDEFAB_SET_QWORD_FIELD EFAB_SET_QWORD_FIELD64 etherfabric.h 　
29397
 EFAB_SET_OWORD_FIELDEFAB_SET_OWORD_FIELD EFAB_SET_OWORD_FIELD32 etherfabric.h 　
29398
 EFAB_SET_QWORD_FIELDEFAB_SET_QWORD_FIELD EFAB_SET_QWORD_FIELD32 etherfabric.h 　
29399
 DMA_ADDR_T_WIDTHDMA_ADDR_T_WIDTH ( 8 * sizeof ( dma_addr_t ) ) etherfabric.h 　
29400
 EFAB_DMA_MAX_MASKEFAB_DMA_MAX_MASK ( ( DMA_ADDR_T_WIDTH == 64 ) ? \ ~( ( uint64_t ) 0 ) : ~( ( uint32_t ) 0 ) ) etherfabric.h 　
29401
 dma_addr_tdma_addr_t unsigned long etherfabric_nic.h 　
29402
 EFAB_BUF_ALIGNEFAB_BUF_ALIGN 4096 etherfabric_nic.h 　
29403
 EFAB_RXD_SIZEEFAB_RXD_SIZE 512 etherfabric_nic.h 　
29404
 EFAB_TXD_SIZEEFAB_TXD_SIZE 512 etherfabric_nic.h 　
29405
 EFAB_EVQ_SIZEEFAB_EVQ_SIZE 512 etherfabric_nic.h 　
29406
 EFAB_NUM_RX_DESCEFAB_NUM_RX_DESC 16 etherfabric_nic.h 　
29407
 EFAB_RX_BUF_SIZEEFAB_RX_BUF_SIZE 1600 etherfabric_nic.h 　
29408
 HFA384x_CMD_ALLOC_LEN_MINHFA384x_CMD_ALLOC_LEN_MIN ((UINT16)4) hfa384x.h 　
29409
 HFA384x_CMD_ALLOC_LEN_MAXHFA384x_CMD_ALLOC_LEN_MAX ((UINT16)2400) hfa384x.h 　
29410
 HFA384x_BAP_DATALEN_MAXHFA384x_BAP_DATALEN_MAX ((UINT16)4096) hfa384x.h 　
29411
 HFA384x_BAP_OFFSET_MAXHFA384x_BAP_OFFSET_MAX ((UINT16)4096) hfa384x.h 　
29412
 HFA384x_PORTID_MAXHFA384x_PORTID_MAX ((UINT16)7) hfa384x.h 　
29413
 HFA384x_NUMPORTS_MAXHFA384x_NUMPORTS_MAX ((UINT16)(HFA384x_PORTID_MAX+1)) hfa384x.h 　
29414
 HFA384x_PDR_LEN_MAXHFA384x_PDR_LEN_MAX ((UINT16)512) hfa384x.h in bytes, from EK
29415
 HFA384x_PDA_RECS_MAXHFA384x_PDA_RECS_MAX ((UINT16)200) hfa384x.h a guess
29416
 HFA384x_PDA_LEN_MAXHFA384x_PDA_LEN_MAX ((UINT16)1024) hfa384x.h in bytes, from EK
29417
 HFA384x_SCANRESULT_MAXHFA384x_SCANRESULT_MAX ((UINT16)31) hfa384x.h 　
29418
 HFA384x_HSCANRESULT_MAXHFA384x_HSCANRESULT_MAX ((UINT16)31) hfa384x.h 　
29419
 HFA384x_CHINFORESULT_MAXHFA384x_CHINFORESULT_MAX ((UINT16)16) hfa384x.h 　
29420
 HFA384x_DRVR_FIDSTACKLEN_MAXHFA384x_DRVR_FIDSTACKLEN_MAX (10) hfa384x.h 　
29421
 HFA384x_DRVR_TXBUF_MAXHFA384x_DRVR_TXBUF_MAX (sizeof(hfa384x_tx_frame_t) + \ WLAN_DATA_MAXLEN - \ WLAN_WEP_IV_LEN - \ WLAN_WEP_ICV_LEN + 2) hfa384x.h 　
29422
 HFA384x_DRVR_MAGICHFA384x_DRVR_MAGIC (0x4a2d) hfa384x.h 　
29423
 HFA384x_INFODATA_MAXLENHFA384x_INFODATA_MAXLEN (sizeof(hfa384x_infodata_t)) hfa384x.h 　
29424
 HFA384x_INFOFRM_MAXLENHFA384x_INFOFRM_MAXLEN (sizeof(hfa384x_InfFrame_t)) hfa384x.h 　
29425
 HFA384x_RID_GUESSING_MAXLENHFA384x_RID_GUESSING_MAXLEN 2048 hfa384x.h I'm not really sure
29426
 HFA384x_RIDDATA_MAXLENHFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN hfa384x.h 　
29427
 HFA384x_USB_RWMEM_MAXLENHFA384x_USB_RWMEM_MAXLEN 2048 hfa384x.h 　
29428
 HFA384x_BAP_PROCHFA384x_BAP_PROC ((UINT16)0) hfa384x.h 　
29429
 HFA384x_BAP_INTHFA384x_BAP_INT ((UINT16)1) hfa384x.h 　
29430
 HFA384x_PORTTYPE_IBSSHFA384x_PORTTYPE_IBSS ((UINT16)0) hfa384x.h 　
29431
 HFA384x_PORTTYPE_BSSHFA384x_PORTTYPE_BSS ((UINT16)1) hfa384x.h 　
29432
 HFA384x_PORTTYPE_WDSHFA384x_PORTTYPE_WDS ((UINT16)2) hfa384x.h 　
29433
 HFA384x_PORTTYPE_PSUEDOIBSSHFA384x_PORTTYPE_PSUEDOIBSS ((UINT16)3) hfa384x.h 　
29434
 HFA384x_PORTTYPE_HOSTAPHFA384x_PORTTYPE_HOSTAP ((UINT16)6) hfa384x.h 　
29435
 HFA384x_WEPFLAGS_PRIVINVOKEDHFA384x_WEPFLAGS_PRIVINVOKED ((UINT16)BIT0) hfa384x.h 　
29436
 HFA384x_WEPFLAGS_EXCLUDEHFA384x_WEPFLAGS_EXCLUDE ((UINT16)BIT1) hfa384x.h 　
29437
 HFA384x_WEPFLAGS_DISABLE_TXCRYPHFA384x_WEPFLAGS_DISABLE_TXCRYP ((UINT16)BIT4) hfa384x.h 　
29438
 HFA384x_WEPFLAGS_DISABLE_RXCRYPHFA384x_WEPFLAGS_DISABLE_RXCRYP ((UINT16)BIT7) hfa384x.h 　
29439
 HFA384x_WEPFLAGS_DISALLOW_MIXEDHFA384x_WEPFLAGS_DISALLOW_MIXED ((UINT16)BIT11) hfa384x.h 　
29440
 HFA384x_WEPFLAGS_IV_INTERVAL1HFA384x_WEPFLAGS_IV_INTERVAL1 ((UINT16)0) hfa384x.h 　
29441
 HFA384x_WEPFLAGS_IV_INTERVAL10HFA384x_WEPFLAGS_IV_INTERVAL10 ((UINT16)BIT5) hfa384x.h 　
29442
 HFA384x_WEPFLAGS_IV_INTERVAL50HFA384x_WEPFLAGS_IV_INTERVAL50 ((UINT16)BIT6) hfa384x.h 　
29443
 HFA384x_WEPFLAGS_IV_INTERVAL100HFA384x_WEPFLAGS_IV_INTERVAL100 ((UINT16)(BIT5 | BIT6)) hfa384x.h 　
29444
 HFA384x_WEPFLAGS_FIRMWARE_WPAHFA384x_WEPFLAGS_FIRMWARE_WPA ((UINT16)BIT8) hfa384x.h 　
29445
 HFA384x_WEPFLAGS_HOST_MICHFA384x_WEPFLAGS_HOST_MIC ((UINT16)BIT9) hfa384x.h 　
29446
 HFA384x_ROAMMODE_FWSCAN_FWROAMHFA384x_ROAMMODE_FWSCAN_FWROAM ((UINT16)1) hfa384x.h 　
29447
 HFA384x_ROAMMODE_FWSCAN_HOSTROAHFA384x_ROAMMODE_FWSCAN_HOSTROA ((UINT16)2) hfa384x.h 　
29448
 HFA384x_ROAMMODE_HOSTSCAN_HOSTRHFA384x_ROAMMODE_HOSTSCAN_HOSTR ((UINT16)3) hfa384x.h 　
29449
 HFA384x_PORTSTATUS_DISABLEDHFA384x_PORTSTATUS_DISABLED ((UINT16)1) hfa384x.h 　
29450
 HFA384x_PORTSTATUS_INITSRCHHFA384x_PORTSTATUS_INITSRCH ((UINT16)2) hfa384x.h 　
29451
 HFA384x_PORTSTATUS_CONN_IBSSHFA384x_PORTSTATUS_CONN_IBSS ((UINT16)3) hfa384x.h 　
29452
 HFA384x_PORTSTATUS_CONN_ESSHFA384x_PORTSTATUS_CONN_ESS ((UINT16)4) hfa384x.h 　
29453
 HFA384x_PORTSTATUS_OOR_ESSHFA384x_PORTSTATUS_OOR_ESS ((UINT16)5) hfa384x.h 　
29454
 HFA384x_PORTSTATUS_CONN_WDSHFA384x_PORTSTATUS_CONN_WDS ((UINT16)6) hfa384x.h 　
29455
 HFA384x_PORTSTATUS_HOSTAPHFA384x_PORTSTATUS_HOSTAP ((UINT16)8) hfa384x.h 　
29456
 HFA384x_RATEBIT_1HFA384x_RATEBIT_1 ((UINT16)1) hfa384x.h 　
29457
 HFA384x_RATEBIT_2HFA384x_RATEBIT_2 ((UINT16)2) hfa384x.h 　
29458
 HFA384x_RATEBIT_5dot5HFA384x_RATEBIT_5dot5 ((UINT16)4) hfa384x.h 　
29459
 HFA384x_RATEBIT_11HFA384x_RATEBIT_11 ((UINT16)8) hfa384x.h 　
29460
 HFA384x_TXCMD_NORECLHFA384x_TXCMD_NORECL ((UINT16)0) hfa384x.h 　
29461
 HFA384x_TXCMD_RECLHFA384x_TXCMD_RECL ((UINT16)1) hfa384x.h 　
29462
 HFA384x_ADDR_AUX_OFF_MAXHFA384x_ADDR_AUX_OFF_MAX ((UINT16)0x007f) hfa384x.h 　
29463
 HFA384x_ADDR_FLAT_AUX_PAGE_MASKHFA384x_ADDR_FLAT_AUX_PAGE_MASK (0x007fff80) hfa384x.h 　
29464
 HFA384x_ADDR_FLAT_AUX_OFF_MASKHFA384x_ADDR_FLAT_AUX_OFF_MASK (0x0000007f) hfa384x.h 　
29465
 HFA384x_ADDR_FLAT_CMD_PAGE_MASKHFA384x_ADDR_FLAT_CMD_PAGE_MASK (0xffff0000) hfa384x.h 　
29466
 HFA384x_ADDR_FLAT_CMD_OFF_MASKHFA384x_ADDR_FLAT_CMD_OFF_MASK (0x0000ffff) hfa384x.h 　
29467
 HFA384x_ADDR_AUX_PAGE_MASKHFA384x_ADDR_AUX_PAGE_MASK (0xffff) hfa384x.h 　
29468
 HFA384x_ADDR_AUX_OFF_MASKHFA384x_ADDR_AUX_OFF_MASK (0x007f) hfa384x.h 　
29469
 HFA384x_ADDR_CMD_PAGE_MASKHFA384x_ADDR_CMD_PAGE_MASK (0x007f) hfa384x.h 　
29470
 HFA384x_ADDR_CMD_OFF_MASKHFA384x_ADDR_CMD_OFF_MASK (0xffff) hfa384x.h 　
29471
 HFA384x_AUX_CTL_EXTDSHFA384x_AUX_CTL_EXTDS (0x00) hfa384x.h 　
29472
 HFA384x_AUX_CTL_NVHFA384x_AUX_CTL_NV (0x01) hfa384x.h 　
29473
 HFA384x_AUX_CTL_PHYHFA384x_AUX_CTL_PHY (0x02) hfa384x.h 　
29474
 HFA384x_AUX_CTL_ICSRAMHFA384x_AUX_CTL_ICSRAM (0x03) hfa384x.h 　
29475
 HFA3842_PDA_BASEHFA3842_PDA_BASE (0x007f0000UL) hfa384x.h 　
29476
 HFA3841_PDA_BASEHFA3841_PDA_BASE (0x003f0000UL) hfa384x.h 　
29477
 HFA3841_PDA_BOGUS_BASEHFA3841_PDA_BOGUS_BASE (0x00390000UL) hfa384x.h 　
29478
 HFA384x_DLSTATE_DISABLEDHFA384x_DLSTATE_DISABLED 0 hfa384x.h 　
29479
 HFA384x_DLSTATE_RAMENABLEDHFA384x_DLSTATE_RAMENABLED 1 hfa384x.h 　
29480
 HFA384x_DLSTATE_FLASHENABLEDHFA384x_DLSTATE_FLASHENABLED 2 hfa384x.h 　
29481
 HFA384x_DLSTATE_FLASHWRITTENHFA384x_DLSTATE_FLASHWRITTEN 3 hfa384x.h 　
29482
 HFA384x_DLSTATE_FLASHWRITEPENDIHFA384x_DLSTATE_FLASHWRITEPENDI 4 hfa384x.h 　
29483
 HFA384x_DLSTATE_GENESISHFA384x_DLSTATE_GENESIS 5 hfa384x.h 　
29484
 HFA384x_CMD_OFFHFA384x_CMD_OFF (0x00) hfa384x.h 　
29485
 HFA384x_PARAM0_OFFHFA384x_PARAM0_OFF (0x02) hfa384x.h 　
29486
 HFA384x_PARAM1_OFFHFA384x_PARAM1_OFF (0x04) hfa384x.h 　
29487
 HFA384x_PARAM2_OFFHFA384x_PARAM2_OFF (0x06) hfa384x.h 　
29488
 HFA384x_STATUS_OFFHFA384x_STATUS_OFF (0x08) hfa384x.h 　
29489
 HFA384x_RESP0_OFFHFA384x_RESP0_OFF (0x0A) hfa384x.h 　
29490
 HFA384x_RESP1_OFFHFA384x_RESP1_OFF (0x0C) hfa384x.h 　
29491
 HFA384x_RESP2_OFFHFA384x_RESP2_OFF (0x0E) hfa384x.h 　
29492
 HFA384x_INFOFID_OFFHFA384x_INFOFID_OFF (0x10) hfa384x.h 　
29493
 HFA384x_RXFID_OFFHFA384x_RXFID_OFF (0x20) hfa384x.h 　
29494
 HFA384x_ALLOCFID_OFFHFA384x_ALLOCFID_OFF (0x22) hfa384x.h 　
29495
 HFA384x_TXCOMPLFID_OFFHFA384x_TXCOMPLFID_OFF (0x24) hfa384x.h 　
29496
 HFA384x_SELECT0_OFFHFA384x_SELECT0_OFF (0x18) hfa384x.h 　
29497
 HFA384x_OFFSET0_OFFHFA384x_OFFSET0_OFF (0x1C) hfa384x.h 　
29498
 HFA384x_DATA0_OFFHFA384x_DATA0_OFF (0x36) hfa384x.h 　
29499
 HFA384x_SELECT1_OFFHFA384x_SELECT1_OFF (0x1A) hfa384x.h 　
29500
 HFA384x_OFFSET1_OFFHFA384x_OFFSET1_OFF (0x1E) hfa384x.h 　
29501
 HFA384x_DATA1_OFFHFA384x_DATA1_OFF (0x38) hfa384x.h 　
29502
 HFA384x_EVSTAT_OFFHFA384x_EVSTAT_OFF (0x30) hfa384x.h 　
29503
 HFA384x_INTEN_OFFHFA384x_INTEN_OFF (0x32) hfa384x.h 　
29504
 HFA384x_EVACK_OFFHFA384x_EVACK_OFF (0x34) hfa384x.h 　
29505
 HFA384x_CONTROL_OFFHFA384x_CONTROL_OFF (0x14) hfa384x.h 　
29506
 HFA384x_SWSUPPORT0_OFFHFA384x_SWSUPPORT0_OFF (0x28) hfa384x.h 　
29507
 HFA384x_SWSUPPORT1_OFFHFA384x_SWSUPPORT1_OFF (0x2A) hfa384x.h 　
29508
 HFA384x_SWSUPPORT2_OFFHFA384x_SWSUPPORT2_OFF (0x2C) hfa384x.h 　
29509
 HFA384x_AUXPAGE_OFFHFA384x_AUXPAGE_OFF (0x3A) hfa384x.h 　
29510
 HFA384x_AUXOFFSET_OFFHFA384x_AUXOFFSET_OFF (0x3C) hfa384x.h 　
29511
 HFA384x_AUXDATA_OFFHFA384x_AUXDATA_OFF (0x3E) hfa384x.h 　
29512
 HFA384x_CMD_OFFHFA384x_CMD_OFF (0x00) hfa384x.h 　
29513
 HFA384x_PARAM0_OFFHFA384x_PARAM0_OFF (0x04) hfa384x.h 　
29514
 HFA384x_PARAM1_OFFHFA384x_PARAM1_OFF (0x08) hfa384x.h 　
29515
 HFA384x_PARAM2_OFFHFA384x_PARAM2_OFF (0x0c) hfa384x.h 　
29516
 HFA384x_STATUS_OFFHFA384x_STATUS_OFF (0x10) hfa384x.h 　
29517
 HFA384x_RESP0_OFFHFA384x_RESP0_OFF (0x14) hfa384x.h 　
29518
 HFA384x_RESP1_OFFHFA384x_RESP1_OFF (0x18) hfa384x.h 　
29519
 HFA384x_RESP2_OFFHFA384x_RESP2_OFF (0x1c) hfa384x.h 　
29520
 HFA384x_INFOFID_OFFHFA384x_INFOFID_OFF (0x20) hfa384x.h 　
29521
 HFA384x_RXFID_OFFHFA384x_RXFID_OFF (0x40) hfa384x.h 　
29522
 HFA384x_ALLOCFID_OFFHFA384x_ALLOCFID_OFF (0x44) hfa384x.h 　
29523
 HFA384x_TXCOMPLFID_OFFHFA384x_TXCOMPLFID_OFF (0x48) hfa384x.h 　
29524
 HFA384x_SELECT0_OFFHFA384x_SELECT0_OFF (0x30) hfa384x.h 　
29525
 HFA384x_OFFSET0_OFFHFA384x_OFFSET0_OFF (0x38) hfa384x.h 　
29526
 HFA384x_DATA0_OFFHFA384x_DATA0_OFF (0x6c) hfa384x.h 　
29527
 HFA384x_SELECT1_OFFHFA384x_SELECT1_OFF (0x34) hfa384x.h 　
29528
 HFA384x_OFFSET1_OFFHFA384x_OFFSET1_OFF (0x3c) hfa384x.h 　
29529
 HFA384x_DATA1_OFFHFA384x_DATA1_OFF (0x70) hfa384x.h 　
29530
 HFA384x_EVSTAT_OFFHFA384x_EVSTAT_OFF (0x60) hfa384x.h 　
29531
 HFA384x_INTEN_OFFHFA384x_INTEN_OFF (0x64) hfa384x.h 　
29532
 HFA384x_EVACK_OFFHFA384x_EVACK_OFF (0x68) hfa384x.h 　
29533
 HFA384x_CONTROL_OFFHFA384x_CONTROL_OFF (0x28) hfa384x.h 　
29534
 HFA384x_SWSUPPORT0_OFFHFA384x_SWSUPPORT0_OFF (0x50) hfa384x.h 　
29535
 HFA384x_SWSUPPORT1_OFFHFA384x_SWSUPPORT1_OFF (0x54) hfa384x.h 　
29536
 HFA384x_SWSUPPORT2_OFFHFA384x_SWSUPPORT2_OFF (0x58) hfa384x.h 　
29537
 HFA384x_AUXPAGE_OFFHFA384x_AUXPAGE_OFF (0x74) hfa384x.h 　
29538
 HFA384x_AUXOFFSET_OFFHFA384x_AUXOFFSET_OFF (0x78) hfa384x.h 　
29539
 HFA384x_AUXDATA_OFFHFA384x_AUXDATA_OFF (0x7c) hfa384x.h 　
29540
 HFA384x_PCICOR_OFFHFA384x_PCICOR_OFF (0x4c) hfa384x.h 　
29541
 HFA384x_PCIHCR_OFFHFA384x_PCIHCR_OFF (0x5c) hfa384x.h 　
29542
 HFA384x_PCI_M0_ADDRH_OFFHFA384x_PCI_M0_ADDRH_OFF (0x80) hfa384x.h 　
29543
 HFA384x_PCI_M0_ADDRL_OFFHFA384x_PCI_M0_ADDRL_OFF (0x84) hfa384x.h 　
29544
 HFA384x_PCI_M0_LEN_OFFHFA384x_PCI_M0_LEN_OFF (0x88) hfa384x.h 　
29545
 HFA384x_PCI_M0_CTL_OFFHFA384x_PCI_M0_CTL_OFF (0x8c) hfa384x.h 　
29546
 HFA384x_PCI_STATUS_OFFHFA384x_PCI_STATUS_OFF (0x98) hfa384x.h 　
29547
 HFA384x_PCI_M1_ADDRH_OFFHFA384x_PCI_M1_ADDRH_OFF (0xa0) hfa384x.h 　
29548
 HFA384x_PCI_M1_ADDRL_OFFHFA384x_PCI_M1_ADDRL_OFF (0xa4) hfa384x.h 　
29549
 HFA384x_PCI_M1_LEN_OFFHFA384x_PCI_M1_LEN_OFF (0xa8) hfa384x.h 　
29550
 HFA384x_PCI_M1_CTL_OFFHFA384x_PCI_M1_CTL_OFF (0xac) hfa384x.h 　
29551
 HFA384x_CMD_BUSYHFA384x_CMD_BUSY ((UINT16)BIT15) hfa384x.h 　
29552
 HFA384x_CMD_AINFOHFA384x_CMD_AINFO ((UINT16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8)) hfa384x.h 　
29553
 HFA384x_CMD_MACPORTHFA384x_CMD_MACPORT ((UINT16)(BIT10 | BIT9 | BIT8)) hfa384x.h 　
29554
 HFA384x_CMD_RECLHFA384x_CMD_RECL ((UINT16)BIT8) hfa384x.h 　
29555
 HFA384x_CMD_WRITEHFA384x_CMD_WRITE ((UINT16)BIT8) hfa384x.h 　
29556
 HFA384x_CMD_PROGMODEHFA384x_CMD_PROGMODE ((UINT16)(BIT9 | BIT8)) hfa384x.h 　
29557
 HFA384x_CMD_CMDCODEHFA384x_CMD_CMDCODE ((UINT16)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)) hfa384x.h 　
29558
 HFA384x_STATUS_RESULTHFA384x_STATUS_RESULT ((UINT16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8)) hfa384x.h 　
29559
 HFA384x_STATUS_CMDCODEHFA384x_STATUS_CMDCODE ((UINT16)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)) hfa384x.h 　
29560
 HFA384x_OFFSET_BUSYHFA384x_OFFSET_BUSY ((UINT16)BIT15) hfa384x.h 　
29561
 HFA384x_OFFSET_ERRHFA384x_OFFSET_ERR ((UINT16)BIT14) hfa384x.h 　
29562
 HFA384x_OFFSET_DATAOFFHFA384x_OFFSET_DATAOFF ((UINT16)(BIT11 | BIT10 | BIT9 | BIT8 | BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1)) hfa384x.h 　
29563
 HFA384x_EVSTAT_TICKHFA384x_EVSTAT_TICK ((UINT16)BIT15) hfa384x.h 　
29564
 HFA384x_EVSTAT_WTERRHFA384x_EVSTAT_WTERR ((UINT16)BIT14) hfa384x.h 　
29565
 HFA384x_EVSTAT_INFDROPHFA384x_EVSTAT_INFDROP ((UINT16)BIT13) hfa384x.h 　
29566
 HFA384x_EVSTAT_INFOHFA384x_EVSTAT_INFO ((UINT16)BIT7) hfa384x.h 　
29567
 HFA384x_EVSTAT_DTIMHFA384x_EVSTAT_DTIM ((UINT16)BIT5) hfa384x.h 　
29568
 HFA384x_EVSTAT_CMDHFA384x_EVSTAT_CMD ((UINT16)BIT4) hfa384x.h 　
29569
 HFA384x_EVSTAT_ALLOCHFA384x_EVSTAT_ALLOC ((UINT16)BIT3) hfa384x.h 　
29570
 HFA384x_EVSTAT_TXEXCHFA384x_EVSTAT_TXEXC ((UINT16)BIT2) hfa384x.h 　
29571
 HFA384x_EVSTAT_TXHFA384x_EVSTAT_TX ((UINT16)BIT1) hfa384x.h 　
29572
 HFA384x_EVSTAT_RXHFA384x_EVSTAT_RX ((UINT16)BIT0) hfa384x.h 　
29573
 HFA384x_INT_BAP_OPHFA384x_INT_BAP_OP (HFA384x_EVSTAT_INFO|HFA384x_EVSTAT_RX|HFA384x_EVSTAT_TX|HFA384x_EVSTAT_TXEXC) hfa384x.h 　
29574
 HFA384x_INT_NORMALHFA384x_INT_NORMAL (HFA384x_EVSTAT_INFO|HFA384x_EVSTAT_RX|HFA384x_EVSTAT_TX|HFA384x_EVSTAT_TXEXC|HFA384x_EVSTAT_INFDROP|HFA384x_EVSTAT_ALLOC|HFA38 hfa384x.h 　
29575
 HFA384x_INTEN_TICKHFA384x_INTEN_TICK ((UINT16)BIT15) hfa384x.h 　
29576
 HFA384x_INTEN_WTERRHFA384x_INTEN_WTERR ((UINT16)BIT14) hfa384x.h 　
29577
 HFA384x_INTEN_INFDROPHFA384x_INTEN_INFDROP ((UINT16)BIT13) hfa384x.h 　
29578
 HFA384x_INTEN_INFOHFA384x_INTEN_INFO ((UINT16)BIT7) hfa384x.h 　
29579
 HFA384x_INTEN_DTIMHFA384x_INTEN_DTIM ((UINT16)BIT5) hfa384x.h 　
29580
 HFA384x_INTEN_CMDHFA384x_INTEN_CMD ((UINT16)BIT4) hfa384x.h 　
29581
 HFA384x_INTEN_ALLOCHFA384x_INTEN_ALLOC ((UINT16)BIT3) hfa384x.h 　
29582
 HFA384x_INTEN_TXEXCHFA384x_INTEN_TXEXC ((UINT16)BIT2) hfa384x.h 　
29583
 HFA384x_INTEN_TXHFA384x_INTEN_TX ((UINT16)BIT1) hfa384x.h 　
29584
 HFA384x_INTEN_RXHFA384x_INTEN_RX ((UINT16)BIT0) hfa384x.h 　
29585
 HFA384x_EVACK_TICKHFA384x_EVACK_TICK ((UINT16)BIT15) hfa384x.h 　
29586
 HFA384x_EVACK_WTERRHFA384x_EVACK_WTERR ((UINT16)BIT14) hfa384x.h 　
29587
 HFA384x_EVACK_INFDROPHFA384x_EVACK_INFDROP ((UINT16)BIT13) hfa384x.h 　
29588
 HFA384x_EVACK_INFOHFA384x_EVACK_INFO ((UINT16)BIT7) hfa384x.h 　
29589
 HFA384x_EVACK_DTIMHFA384x_EVACK_DTIM ((UINT16)BIT5) hfa384x.h 　
29590
 HFA384x_EVACK_CMDHFA384x_EVACK_CMD ((UINT16)BIT4) hfa384x.h 　
29591
 HFA384x_EVACK_ALLOCHFA384x_EVACK_ALLOC ((UINT16)BIT3) hfa384x.h 　
29592
 HFA384x_EVACK_TXEXCHFA384x_EVACK_TXEXC ((UINT16)BIT2) hfa384x.h 　
29593
 HFA384x_EVACK_TXHFA384x_EVACK_TX ((UINT16)BIT1) hfa384x.h 　
29594
 HFA384x_EVACK_RXHFA384x_EVACK_RX ((UINT16)BIT0) hfa384x.h 　
29595
 HFA384x_CONTROL_AUXENHFA384x_CONTROL_AUXEN ((UINT16)(BIT15 | BIT14)) hfa384x.h 　
29596
 HFA384x_CMDCODE_INITHFA384x_CMDCODE_INIT ((UINT16)0x00) hfa384x.h 　
29597
 HFA384x_CMDCODE_ENABLEHFA384x_CMDCODE_ENABLE ((UINT16)0x01) hfa384x.h 　
29598
 HFA384x_CMDCODE_DISABLEHFA384x_CMDCODE_DISABLE ((UINT16)0x02) hfa384x.h 　
29599
 HFA384x_CMDCODE_DIAGHFA384x_CMDCODE_DIAG ((UINT16)0x03) hfa384x.h 　
29600
 HFA384x_CMDCODE_ALLOCHFA384x_CMDCODE_ALLOC ((UINT16)0x0A) hfa384x.h 　
29601
 HFA384x_CMDCODE_TXHFA384x_CMDCODE_TX ((UINT16)0x0B) hfa384x.h 　
29602
 HFA384x_CMDCODE_CLRPRSTHFA384x_CMDCODE_CLRPRST ((UINT16)0x12) hfa384x.h 　
29603
 HFA384x_CMDCODE_NOTIFYHFA384x_CMDCODE_NOTIFY ((UINT16)0x10) hfa384x.h 　
29604
 HFA384x_CMDCODE_INQHFA384x_CMDCODE_INQ ((UINT16)0x11) hfa384x.h 　
29605
 HFA384x_CMDCODE_ACCESSHFA384x_CMDCODE_ACCESS ((UINT16)0x21) hfa384x.h 　
29606
 HFA384x_CMDCODE_DOWNLDHFA384x_CMDCODE_DOWNLD ((UINT16)0x22) hfa384x.h 　
29607
 HFA384x_CMDCODE_MONITORHFA384x_CMDCODE_MONITOR ((UINT16)(0x38)) hfa384x.h 　
29608
 HFA384x_MONITOR_ENABLEHFA384x_MONITOR_ENABLE ((UINT16)(0x0b)) hfa384x.h 　
29609
 HFA384x_MONITOR_DISABLEHFA384x_MONITOR_DISABLE ((UINT16)(0x0f)) hfa384x.h 　
29610
 HFA384x_SUCCESSHFA384x_SUCCESS ((UINT16)(0x00)) hfa384x.h 　
29611
 HFA384x_CARD_FAILHFA384x_CARD_FAIL ((UINT16)(0x01)) hfa384x.h 　
29612
 HFA384x_NO_BUFFHFA384x_NO_BUFF ((UINT16)(0x05)) hfa384x.h 　
29613
 HFA384x_CMD_ERRHFA384x_CMD_ERR ((UINT16)(0x7F)) hfa384x.h 　
29614
 HFA384x_PROGMODE_DISABLEHFA384x_PROGMODE_DISABLE ((UINT16)0x00) hfa384x.h 　
29615
 HFA384x_PROGMODE_RAMHFA384x_PROGMODE_RAM ((UINT16)0x01) hfa384x.h 　
29616
 HFA384x_PROGMODE_NVHFA384x_PROGMODE_NV ((UINT16)0x02) hfa384x.h 　
29617
 HFA384x_PROGMODE_NVWRITEHFA384x_PROGMODE_NVWRITE ((UINT16)0x03) hfa384x.h 　
29618
 HFA384x_AUXPW0HFA384x_AUXPW0 ((UINT16)0xfe01) hfa384x.h 　
29619
 HFA384x_AUXPW1HFA384x_AUXPW1 ((UINT16)0xdc23) hfa384x.h 　
29620
 HFA384x_AUXPW2HFA384x_AUXPW2 ((UINT16)0xba45) hfa384x.h 　
29621
 HFA384x_CONTROL_AUX_ISDISABLEDHFA384x_CONTROL_AUX_ISDISABLED ((UINT16)0x0000) hfa384x.h 　
29622
 HFA384x_CONTROL_AUX_ISENABLEDHFA384x_CONTROL_AUX_ISENABLED ((UINT16)0xc000) hfa384x.h 　
29623
 HFA384x_CONTROL_AUX_DOENABLEHFA384x_CONTROL_AUX_DOENABLE ((UINT16)0x8000) hfa384x.h 　
29624
 HFA384x_CONTROL_AUX_DODISABLEHFA384x_CONTROL_AUX_DODISABLE ((UINT16)0x4000) hfa384x.h 　
29625
 HFA384x_RID_CNFPORTTYPEHFA384x_RID_CNFPORTTYPE ((UINT16)0xFC00) hfa384x.h 　
29626
 HFA384x_RID_CNFOWNMACADDRHFA384x_RID_CNFOWNMACADDR ((UINT16)0xFC01) hfa384x.h 　
29627
 HFA384x_RID_CNFDESIREDSSIDHFA384x_RID_CNFDESIREDSSID ((UINT16)0xFC02) hfa384x.h 　
29628
 HFA384x_RID_CNFOWNCHANNELHFA384x_RID_CNFOWNCHANNEL ((UINT16)0xFC03) hfa384x.h 　
29629
 HFA384x_RID_CNFOWNSSIDHFA384x_RID_CNFOWNSSID ((UINT16)0xFC04) hfa384x.h 　
29630
 HFA384x_RID_CNFOWNATIMWINHFA384x_RID_CNFOWNATIMWIN ((UINT16)0xFC05) hfa384x.h 　
29631
 HFA384x_RID_CNFSYSSCALEHFA384x_RID_CNFSYSSCALE ((UINT16)0xFC06) hfa384x.h 　
29632
 HFA384x_RID_CNFMAXDATALENHFA384x_RID_CNFMAXDATALEN ((UINT16)0xFC07) hfa384x.h 　
29633
 HFA384x_RID_CNFWDSADDRHFA384x_RID_CNFWDSADDR ((UINT16)0xFC08) hfa384x.h 　
29634
 HFA384x_RID_CNFPMENABLEDHFA384x_RID_CNFPMENABLED ((UINT16)0xFC09) hfa384x.h 　
29635
 HFA384x_RID_CNFPMEPSHFA384x_RID_CNFPMEPS ((UINT16)0xFC0A) hfa384x.h 　
29636
 HFA384x_RID_CNFMULTICASTRXHFA384x_RID_CNFMULTICASTRX ((UINT16)0xFC0B) hfa384x.h 　
29637
 HFA384x_RID_CNFMAXSLEEPDURHFA384x_RID_CNFMAXSLEEPDUR ((UINT16)0xFC0C) hfa384x.h 　
29638
 HFA384x_RID_CNFPMHOLDDURHFA384x_RID_CNFPMHOLDDUR ((UINT16)0xFC0D) hfa384x.h 　
29639
 HFA384x_RID_CNFOWNNAMEHFA384x_RID_CNFOWNNAME ((UINT16)0xFC0E) hfa384x.h 　
29640
 HFA384x_RID_CNFOWNDTIMPERHFA384x_RID_CNFOWNDTIMPER ((UINT16)0xFC10) hfa384x.h 　
29641
 HFA384x_RID_CNFWDSADDR1HFA384x_RID_CNFWDSADDR1 ((UINT16)0xFC11) hfa384x.h 　
29642
 HFA384x_RID_CNFWDSADDR2HFA384x_RID_CNFWDSADDR2 ((UINT16)0xFC12) hfa384x.h 　
29643
 HFA384x_RID_CNFWDSADDR3HFA384x_RID_CNFWDSADDR3 ((UINT16)0xFC13) hfa384x.h 　
29644
 HFA384x_RID_CNFWDSADDR4HFA384x_RID_CNFWDSADDR4 ((UINT16)0xFC14) hfa384x.h 　
29645
 HFA384x_RID_CNFWDSADDR5HFA384x_RID_CNFWDSADDR5 ((UINT16)0xFC15) hfa384x.h 　
29646
 HFA384x_RID_CNFWDSADDR6HFA384x_RID_CNFWDSADDR6 ((UINT16)0xFC16) hfa384x.h 　
29647
 HFA384x_RID_CNFMCASTPMBUFFHFA384x_RID_CNFMCASTPMBUFF ((UINT16)0xFC17) hfa384x.h 　
29648
 HFA384x_RID_CNFPORTTYPE_LENHFA384x_RID_CNFPORTTYPE_LEN ((UINT16)2) hfa384x.h 　
29649
 HFA384x_RID_CNFOWNMACADDR_LENHFA384x_RID_CNFOWNMACADDR_LEN ((UINT16)6) hfa384x.h 　
29650
 HFA384x_RID_CNFDESIREDSSID_LENHFA384x_RID_CNFDESIREDSSID_LEN ((UINT16)34) hfa384x.h 　
29651
 HFA384x_RID_CNFOWNCHANNEL_LENHFA384x_RID_CNFOWNCHANNEL_LEN ((UINT16)2) hfa384x.h 　
29652
 HFA384x_RID_CNFOWNSSID_LENHFA384x_RID_CNFOWNSSID_LEN ((UINT16)34) hfa384x.h 　
29653
 HFA384x_RID_CNFOWNATIMWIN_LENHFA384x_RID_CNFOWNATIMWIN_LEN ((UINT16)2) hfa384x.h 　
29654
 HFA384x_RID_CNFSYSSCALE_LENHFA384x_RID_CNFSYSSCALE_LEN ((UINT16)0) hfa384x.h 　
29655
 HFA384x_RID_CNFMAXDATALEN_LENHFA384x_RID_CNFMAXDATALEN_LEN ((UINT16)0) hfa384x.h 　
29656
 HFA384x_RID_CNFWDSADDR_LENHFA384x_RID_CNFWDSADDR_LEN ((UINT16)6) hfa384x.h 　
29657
 HFA384x_RID_CNFPMENABLED_LENHFA384x_RID_CNFPMENABLED_LEN ((UINT16)0) hfa384x.h 　
29658
 HFA384x_RID_CNFPMEPS_LENHFA384x_RID_CNFPMEPS_LEN ((UINT16)0) hfa384x.h 　
29659
 HFA384x_RID_CNFMULTICASTRX_LENHFA384x_RID_CNFMULTICASTRX_LEN ((UINT16)0) hfa384x.h 　
29660
 HFA384x_RID_CNFMAXSLEEPDUR_LENHFA384x_RID_CNFMAXSLEEPDUR_LEN ((UINT16)0) hfa384x.h 　
29661
 HFA384x_RID_CNFPMHOLDDUR_LENHFA384x_RID_CNFPMHOLDDUR_LEN ((UINT16)0) hfa384x.h 　
29662
 HFA384x_RID_CNFOWNNAME_LENHFA384x_RID_CNFOWNNAME_LEN ((UINT16)34) hfa384x.h 　
29663
 HFA384x_RID_CNFOWNDTIMPER_LENHFA384x_RID_CNFOWNDTIMPER_LEN ((UINT16)0) hfa384x.h 　
29664
 HFA384x_RID_CNFWDSADDR1_LENHFA384x_RID_CNFWDSADDR1_LEN ((UINT16)6) hfa384x.h 　
29665
 HFA384x_RID_CNFWDSADDR2_LENHFA384x_RID_CNFWDSADDR2_LEN ((UINT16)6) hfa384x.h 　
29666
 HFA384x_RID_CNFWDSADDR3_LENHFA384x_RID_CNFWDSADDR3_LEN ((UINT16)6) hfa384x.h 　
29667
 HFA384x_RID_CNFWDSADDR4_LENHFA384x_RID_CNFWDSADDR4_LEN ((UINT16)6) hfa384x.h 　
29668
 HFA384x_RID_CNFWDSADDR5_LENHFA384x_RID_CNFWDSADDR5_LEN ((UINT16)6) hfa384x.h 　
29669
 HFA384x_RID_CNFWDSADDR6_LENHFA384x_RID_CNFWDSADDR6_LEN ((UINT16)6) hfa384x.h 　
29670
 HFA384x_RID_CNFMCASTPMBUFF_LENHFA384x_RID_CNFMCASTPMBUFF_LEN ((UINT16)0) hfa384x.h 　
29671
 HFA384x_RID_CNFAUTHENTICATION_LHFA384x_RID_CNFAUTHENTICATION_L ((UINT16)sizeof(UINT16)) hfa384x.h 　
29672
 HFA384x_RID_CNFMAXSLEEPDUR_LENHFA384x_RID_CNFMAXSLEEPDUR_LEN ((UINT16)0) hfa384x.h 　
29673
 HFA384x_RID_GROUPADDRHFA384x_RID_GROUPADDR ((UINT16)0xFC80) hfa384x.h 　
29674
 HFA384x_RID_CREATEIBSSHFA384x_RID_CREATEIBSS ((UINT16)0xFC81) hfa384x.h 　
29675
 HFA384x_RID_FRAGTHRESHHFA384x_RID_FRAGTHRESH ((UINT16)0xFC82) hfa384x.h 　
29676
 HFA384x_RID_RTSTHRESHHFA384x_RID_RTSTHRESH ((UINT16)0xFC83) hfa384x.h 　
29677
 HFA384x_RID_TXRATECNTLHFA384x_RID_TXRATECNTL ((UINT16)0xFC84) hfa384x.h 　
29678
 HFA384x_RID_PROMISCMODEHFA384x_RID_PROMISCMODE ((UINT16)0xFC85) hfa384x.h 　
29679
 HFA384x_RID_FRAGTHRESH0HFA384x_RID_FRAGTHRESH0 ((UINT16)0xFC90) hfa384x.h 　
29680
 HFA384x_RID_FRAGTHRESH1HFA384x_RID_FRAGTHRESH1 ((UINT16)0xFC91) hfa384x.h 　
29681
 HFA384x_RID_FRAGTHRESH2HFA384x_RID_FRAGTHRESH2 ((UINT16)0xFC92) hfa384x.h 　
29682
 HFA384x_RID_FRAGTHRESH3HFA384x_RID_FRAGTHRESH3 ((UINT16)0xFC93) hfa384x.h 　
29683
 HFA384x_RID_FRAGTHRESH4HFA384x_RID_FRAGTHRESH4 ((UINT16)0xFC94) hfa384x.h 　
29684
 HFA384x_RID_FRAGTHRESH5HFA384x_RID_FRAGTHRESH5 ((UINT16)0xFC95) hfa384x.h 　
29685
 HFA384x_RID_FRAGTHRESH6HFA384x_RID_FRAGTHRESH6 ((UINT16)0xFC96) hfa384x.h 　
29686
 HFA384x_RID_RTSTHRESH0HFA384x_RID_RTSTHRESH0 ((UINT16)0xFC97) hfa384x.h 　
29687
 HFA384x_RID_RTSTHRESH1HFA384x_RID_RTSTHRESH1 ((UINT16)0xFC98) hfa384x.h 　
29688
 HFA384x_RID_RTSTHRESH2HFA384x_RID_RTSTHRESH2 ((UINT16)0xFC99) hfa384x.h 　
29689
 HFA384x_RID_RTSTHRESH3HFA384x_RID_RTSTHRESH3 ((UINT16)0xFC9A) hfa384x.h 　
29690
 HFA384x_RID_RTSTHRESH4HFA384x_RID_RTSTHRESH4 ((UINT16)0xFC9B) hfa384x.h 　
29691
 HFA384x_RID_RTSTHRESH5HFA384x_RID_RTSTHRESH5 ((UINT16)0xFC9C) hfa384x.h 　
29692
 HFA384x_RID_RTSTHRESH6HFA384x_RID_RTSTHRESH6 ((UINT16)0xFC9D) hfa384x.h 　
29693
 HFA384x_RID_TXRATECNTL0HFA384x_RID_TXRATECNTL0 ((UINT16)0xFC9E) hfa384x.h 　
29694
 HFA384x_RID_TXRATECNTL1HFA384x_RID_TXRATECNTL1 ((UINT16)0xFC9F) hfa384x.h 　
29695
 HFA384x_RID_TXRATECNTL2HFA384x_RID_TXRATECNTL2 ((UINT16)0xFCA0) hfa384x.h 　
29696
 HFA384x_RID_TXRATECNTL3HFA384x_RID_TXRATECNTL3 ((UINT16)0xFCA1) hfa384x.h 　
29697
 HFA384x_RID_TXRATECNTL4HFA384x_RID_TXRATECNTL4 ((UINT16)0xFCA2) hfa384x.h 　
29698
 HFA384x_RID_TXRATECNTL5HFA384x_RID_TXRATECNTL5 ((UINT16)0xFCA3) hfa384x.h 　
29699
 HFA384x_RID_TXRATECNTL6HFA384x_RID_TXRATECNTL6 ((UINT16)0xFCA4) hfa384x.h 　
29700
 HFA384x_RID_GROUPADDR_LENHFA384x_RID_GROUPADDR_LEN ((UINT16)16 * WLAN_ADDR_LEN) hfa384x.h 　
29701
 HFA384x_RID_CREATEIBSS_LENHFA384x_RID_CREATEIBSS_LEN ((UINT16)0) hfa384x.h 　
29702
 HFA384x_RID_FRAGTHRESH_LENHFA384x_RID_FRAGTHRESH_LEN ((UINT16)0) hfa384x.h 　
29703
 HFA384x_RID_RTSTHRESH_LENHFA384x_RID_RTSTHRESH_LEN ((UINT16)0) hfa384x.h 　
29704
 HFA384x_RID_TXRATECNTL_LENHFA384x_RID_TXRATECNTL_LEN ((UINT16)4) hfa384x.h 　
29705
 HFA384x_RID_PROMISCMODE_LENHFA384x_RID_PROMISCMODE_LEN ((UINT16)2) hfa384x.h 　
29706
 HFA384x_RID_FRAGTHRESH0_LENHFA384x_RID_FRAGTHRESH0_LEN ((UINT16)0) hfa384x.h 　
29707
 HFA384x_RID_FRAGTHRESH1_LENHFA384x_RID_FRAGTHRESH1_LEN ((UINT16)0) hfa384x.h 　
29708
 HFA384x_RID_FRAGTHRESH2_LENHFA384x_RID_FRAGTHRESH2_LEN ((UINT16)0) hfa384x.h 　
29709
 HFA384x_RID_FRAGTHRESH3_LENHFA384x_RID_FRAGTHRESH3_LEN ((UINT16)0) hfa384x.h 　
29710
 HFA384x_RID_FRAGTHRESH4_LENHFA384x_RID_FRAGTHRESH4_LEN ((UINT16)0) hfa384x.h 　
29711
 HFA384x_RID_FRAGTHRESH5_LENHFA384x_RID_FRAGTHRESH5_LEN ((UINT16)0) hfa384x.h 　
29712
 HFA384x_RID_FRAGTHRESH6_LENHFA384x_RID_FRAGTHRESH6_LEN ((UINT16)0) hfa384x.h 　
29713
 HFA384x_RID_RTSTHRESH0_LENHFA384x_RID_RTSTHRESH0_LEN ((UINT16)0) hfa384x.h 　
29714
 HFA384x_RID_RTSTHRESH1_LENHFA384x_RID_RTSTHRESH1_LEN ((UINT16)0) hfa384x.h 　
29715
 HFA384x_RID_RTSTHRESH2_LENHFA384x_RID_RTSTHRESH2_LEN ((UINT16)0) hfa384x.h 　
29716
 HFA384x_RID_RTSTHRESH3_LENHFA384x_RID_RTSTHRESH3_LEN ((UINT16)0) hfa384x.h 　
29717
 HFA384x_RID_RTSTHRESH4_LENHFA384x_RID_RTSTHRESH4_LEN ((UINT16)0) hfa384x.h 　
29718
 HFA384x_RID_RTSTHRESH5_LENHFA384x_RID_RTSTHRESH5_LEN ((UINT16)0) hfa384x.h 　
29719
 HFA384x_RID_RTSTHRESH6_LENHFA384x_RID_RTSTHRESH6_LEN ((UINT16)0) hfa384x.h 　
29720
 HFA384x_RID_TXRATECNTL0_LENHFA384x_RID_TXRATECNTL0_LEN ((UINT16)0) hfa384x.h 　
29721
 HFA384x_RID_TXRATECNTL1_LENHFA384x_RID_TXRATECNTL1_LEN ((UINT16)0) hfa384x.h 　
29722
 HFA384x_RID_TXRATECNTL2_LENHFA384x_RID_TXRATECNTL2_LEN ((UINT16)0) hfa384x.h 　
29723
 HFA384x_RID_TXRATECNTL3_LENHFA384x_RID_TXRATECNTL3_LEN ((UINT16)0) hfa384x.h 　
29724
 HFA384x_RID_TXRATECNTL4_LENHFA384x_RID_TXRATECNTL4_LEN ((UINT16)0) hfa384x.h 　
29725
 HFA384x_RID_TXRATECNTL5_LENHFA384x_RID_TXRATECNTL5_LEN ((UINT16)0) hfa384x.h 　
29726
 HFA384x_RID_TXRATECNTL6_LENHFA384x_RID_TXRATECNTL6_LEN ((UINT16)0) hfa384x.h 　
29727
 HFA384x_RID_ITICKTIMEHFA384x_RID_ITICKTIME ((UINT16)0xFCE0) hfa384x.h 　
29728
 HFA384x_RID_ITICKTIME_LENHFA384x_RID_ITICKTIME_LEN ((UINT16)2) hfa384x.h 　
29729
 HFA384x_RID_MAXLOADTIMEHFA384x_RID_MAXLOADTIME ((UINT16)0xFD00) hfa384x.h 　
29730
 HFA384x_RID_DOWNLOADBUFFERHFA384x_RID_DOWNLOADBUFFER ((UINT16)0xFD01) hfa384x.h 　
29731
 HFA384x_RID_PRIIDENTITYHFA384x_RID_PRIIDENTITY ((UINT16)0xFD02) hfa384x.h 　
29732
 HFA384x_RID_PRISUPRANGEHFA384x_RID_PRISUPRANGE ((UINT16)0xFD03) hfa384x.h 　
29733
 HFA384x_RID_PRI_CFIACTRANGESHFA384x_RID_PRI_CFIACTRANGES ((UINT16)0xFD04) hfa384x.h 　
29734
 HFA384x_RID_NICSERIALNUMBERHFA384x_RID_NICSERIALNUMBER ((UINT16)0xFD0A) hfa384x.h 　
29735
 HFA384x_RID_NICIDENTITYHFA384x_RID_NICIDENTITY ((UINT16)0xFD0B) hfa384x.h 　
29736
 HFA384x_RID_MFISUPRANGEHFA384x_RID_MFISUPRANGE ((UINT16)0xFD0C) hfa384x.h 　
29737
 HFA384x_RID_CFISUPRANGEHFA384x_RID_CFISUPRANGE ((UINT16)0xFD0D) hfa384x.h 　
29738
 HFA384x_RID_CHANNELLISTHFA384x_RID_CHANNELLIST ((UINT16)0xFD10) hfa384x.h 　
29739
 HFA384x_RID_REGULATORYDOMAINSHFA384x_RID_REGULATORYDOMAINS ((UINT16)0xFD11) hfa384x.h 　
29740
 HFA384x_RID_TEMPTYPEHFA384x_RID_TEMPTYPE ((UINT16)0xFD12) hfa384x.h 　
29741
 HFA384x_RID_CISHFA384x_RID_CIS ((UINT16)0xFD13) hfa384x.h 　
29742
 HFA384x_RID_STAIDENTITYHFA384x_RID_STAIDENTITY ((UINT16)0xFD20) hfa384x.h 　
29743
 HFA384x_RID_STASUPRANGEHFA384x_RID_STASUPRANGE ((UINT16)0xFD21) hfa384x.h 　
29744
 HFA384x_RID_STA_MFIACTRANGESHFA384x_RID_STA_MFIACTRANGES ((UINT16)0xFD22) hfa384x.h 　
29745
 HFA384x_RID_STA_CFIACTRANGESHFA384x_RID_STA_CFIACTRANGES ((UINT16)0xFD23) hfa384x.h 　
29746
 HFA384x_RID_BUILDSEQHFA384x_RID_BUILDSEQ ((UINT16)0xFFFE) hfa384x.h 　
29747
 HFA384x_RID_FWIDHFA384x_RID_FWID ((UINT16)0xFFFF) hfa384x.h 　
29748
 HFA384x_RID_MAXLOADTIME_LENHFA384x_RID_MAXLOADTIME_LEN ((UINT16)0) hfa384x.h 　
29749
 HFA384x_RID_DOWNLOADBUFFER_LENHFA384x_RID_DOWNLOADBUFFER_LEN ((UINT16)sizeof(hfa384x_downloadbuffer_t)) hfa384x.h 　
29750
 HFA384x_RID_PRIIDENTITY_LENHFA384x_RID_PRIIDENTITY_LEN ((UINT16)8) hfa384x.h 　
29751
 HFA384x_RID_PRISUPRANGE_LENHFA384x_RID_PRISUPRANGE_LEN ((UINT16)10) hfa384x.h 　
29752
 HFA384x_RID_CFIACTRANGES_LENHFA384x_RID_CFIACTRANGES_LEN ((UINT16)10) hfa384x.h 　
29753
 HFA384x_RID_NICSERIALNUMBER_LENHFA384x_RID_NICSERIALNUMBER_LEN ((UINT16)12) hfa384x.h 　
29754
 HFA384x_RID_NICIDENTITY_LENHFA384x_RID_NICIDENTITY_LEN ((UINT16)8) hfa384x.h 　
29755
 HFA384x_RID_MFISUPRANGE_LENHFA384x_RID_MFISUPRANGE_LEN ((UINT16)10) hfa384x.h 　
29756
 HFA384x_RID_CFISUPRANGE_LENHFA384x_RID_CFISUPRANGE_LEN ((UINT16)10) hfa384x.h 　
29757
 HFA384x_RID_CHANNELLIST_LENHFA384x_RID_CHANNELLIST_LEN ((UINT16)0) hfa384x.h 　
29758
 HFA384x_RID_REGULATORYDOMAINS_LHFA384x_RID_REGULATORYDOMAINS_L ((UINT16)12) hfa384x.h 　
29759
 HFA384x_RID_TEMPTYPE_LENHFA384x_RID_TEMPTYPE_LEN ((UINT16)0) hfa384x.h 　
29760
 HFA384x_RID_CIS_LENHFA384x_RID_CIS_LEN ((UINT16)480) hfa384x.h 　
29761
 HFA384x_RID_STAIDENTITY_LENHFA384x_RID_STAIDENTITY_LEN ((UINT16)8) hfa384x.h 　
29762
 HFA384x_RID_STASUPRANGE_LENHFA384x_RID_STASUPRANGE_LEN ((UINT16)10) hfa384x.h 　
29763
 HFA384x_RID_MFIACTRANGES_LENHFA384x_RID_MFIACTRANGES_LEN ((UINT16)10) hfa384x.h 　
29764
 HFA384x_RID_CFIACTRANGES2_LENHFA384x_RID_CFIACTRANGES2_LEN ((UINT16)10) hfa384x.h 　
29765
 HFA384x_RID_BUILDSEQ_LENHFA384x_RID_BUILDSEQ_LEN ((UINT16)sizeof(hfa384x_BuildSeq_t)) hfa384x.h 　
29766
 HFA384x_RID_FWID_LENHFA384x_RID_FWID_LEN ((UINT16)sizeof(hfa384x_FWID_t)) hfa384x.h 　
29767
 HFA384x_RID_PORTSTATUSHFA384x_RID_PORTSTATUS ((UINT16)0xFD40) hfa384x.h 　
29768
 HFA384x_RID_CURRENTSSIDHFA384x_RID_CURRENTSSID ((UINT16)0xFD41) hfa384x.h 　
29769
 HFA384x_RID_CURRENTBSSIDHFA384x_RID_CURRENTBSSID ((UINT16)0xFD42) hfa384x.h 　
29770
 HFA384x_RID_COMMSQUALITYHFA384x_RID_COMMSQUALITY ((UINT16)0xFD43) hfa384x.h 　
29771
 HFA384x_RID_CURRENTTXRATEHFA384x_RID_CURRENTTXRATE ((UINT16)0xFD44) hfa384x.h 　
29772
 HFA384x_RID_CURRENTBCNINTHFA384x_RID_CURRENTBCNINT ((UINT16)0xFD45) hfa384x.h 　
29773
 HFA384x_RID_CURRENTSCALETHRESHHFA384x_RID_CURRENTSCALETHRESH ((UINT16)0xFD46) hfa384x.h 　
29774
 HFA384x_RID_PROTOCOLRSPTIMEHFA384x_RID_PROTOCOLRSPTIME ((UINT16)0xFD47) hfa384x.h 　
29775
 HFA384x_RID_SHORTRETRYLIMITHFA384x_RID_SHORTRETRYLIMIT ((UINT16)0xFD48) hfa384x.h 　
29776
 HFA384x_RID_LONGRETRYLIMITHFA384x_RID_LONGRETRYLIMIT ((UINT16)0xFD49) hfa384x.h 　
29777
 HFA384x_RID_MAXTXLIFETIMEHFA384x_RID_MAXTXLIFETIME ((UINT16)0xFD4A) hfa384x.h 　
29778
 HFA384x_RID_MAXRXLIFETIMEHFA384x_RID_MAXRXLIFETIME ((UINT16)0xFD4B) hfa384x.h 　
29779
 HFA384x_RID_CFPOLLABLEHFA384x_RID_CFPOLLABLE ((UINT16)0xFD4C) hfa384x.h 　
29780
 HFA384x_RID_AUTHALGORITHMSHFA384x_RID_AUTHALGORITHMS ((UINT16)0xFD4D) hfa384x.h 　
29781
 HFA384x_RID_PRIVACYOPTIMPHFA384x_RID_PRIVACYOPTIMP ((UINT16)0xFD4F) hfa384x.h 　
29782
 HFA384x_RID_DBMCOMMSQUALITYHFA384x_RID_DBMCOMMSQUALITY ((UINT16)0xFD51) hfa384x.h 　
29783
 HFA384x_RID_CURRENTTXRATE1HFA384x_RID_CURRENTTXRATE1 ((UINT16)0xFD80) hfa384x.h 　
29784
 HFA384x_RID_CURRENTTXRATE2HFA384x_RID_CURRENTTXRATE2 ((UINT16)0xFD81) hfa384x.h 　
29785
 HFA384x_RID_CURRENTTXRATE3HFA384x_RID_CURRENTTXRATE3 ((UINT16)0xFD82) hfa384x.h 　
29786
 HFA384x_RID_CURRENTTXRATE4HFA384x_RID_CURRENTTXRATE4 ((UINT16)0xFD83) hfa384x.h 　
29787
 HFA384x_RID_CURRENTTXRATE5HFA384x_RID_CURRENTTXRATE5 ((UINT16)0xFD84) hfa384x.h 　
29788
 HFA384x_RID_CURRENTTXRATE6HFA384x_RID_CURRENTTXRATE6 ((UINT16)0xFD85) hfa384x.h 　
29789
 HFA384x_RID_OWNMACADDRESSHFA384x_RID_OWNMACADDRESS ((UINT16)0xFD86) hfa384x.h 　
29790
 HFA384x_RID_SCANRESULTSHFA384x_RID_SCANRESULTS ((UINT16)0xFD88) hfa384x.h NEW
29791
 HFA384x_RID_HOSTSCANRESULTSHFA384x_RID_HOSTSCANRESULTS ((UINT16)0xFD89) hfa384x.h NEW
29792
 HFA384x_RID_AUTHENTICATIONUSEDHFA384x_RID_AUTHENTICATIONUSED ((UINT16)0xFD8A) hfa384x.h NEW
29793
 HFA384x_RID_ASSOCIATEFAILUREHFA384x_RID_ASSOCIATEFAILURE ((UINT16)0xFD8D) hfa384x.h 1.8.0
29794
 HFA384x_RID_PORTSTATUS_LENHFA384x_RID_PORTSTATUS_LEN ((UINT16)0) hfa384x.h 　
29795
 HFA384x_RID_CURRENTSSID_LENHFA384x_RID_CURRENTSSID_LEN ((UINT16)34) hfa384x.h 　
29796
 HFA384x_RID_CURRENTBSSID_LENHFA384x_RID_CURRENTBSSID_LEN ((UINT16)WLAN_BSSID_LEN) hfa384x.h 　
29797
 HFA384x_RID_COMMSQUALITY_LENHFA384x_RID_COMMSQUALITY_LEN ((UINT16)sizeof(hfa384x_commsquality_t)) hfa384x.h 　
29798
 HFA384x_RID_DBMCOMMSQUALITY_LENHFA384x_RID_DBMCOMMSQUALITY_LEN ((UINT16)sizeof(hfa384x_dbmcommsquality_t)) hfa384x.h 　
29799
 HFA384x_RID_CURRENTTXRATE_LENHFA384x_RID_CURRENTTXRATE_LEN ((UINT16)0) hfa384x.h 　
29800
 HFA384x_RID_CURRENTBCNINT_LENHFA384x_RID_CURRENTBCNINT_LEN ((UINT16)0) hfa384x.h 　
29801
 HFA384x_RID_STACURSCALETHRESH_LHFA384x_RID_STACURSCALETHRESH_L ((UINT16)12) hfa384x.h 　
29802
 HFA384x_RID_APCURSCALETHRESH_LEHFA384x_RID_APCURSCALETHRESH_LE ((UINT16)6) hfa384x.h 　
29803
 HFA384x_RID_PROTOCOLRSPTIME_LENHFA384x_RID_PROTOCOLRSPTIME_LEN ((UINT16)0) hfa384x.h 　
29804
 HFA384x_RID_SHORTRETRYLIMIT_LENHFA384x_RID_SHORTRETRYLIMIT_LEN ((UINT16)0) hfa384x.h 　
29805
 HFA384x_RID_LONGRETRYLIMIT_LENHFA384x_RID_LONGRETRYLIMIT_LEN ((UINT16)0) hfa384x.h 　
29806
 HFA384x_RID_MAXTXLIFETIME_LENHFA384x_RID_MAXTXLIFETIME_LEN ((UINT16)0) hfa384x.h 　
29807
 HFA384x_RID_MAXRXLIFETIME_LENHFA384x_RID_MAXRXLIFETIME_LEN ((UINT16)0) hfa384x.h 　
29808
 HFA384x_RID_CFPOLLABLE_LENHFA384x_RID_CFPOLLABLE_LEN ((UINT16)0) hfa384x.h 　
29809
 HFA384x_RID_AUTHALGORITHMS_LENHFA384x_RID_AUTHALGORITHMS_LEN ((UINT16)4) hfa384x.h 　
29810
 HFA384x_RID_PRIVACYOPTIMP_LENHFA384x_RID_PRIVACYOPTIMP_LEN ((UINT16)0) hfa384x.h 　
29811
 HFA384x_RID_CURRENTTXRATE1_LENHFA384x_RID_CURRENTTXRATE1_LEN ((UINT16)0) hfa384x.h 　
29812
 HFA384x_RID_CURRENTTXRATE2_LENHFA384x_RID_CURRENTTXRATE2_LEN ((UINT16)0) hfa384x.h 　
29813
 HFA384x_RID_CURRENTTXRATE3_LENHFA384x_RID_CURRENTTXRATE3_LEN ((UINT16)0) hfa384x.h 　
29814
 HFA384x_RID_CURRENTTXRATE4_LENHFA384x_RID_CURRENTTXRATE4_LEN ((UINT16)0) hfa384x.h 　
29815
 HFA384x_RID_CURRENTTXRATE5_LENHFA384x_RID_CURRENTTXRATE5_LEN ((UINT16)0) hfa384x.h 　
29816
 HFA384x_RID_CURRENTTXRATE6_LENHFA384x_RID_CURRENTTXRATE6_LEN ((UINT16)0) hfa384x.h 　
29817
 HFA384x_RID_OWNMACADDRESS_LENHFA384x_RID_OWNMACADDRESS_LEN ((UINT16)6) hfa384x.h 　
29818
 HFA384x_RID_PCFINFO_LENHFA384x_RID_PCFINFO_LEN ((UINT16)6) hfa384x.h 　
29819
 HFA384x_RID_CNFAPPCFINFO_LENHFA384x_RID_CNFAPPCFINFO_LEN ((UINT16)sizeof(hfa384x_PCFInfo_data_t)) hfa384x.h 　
29820
 HFA384x_RID_SCANREQUEST_LENHFA384x_RID_SCANREQUEST_LEN ((UINT16)sizeof(hfa384x_ScanRequest_data_t)) hfa384x.h 　
29821
 HFA384x_RID_JOINREQUEST_LENHFA384x_RID_JOINREQUEST_LEN ((UINT16)sizeof(hfa384x_JoinRequest_data_t)) hfa384x.h 　
29822
 HFA384x_RID_AUTHENTICATESTA_LENHFA384x_RID_AUTHENTICATESTA_LEN ((UINT16)sizeof(hfa384x_authenticateStation_data_t)) hfa384x.h 　
29823
 HFA384x_RID_CHANNELINFOREQUEST_HFA384x_RID_CHANNELINFOREQUEST_ ((UINT16)sizeof(hfa384x_ChannelInfoRequest_data_t)) hfa384x.h 　
29824
 HFA384x_RID_PHYTYPEHFA384x_RID_PHYTYPE ((UINT16)0xFDC0) hfa384x.h 　
29825
 HFA384x_RID_CURRENTCHANNELHFA384x_RID_CURRENTCHANNEL ((UINT16)0xFDC1) hfa384x.h 　
29826
 HFA384x_RID_CURRENTPOWERSTATEHFA384x_RID_CURRENTPOWERSTATE ((UINT16)0xFDC2) hfa384x.h 　
29827
 HFA384x_RID_CCAMODEHFA384x_RID_CCAMODE ((UINT16)0xFDC3) hfa384x.h 　
29828
 HFA384x_RID_SUPPORTEDDATARATESHFA384x_RID_SUPPORTEDDATARATES ((UINT16)0xFDC6) hfa384x.h 　
29829
 HFA384x_RID_LFOSTATUSHFA384x_RID_LFOSTATUS ((UINT16)0xFDC7) hfa384x.h 1.7.1
29830
 HFA384x_RID_PHYTYPE_LENHFA384x_RID_PHYTYPE_LEN ((UINT16)0) hfa384x.h 　
29831
 HFA384x_RID_CURRENTCHANNEL_LENHFA384x_RID_CURRENTCHANNEL_LEN ((UINT16)0) hfa384x.h 　
29832
 HFA384x_RID_CURRENTPOWERSTATE_LHFA384x_RID_CURRENTPOWERSTATE_L ((UINT16)0) hfa384x.h 　
29833
 HFA384x_RID_CCAMODE_LENHFA384x_RID_CCAMODE_LEN ((UINT16)0) hfa384x.h 　
29834
 HFA384x_RID_SUPPORTEDDATARATES_HFA384x_RID_SUPPORTEDDATARATES_ ((UINT16)10) hfa384x.h 　
29835
 HFA384x_RID_CNFWEPDEFAULTKEYIDHFA384x_RID_CNFWEPDEFAULTKEYID ((UINT16)0xFC23) hfa384x.h 　
29836
 HFA384x_RID_CNFWEPDEFAULTKEY0HFA384x_RID_CNFWEPDEFAULTKEY0 ((UINT16)0xFC24) hfa384x.h 　
29837
 HFA384x_RID_CNFWEPDEFAULTKEY1HFA384x_RID_CNFWEPDEFAULTKEY1 ((UINT16)0xFC25) hfa384x.h 　
29838
 HFA384x_RID_CNFWEPDEFAULTKEY2HFA384x_RID_CNFWEPDEFAULTKEY2 ((UINT16)0xFC26) hfa384x.h 　
29839
 HFA384x_RID_CNFWEPDEFAULTKEY3HFA384x_RID_CNFWEPDEFAULTKEY3 ((UINT16)0xFC27) hfa384x.h 　
29840
 HFA384x_RID_CNFWEPFLAGSHFA384x_RID_CNFWEPFLAGS ((UINT16)0xFC28) hfa384x.h 　
29841
 HFA384x_RID_CNFWEPKEYMAPTABLEHFA384x_RID_CNFWEPKEYMAPTABLE ((UINT16)0xFC29) hfa384x.h 　
29842
 HFA384x_RID_CNFAUTHENTICATIONHFA384x_RID_CNFAUTHENTICATION ((UINT16)0xFC2A) hfa384x.h 　
29843
 HFA384x_RID_CNFMAXASSOCSTATIONSHFA384x_RID_CNFMAXASSOCSTATIONS ((UINT16)0xFC2B) hfa384x.h 　
29844
 HFA384x_RID_CNFTXCONTROLHFA384x_RID_CNFTXCONTROL ((UINT16)0xFC2C) hfa384x.h 　
29845
 HFA384x_RID_CNFROAMINGMODEHFA384x_RID_CNFROAMINGMODE ((UINT16)0xFC2D) hfa384x.h 　
29846
 HFA384x_RID_CNFHOSTAUTHASSOCHFA384x_RID_CNFHOSTAUTHASSOC ((UINT16)0xFC2E) hfa384x.h 　
29847
 HFA384x_RID_CNFRCVCRCERRORHFA384x_RID_CNFRCVCRCERROR ((UINT16)0xFC30) hfa384x.h 　
29848
 HFA384x_RID_CNFALTRETRYCNTHFA384x_RID_CNFALTRETRYCNT ((UINT16)0xFC32) hfa384x.h 　
29849
 HFA384x_RID_CNFAPBCNINTHFA384x_RID_CNFAPBCNINT ((UINT16)0xFC33) hfa384x.h 　
29850
 HFA384x_RID_CNFAPPCFINFOHFA384x_RID_CNFAPPCFINFO ((UINT16)0xFC34) hfa384x.h 　
29851
 HFA384x_RID_CNFSTAPCFINFOHFA384x_RID_CNFSTAPCFINFO ((UINT16)0xFC35) hfa384x.h 　
29852
 HFA384x_RID_CNFPRIORITYQUSAGEHFA384x_RID_CNFPRIORITYQUSAGE ((UINT16)0xFC37) hfa384x.h 　
29853
 HFA384x_RID_CNFTIMCTRLHFA384x_RID_CNFTIMCTRL ((UINT16)0xFC40) hfa384x.h 　
29854
 HFA384x_RID_CNFTHIRTY2TALLYHFA384x_RID_CNFTHIRTY2TALLY ((UINT16)0xFC42) hfa384x.h 　
29855
 HFA384x_RID_CNFENHSECURITYHFA384x_RID_CNFENHSECURITY ((UINT16)0xFC43) hfa384x.h 　
29856
 HFA384x_RID_CNFDBMADJUSTHFA384x_RID_CNFDBMADJUST ((UINT16)0xFC46) hfa384x.h NEW
29857
 HFA384x_RID_CNFWPADATAHFA384x_RID_CNFWPADATA ((UINT16)0xFC48) hfa384x.h 1.7.0
29858
 HFA384x_RID_CNFPROPOGATIONDELAYHFA384x_RID_CNFPROPOGATIONDELAY ((UINT16)0xFC49) hfa384x.h 1.7.6
29859
 HFA384x_RID_CNFSHORTPREAMBLEHFA384x_RID_CNFSHORTPREAMBLE ((UINT16)0xFCB0) hfa384x.h 　
29860
 HFA384x_RID_CNFEXCLONGPREAMBLEHFA384x_RID_CNFEXCLONGPREAMBLE ((UINT16)0xFCB1) hfa384x.h 　
29861
 HFA384x_RID_CNFAUTHRSPTIMEOUTHFA384x_RID_CNFAUTHRSPTIMEOUT ((UINT16)0xFCB2) hfa384x.h 　
29862
 HFA384x_RID_CNFBASICRATESHFA384x_RID_CNFBASICRATES ((UINT16)0xFCB3) hfa384x.h 　
29863
 HFA384x_RID_CNFSUPPRATESHFA384x_RID_CNFSUPPRATES ((UINT16)0xFCB4) hfa384x.h 　
29864
 HFA384x_RID_CNFFALLBACKCTRLHFA384x_RID_CNFFALLBACKCTRL ((UINT16)0xFCB5) hfa384x.h NEW
29865
 HFA384x_RID_WEPKEYSTATUSHFA384x_RID_WEPKEYSTATUS ((UINT16)0xFCB6) hfa384x.h NEW
29866
 HFA384x_RID_WEPKEYMAPINDEXHFA384x_RID_WEPKEYMAPINDEX ((UINT16)0xFCB7) hfa384x.h NEW
29867
 HFA384x_RID_BROADCASTKEYIDHFA384x_RID_BROADCASTKEYID ((UINT16)0xFCB8) hfa384x.h NEW
29868
 HFA384x_RID_ENTSECFLAGEYIDHFA384x_RID_ENTSECFLAGEYID ((UINT16)0xFCB9) hfa384x.h NEW
29869
 HFA384x_RID_CNFPASSIVESCANCTRLHFA384x_RID_CNFPASSIVESCANCTRL ((UINT16)0xFCBA) hfa384x.h NEW STA
29870
 HFA384x_RID_CNFWPAHANDLINGHFA384x_RID_CNFWPAHANDLING ((UINT16)0xFCBB) hfa384x.h 1.7.0
29871
 HFA384x_RID_MDCCONTROLHFA384x_RID_MDCCONTROL ((UINT16)0xFCBC) hfa384x.h 1.7.0/1.4.0
29872
 HFA384x_RID_MDCCOUNTRYHFA384x_RID_MDCCOUNTRY ((UINT16)0xFCBD) hfa384x.h 1.7.0/1.4.0
29873
 HFA384x_RID_TXPOWERMAXHFA384x_RID_TXPOWERMAX ((UINT16)0xFCBE) hfa384x.h 1.7.0/1.4.0
29874
 HFA384x_RID_CNFLFOENBLEDHFA384x_RID_CNFLFOENBLED ((UINT16)0xFCBF) hfa384x.h 1.6.3
29875
 HFA384x_RID_CAPINFOHFA384x_RID_CAPINFO ((UINT16)0xFCC0) hfa384x.h 1.7.0/1.3.7
29876
 HFA384x_RID_LISTENINTERVALHFA384x_RID_LISTENINTERVAL ((UINT16)0xFCC1) hfa384x.h 1.7.0/1.3.7
29877
 HFA384x_RID_DIVERSITYENABLEDHFA384x_RID_DIVERSITYENABLED ((UINT16)0xFCC2) hfa384x.h 1.7.0/1.3.7
29878
 HFA384x_RID_LED_CONTROLHFA384x_RID_LED_CONTROL ((UINT16)0xFCC4) hfa384x.h 1.7.6
29879
 HFA384x_RID_HFO_DELAYHFA384x_RID_HFO_DELAY ((UINT16)0xFCC5) hfa384x.h 1.7.6
29880
 HFA384x_RID_DISSALOWEDBSSIDHFA384x_RID_DISSALOWEDBSSID ((UINT16)0xFCC6) hfa384x.h 1.8.0
29881
 HFA384x_RID_SCANREQUESTHFA384x_RID_SCANREQUEST ((UINT16)0xFCE1) hfa384x.h 　
29882
 HFA384x_RID_JOINREQUESTHFA384x_RID_JOINREQUEST ((UINT16)0xFCE2) hfa384x.h 　
29883
 HFA384x_RID_AUTHENTICATESTAHFA384x_RID_AUTHENTICATESTA ((UINT16)0xFCE3) hfa384x.h 　
29884
 HFA384x_RID_CHANNELINFOREQUESTHFA384x_RID_CHANNELINFOREQUEST ((UINT16)0xFCE4) hfa384x.h 　
29885
 HFA384x_RID_HOSTSCANHFA384x_RID_HOSTSCAN ((UINT16)0xFCE5) hfa384x.h NEW STA
29886
 HFA384x_RID_ASSOCIATESTAHFA384x_RID_ASSOCIATESTA ((UINT16)0xFCE6) hfa384x.h 　
29887
 HFA384x_RID_CNFWEPDEFAULTKEY_LEHFA384x_RID_CNFWEPDEFAULTKEY_LE ((UINT16)6) hfa384x.h 　
29888
 HFA384x_RID_CNFWEP128DEFAULTKEYHFA384x_RID_CNFWEP128DEFAULTKEY ((UINT16)14) hfa384x.h 　
29889
 HFA384x_RID_CNFPRIOQUSAGE_LENHFA384x_RID_CNFPRIOQUSAGE_LEN ((UINT16)4) hfa384x.h 　
29890
 HFA384x_PDR_PCB_PARTNUMHFA384x_PDR_PCB_PARTNUM ((UINT16)0x0001) hfa384x.h 　
29891
 HFA384x_PDR_PDAVERHFA384x_PDR_PDAVER ((UINT16)0x0002) hfa384x.h 　
29892
 HFA384x_PDR_NIC_SERIALHFA384x_PDR_NIC_SERIAL ((UINT16)0x0003) hfa384x.h 　
29893
 HFA384x_PDR_MKK_MEASUREMENTSHFA384x_PDR_MKK_MEASUREMENTS ((UINT16)0x0004) hfa384x.h 　
29894
 HFA384x_PDR_NIC_RAMSIZEHFA384x_PDR_NIC_RAMSIZE ((UINT16)0x0005) hfa384x.h 　
29895
 HFA384x_PDR_MFISUPRANGEHFA384x_PDR_MFISUPRANGE ((UINT16)0x0006) hfa384x.h 　
29896
 HFA384x_PDR_CFISUPRANGEHFA384x_PDR_CFISUPRANGE ((UINT16)0x0007) hfa384x.h 　
29897
 HFA384x_PDR_NICIDHFA384x_PDR_NICID ((UINT16)0x0008) hfa384x.h 　
29898
 HFA384x_PDR_MAC_ADDRESSHFA384x_PDR_MAC_ADDRESS ((UINT16)0x0101) hfa384x.h 　
29899
 HFA384x_PDR_REGDOMAINHFA384x_PDR_REGDOMAIN ((UINT16)0x0103) hfa384x.h 　
29900
 HFA384x_PDR_ALLOWED_CHANNELHFA384x_PDR_ALLOWED_CHANNEL ((UINT16)0x0104) hfa384x.h 　
29901
 HFA384x_PDR_DEFAULT_CHANNELHFA384x_PDR_DEFAULT_CHANNEL ((UINT16)0x0105) hfa384x.h 　
29902
 HFA384x_PDR_TEMPTYPEHFA384x_PDR_TEMPTYPE ((UINT16)0x0107) hfa384x.h 　
29903
 HFA384x_PDR_IFR_SETTINGHFA384x_PDR_IFR_SETTING ((UINT16)0x0200) hfa384x.h 　
29904
 HFA384x_PDR_RFR_SETTINGHFA384x_PDR_RFR_SETTING ((UINT16)0x0201) hfa384x.h 　
29905
 HFA384x_PDR_HFA3861_BASELINEHFA384x_PDR_HFA3861_BASELINE ((UINT16)0x0202) hfa384x.h 　
29906
 HFA384x_PDR_HFA3861_SHADOWHFA384x_PDR_HFA3861_SHADOW ((UINT16)0x0203) hfa384x.h 　
29907
 HFA384x_PDR_HFA3861_IFRFHFA384x_PDR_HFA3861_IFRF ((UINT16)0x0204) hfa384x.h 　
29908
 HFA384x_PDR_HFA3861_CHCALSPHFA384x_PDR_HFA3861_CHCALSP ((UINT16)0x0300) hfa384x.h 　
29909
 HFA384x_PDR_HFA3861_CHCALIHFA384x_PDR_HFA3861_CHCALI ((UINT16)0x0301) hfa384x.h 　
29910
 HFA384x_PDR_MAX_TX_POWERHFA384x_PDR_MAX_TX_POWER ((UINT16)0x0302) hfa384x.h 　
29911
 HFA384x_PDR_MASTER_CHAN_LISTHFA384x_PDR_MASTER_CHAN_LIST ((UINT16)0x0303) hfa384x.h 　
29912
 HFA384x_PDR_3842_NIC_CONFIGHFA384x_PDR_3842_NIC_CONFIG ((UINT16)0x0400) hfa384x.h 　
29913
 HFA384x_PDR_USB_IDHFA384x_PDR_USB_ID ((UINT16)0x0401) hfa384x.h 　
29914
 HFA384x_PDR_PCI_IDHFA384x_PDR_PCI_ID ((UINT16)0x0402) hfa384x.h 　
29915
 HFA384x_PDR_PCI_IFCONFHFA384x_PDR_PCI_IFCONF ((UINT16)0x0403) hfa384x.h 　
29916
 HFA384x_PDR_PCI_PMCONFHFA384x_PDR_PCI_PMCONF ((UINT16)0x0404) hfa384x.h 　
29917
 HFA384x_PDR_RFENRGYHFA384x_PDR_RFENRGY ((UINT16)0x0406) hfa384x.h 　
29918
 HFA384x_PDR_USB_POWER_TYPEHFA384x_PDR_USB_POWER_TYPE ((UINT16)0x0407) hfa384x.h 　
29919
 HFA384x_PDR_USB_MAX_POWERHFA384x_PDR_USB_MAX_POWER ((UINT16)0x0409) hfa384x.h 　
29920
 HFA384x_PDR_USB_MANUFACTURERHFA384x_PDR_USB_MANUFACTURER ((UINT16)0x0410) hfa384x.h 　
29921
 HFA384x_PDR_USB_PRODUCTHFA384x_PDR_USB_PRODUCT ((UINT16)0x0411) hfa384x.h 　
29922
 HFA384x_PDR_ANT_DIVERSITYHFA384x_PDR_ANT_DIVERSITY ((UINT16)0x0412) hfa384x.h 　
29923
 HFA384x_PDR_HFO_DELAYHFA384x_PDR_HFO_DELAY ((UINT16)0x0413) hfa384x.h 　
29924
 HFA384x_PDR_SCALE_THRESHHFA384x_PDR_SCALE_THRESH ((UINT16)0x0414) hfa384x.h 　
29925
 HFA384x_PDR_HFA3861_MANF_TESTSPHFA384x_PDR_HFA3861_MANF_TESTSP ((UINT16)0x0900) hfa384x.h 　
29926
 HFA384x_PDR_HFA3861_MANF_TESTIHFA384x_PDR_HFA3861_MANF_TESTI ((UINT16)0x0901) hfa384x.h 　
29927
 HFA384x_PDR_END_OF_PDAHFA384x_PDR_END_OF_PDA ((UINT16)0x0000) hfa384x.h 　
29928
 HFA384x_CMDHFA384x_CMD HFA384x_CMD_OFF hfa384x.h 　
29929
 HFA384x_PARAM0HFA384x_PARAM0 HFA384x_PARAM0_OFF hfa384x.h 　
29930
 HFA384x_PARAM1HFA384x_PARAM1 HFA384x_PARAM1_OFF hfa384x.h 　
29931
 HFA384x_PARAM2HFA384x_PARAM2 HFA384x_PARAM2_OFF hfa384x.h 　
29932
 HFA384x_STATUSHFA384x_STATUS HFA384x_STATUS_OFF hfa384x.h 　
29933
 HFA384x_RESP0HFA384x_RESP0 HFA384x_RESP0_OFF hfa384x.h 　
29934
 HFA384x_RESP1HFA384x_RESP1 HFA384x_RESP1_OFF hfa384x.h 　
29935
 HFA384x_RESP2HFA384x_RESP2 HFA384x_RESP2_OFF hfa384x.h 　
29936
 HFA384x_INFOFIDHFA384x_INFOFID HFA384x_INFOFID_OFF hfa384x.h 　
29937
 HFA384x_RXFIDHFA384x_RXFID HFA384x_RXFID_OFF hfa384x.h 　
29938
 HFA384x_ALLOCFIDHFA384x_ALLOCFID HFA384x_ALLOCFID_OFF hfa384x.h 　
29939
 HFA384x_TXCOMPLFIDHFA384x_TXCOMPLFID HFA384x_TXCOMPLFID_OFF hfa384x.h 　
29940
 HFA384x_SELECT0HFA384x_SELECT0 HFA384x_SELECT0_OFF hfa384x.h 　
29941
 HFA384x_OFFSET0HFA384x_OFFSET0 HFA384x_OFFSET0_OFF hfa384x.h 　
29942
 HFA384x_DATA0HFA384x_DATA0 HFA384x_DATA0_OFF hfa384x.h 　
29943
 HFA384x_SELECT1HFA384x_SELECT1 HFA384x_SELECT1_OFF hfa384x.h 　
29944
 HFA384x_OFFSET1HFA384x_OFFSET1 HFA384x_OFFSET1_OFF hfa384x.h 　
29945
 HFA384x_DATA1HFA384x_DATA1 HFA384x_DATA1_OFF hfa384x.h 　
29946
 HFA384x_EVSTATHFA384x_EVSTAT HFA384x_EVSTAT_OFF hfa384x.h 　
29947
 HFA384x_INTENHFA384x_INTEN HFA384x_INTEN_OFF hfa384x.h 　
29948
 HFA384x_EVACKHFA384x_EVACK HFA384x_EVACK_OFF hfa384x.h 　
29949
 HFA384x_CONTROLHFA384x_CONTROL HFA384x_CONTROL_OFF hfa384x.h 　
29950
 HFA384x_SWSUPPORT0HFA384x_SWSUPPORT0 HFA384x_SWSUPPORT0_OFF hfa384x.h 　
29951
 HFA384x_SWSUPPORT1HFA384x_SWSUPPORT1 HFA384x_SWSUPPORT1_OFF hfa384x.h 　
29952
 HFA384x_SWSUPPORT2HFA384x_SWSUPPORT2 HFA384x_SWSUPPORT2_OFF hfa384x.h 　
29953
 HFA384x_AUXPAGEHFA384x_AUXPAGE HFA384x_AUXPAGE_OFF hfa384x.h 　
29954
 HFA384x_AUXOFFSETHFA384x_AUXOFFSET HFA384x_AUXOFFSET_OFF hfa384x.h 　
29955
 HFA384x_AUXDATAHFA384x_AUXDATA HFA384x_AUXDATA_OFF hfa384x.h 　
29956
 HFA384x_PCICORHFA384x_PCICOR HFA384x_PCICOR_OFF hfa384x.h 　
29957
 HFA384x_PCIHCRHFA384x_PCIHCR HFA384x_PCIHCR_OFF hfa384x.h 　
29958
 HFA384x_STATE_PREINITHFA384x_STATE_PREINIT 0 hfa384x.h 　
29959
 HFA384x_STATE_INITHFA384x_STATE_INIT 1 hfa384x.h 　
29960
 HFA384x_STATE_RUNNINGHFA384x_STATE_RUNNING 2 hfa384x.h 　
29961
 HFA384x_HOSTAUTHASSOC_HOSTAUTHHFA384x_HOSTAUTHASSOC_HOSTAUTH BIT0 hfa384x.h 　
29962
 HFA384x_HOSTAUTHASSOC_HOSTASSOCHFA384x_HOSTAUTHASSOC_HOSTASSOC BIT1 hfa384x.h 　
29963
 HFA384x_WHAHANDLING_DISABLEDHFA384x_WHAHANDLING_DISABLED 0 hfa384x.h 　
29964
 HFA384x_WHAHANDLING_PASSTHROUGHHFA384x_WHAHANDLING_PASSTHROUGH BIT1 hfa384x.h 　
29965
 HFA384x_CNFAUTHENTICATION_OPENSHFA384x_CNFAUTHENTICATION_OPENS 0x0001 hfa384x.h 　
29966
 HFA384x_CNFAUTHENTICATION_SHAREHFA384x_CNFAUTHENTICATION_SHARE 0x0002 hfa384x.h 　
29967
 HFA384x_CNFAUTHENTICATION_LEAPHFA384x_CNFAUTHENTICATION_LEAP 0x0004 hfa384x.h 　
29968
 HFA384x_CREATEIBSS_JOINCREATEIBHFA384x_CREATEIBSS_JOINCREATEIB 0 hfa384x.h 　
29969
 HFA384x_CREATEIBSS_JOINESS_JOINHFA384x_CREATEIBSS_JOINESS_JOIN 1 hfa384x.h 　
29970
 HFA384x_CREATEIBSS_JOINIBSSHFA384x_CREATEIBSS_JOINIBSS 2 hfa384x.h 　
29971
 HFA384x_CREATEIBSS_JOINESS_JOINHFA384x_CREATEIBSS_JOINESS_JOIN 3 hfa384x.h 　
29972
 HFA384x_FWID_LENHFA384x_FWID_LEN 14 hfa384x.h 　
29973
 HFA384x_PSTATUS_DISABLEDHFA384x_PSTATUS_DISABLED ((UINT16)1) hfa384x.h 　
29974
 HFA384x_PSTATUS_SEARCHINGHFA384x_PSTATUS_SEARCHING ((UINT16)2) hfa384x.h 　
29975
 HFA384x_PSTATUS_CONN_IBSSHFA384x_PSTATUS_CONN_IBSS ((UINT16)3) hfa384x.h 　
29976
 HFA384x_PSTATUS_CONN_ESSHFA384x_PSTATUS_CONN_ESS ((UINT16)4) hfa384x.h 　
29977
 HFA384x_PSTATUS_OUTOFRANGEHFA384x_PSTATUS_OUTOFRANGE ((UINT16)5) hfa384x.h 　
29978
 HFA384x_PSTATUS_CONN_WDSHFA384x_PSTATUS_CONN_WDS ((UINT16)6) hfa384x.h 　
29979
 HFA384x_TESTRESULT_ALLPASSEDHFA384x_TESTRESULT_ALLPASSED BIT0 hfa384x.h 　
29980
 HFA384x_TESTRESULT_LFO_FAILHFA384x_TESTRESULT_LFO_FAIL BIT1 hfa384x.h 　
29981
 HFA384x_TESTRESULT_VR_HF0_FAILHFA384x_TESTRESULT_VR_HF0_FAIL BIT2 hfa384x.h 　
29982
 HFA384x_HOST_FIRM_COORDINATEHFA384x_HOST_FIRM_COORDINATE BIT7 hfa384x.h 　
29983
 HFA384x_TESTRESULT_COORDINATEHFA384x_TESTRESULT_COORDINATE BIT15 hfa384x.h 　
29984
 HFA384x_FD_STATUS_OFFHFA384x_FD_STATUS_OFF ((UINT16)0x44) hfa384x.h 　
29985
 HFA384x_FD_TIME_OFFHFA384x_FD_TIME_OFF ((UINT16)0x46) hfa384x.h 　
29986
 HFA384x_FD_SWSUPPORT_OFFHFA384x_FD_SWSUPPORT_OFF ((UINT16)0x4A) hfa384x.h 　
29987
 HFA384x_FD_SILENCE_OFFHFA384x_FD_SILENCE_OFF ((UINT16)0x4A) hfa384x.h 　
29988
 HFA384x_FD_SIGNAL_OFFHFA384x_FD_SIGNAL_OFF ((UINT16)0x4B) hfa384x.h 　
29989
 HFA384x_FD_RATE_OFFHFA384x_FD_RATE_OFF ((UINT16)0x4C) hfa384x.h 　
29990
 HFA384x_FD_RXFLOW_OFFHFA384x_FD_RXFLOW_OFF ((UINT16)0x4D) hfa384x.h 　
29991
 HFA384x_FD_RESERVED_OFFHFA384x_FD_RESERVED_OFF ((UINT16)0x4E) hfa384x.h 　
29992
 HFA384x_FD_TXCONTROL_OFFHFA384x_FD_TXCONTROL_OFF ((UINT16)0x50) hfa384x.h 　
29993
 HFA384x_FD_FRAMECONTROL_OFFHFA384x_FD_FRAMECONTROL_OFF ((UINT16)0x52) hfa384x.h 　
29994
 HFA384x_FD_DURATIONID_OFFHFA384x_FD_DURATIONID_OFF ((UINT16)0x54) hfa384x.h 　
29995
 HFA384x_FD_ADDRESS1_OFFHFA384x_FD_ADDRESS1_OFF ((UINT16)0x56) hfa384x.h 　
29996
 HFA384x_FD_ADDRESS2_OFFHFA384x_FD_ADDRESS2_OFF ((UINT16)0x5C) hfa384x.h 　
29997
 HFA384x_FD_ADDRESS3_OFFHFA384x_FD_ADDRESS3_OFF ((UINT16)0x62) hfa384x.h 　
29998
 HFA384x_FD_SEQCONTROL_OFFHFA384x_FD_SEQCONTROL_OFF ((UINT16)0x68) hfa384x.h 　
29999
 HFA384x_FD_ADDRESS4_OFFHFA384x_FD_ADDRESS4_OFF ((UINT16)0x6A) hfa384x.h 　
30000
 HFA384x_FD_DATALEN_OFFHFA384x_FD_DATALEN_OFF ((UINT16)0x70) hfa384x.h 　
30001
 HFA384x_FD_DESTADDRESS_OFFHFA384x_FD_DESTADDRESS_OFF ((UINT16)0x72) hfa384x.h 　
30002
 HFA384x_FD_SRCADDRESS_OFFHFA384x_FD_SRCADDRESS_OFF ((UINT16)0x78) hfa384x.h 　
30003
 HFA384x_FD_DATALENGTH_OFFHFA384x_FD_DATALENGTH_OFF ((UINT16)0x7E) hfa384x.h 　
30004
 HFA384x_TXSTATUS_ACKERRHFA384x_TXSTATUS_ACKERR ((UINT16)BIT5) hfa384x.h 　
30005
 HFA384x_TXSTATUS_FORMERRHFA384x_TXSTATUS_FORMERR ((UINT16)BIT3) hfa384x.h 　
30006
 HFA384x_TXSTATUS_DISCONHFA384x_TXSTATUS_DISCON ((UINT16)BIT2) hfa384x.h 　
30007
 HFA384x_TXSTATUS_AGEDERRHFA384x_TXSTATUS_AGEDERR ((UINT16)BIT1) hfa384x.h 　
30008
 HFA384x_TXSTATUS_RETRYERRHFA384x_TXSTATUS_RETRYERR ((UINT16)BIT0) hfa384x.h 　
30009
 HFA384x_TX_CFPOLLHFA384x_TX_CFPOLL ((UINT16)BIT12) hfa384x.h 　
30010
 HFA384x_TX_PRSTHFA384x_TX_PRST ((UINT16)BIT11) hfa384x.h 　
30011
 HFA384x_TX_MACPORTHFA384x_TX_MACPORT ((UINT16)(BIT10 | BIT9 | BIT8)) hfa384x.h 　
30012
 HFA384x_TX_NOENCRYPTHFA384x_TX_NOENCRYPT ((UINT16)BIT7) hfa384x.h 　
30013
 HFA384x_TX_RETRYSTRATHFA384x_TX_RETRYSTRAT ((UINT16)(BIT6 | BIT5)) hfa384x.h 　
30014
 HFA384x_TX_STRUCTYPEHFA384x_TX_STRUCTYPE ((UINT16)(BIT4 | BIT3)) hfa384x.h 　
30015
 HFA384x_TX_TXEXHFA384x_TX_TXEX ((UINT16)BIT2) hfa384x.h 　
30016
 HFA384x_TX_TXOKHFA384x_TX_TXOK ((UINT16)BIT1) hfa384x.h 　
30017
 HFA384x_RX_DATA_LEN_OFFHFA384x_RX_DATA_LEN_OFF ((UINT16)44) hfa384x.h 　
30018
 HFA384x_RX_80211HDR_OFFHFA384x_RX_80211HDR_OFF ((UINT16)14) hfa384x.h 　
30019
 HFA384x_RX_DATA_OFFHFA384x_RX_DATA_OFF ((UINT16)60) hfa384x.h 　
30020
 HFA384x_RXSTATUS_MSGTYPEHFA384x_RXSTATUS_MSGTYPE ((UINT16)(BIT15 | BIT14 | BIT13)) hfa384x.h 　
30021
 HFA384x_RXSTATUS_MACPORTHFA384x_RXSTATUS_MACPORT ((UINT16)(BIT10 | BIT9 | BIT8)) hfa384x.h 　
30022
 HFA384x_RXSTATUS_UNDECRHFA384x_RXSTATUS_UNDECR ((UINT16)BIT1) hfa384x.h 　
30023
 HFA384x_RXSTATUS_FCSERRHFA384x_RXSTATUS_FCSERR ((UINT16)BIT0) hfa384x.h 　
30024
 HFA384x_IT_HANDOVERADDRHFA384x_IT_HANDOVERADDR ((UINT16)0xF000UL) hfa384x.h 　
30025
 HFA384x_IT_HANDOVERDEAUTHADDRESHFA384x_IT_HANDOVERDEAUTHADDRES ((UINT16)0xF001UL) hfa384x.h AP 1.3.7
30026
 HFA384x_IT_COMMTALLIESHFA384x_IT_COMMTALLIES ((UINT16)0xF100UL) hfa384x.h 　
30027
 HFA384x_IT_SCANRESULTSHFA384x_IT_SCANRESULTS ((UINT16)0xF101UL) hfa384x.h 　
30028
 HFA384x_IT_CHINFORESULTSHFA384x_IT_CHINFORESULTS ((UINT16)0xF102UL) hfa384x.h 　
30029
 HFA384x_IT_HOSTSCANRESULTSHFA384x_IT_HOSTSCANRESULTS ((UINT16)0xF103UL) hfa384x.h 　
30030
 HFA384x_IT_LINKSTATUSHFA384x_IT_LINKSTATUS ((UINT16)0xF200UL) hfa384x.h 　
30031
 HFA384x_IT_ASSOCSTATUSHFA384x_IT_ASSOCSTATUS ((UINT16)0xF201UL) hfa384x.h 　
30032
 HFA384x_IT_AUTHREQHFA384x_IT_AUTHREQ ((UINT16)0xF202UL) hfa384x.h 　
30033
 HFA384x_IT_PSUSERCNTHFA384x_IT_PSUSERCNT ((UINT16)0xF203UL) hfa384x.h 　
30034
 HFA384x_IT_KEYIDCHANGEDHFA384x_IT_KEYIDCHANGED ((UINT16)0xF204UL) hfa384x.h 　
30035
 HFA384x_IT_ASSOCREQHFA384x_IT_ASSOCREQ ((UINT16)0xF205UL) hfa384x.h 　
30036
 HFA384x_IT_MICFAILUREHFA384x_IT_MICFAILURE ((UINT16)0xF206UL) hfa384x.h 　
30037
 HFA384x_CHINFORESULT_BSSACTIVEHFA384x_CHINFORESULT_BSSACTIVE BIT0 hfa384x.h 　
30038
 HFA384x_CHINFORESULT_PCFACTIVEHFA384x_CHINFORESULT_PCFACTIVE BIT1 hfa384x.h 　
30039
 HFA384x_LINK_NOTCONNECTEDHFA384x_LINK_NOTCONNECTED ((UINT16)0) hfa384x.h 　
30040
 HFA384x_LINK_CONNECTEDHFA384x_LINK_CONNECTED ((UINT16)1) hfa384x.h 　
30041
 HFA384x_LINK_DISCONNECTEDHFA384x_LINK_DISCONNECTED ((UINT16)2) hfa384x.h 　
30042
 HFA384x_LINK_AP_CHANGEHFA384x_LINK_AP_CHANGE ((UINT16)3) hfa384x.h 　
30043
 HFA384x_LINK_AP_OUTOFRANGEHFA384x_LINK_AP_OUTOFRANGE ((UINT16)4) hfa384x.h 　
30044
 HFA384x_LINK_AP_INRANGEHFA384x_LINK_AP_INRANGE ((UINT16)5) hfa384x.h 　
30045
 HFA384x_LINK_ASSOCFAILHFA384x_LINK_ASSOCFAIL ((UINT16)6) hfa384x.h 　
30046
 HFA384x_ASSOCSTATUS_STAASSOCHFA384x_ASSOCSTATUS_STAASSOC ((UINT16)1) hfa384x.h 　
30047
 HFA384x_ASSOCSTATUS_REASSOCHFA384x_ASSOCSTATUS_REASSOC ((UINT16)2) hfa384x.h 　
30048
 HFA384x_ASSOCSTATUS_DISASSOCHFA384x_ASSOCSTATUS_DISASSOC ((UINT16)3) hfa384x.h 　
30049
 HFA384x_ASSOCSTATUS_ASSOCFAILHFA384x_ASSOCSTATUS_ASSOCFAIL ((UINT16)4) hfa384x.h 　
30050
 HFA384x_ASSOCSTATUS_AUTHFAILHFA384x_ASSOCSTATUS_AUTHFAIL ((UINT16)5) hfa384x.h 　
30051
 HFA384x_ASSOCREQ_TYPE_ASSOCHFA384x_ASSOCREQ_TYPE_ASSOC 0 hfa384x.h 　
30052
 HFA384x_ASSOCREQ_TYPE_REASSOCHFA384x_ASSOCREQ_TYPE_REASSOC 1 hfa384x.h 　
30053
 HFA384x_USB_ENBULKINHFA384x_USB_ENBULKIN 6 hfa384x.h 　
30054
 HFA384x_USB_TXFRMHFA384x_USB_TXFRM 0 hfa384x.h 　
30055
 HFA384x_USB_CMDREQHFA384x_USB_CMDREQ 1 hfa384x.h 　
30056
 HFA384x_USB_WRIDREQHFA384x_USB_WRIDREQ 2 hfa384x.h 　
30057
 HFA384x_USB_RRIDREQHFA384x_USB_RRIDREQ 3 hfa384x.h 　
30058
 HFA384x_USB_WMEMREQHFA384x_USB_WMEMREQ 4 hfa384x.h 　
30059
 HFA384x_USB_RMEMREQHFA384x_USB_RMEMREQ 5 hfa384x.h 　
30060
 HFA384x_USB_INFOFRMHFA384x_USB_INFOFRM 0x8000 hfa384x.h 　
30061
 HFA384x_USB_CMDRESPHFA384x_USB_CMDRESP 0x8001 hfa384x.h 　
30062
 HFA384x_USB_WRIDRESPHFA384x_USB_WRIDRESP 0x8002 hfa384x.h 　
30063
 HFA384x_USB_RRIDRESPHFA384x_USB_RRIDRESP 0x8003 hfa384x.h 　
30064
 HFA384x_USB_WMEMRESPHFA384x_USB_WMEMRESP 0x8004 hfa384x.h 　
30065
 HFA384x_USB_RMEMRESPHFA384x_USB_RMEMRESP 0x8005 hfa384x.h 　
30066
 HFA384x_USB_BUFAVAILHFA384x_USB_BUFAVAIL 0x8006 hfa384x.h 　
30067
 HFA384x_USB_ERRORHFA384x_USB_ERROR 0x8007 hfa384x.h 　
30068
 MAX_PRISM2_GRP_ADDRMAX_PRISM2_GRP_ADDR 16 hfa384x.h 　
30069
 MAX_GRP_ADDRMAX_GRP_ADDR 32 hfa384x.h 　
30070
 WLAN_COMMENT_MAXWLAN_COMMENT_MAX 80 hfa384x.h Max. length of user comment string.
30071
 MM_SAT_PCFMM_SAT_PCF (BIT14) hfa384x.h 　
30072
 MM_GCSD_PCFMM_GCSD_PCF (BIT15) hfa384x.h 　
30073
 MM_GCSD_PCF_EBMM_GCSD_PCF_EB (BIT14 | BIT15) hfa384x.h 　
30074
 WLAN_STATE_STOPPEDWLAN_STATE_STOPPED 0 hfa384x.h Network is not active.
30075
 WLAN_STATE_STARTEDWLAN_STATE_STARTED 1 hfa384x.h Network has been started.
30076
 WLAN_AUTH_MAXWLAN_AUTH_MAX 60 hfa384x.h Max. # of authenticated stations.
30077
 WLAN_ACCESS_MAXWLAN_ACCESS_MAX 60 hfa384x.h Max. # of stations in an access list.
30078
 WLAN_ACCESS_NONEWLAN_ACCESS_NONE 0 hfa384x.h No stations may be authenticated.
30079
 WLAN_ACCESS_ALLWLAN_ACCESS_ALL 1 hfa384x.h All stations may be authenticated.
30080
 WLAN_ACCESS_ALLOWWLAN_ACCESS_ALLOW 2 hfa384x.h Authenticate only "allowed" stations.
30081
 WLAN_ACCESS_DENYWLAN_ACCESS_DENY 3 hfa384x.h Do not authenticate "denied" stations.
30082
 hfa384x_getreghfa384x_getreg __hfa384x_getreg_noswap hfa384x.h 　
30083
 hfa384x_setreghfa384x_setreg __hfa384x_setreg_noswap hfa384x.h 　
30084
 hfa384x_getreg_noswaphfa384x_getreg_noswap __hfa384x_getreg hfa384x.h 　
30085
 hfa384x_setreg_noswaphfa384x_setreg_noswap __hfa384x_setreg hfa384x.h 　
30086
 hfa384x_getreghfa384x_getreg __hfa384x_getreg hfa384x.h 　
30087
 hfa384x_setreghfa384x_setreg __hfa384x_setreg hfa384x.h 　
30088
 hfa384x_getreg_noswaphfa384x_getreg_noswap __hfa384x_getreg_noswap hfa384x.h 　
30089
 hfa384x_setreg_noswaphfa384x_setreg_noswap __hfa384x_setreg_noswap hfa384x.h 　
30090
 MTNIC_MAX_PORTSMTNIC_MAX_PORTS 2 mtnic.h 　
30091
 MTNIC_PORT1MTNIC_PORT1 0 mtnic.h 　
30092
 MTNIC_PORT2MTNIC_PORT2 1 mtnic.h 　
30093
 NUM_TX_RINGSNUM_TX_RINGS 1 mtnic.h 　
30094
 NUM_RX_RINGSNUM_RX_RINGS 1 mtnic.h 　
30095
 NUM_CQSNUM_CQS (NUM_RX_RINGS + NUM_TX_RINGS) mtnic.h 　
30096
 GO_BIT_TIMEOUTGO_BIT_TIMEOUT 6000 mtnic.h 　
30097
 TBIT_RETRIESTBIT_RETRIES 100 mtnic.h 　
30098
 UNITS_BUFFER_SIZEUNITS_BUFFER_SIZE 8 mtnic.h can be configured to 4/8/16
30099
 MAX_GAP_PROD_CONSMAX_GAP_PROD_CONS ( UNITS_BUFFER_SIZE / 4 ) mtnic.h 　
30100
 ETH_DEF_LENETH_DEF_LEN 1540 mtnic.h 40 bytes used by the card
30101
 ETH_FCS_LENETH_FCS_LEN 14 mtnic.h 　
30102
 DEF_MTUDEF_MTU ETH_DEF_LEN + ETH_FCS_LEN mtnic.h 　
30103
 DEF_IOBUF_SIZEDEF_IOBUF_SIZE ETH_DEF_LEN mtnic.h 　
30104
 MAC_ADDRESS_SIZEMAC_ADDRESS_SIZE 6 mtnic.h 　
30105
 NUM_EQESNUM_EQES 16 mtnic.h 　
30106
 ROUND_TO_CHECKROUND_TO_CHECK 0x400 mtnic.h 　
30107
 DELAY_LINK_CHECKDELAY_LINK_CHECK 300 mtnic.h 　
30108
 CHECK_LINK_TIMESCHECK_LINK_TIMES 7 mtnic.h 　
30109
 dma_addr_tdma_addr_t unsigned long mtnic.h 　
30110
 PAGE_SIZEPAGE_SIZE 4096 mtnic.h 　
30111
 PAGE_MASKPAGE_MASK (PAGE_SIZE - 1) mtnic.h 　
30112
 MTNIC_MAILBOX_SIZEMTNIC_MAILBOX_SIZE PAGE_SIZE mtnic.h 　
30113
 MTNIC_RESET_OFFSETMTNIC_RESET_OFFSET 0xF0010 mtnic.h 　
30114
 MXGEFW_VERSION_MAJORMXGEFW_VERSION_MAJOR 1 myri10ge_mcp.h 　
30115
 MXGEFW_VERSION_MINORMXGEFW_VERSION_MINOR 4 myri10ge_mcp.h 　
30116
 MXGEFW_RSS_HASH_NULLMXGEFW_RSS_HASH_NULL (0 << 14) myri10ge_mcp.h bit 15:14 = 00
30117
 MXGEFW_RSS_HASH_IPV4MXGEFW_RSS_HASH_IPV4 (1 << 14) myri10ge_mcp.h bit 15:14 = 01
30118
 MXGEFW_RSS_HASH_TCP_IPV4MXGEFW_RSS_HASH_TCP_IPV4 (2 << 14) myri10ge_mcp.h bit 15:14 = 10
30119
 MXGEFW_RSS_HASH_MASKMXGEFW_RSS_HASH_MASK (3 << 14) myri10ge_mcp.h bit 15:14 = 11
30120
 MXGEFW_FLAGS_SMALLMXGEFW_FLAGS_SMALL 0x1 myri10ge_mcp.h 　
30121
 MXGEFW_FLAGS_TSO_HDRMXGEFW_FLAGS_TSO_HDR 0x1 myri10ge_mcp.h 　
30122
 MXGEFW_FLAGS_FIRSTMXGEFW_FLAGS_FIRST 0x2 myri10ge_mcp.h 　
30123
 MXGEFW_FLAGS_ALIGN_ODDMXGEFW_FLAGS_ALIGN_ODD 0x4 myri10ge_mcp.h 　
30124
 MXGEFW_FLAGS_CKSUMMXGEFW_FLAGS_CKSUM 0x8 myri10ge_mcp.h 　
30125
 MXGEFW_FLAGS_TSO_LASTMXGEFW_FLAGS_TSO_LAST 0x8 myri10ge_mcp.h 　
30126
 MXGEFW_FLAGS_NO_TSOMXGEFW_FLAGS_NO_TSO 0x10 myri10ge_mcp.h 　
30127
 MXGEFW_FLAGS_TSO_CHOPMXGEFW_FLAGS_TSO_CHOP 0x10 myri10ge_mcp.h 　
30128
 MXGEFW_FLAGS_TSO_PLDMXGEFW_FLAGS_TSO_PLD 0x20 myri10ge_mcp.h 　
30129
 MXGEFW_SEND_SMALL_SIZEMXGEFW_SEND_SMALL_SIZE 1520 myri10ge_mcp.h 　
30130
 MXGEFW_MAX_MTUMXGEFW_MAX_MTU 9400 myri10ge_mcp.h 　
30131
 MXGEFW_MAX_SEND_DESCMXGEFW_MAX_SEND_DESC 12 myri10ge_mcp.h 　
30132
 MXGEFW_PADMXGEFW_PAD 2 myri10ge_mcp.h 　
30133
 MXGEFW_BOOT_HANDOFFMXGEFW_BOOT_HANDOFF 0xfc0000 myri10ge_mcp.h 　
30134
 MXGEFW_BOOT_DUMMY_RDMAMXGEFW_BOOT_DUMMY_RDMA 0xfc01c0 myri10ge_mcp.h 　
30135
 MXGEFW_ETH_CMDMXGEFW_ETH_CMD 0xf80000 myri10ge_mcp.h 　
30136
 MXGEFW_ETH_SEND_4MXGEFW_ETH_SEND_4 0x200000 myri10ge_mcp.h 　
30137
 MXGEFW_ETH_SEND_1MXGEFW_ETH_SEND_1 0x240000 myri10ge_mcp.h 　
30138
 MXGEFW_ETH_SEND_2MXGEFW_ETH_SEND_2 0x280000 myri10ge_mcp.h 　
30139
 MXGEFW_ETH_SEND_3MXGEFW_ETH_SEND_3 0x2c0000 myri10ge_mcp.h 　
30140
 MXGEFW_ETH_RECV_SMALLMXGEFW_ETH_RECV_SMALL 0x300000 myri10ge_mcp.h 　
30141
 MXGEFW_ETH_RECV_BIGMXGEFW_ETH_RECV_BIG 0x340000 myri10ge_mcp.h 　
30142
 MXGEFW_ETH_SEND_GOMXGEFW_ETH_SEND_GO 0x380000 myri10ge_mcp.h 　
30143
 MXGEFW_ETH_SEND_STOPMXGEFW_ETH_SEND_STOP 0x3C0000 myri10ge_mcp.h 　
30144
 MXGEFW_OLD_IRQ_DATA_LENMXGEFW_OLD_IRQ_DATA_LEN 40 myri10ge_mcp.h 　
30145
 MXGEFW_NETQ_FILTERTYPE_NONEMXGEFW_NETQ_FILTERTYPE_NONE 0 myri10ge_mcp.h 　
30146
 MXGEFW_NETQ_FILTERTYPE_MACADDRMXGEFW_NETQ_FILTERTYPE_MACADDR 1 myri10ge_mcp.h 　
30147
 MXGEFW_NETQ_FILTERTYPE_VLANMXGEFW_NETQ_FILTERTYPE_VLAN 2 myri10ge_mcp.h 　
30148
 MXGEFW_NETQ_FILTERTYPE_VLANMACAMXGEFW_NETQ_FILTERTYPE_VLANMACA 3 myri10ge_mcp.h 　
30149
 NATSEMI_HW_TIMEOUTNATSEMI_HW_TIMEOUT 400 natsemi.h 　
30150
 TX_RING_SIZETX_RING_SIZE 4 natsemi.h 　
30151
 NUM_RX_DESCNUM_RX_DESC 4 natsemi.h 　
30152
 RX_BUF_SIZERX_BUF_SIZE 1536 natsemi.h 　
30153
 OWNOWN 0x80000000 natsemi.h 　
30154
 DSIZEDSIZE 0x00000FFF natsemi.h 　
30155
 CRC_SIZECRC_SIZE 4 natsemi.h 　
30156
 PHYID_AM79C874PHYID_AM79C874 0x0022561b natsemi.h 　
30157
 SRR_DP83815_CSRR_DP83815_C 0x0302 natsemi.h 　
30158
 SRR_DP83815_DSRR_DP83815_D 0x0403 natsemi.h 　
30159
 SRR_DP83816_A4SRR_DP83816_A4 0x0504 natsemi.h 　
30160
 SRR_DP83816_A5SRR_DP83816_A5 0x0505 natsemi.h 　
30161
 PMDCSR_VALPMDCSR_VAL 0x189c natsemi.h enable preferred adaptation circuitry
30162
 TSTDAT_VALTSTDAT_VAL 0x0 natsemi.h 　
30163
 DSPCFG_VALDSPCFG_VAL 0x5040 natsemi.h 　
30164
 SDCFG_VALSDCFG_VAL 0x008c natsemi.h set voltage thresholds for Signal Detect
30165
 DSPCFG_LOCKDSPCFG_LOCK 0x20 natsemi.h coefficient lock bit in DSPCFG
30166
 DSPCFG_COEFDSPCFG_COEF 0x1000 natsemi.h see coefficient (in TSTDAT) bit in DSPCFG
30167
 TSTDAT_FIXEDTSTDAT_FIXED 0xe8 natsemi.h magic number for bad coefficients
30168
 CFG_RESET_SAVECFG_RESET_SAVE 0xfde000 natsemi.h 　
30169
 WCSR_RESET_SAVEWCSR_RESET_SAVE 0x61f natsemi.h 　
30170
 RFCR_RESET_SAVERFCR_RESET_SAVE 0xf8500000; natsemi.h 　
30171
 EE_Write0EE_Write0 (EE_ChipSelect) natsemi.h 　
30172
 EE_Write1EE_Write1 (EE_ChipSelect | EE_DataIn) natsemi.h 　
30173
 EE_CSEE_CS 0x08 natsemi.h EEPROM chip select
30174
 EE_SKEE_SK 0x04 natsemi.h EEPROM shift clock
30175
 EE_DIEE_DI 0x01 natsemi.h Data in
30176
 EE_DOEE_DO 0x02 natsemi.h Data out
30177
 EE_MACEE_MAC 7 natsemi.h 　
30178
 EE_REGEE_REG EECtrl natsemi.h 　
30179
 VENDOR_NONEVENDOR_NONE 0 ns8390.h 　
30180
 VENDOR_WDVENDOR_WD 1 ns8390.h 　
30181
 VENDOR_NOVELLVENDOR_NOVELL 2 ns8390.h 　
30182
 VENDOR_3COMVENDOR_3COM 3 ns8390.h 　
30183
 FLAG_PIOFLAG_PIO 0x01 ns8390.h 　
30184
 FLAG_16BITFLAG_16BIT 0x02 ns8390.h 　
30185
 FLAG_790FLAG_790 0x04 ns8390.h 　
30186
 MEM_8192MEM_8192 32 ns8390.h 　
30187
 MEM_16384MEM_16384 64 ns8390.h 　
30188
 MEM_32768MEM_32768 128 ns8390.h 　
30189
 ISA_MAX_ADDRISA_MAX_ADDR 0x400 ns8390.h 　
30190
 WD_LOW_BASEWD_LOW_BASE 0x200 ns8390.h 　
30191
 WD_HIGH_BASEWD_HIGH_BASE 0x3e0 ns8390.h 　
30192
 WD_DEFAULT_MEMWD_DEFAULT_MEM 0xD0000 ns8390.h 　
30193
 WD_NIC_ADDRWD_NIC_ADDR 0x10 ns8390.h 　
30194
 WD_MSRWD_MSR 0x00 ns8390.h 　
30195
 WD_ICRWD_ICR 0x01 ns8390.h 　
30196
 WD_IARWD_IAR 0x02 ns8390.h 　
30197
 WD_BIOWD_BIO 0x03 ns8390.h 　
30198
 WD_IRRWD_IRR 0x04 ns8390.h 　
30199
 WD_LAARWD_LAAR 0x05 ns8390.h 　
30200
 WD_IJRWD_IJR 0x06 ns8390.h 　
30201
 WD_GP2WD_GP2 0x07 ns8390.h 　
30202
 WD_LARWD_LAR 0x08 ns8390.h 　
30203
 WD_BIDWD_BID 0x0E ns8390.h 　
30204
 WD_ICR_16BITWD_ICR_16BIT 0x01 ns8390.h 　
30205
 WD_MSR_MENBWD_MSR_MENB 0x40 ns8390.h 　
30206
 WD_LAAR_L16ENWD_LAAR_L16EN 0x40 ns8390.h 　
30207
 WD_LAAR_M16ENWD_LAAR_M16EN 0x80 ns8390.h 　
30208
 WD_SOFTCONFIGWD_SOFTCONFIG 0x20 ns8390.h 　
30209
 TYPE_WD8003STYPE_WD8003S 0x02 ns8390.h 　
30210
 TYPE_WD8003ETYPE_WD8003E 0x03 ns8390.h 　
30211
 TYPE_WD8013EBTTYPE_WD8013EBT 0x05 ns8390.h 　
30212
 TYPE_WD8003WTYPE_WD8003W 0x24 ns8390.h 　
30213
 TYPE_WD8003EBTYPE_WD8003EB 0x25 ns8390.h 　
30214
 TYPE_WD8013WTYPE_WD8013W 0x26 ns8390.h 　
30215
 TYPE_WD8013EPTYPE_WD8013EP 0x27 ns8390.h 　
30216
 TYPE_WD8013WCTYPE_WD8013WC 0x28 ns8390.h 　
30217
 TYPE_WD8013EPCTYPE_WD8013EPC 0x29 ns8390.h 　
30218
 TYPE_SMC8216TTYPE_SMC8216T 0x2a ns8390.h 　
30219
 TYPE_SMC8216CTYPE_SMC8216C 0x2b ns8390.h 　
30220
 TYPE_SMC8416TTYPE_SMC8416T 0x00 ns8390.h Bogus entries: the 8416 generates the
30221
 TYPE_SMC8416CTYPE_SMC8416C 0x00 ns8390.h the same codes as the 8216.
30222
 TYPE_SMC8013EBPTYPE_SMC8013EBP 0x2c ns8390.h 　
30223
 _3COM_BASE_3COM_BASE 0x300 ns8390.h 　
30224
 _3COM_TX_PAGE_OFFSET_8BIT_3COM_TX_PAGE_OFFSET_8BIT 0x20 ns8390.h 　
30225
 _3COM_TX_PAGE_OFFSET_16BIT_3COM_TX_PAGE_OFFSET_16BIT 0x0 ns8390.h 　
30226
 _3COM_RX_PAGE_OFFSET_16BIT_3COM_RX_PAGE_OFFSET_16BIT 0x20 ns8390.h 　
30227
 _3COM_ASIC_OFFSET_3COM_ASIC_OFFSET 0x400 ns8390.h 　
30228
 _3COM_NIC_OFFSET_3COM_NIC_OFFSET 0x0 ns8390.h 　
30229
 _3COM_PSTR_3COM_PSTR 0 ns8390.h 　
30230
 _3COM_PSPR_3COM_PSPR 1 ns8390.h 　
30231
 _3COM_BCFR_3COM_BCFR 3 ns8390.h 　
30232
 _3COM_BCFR_2E0_3COM_BCFR_2E0 0x01 ns8390.h 　
30233
 _3COM_BCFR_2A0_3COM_BCFR_2A0 0x02 ns8390.h 　
30234
 _3COM_BCFR_280_3COM_BCFR_280 0x04 ns8390.h 　
30235
 _3COM_BCFR_250_3COM_BCFR_250 0x08 ns8390.h 　
30236
 _3COM_BCFR_350_3COM_BCFR_350 0x10 ns8390.h 　
30237
 _3COM_BCFR_330_3COM_BCFR_330 0x20 ns8390.h 　
30238
 _3COM_BCFR_310_3COM_BCFR_310 0x40 ns8390.h 　
30239
 _3COM_BCFR_300_3COM_BCFR_300 0x80 ns8390.h 　
30240
 _3COM_PCFR_3COM_PCFR 4 ns8390.h 　
30241
 _3COM_PCFR_PIO_3COM_PCFR_PIO 0 ns8390.h 　
30242
 _3COM_PCFR_C8000_3COM_PCFR_C8000 0x10 ns8390.h 　
30243
 _3COM_PCFR_CC000_3COM_PCFR_CC000 0x20 ns8390.h 　
30244
 _3COM_PCFR_D8000_3COM_PCFR_D8000 0x40 ns8390.h 　
30245
 _3COM_PCFR_DC000_3COM_PCFR_DC000 0x80 ns8390.h 　
30246
 _3COM_CR_3COM_CR 6 ns8390.h 　
30247
 _3COM_CR_RST_3COM_CR_RST 0x01 ns8390.h Reset GA and NIC
30248
 _3COM_CR_XSEL_3COM_CR_XSEL 0x02 ns8390.h Transceiver select. BNC=1(def) AUI=0
30249
 _3COM_CR_EALO_3COM_CR_EALO 0x04 ns8390.h window EA PROM 0-15 to I/O base
30250
 _3COM_CR_EAHI_3COM_CR_EAHI 0x08 ns8390.h window EA PROM 16-31 to I/O base
30251
 _3COM_CR_SHARE_3COM_CR_SHARE 0x10 ns8390.h select interrupt sharing option
30252
 _3COM_CR_DBSEL_3COM_CR_DBSEL 0x20 ns8390.h Double buffer select
30253
 _3COM_CR_DDIR_3COM_CR_DDIR 0x40 ns8390.h DMA direction select
30254
 _3COM_CR_START_3COM_CR_START 0x80 ns8390.h Start DMA controller
30255
 _3COM_GACFR_3COM_GACFR 5 ns8390.h 　
30256
 _3COM_GACFR_MBS0_3COM_GACFR_MBS0 0x01 ns8390.h 　
30257
 _3COM_GACFR_MBS1_3COM_GACFR_MBS1 0x02 ns8390.h 　
30258
 _3COM_GACFR_MBS2_3COM_GACFR_MBS2 0x04 ns8390.h 　
30259
 _3COM_GACFR_RSEL_3COM_GACFR_RSEL 0x08 ns8390.h enable shared memory
30260
 _3COM_GACFR_TEST_3COM_GACFR_TEST 0x10 ns8390.h for GA testing
30261
 _3COM_GACFR_OWS_3COM_GACFR_OWS 0x20 ns8390.h select 0WS access to GA
30262
 _3COM_GACFR_TCM_3COM_GACFR_TCM 0x40 ns8390.h Mask DMA interrupts
30263
 _3COM_GACFR_NIM_3COM_GACFR_NIM 0x80 ns8390.h Mask NIC interrupts
30264
 _3COM_STREG_3COM_STREG 7 ns8390.h 　
30265
 _3COM_STREG_REV_3COM_STREG_REV 0x07 ns8390.h GA revision
30266
 _3COM_STREG_DIP_3COM_STREG_DIP 0x08 ns8390.h DMA in progress
30267
 _3COM_STREG_DTC_3COM_STREG_DTC 0x10 ns8390.h DMA terminal count
30268
 _3COM_STREG_OFLW_3COM_STREG_OFLW 0x20 ns8390.h Overflow
30269
 _3COM_STREG_UFLW_3COM_STREG_UFLW 0x40 ns8390.h Underflow
30270
 _3COM_STREG_DPRDY_3COM_STREG_DPRDY 0x80 ns8390.h Data port ready
30271
 _3COM_IDCFR_3COM_IDCFR 8 ns8390.h 　
30272
 _3COM_IDCFR_DRQ0_3COM_IDCFR_DRQ0 0x01 ns8390.h DMA request 1 select
30273
 _3COM_IDCFR_DRQ1_3COM_IDCFR_DRQ1 0x02 ns8390.h DMA request 2 select
30274
 _3COM_IDCFR_DRQ2_3COM_IDCFR_DRQ2 0x04 ns8390.h DMA request 3 select
30275
 _3COM_IDCFR_UNUSED_3COM_IDCFR_UNUSED 0x08 ns8390.h not used
30276
 _3COM_IDCFR_IRQ2_3COM_IDCFR_IRQ2 0x10 ns8390.h Interrupt request 2 select
30277
 _3COM_IDCFR_IRQ3_3COM_IDCFR_IRQ3 0x20 ns8390.h Interrupt request 3 select
30278
 _3COM_IDCFR_IRQ4_3COM_IDCFR_IRQ4 0x40 ns8390.h Interrupt request 4 select
30279
 _3COM_IDCFR_IRQ5_3COM_IDCFR_IRQ5 0x80 ns8390.h Interrupt request 5 select
30280
 _3COM_IRQ2_3COM_IRQ2 2 ns8390.h 　
30281
 _3COM_IRQ3_3COM_IRQ3 3 ns8390.h 　
30282
 _3COM_IRQ4_3COM_IRQ4 4 ns8390.h 　
30283
 _3COM_IRQ5_3COM_IRQ5 5 ns8390.h 　
30284
 _3COM_DAMSB_3COM_DAMSB 9 ns8390.h 　
30285
 _3COM_DALSB_3COM_DALSB 0x0a ns8390.h 　
30286
 _3COM_VPTR2_3COM_VPTR2 0x0b ns8390.h 　
30287
 _3COM_VPTR1_3COM_VPTR1 0x0c ns8390.h 　
30288
 _3COM_VPTR0_3COM_VPTR0 0x0d ns8390.h 　
30289
 _3COM_RFMSB_3COM_RFMSB 0x0e ns8390.h 　
30290
 _3COM_RFLSB_3COM_RFLSB 0x0f ns8390.h 　
30291
 NE_ASIC_OFFSETNE_ASIC_OFFSET 0x10 ns8390.h 　
30292
 NE_RESETNE_RESET 0x0F ns8390.h Used to reset card
30293
 NE_DATANE_DATA 0x00 ns8390.h Used to read/write NIC mem
30294
 COMPEX_RL2000_TRIESCOMPEX_RL2000_TRIES 200 ns8390.h 　
30295
 D8390_P0_COMMANDD8390_P0_COMMAND 0x00 ns8390.h 　
30296
 D8390_P0_PSTARTD8390_P0_PSTART 0x01 ns8390.h 　
30297
 D8390_P0_PSTOPD8390_P0_PSTOP 0x02 ns8390.h 　
30298
 D8390_P0_BOUNDD8390_P0_BOUND 0x03 ns8390.h 　
30299
 D8390_P0_TSRD8390_P0_TSR 0x04 ns8390.h 　
30300
 D8390_P0_TPSRD8390_P0_TPSR 0x04 ns8390.h 　
30301
 D8390_P0_TBCR0D8390_P0_TBCR0 0x05 ns8390.h 　
30302
 D8390_P0_TBCR1D8390_P0_TBCR1 0x06 ns8390.h 　
30303
 D8390_P0_ISRD8390_P0_ISR 0x07 ns8390.h 　
30304
 D8390_P0_RSAR0D8390_P0_RSAR0 0x08 ns8390.h 　
30305
 D8390_P0_RSAR1D8390_P0_RSAR1 0x09 ns8390.h 　
30306
 D8390_P0_RBCR0D8390_P0_RBCR0 0x0A ns8390.h 　
30307
 D8390_P0_RBCR1D8390_P0_RBCR1 0x0B ns8390.h 　
30308
 D8390_P0_RSRD8390_P0_RSR 0x0C ns8390.h 　
30309
 D8390_P0_RCRD8390_P0_RCR 0x0C ns8390.h 　
30310
 D8390_P0_TCRD8390_P0_TCR 0x0D ns8390.h 　
30311
 D8390_P0_DCRD8390_P0_DCR 0x0E ns8390.h 　
30312
 D8390_P0_IMRD8390_P0_IMR 0x0F ns8390.h 　
30313
 D8390_P1_COMMANDD8390_P1_COMMAND 0x00 ns8390.h 　
30314
 D8390_P1_PAR0D8390_P1_PAR0 0x01 ns8390.h 　
30315
 D8390_P1_PAR1D8390_P1_PAR1 0x02 ns8390.h 　
30316
 D8390_P1_PAR2D8390_P1_PAR2 0x03 ns8390.h 　
30317
 D8390_P1_PAR3D8390_P1_PAR3 0x04 ns8390.h 　
30318
 D8390_P1_PAR4D8390_P1_PAR4 0x05 ns8390.h 　
30319
 D8390_P1_PAR5D8390_P1_PAR5 0x06 ns8390.h 　
30320
 D8390_P1_CURRD8390_P1_CURR 0x07 ns8390.h 　
30321
 D8390_P1_MAR0D8390_P1_MAR0 0x08 ns8390.h 　
30322
 D8390_COMMAND_PS0D8390_COMMAND_PS0 0x0 ns8390.h Page 0 select
30323
 D8390_COMMAND_PS1D8390_COMMAND_PS1 0x40 ns8390.h Page 1 select
30324
 D8390_COMMAND_PS2D8390_COMMAND_PS2 0x80 ns8390.h Page 2 select
30325
 D8390_COMMAND_RD2D8390_COMMAND_RD2 0x20 ns8390.h Remote DMA control
30326
 D8390_COMMAND_RD1D8390_COMMAND_RD1 0x10 ns8390.h 　
30327
 D8390_COMMAND_RD0D8390_COMMAND_RD0 0x08 ns8390.h 　
30328
 D8390_COMMAND_TXPD8390_COMMAND_TXP 0x04 ns8390.h transmit packet
30329
 D8390_COMMAND_STAD8390_COMMAND_STA 0x02 ns8390.h start
30330
 D8390_COMMAND_STPD8390_COMMAND_STP 0x01 ns8390.h stop
30331
 D8390_RCR_MOND8390_RCR_MON 0x20 ns8390.h monitor mode
30332
 D8390_DCR_FT1D8390_DCR_FT1 0x40 ns8390.h 　
30333
 D8390_DCR_LSD8390_DCR_LS 0x08 ns8390.h Loopback select
30334
 D8390_DCR_WTSD8390_DCR_WTS 0x01 ns8390.h Word transfer select
30335
 D8390_ISR_PRXD8390_ISR_PRX 0x01 ns8390.h successful recv
30336
 D8390_ISR_PTXD8390_ISR_PTX 0x02 ns8390.h successful xmit
30337
 D8390_ISR_RXED8390_ISR_RXE 0x04 ns8390.h receive error
30338
 D8390_ISR_TXED8390_ISR_TXE 0x08 ns8390.h transmit error
30339
 D8390_ISR_OVWD8390_ISR_OVW 0x10 ns8390.h Overflow
30340
 D8390_ISR_CNTD8390_ISR_CNT 0x20 ns8390.h Counter overflow
30341
 D8390_ISR_RDCD8390_ISR_RDC 0x40 ns8390.h Remote DMA complete
30342
 D8390_ISR_RSTD8390_ISR_RST 0x80 ns8390.h reset
30343
 D8390_RSTAT_PRXD8390_RSTAT_PRX 0x01 ns8390.h successful recv
30344
 D8390_RSTAT_CRCD8390_RSTAT_CRC 0x02 ns8390.h CRC error
30345
 D8390_RSTAT_FAED8390_RSTAT_FAE 0x04 ns8390.h Frame alignment error
30346
 D8390_RSTAT_OVERD8390_RSTAT_OVER 0x08 ns8390.h FIFO overrun
30347
 D8390_TXBUF_SIZED8390_TXBUF_SIZE 6 ns8390.h 　
30348
 D8390_RXBUF_ENDD8390_RXBUF_END 32 ns8390.h 　
30349
 D8390_PAGE_SIZED8390_PAGE_SIZE 256 ns8390.h 　
30350
 WLAN_ADDR_LENWLAN_ADDR_LEN 6 p80211hdr.h 　
30351
 WLAN_CRC_LENWLAN_CRC_LEN 4 p80211hdr.h 　
30352
 WLAN_BSSID_LENWLAN_BSSID_LEN 6 p80211hdr.h 　
30353
 WLAN_BSS_TS_LENWLAN_BSS_TS_LEN 8 p80211hdr.h 　
30354
 WLAN_HDR_A3_LENWLAN_HDR_A3_LEN 24 p80211hdr.h 　
30355
 WLAN_HDR_A4_LENWLAN_HDR_A4_LEN 30 p80211hdr.h 　
30356
 WLAN_SSID_MAXLENWLAN_SSID_MAXLEN 32 p80211hdr.h 　
30357
 WLAN_DATA_MAXLENWLAN_DATA_MAXLEN 2312 p80211hdr.h 　
30358
 WLAN_A3FR_MAXLENWLAN_A3FR_MAXLEN (WLAN_HDR_A3_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN) p80211hdr.h 　
30359
 WLAN_A4FR_MAXLENWLAN_A4FR_MAXLEN (WLAN_HDR_A4_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN) p80211hdr.h 　
30360
 WLAN_BEACON_FR_MAXLENWLAN_BEACON_FR_MAXLEN (WLAN_HDR_A3_LEN + 334) p80211hdr.h 　
30361
 WLAN_ATIM_FR_MAXLENWLAN_ATIM_FR_MAXLEN (WLAN_HDR_A3_LEN + 0) p80211hdr.h 　
30362
 WLAN_DISASSOC_FR_MAXLENWLAN_DISASSOC_FR_MAXLEN (WLAN_HDR_A3_LEN + 2) p80211hdr.h 　
30363
 WLAN_ASSOCREQ_FR_MAXLENWLAN_ASSOCREQ_FR_MAXLEN (WLAN_HDR_A3_LEN + 48) p80211hdr.h 　
30364
 WLAN_ASSOCRESP_FR_MAXLENWLAN_ASSOCRESP_FR_MAXLEN (WLAN_HDR_A3_LEN + 16) p80211hdr.h 　
30365
 WLAN_REASSOCREQ_FR_MAXLENWLAN_REASSOCREQ_FR_MAXLEN (WLAN_HDR_A3_LEN + 54) p80211hdr.h 　
30366
 WLAN_REASSOCRESP_FR_MAXLENWLAN_REASSOCRESP_FR_MAXLEN (WLAN_HDR_A3_LEN + 16) p80211hdr.h 　
30367
 WLAN_PROBEREQ_FR_MAXLENWLAN_PROBEREQ_FR_MAXLEN (WLAN_HDR_A3_LEN + 44) p80211hdr.h 　
30368
 WLAN_PROBERESP_FR_MAXLENWLAN_PROBERESP_FR_MAXLEN (WLAN_HDR_A3_LEN + 78) p80211hdr.h 　
30369
 WLAN_AUTHEN_FR_MAXLENWLAN_AUTHEN_FR_MAXLEN (WLAN_HDR_A3_LEN + 261) p80211hdr.h 　
30370
 WLAN_DEAUTHEN_FR_MAXLENWLAN_DEAUTHEN_FR_MAXLEN (WLAN_HDR_A3_LEN + 2) p80211hdr.h 　
30371
 WLAN_WEP_NKEYSWLAN_WEP_NKEYS 4 p80211hdr.h 　
30372
 WLAN_WEP_MAXKEYLENWLAN_WEP_MAXKEYLEN 13 p80211hdr.h 　
30373
 WLAN_CHALLENGE_IE_LENWLAN_CHALLENGE_IE_LEN 130 p80211hdr.h 　
30374
 WLAN_CHALLENGE_LENWLAN_CHALLENGE_LEN 128 p80211hdr.h 　
30375
 WLAN_WEP_IV_LENWLAN_WEP_IV_LEN 4 p80211hdr.h 　
30376
 WLAN_WEP_ICV_LENWLAN_WEP_ICV_LEN 4 p80211hdr.h 　
30377
 WLAN_FTYPE_MGMTWLAN_FTYPE_MGMT 0x00 p80211hdr.h 　
30378
 WLAN_FTYPE_CTLWLAN_FTYPE_CTL 0x01 p80211hdr.h 　
30379
 WLAN_FTYPE_DATAWLAN_FTYPE_DATA 0x02 p80211hdr.h 　
30380
 WLAN_FSTYPE_ASSOCREQWLAN_FSTYPE_ASSOCREQ 0x00 p80211hdr.h 　
30381
 WLAN_FSTYPE_ASSOCRESPWLAN_FSTYPE_ASSOCRESP 0x01 p80211hdr.h 　
30382
 WLAN_FSTYPE_REASSOCREQWLAN_FSTYPE_REASSOCREQ 0x02 p80211hdr.h 　
30383
 WLAN_FSTYPE_REASSOCRESPWLAN_FSTYPE_REASSOCRESP 0x03 p80211hdr.h 　
30384
 WLAN_FSTYPE_PROBEREQWLAN_FSTYPE_PROBEREQ 0x04 p80211hdr.h 　
30385
 WLAN_FSTYPE_PROBERESPWLAN_FSTYPE_PROBERESP 0x05 p80211hdr.h 　
30386
 WLAN_FSTYPE_BEACONWLAN_FSTYPE_BEACON 0x08 p80211hdr.h 　
30387
 WLAN_FSTYPE_ATIMWLAN_FSTYPE_ATIM 0x09 p80211hdr.h 　
30388
 WLAN_FSTYPE_DISASSOCWLAN_FSTYPE_DISASSOC 0x0a p80211hdr.h 　
30389
 WLAN_FSTYPE_AUTHENWLAN_FSTYPE_AUTHEN 0x0b p80211hdr.h 　
30390
 WLAN_FSTYPE_DEAUTHENWLAN_FSTYPE_DEAUTHEN 0x0c p80211hdr.h 　
30391
 WLAN_FSTYPE_BLOCKACKREQWLAN_FSTYPE_BLOCKACKREQ 0x8 p80211hdr.h 　
30392
 WLAN_FSTYPE_BLOCKACKWLAN_FSTYPE_BLOCKACK 0x9 p80211hdr.h 　
30393
 WLAN_FSTYPE_PSPOLLWLAN_FSTYPE_PSPOLL 0x0a p80211hdr.h 　
30394
 WLAN_FSTYPE_RTSWLAN_FSTYPE_RTS 0x0b p80211hdr.h 　
30395
 WLAN_FSTYPE_CTSWLAN_FSTYPE_CTS 0x0c p80211hdr.h 　
30396
 WLAN_FSTYPE_ACKWLAN_FSTYPE_ACK 0x0d p80211hdr.h 　
30397
 WLAN_FSTYPE_CFENDWLAN_FSTYPE_CFEND 0x0e p80211hdr.h 　
30398
 WLAN_FSTYPE_CFENDCFACKWLAN_FSTYPE_CFENDCFACK 0x0f p80211hdr.h 　
30399
 WLAN_FSTYPE_DATAONLYWLAN_FSTYPE_DATAONLY 0x00 p80211hdr.h 　
30400
 WLAN_FSTYPE_DATA_CFACKWLAN_FSTYPE_DATA_CFACK 0x01 p80211hdr.h 　
30401
 WLAN_FSTYPE_DATA_CFPOLLWLAN_FSTYPE_DATA_CFPOLL 0x02 p80211hdr.h 　
30402
 WLAN_FSTYPE_DATA_CFACK_CFPOLLWLAN_FSTYPE_DATA_CFACK_CFPOLL 0x03 p80211hdr.h 　
30403
 WLAN_FSTYPE_NULLWLAN_FSTYPE_NULL 0x04 p80211hdr.h 　
30404
 WLAN_FSTYPE_CFACKWLAN_FSTYPE_CFACK 0x05 p80211hdr.h 　
30405
 WLAN_FSTYPE_CFPOLLWLAN_FSTYPE_CFPOLL 0x06 p80211hdr.h 　
30406
 WLAN_FSTYPE_CFACK_CFPOLLWLAN_FSTYPE_CFACK_CFPOLL 0x07 p80211hdr.h 　
30407
 WLAN_FCS_LENWLAN_FCS_LEN 4 p80211hdr.h 　
30408
 PNIC_PCI_VENDORPNIC_PCI_VENDOR 0xfefe pnic_api.h Hopefully these won't clash with
30409
 PNIC_PCI_DEVICEPNIC_PCI_DEVICE 0xefef pnic_api.h any real PCI device IDs.
30410
 PNIC_REG_CMDPNIC_REG_CMD 0x00 pnic_api.h Command register, 2 bytes, write only
30411
 PNIC_REG_STATPNIC_REG_STAT 0x00 pnic_api.h Status register, 2 bytes, read only
30412
 PNIC_REG_LENPNIC_REG_LEN 0x02 pnic_api.h Length register, 2 bytes, read-write
30413
 PNIC_REG_DATAPNIC_REG_DATA 0x04 pnic_api.h Data port, 1 byte, read-write
30414
 PNIC_MAX_REGPNIC_MAX_REG 0x04 pnic_api.h 　
30415
 PNIC_CMD_NOOPPNIC_CMD_NOOP 0x0000 pnic_api.h 　
30416
 PNIC_CMD_API_VERPNIC_CMD_API_VER 0x0001 pnic_api.h 　
30417
 PNIC_CMD_READ_MACPNIC_CMD_READ_MAC 0x0002 pnic_api.h 　
30418
 PNIC_CMD_RESETPNIC_CMD_RESET 0x0003 pnic_api.h 　
30419
 PNIC_CMD_XMITPNIC_CMD_XMIT 0x0004 pnic_api.h 　
30420
 PNIC_CMD_RECVPNIC_CMD_RECV 0x0005 pnic_api.h 　
30421
 PNIC_CMD_RECV_QLENPNIC_CMD_RECV_QLEN 0x0006 pnic_api.h 　
30422
 PNIC_CMD_MASK_IRQPNIC_CMD_MASK_IRQ 0x0007 pnic_api.h 　
30423
 PNIC_CMD_FORCE_IRQPNIC_CMD_FORCE_IRQ 0x0008 pnic_api.h 　
30424
 PNIC_STATUS_OKPNIC_STATUS_OK 0x4f4b pnic_api.h 'OK'
30425
 PNIC_STATUS_UNKNOWN_CMDPNIC_STATUS_UNKNOWN_CMD 0x3f3f pnic_api.h '??'
30426
 PNIC_API_VERSIONPNIC_API_VERSION 0x0101 pnic_api.h 1.1
30427
 PCI_EXP_DEVCTLPCI_EXP_DEVCTL 8 r8169.h Device Control
30428
 PCI_EXP_DEVCTL_READRQPCI_EXP_DEVCTL_READRQ 0x7000 r8169.h Max_Read_Request_Size
30429
 PCI_EXP_LNKCTLPCI_EXP_LNKCTL 16 r8169.h Link Control
30430
 PCI_EXP_LNKCTL_CLKREQ_ENPCI_EXP_LNKCTL_CLKREQ_EN 0x100 r8169.h Enable clkreq
30431
 PCI_EXP_DEVCTL_NOSNOOP_ENPCI_EXP_DEVCTL_NOSNOOP_EN 0x0800 r8169.h Enable No Snoop
30432
 SPEED_10SPEED_10 10 r8169.h 　
30433
 SPEED_100SPEED_100 100 r8169.h 　
30434
 SPEED_1000SPEED_1000 1000 r8169.h 　
30435
 SPEED_2500SPEED_2500 2500 r8169.h 　
30436
 SPEED_10000SPEED_10000 10000 r8169.h 　
30437
 DUPLEX_HALFDUPLEX_HALF 0x00 r8169.h 　
30438
 DUPLEX_FULLDUPLEX_FULL 0x01 r8169.h 　
30439
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 r8169.h 　
30440
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 r8169.h 　
30441
 MAC_ADDR_LENMAC_ADDR_LEN 6 r8169.h 　
30442
 MAX_READ_REQUEST_SHIFTMAX_READ_REQUEST_SHIFT 12 r8169.h 　
30443
 RX_FIFO_THRESHRX_FIFO_THRESH 7 r8169.h 7 means NO threshold, Rx buffer level before first PCI xfer.
30444
 RX_DMA_BURSTRX_DMA_BURST 6 r8169.h Maximum PCI burst, '6' is 1024
30445
 TX_DMA_BURSTTX_DMA_BURST 6 r8169.h Maximum PCI burst, '6' is 1024
30446
 EarlyTxThldEarlyTxThld 0x3F r8169.h 0x3F means NO early transmit
30447
 RxPacketMaxSizeRxPacketMaxSize 0x3FE8 r8169.h 16K - 1 - ETH_HLEN - VLAN - CRC...
30448
 SafeMtuSafeMtu 0x1c20 r8169.h ... actually life sucks beyond ~7k
30449
 InterFrameGapInterFrameGap 0x03 r8169.h 3 means InterFrameGap = the shortest one
30450
 R8169_REGS_SIZER8169_REGS_SIZE 256 r8169.h 　
30451
 R8169_NAPI_WEIGHTR8169_NAPI_WEIGHT 64 r8169.h 　
30452
 NUM_TX_DESCNUM_TX_DESC 8 r8169.h Number of Tx descriptor registers
30453
 NUM_RX_DESCNUM_RX_DESC 8 r8169.h Number of Rx descriptor registers
30454
 RX_BUF_SIZERX_BUF_SIZE 1536 r8169.h Rx Buffer size
30455
 R8169_TX_RING_BYTESR8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) r8169.h 　
30456
 R8169_RX_RING_BYTESR8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) r8169.h 　
30457
 TX_RING_ALIGNTX_RING_ALIGN 256 r8169.h 　
30458
 RX_RING_ALIGNRX_RING_ALIGN 256 r8169.h 　
30459
 RTL8169_TX_TIMEOUTRTL8169_TX_TIMEOUT (6*HZ) r8169.h 　
30460
 RTL8169_PHY_TIMEOUTRTL8169_PHY_TIMEOUT (10*HZ) r8169.h 　
30461
 RTL_EEPROM_SIGRTL_EEPROM_SIG cpu_to_le32(0x8129) r8169.h 　
30462
 RTL_EEPROM_SIG_MASKRTL_EEPROM_SIG_MASK cpu_to_le32(0xffff) r8169.h 　
30463
 RTL_EEPROM_SIG_ADDRRTL_EEPROM_SIG_ADDR 0x0000 r8169.h 　
30464
 RsvdMaskRsvdMask 0x3fffc000 r8169.h 　
30465
 PCI_VENDOR_ID_SIPCI_VENDOR_ID_SI 0x1039 sis190.h 　
30466
 PHY_MAX_ADDRPHY_MAX_ADDR 32 sis190.h 　
30467
 PHY_ID_ANYPHY_ID_ANY 0x1f sis190.h 　
30468
 MII_REG_ANYMII_REG_ANY 0x1f sis190.h 　
30469
 DRV_VERSIONDRV_VERSION "1.3" sis190.h 　
30470
 DRV_NAMEDRV_NAME "sis190" sis190.h 　
30471
 SIS190_DRIVER_NAMESIS190_DRIVER_NAME DRV_NAME " Gigabit Ethernet driver " DRV_VERSION sis190.h 　
30472
 PFXPFX DRV_NAME ": " sis190.h 　
30473
 NUM_TX_DESCNUM_TX_DESC 8 sis190.h [8..1024]
30474
 NUM_RX_DESCNUM_RX_DESC 8 sis190.h [8..8192]
30475
 TX_RING_BYTESTX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) sis190.h 　
30476
 RX_RING_BYTESRX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) sis190.h 　
30477
 RX_BUF_SIZERX_BUF_SIZE 1536 sis190.h 　
30478
 RX_BUF_MASKRX_BUF_MASK 0xfff8 sis190.h 　
30479
 RING_ALIGNMENTRING_ALIGNMENT 256 sis190.h 　
30480
 SIS190_REGS_SIZESIS190_REGS_SIZE 0x80 sis190.h 　
30481
 EhnMIIreadEhnMIIread 0x0000 sis190.h 　
30482
 EhnMIIwriteEhnMIIwrite 0x0020 sis190.h 　
30483
 EhnMIIdataShiftEhnMIIdataShift 16 sis190.h 　
30484
 EhnMIIpmdShiftEhnMIIpmdShift 6 sis190.h 7016 only
30485
 EhnMIIregShiftEhnMIIregShift 11 sis190.h 　
30486
 EhnMIIreqEhnMIIreq 0x0010 sis190.h 　
30487
 EhnMIInotDoneEhnMIInotDone 0x0010 sis190.h 　
30488
 SIS900_TOTAL_SIZESIS900_TOTAL_SIZE 0x100 sis900.h 　
30489
 MAX_DMA_RANGEMAX_DMA_RANGE 7 sis900.h actually 0 means MAXIMUM !!
30490
 TxMXDMA_shiftTxMXDMA_shift 20 sis900.h 　
30491
 RxMXDMA_shiftRxMXDMA_shift 20 sis900.h 　
30492
 TX_DMA_BURSTTX_DMA_BURST 0 sis900.h 　
30493
 RX_DMA_BURSTRX_DMA_BURST 0 sis900.h 　
30494
 TX_FILL_THRESHTX_FILL_THRESH 16 sis900.h 1/4 FIFO size
30495
 TxFILLT_shiftTxFILLT_shift 8 sis900.h 　
30496
 TxDRNT_shiftTxDRNT_shift 0 sis900.h 　
30497
 TxDRNT_100TxDRNT_100 48 sis900.h 3/4 FIFO size
30498
 TxDRNT_10TxDRNT_10 16 sis900.h 1/2 FIFO size
30499
 RxDRNT_shiftRxDRNT_shift 1 sis900.h 　
30500
 RxDRNT_100RxDRNT_100 16 sis900.h 1/2 FIFO size
30501
 RxDRNT_10RxDRNT_10 24 sis900.h 3/4 FIFO size
30502
 RFAA_shiftRFAA_shift 28 sis900.h 　
30503
 RFADDR_shiftRFADDR_shift 16 sis900.h 　
30504
 MIIreadMIIread 0x6000 sis900.h 　
30505
 MIIwriteMIIwrite 0x5002 sis900.h 　
30506
 MIIpmdShiftMIIpmdShift 7 sis900.h 　
30507
 MIIregShiftMIIregShift 2 sis900.h 　
30508
 MIIcmdLenMIIcmdLen 16 sis900.h 　
30509
 MIIcmdShiftMIIcmdShift 16 sis900.h 　
30510
 MII_ID1_OUI_LOMII_ID1_OUI_LO 0xFC00 sis900.h low bits of OUI mask
30511
 MII_ID1_MODELMII_ID1_MODEL 0x03F0 sis900.h model number
30512
 MII_ID1_REVMII_ID1_REV 0x000F sis900.h model number
30513
 FDX_CAPABLE_DUPLEX_UNKNOWNFDX_CAPABLE_DUPLEX_UNKNOWN 0 sis900.h 　
30514
 FDX_CAPABLE_HALF_SELECTEDFDX_CAPABLE_HALF_SELECTED 1 sis900.h 　
30515
 FDX_CAPABLE_FULL_SELECTEDFDX_CAPABLE_FULL_SELECTED 2 sis900.h 　
30516
 HW_SPEED_UNCONFIGHW_SPEED_UNCONFIG 0 sis900.h 　
30517
 HW_SPEED_HOMEHW_SPEED_HOME 1 sis900.h 　
30518
 HW_SPEED_10_MBPSHW_SPEED_10_MBPS 10 sis900.h 　
30519
 HW_SPEED_100_MBPSHW_SPEED_100_MBPS 100 sis900.h 　
30520
 HW_SPEED_DEFAULTHW_SPEED_DEFAULT (HW_SPEED_100_MBPS) sis900.h 　
30521
 CRC_SIZECRC_SIZE 4 sis900.h 　
30522
 MAC_HEADER_SIZEMAC_HEADER_SIZE 14 sis900.h 　
30523
 TX_BUF_SIZETX_BUF_SIZE 1536 sis900.h 　
30524
 RX_BUF_SIZERX_BUF_SIZE 1536 sis900.h 　
30525
 NUM_RX_DESCNUM_RX_DESC 4 sis900.h Number of Rx descriptor registers.
30526
 TX_TIMEOUTTX_TIMEOUT (4*TICKS_PER_SEC) sis900.h 　
30527
 PCI_DEV_REG1PCI_DEV_REG1 0x40 skge.h 　
30528
 PCI_PHY_COMAPCI_PHY_COMA 0x8000000 skge.h 　
30529
 PCI_VIOPCI_VIO 0x2000000 skge.h 　
30530
 PCI_DEV_REG2PCI_DEV_REG2 0x44 skge.h 　
30531
 PCI_VPD_ROM_SZPCI_VPD_ROM_SZ 7L<<14 skge.h VPD ROM size 0=256, 1=512, ...
30532
 PCI_REV_DESCPCI_REV_DESC 1<<2 skge.h Reverse Descriptor bytes
30533
 DRV_NAMEDRV_NAME "skge" skge.h 　
30534
 DRV_VERSIONDRV_VERSION "1.13" skge.h 　
30535
 PFXPFX DRV_NAME " " skge.h 　
30536
 NUM_TX_DESCNUM_TX_DESC 8 skge.h 　
30537
 NUM_RX_DESCNUM_RX_DESC 8 skge.h 　
30538
 SKGE_RING_ALIGNSKGE_RING_ALIGN 8 skge.h 　
30539
 RX_BUF_SIZERX_BUF_SIZE 1536 skge.h 　
30540
 PHY_RETRIESPHY_RETRIES 1000 skge.h 　
30541
 TX_RING_SIZETX_RING_SIZE ( NUM_TX_DESC * sizeof ( struct skge_rx_desc ) ) skge.h 　
30542
 RX_RING_SIZERX_RING_SIZE ( NUM_RX_DESC * sizeof ( struct skge_tx_desc ) ) skge.h 　
30543
 RING_SIZERING_SIZE ( TX_RING_SIZE + RX_RING_SIZE ) skge.h 　
30544
 SKGE_REG_SIZESKGE_REG_SIZE 0x4000 skge.h 　
30545
 SKGE_EEPROM_MAGICSKGE_EEPROM_MAGIC 0x9933aabb skge.h 　
30546
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 skge.h 　
30547
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 skge.h 　
30548
 DUPLEX_HALFDUPLEX_HALF 0x00 skge.h 　
30549
 DUPLEX_FULLDUPLEX_FULL 0x01 skge.h 　
30550
 SPEED_10SPEED_10 10 skge.h 　
30551
 SPEED_100SPEED_100 100 skge.h 　
30552
 SPEED_1000SPEED_1000 1000 skge.h 　
30553
 ADVERTISED_10baseT_HalfADVERTISED_10baseT_Half (1 << 0) skge.h 　
30554
 ADVERTISED_10baseT_FullADVERTISED_10baseT_Full (1 << 1) skge.h 　
30555
 ADVERTISED_100baseT_HalfADVERTISED_100baseT_Half (1 << 2) skge.h 　
30556
 ADVERTISED_100baseT_FullADVERTISED_100baseT_Full (1 << 3) skge.h 　
30557
 ADVERTISED_1000baseT_HalfADVERTISED_1000baseT_Half (1 << 4) skge.h 　
30558
 ADVERTISED_1000baseT_FullADVERTISED_1000baseT_Full (1 << 5) skge.h 　
30559
 SUPPORTED_10baseT_HalfSUPPORTED_10baseT_Half (1 << 0) skge.h 　
30560
 SUPPORTED_10baseT_FullSUPPORTED_10baseT_Full (1 << 1) skge.h 　
30561
 SUPPORTED_100baseT_HalfSUPPORTED_100baseT_Half (1 << 2) skge.h 　
30562
 SUPPORTED_100baseT_FullSUPPORTED_100baseT_Full (1 << 3) skge.h 　
30563
 SUPPORTED_1000baseT_HalfSUPPORTED_1000baseT_Half (1 << 4) skge.h 　
30564
 SUPPORTED_1000baseT_FullSUPPORTED_1000baseT_Full (1 << 5) skge.h 　
30565
 SUPPORTED_AutonegSUPPORTED_Autoneg (1 << 6) skge.h 　
30566
 SUPPORTED_TPSUPPORTED_TP (1 << 7) skge.h 　
30567
 SUPPORTED_FIBRESUPPORTED_FIBRE (1 << 10) skge.h 　
30568
 PCI_STATUS_ERROR_BITSPCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \ PCI_STATUS_SIG_SYSTEM_ERROR | \ PCI_STATUS_REC_MASTER_ABORT | \ PCI_STATUS_REC_TARGET_ABORT | \ skge.h 　
30569
 RAM_ADR_RANRAM_ADR_RAN 0x0007ffffL skge.h Bit 18.. 0: RAM Address Range
30570
 SK_MAC_TO_53SK_MAC_TO_53 72 skge.h MAC arbiter timeout
30571
 SK_PKT_TO_53SK_PKT_TO_53 0x2000 skge.h Packet arbiter timeout
30572
 SK_PKT_TO_MAXSK_PKT_TO_MAX 0xffff skge.h Maximum value
30573
 SK_RI_TO_53SK_RI_TO_53 36 skge.h RAM interface timeout
30574
 PA_ENA_TO_ALLPA_ENA_TO_ALL (PA_ENA_TO_RX1 | PA_ENA_TO_RX2 |\ PA_ENA_TO_TX1 | PA_ENA_TO_TX2) skge.h 　
30575
 TXA_MAX_VALTXA_MAX_VAL 0x00ffffffUL skge.h Bit 23.. 0: Max TXA Timer/Cnt Val
30576
 CSR_SET_RESETCSR_SET_RESET (CSR_DESC_SET | CSR_FIFO_SET | CSR_HPI_RST |\ CSR_SV_RST | CSR_DREAD_RST | CSR_DWRITE_RST |\ CSR_TRANS_RST) skge.h 　
30577
 CSR_CLR_RESETCSR_CLR_RESET (CSR_DESC_CLR | CSR_FIFO_CLR | CSR_HPI_RUN |\ CSR_SV_RUN | CSR_DREAD_RUN | CSR_DWRITE_RUN |\ CSR_TRANS_RUN) skge.h 　
30578
 RB_MSKRB_MSK 0x0007ffff skge.h Bit 18.. 0: RAM Buffer Pointer Bits
30579
 SK_XMIT_DURSK_XMIT_DUR 0x002faf08UL skge.h 50 ms
30580
 SK_BLK_DURSK_BLK_DUR 0x01dcd650UL skge.h 500 ms
30581
 SK_DPOLL_DEFSK_DPOLL_DEF 0x00ee6b28UL skge.h 250 ms at 62.5 MHz
30582
 SK_DPOLL_MAXSK_DPOLL_MAX 0x00ffffffUL skge.h 268 ms at 62.5 MHz
30583
 SK_FACT_62SK_FACT_62 100 skge.h is given in percent
30584
 SK_FACT_53SK_FACT_53 85 skge.h on GENESIS: 53.12 MHz
30585
 SK_FACT_78SK_FACT_78 125 skge.h on YUKON: 78.12 MHz
30586
 PHY_B_AS_PAUSE_MSKPHY_B_AS_PAUSE_MSK (PHY_B_AS_PRR | PHY_B_AS_PRT) skge.h 　
30587
 PHY_B_DEF_MSKPHY_B_DEF_MSK (~(PHY_B_IS_PSE | PHY_B_IS_AN_PR | PHY_B_IS_DUP_CHANGE | \ PHY_B_IS_LSP_CHANGE | PHY_B_IS_LST_CHANGE)) skge.h 　
30588
 PHY_M_PS_PAUSE_MSKPHY_M_PS_PAUSE_MSK (PHY_M_PS_TX_P_EN | PHY_M_PS_RX_P_EN) skge.h 　
30589
 GM_MIB_CNT_BASEGM_MIB_CNT_BASE 0x0100 skge.h Base Address of MIB Counters
30590
 GM_MIB_CNT_SIZEGM_MIB_CNT_SIZE 44 skge.h Number of MIB Counters
30591
 GM_GPCR_SPEED_1000GM_GPCR_SPEED_1000 (GM_GPCR_GIGS_ENA | GM_GPCR_SPEED_100) skge.h 　
30592
 GM_GPCR_AU_ALL_DISGM_GPCR_AU_ALL_DIS (GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS|GM_GPCR_AU_SPD_DIS) skge.h 　
30593
 TX_COL_DEFTX_COL_DEF 0x04 skge.h late collision after 64 byte
30594
 DATA_BLIND_DEFDATA_BLIND_DEF 0x04 skge.h 　
30595
 IPG_DATA_DEFIPG_DATA_DEF 0x1e skge.h 　
30596
 GPC_HWCFG_GMII_COPGPC_HWCFG_GMII_COP (GPC_HWCFG_M_3|GPC_HWCFG_M_2 | GPC_HWCFG_M_1 | GPC_HWCFG_M_0) skge.h 　
30597
 GPC_HWCFG_GMII_FIBGPC_HWCFG_GMII_FIB (GPC_HWCFG_M_2 | GPC_HWCFG_M_1 | GPC_HWCFG_M_0) skge.h 　
30598
 GPC_ANEG_ADV_ALL_MGPC_ANEG_ADV_ALL_M (GPC_ANEG_3 | GPC_ANEG_2 | GPC_ANEG_1 | GPC_ANEG_0) skge.h 　
30599
 GPC_FRC10MBIT_HALFGPC_FRC10MBIT_HALF 0 skge.h 　
30600
 GPC_FRC10MBIT_FULLGPC_FRC10MBIT_FULL GPC_ANEG_0 skge.h 　
30601
 GPC_FRC100MBIT_HALFGPC_FRC100MBIT_HALF GPC_ANEG_1 skge.h 　
30602
 GPC_FRC100MBIT_FULLGPC_FRC100MBIT_FULL (GPC_ANEG_0 | GPC_ANEG_1) skge.h 　
30603
 GPC_ADV_1000_HALFGPC_ADV_1000_HALF GPC_ANEG_2 skge.h 　
30604
 GPC_ADV_1000_FULLGPC_ADV_1000_FULL GPC_ANEG_3 skge.h 　
30605
 GPC_ADV_ALLGPC_ADV_ALL (GPC_ANEG_2 | GPC_ANEG_3) skge.h 　
30606
 GPC_FORCE_MASTERGPC_FORCE_MASTER 0 skge.h 　
30607
 GPC_FORCE_SLAVEGPC_FORCE_SLAVE GPC_ANEG_0 skge.h 　
30608
 GPC_PREF_MASTERGPC_PREF_MASTER GPC_ANEG_1 skge.h 　
30609
 GPC_PREF_SLAVEGPC_PREF_SLAVE (GPC_ANEG_1 | GPC_ANEG_0) skge.h 　
30610
 WOL_CTL_DEFAULTWOL_CTL_DEFAULT (WOL_CTL_DIS_PME_ON_LINK_CHG | \ WOL_CTL_DIS_PME_ON_PATTERN | \ WOL_CTL_DIS_PME_ON_MAGIC_PKT | \ WOL_CTL_DIS_LINK_CHG_UNIT | skge.h 　
30611
 XM_RT_LIM_MSKXM_RT_LIM_MSK 0x1f skge.h Bit 4..0: Tx Retry Limit
30612
 XM_STIME_MSKXM_STIME_MSK 0x7f skge.h Bit 6..0: Tx Slottime bits
30613
 XM_IPG_MSKXM_IPG_MSK 0xff skge.h Bit 7..0: IPG value bits
30614
 XM_TX_WM_MSKXM_TX_WM_MSK 0x01ff skge.h Bit 9.. 0 Tx FIFO Watermark bits
30615
 XM_THR_MSKXM_THR_MSK 0x03ff skge.h Bit 10.. 0 Rx/Tx Request Threshold bits
30616
 XM_RX_WM_MSKXM_RX_WM_MSK 0x03ff skge.h Bit 11.. 0: Rx FIFO Watermark bits
30617
 XM_DEV_OUIXM_DEV_OUI (0x00ffffffUL<<8) skge.h Bit 31..8: Device OUI
30618
 XM_DEV_REVXM_DEV_REV (0x07L << 5) skge.h Bit 7..5: Chip Rev Num
30619
 XM_PAUSE_MODEXM_PAUSE_MODE (XM_MD_SPOE_E | XM_MD_SPOL_I | XM_MD_SPOH_I) skge.h 　
30620
 XM_DEF_MODEXM_DEF_MODE (XM_MD_RX_RUNT | XM_MD_RX_IRLE | XM_MD_RX_LONG |\ XM_MD_RX_CRCE | XM_MD_RX_ERR | XM_MD_CSA) skge.h 　
30621
 XMR_DEF_MSKXMR_DEF_MSK (XMR_OK_LO_OV | XMR_OK_HI_OV) skge.h 　
30622
 XMT_DEF_MSKXMT_DEF_MSK (XMT_OK_LO_OV | XMT_OK_HI_OV) skge.h 　
30623
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 sky2.h 　
30624
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 sky2.h 　
30625
 DUPLEX_HALFDUPLEX_HALF 0x00 sky2.h 　
30626
 DUPLEX_FULLDUPLEX_FULL 0x01 sky2.h 　
30627
 SPEED_10SPEED_10 10 sky2.h 　
30628
 SPEED_100SPEED_100 100 sky2.h 　
30629
 SPEED_1000SPEED_1000 1000 sky2.h 　
30630
 ADVERTISED_10baseT_HalfADVERTISED_10baseT_Half (1 << 0) sky2.h 　
30631
 ADVERTISED_10baseT_FullADVERTISED_10baseT_Full (1 << 1) sky2.h 　
30632
 ADVERTISED_100baseT_HalfADVERTISED_100baseT_Half (1 << 2) sky2.h 　
30633
 ADVERTISED_100baseT_FullADVERTISED_100baseT_Full (1 << 3) sky2.h 　
30634
 ADVERTISED_1000baseT_HalfADVERTISED_1000baseT_Half (1 << 4) sky2.h 　
30635
 ADVERTISED_1000baseT_FullADVERTISED_1000baseT_Full (1 << 5) sky2.h 　
30636
 SUPPORTED_10baseT_HalfSUPPORTED_10baseT_Half (1 << 0) sky2.h 　
30637
 SUPPORTED_10baseT_FullSUPPORTED_10baseT_Full (1 << 1) sky2.h 　
30638
 SUPPORTED_100baseT_HalfSUPPORTED_100baseT_Half (1 << 2) sky2.h 　
30639
 SUPPORTED_100baseT_FullSUPPORTED_100baseT_Full (1 << 3) sky2.h 　
30640
 SUPPORTED_1000baseT_HalfSUPPORTED_1000baseT_Half (1 << 4) sky2.h 　
30641
 SUPPORTED_1000baseT_FullSUPPORTED_1000baseT_Full (1 << 5) sky2.h 　
30642
 SUPPORTED_AutonegSUPPORTED_Autoneg (1 << 6) sky2.h 　
30643
 SUPPORTED_TPSUPPORTED_TP (1 << 7) sky2.h 　
30644
 SUPPORTED_FIBRESUPPORTED_FIBRE (1 << 10) sky2.h 　
30645
 PCI_STATUS_ERROR_BITSPCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \ PCI_STATUS_SIG_SYSTEM_ERROR | \ PCI_STATUS_REC_MASTER_ABORT | \ PCI_STATUS_REC_TARGET_ABORT | \ sky2.h 　
30646
 CFG_DUAL_MAC_MSKCFG_DUAL_MAC_MSK (CFG_LINK_2_AVAIL | CFG_LINK_1_AVAIL) sky2.h 　
30647
 RAM_ADR_RANRAM_ADR_RAN 0x0007ffffL sky2.h Bit 18.. 0: RAM Address Range
30648
 SK_RI_TO_53SK_RI_TO_53 36 sky2.h RAM interface timeout
30649
 TXA_MAX_VALTXA_MAX_VAL 0x00ffffffUL sky2.h Bit 23.. 0: Max TXA Timer/Cnt Val
30650
 RB_MSKRB_MSK 0x0007ffff sky2.h Bit 18.. 0: RAM Buffer Pointer Bits
30651
 PHY_M_PS_PAUSE_MSKPHY_M_PS_PAUSE_MSK (PHY_M_PS_TX_P_EN | PHY_M_PS_RX_P_EN) sky2.h 　
30652
 GM_GPCR_SPEED_1000GM_GPCR_SPEED_1000 (GM_GPCR_GIGS_ENA | GM_GPCR_SPEED_100) sky2.h 　
30653
 GM_GPCR_AU_ALL_DISGM_GPCR_AU_ALL_DIS (GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS|GM_GPCR_AU_SPD_DIS) sky2.h 　
30654
 TX_COL_DEFTX_COL_DEF 0x04 sky2.h 　
30655
 DATA_BLIND_DEFDATA_BLIND_DEF 0x04 sky2.h 　
30656
 IPG_DATA_DEFIPG_DATA_DEF 0x1e sky2.h 　
30657
 GM_PHY_RETRIESGM_PHY_RETRIES 100 sky2.h 　
30658
 BANK_SELECTBANK_SELECT 14 smc9000.h 　
30659
 TCRTCR 0 smc9000.h transmit control register
30660
 TCR_ENABLETCR_ENABLE 0x0001 smc9000.h if this is 1, we can transmit
30661
 TCR_FDUPLXTCR_FDUPLX 0x0800 smc9000.h receive packets sent out
30662
 TCR_STP_SQETTCR_STP_SQET 0x1000 smc9000.h stop transmitting if Signal quality error
30663
 TCR_MON_CNSTCR_MON_CNS 0x0400 smc9000.h monitors the carrier status
30664
 TCR_PAD_ENABLETCR_PAD_ENABLE 0x0080 smc9000.h pads short packets to 64 bytes
30665
 TCR_CLEARTCR_CLEAR 0 smc9000.h do NOTHING
30666
 TCR_NORMALTCR_NORMAL (TCR_ENABLE | TCR_PAD_ENABLE) smc9000.h 　
30667
 EPH_STATUSEPH_STATUS 2 smc9000.h 　
30668
 ES_LINK_OKES_LINK_OK 0x4000 smc9000.h is the link integrity ok ?
30669
 RCRRCR 4 smc9000.h 　
30670
 RCR_SOFTRESETRCR_SOFTRESET 0x8000 smc9000.h resets the chip
30671
 RCR_STRIP_CRCRCR_STRIP_CRC 0x200 smc9000.h strips CRC
30672
 RCR_ENABLERCR_ENABLE 0x100 smc9000.h IFF this is set, we can receive packets
30673
 RCR_ALMULRCR_ALMUL 0x4 smc9000.h receive all multicast packets
30674
 RCR_PROMISCRCR_PROMISC 0x2 smc9000.h enable promiscuous mode
30675
 RCR_NORMALRCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE) smc9000.h 　
30676
 RCR_CLEARRCR_CLEAR 0x0 smc9000.h set it to a base state
30677
 COUNTERCOUNTER 6 smc9000.h 　
30678
 MIRMIR 8 smc9000.h 　
30679
 MCRMCR 10 smc9000.h 　
30680
 RPC_REGRPC_REG 0x000A smc9000.h 　
30681
 RPC_SPEEDRPC_SPEED 0x2000 smc9000.h When 1 PHY is in 100Mbps mode.
30682
 RPC_DPLXRPC_DPLX 0x1000 smc9000.h When 1 PHY is in Full-Duplex Mode
30683
 RPC_ANEGRPC_ANEG 0x0800 smc9000.h When 1 PHY is in Auto-Negotiate Mode
30684
 RPC_LSXA_SHFTRPC_LSXA_SHFT 5 smc9000.h Bits to shift LS2A,LS1A,LS0A to lsb
30685
 RPC_LSXB_SHFTRPC_LSXB_SHFT 2 smc9000.h Bits to get LS2B,LS1B,LS0B to lsb
30686
 RPC_LED_100_10RPC_LED_100_10 (0x00) smc9000.h LED = 100Mbps OR's with 10Mbps link detect
30687
 RPC_LED_RESRPC_LED_RES (0x01) smc9000.h LED = Reserved
30688
 RPC_LED_10RPC_LED_10 (0x02) smc9000.h LED = 10Mbps link detect
30689
 RPC_LED_FDRPC_LED_FD (0x03) smc9000.h LED = Full Duplex Mode
30690
 RPC_LED_TX_RXRPC_LED_TX_RX (0x04) smc9000.h LED = TX or RX packet occurred
30691
 RPC_LED_100RPC_LED_100 (0x05) smc9000.h LED = 100Mbps link dectect
30692
 RPC_LED_TXRPC_LED_TX (0x06) smc9000.h LED = TX packet occurred
30693
 RPC_LED_RXRPC_LED_RX (0x07) smc9000.h LED = RX packet occurred
30694
 RPC_DEFAULTRPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX) smc9000.h 　
30695
 RPC_REGRPC_REG 0x000A smc9000.h 　
30696
 RPC_SPEEDRPC_SPEED 0x2000 smc9000.h When 1 PHY is in 100Mbps mode.
30697
 RPC_DPLXRPC_DPLX 0x1000 smc9000.h When 1 PHY is in Full-Duplex Mode
30698
 RPC_ANEGRPC_ANEG 0x0800 smc9000.h When 1 PHY is in Auto-Negotiate Mode
30699
 RPC_LSXA_SHFTRPC_LSXA_SHFT 5 smc9000.h Bits to shift LS2A,LS1A,LS0A to lsb
30700
 RPC_LSXB_SHFTRPC_LSXB_SHFT 2 smc9000.h Bits to get LS2B,LS1B,LS0B to lsb
30701
 RPC_LED_100_10RPC_LED_100_10 (0x00) smc9000.h LED = 100Mbps OR's with 10Mbps link detect
30702
 RPC_LED_RESRPC_LED_RES (0x01) smc9000.h LED = Reserved
30703
 RPC_LED_10RPC_LED_10 (0x02) smc9000.h LED = 10Mbps link detect
30704
 RPC_LED_FDRPC_LED_FD (0x03) smc9000.h LED = Full Duplex Mode
30705
 RPC_LED_TX_RXRPC_LED_TX_RX (0x04) smc9000.h LED = TX or RX packet occurred
30706
 RPC_LED_100RPC_LED_100 (0x05) smc9000.h LED = 100Mbps link dectect
30707
 RPC_LED_TXRPC_LED_TX (0x06) smc9000.h LED = TX packet occurred
30708
 RPC_LED_RXRPC_LED_RX (0x07) smc9000.h LED = RX packet occurred
30709
 RPC_DEFAULTRPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX) smc9000.h 　
30710
 CONFIGCONFIG 0 smc9000.h 　
30711
 CFG_AUI_SELECTCFG_AUI_SELECT 0x100 smc9000.h 　
30712
 BASEBASE 2 smc9000.h 　
30713
 ADDR0ADDR0 4 smc9000.h 　
30714
 ADDR1ADDR1 6 smc9000.h 　
30715
 ADDR2ADDR2 8 smc9000.h 　
30716
 GENERALGENERAL 10 smc9000.h 　
30717
 CONTROLCONTROL 12 smc9000.h 　
30718
 CTL_POWERDOWNCTL_POWERDOWN 0x2000 smc9000.h 　
30719
 CTL_LE_ENABLECTL_LE_ENABLE 0x80 smc9000.h 　
30720
 CTL_CR_ENABLECTL_CR_ENABLE 0x40 smc9000.h 　
30721
 CTL_TE_ENABLECTL_TE_ENABLE 0x0020 smc9000.h 　
30722
 CTL_AUTO_RELEASECTL_AUTO_RELEASE 0x0800 smc9000.h 　
30723
 CTL_EPROM_ACCESSCTL_EPROM_ACCESS 0x0003 smc9000.h high if Eprom is being read
30724
 MMU_CMDMMU_CMD 0 smc9000.h 　
30725
 MC_BUSYMC_BUSY 1 smc9000.h only readable bit in the register
30726
 MC_NOPMC_NOP 0 smc9000.h 　
30727
 MC_ALLOCMC_ALLOC 0x20 smc9000.h or with number of 256 byte packets
30728
 MC_RESETMC_RESET 0x40 smc9000.h 　
30729
 MC_REMOVEMC_REMOVE 0x60 smc9000.h remove the current rx packet
30730
 MC_RELEASEMC_RELEASE 0x80 smc9000.h remove and release the current rx packet
30731
 MC_FREEPKTMC_FREEPKT 0xA0 smc9000.h Release packet in PNR register
30732
 MC_ENQUEUEMC_ENQUEUE 0xC0 smc9000.h Enqueue the packet for transmit
30733
 PNR_ARRPNR_ARR 2 smc9000.h 　
30734
 FIFO_PORTSFIFO_PORTS 4 smc9000.h 　
30735
 FP_RXEMPTYFP_RXEMPTY 0x8000 smc9000.h 　
30736
 FP_TXEMPTYFP_TXEMPTY 0x80 smc9000.h 　
30737
 POINTERPOINTER 6 smc9000.h 　
30738
 PTR_READPTR_READ 0x2000 smc9000.h 　
30739
 PTR_RCVPTR_RCV 0x8000 smc9000.h 　
30740
 PTR_AUTOINCPTR_AUTOINC 0x4000 smc9000.h 　
30741
 PTR_AUTO_INCPTR_AUTO_INC 0x0040 smc9000.h 　
30742
 DATA_1DATA_1 8 smc9000.h 　
30743
 DATA_2DATA_2 10 smc9000.h 　
30744
 INTERRUPTINTERRUPT 12 smc9000.h 　
30745
 INT_MASKINT_MASK 13 smc9000.h 　
30746
 IM_RCV_INTIM_RCV_INT 0x1 smc9000.h 　
30747
 IM_TX_INTIM_TX_INT 0x2 smc9000.h 　
30748
 IM_TX_EMPTY_INTIM_TX_EMPTY_INT 0x4 smc9000.h 　
30749
 IM_ALLOC_INTIM_ALLOC_INT 0x8 smc9000.h 　
30750
 IM_RX_OVRN_INTIM_RX_OVRN_INT 0x10 smc9000.h 　
30751
 IM_EPH_INTIM_EPH_INT 0x20 smc9000.h 　
30752
 IM_ERCV_INTIM_ERCV_INT 0x40 smc9000.h not on SMC9192
30753
 MULTICAST1MULTICAST1 0 smc9000.h 　
30754
 MULTICAST2MULTICAST2 2 smc9000.h 　
30755
 MULTICAST3MULTICAST3 4 smc9000.h 　
30756
 MULTICAST4MULTICAST4 6 smc9000.h 　
30757
 MGMTMGMT 8 smc9000.h 　
30758
 REVISIONREVISION 10 smc9000.h ( hi: chip id low: rev # )
30759
 MII_REGMII_REG 0x0008 smc9000.h 　
30760
 MII_MSK_CRS100MII_MSK_CRS100 0x4000 smc9000.h Disables CRS100 detection during tx half dup
30761
 MII_MDOEMII_MDOE 0x0008 smc9000.h MII Output Enable
30762
 MII_MCLKMII_MCLK 0x0004 smc9000.h MII Clock, pin MDCLK
30763
 MII_MDIMII_MDI 0x0002 smc9000.h MII Input, pin MDI
30764
 MII_MDOMII_MDO 0x0001 smc9000.h MII Output, pin MDO
30765
 ERCVERCV 12 smc9000.h 　
30766
 CHIP_9190CHIP_9190 3 smc9000.h 　
30767
 CHIP_9194CHIP_9194 4 smc9000.h 　
30768
 CHIP_9195CHIP_9195 5 smc9000.h 　
30769
 CHIP_9196CHIP_9196 4 smc9000.h 　
30770
 CHIP_91100CHIP_91100 7 smc9000.h 　
30771
 CHIP_91100FDCHIP_91100FD 8 smc9000.h 　
30772
 REV_9196REV_9196 6 smc9000.h 　
30773
 TS_SUCCESSTS_SUCCESS 0x0001 smc9000.h 　
30774
 TS_LOSTCARTS_LOSTCAR 0x0400 smc9000.h 　
30775
 TS_LATCOLTS_LATCOL 0x0200 smc9000.h 　
30776
 TS_16COLTS_16COL 0x0010 smc9000.h 　
30777
 RS_ALGNERRRS_ALGNERR 0x8000 smc9000.h 　
30778
 RS_BADCRCRS_BADCRC 0x2000 smc9000.h 　
30779
 RS_ODDFRAMERS_ODDFRAME 0x1000 smc9000.h 　
30780
 RS_TOOLONGRS_TOOLONG 0x0800 smc9000.h 　
30781
 RS_TOOSHORTRS_TOOSHORT 0x0400 smc9000.h 　
30782
 RS_MULTICASTRS_MULTICAST 0x0001 smc9000.h 　
30783
 RS_ERRORSRS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT) smc9000.h 　
30784
 PHY_CNTL_REGPHY_CNTL_REG 0x00 smc9000.h 　
30785
 PHY_CNTL_RSTPHY_CNTL_RST 0x8000 smc9000.h 1=PHY Reset
30786
 PHY_CNTL_LPBKPHY_CNTL_LPBK 0x4000 smc9000.h 1=PHY Loopback
30787
 PHY_CNTL_SPEEDPHY_CNTL_SPEED 0x2000 smc9000.h 1=100Mbps, 0=10Mpbs
30788
 PHY_CNTL_ANEG_ENPHY_CNTL_ANEG_EN 0x1000 smc9000.h 1=Enable Auto negotiation
30789
 PHY_CNTL_PDNPHY_CNTL_PDN 0x0800 smc9000.h 1=PHY Power Down mode
30790
 PHY_CNTL_MII_DISPHY_CNTL_MII_DIS 0x0400 smc9000.h 1=MII 4 bit interface disabled
30791
 PHY_CNTL_ANEG_RSTPHY_CNTL_ANEG_RST 0x0200 smc9000.h 1=Reset Auto negotiate
30792
 PHY_CNTL_DPLXPHY_CNTL_DPLX 0x0100 smc9000.h 1=Full Duplex, 0=Half Duplex
30793
 PHY_CNTL_COLTSTPHY_CNTL_COLTST 0x0080 smc9000.h 1= MII Colision Test
30794
 PHY_STAT_REGPHY_STAT_REG 0x01 smc9000.h 　
30795
 PHY_STAT_CAP_T4PHY_STAT_CAP_T4 0x8000 smc9000.h 1=100Base-T4 capable
30796
 PHY_STAT_CAP_TXFPHY_STAT_CAP_TXF 0x4000 smc9000.h 1=100Base-X full duplex capable
30797
 PHY_STAT_CAP_TXHPHY_STAT_CAP_TXH 0x2000 smc9000.h 1=100Base-X half duplex capable
30798
 PHY_STAT_CAP_TFPHY_STAT_CAP_TF 0x1000 smc9000.h 1=10Mbps full duplex capable
30799
 PHY_STAT_CAP_THPHY_STAT_CAP_TH 0x0800 smc9000.h 1=10Mbps half duplex capable
30800
 PHY_STAT_CAP_SUPRPHY_STAT_CAP_SUPR 0x0040 smc9000.h 1=recv mgmt frames with not preamble
30801
 PHY_STAT_ANEG_ACKPHY_STAT_ANEG_ACK 0x0020 smc9000.h 1=ANEG has completed
30802
 PHY_STAT_REM_FLTPHY_STAT_REM_FLT 0x0010 smc9000.h 1=Remote Fault detected
30803
 PHY_STAT_CAP_ANEGPHY_STAT_CAP_ANEG 0x0008 smc9000.h 1=Auto negotiate capable
30804
 PHY_STAT_LINKPHY_STAT_LINK 0x0004 smc9000.h 1=valid link
30805
 PHY_STAT_JABPHY_STAT_JAB 0x0002 smc9000.h 1=10Mbps jabber condition
30806
 PHY_STAT_EXREGPHY_STAT_EXREG 0x0001 smc9000.h 1=extended registers implemented
30807
 PHY_ID1_REGPHY_ID1_REG 0x02 smc9000.h PHY Identifier 1
30808
 PHY_ID2_REGPHY_ID2_REG 0x03 smc9000.h PHY Identifier 2
30809
 PHY_AD_REGPHY_AD_REG 0x04 smc9000.h 　
30810
 PHY_AD_NPPHY_AD_NP 0x8000 smc9000.h 1=PHY requests exchange of Next Page
30811
 PHY_AD_ACKPHY_AD_ACK 0x4000 smc9000.h 1=got link code word from remote
30812
 PHY_AD_RFPHY_AD_RF 0x2000 smc9000.h 1=advertise remote fault
30813
 PHY_AD_T4PHY_AD_T4 0x0200 smc9000.h 1=PHY is capable of 100Base-T4
30814
 PHY_AD_TX_FDXPHY_AD_TX_FDX 0x0100 smc9000.h 1=PHY is capable of 100Base-TX FDPLX
30815
 PHY_AD_TX_HDXPHY_AD_TX_HDX 0x0080 smc9000.h 1=PHY is capable of 100Base-TX HDPLX
30816
 PHY_AD_10_FDXPHY_AD_10_FDX 0x0040 smc9000.h 1=PHY is capable of 10Base-T FDPLX
30817
 PHY_AD_10_HDXPHY_AD_10_HDX 0x0020 smc9000.h 1=PHY is capable of 10Base-T HDPLX
30818
 PHY_AD_CSMAPHY_AD_CSMA 0x0001 smc9000.h 1=PHY is capable of 802.3 CMSA
30819
 PHY_RMT_REGPHY_RMT_REG 0x05 smc9000.h 　
30820
 PHY_CFG1_REGPHY_CFG1_REG 0x10 smc9000.h 　
30821
 PHY_CFG1_LNKDISPHY_CFG1_LNKDIS 0x8000 smc9000.h 1=Rx Link Detect Function disabled
30822
 PHY_CFG1_XMTDISPHY_CFG1_XMTDIS 0x4000 smc9000.h 1=TP Transmitter Disabled
30823
 PHY_CFG1_XMTPDNPHY_CFG1_XMTPDN 0x2000 smc9000.h 1=TP Transmitter Powered Down
30824
 PHY_CFG1_BYPSCRPHY_CFG1_BYPSCR 0x0400 smc9000.h 1=Bypass scrambler/descrambler
30825
 PHY_CFG1_UNSCDSPHY_CFG1_UNSCDS 0x0200 smc9000.h 1=Unscramble Idle Reception Disable
30826
 PHY_CFG1_EQLZRPHY_CFG1_EQLZR 0x0100 smc9000.h 1=Rx Equalizer Disabled
30827
 PHY_CFG1_CABLEPHY_CFG1_CABLE 0x0080 smc9000.h 1=STP(150ohm), 0=UTP(100ohm)
30828
 PHY_CFG1_RLVL0PHY_CFG1_RLVL0 0x0040 smc9000.h 1=Rx Squelch level reduced by 4.5db
30829
 PHY_CFG1_TLVL_SHIFTPHY_CFG1_TLVL_SHIFT 2 smc9000.h Transmit Output Level Adjust
30830
 PHY_CFG1_TLVL_MASKPHY_CFG1_TLVL_MASK 0x003C smc9000.h 　
30831
 PHY_CFG1_TRF_MASKPHY_CFG1_TRF_MASK 0x0003 smc9000.h Transmitter Rise/Fall time
30832
 PHY_CFG2_REGPHY_CFG2_REG 0x11 smc9000.h 　
30833
 PHY_CFG2_APOLDISPHY_CFG2_APOLDIS 0x0020 smc9000.h 1=Auto Polarity Correction disabled
30834
 PHY_CFG2_JABDISPHY_CFG2_JABDIS 0x0010 smc9000.h 1=Jabber disabled
30835
 PHY_CFG2_MREGPHY_CFG2_MREG 0x0008 smc9000.h 1=Multiple register access (MII mgt)
30836
 PHY_CFG2_INTMDIOPHY_CFG2_INTMDIO 0x0004 smc9000.h 1=Interrupt signaled with MDIO pulseo
30837
 PHY_INT_REGPHY_INT_REG 0x12 smc9000.h Status Output (Interrupt Status)
30838
 PHY_INT_INTPHY_INT_INT 0x8000 smc9000.h 1=bits have changed since last read
30839
 PHY_INT_LNKFAILPHY_INT_LNKFAIL 0x4000 smc9000.h 1=Link Not detected
30840
 PHY_INT_LOSSSYNCPHY_INT_LOSSSYNC 0x2000 smc9000.h 1=Descrambler has lost sync
30841
 PHY_INT_CWRDPHY_INT_CWRD 0x1000 smc9000.h 1=Invalid 4B5B code detected on rx
30842
 PHY_INT_SSDPHY_INT_SSD 0x0800 smc9000.h 1=No Start Of Stream detected on rx
30843
 PHY_INT_ESDPHY_INT_ESD 0x0400 smc9000.h 1=No End Of Stream detected on rx
30844
 PHY_INT_RPOLPHY_INT_RPOL 0x0200 smc9000.h 1=Reverse Polarity detected
30845
 PHY_INT_JABPHY_INT_JAB 0x0100 smc9000.h 1=Jabber detected
30846
 PHY_INT_SPDDETPHY_INT_SPDDET 0x0080 smc9000.h 1=100Base-TX mode, 0=10Base-T mode
30847
 PHY_INT_DPLXDETPHY_INT_DPLXDET 0x0040 smc9000.h 1=Device in Full Duplex
30848
 PHY_MASK_REGPHY_MASK_REG 0x13 smc9000.h Interrupt Mask
30849
 PHY_CNTL_REGPHY_CNTL_REG 0x00 smc9000.h 　
30850
 PHY_CNTL_RSTPHY_CNTL_RST 0x8000 smc9000.h 1=PHY Reset
30851
 PHY_CNTL_LPBKPHY_CNTL_LPBK 0x4000 smc9000.h 1=PHY Loopback
30852
 PHY_CNTL_SPEEDPHY_CNTL_SPEED 0x2000 smc9000.h 1=100Mbps, 0=10Mpbs
30853
 PHY_CNTL_ANEG_ENPHY_CNTL_ANEG_EN 0x1000 smc9000.h 1=Enable Auto negotiation
30854
 PHY_CNTL_PDNPHY_CNTL_PDN 0x0800 smc9000.h 1=PHY Power Down mode
30855
 PHY_CNTL_MII_DISPHY_CNTL_MII_DIS 0x0400 smc9000.h 1=MII 4 bit interface disabled
30856
 PHY_CNTL_ANEG_RSTPHY_CNTL_ANEG_RST 0x0200 smc9000.h 1=Reset Auto negotiate
30857
 PHY_CNTL_DPLXPHY_CNTL_DPLX 0x0100 smc9000.h 1=Full Duplex, 0=Half Duplex
30858
 PHY_CNTL_COLTSTPHY_CNTL_COLTST 0x0080 smc9000.h 1= MII Colision Test
30859
 PHY_STAT_REGPHY_STAT_REG 0x01 smc9000.h 　
30860
 PHY_STAT_CAP_T4PHY_STAT_CAP_T4 0x8000 smc9000.h 1=100Base-T4 capable
30861
 PHY_STAT_CAP_TXFPHY_STAT_CAP_TXF 0x4000 smc9000.h 1=100Base-X full duplex capable
30862
 PHY_STAT_CAP_TXHPHY_STAT_CAP_TXH 0x2000 smc9000.h 1=100Base-X half duplex capable
30863
 PHY_STAT_CAP_TFPHY_STAT_CAP_TF 0x1000 smc9000.h 1=10Mbps full duplex capable
30864
 PHY_STAT_CAP_THPHY_STAT_CAP_TH 0x0800 smc9000.h 1=10Mbps half duplex capable
30865
 PHY_STAT_CAP_SUPRPHY_STAT_CAP_SUPR 0x0040 smc9000.h 1=recv mgmt frames with not preamble
30866
 PHY_STAT_ANEG_ACKPHY_STAT_ANEG_ACK 0x0020 smc9000.h 1=ANEG has completed
30867
 PHY_STAT_REM_FLTPHY_STAT_REM_FLT 0x0010 smc9000.h 1=Remote Fault detected
30868
 PHY_STAT_CAP_ANEGPHY_STAT_CAP_ANEG 0x0008 smc9000.h 1=Auto negotiate capable
30869
 PHY_STAT_LINKPHY_STAT_LINK 0x0004 smc9000.h 1=valid link
30870
 PHY_STAT_JABPHY_STAT_JAB 0x0002 smc9000.h 1=10Mbps jabber condition
30871
 PHY_STAT_EXREGPHY_STAT_EXREG 0x0001 smc9000.h 1=extended registers implemented
30872
 PHY_ID1_REGPHY_ID1_REG 0x02 smc9000.h PHY Identifier 1
30873
 PHY_ID2_REGPHY_ID2_REG 0x03 smc9000.h PHY Identifier 2
30874
 PHY_AD_REGPHY_AD_REG 0x04 smc9000.h 　
30875
 PHY_AD_NPPHY_AD_NP 0x8000 smc9000.h 1=PHY requests exchange of Next Page
30876
 PHY_AD_ACKPHY_AD_ACK 0x4000 smc9000.h 1=got link code word from remote
30877
 PHY_AD_RFPHY_AD_RF 0x2000 smc9000.h 1=advertise remote fault
30878
 PHY_AD_T4PHY_AD_T4 0x0200 smc9000.h 1=PHY is capable of 100Base-T4
30879
 PHY_AD_TX_FDXPHY_AD_TX_FDX 0x0100 smc9000.h 1=PHY is capable of 100Base-TX FDPLX
30880
 PHY_AD_TX_HDXPHY_AD_TX_HDX 0x0080 smc9000.h 1=PHY is capable of 100Base-TX HDPLX
30881
 PHY_AD_10_FDXPHY_AD_10_FDX 0x0040 smc9000.h 1=PHY is capable of 10Base-T FDPLX
30882
 PHY_AD_10_HDXPHY_AD_10_HDX 0x0020 smc9000.h 1=PHY is capable of 10Base-T HDPLX
30883
 PHY_AD_CSMAPHY_AD_CSMA 0x0001 smc9000.h 1=PHY is capable of 802.3 CMSA
30884
 PHY_RMT_REGPHY_RMT_REG 0x05 smc9000.h 　
30885
 PHY_CFG1_REGPHY_CFG1_REG 0x10 smc9000.h 　
30886
 PHY_CFG1_LNKDISPHY_CFG1_LNKDIS 0x8000 smc9000.h 1=Rx Link Detect Function disabled
30887
 PHY_CFG1_XMTDISPHY_CFG1_XMTDIS 0x4000 smc9000.h 1=TP Transmitter Disabled
30888
 PHY_CFG1_XMTPDNPHY_CFG1_XMTPDN 0x2000 smc9000.h 1=TP Transmitter Powered Down
30889
 PHY_CFG1_BYPSCRPHY_CFG1_BYPSCR 0x0400 smc9000.h 1=Bypass scrambler/descrambler
30890
 PHY_CFG1_UNSCDSPHY_CFG1_UNSCDS 0x0200 smc9000.h 1=Unscramble Idle Reception Disable
30891
 PHY_CFG1_EQLZRPHY_CFG1_EQLZR 0x0100 smc9000.h 1=Rx Equalizer Disabled
30892
 PHY_CFG1_CABLEPHY_CFG1_CABLE 0x0080 smc9000.h 1=STP(150ohm), 0=UTP(100ohm)
30893
 PHY_CFG1_RLVL0PHY_CFG1_RLVL0 0x0040 smc9000.h 1=Rx Squelch level reduced by 4.5db
30894
 PHY_CFG1_TLVL_SHIFTPHY_CFG1_TLVL_SHIFT 2 smc9000.h Transmit Output Level Adjust
30895
 PHY_CFG1_TLVL_MASKPHY_CFG1_TLVL_MASK 0x003C smc9000.h 　
30896
 PHY_CFG1_TRF_MASKPHY_CFG1_TRF_MASK 0x0003 smc9000.h Transmitter Rise/Fall time
30897
 PHY_CFG2_REGPHY_CFG2_REG 0x11 smc9000.h 　
30898
 PHY_CFG2_APOLDISPHY_CFG2_APOLDIS 0x0020 smc9000.h 1=Auto Polarity Correction disabled
30899
 PHY_CFG2_JABDISPHY_CFG2_JABDIS 0x0010 smc9000.h 1=Jabber disabled
30900
 PHY_CFG2_MREGPHY_CFG2_MREG 0x0008 smc9000.h 1=Multiple register access (MII mgt)
30901
 PHY_CFG2_INTMDIOPHY_CFG2_INTMDIO 0x0004 smc9000.h 1=Interrupt signaled with MDIO pulseo
30902
 PHY_INT_REGPHY_INT_REG 0x12 smc9000.h Status Output (Interrupt Status)
30903
 PHY_INT_INTPHY_INT_INT 0x8000 smc9000.h 1=bits have changed since last read
30904
 PHY_INT_LNKFAILPHY_INT_LNKFAIL 0x4000 smc9000.h 1=Link Not detected
30905
 PHY_INT_LOSSSYNCPHY_INT_LOSSSYNC 0x2000 smc9000.h 1=Descrambler has lost sync
30906
 PHY_INT_CWRDPHY_INT_CWRD 0x1000 smc9000.h 1=Invalid 4B5B code detected on rx
30907
 PHY_INT_SSDPHY_INT_SSD 0x0800 smc9000.h 1=No Start Of Stream detected on rx
30908
 PHY_INT_ESDPHY_INT_ESD 0x0400 smc9000.h 1=No End Of Stream detected on rx
30909
 PHY_INT_RPOLPHY_INT_RPOL 0x0200 smc9000.h 1=Reverse Polarity detected
30910
 PHY_INT_JABPHY_INT_JAB 0x0100 smc9000.h 1=Jabber detected
30911
 PHY_INT_SPDDETPHY_INT_SPDDET 0x0080 smc9000.h 1=100Base-TX mode, 0=10Base-T mode
30912
 PHY_INT_DPLXDETPHY_INT_DPLXDET 0x0040 smc9000.h 1=Device in Full Duplex
30913
 PHY_MASK_REGPHY_MASK_REG 0x13 smc9000.h Interrupt Mask
30914
 ADVERTISED_10baseT_HalfADVERTISED_10baseT_Half (1 << 0) tg3.h 　
30915
 ADVERTISED_10baseT_FullADVERTISED_10baseT_Full (1 << 1) tg3.h 　
30916
 ADVERTISED_100baseT_HalfADVERTISED_100baseT_Half (1 << 2) tg3.h 　
30917
 ADVERTISED_100baseT_FullADVERTISED_100baseT_Full (1 << 3) tg3.h 　
30918
 ADVERTISED_1000baseT_HalfADVERTISED_1000baseT_Half (1 << 4) tg3.h 　
30919
 ADVERTISED_1000baseT_FullADVERTISED_1000baseT_Full (1 << 5) tg3.h 　
30920
 ADVERTISED_AutonegADVERTISED_Autoneg (1 << 6) tg3.h 　
30921
 ADVERTISED_TPADVERTISED_TP (1 << 7) tg3.h 　
30922
 ADVERTISED_AUIADVERTISED_AUI (1 << 8) tg3.h 　
30923
 ADVERTISED_MIIADVERTISED_MII (1 << 9) tg3.h 　
30924
 ADVERTISED_FIBREADVERTISED_FIBRE (1 << 10) tg3.h 　
30925
 ADVERTISED_BNCADVERTISED_BNC (1 << 11) tg3.h 　
30926
 SPEED_10SPEED_10 0 tg3.h 　
30927
 SPEED_100SPEED_100 1 tg3.h 　
30928
 SPEED_1000SPEED_1000 2 tg3.h 　
30929
 SPEED_INVALIDSPEED_INVALID 3 tg3.h 　
30930
 DUPLEX_HALFDUPLEX_HALF 0x00 tg3.h 　
30931
 DUPLEX_FULLDUPLEX_FULL 0x01 tg3.h 　
30932
 DUPLEX_INVALIDDUPLEX_INVALID 0x02 tg3.h 　
30933
 PORT_TPPORT_TP 0x00 tg3.h 　
30934
 PORT_AUIPORT_AUI 0x01 tg3.h 　
30935
 PORT_MIIPORT_MII 0x02 tg3.h 　
30936
 PORT_FIBREPORT_FIBRE 0x03 tg3.h 　
30937
 PORT_BNCPORT_BNC 0x04 tg3.h 　
30938
 XCVR_INTERNALXCVR_INTERNAL 0x00 tg3.h 　
30939
 XCVR_EXTERNALXCVR_EXTERNAL 0x01 tg3.h 　
30940
 XCVR_DUMMY1XCVR_DUMMY1 0x02 tg3.h 　
30941
 XCVR_DUMMY2XCVR_DUMMY2 0x03 tg3.h 　
30942
 XCVR_DUMMY3XCVR_DUMMY3 0x04 tg3.h 　
30943
 AUTONEG_DISABLEAUTONEG_DISABLE 0x00 tg3.h 　
30944
 AUTONEG_ENABLEAUTONEG_ENABLE 0x01 tg3.h 　
30945
 WAKE_PHYWAKE_PHY (1 << 0) tg3.h 　
30946
 WAKE_UCASTWAKE_UCAST (1 << 1) tg3.h 　
30947
 WAKE_MCASTWAKE_MCAST (1 << 2) tg3.h 　
30948
 WAKE_BCASTWAKE_BCAST (1 << 3) tg3.h 　
30949
 WAKE_ARPWAKE_ARP (1 << 4) tg3.h 　
30950
 WAKE_MAGICWAKE_MAGIC (1 << 5) tg3.h 　
30951
 WAKE_MAGICSECUREWAKE_MAGICSECURE (1 << 6) tg3.h only meaningful if WAKE_MAGIC
30952
 TG3_64BIT_REG_HIGHTG3_64BIT_REG_HIGH 0x00UL tg3.h 　
30953
 TG3_64BIT_REG_LOWTG3_64BIT_REG_LOW 0x04UL tg3.h 　
30954
 TG3_BDINFO_HOST_ADDRTG3_BDINFO_HOST_ADDR 0x0UL tg3.h 64-bit
30955
 TG3_BDINFO_MAXLEN_FLAGSTG3_BDINFO_MAXLEN_FLAGS 0x8UL tg3.h 32-bit
30956
 BDINFO_FLAGS_USE_EXT_RECVBDINFO_FLAGS_USE_EXT_RECV 0x00000001 tg3.h ext rx_buffer_desc
30957
 BDINFO_FLAGS_DISABLEDBDINFO_FLAGS_DISABLED 0x00000002 tg3.h 　
30958
 BDINFO_FLAGS_MAXLEN_MASKBDINFO_FLAGS_MAXLEN_MASK 0xffff0000 tg3.h 　
30959
 BDINFO_FLAGS_MAXLEN_SHIFTBDINFO_FLAGS_MAXLEN_SHIFT 16 tg3.h 　
30960
 TG3_BDINFO_NIC_ADDRTG3_BDINFO_NIC_ADDR 0xcUL tg3.h 32-bit
30961
 TG3_BDINFO_SIZETG3_BDINFO_SIZE 0x10UL tg3.h 　
30962
 RX_COPY_THRESHOLDRX_COPY_THRESHOLD 256 tg3.h 　
30963
 RX_STD_MAX_SIZERX_STD_MAX_SIZE 1536 tg3.h 　
30964
 RX_STD_MAX_SIZE_5705RX_STD_MAX_SIZE_5705 512 tg3.h 　
30965
 RX_JUMBO_MAX_SIZERX_JUMBO_MAX_SIZE 0xdeadbeef tg3.h XXX
30966
 TG3PCI_VENDORTG3PCI_VENDOR 0x00000000 tg3.h 　
30967
 TG3PCI_VENDOR_BROADCOMTG3PCI_VENDOR_BROADCOM 0x14e4 tg3.h 　
30968
 TG3PCI_DEVICETG3PCI_DEVICE 0x00000002 tg3.h 　
30969
 TG3PCI_DEVICE_TIGON3_1TG3PCI_DEVICE_TIGON3_1 0x1644 tg3.h BCM5700
30970
 TG3PCI_DEVICE_TIGON3_2TG3PCI_DEVICE_TIGON3_2 0x1645 tg3.h BCM5701
30971
 TG3PCI_DEVICE_TIGON3_3TG3PCI_DEVICE_TIGON3_3 0x1646 tg3.h BCM5702
30972
 TG3PCI_DEVICE_TIGON3_4TG3PCI_DEVICE_TIGON3_4 0x1647 tg3.h BCM5703
30973
 TG3PCI_COMMANDTG3PCI_COMMAND 0x00000004 tg3.h 　
30974
 TG3PCI_STATUSTG3PCI_STATUS 0x00000006 tg3.h 　
30975
 TG3PCI_CCREVIDTG3PCI_CCREVID 0x00000008 tg3.h 　
30976
 TG3PCI_CACHELINESZTG3PCI_CACHELINESZ 0x0000000c tg3.h 　
30977
 TG3PCI_LATTIMERTG3PCI_LATTIMER 0x0000000d tg3.h 　
30978
 TG3PCI_HEADERTYPETG3PCI_HEADERTYPE 0x0000000e tg3.h 　
30979
 TG3PCI_BISTTG3PCI_BIST 0x0000000f tg3.h 　
30980
 TG3PCI_BASE0_LOWTG3PCI_BASE0_LOW 0x00000010 tg3.h 　
30981
 TG3PCI_BASE0_HIGHTG3PCI_BASE0_HIGH 0x00000014 tg3.h 　
30982
 TG3PCI_SUBSYSVENIDTG3PCI_SUBSYSVENID 0x0000002c tg3.h 　
30983
 TG3PCI_SUBSYSIDTG3PCI_SUBSYSID 0x0000002e tg3.h 　
30984
 TG3PCI_ROMADDRTG3PCI_ROMADDR 0x00000030 tg3.h 　
30985
 TG3PCI_CAPLISTTG3PCI_CAPLIST 0x00000034 tg3.h 　
30986
 TG3PCI_IRQ_LINETG3PCI_IRQ_LINE 0x0000003c tg3.h 　
30987
 TG3PCI_IRQ_PINTG3PCI_IRQ_PIN 0x0000003d tg3.h 　
30988
 TG3PCI_MIN_GNTTG3PCI_MIN_GNT 0x0000003e tg3.h 　
30989
 TG3PCI_MAX_LATTG3PCI_MAX_LAT 0x0000003f tg3.h 　
30990
 TG3PCI_X_CAPSTG3PCI_X_CAPS 0x00000040 tg3.h 　
30991
 PCIX_CAPS_RELAXED_ORDERINGPCIX_CAPS_RELAXED_ORDERING 0x00020000 tg3.h 　
30992
 PCIX_CAPS_SPLIT_MASKPCIX_CAPS_SPLIT_MASK 0x00700000 tg3.h 　
30993
 PCIX_CAPS_SPLIT_SHIFTPCIX_CAPS_SPLIT_SHIFT 20 tg3.h 　
30994
 PCIX_CAPS_BURST_MASKPCIX_CAPS_BURST_MASK 0x000c0000 tg3.h 　
30995
 PCIX_CAPS_BURST_SHIFTPCIX_CAPS_BURST_SHIFT 18 tg3.h 　
30996
 PCIX_CAPS_MAX_BURST_CPIOBPCIX_CAPS_MAX_BURST_CPIOB 2 tg3.h 　
30997
 TG3PCI_PM_CAP_PTRTG3PCI_PM_CAP_PTR 0x00000041 tg3.h 　
30998
 TG3PCI_X_COMMANDTG3PCI_X_COMMAND 0x00000042 tg3.h 　
30999
 TG3PCI_X_STATUSTG3PCI_X_STATUS 0x00000044 tg3.h 　
31000
 TG3PCI_PM_CAP_IDTG3PCI_PM_CAP_ID 0x00000048 tg3.h 　
31001
 TG3PCI_VPD_CAP_PTRTG3PCI_VPD_CAP_PTR 0x00000049 tg3.h 　
31002
 TG3PCI_PM_CAPSTG3PCI_PM_CAPS 0x0000004a tg3.h 　
31003
 TG3PCI_PM_CTRL_STATTG3PCI_PM_CTRL_STAT 0x0000004c tg3.h 　
31004
 TG3PCI_BR_SUPP_EXTTG3PCI_BR_SUPP_EXT 0x0000004e tg3.h 　
31005
 TG3PCI_PM_DATATG3PCI_PM_DATA 0x0000004f tg3.h 　
31006
 TG3PCI_VPD_CAP_IDTG3PCI_VPD_CAP_ID 0x00000050 tg3.h 　
31007
 TG3PCI_MSI_CAP_PTRTG3PCI_MSI_CAP_PTR 0x00000051 tg3.h 　
31008
 TG3PCI_VPD_ADDR_FLAGTG3PCI_VPD_ADDR_FLAG 0x00000052 tg3.h 　
31009
 VPD_ADDR_FLAG_WRITEVPD_ADDR_FLAG_WRITE 0x00008000 tg3.h 　
31010
 TG3PCI_VPD_DATATG3PCI_VPD_DATA 0x00000054 tg3.h 　
31011
 TG3PCI_MSI_CAP_IDTG3PCI_MSI_CAP_ID 0x00000058 tg3.h 　
31012
 TG3PCI_NXT_CAP_PTRTG3PCI_NXT_CAP_PTR 0x00000059 tg3.h 　
31013
 TG3PCI_MSI_CTRLTG3PCI_MSI_CTRL 0x0000005a tg3.h 　
31014
 TG3PCI_MSI_ADDR_LOWTG3PCI_MSI_ADDR_LOW 0x0000005c tg3.h 　
31015
 TG3PCI_MSI_ADDR_HIGHTG3PCI_MSI_ADDR_HIGH 0x00000060 tg3.h 　
31016
 TG3PCI_MSI_DATATG3PCI_MSI_DATA 0x00000064 tg3.h 　
31017
 TG3PCI_MISC_HOST_CTRLTG3PCI_MISC_HOST_CTRL 0x00000068 tg3.h 　
31018
 MISC_HOST_CTRL_CLEAR_INTMISC_HOST_CTRL_CLEAR_INT 0x00000001 tg3.h 　
31019
 MISC_HOST_CTRL_MASK_PCI_INTMISC_HOST_CTRL_MASK_PCI_INT 0x00000002 tg3.h 　
31020
 MISC_HOST_CTRL_BYTE_SWAPMISC_HOST_CTRL_BYTE_SWAP 0x00000004 tg3.h 　
31021
 MISC_HOST_CTRL_WORD_SWAPMISC_HOST_CTRL_WORD_SWAP 0x00000008 tg3.h 　
31022
 MISC_HOST_CTRL_PCISTATE_RWMISC_HOST_CTRL_PCISTATE_RW 0x00000010 tg3.h 　
31023
 MISC_HOST_CTRL_CLKREG_RWMISC_HOST_CTRL_CLKREG_RW 0x00000020 tg3.h 　
31024
 MISC_HOST_CTRL_REGWORD_SWAPMISC_HOST_CTRL_REGWORD_SWAP 0x00000040 tg3.h 　
31025
 MISC_HOST_CTRL_INDIR_ACCESSMISC_HOST_CTRL_INDIR_ACCESS 0x00000080 tg3.h 　
31026
 MISC_HOST_CTRL_IRQ_MASK_MODEMISC_HOST_CTRL_IRQ_MASK_MODE 0x00000100 tg3.h 　
31027
 MISC_HOST_CTRL_TAGGED_STATUSMISC_HOST_CTRL_TAGGED_STATUS 0x00000200 tg3.h 　
31028
 MISC_HOST_CTRL_CHIPREVMISC_HOST_CTRL_CHIPREV 0xffff0000 tg3.h 　
31029
 MISC_HOST_CTRL_CHIPREV_SHIFTMISC_HOST_CTRL_CHIPREV_SHIFT 16 tg3.h 　
31030
 CHIPREV_ID_5700_A0CHIPREV_ID_5700_A0 0x7000 tg3.h 　
31031
 CHIPREV_ID_5700_A1CHIPREV_ID_5700_A1 0x7001 tg3.h 　
31032
 CHIPREV_ID_5700_B0CHIPREV_ID_5700_B0 0x7100 tg3.h 　
31033
 CHIPREV_ID_5700_B1CHIPREV_ID_5700_B1 0x7101 tg3.h 　
31034
 CHIPREV_ID_5700_B3CHIPREV_ID_5700_B3 0x7102 tg3.h 　
31035
 CHIPREV_ID_5700_ALTIMACHIPREV_ID_5700_ALTIMA 0x7104 tg3.h 　
31036
 CHIPREV_ID_5700_C0CHIPREV_ID_5700_C0 0x7200 tg3.h 　
31037
 CHIPREV_ID_5701_A0CHIPREV_ID_5701_A0 0x0000 tg3.h 　
31038
 CHIPREV_ID_5701_B0CHIPREV_ID_5701_B0 0x0100 tg3.h 　
31039
 CHIPREV_ID_5701_B2CHIPREV_ID_5701_B2 0x0102 tg3.h 　
31040
 CHIPREV_ID_5701_B5CHIPREV_ID_5701_B5 0x0105 tg3.h 　
31041
 CHIPREV_ID_5703_A0CHIPREV_ID_5703_A0 0x1000 tg3.h 　
31042
 CHIPREV_ID_5703_A1CHIPREV_ID_5703_A1 0x1001 tg3.h 　
31043
 CHIPREV_ID_5703_A2CHIPREV_ID_5703_A2 0x1002 tg3.h 　
31044
 CHIPREV_ID_5703_A3CHIPREV_ID_5703_A3 0x1003 tg3.h 　
31045
 CHIPREV_ID_5704_A0CHIPREV_ID_5704_A0 0x2000 tg3.h 　
31046
 CHIPREV_ID_5704_A1CHIPREV_ID_5704_A1 0x2001 tg3.h 　
31047
 CHIPREV_ID_5704_A2CHIPREV_ID_5704_A2 0x2002 tg3.h 　
31048
 CHIPREV_ID_5705_A0CHIPREV_ID_5705_A0 0x3000 tg3.h 　
31049
 CHIPREV_ID_5705_A1CHIPREV_ID_5705_A1 0x3001 tg3.h 　
31050
 CHIPREV_ID_5705_A2CHIPREV_ID_5705_A2 0x3002 tg3.h 　
31051
 CHIPREV_ID_5705_A3CHIPREV_ID_5705_A3 0x3003 tg3.h 　
31052
 CHIPREV_ID_5721CHIPREV_ID_5721 0x4101 tg3.h 　
31053
 CHIPREV_ID_5750_A0CHIPREV_ID_5750_A0 0x4000 tg3.h 　
31054
 CHIPREV_ID_5750_A1CHIPREV_ID_5750_A1 0x4001 tg3.h 　
31055
 CHIPREV_ID_5750_A3CHIPREV_ID_5750_A3 0x4003 tg3.h 　
31056
 ASIC_REV_5700ASIC_REV_5700 0x07 tg3.h 　
31057
 ASIC_REV_5701ASIC_REV_5701 0x00 tg3.h 　
31058
 ASIC_REV_5703ASIC_REV_5703 0x01 tg3.h 　
31059
 ASIC_REV_5704ASIC_REV_5704 0x02 tg3.h 　
31060
 ASIC_REV_5705ASIC_REV_5705 0x03 tg3.h 　
31061
 ASIC_REV_5750ASIC_REV_5750 0x04 tg3.h 　
31062
 ASIC_REV_5787ASIC_REV_5787 0x0b tg3.h 　
31063
 CHIPREV_5700_AXCHIPREV_5700_AX 0x70 tg3.h 　
31064
 CHIPREV_5700_BXCHIPREV_5700_BX 0x71 tg3.h 　
31065
 CHIPREV_5700_CXCHIPREV_5700_CX 0x72 tg3.h 　
31066
 CHIPREV_5701_AXCHIPREV_5701_AX 0x00 tg3.h 　
31067
 METAL_REV_A0METAL_REV_A0 0x00 tg3.h 　
31068
 METAL_REV_A1METAL_REV_A1 0x01 tg3.h 　
31069
 METAL_REV_B0METAL_REV_B0 0x00 tg3.h 　
31070
 METAL_REV_B1METAL_REV_B1 0x01 tg3.h 　
31071
 METAL_REV_B2METAL_REV_B2 0x02 tg3.h 　
31072
 TG3PCI_DMA_RW_CTRLTG3PCI_DMA_RW_CTRL 0x0000006c tg3.h 　
31073
 DMA_RWCTRL_MIN_DMADMA_RWCTRL_MIN_DMA 0x000000ff tg3.h 　
31074
 DMA_RWCTRL_MIN_DMA_SHIFTDMA_RWCTRL_MIN_DMA_SHIFT 0 tg3.h 　
31075
 DMA_RWCTRL_READ_BNDRY_MASKDMA_RWCTRL_READ_BNDRY_MASK 0x00000700 tg3.h 　
31076
 DMA_RWCTRL_READ_BNDRY_DISABDMA_RWCTRL_READ_BNDRY_DISAB 0x00000000 tg3.h 　
31077
 DMA_RWCTRL_READ_BNDRY_16DMA_RWCTRL_READ_BNDRY_16 0x00000100 tg3.h 　
31078
 DMA_RWCTRL_READ_BNDRY_32DMA_RWCTRL_READ_BNDRY_32 0x00000200 tg3.h 　
31079
 DMA_RWCTRL_READ_BNDRY_64DMA_RWCTRL_READ_BNDRY_64 0x00000300 tg3.h 　
31080
 DMA_RWCTRL_READ_BNDRY_128DMA_RWCTRL_READ_BNDRY_128 0x00000400 tg3.h 　
31081
 DMA_RWCTRL_READ_BNDRY_256DMA_RWCTRL_READ_BNDRY_256 0x00000500 tg3.h 　
31082
 DMA_RWCTRL_READ_BNDRY_512DMA_RWCTRL_READ_BNDRY_512 0x00000600 tg3.h 　
31083
 DMA_RWCTRL_READ_BNDRY_1024DMA_RWCTRL_READ_BNDRY_1024 0x00000700 tg3.h 　
31084
 DMA_RWCTRL_WRITE_BNDRY_MASKDMA_RWCTRL_WRITE_BNDRY_MASK 0x00003800 tg3.h 　
31085
 DMA_RWCTRL_WRITE_BNDRY_DISABDMA_RWCTRL_WRITE_BNDRY_DISAB 0x00000000 tg3.h 　
31086
 DMA_RWCTRL_WRITE_BNDRY_16DMA_RWCTRL_WRITE_BNDRY_16 0x00000800 tg3.h 　
31087
 DMA_RWCTRL_WRITE_BNDRY_32DMA_RWCTRL_WRITE_BNDRY_32 0x00001000 tg3.h 　
31088
 DMA_RWCTRL_WRITE_BNDRY_64DMA_RWCTRL_WRITE_BNDRY_64 0x00001800 tg3.h 　
31089
 DMA_RWCTRL_WRITE_BNDRY_128DMA_RWCTRL_WRITE_BNDRY_128 0x00002000 tg3.h 　
31090
 DMA_RWCTRL_WRITE_BNDRY_256DMA_RWCTRL_WRITE_BNDRY_256 0x00002800 tg3.h 　
31091
 DMA_RWCTRL_WRITE_BNDRY_512DMA_RWCTRL_WRITE_BNDRY_512 0x00003000 tg3.h 　
31092
 DMA_RWCTRL_WRITE_BNDRY_1024DMA_RWCTRL_WRITE_BNDRY_1024 0x00003800 tg3.h 　
31093
 DMA_RWCTRL_ONE_DMADMA_RWCTRL_ONE_DMA 0x00004000 tg3.h 　
31094
 DMA_RWCTRL_READ_WATERDMA_RWCTRL_READ_WATER 0x00070000 tg3.h 　
31095
 DMA_RWCTRL_READ_WATER_SHIFTDMA_RWCTRL_READ_WATER_SHIFT 16 tg3.h 　
31096
 DMA_RWCTRL_WRITE_WATERDMA_RWCTRL_WRITE_WATER 0x00380000 tg3.h 　
31097
 DMA_RWCTRL_WRITE_WATER_SHIFTDMA_RWCTRL_WRITE_WATER_SHIFT 19 tg3.h 　
31098
 DMA_RWCTRL_USE_MEM_READ_MULTDMA_RWCTRL_USE_MEM_READ_MULT 0x00400000 tg3.h 　
31099
 DMA_RWCTRL_ASSERT_ALL_BEDMA_RWCTRL_ASSERT_ALL_BE 0x00800000 tg3.h 　
31100
 DMA_RWCTRL_PCI_READ_CMDDMA_RWCTRL_PCI_READ_CMD 0x0f000000 tg3.h 　
31101
 DMA_RWCTRL_PCI_READ_CMD_SHIFTDMA_RWCTRL_PCI_READ_CMD_SHIFT 24 tg3.h 　
31102
 DMA_RWCTRL_PCI_WRITE_CMDDMA_RWCTRL_PCI_WRITE_CMD 0xf0000000 tg3.h 　
31103
 DMA_RWCTRL_PCI_WRITE_CMD_SHIFTDMA_RWCTRL_PCI_WRITE_CMD_SHIFT 28 tg3.h 　
31104
 TG3PCI_PCISTATETG3PCI_PCISTATE 0x00000070 tg3.h 　
31105
 PCISTATE_FORCE_RESETPCISTATE_FORCE_RESET 0x00000001 tg3.h 　
31106
 PCISTATE_INT_NOT_ACTIVEPCISTATE_INT_NOT_ACTIVE 0x00000002 tg3.h 　
31107
 PCISTATE_CONV_PCI_MODEPCISTATE_CONV_PCI_MODE 0x00000004 tg3.h 　
31108
 PCISTATE_BUS_SPEED_HIGHPCISTATE_BUS_SPEED_HIGH 0x00000008 tg3.h 　
31109
 PCISTATE_BUS_32BITPCISTATE_BUS_32BIT 0x00000010 tg3.h 　
31110
 PCISTATE_ROM_ENABLEPCISTATE_ROM_ENABLE 0x00000020 tg3.h 　
31111
 PCISTATE_ROM_RETRY_ENABLEPCISTATE_ROM_RETRY_ENABLE 0x00000040 tg3.h 　
31112
 PCISTATE_FLAT_VIEWPCISTATE_FLAT_VIEW 0x00000100 tg3.h 　
31113
 PCISTATE_RETRY_SAME_DMAPCISTATE_RETRY_SAME_DMA 0x00002000 tg3.h 　
31114
 TG3PCI_CLOCK_CTRLTG3PCI_CLOCK_CTRL 0x00000074 tg3.h 　
31115
 CLOCK_CTRL_CORECLK_DISABLECLOCK_CTRL_CORECLK_DISABLE 0x00000200 tg3.h 　
31116
 CLOCK_CTRL_RXCLK_DISABLECLOCK_CTRL_RXCLK_DISABLE 0x00000400 tg3.h 　
31117
 CLOCK_CTRL_TXCLK_DISABLECLOCK_CTRL_TXCLK_DISABLE 0x00000800 tg3.h 　
31118
 CLOCK_CTRL_ALTCLKCLOCK_CTRL_ALTCLK 0x00001000 tg3.h 　
31119
 CLOCK_CTRL_PWRDOWN_PLL133CLOCK_CTRL_PWRDOWN_PLL133 0x00008000 tg3.h 　
31120
 CLOCK_CTRL_44MHZ_CORECLOCK_CTRL_44MHZ_CORE 0x00040000 tg3.h 　
31121
 CLOCK_CTRL_625_CORECLOCK_CTRL_625_CORE 0x00100000 tg3.h 　
31122
 CLOCK_CTRL_FORCE_CLKRUNCLOCK_CTRL_FORCE_CLKRUN 0x00200000 tg3.h 　
31123
 CLOCK_CTRL_CLKRUN_OENABLECLOCK_CTRL_CLKRUN_OENABLE 0x00400000 tg3.h 　
31124
 CLOCK_CTRL_DELAY_PCI_GRANTCLOCK_CTRL_DELAY_PCI_GRANT 0x80000000 tg3.h 　
31125
 TG3PCI_REG_BASE_ADDRTG3PCI_REG_BASE_ADDR 0x00000078 tg3.h 　
31126
 TG3PCI_MEM_WIN_BASE_ADDRTG3PCI_MEM_WIN_BASE_ADDR 0x0000007c tg3.h 　
31127
 TG3PCI_REG_DATATG3PCI_REG_DATA 0x00000080 tg3.h 　
31128
 TG3PCI_MEM_WIN_DATATG3PCI_MEM_WIN_DATA 0x00000084 tg3.h 　
31129
 TG3PCI_MODE_CTRLTG3PCI_MODE_CTRL 0x00000088 tg3.h 　
31130
 TG3PCI_MISC_CFGTG3PCI_MISC_CFG 0x0000008c tg3.h 　
31131
 TG3PCI_MISC_LOCAL_CTRLTG3PCI_MISC_LOCAL_CTRL 0x00000090 tg3.h 　
31132
 TG3PCI_STD_RING_PROD_IDXTG3PCI_STD_RING_PROD_IDX 0x00000098 tg3.h 64-bit
31133
 TG3PCI_RCV_RET_RING_CON_IDXTG3PCI_RCV_RET_RING_CON_IDX 0x000000a0 tg3.h 64-bit
31134
 TG3PCI_SND_PROD_IDXTG3PCI_SND_PROD_IDX 0x000000a8 tg3.h 64-bit
31135
 MAILBOX_INTERRUPT_0MAILBOX_INTERRUPT_0 0x00000200 tg3.h 64-bit
31136
 MAILBOX_INTERRUPT_1MAILBOX_INTERRUPT_1 0x00000208 tg3.h 64-bit
31137
 MAILBOX_INTERRUPT_2MAILBOX_INTERRUPT_2 0x00000210 tg3.h 64-bit
31138
 MAILBOX_INTERRUPT_3MAILBOX_INTERRUPT_3 0x00000218 tg3.h 64-bit
31139
 MAILBOX_GENERAL_0MAILBOX_GENERAL_0 0x00000220 tg3.h 64-bit
31140
 MAILBOX_GENERAL_1MAILBOX_GENERAL_1 0x00000228 tg3.h 64-bit
31141
 MAILBOX_GENERAL_2MAILBOX_GENERAL_2 0x00000230 tg3.h 64-bit
31142
 MAILBOX_GENERAL_3MAILBOX_GENERAL_3 0x00000238 tg3.h 64-bit
31143
 MAILBOX_GENERAL_4MAILBOX_GENERAL_4 0x00000240 tg3.h 64-bit
31144
 MAILBOX_GENERAL_5MAILBOX_GENERAL_5 0x00000248 tg3.h 64-bit
31145
 MAILBOX_GENERAL_6MAILBOX_GENERAL_6 0x00000250 tg3.h 64-bit
31146
 MAILBOX_GENERAL_7MAILBOX_GENERAL_7 0x00000258 tg3.h 64-bit
31147
 MAILBOX_RELOAD_STATMAILBOX_RELOAD_STAT 0x00000260 tg3.h 64-bit
31148
 MAILBOX_RCV_STD_PROD_IDXMAILBOX_RCV_STD_PROD_IDX 0x00000268 tg3.h 64-bit
31149
 MAILBOX_RCV_JUMBO_PROD_IDXMAILBOX_RCV_JUMBO_PROD_IDX 0x00000270 tg3.h 64-bit
31150
 MAILBOX_RCV_MINI_PROD_IDXMAILBOX_RCV_MINI_PROD_IDX 0x00000278 tg3.h 64-bit
31151
 MAILBOX_RCVRET_CON_IDX_0MAILBOX_RCVRET_CON_IDX_0 0x00000280 tg3.h 64-bit
31152
 MAILBOX_RCVRET_CON_IDX_1MAILBOX_RCVRET_CON_IDX_1 0x00000288 tg3.h 64-bit
31153
 MAILBOX_RCVRET_CON_IDX_2MAILBOX_RCVRET_CON_IDX_2 0x00000290 tg3.h 64-bit
31154
 MAILBOX_RCVRET_CON_IDX_3MAILBOX_RCVRET_CON_IDX_3 0x00000298 tg3.h 64-bit
31155
 MAILBOX_RCVRET_CON_IDX_4MAILBOX_RCVRET_CON_IDX_4 0x000002a0 tg3.h 64-bit
31156
 MAILBOX_RCVRET_CON_IDX_5MAILBOX_RCVRET_CON_IDX_5 0x000002a8 tg3.h 64-bit
31157
 MAILBOX_RCVRET_CON_IDX_6MAILBOX_RCVRET_CON_IDX_6 0x000002b0 tg3.h 64-bit
31158
 MAILBOX_RCVRET_CON_IDX_7MAILBOX_RCVRET_CON_IDX_7 0x000002b8 tg3.h 64-bit
31159
 MAILBOX_RCVRET_CON_IDX_8MAILBOX_RCVRET_CON_IDX_8 0x000002c0 tg3.h 64-bit
31160
 MAILBOX_RCVRET_CON_IDX_9MAILBOX_RCVRET_CON_IDX_9 0x000002c8 tg3.h 64-bit
31161
 MAILBOX_RCVRET_CON_IDX_10MAILBOX_RCVRET_CON_IDX_10 0x000002d0 tg3.h 64-bit
31162
 MAILBOX_RCVRET_CON_IDX_11MAILBOX_RCVRET_CON_IDX_11 0x000002d8 tg3.h 64-bit
31163
 MAILBOX_RCVRET_CON_IDX_12MAILBOX_RCVRET_CON_IDX_12 0x000002e0 tg3.h 64-bit
31164
 MAILBOX_RCVRET_CON_IDX_13MAILBOX_RCVRET_CON_IDX_13 0x000002e8 tg3.h 64-bit
31165
 MAILBOX_RCVRET_CON_IDX_14MAILBOX_RCVRET_CON_IDX_14 0x000002f0 tg3.h 64-bit
31166
 MAILBOX_RCVRET_CON_IDX_15MAILBOX_RCVRET_CON_IDX_15 0x000002f8 tg3.h 64-bit
31167
 MAILBOX_SNDHOST_PROD_IDX_0MAILBOX_SNDHOST_PROD_IDX_0 0x00000300 tg3.h 64-bit
31168
 MAILBOX_SNDHOST_PROD_IDX_1MAILBOX_SNDHOST_PROD_IDX_1 0x00000308 tg3.h 64-bit
31169
 MAILBOX_SNDHOST_PROD_IDX_2MAILBOX_SNDHOST_PROD_IDX_2 0x00000310 tg3.h 64-bit
31170
 MAILBOX_SNDHOST_PROD_IDX_3MAILBOX_SNDHOST_PROD_IDX_3 0x00000318 tg3.h 64-bit
31171
 MAILBOX_SNDHOST_PROD_IDX_4MAILBOX_SNDHOST_PROD_IDX_4 0x00000320 tg3.h 64-bit
31172
 MAILBOX_SNDHOST_PROD_IDX_5MAILBOX_SNDHOST_PROD_IDX_5 0x00000328 tg3.h 64-bit
31173
 MAILBOX_SNDHOST_PROD_IDX_6MAILBOX_SNDHOST_PROD_IDX_6 0x00000330 tg3.h 64-bit
31174
 MAILBOX_SNDHOST_PROD_IDX_7MAILBOX_SNDHOST_PROD_IDX_7 0x00000338 tg3.h 64-bit
31175
 MAILBOX_SNDHOST_PROD_IDX_8MAILBOX_SNDHOST_PROD_IDX_8 0x00000340 tg3.h 64-bit
31176
 MAILBOX_SNDHOST_PROD_IDX_9MAILBOX_SNDHOST_PROD_IDX_9 0x00000348 tg3.h 64-bit
31177
 MAILBOX_SNDHOST_PROD_IDX_10MAILBOX_SNDHOST_PROD_IDX_10 0x00000350 tg3.h 64-bit
31178
 MAILBOX_SNDHOST_PROD_IDX_11MAILBOX_SNDHOST_PROD_IDX_11 0x00000358 tg3.h 64-bit
31179
 MAILBOX_SNDHOST_PROD_IDX_12MAILBOX_SNDHOST_PROD_IDX_12 0x00000360 tg3.h 64-bit
31180
 MAILBOX_SNDHOST_PROD_IDX_13MAILBOX_SNDHOST_PROD_IDX_13 0x00000368 tg3.h 64-bit
31181
 MAILBOX_SNDHOST_PROD_IDX_14MAILBOX_SNDHOST_PROD_IDX_14 0x00000370 tg3.h 64-bit
31182
 MAILBOX_SNDHOST_PROD_IDX_15MAILBOX_SNDHOST_PROD_IDX_15 0x00000378 tg3.h 64-bit
31183
 MAILBOX_SNDNIC_PROD_IDX_0MAILBOX_SNDNIC_PROD_IDX_0 0x00000380 tg3.h 64-bit
31184
 MAILBOX_SNDNIC_PROD_IDX_1MAILBOX_SNDNIC_PROD_IDX_1 0x00000388 tg3.h 64-bit
31185
 MAILBOX_SNDNIC_PROD_IDX_2MAILBOX_SNDNIC_PROD_IDX_2 0x00000390 tg3.h 64-bit
31186
 MAILBOX_SNDNIC_PROD_IDX_3MAILBOX_SNDNIC_PROD_IDX_3 0x00000398 tg3.h 64-bit
31187
 MAILBOX_SNDNIC_PROD_IDX_4MAILBOX_SNDNIC_PROD_IDX_4 0x000003a0 tg3.h 64-bit
31188
 MAILBOX_SNDNIC_PROD_IDX_5MAILBOX_SNDNIC_PROD_IDX_5 0x000003a8 tg3.h 64-bit
31189
 MAILBOX_SNDNIC_PROD_IDX_6MAILBOX_SNDNIC_PROD_IDX_6 0x000003b0 tg3.h 64-bit
31190
 MAILBOX_SNDNIC_PROD_IDX_7MAILBOX_SNDNIC_PROD_IDX_7 0x000003b8 tg3.h 64-bit
31191
 MAILBOX_SNDNIC_PROD_IDX_8MAILBOX_SNDNIC_PROD_IDX_8 0x000003c0 tg3.h 64-bit
31192
 MAILBOX_SNDNIC_PROD_IDX_9MAILBOX_SNDNIC_PROD_IDX_9 0x000003c8 tg3.h 64-bit
31193
 MAILBOX_SNDNIC_PROD_IDX_10MAILBOX_SNDNIC_PROD_IDX_10 0x000003d0 tg3.h 64-bit
31194
 MAILBOX_SNDNIC_PROD_IDX_11MAILBOX_SNDNIC_PROD_IDX_11 0x000003d8 tg3.h 64-bit
31195
 MAILBOX_SNDNIC_PROD_IDX_12MAILBOX_SNDNIC_PROD_IDX_12 0x000003e0 tg3.h 64-bit
31196
 MAILBOX_SNDNIC_PROD_IDX_13MAILBOX_SNDNIC_PROD_IDX_13 0x000003e8 tg3.h 64-bit
31197
 MAILBOX_SNDNIC_PROD_IDX_14MAILBOX_SNDNIC_PROD_IDX_14 0x000003f0 tg3.h 64-bit
31198
 MAILBOX_SNDNIC_PROD_IDX_15MAILBOX_SNDNIC_PROD_IDX_15 0x000003f8 tg3.h 64-bit
31199
 MAC_MODEMAC_MODE 0x00000400 tg3.h 　
31200
 MAC_MODE_RESETMAC_MODE_RESET 0x00000001 tg3.h 　
31201
 MAC_MODE_HALF_DUPLEXMAC_MODE_HALF_DUPLEX 0x00000002 tg3.h 　
31202
 MAC_MODE_PORT_MODE_MASKMAC_MODE_PORT_MODE_MASK 0x0000000c tg3.h 　
31203
 MAC_MODE_PORT_MODE_TBIMAC_MODE_PORT_MODE_TBI 0x0000000c tg3.h 　
31204
 MAC_MODE_PORT_MODE_GMIIMAC_MODE_PORT_MODE_GMII 0x00000008 tg3.h 　
31205
 MAC_MODE_PORT_MODE_MIIMAC_MODE_PORT_MODE_MII 0x00000004 tg3.h 　
31206
 MAC_MODE_PORT_MODE_NONEMAC_MODE_PORT_MODE_NONE 0x00000000 tg3.h 　
31207
 MAC_MODE_PORT_INT_LPBACKMAC_MODE_PORT_INT_LPBACK 0x00000010 tg3.h 　
31208
 MAC_MODE_TAGGED_MAC_CTRLMAC_MODE_TAGGED_MAC_CTRL 0x00000080 tg3.h 　
31209
 MAC_MODE_TX_BURSTINGMAC_MODE_TX_BURSTING 0x00000100 tg3.h 　
31210
 MAC_MODE_MAX_DEFERMAC_MODE_MAX_DEFER 0x00000200 tg3.h 　
31211
 MAC_MODE_LINK_POLARITYMAC_MODE_LINK_POLARITY 0x00000400 tg3.h 　
31212
 MAC_MODE_RXSTAT_ENABLEMAC_MODE_RXSTAT_ENABLE 0x00000800 tg3.h 　
31213
 MAC_MODE_RXSTAT_CLEARMAC_MODE_RXSTAT_CLEAR 0x00001000 tg3.h 　
31214
 MAC_MODE_RXSTAT_FLUSHMAC_MODE_RXSTAT_FLUSH 0x00002000 tg3.h 　
31215
 MAC_MODE_TXSTAT_ENABLEMAC_MODE_TXSTAT_ENABLE 0x00004000 tg3.h 　
31216
 MAC_MODE_TXSTAT_CLEARMAC_MODE_TXSTAT_CLEAR 0x00008000 tg3.h 　
31217
 MAC_MODE_TXSTAT_FLUSHMAC_MODE_TXSTAT_FLUSH 0x00010000 tg3.h 　
31218
 MAC_MODE_SEND_CONFIGSMAC_MODE_SEND_CONFIGS 0x00020000 tg3.h 　
31219
 MAC_MODE_MAGIC_PKT_ENABLEMAC_MODE_MAGIC_PKT_ENABLE 0x00040000 tg3.h 　
31220
 MAC_MODE_ACPI_ENABLEMAC_MODE_ACPI_ENABLE 0x00080000 tg3.h 　
31221
 MAC_MODE_MIP_ENABLEMAC_MODE_MIP_ENABLE 0x00100000 tg3.h 　
31222
 MAC_MODE_TDE_ENABLEMAC_MODE_TDE_ENABLE 0x00200000 tg3.h 　
31223
 MAC_MODE_RDE_ENABLEMAC_MODE_RDE_ENABLE 0x00400000 tg3.h 　
31224
 MAC_MODE_FHDE_ENABLEMAC_MODE_FHDE_ENABLE 0x00800000 tg3.h 　
31225
 MAC_STATUSMAC_STATUS 0x00000404 tg3.h 　
31226
 MAC_STATUS_PCS_SYNCEDMAC_STATUS_PCS_SYNCED 0x00000001 tg3.h 　
31227
 MAC_STATUS_SIGNAL_DETMAC_STATUS_SIGNAL_DET 0x00000002 tg3.h 　
31228
 MAC_STATUS_RCVD_CFGMAC_STATUS_RCVD_CFG 0x00000004 tg3.h 　
31229
 MAC_STATUS_CFG_CHANGEDMAC_STATUS_CFG_CHANGED 0x00000008 tg3.h 　
31230
 MAC_STATUS_SYNC_CHANGEDMAC_STATUS_SYNC_CHANGED 0x00000010 tg3.h 　
31231
 MAC_STATUS_PORT_DEC_ERRMAC_STATUS_PORT_DEC_ERR 0x00000400 tg3.h 　
31232
 MAC_STATUS_LNKSTATE_CHANGEDMAC_STATUS_LNKSTATE_CHANGED 0x00001000 tg3.h 　
31233
 MAC_STATUS_MI_COMPLETIONMAC_STATUS_MI_COMPLETION 0x00400000 tg3.h 　
31234
 MAC_STATUS_MI_INTERRUPTMAC_STATUS_MI_INTERRUPT 0x00800000 tg3.h 　
31235
 MAC_STATUS_AP_ERRORMAC_STATUS_AP_ERROR 0x01000000 tg3.h 　
31236
 MAC_STATUS_ODI_ERRORMAC_STATUS_ODI_ERROR 0x02000000 tg3.h 　
31237
 MAC_STATUS_RXSTAT_OVERRUNMAC_STATUS_RXSTAT_OVERRUN 0x04000000 tg3.h 　
31238
 MAC_STATUS_TXSTAT_OVERRUNMAC_STATUS_TXSTAT_OVERRUN 0x08000000 tg3.h 　
31239
 MAC_EVENTMAC_EVENT 0x00000408 tg3.h 　
31240
 MAC_EVENT_PORT_DECODE_ERRMAC_EVENT_PORT_DECODE_ERR 0x00000400 tg3.h 　
31241
 MAC_EVENT_LNKSTATE_CHANGEDMAC_EVENT_LNKSTATE_CHANGED 0x00001000 tg3.h 　
31242
 MAC_EVENT_MI_COMPLETIONMAC_EVENT_MI_COMPLETION 0x00400000 tg3.h 　
31243
 MAC_EVENT_MI_INTERRUPTMAC_EVENT_MI_INTERRUPT 0x00800000 tg3.h 　
31244
 MAC_EVENT_AP_ERRORMAC_EVENT_AP_ERROR 0x01000000 tg3.h 　
31245
 MAC_EVENT_ODI_ERRORMAC_EVENT_ODI_ERROR 0x02000000 tg3.h 　
31246
 MAC_EVENT_RXSTAT_OVERRUNMAC_EVENT_RXSTAT_OVERRUN 0x04000000 tg3.h 　
31247
 MAC_EVENT_TXSTAT_OVERRUNMAC_EVENT_TXSTAT_OVERRUN 0x08000000 tg3.h 　
31248
 MAC_LED_CTRLMAC_LED_CTRL 0x0000040c tg3.h 　
31249
 LED_CTRL_LNKLED_OVERRIDELED_CTRL_LNKLED_OVERRIDE 0x00000001 tg3.h 　
31250
 LED_CTRL_1000MBPS_ONLED_CTRL_1000MBPS_ON 0x00000002 tg3.h 　
31251
 LED_CTRL_100MBPS_ONLED_CTRL_100MBPS_ON 0x00000004 tg3.h 　
31252
 LED_CTRL_10MBPS_ONLED_CTRL_10MBPS_ON 0x00000008 tg3.h 　
31253
 LED_CTRL_TRAFFIC_OVERRIDELED_CTRL_TRAFFIC_OVERRIDE 0x00000010 tg3.h 　
31254
 LED_CTRL_TRAFFIC_BLINKLED_CTRL_TRAFFIC_BLINK 0x00000020 tg3.h 　
31255
 LED_CTRL_TRAFFIC_LEDLED_CTRL_TRAFFIC_LED 0x00000040 tg3.h 　
31256
 LED_CTRL_1000MBPS_STATUSLED_CTRL_1000MBPS_STATUS 0x00000080 tg3.h 　
31257
 LED_CTRL_100MBPS_STATUSLED_CTRL_100MBPS_STATUS 0x00000100 tg3.h 　
31258
 LED_CTRL_10MBPS_STATUSLED_CTRL_10MBPS_STATUS 0x00000200 tg3.h 　
31259
 LED_CTRL_TRAFFIC_STATUSLED_CTRL_TRAFFIC_STATUS 0x00000400 tg3.h 　
31260
 LED_CTRL_MAC_MODELED_CTRL_MAC_MODE 0x00000000 tg3.h 　
31261
 LED_CTRL_PHY_MODE_1LED_CTRL_PHY_MODE_1 0x00000800 tg3.h 　
31262
 LED_CTRL_PHY_MODE_2LED_CTRL_PHY_MODE_2 0x00001000 tg3.h 　
31263
 LED_CTRL_BLINK_RATE_MASKLED_CTRL_BLINK_RATE_MASK 0x7ff80000 tg3.h 　
31264
 LED_CTRL_BLINK_RATE_SHIFTLED_CTRL_BLINK_RATE_SHIFT 19 tg3.h 　
31265
 LED_CTRL_BLINK_PER_OVERRIDELED_CTRL_BLINK_PER_OVERRIDE 0x00080000 tg3.h 　
31266
 LED_CTRL_BLINK_RATE_OVERRIDELED_CTRL_BLINK_RATE_OVERRIDE 0x80000000 tg3.h 　
31267
 MAC_ADDR_0_HIGHMAC_ADDR_0_HIGH 0x00000410 tg3.h upper 2 bytes
31268
 MAC_ADDR_0_LOWMAC_ADDR_0_LOW 0x00000414 tg3.h lower 4 bytes
31269
 MAC_ADDR_1_HIGHMAC_ADDR_1_HIGH 0x00000418 tg3.h upper 2 bytes
31270
 MAC_ADDR_1_LOWMAC_ADDR_1_LOW 0x0000041c tg3.h lower 4 bytes
31271
 MAC_ADDR_2_HIGHMAC_ADDR_2_HIGH 0x00000420 tg3.h upper 2 bytes
31272
 MAC_ADDR_2_LOWMAC_ADDR_2_LOW 0x00000424 tg3.h lower 4 bytes
31273
 MAC_ADDR_3_HIGHMAC_ADDR_3_HIGH 0x00000428 tg3.h upper 2 bytes
31274
 MAC_ADDR_3_LOWMAC_ADDR_3_LOW 0x0000042c tg3.h lower 4 bytes
31275
 MAC_ACPI_MBUF_PTRMAC_ACPI_MBUF_PTR 0x00000430 tg3.h 　
31276
 MAC_ACPI_LEN_OFFSETMAC_ACPI_LEN_OFFSET 0x00000434 tg3.h 　
31277
 ACPI_LENOFF_LEN_MASKACPI_LENOFF_LEN_MASK 0x0000ffff tg3.h 　
31278
 ACPI_LENOFF_LEN_SHIFTACPI_LENOFF_LEN_SHIFT 0 tg3.h 　
31279
 ACPI_LENOFF_OFF_MASKACPI_LENOFF_OFF_MASK 0x0fff0000 tg3.h 　
31280
 ACPI_LENOFF_OFF_SHIFTACPI_LENOFF_OFF_SHIFT 16 tg3.h 　
31281
 MAC_TX_BACKOFF_SEEDMAC_TX_BACKOFF_SEED 0x00000438 tg3.h 　
31282
 TX_BACKOFF_SEED_MASKTX_BACKOFF_SEED_MASK 0x000003ff tg3.h 　
31283
 MAC_RX_MTU_SIZEMAC_RX_MTU_SIZE 0x0000043c tg3.h 　
31284
 RX_MTU_SIZE_MASKRX_MTU_SIZE_MASK 0x0000ffff tg3.h 　
31285
 MAC_PCS_TESTMAC_PCS_TEST 0x00000440 tg3.h 　
31286
 PCS_TEST_PATTERN_MASKPCS_TEST_PATTERN_MASK 0x000fffff tg3.h 　
31287
 PCS_TEST_PATTERN_SHIFTPCS_TEST_PATTERN_SHIFT 0 tg3.h 　
31288
 PCS_TEST_ENABLEPCS_TEST_ENABLE 0x00100000 tg3.h 　
31289
 MAC_TX_AUTO_NEGMAC_TX_AUTO_NEG 0x00000444 tg3.h 　
31290
 TX_AUTO_NEG_MASKTX_AUTO_NEG_MASK 0x0000ffff tg3.h 　
31291
 TX_AUTO_NEG_SHIFTTX_AUTO_NEG_SHIFT 0 tg3.h 　
31292
 MAC_RX_AUTO_NEGMAC_RX_AUTO_NEG 0x00000448 tg3.h 　
31293
 RX_AUTO_NEG_MASKRX_AUTO_NEG_MASK 0x0000ffff tg3.h 　
31294
 RX_AUTO_NEG_SHIFTRX_AUTO_NEG_SHIFT 0 tg3.h 　
31295
 MAC_MI_COMMAC_MI_COM 0x0000044c tg3.h 　
31296
 MI_COM_CMD_MASKMI_COM_CMD_MASK 0x0c000000 tg3.h 　
31297
 MI_COM_CMD_WRITEMI_COM_CMD_WRITE 0x04000000 tg3.h 　
31298
 MI_COM_CMD_READMI_COM_CMD_READ 0x08000000 tg3.h 　
31299
 MI_COM_READ_FAILEDMI_COM_READ_FAILED 0x10000000 tg3.h 　
31300
 MI_COM_STARTMI_COM_START 0x20000000 tg3.h 　
31301
 MI_COM_BUSYMI_COM_BUSY 0x20000000 tg3.h 　
31302
 MI_COM_PHY_ADDR_MASKMI_COM_PHY_ADDR_MASK 0x03e00000 tg3.h 　
31303
 MI_COM_PHY_ADDR_SHIFTMI_COM_PHY_ADDR_SHIFT 21 tg3.h 　
31304
 MI_COM_REG_ADDR_MASKMI_COM_REG_ADDR_MASK 0x001f0000 tg3.h 　
31305
 MI_COM_REG_ADDR_SHIFTMI_COM_REG_ADDR_SHIFT 16 tg3.h 　
31306
 MI_COM_DATA_MASKMI_COM_DATA_MASK 0x0000ffff tg3.h 　
31307
 MAC_MI_STATMAC_MI_STAT 0x00000450 tg3.h 　
31308
 MAC_MI_STAT_LNKSTAT_ATTN_ENABMAC_MI_STAT_LNKSTAT_ATTN_ENAB 0x00000001 tg3.h 　
31309
 MAC_MI_MODEMAC_MI_MODE 0x00000454 tg3.h 　
31310
 MAC_MI_MODE_CLK_10MHZMAC_MI_MODE_CLK_10MHZ 0x00000001 tg3.h 　
31311
 MAC_MI_MODE_SHORT_PREAMBLEMAC_MI_MODE_SHORT_PREAMBLE 0x00000002 tg3.h 　
31312
 MAC_MI_MODE_AUTO_POLLMAC_MI_MODE_AUTO_POLL 0x00000010 tg3.h 　
31313
 MAC_MI_MODE_CORE_CLK_62MHZMAC_MI_MODE_CORE_CLK_62MHZ 0x00008000 tg3.h 　
31314
 MAC_MI_MODE_BASEMAC_MI_MODE_BASE 0x000c0000 tg3.h XXX magic values XXX
31315
 MAC_AUTO_POLL_STATUSMAC_AUTO_POLL_STATUS 0x00000458 tg3.h 　
31316
 MAC_AUTO_POLL_ERRORMAC_AUTO_POLL_ERROR 0x00000001 tg3.h 　
31317
 MAC_TX_MODEMAC_TX_MODE 0x0000045c tg3.h 　
31318
 TX_MODE_RESETTX_MODE_RESET 0x00000001 tg3.h 　
31319
 TX_MODE_ENABLETX_MODE_ENABLE 0x00000002 tg3.h 　
31320
 TX_MODE_FLOW_CTRL_ENABLETX_MODE_FLOW_CTRL_ENABLE 0x00000010 tg3.h 　
31321
 TX_MODE_BIG_BCKOFF_ENABLETX_MODE_BIG_BCKOFF_ENABLE 0x00000020 tg3.h 　
31322
 TX_MODE_LONG_PAUSE_ENABLETX_MODE_LONG_PAUSE_ENABLE 0x00000040 tg3.h 　
31323
 MAC_TX_STATUSMAC_TX_STATUS 0x00000460 tg3.h 　
31324
 TX_STATUS_XOFFEDTX_STATUS_XOFFED 0x00000001 tg3.h 　
31325
 TX_STATUS_SENT_XOFFTX_STATUS_SENT_XOFF 0x00000002 tg3.h 　
31326
 TX_STATUS_SENT_XONTX_STATUS_SENT_XON 0x00000004 tg3.h 　
31327
 TX_STATUS_LINK_UPTX_STATUS_LINK_UP 0x00000008 tg3.h 　
31328
 TX_STATUS_ODI_UNDERRUNTX_STATUS_ODI_UNDERRUN 0x00000010 tg3.h 　
31329
 TX_STATUS_ODI_OVERRUNTX_STATUS_ODI_OVERRUN 0x00000020 tg3.h 　
31330
 MAC_TX_LENGTHSMAC_TX_LENGTHS 0x00000464 tg3.h 　
31331
 TX_LENGTHS_SLOT_TIME_MASKTX_LENGTHS_SLOT_TIME_MASK 0x000000ff tg3.h 　
31332
 TX_LENGTHS_SLOT_TIME_SHIFTTX_LENGTHS_SLOT_TIME_SHIFT 0 tg3.h 　
31333
 TX_LENGTHS_IPG_MASKTX_LENGTHS_IPG_MASK 0x00000f00 tg3.h 　
31334
 TX_LENGTHS_IPG_SHIFTTX_LENGTHS_IPG_SHIFT 8 tg3.h 　
31335
 TX_LENGTHS_IPG_CRS_MASKTX_LENGTHS_IPG_CRS_MASK 0x00003000 tg3.h 　
31336
 TX_LENGTHS_IPG_CRS_SHIFTTX_LENGTHS_IPG_CRS_SHIFT 12 tg3.h 　
31337
 MAC_RX_MODEMAC_RX_MODE 0x00000468 tg3.h 　
31338
 RX_MODE_RESETRX_MODE_RESET 0x00000001 tg3.h 　
31339
 RX_MODE_ENABLERX_MODE_ENABLE 0x00000002 tg3.h 　
31340
 RX_MODE_FLOW_CTRL_ENABLERX_MODE_FLOW_CTRL_ENABLE 0x00000004 tg3.h 　
31341
 RX_MODE_KEEP_MAC_CTRLRX_MODE_KEEP_MAC_CTRL 0x00000008 tg3.h 　
31342
 RX_MODE_KEEP_PAUSERX_MODE_KEEP_PAUSE 0x00000010 tg3.h 　
31343
 RX_MODE_ACCEPT_OVERSIZEDRX_MODE_ACCEPT_OVERSIZED 0x00000020 tg3.h 　
31344
 RX_MODE_ACCEPT_RUNTSRX_MODE_ACCEPT_RUNTS 0x00000040 tg3.h 　
31345
 RX_MODE_LEN_CHECKRX_MODE_LEN_CHECK 0x00000080 tg3.h 　
31346
 RX_MODE_PROMISCRX_MODE_PROMISC 0x00000100 tg3.h 　
31347
 RX_MODE_NO_CRC_CHECKRX_MODE_NO_CRC_CHECK 0x00000200 tg3.h 　
31348
 RX_MODE_KEEP_VLAN_TAGRX_MODE_KEEP_VLAN_TAG 0x00000400 tg3.h 　
31349
 MAC_RX_STATUSMAC_RX_STATUS 0x0000046c tg3.h 　
31350
 RX_STATUS_REMOTE_TX_XOFFEDRX_STATUS_REMOTE_TX_XOFFED 0x00000001 tg3.h 　
31351
 RX_STATUS_XOFF_RCVDRX_STATUS_XOFF_RCVD 0x00000002 tg3.h 　
31352
 RX_STATUS_XON_RCVDRX_STATUS_XON_RCVD 0x00000004 tg3.h 　
31353
 MAC_HASH_REG_0MAC_HASH_REG_0 0x00000470 tg3.h 　
31354
 MAC_HASH_REG_1MAC_HASH_REG_1 0x00000474 tg3.h 　
31355
 MAC_HASH_REG_2MAC_HASH_REG_2 0x00000478 tg3.h 　
31356
 MAC_HASH_REG_3MAC_HASH_REG_3 0x0000047c tg3.h 　
31357
 MAC_RCV_RULE_0MAC_RCV_RULE_0 0x00000480 tg3.h 　
31358
 MAC_RCV_VALUE_0MAC_RCV_VALUE_0 0x00000484 tg3.h 　
31359
 MAC_RCV_RULE_1MAC_RCV_RULE_1 0x00000488 tg3.h 　
31360
 MAC_RCV_VALUE_1MAC_RCV_VALUE_1 0x0000048c tg3.h 　
31361
 MAC_RCV_RULE_2MAC_RCV_RULE_2 0x00000490 tg3.h 　
31362
 MAC_RCV_VALUE_2MAC_RCV_VALUE_2 0x00000494 tg3.h 　
31363
 MAC_RCV_RULE_3MAC_RCV_RULE_3 0x00000498 tg3.h 　
31364
 MAC_RCV_VALUE_3MAC_RCV_VALUE_3 0x0000049c tg3.h 　
31365
 MAC_RCV_RULE_4MAC_RCV_RULE_4 0x000004a0 tg3.h 　
31366
 MAC_RCV_VALUE_4MAC_RCV_VALUE_4 0x000004a4 tg3.h 　
31367
 MAC_RCV_RULE_5MAC_RCV_RULE_5 0x000004a8 tg3.h 　
31368
 MAC_RCV_VALUE_5MAC_RCV_VALUE_5 0x000004ac tg3.h 　
31369
 MAC_RCV_RULE_6MAC_RCV_RULE_6 0x000004b0 tg3.h 　
31370
 MAC_RCV_VALUE_6MAC_RCV_VALUE_6 0x000004b4 tg3.h 　
31371
 MAC_RCV_RULE_7MAC_RCV_RULE_7 0x000004b8 tg3.h 　
31372
 MAC_RCV_VALUE_7MAC_RCV_VALUE_7 0x000004bc tg3.h 　
31373
 MAC_RCV_RULE_8MAC_RCV_RULE_8 0x000004c0 tg3.h 　
31374
 MAC_RCV_VALUE_8MAC_RCV_VALUE_8 0x000004c4 tg3.h 　
31375
 MAC_RCV_RULE_9MAC_RCV_RULE_9 0x000004c8 tg3.h 　
31376
 MAC_RCV_VALUE_9MAC_RCV_VALUE_9 0x000004cc tg3.h 　
31377
 MAC_RCV_RULE_10MAC_RCV_RULE_10 0x000004d0 tg3.h 　
31378
 MAC_RCV_VALUE_10MAC_RCV_VALUE_10 0x000004d4 tg3.h 　
31379
 MAC_RCV_RULE_11MAC_RCV_RULE_11 0x000004d8 tg3.h 　
31380
 MAC_RCV_VALUE_11MAC_RCV_VALUE_11 0x000004dc tg3.h 　
31381
 MAC_RCV_RULE_12MAC_RCV_RULE_12 0x000004e0 tg3.h 　
31382
 MAC_RCV_VALUE_12MAC_RCV_VALUE_12 0x000004e4 tg3.h 　
31383
 MAC_RCV_RULE_13MAC_RCV_RULE_13 0x000004e8 tg3.h 　
31384
 MAC_RCV_VALUE_13MAC_RCV_VALUE_13 0x000004ec tg3.h 　
31385
 MAC_RCV_RULE_14MAC_RCV_RULE_14 0x000004f0 tg3.h 　
31386
 MAC_RCV_VALUE_14MAC_RCV_VALUE_14 0x000004f4 tg3.h 　
31387
 MAC_RCV_RULE_15MAC_RCV_RULE_15 0x000004f8 tg3.h 　
31388
 MAC_RCV_VALUE_15MAC_RCV_VALUE_15 0x000004fc tg3.h 　
31389
 RCV_RULE_DISABLE_MASKRCV_RULE_DISABLE_MASK 0x7fffffff tg3.h 　
31390
 MAC_RCV_RULE_CFGMAC_RCV_RULE_CFG 0x00000500 tg3.h 　
31391
 RCV_RULE_CFG_DEFAULT_CLASSRCV_RULE_CFG_DEFAULT_CLASS 0x00000008 tg3.h 　
31392
 MAC_LOW_WMARK_MAX_RX_FRAMEMAC_LOW_WMARK_MAX_RX_FRAME 0x00000504 tg3.h 　
31393
 MAC_HASHREGU_0MAC_HASHREGU_0 0x00000520 tg3.h 　
31394
 MAC_HASHREGU_1MAC_HASHREGU_1 0x00000524 tg3.h 　
31395
 MAC_HASHREGU_2MAC_HASHREGU_2 0x00000528 tg3.h 　
31396
 MAC_HASHREGU_3MAC_HASHREGU_3 0x0000052c tg3.h 　
31397
 MAC_EXTADDR_0_HIGHMAC_EXTADDR_0_HIGH 0x00000530 tg3.h 　
31398
 MAC_EXTADDR_0_LOWMAC_EXTADDR_0_LOW 0x00000534 tg3.h 　
31399
 MAC_EXTADDR_1_HIGHMAC_EXTADDR_1_HIGH 0x00000538 tg3.h 　
31400
 MAC_EXTADDR_1_LOWMAC_EXTADDR_1_LOW 0x0000053c tg3.h 　
31401
 MAC_EXTADDR_2_HIGHMAC_EXTADDR_2_HIGH 0x00000540 tg3.h 　
31402
 MAC_EXTADDR_2_LOWMAC_EXTADDR_2_LOW 0x00000544 tg3.h 　
31403
 MAC_EXTADDR_3_HIGHMAC_EXTADDR_3_HIGH 0x00000548 tg3.h 　
31404
 MAC_EXTADDR_3_LOWMAC_EXTADDR_3_LOW 0x0000054c tg3.h 　
31405
 MAC_EXTADDR_4_HIGHMAC_EXTADDR_4_HIGH 0x00000550 tg3.h 　
31406
 MAC_EXTADDR_4_LOWMAC_EXTADDR_4_LOW 0x00000554 tg3.h 　
31407
 MAC_EXTADDR_5_HIGHMAC_EXTADDR_5_HIGH 0x00000558 tg3.h 　
31408
 MAC_EXTADDR_5_LOWMAC_EXTADDR_5_LOW 0x0000055c tg3.h 　
31409
 MAC_EXTADDR_6_HIGHMAC_EXTADDR_6_HIGH 0x00000560 tg3.h 　
31410
 MAC_EXTADDR_6_LOWMAC_EXTADDR_6_LOW 0x00000564 tg3.h 　
31411
 MAC_EXTADDR_7_HIGHMAC_EXTADDR_7_HIGH 0x00000568 tg3.h 　
31412
 MAC_EXTADDR_7_LOWMAC_EXTADDR_7_LOW 0x0000056c tg3.h 　
31413
 MAC_EXTADDR_8_HIGHMAC_EXTADDR_8_HIGH 0x00000570 tg3.h 　
31414
 MAC_EXTADDR_8_LOWMAC_EXTADDR_8_LOW 0x00000574 tg3.h 　
31415
 MAC_EXTADDR_9_HIGHMAC_EXTADDR_9_HIGH 0x00000578 tg3.h 　
31416
 MAC_EXTADDR_9_LOWMAC_EXTADDR_9_LOW 0x0000057c tg3.h 　
31417
 MAC_EXTADDR_10_HIGHMAC_EXTADDR_10_HIGH 0x00000580 tg3.h 　
31418
 MAC_EXTADDR_10_LOWMAC_EXTADDR_10_LOW 0x00000584 tg3.h 　
31419
 MAC_EXTADDR_11_HIGHMAC_EXTADDR_11_HIGH 0x00000588 tg3.h 　
31420
 MAC_EXTADDR_11_LOWMAC_EXTADDR_11_LOW 0x0000058c tg3.h 　
31421
 MAC_SERDES_CFGMAC_SERDES_CFG 0x00000590 tg3.h 　
31422
 MAC_SERDES_STATMAC_SERDES_STAT 0x00000594 tg3.h 　
31423
 MAC_TX_MAC_STATE_BASEMAC_TX_MAC_STATE_BASE 0x00000600 tg3.h 16 bytes
31424
 MAC_RX_MAC_STATE_BASEMAC_RX_MAC_STATE_BASE 0x00000610 tg3.h 20 bytes
31425
 MAC_TX_STATS_OCTETSMAC_TX_STATS_OCTETS 0x00000800 tg3.h 　
31426
 MAC_TX_STATS_RESV1MAC_TX_STATS_RESV1 0x00000804 tg3.h 　
31427
 MAC_TX_STATS_COLLISIONSMAC_TX_STATS_COLLISIONS 0x00000808 tg3.h 　
31428
 MAC_TX_STATS_XON_SENTMAC_TX_STATS_XON_SENT 0x0000080c tg3.h 　
31429
 MAC_TX_STATS_XOFF_SENTMAC_TX_STATS_XOFF_SENT 0x00000810 tg3.h 　
31430
 MAC_TX_STATS_RESV2MAC_TX_STATS_RESV2 0x00000814 tg3.h 　
31431
 MAC_TX_STATS_MAC_ERRORSMAC_TX_STATS_MAC_ERRORS 0x00000818 tg3.h 　
31432
 MAC_TX_STATS_SINGLE_COLLISIONSMAC_TX_STATS_SINGLE_COLLISIONS 0x0000081c tg3.h 　
31433
 MAC_TX_STATS_MULT_COLLISIONSMAC_TX_STATS_MULT_COLLISIONS 0x00000820 tg3.h 　
31434
 MAC_TX_STATS_DEFERREDMAC_TX_STATS_DEFERRED 0x00000824 tg3.h 　
31435
 MAC_TX_STATS_RESV3MAC_TX_STATS_RESV3 0x00000828 tg3.h 　
31436
 MAC_TX_STATS_EXCESSIVE_COLMAC_TX_STATS_EXCESSIVE_COL 0x0000082c tg3.h 　
31437
 MAC_TX_STATS_LATE_COLMAC_TX_STATS_LATE_COL 0x00000830 tg3.h 　
31438
 MAC_TX_STATS_RESV4_1MAC_TX_STATS_RESV4_1 0x00000834 tg3.h 　
31439
 MAC_TX_STATS_RESV4_2MAC_TX_STATS_RESV4_2 0x00000838 tg3.h 　
31440
 MAC_TX_STATS_RESV4_3MAC_TX_STATS_RESV4_3 0x0000083c tg3.h 　
31441
 MAC_TX_STATS_RESV4_4MAC_TX_STATS_RESV4_4 0x00000840 tg3.h 　
31442
 MAC_TX_STATS_RESV4_5MAC_TX_STATS_RESV4_5 0x00000844 tg3.h 　
31443
 MAC_TX_STATS_RESV4_6MAC_TX_STATS_RESV4_6 0x00000848 tg3.h 　
31444
 MAC_TX_STATS_RESV4_7MAC_TX_STATS_RESV4_7 0x0000084c tg3.h 　
31445
 MAC_TX_STATS_RESV4_8MAC_TX_STATS_RESV4_8 0x00000850 tg3.h 　
31446
 MAC_TX_STATS_RESV4_9MAC_TX_STATS_RESV4_9 0x00000854 tg3.h 　
31447
 MAC_TX_STATS_RESV4_10MAC_TX_STATS_RESV4_10 0x00000858 tg3.h 　
31448
 MAC_TX_STATS_RESV4_11MAC_TX_STATS_RESV4_11 0x0000085c tg3.h 　
31449
 MAC_TX_STATS_RESV4_12MAC_TX_STATS_RESV4_12 0x00000860 tg3.h 　
31450
 MAC_TX_STATS_RESV4_13MAC_TX_STATS_RESV4_13 0x00000864 tg3.h 　
31451
 MAC_TX_STATS_RESV4_14MAC_TX_STATS_RESV4_14 0x00000868 tg3.h 　
31452
 MAC_TX_STATS_UCASTMAC_TX_STATS_UCAST 0x0000086c tg3.h 　
31453
 MAC_TX_STATS_MCASTMAC_TX_STATS_MCAST 0x00000870 tg3.h 　
31454
 MAC_TX_STATS_BCASTMAC_TX_STATS_BCAST 0x00000874 tg3.h 　
31455
 MAC_TX_STATS_RESV5_1MAC_TX_STATS_RESV5_1 0x00000878 tg3.h 　
31456
 MAC_TX_STATS_RESV5_2MAC_TX_STATS_RESV5_2 0x0000087c tg3.h 　
31457
 MAC_RX_STATS_OCTETSMAC_RX_STATS_OCTETS 0x00000880 tg3.h 　
31458
 MAC_RX_STATS_RESV1MAC_RX_STATS_RESV1 0x00000884 tg3.h 　
31459
 MAC_RX_STATS_FRAGMENTSMAC_RX_STATS_FRAGMENTS 0x00000888 tg3.h 　
31460
 MAC_RX_STATS_UCASTMAC_RX_STATS_UCAST 0x0000088c tg3.h 　
31461
 MAC_RX_STATS_MCASTMAC_RX_STATS_MCAST 0x00000890 tg3.h 　
31462
 MAC_RX_STATS_BCASTMAC_RX_STATS_BCAST 0x00000894 tg3.h 　
31463
 MAC_RX_STATS_FCS_ERRORSMAC_RX_STATS_FCS_ERRORS 0x00000898 tg3.h 　
31464
 MAC_RX_STATS_ALIGN_ERRORSMAC_RX_STATS_ALIGN_ERRORS 0x0000089c tg3.h 　
31465
 MAC_RX_STATS_XON_PAUSE_RECVDMAC_RX_STATS_XON_PAUSE_RECVD 0x000008a0 tg3.h 　
31466
 MAC_RX_STATS_XOFF_PAUSE_RECVDMAC_RX_STATS_XOFF_PAUSE_RECVD 0x000008a4 tg3.h 　
31467
 MAC_RX_STATS_MAC_CTRL_RECVDMAC_RX_STATS_MAC_CTRL_RECVD 0x000008a8 tg3.h 　
31468
 MAC_RX_STATS_XOFF_ENTEREDMAC_RX_STATS_XOFF_ENTERED 0x000008ac tg3.h 　
31469
 MAC_RX_STATS_FRAME_TOO_LONGMAC_RX_STATS_FRAME_TOO_LONG 0x000008b0 tg3.h 　
31470
 MAC_RX_STATS_JABBERSMAC_RX_STATS_JABBERS 0x000008b4 tg3.h 　
31471
 MAC_RX_STATS_UNDERSIZEMAC_RX_STATS_UNDERSIZE 0x000008b8 tg3.h 　
31472
 SNDDATAI_MODESNDDATAI_MODE 0x00000c00 tg3.h 　
31473
 SNDDATAI_MODE_RESETSNDDATAI_MODE_RESET 0x00000001 tg3.h 　
31474
 SNDDATAI_MODE_ENABLESNDDATAI_MODE_ENABLE 0x00000002 tg3.h 　
31475
 SNDDATAI_MODE_STAT_OFLOW_ENABSNDDATAI_MODE_STAT_OFLOW_ENAB 0x00000004 tg3.h 　
31476
 SNDDATAI_STATUSSNDDATAI_STATUS 0x00000c04 tg3.h 　
31477
 SNDDATAI_STATUS_STAT_OFLOWSNDDATAI_STATUS_STAT_OFLOW 0x00000004 tg3.h 　
31478
 SNDDATAI_STATSCTRLSNDDATAI_STATSCTRL 0x00000c08 tg3.h 　
31479
 SNDDATAI_SCTRL_ENABLESNDDATAI_SCTRL_ENABLE 0x00000001 tg3.h 　
31480
 SNDDATAI_SCTRL_FASTUPDSNDDATAI_SCTRL_FASTUPD 0x00000002 tg3.h 　
31481
 SNDDATAI_SCTRL_CLEARSNDDATAI_SCTRL_CLEAR 0x00000004 tg3.h 　
31482
 SNDDATAI_SCTRL_FLUSHSNDDATAI_SCTRL_FLUSH 0x00000008 tg3.h 　
31483
 SNDDATAI_SCTRL_FORCE_ZEROSNDDATAI_SCTRL_FORCE_ZERO 0x00000010 tg3.h 　
31484
 SNDDATAI_STATSENABSNDDATAI_STATSENAB 0x00000c0c tg3.h 　
31485
 SNDDATAI_STATSINCMASKSNDDATAI_STATSINCMASK 0x00000c10 tg3.h 　
31486
 SNDDATAI_COS_CNT_0SNDDATAI_COS_CNT_0 0x00000c80 tg3.h 　
31487
 SNDDATAI_COS_CNT_1SNDDATAI_COS_CNT_1 0x00000c84 tg3.h 　
31488
 SNDDATAI_COS_CNT_2SNDDATAI_COS_CNT_2 0x00000c88 tg3.h 　
31489
 SNDDATAI_COS_CNT_3SNDDATAI_COS_CNT_3 0x00000c8c tg3.h 　
31490
 SNDDATAI_COS_CNT_4SNDDATAI_COS_CNT_4 0x00000c90 tg3.h 　
31491
 SNDDATAI_COS_CNT_5SNDDATAI_COS_CNT_5 0x00000c94 tg3.h 　
31492
 SNDDATAI_COS_CNT_6SNDDATAI_COS_CNT_6 0x00000c98 tg3.h 　
31493
 SNDDATAI_COS_CNT_7SNDDATAI_COS_CNT_7 0x00000c9c tg3.h 　
31494
 SNDDATAI_COS_CNT_8SNDDATAI_COS_CNT_8 0x00000ca0 tg3.h 　
31495
 SNDDATAI_COS_CNT_9SNDDATAI_COS_CNT_9 0x00000ca4 tg3.h 　
31496
 SNDDATAI_COS_CNT_10SNDDATAI_COS_CNT_10 0x00000ca8 tg3.h 　
31497
 SNDDATAI_COS_CNT_11SNDDATAI_COS_CNT_11 0x00000cac tg3.h 　
31498
 SNDDATAI_COS_CNT_12SNDDATAI_COS_CNT_12 0x00000cb0 tg3.h 　
31499
 SNDDATAI_COS_CNT_13SNDDATAI_COS_CNT_13 0x00000cb4 tg3.h 　
31500
 SNDDATAI_COS_CNT_14SNDDATAI_COS_CNT_14 0x00000cb8 tg3.h 　
31501
 SNDDATAI_COS_CNT_15SNDDATAI_COS_CNT_15 0x00000cbc tg3.h 　
31502
 SNDDATAI_DMA_RDQ_FULL_CNTSNDDATAI_DMA_RDQ_FULL_CNT 0x00000cc0 tg3.h 　
31503
 SNDDATAI_DMA_PRIO_RDQ_FULL_CNTSNDDATAI_DMA_PRIO_RDQ_FULL_CNT 0x00000cc4 tg3.h 　
31504
 SNDDATAI_SDCQ_FULL_CNTSNDDATAI_SDCQ_FULL_CNT 0x00000cc8 tg3.h 　
31505
 SNDDATAI_NICRNG_SSND_PIDX_CNTSNDDATAI_NICRNG_SSND_PIDX_CNT 0x00000ccc tg3.h 　
31506
 SNDDATAI_STATS_UPDATED_CNTSNDDATAI_STATS_UPDATED_CNT 0x00000cd0 tg3.h 　
31507
 SNDDATAI_INTERRUPTS_CNTSNDDATAI_INTERRUPTS_CNT 0x00000cd4 tg3.h 　
31508
 SNDDATAI_AVOID_INTERRUPTS_CNTSNDDATAI_AVOID_INTERRUPTS_CNT 0x00000cd8 tg3.h 　
31509
 SNDDATAI_SND_THRESH_HIT_CNTSNDDATAI_SND_THRESH_HIT_CNT 0x00000cdc tg3.h 　
31510
 SNDDATAC_MODESNDDATAC_MODE 0x00001000 tg3.h 　
31511
 SNDDATAC_MODE_RESETSNDDATAC_MODE_RESET 0x00000001 tg3.h 　
31512
 SNDDATAC_MODE_ENABLESNDDATAC_MODE_ENABLE 0x00000002 tg3.h 　
31513
 SNDBDS_MODESNDBDS_MODE 0x00001400 tg3.h 　
31514
 SNDBDS_MODE_RESETSNDBDS_MODE_RESET 0x00000001 tg3.h 　
31515
 SNDBDS_MODE_ENABLESNDBDS_MODE_ENABLE 0x00000002 tg3.h 　
31516
 SNDBDS_MODE_ATTN_ENABLESNDBDS_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
31517
 SNDBDS_STATUSSNDBDS_STATUS 0x00001404 tg3.h 　
31518
 SNDBDS_STATUS_ERROR_ATTNSNDBDS_STATUS_ERROR_ATTN 0x00000004 tg3.h 　
31519
 SNDBDS_HWDIAGSNDBDS_HWDIAG 0x00001408 tg3.h 　
31520
 SNDBDS_SEL_CON_IDX_0SNDBDS_SEL_CON_IDX_0 0x00001440 tg3.h 　
31521
 SNDBDS_SEL_CON_IDX_1SNDBDS_SEL_CON_IDX_1 0x00001444 tg3.h 　
31522
 SNDBDS_SEL_CON_IDX_2SNDBDS_SEL_CON_IDX_2 0x00001448 tg3.h 　
31523
 SNDBDS_SEL_CON_IDX_3SNDBDS_SEL_CON_IDX_3 0x0000144c tg3.h 　
31524
 SNDBDS_SEL_CON_IDX_4SNDBDS_SEL_CON_IDX_4 0x00001450 tg3.h 　
31525
 SNDBDS_SEL_CON_IDX_5SNDBDS_SEL_CON_IDX_5 0x00001454 tg3.h 　
31526
 SNDBDS_SEL_CON_IDX_6SNDBDS_SEL_CON_IDX_6 0x00001458 tg3.h 　
31527
 SNDBDS_SEL_CON_IDX_7SNDBDS_SEL_CON_IDX_7 0x0000145c tg3.h 　
31528
 SNDBDS_SEL_CON_IDX_8SNDBDS_SEL_CON_IDX_8 0x00001460 tg3.h 　
31529
 SNDBDS_SEL_CON_IDX_9SNDBDS_SEL_CON_IDX_9 0x00001464 tg3.h 　
31530
 SNDBDS_SEL_CON_IDX_10SNDBDS_SEL_CON_IDX_10 0x00001468 tg3.h 　
31531
 SNDBDS_SEL_CON_IDX_11SNDBDS_SEL_CON_IDX_11 0x0000146c tg3.h 　
31532
 SNDBDS_SEL_CON_IDX_12SNDBDS_SEL_CON_IDX_12 0x00001470 tg3.h 　
31533
 SNDBDS_SEL_CON_IDX_13SNDBDS_SEL_CON_IDX_13 0x00001474 tg3.h 　
31534
 SNDBDS_SEL_CON_IDX_14SNDBDS_SEL_CON_IDX_14 0x00001478 tg3.h 　
31535
 SNDBDS_SEL_CON_IDX_15SNDBDS_SEL_CON_IDX_15 0x0000147c tg3.h 　
31536
 SNDBDI_MODESNDBDI_MODE 0x00001800 tg3.h 　
31537
 SNDBDI_MODE_RESETSNDBDI_MODE_RESET 0x00000001 tg3.h 　
31538
 SNDBDI_MODE_ENABLESNDBDI_MODE_ENABLE 0x00000002 tg3.h 　
31539
 SNDBDI_MODE_ATTN_ENABLESNDBDI_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
31540
 SNDBDI_STATUSSNDBDI_STATUS 0x00001804 tg3.h 　
31541
 SNDBDI_STATUS_ERROR_ATTNSNDBDI_STATUS_ERROR_ATTN 0x00000004 tg3.h 　
31542
 SNDBDI_IN_PROD_IDX_0SNDBDI_IN_PROD_IDX_0 0x00001808 tg3.h 　
31543
 SNDBDI_IN_PROD_IDX_1SNDBDI_IN_PROD_IDX_1 0x0000180c tg3.h 　
31544
 SNDBDI_IN_PROD_IDX_2SNDBDI_IN_PROD_IDX_2 0x00001810 tg3.h 　
31545
 SNDBDI_IN_PROD_IDX_3SNDBDI_IN_PROD_IDX_3 0x00001814 tg3.h 　
31546
 SNDBDI_IN_PROD_IDX_4SNDBDI_IN_PROD_IDX_4 0x00001818 tg3.h 　
31547
 SNDBDI_IN_PROD_IDX_5SNDBDI_IN_PROD_IDX_5 0x0000181c tg3.h 　
31548
 SNDBDI_IN_PROD_IDX_6SNDBDI_IN_PROD_IDX_6 0x00001820 tg3.h 　
31549
 SNDBDI_IN_PROD_IDX_7SNDBDI_IN_PROD_IDX_7 0x00001824 tg3.h 　
31550
 SNDBDI_IN_PROD_IDX_8SNDBDI_IN_PROD_IDX_8 0x00001828 tg3.h 　
31551
 SNDBDI_IN_PROD_IDX_9SNDBDI_IN_PROD_IDX_9 0x0000182c tg3.h 　
31552
 SNDBDI_IN_PROD_IDX_10SNDBDI_IN_PROD_IDX_10 0x00001830 tg3.h 　
31553
 SNDBDI_IN_PROD_IDX_11SNDBDI_IN_PROD_IDX_11 0x00001834 tg3.h 　
31554
 SNDBDI_IN_PROD_IDX_12SNDBDI_IN_PROD_IDX_12 0x00001838 tg3.h 　
31555
 SNDBDI_IN_PROD_IDX_13SNDBDI_IN_PROD_IDX_13 0x0000183c tg3.h 　
31556
 SNDBDI_IN_PROD_IDX_14SNDBDI_IN_PROD_IDX_14 0x00001840 tg3.h 　
31557
 SNDBDI_IN_PROD_IDX_15SNDBDI_IN_PROD_IDX_15 0x00001844 tg3.h 　
31558
 SNDBDC_MODESNDBDC_MODE 0x00001c00 tg3.h 　
31559
 SNDBDC_MODE_RESETSNDBDC_MODE_RESET 0x00000001 tg3.h 　
31560
 SNDBDC_MODE_ENABLESNDBDC_MODE_ENABLE 0x00000002 tg3.h 　
31561
 SNDBDC_MODE_ATTN_ENABLESNDBDC_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
31562
 RCVLPC_MODERCVLPC_MODE 0x00002000 tg3.h 　
31563
 RCVLPC_MODE_RESETRCVLPC_MODE_RESET 0x00000001 tg3.h 　
31564
 RCVLPC_MODE_ENABLERCVLPC_MODE_ENABLE 0x00000002 tg3.h 　
31565
 RCVLPC_MODE_CLASS0_ATTN_ENABRCVLPC_MODE_CLASS0_ATTN_ENAB 0x00000004 tg3.h 　
31566
 RCVLPC_MODE_MAPOOR_AATTN_ENABRCVLPC_MODE_MAPOOR_AATTN_ENAB 0x00000008 tg3.h 　
31567
 RCVLPC_MODE_STAT_OFLOW_ENABRCVLPC_MODE_STAT_OFLOW_ENAB 0x00000010 tg3.h 　
31568
 RCVLPC_STATUSRCVLPC_STATUS 0x00002004 tg3.h 　
31569
 RCVLPC_STATUS_CLASS0RCVLPC_STATUS_CLASS0 0x00000004 tg3.h 　
31570
 RCVLPC_STATUS_MAPOORRCVLPC_STATUS_MAPOOR 0x00000008 tg3.h 　
31571
 RCVLPC_STATUS_STAT_OFLOWRCVLPC_STATUS_STAT_OFLOW 0x00000010 tg3.h 　
31572
 RCVLPC_LOCKRCVLPC_LOCK 0x00002008 tg3.h 　
31573
 RCVLPC_LOCK_REQ_MASKRCVLPC_LOCK_REQ_MASK 0x0000ffff tg3.h 　
31574
 RCVLPC_LOCK_REQ_SHIFTRCVLPC_LOCK_REQ_SHIFT 0 tg3.h 　
31575
 RCVLPC_LOCK_GRANT_MASKRCVLPC_LOCK_GRANT_MASK 0xffff0000 tg3.h 　
31576
 RCVLPC_LOCK_GRANT_SHIFTRCVLPC_LOCK_GRANT_SHIFT 16 tg3.h 　
31577
 RCVLPC_NON_EMPTY_BITSRCVLPC_NON_EMPTY_BITS 0x0000200c tg3.h 　
31578
 RCVLPC_NON_EMPTY_BITS_MASKRCVLPC_NON_EMPTY_BITS_MASK 0x0000ffff tg3.h 　
31579
 RCVLPC_CONFIGRCVLPC_CONFIG 0x00002010 tg3.h 　
31580
 RCVLPC_STATSCTRLRCVLPC_STATSCTRL 0x00002014 tg3.h 　
31581
 RCVLPC_STATSCTRL_ENABLERCVLPC_STATSCTRL_ENABLE 0x00000001 tg3.h 　
31582
 RCVLPC_STATSCTRL_FASTUPDRCVLPC_STATSCTRL_FASTUPD 0x00000002 tg3.h 　
31583
 RCVLPC_STATS_ENABLERCVLPC_STATS_ENABLE 0x00002018 tg3.h 　
31584
 RCVLPC_STATSENAB_LNGBRST_RFIXRCVLPC_STATSENAB_LNGBRST_RFIX 0x00400000 tg3.h 　
31585
 RCVLPC_STATS_INCMASKRCVLPC_STATS_INCMASK 0x0000201c tg3.h 　
31586
 RCVLPC_SELLST_BASERCVLPC_SELLST_BASE 0x00002100 tg3.h 16 16-byte entries
31587
 SELLST_TAILSELLST_TAIL 0x00000004 tg3.h 　
31588
 SELLST_CONTSELLST_CONT 0x00000008 tg3.h 　
31589
 SELLST_UNUSEDSELLST_UNUSED 0x0000000c tg3.h 　
31590
 RCVLPC_COS_CNTL_BASERCVLPC_COS_CNTL_BASE 0x00002200 tg3.h 16 4-byte entries
31591
 RCVLPC_DROP_FILTER_CNTRCVLPC_DROP_FILTER_CNT 0x00002240 tg3.h 　
31592
 RCVLPC_DMA_WQ_FULL_CNTRCVLPC_DMA_WQ_FULL_CNT 0x00002244 tg3.h 　
31593
 RCVLPC_DMA_HIPRIO_WQ_FULL_CNTRCVLPC_DMA_HIPRIO_WQ_FULL_CNT 0x00002248 tg3.h 　
31594
 RCVLPC_NO_RCV_BD_CNTRCVLPC_NO_RCV_BD_CNT 0x0000224c tg3.h 　
31595
 RCVLPC_IN_DISCARDS_CNTRCVLPC_IN_DISCARDS_CNT 0x00002250 tg3.h 　
31596
 RCVLPC_IN_ERRORS_CNTRCVLPC_IN_ERRORS_CNT 0x00002254 tg3.h 　
31597
 RCVLPC_RCV_THRESH_HIT_CNTRCVLPC_RCV_THRESH_HIT_CNT 0x00002258 tg3.h 　
31598
 RCVDBDI_MODERCVDBDI_MODE 0x00002400 tg3.h 　
31599
 RCVDBDI_MODE_RESETRCVDBDI_MODE_RESET 0x00000001 tg3.h 　
31600
 RCVDBDI_MODE_ENABLERCVDBDI_MODE_ENABLE 0x00000002 tg3.h 　
31601
 RCVDBDI_MODE_JUMBOBD_NEEDEDRCVDBDI_MODE_JUMBOBD_NEEDED 0x00000004 tg3.h 　
31602
 RCVDBDI_MODE_FRM_TOO_BIGRCVDBDI_MODE_FRM_TOO_BIG 0x00000008 tg3.h 　
31603
 RCVDBDI_MODE_INV_RING_SZRCVDBDI_MODE_INV_RING_SZ 0x00000010 tg3.h 　
31604
 RCVDBDI_STATUSRCVDBDI_STATUS 0x00002404 tg3.h 　
31605
 RCVDBDI_STATUS_JUMBOBD_NEEDEDRCVDBDI_STATUS_JUMBOBD_NEEDED 0x00000004 tg3.h 　
31606
 RCVDBDI_STATUS_FRM_TOO_BIGRCVDBDI_STATUS_FRM_TOO_BIG 0x00000008 tg3.h 　
31607
 RCVDBDI_STATUS_INV_RING_SZRCVDBDI_STATUS_INV_RING_SZ 0x00000010 tg3.h 　
31608
 RCVDBDI_SPLIT_FRAME_MINSZRCVDBDI_SPLIT_FRAME_MINSZ 0x00002408 tg3.h 　
31609
 RCVDBDI_JUMBO_BDRCVDBDI_JUMBO_BD 0x00002440 tg3.h TG3_BDINFO_...
31610
 RCVDBDI_STD_BDRCVDBDI_STD_BD 0x00002450 tg3.h TG3_BDINFO_...
31611
 RCVDBDI_MINI_BDRCVDBDI_MINI_BD 0x00002460 tg3.h TG3_BDINFO_...
31612
 RCVDBDI_JUMBO_CON_IDXRCVDBDI_JUMBO_CON_IDX 0x00002470 tg3.h 　
31613
 RCVDBDI_STD_CON_IDXRCVDBDI_STD_CON_IDX 0x00002474 tg3.h 　
31614
 RCVDBDI_MINI_CON_IDXRCVDBDI_MINI_CON_IDX 0x00002478 tg3.h 　
31615
 RCVDBDI_BD_PROD_IDX_0RCVDBDI_BD_PROD_IDX_0 0x00002480 tg3.h 　
31616
 RCVDBDI_BD_PROD_IDX_1RCVDBDI_BD_PROD_IDX_1 0x00002484 tg3.h 　
31617
 RCVDBDI_BD_PROD_IDX_2RCVDBDI_BD_PROD_IDX_2 0x00002488 tg3.h 　
31618
 RCVDBDI_BD_PROD_IDX_3RCVDBDI_BD_PROD_IDX_3 0x0000248c tg3.h 　
31619
 RCVDBDI_BD_PROD_IDX_4RCVDBDI_BD_PROD_IDX_4 0x00002490 tg3.h 　
31620
 RCVDBDI_BD_PROD_IDX_5RCVDBDI_BD_PROD_IDX_5 0x00002494 tg3.h 　
31621
 RCVDBDI_BD_PROD_IDX_6RCVDBDI_BD_PROD_IDX_6 0x00002498 tg3.h 　
31622
 RCVDBDI_BD_PROD_IDX_7RCVDBDI_BD_PROD_IDX_7 0x0000249c tg3.h 　
31623
 RCVDBDI_BD_PROD_IDX_8RCVDBDI_BD_PROD_IDX_8 0x000024a0 tg3.h 　
31624
 RCVDBDI_BD_PROD_IDX_9RCVDBDI_BD_PROD_IDX_9 0x000024a4 tg3.h 　
31625
 RCVDBDI_BD_PROD_IDX_10RCVDBDI_BD_PROD_IDX_10 0x000024a8 tg3.h 　
31626
 RCVDBDI_BD_PROD_IDX_11RCVDBDI_BD_PROD_IDX_11 0x000024ac tg3.h 　
31627
 RCVDBDI_BD_PROD_IDX_12RCVDBDI_BD_PROD_IDX_12 0x000024b0 tg3.h 　
31628
 RCVDBDI_BD_PROD_IDX_13RCVDBDI_BD_PROD_IDX_13 0x000024b4 tg3.h 　
31629
 RCVDBDI_BD_PROD_IDX_14RCVDBDI_BD_PROD_IDX_14 0x000024b8 tg3.h 　
31630
 RCVDBDI_BD_PROD_IDX_15RCVDBDI_BD_PROD_IDX_15 0x000024bc tg3.h 　
31631
 RCVDBDI_HWDIAGRCVDBDI_HWDIAG 0x000024c0 tg3.h 　
31632
 RCVDCC_MODERCVDCC_MODE 0x00002800 tg3.h 　
31633
 RCVDCC_MODE_RESETRCVDCC_MODE_RESET 0x00000001 tg3.h 　
31634
 RCVDCC_MODE_ENABLERCVDCC_MODE_ENABLE 0x00000002 tg3.h 　
31635
 RCVDCC_MODE_ATTN_ENABLERCVDCC_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
31636
 RCVBDI_MODERCVBDI_MODE 0x00002c00 tg3.h 　
31637
 RCVBDI_MODE_RESETRCVBDI_MODE_RESET 0x00000001 tg3.h 　
31638
 RCVBDI_MODE_ENABLERCVBDI_MODE_ENABLE 0x00000002 tg3.h 　
31639
 RCVBDI_MODE_RCB_ATTN_ENABRCVBDI_MODE_RCB_ATTN_ENAB 0x00000004 tg3.h 　
31640
 RCVBDI_STATUSRCVBDI_STATUS 0x00002c04 tg3.h 　
31641
 RCVBDI_STATUS_RCB_ATTNRCVBDI_STATUS_RCB_ATTN 0x00000004 tg3.h 　
31642
 RCVBDI_JUMBO_PROD_IDXRCVBDI_JUMBO_PROD_IDX 0x00002c08 tg3.h 　
31643
 RCVBDI_STD_PROD_IDXRCVBDI_STD_PROD_IDX 0x00002c0c tg3.h 　
31644
 RCVBDI_MINI_PROD_IDXRCVBDI_MINI_PROD_IDX 0x00002c10 tg3.h 　
31645
 RCVBDI_MINI_THRESHRCVBDI_MINI_THRESH 0x00002c14 tg3.h 　
31646
 RCVBDI_STD_THRESHRCVBDI_STD_THRESH 0x00002c18 tg3.h 　
31647
 RCVBDI_JUMBO_THRESHRCVBDI_JUMBO_THRESH 0x00002c1c tg3.h 　
31648
 RCVCC_MODERCVCC_MODE 0x00003000 tg3.h 　
31649
 RCVCC_MODE_RESETRCVCC_MODE_RESET 0x00000001 tg3.h 　
31650
 RCVCC_MODE_ENABLERCVCC_MODE_ENABLE 0x00000002 tg3.h 　
31651
 RCVCC_MODE_ATTN_ENABLERCVCC_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
31652
 RCVCC_STATUSRCVCC_STATUS 0x00003004 tg3.h 　
31653
 RCVCC_STATUS_ERROR_ATTNRCVCC_STATUS_ERROR_ATTN 0x00000004 tg3.h 　
31654
 RCVCC_JUMP_PROD_IDXRCVCC_JUMP_PROD_IDX 0x00003008 tg3.h 　
31655
 RCVCC_STD_PROD_IDXRCVCC_STD_PROD_IDX 0x0000300c tg3.h 　
31656
 RCVCC_MINI_PROD_IDXRCVCC_MINI_PROD_IDX 0x00003010 tg3.h 　
31657
 RCVLSC_MODERCVLSC_MODE 0x00003400 tg3.h 　
31658
 RCVLSC_MODE_RESETRCVLSC_MODE_RESET 0x00000001 tg3.h 　
31659
 RCVLSC_MODE_ENABLERCVLSC_MODE_ENABLE 0x00000002 tg3.h 　
31660
 RCVLSC_MODE_ATTN_ENABLERCVLSC_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
31661
 RCVLSC_STATUSRCVLSC_STATUS 0x00003404 tg3.h 　
31662
 RCVLSC_STATUS_ERROR_ATTNRCVLSC_STATUS_ERROR_ATTN 0x00000004 tg3.h 　
31663
 MBFREE_MODEMBFREE_MODE 0x00003800 tg3.h 　
31664
 MBFREE_MODE_RESETMBFREE_MODE_RESET 0x00000001 tg3.h 　
31665
 MBFREE_MODE_ENABLEMBFREE_MODE_ENABLE 0x00000002 tg3.h 　
31666
 MBFREE_STATUSMBFREE_STATUS 0x00003804 tg3.h 　
31667
 HOSTCC_MODEHOSTCC_MODE 0x00003c00 tg3.h 　
31668
 HOSTCC_MODE_RESETHOSTCC_MODE_RESET 0x00000001 tg3.h 　
31669
 HOSTCC_MODE_ENABLEHOSTCC_MODE_ENABLE 0x00000002 tg3.h 　
31670
 HOSTCC_MODE_ATTNHOSTCC_MODE_ATTN 0x00000004 tg3.h 　
31671
 HOSTCC_MODE_NOWHOSTCC_MODE_NOW 0x00000008 tg3.h 　
31672
 HOSTCC_MODE_FULL_STATUSHOSTCC_MODE_FULL_STATUS 0x00000000 tg3.h 　
31673
 HOSTCC_MODE_64BYTEHOSTCC_MODE_64BYTE 0x00000080 tg3.h 　
31674
 HOSTCC_MODE_32BYTEHOSTCC_MODE_32BYTE 0x00000100 tg3.h 　
31675
 HOSTCC_MODE_CLRTICK_RXBDHOSTCC_MODE_CLRTICK_RXBD 0x00000200 tg3.h 　
31676
 HOSTCC_MODE_CLRTICK_TXBDHOSTCC_MODE_CLRTICK_TXBD 0x00000400 tg3.h 　
31677
 HOSTCC_MODE_NOINT_ON_NOWHOSTCC_MODE_NOINT_ON_NOW 0x00000800 tg3.h 　
31678
 HOSTCC_MODE_NOINT_ON_FORCEHOSTCC_MODE_NOINT_ON_FORCE 0x00001000 tg3.h 　
31679
 HOSTCC_STATUSHOSTCC_STATUS 0x00003c04 tg3.h 　
31680
 HOSTCC_STATUS_ERROR_ATTNHOSTCC_STATUS_ERROR_ATTN 0x00000004 tg3.h 　
31681
 HOSTCC_RXCOL_TICKSHOSTCC_RXCOL_TICKS 0x00003c08 tg3.h 　
31682
 LOW_RXCOL_TICKSLOW_RXCOL_TICKS 0x00000032 tg3.h 　
31683
 DEFAULT_RXCOL_TICKSDEFAULT_RXCOL_TICKS 0x00000048 tg3.h 　
31684
 HIGH_RXCOL_TICKSHIGH_RXCOL_TICKS 0x00000096 tg3.h 　
31685
 HOSTCC_TXCOL_TICKSHOSTCC_TXCOL_TICKS 0x00003c0c tg3.h 　
31686
 LOW_TXCOL_TICKSLOW_TXCOL_TICKS 0x00000096 tg3.h 　
31687
 DEFAULT_TXCOL_TICKSDEFAULT_TXCOL_TICKS 0x0000012c tg3.h 　
31688
 HIGH_TXCOL_TICKSHIGH_TXCOL_TICKS 0x00000145 tg3.h 　
31689
 HOSTCC_RXMAX_FRAMESHOSTCC_RXMAX_FRAMES 0x00003c10 tg3.h 　
31690
 LOW_RXMAX_FRAMESLOW_RXMAX_FRAMES 0x00000005 tg3.h 　
31691
 DEFAULT_RXMAX_FRAMESDEFAULT_RXMAX_FRAMES 0x00000008 tg3.h 　
31692
 HIGH_RXMAX_FRAMESHIGH_RXMAX_FRAMES 0x00000012 tg3.h 　
31693
 HOSTCC_TXMAX_FRAMESHOSTCC_TXMAX_FRAMES 0x00003c14 tg3.h 　
31694
 LOW_TXMAX_FRAMESLOW_TXMAX_FRAMES 0x00000035 tg3.h 　
31695
 DEFAULT_TXMAX_FRAMESDEFAULT_TXMAX_FRAMES 0x0000004b tg3.h 　
31696
 HIGH_TXMAX_FRAMESHIGH_TXMAX_FRAMES 0x00000052 tg3.h 　
31697
 HOSTCC_RXCOAL_TICK_INTHOSTCC_RXCOAL_TICK_INT 0x00003c18 tg3.h 　
31698
 DEFAULT_RXCOAL_TICK_INTDEFAULT_RXCOAL_TICK_INT 0x00000019 tg3.h 　
31699
 HOSTCC_TXCOAL_TICK_INTHOSTCC_TXCOAL_TICK_INT 0x00003c1c tg3.h 　
31700
 DEFAULT_TXCOAL_TICK_INTDEFAULT_TXCOAL_TICK_INT 0x00000019 tg3.h 　
31701
 HOSTCC_RXCOAL_MAXF_INTHOSTCC_RXCOAL_MAXF_INT 0x00003c20 tg3.h 　
31702
 DEFAULT_RXCOAL_MAXF_INTDEFAULT_RXCOAL_MAXF_INT 0x00000005 tg3.h 　
31703
 HOSTCC_TXCOAL_MAXF_INTHOSTCC_TXCOAL_MAXF_INT 0x00003c24 tg3.h 　
31704
 DEFAULT_TXCOAL_MAXF_INTDEFAULT_TXCOAL_MAXF_INT 0x00000005 tg3.h 　
31705
 HOSTCC_STAT_COAL_TICKSHOSTCC_STAT_COAL_TICKS 0x00003c28 tg3.h 　
31706
 DEFAULT_STAT_COAL_TICKSDEFAULT_STAT_COAL_TICKS 0x000f4240 tg3.h 　
31707
 HOSTCC_STATS_BLK_HOST_ADDRHOSTCC_STATS_BLK_HOST_ADDR 0x00003c30 tg3.h 64-bit
31708
 HOSTCC_STATUS_BLK_HOST_ADDRHOSTCC_STATUS_BLK_HOST_ADDR 0x00003c38 tg3.h 64-bit
31709
 HOSTCC_STATS_BLK_NIC_ADDRHOSTCC_STATS_BLK_NIC_ADDR 0x00003c40 tg3.h 　
31710
 HOSTCC_STATUS_BLK_NIC_ADDRHOSTCC_STATUS_BLK_NIC_ADDR 0x00003c44 tg3.h 　
31711
 HOSTCC_FLOW_ATTNHOSTCC_FLOW_ATTN 0x00003c48 tg3.h 　
31712
 HOSTCC_JUMBO_CON_IDXHOSTCC_JUMBO_CON_IDX 0x00003c50 tg3.h 　
31713
 HOSTCC_STD_CON_IDXHOSTCC_STD_CON_IDX 0x00003c54 tg3.h 　
31714
 HOSTCC_MINI_CON_IDXHOSTCC_MINI_CON_IDX 0x00003c58 tg3.h 　
31715
 HOSTCC_RET_PROD_IDX_0HOSTCC_RET_PROD_IDX_0 0x00003c80 tg3.h 　
31716
 HOSTCC_RET_PROD_IDX_1HOSTCC_RET_PROD_IDX_1 0x00003c84 tg3.h 　
31717
 HOSTCC_RET_PROD_IDX_2HOSTCC_RET_PROD_IDX_2 0x00003c88 tg3.h 　
31718
 HOSTCC_RET_PROD_IDX_3HOSTCC_RET_PROD_IDX_3 0x00003c8c tg3.h 　
31719
 HOSTCC_RET_PROD_IDX_4HOSTCC_RET_PROD_IDX_4 0x00003c90 tg3.h 　
31720
 HOSTCC_RET_PROD_IDX_5HOSTCC_RET_PROD_IDX_5 0x00003c94 tg3.h 　
31721
 HOSTCC_RET_PROD_IDX_6HOSTCC_RET_PROD_IDX_6 0x00003c98 tg3.h 　
31722
 HOSTCC_RET_PROD_IDX_7HOSTCC_RET_PROD_IDX_7 0x00003c9c tg3.h 　
31723
 HOSTCC_RET_PROD_IDX_8HOSTCC_RET_PROD_IDX_8 0x00003ca0 tg3.h 　
31724
 HOSTCC_RET_PROD_IDX_9HOSTCC_RET_PROD_IDX_9 0x00003ca4 tg3.h 　
31725
 HOSTCC_RET_PROD_IDX_10HOSTCC_RET_PROD_IDX_10 0x00003ca8 tg3.h 　
31726
 HOSTCC_RET_PROD_IDX_11HOSTCC_RET_PROD_IDX_11 0x00003cac tg3.h 　
31727
 HOSTCC_RET_PROD_IDX_12HOSTCC_RET_PROD_IDX_12 0x00003cb0 tg3.h 　
31728
 HOSTCC_RET_PROD_IDX_13HOSTCC_RET_PROD_IDX_13 0x00003cb4 tg3.h 　
31729
 HOSTCC_RET_PROD_IDX_14HOSTCC_RET_PROD_IDX_14 0x00003cb8 tg3.h 　
31730
 HOSTCC_RET_PROD_IDX_15HOSTCC_RET_PROD_IDX_15 0x00003cbc tg3.h 　
31731
 HOSTCC_SND_CON_IDX_0HOSTCC_SND_CON_IDX_0 0x00003cc0 tg3.h 　
31732
 HOSTCC_SND_CON_IDX_1HOSTCC_SND_CON_IDX_1 0x00003cc4 tg3.h 　
31733
 HOSTCC_SND_CON_IDX_2HOSTCC_SND_CON_IDX_2 0x00003cc8 tg3.h 　
31734
 HOSTCC_SND_CON_IDX_3HOSTCC_SND_CON_IDX_3 0x00003ccc tg3.h 　
31735
 HOSTCC_SND_CON_IDX_4HOSTCC_SND_CON_IDX_4 0x00003cd0 tg3.h 　
31736
 HOSTCC_SND_CON_IDX_5HOSTCC_SND_CON_IDX_5 0x00003cd4 tg3.h 　
31737
 HOSTCC_SND_CON_IDX_6HOSTCC_SND_CON_IDX_6 0x00003cd8 tg3.h 　
31738
 HOSTCC_SND_CON_IDX_7HOSTCC_SND_CON_IDX_7 0x00003cdc tg3.h 　
31739
 HOSTCC_SND_CON_IDX_8HOSTCC_SND_CON_IDX_8 0x00003ce0 tg3.h 　
31740
 HOSTCC_SND_CON_IDX_9HOSTCC_SND_CON_IDX_9 0x00003ce4 tg3.h 　
31741
 HOSTCC_SND_CON_IDX_10HOSTCC_SND_CON_IDX_10 0x00003ce8 tg3.h 　
31742
 HOSTCC_SND_CON_IDX_11HOSTCC_SND_CON_IDX_11 0x00003cec tg3.h 　
31743
 HOSTCC_SND_CON_IDX_12HOSTCC_SND_CON_IDX_12 0x00003cf0 tg3.h 　
31744
 HOSTCC_SND_CON_IDX_13HOSTCC_SND_CON_IDX_13 0x00003cf4 tg3.h 　
31745
 HOSTCC_SND_CON_IDX_14HOSTCC_SND_CON_IDX_14 0x00003cf8 tg3.h 　
31746
 HOSTCC_SND_CON_IDX_15HOSTCC_SND_CON_IDX_15 0x00003cfc tg3.h 　
31747
 MEMARB_MODEMEMARB_MODE 0x00004000 tg3.h 　
31748
 MEMARB_MODE_RESETMEMARB_MODE_RESET 0x00000001 tg3.h 　
31749
 MEMARB_MODE_ENABLEMEMARB_MODE_ENABLE 0x00000002 tg3.h 　
31750
 MEMARB_STATUSMEMARB_STATUS 0x00004004 tg3.h 　
31751
 MEMARB_TRAP_ADDR_LOWMEMARB_TRAP_ADDR_LOW 0x00004008 tg3.h 　
31752
 MEMARB_TRAP_ADDR_HIGHMEMARB_TRAP_ADDR_HIGH 0x0000400c tg3.h 　
31753
 BUFMGR_MODEBUFMGR_MODE 0x00004400 tg3.h 　
31754
 BUFMGR_MODE_RESETBUFMGR_MODE_RESET 0x00000001 tg3.h 　
31755
 BUFMGR_MODE_ENABLEBUFMGR_MODE_ENABLE 0x00000002 tg3.h 　
31756
 BUFMGR_MODE_ATTN_ENABLEBUFMGR_MODE_ATTN_ENABLE 0x00000004 tg3.h 　
31757
 BUFMGR_MODE_BM_TESTBUFMGR_MODE_BM_TEST 0x00000008 tg3.h 　
31758
 BUFMGR_MODE_MBLOW_ATTN_ENABBUFMGR_MODE_MBLOW_ATTN_ENAB 0x00000010 tg3.h 　
31759
 BUFMGR_STATUSBUFMGR_STATUS 0x00004404 tg3.h 　
31760
 BUFMGR_STATUS_ERRORBUFMGR_STATUS_ERROR 0x00000004 tg3.h 　
31761
 BUFMGR_STATUS_MBLOWBUFMGR_STATUS_MBLOW 0x00000010 tg3.h 　
31762
 BUFMGR_MB_POOL_ADDRBUFMGR_MB_POOL_ADDR 0x00004408 tg3.h 　
31763
 BUFMGR_MB_POOL_SIZEBUFMGR_MB_POOL_SIZE 0x0000440c tg3.h 　
31764
 BUFMGR_MB_RDMA_LOW_WATERBUFMGR_MB_RDMA_LOW_WATER 0x00004410 tg3.h 　
31765
 DEFAULT_MB_RDMA_LOW_WATERDEFAULT_MB_RDMA_LOW_WATER 0x00000050 tg3.h 　
31766
 DEFAULT_MB_RDMA_LOW_WATER_5705DEFAULT_MB_RDMA_LOW_WATER_5705 0x00000000 tg3.h 　
31767
 DEFAULT_MB_RDMA_LOW_WATER_JUMBODEFAULT_MB_RDMA_LOW_WATER_JUMBO 0x00000130 tg3.h 　
31768
 BUFMGR_MB_MACRX_LOW_WATERBUFMGR_MB_MACRX_LOW_WATER 0x00004414 tg3.h 　
31769
 DEFAULT_MB_MACRX_LOW_WATERDEFAULT_MB_MACRX_LOW_WATER 0x00000020 tg3.h 　
31770
 DEFAULT_MB_MACRX_LOW_WATER_5705DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010 tg3.h 　
31771
 DEFAULT_MB_MACRX_LOW_WATER_JUMBDEFAULT_MB_MACRX_LOW_WATER_JUMB 0x00000098 tg3.h 　
31772
 BUFMGR_MB_HIGH_WATERBUFMGR_MB_HIGH_WATER 0x00004418 tg3.h 　
31773
 DEFAULT_MB_HIGH_WATERDEFAULT_MB_HIGH_WATER 0x00000060 tg3.h 　
31774
 DEFAULT_MB_HIGH_WATER_5705DEFAULT_MB_HIGH_WATER_5705 0x00000060 tg3.h 　
31775
 DEFAULT_MB_HIGH_WATER_JUMBODEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c tg3.h 　
31776
 BUFMGR_RX_MB_ALLOC_REQBUFMGR_RX_MB_ALLOC_REQ 0x0000441c tg3.h 　
31777
 BUFMGR_MB_ALLOC_BITBUFMGR_MB_ALLOC_BIT 0x10000000 tg3.h 　
31778
 BUFMGR_RX_MB_ALLOC_RESPBUFMGR_RX_MB_ALLOC_RESP 0x00004420 tg3.h 　
31779
 BUFMGR_TX_MB_ALLOC_REQBUFMGR_TX_MB_ALLOC_REQ 0x00004424 tg3.h 　
31780
 BUFMGR_TX_MB_ALLOC_RESPBUFMGR_TX_MB_ALLOC_RESP 0x00004428 tg3.h 　
31781
 BUFMGR_DMA_DESC_POOL_ADDRBUFMGR_DMA_DESC_POOL_ADDR 0x0000442c tg3.h 　
31782
 BUFMGR_DMA_DESC_POOL_SIZEBUFMGR_DMA_DESC_POOL_SIZE 0x00004430 tg3.h 　
31783
 BUFMGR_DMA_LOW_WATERBUFMGR_DMA_LOW_WATER 0x00004434 tg3.h 　
31784
 DEFAULT_DMA_LOW_WATERDEFAULT_DMA_LOW_WATER 0x00000005 tg3.h 　
31785
 BUFMGR_DMA_HIGH_WATERBUFMGR_DMA_HIGH_WATER 0x00004438 tg3.h 　
31786
 DEFAULT_DMA_HIGH_WATERDEFAULT_DMA_HIGH_WATER 0x0000000a tg3.h 　
31787
 BUFMGR_RX_DMA_ALLOC_REQBUFMGR_RX_DMA_ALLOC_REQ 0x0000443c tg3.h 　
31788
 BUFMGR_RX_DMA_ALLOC_RESPBUFMGR_RX_DMA_ALLOC_RESP 0x00004440 tg3.h 　
31789
 BUFMGR_TX_DMA_ALLOC_REQBUFMGR_TX_DMA_ALLOC_REQ 0x00004444 tg3.h 　
31790
 BUFMGR_TX_DMA_ALLOC_RESPBUFMGR_TX_DMA_ALLOC_RESP 0x00004448 tg3.h 　
31791
 BUFMGR_HWDIAG_0BUFMGR_HWDIAG_0 0x0000444c tg3.h 　
31792
 BUFMGR_HWDIAG_1BUFMGR_HWDIAG_1 0x00004450 tg3.h 　
31793
 BUFMGR_HWDIAG_2BUFMGR_HWDIAG_2 0x00004454 tg3.h 　
31794
 RDMAC_MODERDMAC_MODE 0x00004800 tg3.h 　
31795
 RDMAC_MODE_RESETRDMAC_MODE_RESET 0x00000001 tg3.h 　
31796
 RDMAC_MODE_ENABLERDMAC_MODE_ENABLE 0x00000002 tg3.h 　
31797
 RDMAC_MODE_TGTABORT_ENABRDMAC_MODE_TGTABORT_ENAB 0x00000004 tg3.h 　
31798
 RDMAC_MODE_MSTABORT_ENABRDMAC_MODE_MSTABORT_ENAB 0x00000008 tg3.h 　
31799
 RDMAC_MODE_PARITYERR_ENABRDMAC_MODE_PARITYERR_ENAB 0x00000010 tg3.h 　
31800
 RDMAC_MODE_ADDROFLOW_ENABRDMAC_MODE_ADDROFLOW_ENAB 0x00000020 tg3.h 　
31801
 RDMAC_MODE_FIFOOFLOW_ENABRDMAC_MODE_FIFOOFLOW_ENAB 0x00000040 tg3.h 　
31802
 RDMAC_MODE_FIFOURUN_ENABRDMAC_MODE_FIFOURUN_ENAB 0x00000080 tg3.h 　
31803
 RDMAC_MODE_FIFOOREAD_ENABRDMAC_MODE_FIFOOREAD_ENAB 0x00000100 tg3.h 　
31804
 RDMAC_MODE_LNGREAD_ENABRDMAC_MODE_LNGREAD_ENAB 0x00000200 tg3.h 　
31805
 RDMAC_MODE_SPLIT_ENABLERDMAC_MODE_SPLIT_ENABLE 0x00000800 tg3.h 　
31806
 RDMAC_MODE_SPLIT_RESETRDMAC_MODE_SPLIT_RESET 0x00001000 tg3.h 　
31807
 RDMAC_MODE_FIFO_SIZE_128RDMAC_MODE_FIFO_SIZE_128 0x00020000 tg3.h 　
31808
 RDMAC_MODE_FIFO_LONG_BURSTRDMAC_MODE_FIFO_LONG_BURST 0x00030000 tg3.h 　
31809
 RDMAC_STATUSRDMAC_STATUS 0x00004804 tg3.h 　
31810
 RDMAC_STATUS_TGTABORTRDMAC_STATUS_TGTABORT 0x00000004 tg3.h 　
31811
 RDMAC_STATUS_MSTABORTRDMAC_STATUS_MSTABORT 0x00000008 tg3.h 　
31812
 RDMAC_STATUS_PARITYERRRDMAC_STATUS_PARITYERR 0x00000010 tg3.h 　
31813
 RDMAC_STATUS_ADDROFLOWRDMAC_STATUS_ADDROFLOW 0x00000020 tg3.h 　
31814
 RDMAC_STATUS_FIFOOFLOWRDMAC_STATUS_FIFOOFLOW 0x00000040 tg3.h 　
31815
 RDMAC_STATUS_FIFOURUNRDMAC_STATUS_FIFOURUN 0x00000080 tg3.h 　
31816
 RDMAC_STATUS_FIFOOREADRDMAC_STATUS_FIFOOREAD 0x00000100 tg3.h 　
31817
 RDMAC_STATUS_LNGREADRDMAC_STATUS_LNGREAD 0x00000200 tg3.h 　
31818
 WDMAC_MODEWDMAC_MODE 0x00004c00 tg3.h 　
31819
 WDMAC_MODE_RESETWDMAC_MODE_RESET 0x00000001 tg3.h 　
31820
 WDMAC_MODE_ENABLEWDMAC_MODE_ENABLE 0x00000002 tg3.h 　
31821
 WDMAC_MODE_TGTABORT_ENABWDMAC_MODE_TGTABORT_ENAB 0x00000004 tg3.h 　
31822
 WDMAC_MODE_MSTABORT_ENABWDMAC_MODE_MSTABORT_ENAB 0x00000008 tg3.h 　
31823
 WDMAC_MODE_PARITYERR_ENABWDMAC_MODE_PARITYERR_ENAB 0x00000010 tg3.h 　
31824
 WDMAC_MODE_ADDROFLOW_ENABWDMAC_MODE_ADDROFLOW_ENAB 0x00000020 tg3.h 　
31825
 WDMAC_MODE_FIFOOFLOW_ENABWDMAC_MODE_FIFOOFLOW_ENAB 0x00000040 tg3.h 　
31826
 WDMAC_MODE_FIFOURUN_ENABWDMAC_MODE_FIFOURUN_ENAB 0x00000080 tg3.h 　
31827
 WDMAC_MODE_FIFOOREAD_ENABWDMAC_MODE_FIFOOREAD_ENAB 0x00000100 tg3.h 　
31828
 WDMAC_MODE_LNGREAD_ENABWDMAC_MODE_LNGREAD_ENAB 0x00000200 tg3.h 　
31829
 WDMAC_MODE_RX_ACCELWDMAC_MODE_RX_ACCEL 0x00000400 tg3.h 　
31830
 WDMAC_STATUSWDMAC_STATUS 0x00004c04 tg3.h 　
31831
 WDMAC_STATUS_TGTABORTWDMAC_STATUS_TGTABORT 0x00000004 tg3.h 　
31832
 WDMAC_STATUS_MSTABORTWDMAC_STATUS_MSTABORT 0x00000008 tg3.h 　
31833
 WDMAC_STATUS_PARITYERRWDMAC_STATUS_PARITYERR 0x00000010 tg3.h 　
31834
 WDMAC_STATUS_ADDROFLOWWDMAC_STATUS_ADDROFLOW 0x00000020 tg3.h 　
31835
 WDMAC_STATUS_FIFOOFLOWWDMAC_STATUS_FIFOOFLOW 0x00000040 tg3.h 　
31836
 WDMAC_STATUS_FIFOURUNWDMAC_STATUS_FIFOURUN 0x00000080 tg3.h 　
31837
 WDMAC_STATUS_FIFOOREADWDMAC_STATUS_FIFOOREAD 0x00000100 tg3.h 　
31838
 WDMAC_STATUS_LNGREADWDMAC_STATUS_LNGREAD 0x00000200 tg3.h 　
31839
 CPU_MODECPU_MODE 0x00000000 tg3.h 　
31840
 CPU_MODE_RESETCPU_MODE_RESET 0x00000001 tg3.h 　
31841
 CPU_MODE_HALTCPU_MODE_HALT 0x00000400 tg3.h 　
31842
 CPU_STATECPU_STATE 0x00000004 tg3.h 　
31843
 CPU_EVTMASKCPU_EVTMASK 0x00000008 tg3.h 　
31844
 CPU_PCCPU_PC 0x0000001c tg3.h 　
31845
 CPU_INSNCPU_INSN 0x00000020 tg3.h 　
31846
 CPU_SPAD_UFLOWCPU_SPAD_UFLOW 0x00000024 tg3.h 　
31847
 CPU_WDOG_CLEARCPU_WDOG_CLEAR 0x00000028 tg3.h 　
31848
 CPU_WDOG_VECTORCPU_WDOG_VECTOR 0x0000002c tg3.h 　
31849
 CPU_WDOG_PCCPU_WDOG_PC 0x00000030 tg3.h 　
31850
 CPU_HW_BPCPU_HW_BP 0x00000034 tg3.h 　
31851
 CPU_WDOG_SAVED_STATECPU_WDOG_SAVED_STATE 0x00000044 tg3.h 　
31852
 CPU_LAST_BRANCH_ADDRCPU_LAST_BRANCH_ADDR 0x00000048 tg3.h 　
31853
 CPU_SPAD_UFLOW_SETCPU_SPAD_UFLOW_SET 0x0000004c tg3.h 　
31854
 CPU_R0CPU_R0 0x00000200 tg3.h 　
31855
 CPU_R1CPU_R1 0x00000204 tg3.h 　
31856
 CPU_R2CPU_R2 0x00000208 tg3.h 　
31857
 CPU_R3CPU_R3 0x0000020c tg3.h 　
31858
 CPU_R4CPU_R4 0x00000210 tg3.h 　
31859
 CPU_R5CPU_R5 0x00000214 tg3.h 　
31860
 CPU_R6CPU_R6 0x00000218 tg3.h 　
31861
 CPU_R7CPU_R7 0x0000021c tg3.h 　
31862
 CPU_R8CPU_R8 0x00000220 tg3.h 　
31863
 CPU_R9CPU_R9 0x00000224 tg3.h 　
31864
 CPU_R10CPU_R10 0x00000228 tg3.h 　
31865
 CPU_R11CPU_R11 0x0000022c tg3.h 　
31866
 CPU_R12CPU_R12 0x00000230 tg3.h 　
31867
 CPU_R13CPU_R13 0x00000234 tg3.h 　
31868
 CPU_R14CPU_R14 0x00000238 tg3.h 　
31869
 CPU_R15CPU_R15 0x0000023c tg3.h 　
31870
 CPU_R16CPU_R16 0x00000240 tg3.h 　
31871
 CPU_R17CPU_R17 0x00000244 tg3.h 　
31872
 CPU_R18CPU_R18 0x00000248 tg3.h 　
31873
 CPU_R19CPU_R19 0x0000024c tg3.h 　
31874
 CPU_R20CPU_R20 0x00000250 tg3.h 　
31875
 CPU_R21CPU_R21 0x00000254 tg3.h 　
31876
 CPU_R22CPU_R22 0x00000258 tg3.h 　
31877
 CPU_R23CPU_R23 0x0000025c tg3.h 　
31878
 CPU_R24CPU_R24 0x00000260 tg3.h 　
31879
 CPU_R25CPU_R25 0x00000264 tg3.h 　
31880
 CPU_R26CPU_R26 0x00000268 tg3.h 　
31881
 CPU_R27CPU_R27 0x0000026c tg3.h 　
31882
 CPU_R28CPU_R28 0x00000270 tg3.h 　
31883
 CPU_R29CPU_R29 0x00000274 tg3.h 　
31884
 CPU_R30CPU_R30 0x00000278 tg3.h 　
31885
 CPU_R31CPU_R31 0x0000027c tg3.h 　
31886
 RX_CPU_BASERX_CPU_BASE 0x00005000 tg3.h 　
31887
 TX_CPU_BASETX_CPU_BASE 0x00005400 tg3.h 　
31888
 GRCMBOX_INTERRUPT_0GRCMBOX_INTERRUPT_0 0x00005800 tg3.h 64-bit
31889
 GRCMBOX_INTERRUPT_1GRCMBOX_INTERRUPT_1 0x00005808 tg3.h 64-bit
31890
 GRCMBOX_INTERRUPT_2GRCMBOX_INTERRUPT_2 0x00005810 tg3.h 64-bit
31891
 GRCMBOX_INTERRUPT_3GRCMBOX_INTERRUPT_3 0x00005818 tg3.h 64-bit
31892
 GRCMBOX_GENERAL_0GRCMBOX_GENERAL_0 0x00005820 tg3.h 64-bit
31893
 GRCMBOX_GENERAL_1GRCMBOX_GENERAL_1 0x00005828 tg3.h 64-bit
31894
 GRCMBOX_GENERAL_2GRCMBOX_GENERAL_2 0x00005830 tg3.h 64-bit
31895
 GRCMBOX_GENERAL_3GRCMBOX_GENERAL_3 0x00005838 tg3.h 64-bit
31896
 GRCMBOX_GENERAL_4GRCMBOX_GENERAL_4 0x00005840 tg3.h 64-bit
31897
 GRCMBOX_GENERAL_5GRCMBOX_GENERAL_5 0x00005848 tg3.h 64-bit
31898
 GRCMBOX_GENERAL_6GRCMBOX_GENERAL_6 0x00005850 tg3.h 64-bit
31899
 GRCMBOX_GENERAL_7GRCMBOX_GENERAL_7 0x00005858 tg3.h 64-bit
31900
 GRCMBOX_RELOAD_STATGRCMBOX_RELOAD_STAT 0x00005860 tg3.h 64-bit
31901
 GRCMBOX_RCVSTD_PROD_IDXGRCMBOX_RCVSTD_PROD_IDX 0x00005868 tg3.h 64-bit
31902
 GRCMBOX_RCVJUMBO_PROD_IDXGRCMBOX_RCVJUMBO_PROD_IDX 0x00005870 tg3.h 64-bit
31903
 GRCMBOX_RCVMINI_PROD_IDXGRCMBOX_RCVMINI_PROD_IDX 0x00005878 tg3.h 64-bit
31904
 GRCMBOX_RCVRET_CON_IDX_0GRCMBOX_RCVRET_CON_IDX_0 0x00005880 tg3.h 64-bit
31905
 GRCMBOX_RCVRET_CON_IDX_1GRCMBOX_RCVRET_CON_IDX_1 0x00005888 tg3.h 64-bit
31906
 GRCMBOX_RCVRET_CON_IDX_2GRCMBOX_RCVRET_CON_IDX_2 0x00005890 tg3.h 64-bit
31907
 GRCMBOX_RCVRET_CON_IDX_3GRCMBOX_RCVRET_CON_IDX_3 0x00005898 tg3.h 64-bit
31908
 GRCMBOX_RCVRET_CON_IDX_4GRCMBOX_RCVRET_CON_IDX_4 0x000058a0 tg3.h 64-bit
31909
 GRCMBOX_RCVRET_CON_IDX_5GRCMBOX_RCVRET_CON_IDX_5 0x000058a8 tg3.h 64-bit
31910
 GRCMBOX_RCVRET_CON_IDX_6GRCMBOX_RCVRET_CON_IDX_6 0x000058b0 tg3.h 64-bit
31911
 GRCMBOX_RCVRET_CON_IDX_7GRCMBOX_RCVRET_CON_IDX_7 0x000058b8 tg3.h 64-bit
31912
 GRCMBOX_RCVRET_CON_IDX_8GRCMBOX_RCVRET_CON_IDX_8 0x000058c0 tg3.h 64-bit
31913
 GRCMBOX_RCVRET_CON_IDX_9GRCMBOX_RCVRET_CON_IDX_9 0x000058c8 tg3.h 64-bit
31914
 GRCMBOX_RCVRET_CON_IDX_10GRCMBOX_RCVRET_CON_IDX_10 0x000058d0 tg3.h 64-bit
31915
 GRCMBOX_RCVRET_CON_IDX_11GRCMBOX_RCVRET_CON_IDX_11 0x000058d8 tg3.h 64-bit
31916
 GRCMBOX_RCVRET_CON_IDX_12GRCMBOX_RCVRET_CON_IDX_12 0x000058e0 tg3.h 64-bit
31917
 GRCMBOX_RCVRET_CON_IDX_13GRCMBOX_RCVRET_CON_IDX_13 0x000058e8 tg3.h 64-bit
31918
 GRCMBOX_RCVRET_CON_IDX_14GRCMBOX_RCVRET_CON_IDX_14 0x000058f0 tg3.h 64-bit
31919
 GRCMBOX_RCVRET_CON_IDX_15GRCMBOX_RCVRET_CON_IDX_15 0x000058f8 tg3.h 64-bit
31920
 GRCMBOX_SNDHOST_PROD_IDX_0GRCMBOX_SNDHOST_PROD_IDX_0 0x00005900 tg3.h 64-bit
31921
 GRCMBOX_SNDHOST_PROD_IDX_1GRCMBOX_SNDHOST_PROD_IDX_1 0x00005908 tg3.h 64-bit
31922
 GRCMBOX_SNDHOST_PROD_IDX_2GRCMBOX_SNDHOST_PROD_IDX_2 0x00005910 tg3.h 64-bit
31923
 GRCMBOX_SNDHOST_PROD_IDX_3GRCMBOX_SNDHOST_PROD_IDX_3 0x00005918 tg3.h 64-bit
31924
 GRCMBOX_SNDHOST_PROD_IDX_4GRCMBOX_SNDHOST_PROD_IDX_4 0x00005920 tg3.h 64-bit
31925
 GRCMBOX_SNDHOST_PROD_IDX_5GRCMBOX_SNDHOST_PROD_IDX_5 0x00005928 tg3.h 64-bit
31926
 GRCMBOX_SNDHOST_PROD_IDX_6GRCMBOX_SNDHOST_PROD_IDX_6 0x00005930 tg3.h 64-bit
31927
 GRCMBOX_SNDHOST_PROD_IDX_7GRCMBOX_SNDHOST_PROD_IDX_7 0x00005938 tg3.h 64-bit
31928
 GRCMBOX_SNDHOST_PROD_IDX_8GRCMBOX_SNDHOST_PROD_IDX_8 0x00005940 tg3.h 64-bit
31929
 GRCMBOX_SNDHOST_PROD_IDX_9GRCMBOX_SNDHOST_PROD_IDX_9 0x00005948 tg3.h 64-bit
31930
 GRCMBOX_SNDHOST_PROD_IDX_10GRCMBOX_SNDHOST_PROD_IDX_10 0x00005950 tg3.h 64-bit
31931
 GRCMBOX_SNDHOST_PROD_IDX_11GRCMBOX_SNDHOST_PROD_IDX_11 0x00005958 tg3.h 64-bit
31932
 GRCMBOX_SNDHOST_PROD_IDX_12GRCMBOX_SNDHOST_PROD_IDX_12 0x00005960 tg3.h 64-bit
31933
 GRCMBOX_SNDHOST_PROD_IDX_13GRCMBOX_SNDHOST_PROD_IDX_13 0x00005968 tg3.h 64-bit
31934
 GRCMBOX_SNDHOST_PROD_IDX_14GRCMBOX_SNDHOST_PROD_IDX_14 0x00005970 tg3.h 64-bit
31935
 GRCMBOX_SNDHOST_PROD_IDX_15GRCMBOX_SNDHOST_PROD_IDX_15 0x00005978 tg3.h 64-bit
31936
 GRCMBOX_SNDNIC_PROD_IDX_0GRCMBOX_SNDNIC_PROD_IDX_0 0x00005980 tg3.h 64-bit
31937
 GRCMBOX_SNDNIC_PROD_IDX_1GRCMBOX_SNDNIC_PROD_IDX_1 0x00005988 tg3.h 64-bit
31938
 GRCMBOX_SNDNIC_PROD_IDX_2GRCMBOX_SNDNIC_PROD_IDX_2 0x00005990 tg3.h 64-bit
31939
 GRCMBOX_SNDNIC_PROD_IDX_3GRCMBOX_SNDNIC_PROD_IDX_3 0x00005998 tg3.h 64-bit
31940
 GRCMBOX_SNDNIC_PROD_IDX_4GRCMBOX_SNDNIC_PROD_IDX_4 0x000059a0 tg3.h 64-bit
31941
 GRCMBOX_SNDNIC_PROD_IDX_5GRCMBOX_SNDNIC_PROD_IDX_5 0x000059a8 tg3.h 64-bit
31942
 GRCMBOX_SNDNIC_PROD_IDX_6GRCMBOX_SNDNIC_PROD_IDX_6 0x000059b0 tg3.h 64-bit
31943
 GRCMBOX_SNDNIC_PROD_IDX_7GRCMBOX_SNDNIC_PROD_IDX_7 0x000059b8 tg3.h 64-bit
31944
 GRCMBOX_SNDNIC_PROD_IDX_8GRCMBOX_SNDNIC_PROD_IDX_8 0x000059c0 tg3.h 64-bit
31945
 GRCMBOX_SNDNIC_PROD_IDX_9GRCMBOX_SNDNIC_PROD_IDX_9 0x000059c8 tg3.h 64-bit
31946
 GRCMBOX_SNDNIC_PROD_IDX_10GRCMBOX_SNDNIC_PROD_IDX_10 0x000059d0 tg3.h 64-bit
31947
 GRCMBOX_SNDNIC_PROD_IDX_11GRCMBOX_SNDNIC_PROD_IDX_11 0x000059d8 tg3.h 64-bit
31948
 GRCMBOX_SNDNIC_PROD_IDX_12GRCMBOX_SNDNIC_PROD_IDX_12 0x000059e0 tg3.h 64-bit
31949
 GRCMBOX_SNDNIC_PROD_IDX_13GRCMBOX_SNDNIC_PROD_IDX_13 0x000059e8 tg3.h 64-bit
31950
 GRCMBOX_SNDNIC_PROD_IDX_14GRCMBOX_SNDNIC_PROD_IDX_14 0x000059f0 tg3.h 64-bit
31951
 GRCMBOX_SNDNIC_PROD_IDX_15GRCMBOX_SNDNIC_PROD_IDX_15 0x000059f8 tg3.h 64-bit
31952
 GRCMBOX_HIGH_PRIO_EV_VECTORGRCMBOX_HIGH_PRIO_EV_VECTOR 0x00005a00 tg3.h 　
31953
 GRCMBOX_HIGH_PRIO_EV_MASKGRCMBOX_HIGH_PRIO_EV_MASK 0x00005a04 tg3.h 　
31954
 GRCMBOX_LOW_PRIO_EV_VECGRCMBOX_LOW_PRIO_EV_VEC 0x00005a08 tg3.h 　
31955
 GRCMBOX_LOW_PRIO_EV_MASKGRCMBOX_LOW_PRIO_EV_MASK 0x00005a0c tg3.h 　
31956
 FTQ_RESETFTQ_RESET 0x00005c00 tg3.h 　
31957
 FTQ_RESET_DMA_READ_QUEUEFTQ_RESET_DMA_READ_QUEUE (1 << 1) tg3.h 　
31958
 FTQ_RESET_DMA_HIGH_PRI_READFTQ_RESET_DMA_HIGH_PRI_READ (1 << 2) tg3.h 　
31959
 FTQ_RESET_SEND_BD_COMPLETIONFTQ_RESET_SEND_BD_COMPLETION (1 << 4) tg3.h 　
31960
 FTQ_RESET_DMA_WRITEFTQ_RESET_DMA_WRITE (1 << 6) tg3.h 　
31961
 FTQ_RESET_DMA_HIGH_PRI_WRITEFTQ_RESET_DMA_HIGH_PRI_WRITE (1 << 7) tg3.h 　
31962
 FTQ_RESET_SEND_DATA_COMPLETIONFTQ_RESET_SEND_DATA_COMPLETION (1 << 9) tg3.h 　
31963
 FTQ_RESET_HOST_COALESCINGFTQ_RESET_HOST_COALESCING (1 << 10) tg3.h 　
31964
 FTQ_RESET_MAC_TXFTQ_RESET_MAC_TX (1 << 11) tg3.h 　
31965
 FTQ_RESET_RX_BD_COMPLETEFTQ_RESET_RX_BD_COMPLETE (1 << 13) tg3.h 　
31966
 FTQ_RESET_RX_LIST_PLCMTFTQ_RESET_RX_LIST_PLCMT (1 << 14) tg3.h 　
31967
 FTQ_RESET_RX_DATA_COMPLETIONFTQ_RESET_RX_DATA_COMPLETION (1 << 16) tg3.h 　
31968
 FTQ_DMA_NORM_READ_CTLFTQ_DMA_NORM_READ_CTL 0x00005c10 tg3.h 　
31969
 FTQ_DMA_NORM_READ_FULL_CNTFTQ_DMA_NORM_READ_FULL_CNT 0x00005c14 tg3.h 　
31970
 FTQ_DMA_NORM_READ_FIFO_ENQDEQFTQ_DMA_NORM_READ_FIFO_ENQDEQ 0x00005c18 tg3.h 　
31971
 FTQ_DMA_NORM_READ_WRITE_PEEKFTQ_DMA_NORM_READ_WRITE_PEEK 0x00005c1c tg3.h 　
31972
 FTQ_DMA_HIGH_READ_CTLFTQ_DMA_HIGH_READ_CTL 0x00005c20 tg3.h 　
31973
 FTQ_DMA_HIGH_READ_FULL_CNTFTQ_DMA_HIGH_READ_FULL_CNT 0x00005c24 tg3.h 　
31974
 FTQ_DMA_HIGH_READ_FIFO_ENQDEQFTQ_DMA_HIGH_READ_FIFO_ENQDEQ 0x00005c28 tg3.h 　
31975
 FTQ_DMA_HIGH_READ_WRITE_PEEKFTQ_DMA_HIGH_READ_WRITE_PEEK 0x00005c2c tg3.h 　
31976
 FTQ_DMA_COMP_DISC_CTLFTQ_DMA_COMP_DISC_CTL 0x00005c30 tg3.h 　
31977
 FTQ_DMA_COMP_DISC_FULL_CNTFTQ_DMA_COMP_DISC_FULL_CNT 0x00005c34 tg3.h 　
31978
 FTQ_DMA_COMP_DISC_FIFO_ENQDEQFTQ_DMA_COMP_DISC_FIFO_ENQDEQ 0x00005c38 tg3.h 　
31979
 FTQ_DMA_COMP_DISC_WRITE_PEEKFTQ_DMA_COMP_DISC_WRITE_PEEK 0x00005c3c tg3.h 　
31980
 FTQ_SEND_BD_COMP_CTLFTQ_SEND_BD_COMP_CTL 0x00005c40 tg3.h 　
31981
 FTQ_SEND_BD_COMP_FULL_CNTFTQ_SEND_BD_COMP_FULL_CNT 0x00005c44 tg3.h 　
31982
 FTQ_SEND_BD_COMP_FIFO_ENQDEQFTQ_SEND_BD_COMP_FIFO_ENQDEQ 0x00005c48 tg3.h 　
31983
 FTQ_SEND_BD_COMP_WRITE_PEEKFTQ_SEND_BD_COMP_WRITE_PEEK 0x00005c4c tg3.h 　
31984
 FTQ_SEND_DATA_INIT_CTLFTQ_SEND_DATA_INIT_CTL 0x00005c50 tg3.h 　
31985
 FTQ_SEND_DATA_INIT_FULL_CNTFTQ_SEND_DATA_INIT_FULL_CNT 0x00005c54 tg3.h 　
31986
 FTQ_SEND_DATA_INIT_FIFO_ENQDEQFTQ_SEND_DATA_INIT_FIFO_ENQDEQ 0x00005c58 tg3.h 　
31987
 FTQ_SEND_DATA_INIT_WRITE_PEEKFTQ_SEND_DATA_INIT_WRITE_PEEK 0x00005c5c tg3.h 　
31988
 FTQ_DMA_NORM_WRITE_CTLFTQ_DMA_NORM_WRITE_CTL 0x00005c60 tg3.h 　
31989
 FTQ_DMA_NORM_WRITE_FULL_CNTFTQ_DMA_NORM_WRITE_FULL_CNT 0x00005c64 tg3.h 　
31990
 FTQ_DMA_NORM_WRITE_FIFO_ENQDEQFTQ_DMA_NORM_WRITE_FIFO_ENQDEQ 0x00005c68 tg3.h 　
31991
 FTQ_DMA_NORM_WRITE_WRITE_PEEKFTQ_DMA_NORM_WRITE_WRITE_PEEK 0x00005c6c tg3.h 　
31992
 FTQ_DMA_HIGH_WRITE_CTLFTQ_DMA_HIGH_WRITE_CTL 0x00005c70 tg3.h 　
31993
 FTQ_DMA_HIGH_WRITE_FULL_CNTFTQ_DMA_HIGH_WRITE_FULL_CNT 0x00005c74 tg3.h 　
31994
 FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQFTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ 0x00005c78 tg3.h 　
31995
 FTQ_DMA_HIGH_WRITE_WRITE_PEEKFTQ_DMA_HIGH_WRITE_WRITE_PEEK 0x00005c7c tg3.h 　
31996
 FTQ_SWTYPE1_CTLFTQ_SWTYPE1_CTL 0x00005c80 tg3.h 　
31997
 FTQ_SWTYPE1_FULL_CNTFTQ_SWTYPE1_FULL_CNT 0x00005c84 tg3.h 　
31998
 FTQ_SWTYPE1_FIFO_ENQDEQFTQ_SWTYPE1_FIFO_ENQDEQ 0x00005c88 tg3.h 　
31999
 FTQ_SWTYPE1_WRITE_PEEKFTQ_SWTYPE1_WRITE_PEEK 0x00005c8c tg3.h 　
32000
 FTQ_SEND_DATA_COMP_CTLFTQ_SEND_DATA_COMP_CTL 0x00005c90 tg3.h 　
32001
 FTQ_SEND_DATA_COMP_FULL_CNTFTQ_SEND_DATA_COMP_FULL_CNT 0x00005c94 tg3.h 　
32002
 FTQ_SEND_DATA_COMP_FIFO_ENQDEQFTQ_SEND_DATA_COMP_FIFO_ENQDEQ 0x00005c98 tg3.h 　
32003
 FTQ_SEND_DATA_COMP_WRITE_PEEKFTQ_SEND_DATA_COMP_WRITE_PEEK 0x00005c9c tg3.h 　
32004
 FTQ_HOST_COAL_CTLFTQ_HOST_COAL_CTL 0x00005ca0 tg3.h 　
32005
 FTQ_HOST_COAL_FULL_CNTFTQ_HOST_COAL_FULL_CNT 0x00005ca4 tg3.h 　
32006
 FTQ_HOST_COAL_FIFO_ENQDEQFTQ_HOST_COAL_FIFO_ENQDEQ 0x00005ca8 tg3.h 　
32007
 FTQ_HOST_COAL_WRITE_PEEKFTQ_HOST_COAL_WRITE_PEEK 0x00005cac tg3.h 　
32008
 FTQ_MAC_TX_CTLFTQ_MAC_TX_CTL 0x00005cb0 tg3.h 　
32009
 FTQ_MAC_TX_FULL_CNTFTQ_MAC_TX_FULL_CNT 0x00005cb4 tg3.h 　
32010
 FTQ_MAC_TX_FIFO_ENQDEQFTQ_MAC_TX_FIFO_ENQDEQ 0x00005cb8 tg3.h 　
32011
 FTQ_MAC_TX_WRITE_PEEKFTQ_MAC_TX_WRITE_PEEK 0x00005cbc tg3.h 　
32012
 FTQ_MB_FREE_CTLFTQ_MB_FREE_CTL 0x00005cc0 tg3.h 　
32013
 FTQ_MB_FREE_FULL_CNTFTQ_MB_FREE_FULL_CNT 0x00005cc4 tg3.h 　
32014
 FTQ_MB_FREE_FIFO_ENQDEQFTQ_MB_FREE_FIFO_ENQDEQ 0x00005cc8 tg3.h 　
32015
 FTQ_MB_FREE_WRITE_PEEKFTQ_MB_FREE_WRITE_PEEK 0x00005ccc tg3.h 　
32016
 FTQ_RCVBD_COMP_CTLFTQ_RCVBD_COMP_CTL 0x00005cd0 tg3.h 　
32017
 FTQ_RCVBD_COMP_FULL_CNTFTQ_RCVBD_COMP_FULL_CNT 0x00005cd4 tg3.h 　
32018
 FTQ_RCVBD_COMP_FIFO_ENQDEQFTQ_RCVBD_COMP_FIFO_ENQDEQ 0x00005cd8 tg3.h 　
32019
 FTQ_RCVBD_COMP_WRITE_PEEKFTQ_RCVBD_COMP_WRITE_PEEK 0x00005cdc tg3.h 　
32020
 FTQ_RCVLST_PLMT_CTLFTQ_RCVLST_PLMT_CTL 0x00005ce0 tg3.h 　
32021
 FTQ_RCVLST_PLMT_FULL_CNTFTQ_RCVLST_PLMT_FULL_CNT 0x00005ce4 tg3.h 　
32022
 FTQ_RCVLST_PLMT_FIFO_ENQDEQFTQ_RCVLST_PLMT_FIFO_ENQDEQ 0x00005ce8 tg3.h 　
32023
 FTQ_RCVLST_PLMT_WRITE_PEEKFTQ_RCVLST_PLMT_WRITE_PEEK 0x00005cec tg3.h 　
32024
 FTQ_RCVDATA_INI_CTLFTQ_RCVDATA_INI_CTL 0x00005cf0 tg3.h 　
32025
 FTQ_RCVDATA_INI_FULL_CNTFTQ_RCVDATA_INI_FULL_CNT 0x00005cf4 tg3.h 　
32026
 FTQ_RCVDATA_INI_FIFO_ENQDEQFTQ_RCVDATA_INI_FIFO_ENQDEQ 0x00005cf8 tg3.h 　
32027
 FTQ_RCVDATA_INI_WRITE_PEEKFTQ_RCVDATA_INI_WRITE_PEEK 0x00005cfc tg3.h 　
32028
 FTQ_RCVDATA_COMP_CTLFTQ_RCVDATA_COMP_CTL 0x00005d00 tg3.h 　
32029
 FTQ_RCVDATA_COMP_FULL_CNTFTQ_RCVDATA_COMP_FULL_CNT 0x00005d04 tg3.h 　
32030
 FTQ_RCVDATA_COMP_FIFO_ENQDEQFTQ_RCVDATA_COMP_FIFO_ENQDEQ 0x00005d08 tg3.h 　
32031
 FTQ_RCVDATA_COMP_WRITE_PEEKFTQ_RCVDATA_COMP_WRITE_PEEK 0x00005d0c tg3.h 　
32032
 FTQ_SWTYPE2_CTLFTQ_SWTYPE2_CTL 0x00005d10 tg3.h 　
32033
 FTQ_SWTYPE2_FULL_CNTFTQ_SWTYPE2_FULL_CNT 0x00005d14 tg3.h 　
32034
 FTQ_SWTYPE2_FIFO_ENQDEQFTQ_SWTYPE2_FIFO_ENQDEQ 0x00005d18 tg3.h 　
32035
 FTQ_SWTYPE2_WRITE_PEEKFTQ_SWTYPE2_WRITE_PEEK 0x00005d1c tg3.h 　
32036
 MSGINT_MODEMSGINT_MODE 0x00006000 tg3.h 　
32037
 MSGINT_MODE_RESETMSGINT_MODE_RESET 0x00000001 tg3.h 　
32038
 MSGINT_MODE_ENABLEMSGINT_MODE_ENABLE 0x00000002 tg3.h 　
32039
 MSGINT_STATUSMSGINT_STATUS 0x00006004 tg3.h 　
32040
 MSGINT_FIFOMSGINT_FIFO 0x00006008 tg3.h 　
32041
 DMAC_MODEDMAC_MODE 0x00006400 tg3.h 　
32042
 DMAC_MODE_RESETDMAC_MODE_RESET 0x00000001 tg3.h 　
32043
 DMAC_MODE_ENABLEDMAC_MODE_ENABLE 0x00000002 tg3.h 　
32044
 GRC_MODEGRC_MODE 0x00006800 tg3.h 　
32045
 GRC_MODE_UPD_ON_COALGRC_MODE_UPD_ON_COAL 0x00000001 tg3.h 　
32046
 GRC_MODE_BSWAP_NONFRM_DATAGRC_MODE_BSWAP_NONFRM_DATA 0x00000002 tg3.h 　
32047
 GRC_MODE_WSWAP_NONFRM_DATAGRC_MODE_WSWAP_NONFRM_DATA 0x00000004 tg3.h 　
32048
 GRC_MODE_BSWAP_DATAGRC_MODE_BSWAP_DATA 0x00000010 tg3.h 　
32049
 GRC_MODE_WSWAP_DATAGRC_MODE_WSWAP_DATA 0x00000020 tg3.h 　
32050
 GRC_MODE_SPLITHDRGRC_MODE_SPLITHDR 0x00000100 tg3.h 　
32051
 GRC_MODE_NOFRM_CRACKINGGRC_MODE_NOFRM_CRACKING 0x00000200 tg3.h 　
32052
 GRC_MODE_INCL_CRCGRC_MODE_INCL_CRC 0x00000400 tg3.h 　
32053
 GRC_MODE_ALLOW_BAD_FRMSGRC_MODE_ALLOW_BAD_FRMS 0x00000800 tg3.h 　
32054
 GRC_MODE_NOIRQ_ON_SENDSGRC_MODE_NOIRQ_ON_SENDS 0x00002000 tg3.h 　
32055
 GRC_MODE_NOIRQ_ON_RCVGRC_MODE_NOIRQ_ON_RCV 0x00004000 tg3.h 　
32056
 GRC_MODE_FORCE_PCI32BITGRC_MODE_FORCE_PCI32BIT 0x00008000 tg3.h 　
32057
 GRC_MODE_HOST_STACKUPGRC_MODE_HOST_STACKUP 0x00010000 tg3.h 　
32058
 GRC_MODE_HOST_SENDBDSGRC_MODE_HOST_SENDBDS 0x00020000 tg3.h 　
32059
 GRC_MODE_NO_TX_PHDR_CSUMGRC_MODE_NO_TX_PHDR_CSUM 0x00100000 tg3.h 　
32060
 GRC_MODE_NO_RX_PHDR_CSUMGRC_MODE_NO_RX_PHDR_CSUM 0x00800000 tg3.h 　
32061
 GRC_MODE_IRQ_ON_TX_CPU_ATTNGRC_MODE_IRQ_ON_TX_CPU_ATTN 0x01000000 tg3.h 　
32062
 GRC_MODE_IRQ_ON_RX_CPU_ATTNGRC_MODE_IRQ_ON_RX_CPU_ATTN 0x02000000 tg3.h 　
32063
 GRC_MODE_IRQ_ON_MAC_ATTNGRC_MODE_IRQ_ON_MAC_ATTN 0x04000000 tg3.h 　
32064
 GRC_MODE_IRQ_ON_DMA_ATTNGRC_MODE_IRQ_ON_DMA_ATTN 0x08000000 tg3.h 　
32065
 GRC_MODE_IRQ_ON_FLOW_ATTNGRC_MODE_IRQ_ON_FLOW_ATTN 0x10000000 tg3.h 　
32066
 GRC_MODE_4X_NIC_SEND_RINGSGRC_MODE_4X_NIC_SEND_RINGS 0x20000000 tg3.h 　
32067
 GRC_MODE_MCAST_FRM_ENABLEGRC_MODE_MCAST_FRM_ENABLE 0x40000000 tg3.h 　
32068
 GRC_MISC_CFGGRC_MISC_CFG 0x00006804 tg3.h 　
32069
 GRC_MISC_CFG_CORECLK_RESETGRC_MISC_CFG_CORECLK_RESET 0x00000001 tg3.h 　
32070
 GRC_MISC_CFG_PRESCALAR_MASKGRC_MISC_CFG_PRESCALAR_MASK 0x000000fe tg3.h 　
32071
 GRC_MISC_CFG_PRESCALAR_SHIFTGRC_MISC_CFG_PRESCALAR_SHIFT 1 tg3.h 　
32072
 GRC_MISC_CFG_BOARD_ID_MASKGRC_MISC_CFG_BOARD_ID_MASK 0x0001e000 tg3.h 　
32073
 GRC_MISC_CFG_BOARD_ID_5700GRC_MISC_CFG_BOARD_ID_5700 0x0001e000 tg3.h 　
32074
 GRC_MISC_CFG_BOARD_ID_5701GRC_MISC_CFG_BOARD_ID_5701 0x00000000 tg3.h 　
32075
 GRC_MISC_CFG_BOARD_ID_5702FEGRC_MISC_CFG_BOARD_ID_5702FE 0x00004000 tg3.h 　
32076
 GRC_MISC_CFG_BOARD_ID_5703GRC_MISC_CFG_BOARD_ID_5703 0x00000000 tg3.h 　
32077
 GRC_MISC_CFG_BOARD_ID_5703SGRC_MISC_CFG_BOARD_ID_5703S 0x00002000 tg3.h 　
32078
 GRC_MISC_CFG_BOARD_ID_5704GRC_MISC_CFG_BOARD_ID_5704 0x00000000 tg3.h 　
32079
 GRC_MISC_CFG_BOARD_ID_5704CIOBEGRC_MISC_CFG_BOARD_ID_5704CIOBE 0x00004000 tg3.h 　
32080
 GRC_MISC_CFG_BOARD_ID_5704_A2GRC_MISC_CFG_BOARD_ID_5704_A2 0x00008000 tg3.h 　
32081
 GRC_MISC_CFG_BOARD_ID_5788GRC_MISC_CFG_BOARD_ID_5788 0x00010000 tg3.h 　
32082
 GRC_MISC_CFG_BOARD_ID_5788MGRC_MISC_CFG_BOARD_ID_5788M 0x00018000 tg3.h 　
32083
 GRC_MISC_CFG_BOARD_ID_AC91002A1GRC_MISC_CFG_BOARD_ID_AC91002A1 0x00018000 tg3.h 　
32084
 GRC_MISC_CFG_KEEP_GPHY_POWERGRC_MISC_CFG_KEEP_GPHY_POWER 0x04000000 tg3.h 　
32085
 GRC_LOCAL_CTRLGRC_LOCAL_CTRL 0x00006808 tg3.h 　
32086
 GRC_LCLCTRL_INT_ACTIVEGRC_LCLCTRL_INT_ACTIVE 0x00000001 tg3.h 　
32087
 GRC_LCLCTRL_CLEARINTGRC_LCLCTRL_CLEARINT 0x00000002 tg3.h 　
32088
 GRC_LCLCTRL_SETINTGRC_LCLCTRL_SETINT 0x00000004 tg3.h 　
32089
 GRC_LCLCTRL_INT_ON_ATTNGRC_LCLCTRL_INT_ON_ATTN 0x00000008 tg3.h 　
32090
 GRC_LCLCTRL_GPIO_INPUT0GRC_LCLCTRL_GPIO_INPUT0 0x00000100 tg3.h 　
32091
 GRC_LCLCTRL_GPIO_INPUT1GRC_LCLCTRL_GPIO_INPUT1 0x00000200 tg3.h 　
32092
 GRC_LCLCTRL_GPIO_INPUT2GRC_LCLCTRL_GPIO_INPUT2 0x00000400 tg3.h 　
32093
 GRC_LCLCTRL_GPIO_OE0GRC_LCLCTRL_GPIO_OE0 0x00000800 tg3.h 　
32094
 GRC_LCLCTRL_GPIO_OE1GRC_LCLCTRL_GPIO_OE1 0x00001000 tg3.h 　
32095
 GRC_LCLCTRL_GPIO_OE2GRC_LCLCTRL_GPIO_OE2 0x00002000 tg3.h 　
32096
 GRC_LCLCTRL_GPIO_OUTPUT0GRC_LCLCTRL_GPIO_OUTPUT0 0x00004000 tg3.h 　
32097
 GRC_LCLCTRL_GPIO_OUTPUT1GRC_LCLCTRL_GPIO_OUTPUT1 0x00008000 tg3.h 　
32098
 GRC_LCLCTRL_GPIO_OUTPUT2GRC_LCLCTRL_GPIO_OUTPUT2 0x00010000 tg3.h 　
32099
 GRC_LCLCTRL_EXTMEM_ENABLEGRC_LCLCTRL_EXTMEM_ENABLE 0x00020000 tg3.h 　
32100
 GRC_LCLCTRL_MEMSZ_MASKGRC_LCLCTRL_MEMSZ_MASK 0x001c0000 tg3.h 　
32101
 GRC_LCLCTRL_MEMSZ_256KGRC_LCLCTRL_MEMSZ_256K 0x00000000 tg3.h 　
32102
 GRC_LCLCTRL_MEMSZ_512KGRC_LCLCTRL_MEMSZ_512K 0x00040000 tg3.h 　
32103
 GRC_LCLCTRL_MEMSZ_1MGRC_LCLCTRL_MEMSZ_1M 0x00080000 tg3.h 　
32104
 GRC_LCLCTRL_MEMSZ_2MGRC_LCLCTRL_MEMSZ_2M 0x000c0000 tg3.h 　
32105
 GRC_LCLCTRL_MEMSZ_4MGRC_LCLCTRL_MEMSZ_4M 0x00100000 tg3.h 　
32106
 GRC_LCLCTRL_MEMSZ_8MGRC_LCLCTRL_MEMSZ_8M 0x00140000 tg3.h 　
32107
 GRC_LCLCTRL_MEMSZ_16MGRC_LCLCTRL_MEMSZ_16M 0x00180000 tg3.h 　
32108
 GRC_LCLCTRL_BANK_SELECTGRC_LCLCTRL_BANK_SELECT 0x00200000 tg3.h 　
32109
 GRC_LCLCTRL_SSRAM_TYPEGRC_LCLCTRL_SSRAM_TYPE 0x00400000 tg3.h 　
32110
 GRC_LCLCTRL_AUTO_SEEPROMGRC_LCLCTRL_AUTO_SEEPROM 0x01000000 tg3.h 　
32111
 GRC_TIMERGRC_TIMER 0x0000680c tg3.h 　
32112
 GRC_RX_CPU_EVENTGRC_RX_CPU_EVENT 0x00006810 tg3.h 　
32113
 GRC_RX_TIMER_REFGRC_RX_TIMER_REF 0x00006814 tg3.h 　
32114
 GRC_RX_CPU_SEMGRC_RX_CPU_SEM 0x00006818 tg3.h 　
32115
 GRC_REMOTE_RX_CPU_ATTNGRC_REMOTE_RX_CPU_ATTN 0x0000681c tg3.h 　
32116
 GRC_TX_CPU_EVENTGRC_TX_CPU_EVENT 0x00006820 tg3.h 　
32117
 GRC_TX_TIMER_REFGRC_TX_TIMER_REF 0x00006824 tg3.h 　
32118
 GRC_TX_CPU_SEMGRC_TX_CPU_SEM 0x00006828 tg3.h 　
32119
 GRC_REMOTE_TX_CPU_ATTNGRC_REMOTE_TX_CPU_ATTN 0x0000682c tg3.h 　
32120
 GRC_MEM_POWER_UPGRC_MEM_POWER_UP 0x00006830 tg3.h 64-bit
32121
 GRC_EEPROM_ADDRGRC_EEPROM_ADDR 0x00006838 tg3.h 　
32122
 EEPROM_ADDR_WRITEEEPROM_ADDR_WRITE 0x00000000 tg3.h 　
32123
 EEPROM_ADDR_READEEPROM_ADDR_READ 0x80000000 tg3.h 　
32124
 EEPROM_ADDR_COMPLETEEEPROM_ADDR_COMPLETE 0x40000000 tg3.h 　
32125
 EEPROM_ADDR_FSM_RESETEEPROM_ADDR_FSM_RESET 0x20000000 tg3.h 　
32126
 EEPROM_ADDR_DEVID_MASKEEPROM_ADDR_DEVID_MASK 0x1c000000 tg3.h 　
32127
 EEPROM_ADDR_DEVID_SHIFTEEPROM_ADDR_DEVID_SHIFT 26 tg3.h 　
32128
 EEPROM_ADDR_STARTEEPROM_ADDR_START 0x02000000 tg3.h 　
32129
 EEPROM_ADDR_CLKPERD_SHIFTEEPROM_ADDR_CLKPERD_SHIFT 16 tg3.h 　
32130
 EEPROM_ADDR_ADDR_MASKEEPROM_ADDR_ADDR_MASK 0x0000ffff tg3.h 　
32131
 EEPROM_ADDR_ADDR_SHIFTEEPROM_ADDR_ADDR_SHIFT 0 tg3.h 　
32132
 EEPROM_DEFAULT_CLOCK_PERIODEEPROM_DEFAULT_CLOCK_PERIOD 0x60 tg3.h 　
32133
 EEPROM_CHIP_SIZEEEPROM_CHIP_SIZE (64 * 1024) tg3.h 　
32134
 GRC_EEPROM_DATAGRC_EEPROM_DATA 0x0000683c tg3.h 　
32135
 GRC_EEPROM_CTRLGRC_EEPROM_CTRL 0x00006840 tg3.h 　
32136
 GRC_MDI_CTRLGRC_MDI_CTRL 0x00006844 tg3.h 　
32137
 GRC_SEEPROM_DELAYGRC_SEEPROM_DELAY 0x00006848 tg3.h 　
32138
 NVRAM_CMDNVRAM_CMD 0x00007000 tg3.h 　
32139
 NVRAM_CMD_RESETNVRAM_CMD_RESET 0x00000001 tg3.h 　
32140
 NVRAM_CMD_DONENVRAM_CMD_DONE 0x00000008 tg3.h 　
32141
 NVRAM_CMD_GONVRAM_CMD_GO 0x00000010 tg3.h 　
32142
 NVRAM_CMD_WRNVRAM_CMD_WR 0x00000020 tg3.h 　
32143
 NVRAM_CMD_RDNVRAM_CMD_RD 0x00000000 tg3.h 　
32144
 NVRAM_CMD_ERASENVRAM_CMD_ERASE 0x00000040 tg3.h 　
32145
 NVRAM_CMD_FIRSTNVRAM_CMD_FIRST 0x00000080 tg3.h 　
32146
 NVRAM_CMD_LASTNVRAM_CMD_LAST 0x00000100 tg3.h 　
32147
 NVRAM_STATNVRAM_STAT 0x00007004 tg3.h 　
32148
 NVRAM_WRDATANVRAM_WRDATA 0x00007008 tg3.h 　
32149
 NVRAM_ADDRNVRAM_ADDR 0x0000700c tg3.h 　
32150
 NVRAM_ADDR_MSKNVRAM_ADDR_MSK 0x00ffffff tg3.h 　
32151
 NVRAM_RDDATANVRAM_RDDATA 0x00007010 tg3.h 　
32152
 NVRAM_CFG1NVRAM_CFG1 0x00007014 tg3.h 　
32153
 NVRAM_CFG1_FLASHIF_ENABNVRAM_CFG1_FLASHIF_ENAB 0x00000001 tg3.h 　
32154
 NVRAM_CFG1_BUFFERED_MODENVRAM_CFG1_BUFFERED_MODE 0x00000002 tg3.h 　
32155
 NVRAM_CFG1_PASS_THRUNVRAM_CFG1_PASS_THRU 0x00000004 tg3.h 　
32156
 NVRAM_CFG1_BIT_BANGNVRAM_CFG1_BIT_BANG 0x00000008 tg3.h 　
32157
 NVRAM_CFG1_COMPAT_BYPASSNVRAM_CFG1_COMPAT_BYPASS 0x80000000 tg3.h 　
32158
 NVRAM_CFG2NVRAM_CFG2 0x00007018 tg3.h 　
32159
 NVRAM_CFG3NVRAM_CFG3 0x0000701c tg3.h 　
32160
 NVRAM_SWARBNVRAM_SWARB 0x00007020 tg3.h 　
32161
 SWARB_REQ_SET0SWARB_REQ_SET0 0x00000001 tg3.h 　
32162
 SWARB_REQ_SET1SWARB_REQ_SET1 0x00000002 tg3.h 　
32163
 SWARB_REQ_SET2SWARB_REQ_SET2 0x00000004 tg3.h 　
32164
 SWARB_REQ_SET3SWARB_REQ_SET3 0x00000008 tg3.h 　
32165
 SWARB_REQ_CLR0SWARB_REQ_CLR0 0x00000010 tg3.h 　
32166
 SWARB_REQ_CLR1SWARB_REQ_CLR1 0x00000020 tg3.h 　
32167
 SWARB_REQ_CLR2SWARB_REQ_CLR2 0x00000040 tg3.h 　
32168
 SWARB_REQ_CLR3SWARB_REQ_CLR3 0x00000080 tg3.h 　
32169
 SWARB_GNT0SWARB_GNT0 0x00000100 tg3.h 　
32170
 SWARB_GNT1SWARB_GNT1 0x00000200 tg3.h 　
32171
 SWARB_GNT2SWARB_GNT2 0x00000400 tg3.h 　
32172
 SWARB_GNT3SWARB_GNT3 0x00000800 tg3.h 　
32173
 SWARB_REQ0SWARB_REQ0 0x00001000 tg3.h 　
32174
 SWARB_REQ1SWARB_REQ1 0x00002000 tg3.h 　
32175
 SWARB_REQ2SWARB_REQ2 0x00004000 tg3.h 　
32176
 SWARB_REQ3SWARB_REQ3 0x00008000 tg3.h 　
32177
 NVRAM_BUFFERED_PAGE_SIZENVRAM_BUFFERED_PAGE_SIZE 264 tg3.h 　
32178
 NVRAM_BUFFERED_PAGE_POSNVRAM_BUFFERED_PAGE_POS 9 tg3.h 　
32179
 NIC_SRAM_WIN_BASENIC_SRAM_WIN_BASE 0x00008000 tg3.h 　
32180
 NIC_SRAM_PAGE_ZERONIC_SRAM_PAGE_ZERO 0x00000000 tg3.h 　
32181
 NIC_SRAM_SEND_RCBNIC_SRAM_SEND_RCB 0x00000100 tg3.h 16 * TG3_BDINFO_...
32182
 NIC_SRAM_RCV_RET_RCBNIC_SRAM_RCV_RET_RCB 0x00000200 tg3.h 16 * TG3_BDINFO_...
32183
 NIC_SRAM_STATS_BLKNIC_SRAM_STATS_BLK 0x00000300 tg3.h 　
32184
 NIC_SRAM_STATUS_BLKNIC_SRAM_STATUS_BLK 0x00000b00 tg3.h 　
32185
 NIC_SRAM_FIRMWARE_MBOXNIC_SRAM_FIRMWARE_MBOX 0x00000b50 tg3.h 　
32186
 NIC_SRAM_FIRMWARE_MBOX_MAGIC1NIC_SRAM_FIRMWARE_MBOX_MAGIC1 0x4B657654 tg3.h 　
32187
 NIC_SRAM_FIRMWARE_MBOX_MAGIC2NIC_SRAM_FIRMWARE_MBOX_MAGIC2 0x4861764b tg3.h !dma on linkchg
32188
 NIC_SRAM_DATA_SIGNIC_SRAM_DATA_SIG 0x00000b54 tg3.h 　
32189
 NIC_SRAM_DATA_SIG_MAGICNIC_SRAM_DATA_SIG_MAGIC 0x4b657654 tg3.h ascii for 'KevT'
32190
 NIC_SRAM_DATA_CFGNIC_SRAM_DATA_CFG 0x00000b58 tg3.h 　
32191
 NIC_SRAM_DATA_CFG_LED_MODE_MASKNIC_SRAM_DATA_CFG_LED_MODE_MASK 0x0000000c tg3.h 　
32192
 NIC_SRAM_DATA_CFG_LED_MODE_UNKNNIC_SRAM_DATA_CFG_LED_MODE_UNKN 0x00000000 tg3.h 　
32193
 NIC_SRAM_DATA_CFG_LED_TRIPLE_SPNIC_SRAM_DATA_CFG_LED_TRIPLE_SP 0x00000004 tg3.h 　
32194
 NIC_SRAM_DATA_CFG_LED_OPEN_DRAINIC_SRAM_DATA_CFG_LED_OPEN_DRAI 0x00000004 tg3.h 　
32195
 NIC_SRAM_DATA_CFG_LED_LINK_SPDNIC_SRAM_DATA_CFG_LED_LINK_SPD 0x00000008 tg3.h 　
32196
 NIC_SRAM_DATA_CFG_LED_OUTPUTNIC_SRAM_DATA_CFG_LED_OUTPUT 0x00000008 tg3.h 　
32197
 NIC_SRAM_DATA_CFG_PHY_TYPE_MASKNIC_SRAM_DATA_CFG_PHY_TYPE_MASK 0x00000030 tg3.h 　
32198
 NIC_SRAM_DATA_CFG_PHY_TYPE_UNKNNIC_SRAM_DATA_CFG_PHY_TYPE_UNKN 0x00000000 tg3.h 　
32199
 NIC_SRAM_DATA_CFG_PHY_TYPE_COPPNIC_SRAM_DATA_CFG_PHY_TYPE_COPP 0x00000010 tg3.h 　
32200
 NIC_SRAM_DATA_CFG_PHY_TYPE_FIBENIC_SRAM_DATA_CFG_PHY_TYPE_FIBE 0x00000020 tg3.h 　
32201
 NIC_SRAM_DATA_CFG_WOL_ENABLENIC_SRAM_DATA_CFG_WOL_ENABLE 0x00000040 tg3.h 　
32202
 NIC_SRAM_DATA_CFG_ASF_ENABLENIC_SRAM_DATA_CFG_ASF_ENABLE 0x00000080 tg3.h 　
32203
 NIC_SRAM_DATA_CFG_EEPROM_WPNIC_SRAM_DATA_CFG_EEPROM_WP 0x00000100 tg3.h 　
32204
 NIC_SRAM_DATA_CFG_MINI_PCINIC_SRAM_DATA_CFG_MINI_PCI 0x00001000 tg3.h 　
32205
 NIC_SRAM_DATA_CFG_FIBER_WOLNIC_SRAM_DATA_CFG_FIBER_WOL 0x00004000 tg3.h 　
32206
 NIC_SRAM_DATA_PHY_IDNIC_SRAM_DATA_PHY_ID 0x00000b74 tg3.h 　
32207
 NIC_SRAM_DATA_PHY_ID1_MASKNIC_SRAM_DATA_PHY_ID1_MASK 0xffff0000 tg3.h 　
32208
 NIC_SRAM_DATA_PHY_ID2_MASKNIC_SRAM_DATA_PHY_ID2_MASK 0x0000ffff tg3.h 　
32209
 NIC_SRAM_FW_CMD_MBOXNIC_SRAM_FW_CMD_MBOX 0x00000b78 tg3.h 　
32210
 FWCMD_NICDRV_ALIVEFWCMD_NICDRV_ALIVE 0x00000001 tg3.h 　
32211
 FWCMD_NICDRV_PAUSE_FWFWCMD_NICDRV_PAUSE_FW 0x00000002 tg3.h 　
32212
 FWCMD_NICDRV_IPV4ADDR_CHGFWCMD_NICDRV_IPV4ADDR_CHG 0x00000003 tg3.h 　
32213
 FWCMD_NICDRV_IPV6ADDR_CHGFWCMD_NICDRV_IPV6ADDR_CHG 0x00000004 tg3.h 　
32214
 FWCMD_NICDRV_FIX_DMARFWCMD_NICDRV_FIX_DMAR 0x00000005 tg3.h 　
32215
 FWCMD_NICDRV_FIX_DMAWFWCMD_NICDRV_FIX_DMAW 0x00000006 tg3.h 　
32216
 NIC_SRAM_FW_CMD_LEN_MBOXNIC_SRAM_FW_CMD_LEN_MBOX 0x00000b7c tg3.h 　
32217
 NIC_SRAM_FW_CMD_DATA_MBOXNIC_SRAM_FW_CMD_DATA_MBOX 0x00000b80 tg3.h 　
32218
 NIC_SRAM_FW_ASF_STATUS_MBOXNIC_SRAM_FW_ASF_STATUS_MBOX 0x00000c00 tg3.h 　
32219
 NIC_SRAM_FW_DRV_STATE_MBOXNIC_SRAM_FW_DRV_STATE_MBOX 0x00000c04 tg3.h 　
32220
 DRV_STATE_STARTDRV_STATE_START 0x00000001 tg3.h 　
32221
 DRV_STATE_UNLOADDRV_STATE_UNLOAD 0x00000002 tg3.h 　
32222
 DRV_STATE_WOLDRV_STATE_WOL 0x00000003 tg3.h 　
32223
 DRV_STATE_SUSPENDDRV_STATE_SUSPEND 0x00000004 tg3.h 　
32224
 NIC_SRAM_FW_RESET_TYPE_MBOXNIC_SRAM_FW_RESET_TYPE_MBOX 0x00000c08 tg3.h 　
32225
 NIC_SRAM_MAC_ADDR_HIGH_MBOXNIC_SRAM_MAC_ADDR_HIGH_MBOX 0x00000c14 tg3.h 　
32226
 NIC_SRAM_MAC_ADDR_LOW_MBOXNIC_SRAM_MAC_ADDR_LOW_MBOX 0x00000c18 tg3.h 　
32227
 NIC_SRAM_RX_MINI_BUFFER_DESCNIC_SRAM_RX_MINI_BUFFER_DESC 0x00001000 tg3.h 　
32228
 NIC_SRAM_DMA_DESC_POOL_BASENIC_SRAM_DMA_DESC_POOL_BASE 0x00002000 tg3.h 　
32229
 NIC_SRAM_DMA_DESC_POOL_SIZENIC_SRAM_DMA_DESC_POOL_SIZE 0x00002000 tg3.h 　
32230
 NIC_SRAM_TX_BUFFER_DESCNIC_SRAM_TX_BUFFER_DESC 0x00004000 tg3.h 512 entries
32231
 NIC_SRAM_RX_BUFFER_DESCNIC_SRAM_RX_BUFFER_DESC 0x00006000 tg3.h 256 entries
32232
 NIC_SRAM_RX_JUMBO_BUFFER_DESCNIC_SRAM_RX_JUMBO_BUFFER_DESC 0x00007000 tg3.h 256 entries
32233
 NIC_SRAM_MBUF_POOL_BASENIC_SRAM_MBUF_POOL_BASE 0x00008000 tg3.h 　
32234
 NIC_SRAM_MBUF_POOL_SIZE96NIC_SRAM_MBUF_POOL_SIZE96 0x00018000 tg3.h 　
32235
 NIC_SRAM_MBUF_POOL_SIZE64NIC_SRAM_MBUF_POOL_SIZE64 0x00010000 tg3.h 　
32236
 NIC_SRAM_MBUF_POOL_BASE5705NIC_SRAM_MBUF_POOL_BASE5705 0x00010000 tg3.h 　
32237
 NIC_SRAM_MBUF_POOL_SIZE5705NIC_SRAM_MBUF_POOL_SIZE5705 0x0000e000 tg3.h 　
32238
 PHY_ADDRPHY_ADDR 0x01 tg3.h 　
32239
 TG3_BMCR_SPEED1000TG3_BMCR_SPEED1000 0x0040 tg3.h 　
32240
 MII_TG3_CTRLMII_TG3_CTRL 0x09 tg3.h 1000-baseT control register
32241
 MII_TG3_CTRL_ADV_1000_HALFMII_TG3_CTRL_ADV_1000_HALF 0x0100 tg3.h 　
32242
 MII_TG3_CTRL_ADV_1000_FULLMII_TG3_CTRL_ADV_1000_FULL 0x0200 tg3.h 　
32243
 MII_TG3_CTRL_AS_MASTERMII_TG3_CTRL_AS_MASTER 0x0800 tg3.h 　
32244
 MII_TG3_CTRL_ENABLE_AS_MASTERMII_TG3_CTRL_ENABLE_AS_MASTER 0x1000 tg3.h 　
32245
 MII_TG3_EXT_CTRLMII_TG3_EXT_CTRL 0x10 tg3.h Extended control register
32246
 MII_TG3_EXT_CTRL_LNK3_LED_MODEMII_TG3_EXT_CTRL_LNK3_LED_MODE 0x0002 tg3.h 　
32247
 MII_TG3_EXT_CTRL_TBIMII_TG3_EXT_CTRL_TBI 0x8000 tg3.h 　
32248
 MII_TG3_EXT_STATMII_TG3_EXT_STAT 0x11 tg3.h Extended status register
32249
 MII_TG3_EXT_STAT_LPASSMII_TG3_EXT_STAT_LPASS 0x0100 tg3.h 　
32250
 MII_TG3_DSP_RW_PORTMII_TG3_DSP_RW_PORT 0x15 tg3.h DSP coefficient read/write port
32251
 MII_TG3_DSP_ADDRESSMII_TG3_DSP_ADDRESS 0x17 tg3.h DSP address register
32252
 MII_TG3_AUX_CTRLMII_TG3_AUX_CTRL 0x18 tg3.h auxilliary control register
32253
 MII_TG3_AUX_STATMII_TG3_AUX_STAT 0x19 tg3.h auxilliary status register
32254
 MII_TG3_AUX_STAT_LPASSMII_TG3_AUX_STAT_LPASS 0x0004 tg3.h 　
32255
 MII_TG3_AUX_STAT_SPDMASKMII_TG3_AUX_STAT_SPDMASK 0x0700 tg3.h 　
32256
 MII_TG3_AUX_STAT_10HALFMII_TG3_AUX_STAT_10HALF 0x0100 tg3.h 　
32257
 MII_TG3_AUX_STAT_10FULLMII_TG3_AUX_STAT_10FULL 0x0200 tg3.h 　
32258
 MII_TG3_AUX_STAT_100HALFMII_TG3_AUX_STAT_100HALF 0x0300 tg3.h 　
32259
 MII_TG3_AUX_STAT_100_4MII_TG3_AUX_STAT_100_4 0x0400 tg3.h 　
32260
 MII_TG3_AUX_STAT_100FULLMII_TG3_AUX_STAT_100FULL 0x0500 tg3.h 　
32261
 MII_TG3_AUX_STAT_1000HALFMII_TG3_AUX_STAT_1000HALF 0x0600 tg3.h 　
32262
 MII_TG3_AUX_STAT_1000FULLMII_TG3_AUX_STAT_1000FULL 0x0700 tg3.h 　
32263
 MII_TG3_ISTATMII_TG3_ISTAT 0x1a tg3.h IRQ status register
32264
 MII_TG3_IMASKMII_TG3_IMASK 0x1b tg3.h IRQ mask register
32265
 MII_TG3_INT_LINKCHGMII_TG3_INT_LINKCHG 0x0002 tg3.h 　
32266
 MII_TG3_INT_SPEEDCHGMII_TG3_INT_SPEEDCHG 0x0004 tg3.h 　
32267
 MII_TG3_INT_DUPLEXCHGMII_TG3_INT_DUPLEXCHG 0x0008 tg3.h 　
32268
 MII_TG3_INT_ANEG_PAGE_RXMII_TG3_INT_ANEG_PAGE_RX 0x0400 tg3.h 　
32269
 TXD_ADDRTXD_ADDR 0x00UL tg3.h 64-bit
32270
 TXD_LEN_FLAGSTXD_LEN_FLAGS 0x08UL tg3.h 32-bit (upper 16-bits are len)
32271
 TXD_VLAN_TAGTXD_VLAN_TAG 0x0cUL tg3.h 32-bit (upper 16-bits are tag)
32272
 TXD_SIZETXD_SIZE 0x10UL tg3.h 　
32273
 TG3_HW_STATUS_SIZETG3_HW_STATUS_SIZE 0x50 tg3.h 　
32274
 FALSEFALSE 0 tlan.h 　
32275
 TRUETRUE 1 tlan.h 　
32276
 TLAN_MIN_FRAME_SIZETLAN_MIN_FRAME_SIZE 64 tlan.h 　
32277
 TLAN_MAX_FRAME_SIZETLAN_MAX_FRAME_SIZE 1600 tlan.h 　
32278
 TLAN_NUM_RX_LISTSTLAN_NUM_RX_LISTS 4 tlan.h 　
32279
 TLAN_NUM_TX_LISTSTLAN_NUM_TX_LISTS 2 tlan.h 　
32280
 TLAN_IGNORETLAN_IGNORE 0 tlan.h 　
32281
 TLAN_RECORDTLAN_RECORD 1 tlan.h 　
32282
 TLAN_DEBUG_GNRLTLAN_DEBUG_GNRL 0x0001 tlan.h 　
32283
 TLAN_DEBUG_TXTLAN_DEBUG_TX 0x0002 tlan.h 　
32284
 TLAN_DEBUG_RXTLAN_DEBUG_RX 0x0004 tlan.h 　
32285
 TLAN_DEBUG_LISTTLAN_DEBUG_LIST 0x0008 tlan.h 　
32286
 TLAN_DEBUG_PROBETLAN_DEBUG_PROBE 0x0010 tlan.h 　
32287
 TX_TIMEOUTTX_TIMEOUT (10*HZ) tlan.h We need time for auto-neg
32288
 MAX_TLAN_BOARDSMAX_TLAN_BOARDS 8 tlan.h Max number of boards installed at a time
32289
 PCI_DEVICE_ID_NETELLIGENT_10_T2PCI_DEVICE_ID_NETELLIGENT_10_T2 0xB012 tlan.h 　
32290
 PCI_DEVICE_ID_NETELLIGENT_10_10PCI_DEVICE_ID_NETELLIGENT_10_10 0xB030 tlan.h 　
32291
 PCI_DEVICE_ID_OLICOM_OC2183PCI_DEVICE_ID_OLICOM_OC2183 0x0013 tlan.h 　
32292
 PCI_DEVICE_ID_OLICOM_OC2325PCI_DEVICE_ID_OLICOM_OC2325 0x0012 tlan.h 　
32293
 PCI_DEVICE_ID_OLICOM_OC2326PCI_DEVICE_ID_OLICOM_OC2326 0x0014 tlan.h 　
32294
 TLAN_ADAPTER_NONETLAN_ADAPTER_NONE 0x00000000 tlan.h 　
32295
 TLAN_ADAPTER_UNMANAGED_PHYTLAN_ADAPTER_UNMANAGED_PHY 0x00000001 tlan.h 　
32296
 TLAN_ADAPTER_BIT_RATE_PHYTLAN_ADAPTER_BIT_RATE_PHY 0x00000002 tlan.h 　
32297
 TLAN_ADAPTER_USE_INTERN_10TLAN_ADAPTER_USE_INTERN_10 0x00000004 tlan.h 　
32298
 TLAN_ADAPTER_ACTIVITY_LEDTLAN_ADAPTER_ACTIVITY_LED 0x00000008 tlan.h 　
32299
 TLAN_SPEED_DEFAULTTLAN_SPEED_DEFAULT 0 tlan.h 　
32300
 TLAN_SPEED_10TLAN_SPEED_10 10 tlan.h 　
32301
 TLAN_SPEED_100TLAN_SPEED_100 100 tlan.h 　
32302
 TLAN_DUPLEX_DEFAULTTLAN_DUPLEX_DEFAULT 0 tlan.h 　
32303
 TLAN_DUPLEX_HALFTLAN_DUPLEX_HALF 1 tlan.h 　
32304
 TLAN_DUPLEX_FULLTLAN_DUPLEX_FULL 2 tlan.h 　
32305
 EISA_IDEISA_ID 0xc80 tlan.h EISA ID Registers
32306
 EISA_ID0EISA_ID0 0xc80 tlan.h EISA ID Register 0
32307
 EISA_ID1EISA_ID1 0xc81 tlan.h EISA ID Register 1
32308
 EISA_ID2EISA_ID2 0xc82 tlan.h EISA ID Register 2
32309
 EISA_ID3EISA_ID3 0xc83 tlan.h EISA ID Register 3
32310
 EISA_CREISA_CR 0xc84 tlan.h EISA Control Register
32311
 EISA_REG0EISA_REG0 0xc88 tlan.h EISA Configuration Register 0
32312
 EISA_REG1EISA_REG1 0xc89 tlan.h EISA Configuration Register 1
32313
 EISA_REG2EISA_REG2 0xc8a tlan.h EISA Configuration Register 2
32314
 EISA_REG3EISA_REG3 0xc8f tlan.h EISA Configuration Register 3
32315
 EISA_APROMEISA_APROM 0xc90 tlan.h Ethernet Address PROM
32316
 TLAN_BUFFERS_PER_LISTTLAN_BUFFERS_PER_LIST 10 tlan.h 　
32317
 TLAN_LAST_BUFFERTLAN_LAST_BUFFER 0x80000000 tlan.h 　
32318
 TLAN_CSTAT_UNUSEDTLAN_CSTAT_UNUSED 0x8000 tlan.h 　
32319
 TLAN_CSTAT_FRM_CMPTLAN_CSTAT_FRM_CMP 0x4000 tlan.h 　
32320
 TLAN_CSTAT_READYTLAN_CSTAT_READY 0x3000 tlan.h 　
32321
 TLAN_CSTAT_EOCTLAN_CSTAT_EOC 0x0800 tlan.h 　
32322
 TLAN_CSTAT_RX_ERRORTLAN_CSTAT_RX_ERROR 0x0400 tlan.h 　
32323
 TLAN_CSTAT_PASS_CRCTLAN_CSTAT_PASS_CRC 0x0200 tlan.h 　
32324
 TLAN_CSTAT_DP_PRTLAN_CSTAT_DP_PR 0x0100 tlan.h 　
32325
 TLAN_PHY_MAX_ADDRTLAN_PHY_MAX_ADDR 0x1F tlan.h 　
32326
 TLAN_PHY_NONETLAN_PHY_NONE 0x20 tlan.h 　
32327
 TLAN_TIMER_LINK_BEATTLAN_TIMER_LINK_BEAT 1 tlan.h 　
32328
 TLAN_TIMER_ACTIVITYTLAN_TIMER_ACTIVITY 2 tlan.h 　
32329
 TLAN_TIMER_PHY_PDOWNTLAN_TIMER_PHY_PDOWN 3 tlan.h 　
32330
 TLAN_TIMER_PHY_PUPTLAN_TIMER_PHY_PUP 4 tlan.h 　
32331
 TLAN_TIMER_PHY_RESETTLAN_TIMER_PHY_RESET 5 tlan.h 　
32332
 TLAN_TIMER_PHY_START_LINKTLAN_TIMER_PHY_START_LINK 6 tlan.h 　
32333
 TLAN_TIMER_PHY_FINISH_ANTLAN_TIMER_PHY_FINISH_AN 7 tlan.h 　
32334
 TLAN_TIMER_FINISH_RESETTLAN_TIMER_FINISH_RESET 8 tlan.h 　
32335
 TLAN_TIMER_ACT_DELAYTLAN_TIMER_ACT_DELAY (HZ/10) tlan.h 　
32336
 TLAN_EEPROM_ACKTLAN_EEPROM_ACK 0 tlan.h 　
32337
 TLAN_EEPROM_STOPTLAN_EEPROM_STOP 1 tlan.h 　
32338
 TLAN_HOST_CMDTLAN_HOST_CMD 0x00 tlan.h 　
32339
 TLAN_HC_GOTLAN_HC_GO 0x80000000 tlan.h 　
32340
 TLAN_HC_STOPTLAN_HC_STOP 0x40000000 tlan.h 　
32341
 TLAN_HC_ACKTLAN_HC_ACK 0x20000000 tlan.h 　
32342
 TLAN_HC_CS_MASKTLAN_HC_CS_MASK 0x1FE00000 tlan.h 　
32343
 TLAN_HC_EOCTLAN_HC_EOC 0x00100000 tlan.h 　
32344
 TLAN_HC_RTTLAN_HC_RT 0x00080000 tlan.h 　
32345
 TLAN_HC_NESTLAN_HC_NES 0x00040000 tlan.h 　
32346
 TLAN_HC_AD_RSTTLAN_HC_AD_RST 0x00008000 tlan.h 　
32347
 TLAN_HC_LD_TMRTLAN_HC_LD_TMR 0x00004000 tlan.h 　
32348
 TLAN_HC_LD_THRTLAN_HC_LD_THR 0x00002000 tlan.h 　
32349
 TLAN_HC_REQ_INTTLAN_HC_REQ_INT 0x00001000 tlan.h 　
32350
 TLAN_HC_INT_OFFTLAN_HC_INT_OFF 0x00000800 tlan.h 　
32351
 TLAN_HC_INT_ONTLAN_HC_INT_ON 0x00000400 tlan.h 　
32352
 TLAN_HC_AC_MASKTLAN_HC_AC_MASK 0x000000FF tlan.h 　
32353
 TLAN_CH_PARMTLAN_CH_PARM 0x04 tlan.h 　
32354
 TLAN_DIO_ADRTLAN_DIO_ADR 0x08 tlan.h 　
32355
 TLAN_DA_ADR_INCTLAN_DA_ADR_INC 0x8000 tlan.h 　
32356
 TLAN_DA_RAM_ADRTLAN_DA_RAM_ADR 0x4000 tlan.h 　
32357
 TLAN_HOST_INTTLAN_HOST_INT 0x0A tlan.h 　
32358
 TLAN_HI_IV_MASKTLAN_HI_IV_MASK 0x1FE0 tlan.h 　
32359
 TLAN_HI_IT_MASKTLAN_HI_IT_MASK 0x001C tlan.h 　
32360
 TLAN_DIO_DATATLAN_DIO_DATA 0x0C tlan.h 　
32361
 TLAN_NET_CMDTLAN_NET_CMD 0x00 tlan.h 　
32362
 TLAN_NET_CMD_NRESETTLAN_NET_CMD_NRESET 0x80 tlan.h 　
32363
 TLAN_NET_CMD_NWRAPTLAN_NET_CMD_NWRAP 0x40 tlan.h 　
32364
 TLAN_NET_CMD_CSFTLAN_NET_CMD_CSF 0x20 tlan.h 　
32365
 TLAN_NET_CMD_CAFTLAN_NET_CMD_CAF 0x10 tlan.h 　
32366
 TLAN_NET_CMD_NOBRXTLAN_NET_CMD_NOBRX 0x08 tlan.h 　
32367
 TLAN_NET_CMD_DUPLEXTLAN_NET_CMD_DUPLEX 0x04 tlan.h 　
32368
 TLAN_NET_CMD_TRFRAMTLAN_NET_CMD_TRFRAM 0x02 tlan.h 　
32369
 TLAN_NET_CMD_TXPACETLAN_NET_CMD_TXPACE 0x01 tlan.h 　
32370
 TLAN_NET_SIOTLAN_NET_SIO 0x01 tlan.h 　
32371
 TLAN_NET_SIO_MINTENTLAN_NET_SIO_MINTEN 0x80 tlan.h 　
32372
 TLAN_NET_SIO_ECLOKTLAN_NET_SIO_ECLOK 0x40 tlan.h 　
32373
 TLAN_NET_SIO_ETXENTLAN_NET_SIO_ETXEN 0x20 tlan.h 　
32374
 TLAN_NET_SIO_EDATATLAN_NET_SIO_EDATA 0x10 tlan.h 　
32375
 TLAN_NET_SIO_NMRSTTLAN_NET_SIO_NMRST 0x08 tlan.h 　
32376
 TLAN_NET_SIO_MCLKTLAN_NET_SIO_MCLK 0x04 tlan.h 　
32377
 TLAN_NET_SIO_MTXENTLAN_NET_SIO_MTXEN 0x02 tlan.h 　
32378
 TLAN_NET_SIO_MDATATLAN_NET_SIO_MDATA 0x01 tlan.h 　
32379
 TLAN_NET_STSTLAN_NET_STS 0x02 tlan.h 　
32380
 TLAN_NET_STS_MIRQTLAN_NET_STS_MIRQ 0x80 tlan.h 　
32381
 TLAN_NET_STS_HBEATTLAN_NET_STS_HBEAT 0x40 tlan.h 　
32382
 TLAN_NET_STS_TXSTOPTLAN_NET_STS_TXSTOP 0x20 tlan.h 　
32383
 TLAN_NET_STS_RXSTOPTLAN_NET_STS_RXSTOP 0x10 tlan.h 　
32384
 TLAN_NET_STS_RSRVDTLAN_NET_STS_RSRVD 0x0F tlan.h 　
32385
 TLAN_NET_MASKTLAN_NET_MASK 0x03 tlan.h 　
32386
 TLAN_NET_MASK_MASK7TLAN_NET_MASK_MASK7 0x80 tlan.h 　
32387
 TLAN_NET_MASK_MASK6TLAN_NET_MASK_MASK6 0x40 tlan.h 　
32388
 TLAN_NET_MASK_MASK5TLAN_NET_MASK_MASK5 0x20 tlan.h 　
32389
 TLAN_NET_MASK_MASK4TLAN_NET_MASK_MASK4 0x10 tlan.h 　
32390
 TLAN_NET_MASK_RSRVDTLAN_NET_MASK_RSRVD 0x0F tlan.h 　
32391
 TLAN_NET_CONFIGTLAN_NET_CONFIG 0x04 tlan.h 　
32392
 TLAN_NET_CFG_RCLKTLAN_NET_CFG_RCLK 0x8000 tlan.h 　
32393
 TLAN_NET_CFG_TCLKTLAN_NET_CFG_TCLK 0x4000 tlan.h 　
32394
 TLAN_NET_CFG_BITTLAN_NET_CFG_BIT 0x2000 tlan.h 　
32395
 TLAN_NET_CFG_RXCRCTLAN_NET_CFG_RXCRC 0x1000 tlan.h 　
32396
 TLAN_NET_CFG_PEFTLAN_NET_CFG_PEF 0x0800 tlan.h 　
32397
 TLAN_NET_CFG_1FRAGTLAN_NET_CFG_1FRAG 0x0400 tlan.h 　
32398
 TLAN_NET_CFG_1CHANTLAN_NET_CFG_1CHAN 0x0200 tlan.h 　
32399
 TLAN_NET_CFG_MTESTTLAN_NET_CFG_MTEST 0x0100 tlan.h 　
32400
 TLAN_NET_CFG_PHY_ENTLAN_NET_CFG_PHY_EN 0x0080 tlan.h 　
32401
 TLAN_NET_CFG_MSMASKTLAN_NET_CFG_MSMASK 0x007F tlan.h 　
32402
 TLAN_MAN_TESTTLAN_MAN_TEST 0x06 tlan.h 　
32403
 TLAN_DEF_VENDOR_IDTLAN_DEF_VENDOR_ID 0x08 tlan.h 　
32404
 TLAN_DEF_DEVICE_IDTLAN_DEF_DEVICE_ID 0x0A tlan.h 　
32405
 TLAN_DEF_REVISIONTLAN_DEF_REVISION 0x0C tlan.h 　
32406
 TLAN_DEF_SUBCLASSTLAN_DEF_SUBCLASS 0x0D tlan.h 　
32407
 TLAN_DEF_MIN_LATTLAN_DEF_MIN_LAT 0x0E tlan.h 　
32408
 TLAN_DEF_MAX_LATTLAN_DEF_MAX_LAT 0x0F tlan.h 　
32409
 TLAN_AREG_0TLAN_AREG_0 0x10 tlan.h 　
32410
 TLAN_AREG_1TLAN_AREG_1 0x16 tlan.h 　
32411
 TLAN_AREG_2TLAN_AREG_2 0x1C tlan.h 　
32412
 TLAN_AREG_3TLAN_AREG_3 0x22 tlan.h 　
32413
 TLAN_HASH_1TLAN_HASH_1 0x28 tlan.h 　
32414
 TLAN_HASH_2TLAN_HASH_2 0x2C tlan.h 　
32415
 TLAN_GOOD_TX_FRMSTLAN_GOOD_TX_FRMS 0x30 tlan.h 　
32416
 TLAN_TX_UNDERUNSTLAN_TX_UNDERUNS 0x33 tlan.h 　
32417
 TLAN_GOOD_RX_FRMSTLAN_GOOD_RX_FRMS 0x34 tlan.h 　
32418
 TLAN_RX_OVERRUNSTLAN_RX_OVERRUNS 0x37 tlan.h 　
32419
 TLAN_DEFERRED_TXTLAN_DEFERRED_TX 0x38 tlan.h 　
32420
 TLAN_CRC_ERRORSTLAN_CRC_ERRORS 0x3A tlan.h 　
32421
 TLAN_CODE_ERRORSTLAN_CODE_ERRORS 0x3B tlan.h 　
32422
 TLAN_MULTICOL_FRMSTLAN_MULTICOL_FRMS 0x3C tlan.h 　
32423
 TLAN_SINGLECOL_FRMSTLAN_SINGLECOL_FRMS 0x3E tlan.h 　
32424
 TLAN_EXCESSCOL_FRMSTLAN_EXCESSCOL_FRMS 0x40 tlan.h 　
32425
 TLAN_LATE_COLSTLAN_LATE_COLS 0x41 tlan.h 　
32426
 TLAN_CARRIER_LOSSTLAN_CARRIER_LOSS 0x42 tlan.h 　
32427
 TLAN_ACOMMITTLAN_ACOMMIT 0x43 tlan.h 　
32428
 TLAN_LED_REGTLAN_LED_REG 0x44 tlan.h 　
32429
 TLAN_LED_ACTTLAN_LED_ACT 0x10 tlan.h 　
32430
 TLAN_LED_LINKTLAN_LED_LINK 0x01 tlan.h 　
32431
 TLAN_BSIZE_REGTLAN_BSIZE_REG 0x45 tlan.h 　
32432
 TLAN_MAX_RXTLAN_MAX_RX 0x46 tlan.h 　
32433
 TLAN_INT_DISTLAN_INT_DIS 0x48 tlan.h 　
32434
 TLAN_ID_TX_EOCTLAN_ID_TX_EOC 0x04 tlan.h 　
32435
 TLAN_ID_RX_EOFTLAN_ID_RX_EOF 0x02 tlan.h 　
32436
 TLAN_ID_RX_EOCTLAN_ID_RX_EOC 0x01 tlan.h 　
32437
 TLAN_INT_NUMBER_OF_INTSTLAN_INT_NUMBER_OF_INTS 8 tlan.h 　
32438
 TLAN_INT_NONETLAN_INT_NONE 0x0000 tlan.h 　
32439
 TLAN_INT_TX_EOFTLAN_INT_TX_EOF 0x0001 tlan.h 　
32440
 TLAN_INT_STAT_OVERFLOWTLAN_INT_STAT_OVERFLOW 0x0002 tlan.h 　
32441
 TLAN_INT_RX_EOFTLAN_INT_RX_EOF 0x0003 tlan.h 　
32442
 TLAN_INT_DUMMYTLAN_INT_DUMMY 0x0004 tlan.h 　
32443
 TLAN_INT_TX_EOCTLAN_INT_TX_EOC 0x0005 tlan.h 　
32444
 TLAN_INT_STATUS_CHECKTLAN_INT_STATUS_CHECK 0x0006 tlan.h 　
32445
 TLAN_INT_RX_EOCTLAN_INT_RX_EOC 0x0007 tlan.h 　
32446
 TLAN_TLPHY_IDTLAN_TLPHY_ID 0x10 tlan.h 　
32447
 TLAN_TLPHY_CTLTLAN_TLPHY_CTL 0x11 tlan.h 　
32448
 TLAN_TC_IGLINKTLAN_TC_IGLINK 0x8000 tlan.h 　
32449
 TLAN_TC_SWAPOLTLAN_TC_SWAPOL 0x4000 tlan.h 　
32450
 TLAN_TC_AUISELTLAN_TC_AUISEL 0x2000 tlan.h 　
32451
 TLAN_TC_SQEENTLAN_TC_SQEEN 0x1000 tlan.h 　
32452
 TLAN_TC_MTESTTLAN_TC_MTEST 0x0800 tlan.h 　
32453
 TLAN_TC_RESERVEDTLAN_TC_RESERVED 0x07F8 tlan.h 　
32454
 TLAN_TC_NFEWTLAN_TC_NFEW 0x0004 tlan.h 　
32455
 TLAN_TC_INTENTLAN_TC_INTEN 0x0002 tlan.h 　
32456
 TLAN_TC_TINTTLAN_TC_TINT 0x0001 tlan.h 　
32457
 TLAN_TLPHY_STSTLAN_TLPHY_STS 0x12 tlan.h 　
32458
 TLAN_TS_MINTTLAN_TS_MINT 0x8000 tlan.h 　
32459
 TLAN_TS_PHOKTLAN_TS_PHOK 0x4000 tlan.h 　
32460
 TLAN_TS_POLOKTLAN_TS_POLOK 0x2000 tlan.h 　
32461
 TLAN_TS_TPENERGYTLAN_TS_TPENERGY 0x1000 tlan.h 　
32462
 TLAN_TS_RESERVEDTLAN_TS_RESERVED 0x0FFF tlan.h 　
32463
 TLAN_TLPHY_PARTLAN_TLPHY_PAR 0x19 tlan.h 　
32464
 TLAN_PHY_CIM_STATTLAN_PHY_CIM_STAT 0x0020 tlan.h 　
32465
 TLAN_PHY_SPEED_100TLAN_PHY_SPEED_100 0x0040 tlan.h 　
32466
 TLAN_PHY_DUPLEX_FULLTLAN_PHY_DUPLEX_FULL 0x0080 tlan.h 　
32467
 TLAN_PHY_AN_EN_STATTLAN_PHY_AN_EN_STAT 0x0400 tlan.h 　
32468
 NAT_SEM_ID1NAT_SEM_ID1 0x2000 tlan.h 　
32469
 NAT_SEM_ID2NAT_SEM_ID2 0x5C01 tlan.h 　
32470
 LEVEL1_ID1LEVEL1_ID1 0x7810 tlan.h 　
32471
 LEVEL1_ID2LEVEL1_ID2 0x0000 tlan.h 　
32472
 VELOCITY_NAMEVELOCITY_NAME "via-velocity" via-velocity.h 　
32473
 VELOCITY_FULL_DRV_NAMVELOCITY_FULL_DRV_NAM "VIA Networking Velocity Family Gigabit Ethernet Adapter Driver" via-velocity.h 　
32474
 VELOCITY_VERSIONVELOCITY_VERSION "1.13" via-velocity.h 　
32475
 PKT_BUF_SZPKT_BUF_SZ 1564 via-velocity.h 　
32476
 MAX_UNITSMAX_UNITS 8 via-velocity.h 　
32477
 OPTION_DEFAULTOPTION_DEFAULT { [0 ... MAX_UNITS-1] = -1} via-velocity.h 　
32478
 REV_ID_VT6110REV_ID_VT6110 (0) via-velocity.h 　
32479
 B_OWNED_BY_CHIPB_OWNED_BY_CHIP 1 via-velocity.h 　
32480
 B_OWNED_BY_HOSTB_OWNED_BY_HOST 0 via-velocity.h 　
32481
 RSR_DETAGRSR_DETAG 0x0080 via-velocity.h 　
32482
 RSR_SNTAGRSR_SNTAG 0x0040 via-velocity.h 　
32483
 RSR_RXERRSR_RXER 0x0020 via-velocity.h 　
32484
 RSR_RLRSR_RL 0x0010 via-velocity.h 　
32485
 RSR_CERSR_CE 0x0008 via-velocity.h 　
32486
 RSR_FAERSR_FAE 0x0004 via-velocity.h 　
32487
 RSR_CRCRSR_CRC 0x0002 via-velocity.h 　
32488
 RSR_VIDMRSR_VIDM 0x0001 via-velocity.h 　
32489
 RSR_RXOKRSR_RXOK 0x8000 via-velocity.h rx OK
32490
 RSR_PFTRSR_PFT 0x4000 via-velocity.h Perfect filtering address match
32491
 RSR_MARRSR_MAR 0x2000 via-velocity.h MAC accept multicast address packet
32492
 RSR_BARRSR_BAR 0x1000 via-velocity.h MAC accept broadcast address packet
32493
 RSR_PHYRSR_PHY 0x0800 via-velocity.h MAC accept physical address packet
32494
 RSR_VTAGRSR_VTAG 0x0400 via-velocity.h 802.1p/1q tagging packet indicator
32495
 RSR_STPRSR_STP 0x0200 via-velocity.h start of packet
32496
 RSR_EDPRSR_EDP 0x0100 via-velocity.h end of packet
32497
 RSR1_RXOKRSR1_RXOK 0x80 via-velocity.h rx OK
32498
 RSR1_PFTRSR1_PFT 0x40 via-velocity.h Perfect filtering address match
32499
 RSR1_MARRSR1_MAR 0x20 via-velocity.h MAC accept multicast address packet
32500
 RSR1_BARRSR1_BAR 0x10 via-velocity.h MAC accept broadcast address packet
32501
 RSR1_PHYRSR1_PHY 0x08 via-velocity.h MAC accept physical address packet
32502
 RSR1_VTAGRSR1_VTAG 0x04 via-velocity.h 802.1p/1q tagging packet indicator
32503
 RSR1_STPRSR1_STP 0x02 via-velocity.h start of packet
32504
 RSR1_EDPRSR1_EDP 0x01 via-velocity.h end of packet
32505
 CSM_IPOKCSM_IPOK 0x40 via-velocity.h IP Checkusm validatiaon ok
32506
 CSM_TUPOKCSM_TUPOK 0x20 via-velocity.h TCP/UDP Checkusm validatiaon ok
32507
 CSM_FRAGCSM_FRAG 0x10 via-velocity.h Fragment IP datagram
32508
 CSM_IPKTCSM_IPKT 0x04 via-velocity.h Received an IP packet
32509
 CSM_TCPKTCSM_TCPKT 0x02 via-velocity.h Received a TCP packet
32510
 CSM_UDPKTCSM_UDPKT 0x01 via-velocity.h Received a UDP packet
32511
 TSR0_ABTTSR0_ABT 0x0080 via-velocity.h Tx abort because of excessive collision
32512
 TSR0_OWTTSR0_OWT 0x0040 via-velocity.h Jumbo frame Tx abort
32513
 TSR0_OWCTSR0_OWC 0x0020 via-velocity.h Out of window collision
32514
 TSR0_COLSTSR0_COLS 0x0010 via-velocity.h experience collision in this transmit event
32515
 TSR0_NCR3TSR0_NCR3 0x0008 via-velocity.h collision retry counter[3]
32516
 TSR0_NCR2TSR0_NCR2 0x0004 via-velocity.h collision retry counter[2]
32517
 TSR0_NCR1TSR0_NCR1 0x0002 via-velocity.h collision retry counter[1]
32518
 TSR0_NCR0TSR0_NCR0 0x0001 via-velocity.h collision retry counter[0]
32519
 TSR0_TERRTSR0_TERR 0x8000 via-velocity.h 　
32520
 TSR0_FDXTSR0_FDX 0x4000 via-velocity.h current transaction is serviced by full duplex mode
32521
 TSR0_GMIITSR0_GMII 0x2000 via-velocity.h current transaction is serviced by GMII mode
32522
 TSR0_LNKFLTSR0_LNKFL 0x1000 via-velocity.h packet serviced during link down
32523
 TSR0_SHDNTSR0_SHDN 0x0400 via-velocity.h shutdown case
32524
 TSR0_CRSTSR0_CRS 0x0200 via-velocity.h carrier sense lost
32525
 TSR0_CDHTSR0_CDH 0x0100 via-velocity.h AQE test fail (CD heartbeat)
32526
 TSR1_TERRTSR1_TERR 0x80 via-velocity.h 　
32527
 TSR1_FDXTSR1_FDX 0x40 via-velocity.h current transaction is serviced by full duplex mode
32528
 TSR1_GMIITSR1_GMII 0x20 via-velocity.h current transaction is serviced by GMII mode
32529
 TSR1_LNKFLTSR1_LNKFL 0x10 via-velocity.h packet serviced during link down
32530
 TSR1_SHDNTSR1_SHDN 0x04 via-velocity.h shutdown case
32531
 TSR1_CRSTSR1_CRS 0x02 via-velocity.h carrier sense lost
32532
 TSR1_CDHTSR1_CDH 0x01 via-velocity.h AQE test fail (CD heartbeat)
32533
 TCR0_TICTCR0_TIC 0x80 via-velocity.h assert interrupt immediately while descriptor has been send complete
32534
 TCR0_PICTCR0_PIC 0x40 via-velocity.h priority interrupt request, INA# is issued over adaptive interrupt scheme
32535
 TCR0_VETAGTCR0_VETAG 0x20 via-velocity.h enable VLAN tag
32536
 TCR0_IPCKTCR0_IPCK 0x10 via-velocity.h request IP checksum calculation.
32537
 TCR0_UDPCKTCR0_UDPCK 0x08 via-velocity.h request UDP checksum calculation.
32538
 TCR0_TCPCKTCR0_TCPCK 0x04 via-velocity.h request TCP checksum calculation.
32539
 TCR0_JMBOTCR0_JMBO 0x02 via-velocity.h indicate a jumbo packet in GMAC side
32540
 TCR0_CRCTCR0_CRC 0x01 via-velocity.h disable CRC generation
32541
 TCPLS_NORMALTCPLS_NORMAL 3 via-velocity.h 　
32542
 TCPLS_STARTTCPLS_START 2 via-velocity.h 　
32543
 TCPLS_ENDTCPLS_END 1 via-velocity.h 　
32544
 TCPLS_MEDTCPLS_MED 0 via-velocity.h 　
32545
 CB_RX_BUF_SIZECB_RX_BUF_SIZE 2048UL via-velocity.h max buffer size
32546
 CB_MAX_RD_NUMCB_MAX_RD_NUM 512 via-velocity.h MAX # of RD
32547
 CB_MAX_TD_NUMCB_MAX_TD_NUM 256 via-velocity.h MAX # of TD
32548
 CB_INIT_RD_NUM_3119CB_INIT_RD_NUM_3119 128 via-velocity.h init # of RD, for setup VT3119
32549
 CB_INIT_TD_NUM_3119CB_INIT_TD_NUM_3119 64 via-velocity.h init # of TD, for setup VT3119
32550
 CB_INIT_RD_NUMCB_INIT_RD_NUM 128 via-velocity.h init # of RD, for setup default
32551
 CB_INIT_TD_NUMCB_INIT_TD_NUM 64 via-velocity.h init # of TD, for setup default
32552
 CB_TD_RING_NUMCB_TD_RING_NUM 4 via-velocity.h # of TD rings.
32553
 CB_MAX_SEG_PER_PKTCB_MAX_SEG_PER_PKT 7 via-velocity.h max data seg per packet (Tx)
32554
 CB_MAX_TX_ABORT_RETRYCB_MAX_TX_ABORT_RETRY 3 via-velocity.h 　
32555
 MCAM_SIZEMCAM_SIZE 64 via-velocity.h 　
32556
 VCAM_SIZEVCAM_SIZE 64 via-velocity.h 　
32557
 TX_QUEUE_NOTX_QUEUE_NO 4 via-velocity.h 　
32558
 MAX_HW_MIB_COUNTERMAX_HW_MIB_COUNTER 32 via-velocity.h 　
32559
 VELOCITY_MIN_MTUVELOCITY_MIN_MTU (1514-14) via-velocity.h 　
32560
 VELOCITY_MAX_MTUVELOCITY_MAX_MTU (9000) via-velocity.h 　
32561
 MAC_REG_PARMAC_REG_PAR 0x00 via-velocity.h physical address
32562
 MAC_REG_RCRMAC_REG_RCR 0x06 via-velocity.h 　
32563
 MAC_REG_TCRMAC_REG_TCR 0x07 via-velocity.h 　
32564
 MAC_REG_CR0_SETMAC_REG_CR0_SET 0x08 via-velocity.h 　
32565
 MAC_REG_CR1_SETMAC_REG_CR1_SET 0x09 via-velocity.h 　
32566
 MAC_REG_CR2_SETMAC_REG_CR2_SET 0x0A via-velocity.h 　
32567
 MAC_REG_CR3_SETMAC_REG_CR3_SET 0x0B via-velocity.h 　
32568
 MAC_REG_CR0_CLRMAC_REG_CR0_CLR 0x0C via-velocity.h 　
32569
 MAC_REG_CR1_CLRMAC_REG_CR1_CLR 0x0D via-velocity.h 　
32570
 MAC_REG_CR2_CLRMAC_REG_CR2_CLR 0x0E via-velocity.h 　
32571
 MAC_REG_CR3_CLRMAC_REG_CR3_CLR 0x0F via-velocity.h 　
32572
 MAC_REG_MARMAC_REG_MAR 0x10 via-velocity.h 　
32573
 MAC_REG_CAMMAC_REG_CAM 0x10 via-velocity.h 　
32574
 MAC_REG_DEC_BASE_HIMAC_REG_DEC_BASE_HI 0x18 via-velocity.h 　
32575
 MAC_REG_DBF_BASE_HIMAC_REG_DBF_BASE_HI 0x1C via-velocity.h 　
32576
 MAC_REG_ISR_CTLMAC_REG_ISR_CTL 0x20 via-velocity.h 　
32577
 MAC_REG_ISR_HOTMRMAC_REG_ISR_HOTMR 0x20 via-velocity.h 　
32578
 MAC_REG_ISR_TSUPTHRMAC_REG_ISR_TSUPTHR 0x20 via-velocity.h 　
32579
 MAC_REG_ISR_RSUPTHRMAC_REG_ISR_RSUPTHR 0x20 via-velocity.h 　
32580
 MAC_REG_ISR_CTL1MAC_REG_ISR_CTL1 0x21 via-velocity.h 　
32581
 MAC_REG_TXE_SRMAC_REG_TXE_SR 0x22 via-velocity.h 　
32582
 MAC_REG_RXE_SRMAC_REG_RXE_SR 0x23 via-velocity.h 　
32583
 MAC_REG_ISRMAC_REG_ISR 0x24 via-velocity.h 　
32584
 MAC_REG_ISR0MAC_REG_ISR0 0x24 via-velocity.h 　
32585
 MAC_REG_ISR1MAC_REG_ISR1 0x25 via-velocity.h 　
32586
 MAC_REG_ISR2MAC_REG_ISR2 0x26 via-velocity.h 　
32587
 MAC_REG_ISR3MAC_REG_ISR3 0x27 via-velocity.h 　
32588
 MAC_REG_IMRMAC_REG_IMR 0x28 via-velocity.h 　
32589
 MAC_REG_IMR0MAC_REG_IMR0 0x28 via-velocity.h 　
32590
 MAC_REG_IMR1MAC_REG_IMR1 0x29 via-velocity.h 　
32591
 MAC_REG_IMR2MAC_REG_IMR2 0x2A via-velocity.h 　
32592
 MAC_REG_IMR3MAC_REG_IMR3 0x2B via-velocity.h 　
32593
 MAC_REG_TDCSR_SETMAC_REG_TDCSR_SET 0x30 via-velocity.h 　
32594
 MAC_REG_RDCSR_SETMAC_REG_RDCSR_SET 0x32 via-velocity.h 　
32595
 MAC_REG_TDCSR_CLRMAC_REG_TDCSR_CLR 0x34 via-velocity.h 　
32596
 MAC_REG_RDCSR_CLRMAC_REG_RDCSR_CLR 0x36 via-velocity.h 　
32597
 MAC_REG_RDBASE_LOMAC_REG_RDBASE_LO 0x38 via-velocity.h 　
32598
 MAC_REG_RDINDXMAC_REG_RDINDX 0x3C via-velocity.h 　
32599
 MAC_REG_TDBASE_LOMAC_REG_TDBASE_LO 0x40 via-velocity.h 　
32600
 MAC_REG_RDCSIZEMAC_REG_RDCSIZE 0x50 via-velocity.h 　
32601
 MAC_REG_TDCSIZEMAC_REG_TDCSIZE 0x52 via-velocity.h 　
32602
 MAC_REG_TDINDXMAC_REG_TDINDX 0x54 via-velocity.h 　
32603
 MAC_REG_TDIDX0MAC_REG_TDIDX0 0x54 via-velocity.h 　
32604
 MAC_REG_TDIDX1MAC_REG_TDIDX1 0x56 via-velocity.h 　
32605
 MAC_REG_TDIDX2MAC_REG_TDIDX2 0x58 via-velocity.h 　
32606
 MAC_REG_TDIDX3MAC_REG_TDIDX3 0x5A via-velocity.h 　
32607
 MAC_REG_PAUSE_TIMERMAC_REG_PAUSE_TIMER 0x5C via-velocity.h 　
32608
 MAC_REG_RBRDUMAC_REG_RBRDU 0x5E via-velocity.h 　
32609
 MAC_REG_FIFO_TEST0MAC_REG_FIFO_TEST0 0x60 via-velocity.h 　
32610
 MAC_REG_FIFO_TEST1MAC_REG_FIFO_TEST1 0x64 via-velocity.h 　
32611
 MAC_REG_CAMADDRMAC_REG_CAMADDR 0x68 via-velocity.h 　
32612
 MAC_REG_CAMCRMAC_REG_CAMCR 0x69 via-velocity.h 　
32613
 MAC_REG_GFTESTMAC_REG_GFTEST 0x6A via-velocity.h 　
32614
 MAC_REG_FTSTCMDMAC_REG_FTSTCMD 0x6B via-velocity.h 　
32615
 MAC_REG_MIICFGMAC_REG_MIICFG 0x6C via-velocity.h 　
32616
 MAC_REG_MIISRMAC_REG_MIISR 0x6D via-velocity.h 　
32617
 MAC_REG_PHYSR0MAC_REG_PHYSR0 0x6E via-velocity.h 　
32618
 MAC_REG_PHYSR1MAC_REG_PHYSR1 0x6F via-velocity.h 　
32619
 MAC_REG_MIICRMAC_REG_MIICR 0x70 via-velocity.h 　
32620
 MAC_REG_MIIADRMAC_REG_MIIADR 0x71 via-velocity.h 　
32621
 MAC_REG_MIIDATAMAC_REG_MIIDATA 0x72 via-velocity.h 　
32622
 MAC_REG_SOFT_TIMER0MAC_REG_SOFT_TIMER0 0x74 via-velocity.h 　
32623
 MAC_REG_SOFT_TIMER1MAC_REG_SOFT_TIMER1 0x76 via-velocity.h 　
32624
 MAC_REG_CFGAMAC_REG_CFGA 0x78 via-velocity.h 　
32625
 MAC_REG_CFGBMAC_REG_CFGB 0x79 via-velocity.h 　
32626
 MAC_REG_CFGCMAC_REG_CFGC 0x7A via-velocity.h 　
32627
 MAC_REG_CFGDMAC_REG_CFGD 0x7B via-velocity.h 　
32628
 MAC_REG_DCFG0MAC_REG_DCFG0 0x7C via-velocity.h 　
32629
 MAC_REG_DCFG1MAC_REG_DCFG1 0x7D via-velocity.h 　
32630
 MAC_REG_MCFG0MAC_REG_MCFG0 0x7E via-velocity.h 　
32631
 MAC_REG_MCFG1MAC_REG_MCFG1 0x7F via-velocity.h 　
32632
 MAC_REG_TBISTMAC_REG_TBIST 0x80 via-velocity.h 　
32633
 MAC_REG_RBISTMAC_REG_RBIST 0x81 via-velocity.h 　
32634
 MAC_REG_PMCCMAC_REG_PMCC 0x82 via-velocity.h 　
32635
 MAC_REG_STICKHWMAC_REG_STICKHW 0x83 via-velocity.h 　
32636
 MAC_REG_MIBCRMAC_REG_MIBCR 0x84 via-velocity.h 　
32637
 MAC_REG_EERSVMAC_REG_EERSV 0x85 via-velocity.h 　
32638
 MAC_REG_REVIDMAC_REG_REVID 0x86 via-velocity.h 　
32639
 MAC_REG_MIBREADMAC_REG_MIBREAD 0x88 via-velocity.h 　
32640
 MAC_REG_BPMAMAC_REG_BPMA 0x8C via-velocity.h 　
32641
 MAC_REG_EEWR_DATAMAC_REG_EEWR_DATA 0x8C via-velocity.h 　
32642
 MAC_REG_BPMD_WRMAC_REG_BPMD_WR 0x8F via-velocity.h 　
32643
 MAC_REG_BPCMDMAC_REG_BPCMD 0x90 via-velocity.h 　
32644
 MAC_REG_BPMD_RDMAC_REG_BPMD_RD 0x91 via-velocity.h 　
32645
 MAC_REG_EECHKSUMMAC_REG_EECHKSUM 0x92 via-velocity.h 　
32646
 MAC_REG_EECSRMAC_REG_EECSR 0x93 via-velocity.h 　
32647
 MAC_REG_EERD_DATAMAC_REG_EERD_DATA 0x94 via-velocity.h 　
32648
 MAC_REG_EADDRMAC_REG_EADDR 0x96 via-velocity.h 　
32649
 MAC_REG_EMBCMDMAC_REG_EMBCMD 0x97 via-velocity.h 　
32650
 MAC_REG_JMPSR0MAC_REG_JMPSR0 0x98 via-velocity.h 　
32651
 MAC_REG_JMPSR1MAC_REG_JMPSR1 0x99 via-velocity.h 　
32652
 MAC_REG_JMPSR2MAC_REG_JMPSR2 0x9A via-velocity.h 　
32653
 MAC_REG_JMPSR3MAC_REG_JMPSR3 0x9B via-velocity.h 　
32654
 MAC_REG_CHIPGSRMAC_REG_CHIPGSR 0x9C via-velocity.h 　
32655
 MAC_REG_TESTCFGMAC_REG_TESTCFG 0x9D via-velocity.h 　
32656
 MAC_REG_DEBUGMAC_REG_DEBUG 0x9E via-velocity.h 　
32657
 MAC_REG_CHIPGCRMAC_REG_CHIPGCR 0x9F via-velocity.h 　
32658
 MAC_REG_WOLCR0_SETMAC_REG_WOLCR0_SET 0xA0 via-velocity.h 　
32659
 MAC_REG_WOLCR1_SETMAC_REG_WOLCR1_SET 0xA1 via-velocity.h 　
32660
 MAC_REG_PWCFG_SETMAC_REG_PWCFG_SET 0xA2 via-velocity.h 　
32661
 MAC_REG_WOLCFG_SETMAC_REG_WOLCFG_SET 0xA3 via-velocity.h 　
32662
 MAC_REG_WOLCR0_CLRMAC_REG_WOLCR0_CLR 0xA4 via-velocity.h 　
32663
 MAC_REG_WOLCR1_CLRMAC_REG_WOLCR1_CLR 0xA5 via-velocity.h 　
32664
 MAC_REG_PWCFG_CLRMAC_REG_PWCFG_CLR 0xA6 via-velocity.h 　
32665
 MAC_REG_WOLCFG_CLRMAC_REG_WOLCFG_CLR 0xA7 via-velocity.h 　
32666
 MAC_REG_WOLSR0_SETMAC_REG_WOLSR0_SET 0xA8 via-velocity.h 　
32667
 MAC_REG_WOLSR1_SETMAC_REG_WOLSR1_SET 0xA9 via-velocity.h 　
32668
 MAC_REG_WOLSR0_CLRMAC_REG_WOLSR0_CLR 0xAC via-velocity.h 　
32669
 MAC_REG_WOLSR1_CLRMAC_REG_WOLSR1_CLR 0xAD via-velocity.h 　
32670
 MAC_REG_PATRN_CRC0MAC_REG_PATRN_CRC0 0xB0 via-velocity.h 　
32671
 MAC_REG_PATRN_CRC1MAC_REG_PATRN_CRC1 0xB2 via-velocity.h 　
32672
 MAC_REG_PATRN_CRC2MAC_REG_PATRN_CRC2 0xB4 via-velocity.h 　
32673
 MAC_REG_PATRN_CRC3MAC_REG_PATRN_CRC3 0xB6 via-velocity.h 　
32674
 MAC_REG_PATRN_CRC4MAC_REG_PATRN_CRC4 0xB8 via-velocity.h 　
32675
 MAC_REG_PATRN_CRC5MAC_REG_PATRN_CRC5 0xBA via-velocity.h 　
32676
 MAC_REG_PATRN_CRC6MAC_REG_PATRN_CRC6 0xBC via-velocity.h 　
32677
 MAC_REG_PATRN_CRC7MAC_REG_PATRN_CRC7 0xBE via-velocity.h 　
32678
 MAC_REG_BYTEMSK0_0MAC_REG_BYTEMSK0_0 0xC0 via-velocity.h 　
32679
 MAC_REG_BYTEMSK0_1MAC_REG_BYTEMSK0_1 0xC4 via-velocity.h 　
32680
 MAC_REG_BYTEMSK0_2MAC_REG_BYTEMSK0_2 0xC8 via-velocity.h 　
32681
 MAC_REG_BYTEMSK0_3MAC_REG_BYTEMSK0_3 0xCC via-velocity.h 　
32682
 MAC_REG_BYTEMSK1_0MAC_REG_BYTEMSK1_0 0xD0 via-velocity.h 　
32683
 MAC_REG_BYTEMSK1_1MAC_REG_BYTEMSK1_1 0xD4 via-velocity.h 　
32684
 MAC_REG_BYTEMSK1_2MAC_REG_BYTEMSK1_2 0xD8 via-velocity.h 　
32685
 MAC_REG_BYTEMSK1_3MAC_REG_BYTEMSK1_3 0xDC via-velocity.h 　
32686
 MAC_REG_BYTEMSK2_0MAC_REG_BYTEMSK2_0 0xE0 via-velocity.h 　
32687
 MAC_REG_BYTEMSK2_1MAC_REG_BYTEMSK2_1 0xE4 via-velocity.h 　
32688
 MAC_REG_BYTEMSK2_2MAC_REG_BYTEMSK2_2 0xE8 via-velocity.h 　
32689
 MAC_REG_BYTEMSK2_3MAC_REG_BYTEMSK2_3 0xEC via-velocity.h 　
32690
 MAC_REG_BYTEMSK3_0MAC_REG_BYTEMSK3_0 0xF0 via-velocity.h 　
32691
 MAC_REG_BYTEMSK3_1MAC_REG_BYTEMSK3_1 0xF4 via-velocity.h 　
32692
 MAC_REG_BYTEMSK3_2MAC_REG_BYTEMSK3_2 0xF8 via-velocity.h 　
32693
 MAC_REG_BYTEMSK3_3MAC_REG_BYTEMSK3_3 0xFC via-velocity.h 　
32694
 RCR_ASRCR_AS 0x80 via-velocity.h 　
32695
 RCR_APRCR_AP 0x40 via-velocity.h 　
32696
 RCR_ALRCR_AL 0x20 via-velocity.h 　
32697
 RCR_PROMRCR_PROM 0x10 via-velocity.h 　
32698
 RCR_ABRCR_AB 0x08 via-velocity.h 　
32699
 RCR_AMRCR_AM 0x04 via-velocity.h 　
32700
 RCR_ARRCR_AR 0x02 via-velocity.h 　
32701
 RCR_SEPRCR_SEP 0x01 via-velocity.h 　
32702
 TCR_TB2BDISTCR_TB2BDIS 0x80 via-velocity.h 　
32703
 TCR_COLTMC1TCR_COLTMC1 0x08 via-velocity.h 　
32704
 TCR_COLTMC0TCR_COLTMC0 0x04 via-velocity.h 　
32705
 TCR_LB1TCR_LB1 0x02 via-velocity.h loopback[1]
32706
 TCR_LB0TCR_LB0 0x01 via-velocity.h loopback[0]
32707
 CR0_TXONCR0_TXON 0x00000008UL via-velocity.h 　
32708
 CR0_RXONCR0_RXON 0x00000004UL via-velocity.h 　
32709
 CR0_STOPCR0_STOP 0x00000002UL via-velocity.h stop MAC, default = 1
32710
 CR0_STRTCR0_STRT 0x00000001UL via-velocity.h start MAC
32711
 CR0_SFRSTCR0_SFRST 0x00008000UL via-velocity.h software reset
32712
 CR0_TM1ENCR0_TM1EN 0x00004000UL via-velocity.h 　
32713
 CR0_TM0ENCR0_TM0EN 0x00002000UL via-velocity.h 　
32714
 CR0_DPOLLCR0_DPOLL 0x00000800UL via-velocity.h disable rx/tx auto polling
32715
 CR0_DISAUCR0_DISAU 0x00000100UL via-velocity.h 　
32716
 CR0_XONENCR0_XONEN 0x00800000UL via-velocity.h 　
32717
 CR0_FDXTFCENCR0_FDXTFCEN 0x00400000UL via-velocity.h full-duplex TX flow control enable
32718
 CR0_FDXRFCENCR0_FDXRFCEN 0x00200000UL via-velocity.h full-duplex RX flow control enable
32719
 CR0_HDXFCENCR0_HDXFCEN 0x00100000UL via-velocity.h half-duplex flow control enable
32720
 CR0_XHITH1CR0_XHITH1 0x00080000UL via-velocity.h TX XON high threshold 1
32721
 CR0_XHITH0CR0_XHITH0 0x00040000UL via-velocity.h TX XON high threshold 0
32722
 CR0_XLTH1CR0_XLTH1 0x00020000UL via-velocity.h TX pause frame low threshold 1
32723
 CR0_XLTH0CR0_XLTH0 0x00010000UL via-velocity.h TX pause frame low threshold 0
32724
 CR0_GSPRSTCR0_GSPRST 0x80000000UL via-velocity.h 　
32725
 CR0_FORSRSTCR0_FORSRST 0x40000000UL via-velocity.h 　
32726
 CR0_FPHYRSTCR0_FPHYRST 0x20000000UL via-velocity.h 　
32727
 CR0_DIAGCR0_DIAG 0x10000000UL via-velocity.h 　
32728
 CR0_INTPCTLCR0_INTPCTL 0x04000000UL via-velocity.h 　
32729
 CR0_GINTMSK1CR0_GINTMSK1 0x02000000UL via-velocity.h 　
32730
 CR0_GINTMSK0CR0_GINTMSK0 0x01000000UL via-velocity.h 　
32731
 CR1_SFRSTCR1_SFRST 0x80 via-velocity.h software reset
32732
 CR1_TM1ENCR1_TM1EN 0x40 via-velocity.h 　
32733
 CR1_TM0ENCR1_TM0EN 0x20 via-velocity.h 　
32734
 CR1_DPOLLCR1_DPOLL 0x08 via-velocity.h disable rx/tx auto polling
32735
 CR1_DISAUCR1_DISAU 0x01 via-velocity.h 　
32736
 CR2_XONENCR2_XONEN 0x80 via-velocity.h 　
32737
 CR2_FDXTFCENCR2_FDXTFCEN 0x40 via-velocity.h full-duplex TX flow control enable
32738
 CR2_FDXRFCENCR2_FDXRFCEN 0x20 via-velocity.h full-duplex RX flow control enable
32739
 CR2_HDXFCENCR2_HDXFCEN 0x10 via-velocity.h half-duplex flow control enable
32740
 CR2_XHITH1CR2_XHITH1 0x08 via-velocity.h TX XON high threshold 1
32741
 CR2_XHITH0CR2_XHITH0 0x04 via-velocity.h TX XON high threshold 0
32742
 CR2_XLTH1CR2_XLTH1 0x02 via-velocity.h TX pause frame low threshold 1
32743
 CR2_XLTH0CR2_XLTH0 0x01 via-velocity.h TX pause frame low threshold 0
32744
 CR3_GSPRSTCR3_GSPRST 0x80 via-velocity.h 　
32745
 CR3_FORSRSTCR3_FORSRST 0x40 via-velocity.h 　
32746
 CR3_FPHYRSTCR3_FPHYRST 0x20 via-velocity.h 　
32747
 CR3_DIAGCR3_DIAG 0x10 via-velocity.h 　
32748
 CR3_INTPCTLCR3_INTPCTL 0x04 via-velocity.h 　
32749
 CR3_GINTMSK1CR3_GINTMSK1 0x02 via-velocity.h 　
32750
 CR3_GINTMSK0CR3_GINTMSK0 0x01 via-velocity.h 　
32751
 ISRCTL_UDPINTISRCTL_UDPINT 0x8000 via-velocity.h 　
32752
 ISRCTL_TSUPDISISRCTL_TSUPDIS 0x4000 via-velocity.h 　
32753
 ISRCTL_RSUPDISISRCTL_RSUPDIS 0x2000 via-velocity.h 　
32754
 ISRCTL_PMSK1ISRCTL_PMSK1 0x1000 via-velocity.h 　
32755
 ISRCTL_PMSK0ISRCTL_PMSK0 0x0800 via-velocity.h 　
32756
 ISRCTL_INTPDISRCTL_INTPD 0x0400 via-velocity.h 　
32757
 ISRCTL_HCRLDISRCTL_HCRLD 0x0200 via-velocity.h 　
32758
 ISRCTL_SCRLDISRCTL_SCRLD 0x0100 via-velocity.h 　
32759
 ISRCTL1_UDPINTISRCTL1_UDPINT 0x80 via-velocity.h 　
32760
 ISRCTL1_TSUPDISISRCTL1_TSUPDIS 0x40 via-velocity.h 　
32761
 ISRCTL1_RSUPDISISRCTL1_RSUPDIS 0x20 via-velocity.h 　
32762
 ISRCTL1_PMSK1ISRCTL1_PMSK1 0x10 via-velocity.h 　
32763
 ISRCTL1_PMSK0ISRCTL1_PMSK0 0x08 via-velocity.h 　
32764
 ISRCTL1_INTPDISRCTL1_INTPD 0x04 via-velocity.h 　
32765
 ISRCTL1_HCRLDISRCTL1_HCRLD 0x02 via-velocity.h 　
32766
 ISRCTL1_SCRLDISRCTL1_SCRLD 0x01 via-velocity.h 　
32767
 TXESR_TFDBSTXESR_TFDBS 0x08 via-velocity.h 　
32768
 TXESR_TDWBSTXESR_TDWBS 0x04 via-velocity.h 　
32769
 TXESR_TDRBSTXESR_TDRBS 0x02 via-velocity.h 　
32770
 TXESR_TDSTRTXESR_TDSTR 0x01 via-velocity.h 　
32771
 RXESR_RFDBSRXESR_RFDBS 0x08 via-velocity.h 　
32772
 RXESR_RDWBSRXESR_RDWBS 0x04 via-velocity.h 　
32773
 RXESR_RDRBSRXESR_RDRBS 0x02 via-velocity.h 　
32774
 RXESR_RDSTRRXESR_RDSTR 0x01 via-velocity.h 　
32775
 ISR_ISR3ISR_ISR3 0x80000000UL via-velocity.h 　
32776
 ISR_ISR2ISR_ISR2 0x40000000UL via-velocity.h 　
32777
 ISR_ISR1ISR_ISR1 0x20000000UL via-velocity.h 　
32778
 ISR_ISR0ISR_ISR0 0x10000000UL via-velocity.h 　
32779
 ISR_TXSTLIISR_TXSTLI 0x02000000UL via-velocity.h 　
32780
 ISR_RXSTLIISR_RXSTLI 0x01000000UL via-velocity.h 　
32781
 ISR_HFLDISR_HFLD 0x00800000UL via-velocity.h 　
32782
 ISR_UDPIISR_UDPI 0x00400000UL via-velocity.h 　
32783
 ISR_MIBFIISR_MIBFI 0x00200000UL via-velocity.h 　
32784
 ISR_SHDNIISR_SHDNI 0x00100000UL via-velocity.h 　
32785
 ISR_PHYIISR_PHYI 0x00080000UL via-velocity.h 　
32786
 ISR_PWEIISR_PWEI 0x00040000UL via-velocity.h 　
32787
 ISR_TMR1IISR_TMR1I 0x00020000UL via-velocity.h 　
32788
 ISR_TMR0IISR_TMR0I 0x00010000UL via-velocity.h 　
32789
 ISR_SRCIISR_SRCI 0x00008000UL via-velocity.h 　
32790
 ISR_LSTPEIISR_LSTPEI 0x00004000UL via-velocity.h 　
32791
 ISR_LSTEIISR_LSTEI 0x00002000UL via-velocity.h 　
32792
 ISR_OVFIISR_OVFI 0x00001000UL via-velocity.h 　
32793
 ISR_FLONIISR_FLONI 0x00000800UL via-velocity.h 　
32794
 ISR_RACEIISR_RACEI 0x00000400UL via-velocity.h 　
32795
 ISR_TXWB1IISR_TXWB1I 0x00000200UL via-velocity.h 　
32796
 ISR_TXWB0IISR_TXWB0I 0x00000100UL via-velocity.h 　
32797
 ISR_PTX3IISR_PTX3I 0x00000080UL via-velocity.h 　
32798
 ISR_PTX2IISR_PTX2I 0x00000040UL via-velocity.h 　
32799
 ISR_PTX1IISR_PTX1I 0x00000020UL via-velocity.h 　
32800
 ISR_PTX0IISR_PTX0I 0x00000010UL via-velocity.h 　
32801
 ISR_PTXIISR_PTXI 0x00000008UL via-velocity.h 　
32802
 ISR_PRXIISR_PRXI 0x00000004UL via-velocity.h 　
32803
 ISR_PPTXIISR_PPTXI 0x00000002UL via-velocity.h 　
32804
 ISR_PPRXIISR_PPRXI 0x00000001UL via-velocity.h 　
32805
 IMR_TXSTLMIMR_TXSTLM 0x02000000UL via-velocity.h 　
32806
 IMR_UDPIMIMR_UDPIM 0x00400000UL via-velocity.h 　
32807
 IMR_MIBFIMIMR_MIBFIM 0x00200000UL via-velocity.h 　
32808
 IMR_SHDNIMIMR_SHDNIM 0x00100000UL via-velocity.h 　
32809
 IMR_PHYIMIMR_PHYIM 0x00080000UL via-velocity.h 　
32810
 IMR_PWEIMIMR_PWEIM 0x00040000UL via-velocity.h 　
32811
 IMR_TMR1IMIMR_TMR1IM 0x00020000UL via-velocity.h 　
32812
 IMR_TMR0IMIMR_TMR0IM 0x00010000UL via-velocity.h 　
32813
 IMR_SRCIMIMR_SRCIM 0x00008000UL via-velocity.h 　
32814
 IMR_LSTPEIMIMR_LSTPEIM 0x00004000UL via-velocity.h 　
32815
 IMR_LSTEIMIMR_LSTEIM 0x00002000UL via-velocity.h 　
32816
 IMR_OVFIMIMR_OVFIM 0x00001000UL via-velocity.h 　
32817
 IMR_FLONIMIMR_FLONIM 0x00000800UL via-velocity.h 　
32818
 IMR_RACEIMIMR_RACEIM 0x00000400UL via-velocity.h 　
32819
 IMR_TXWB1IMIMR_TXWB1IM 0x00000200UL via-velocity.h 　
32820
 IMR_TXWB0IMIMR_TXWB0IM 0x00000100UL via-velocity.h 　
32821
 IMR_PTX3IMIMR_PTX3IM 0x00000080UL via-velocity.h 　
32822
 IMR_PTX2IMIMR_PTX2IM 0x00000040UL via-velocity.h 　
32823
 IMR_PTX1IMIMR_PTX1IM 0x00000020UL via-velocity.h 　
32824
 IMR_PTX0IMIMR_PTX0IM 0x00000010UL via-velocity.h 　
32825
 IMR_PTXIMIMR_PTXIM 0x00000008UL via-velocity.h 　
32826
 IMR_PRXIMIMR_PRXIM 0x00000004UL via-velocity.h 　
32827
 IMR_PPTXIMIMR_PPTXIM 0x00000002UL via-velocity.h 　
32828
 IMR_PPRXIMIMR_PPRXIM 0x00000001UL via-velocity.h 　
32829
 INT_MASK_DEFINT_MASK_DEF ( IMR_PPTXIM|IMR_PPRXIM| IMR_PTXIM|IMR_PRXIM | \ IMR_PWEIM|IMR_TXWB0IM|IMR_TXWB1IM|IMR_FLONIM| \ IMR_OVFIM|IMR_LSTEIM|IMR_LSTP via-velocity.h 　
32830
 TRDCSR_DEADTRDCSR_DEAD 0x0008 via-velocity.h 　
32831
 TRDCSR_WAKTRDCSR_WAK 0x0004 via-velocity.h 　
32832
 TRDCSR_ACTTRDCSR_ACT 0x0002 via-velocity.h 　
32833
 TRDCSR_RUNTRDCSR_RUN 0x0001 via-velocity.h 　
32834
 CAMADDR_CAMENCAMADDR_CAMEN 0x80 via-velocity.h 　
32835
 CAMADDR_VCAMSLCAMADDR_VCAMSL 0x40 via-velocity.h 　
32836
 CAMCR_PS1CAMCR_PS1 0x80 via-velocity.h 　
32837
 CAMCR_PS0CAMCR_PS0 0x40 via-velocity.h 　
32838
 CAMCR_AITRPKTCAMCR_AITRPKT 0x20 via-velocity.h 　
32839
 CAMCR_AITR16CAMCR_AITR16 0x10 via-velocity.h 　
32840
 CAMCR_CAMRDCAMCR_CAMRD 0x08 via-velocity.h 　
32841
 CAMCR_CAMWRCAMCR_CAMWR 0x04 via-velocity.h 　
32842
 CAMCR_PS_CAM_MASKCAMCR_PS_CAM_MASK 0x40 via-velocity.h 　
32843
 CAMCR_PS_CAM_DATACAMCR_PS_CAM_DATA 0x80 via-velocity.h 　
32844
 CAMCR_PS_MARCAMCR_PS_MAR 0x00 via-velocity.h 　
32845
 MIICFG_MPO1MIICFG_MPO1 0x80 via-velocity.h 　
32846
 MIICFG_MPO0MIICFG_MPO0 0x40 via-velocity.h 　
32847
 MIICFG_MFDCMIICFG_MFDC 0x20 via-velocity.h 　
32848
 MIISR_MIDLEMIISR_MIDLE 0x80 via-velocity.h 　
32849
 PHYSR0_PHYRSTPHYSR0_PHYRST 0x80 via-velocity.h 　
32850
 PHYSR0_LINKGDPHYSR0_LINKGD 0x40 via-velocity.h 　
32851
 PHYSR0_FDPXPHYSR0_FDPX 0x10 via-velocity.h 　
32852
 PHYSR0_SPDGPHYSR0_SPDG 0x08 via-velocity.h 　
32853
 PHYSR0_SPD10PHYSR0_SPD10 0x04 via-velocity.h 　
32854
 PHYSR0_RXFLCPHYSR0_RXFLC 0x02 via-velocity.h 　
32855
 PHYSR0_TXFLCPHYSR0_TXFLC 0x01 via-velocity.h 　
32856
 PHYSR1_PHYTBIPHYSR1_PHYTBI 0x01 via-velocity.h 　
32857
 MIICR_MAUTOMIICR_MAUTO 0x80 via-velocity.h 　
32858
 MIICR_RCMDMIICR_RCMD 0x40 via-velocity.h 　
32859
 MIICR_WCMDMIICR_WCMD 0x20 via-velocity.h 　
32860
 MIICR_MDPMMIICR_MDPM 0x10 via-velocity.h 　
32861
 MIICR_MOUTMIICR_MOUT 0x08 via-velocity.h 　
32862
 MIICR_MDOMIICR_MDO 0x04 via-velocity.h 　
32863
 MIICR_MDIMIICR_MDI 0x02 via-velocity.h 　
32864
 MIICR_MDCMIICR_MDC 0x01 via-velocity.h 　
32865
 MIIADR_SWMPLMIIADR_SWMPL 0x80 via-velocity.h 　
32866
 CFGA_PMHCTGCFGA_PMHCTG 0x08 via-velocity.h 　
32867
 CFGA_GPIO1PDCFGA_GPIO1PD 0x04 via-velocity.h 　
32868
 CFGA_ABSHDNCFGA_ABSHDN 0x02 via-velocity.h 　
32869
 CFGA_PACPICFGA_PACPI 0x01 via-velocity.h 　
32870
 CFGB_GTCKOPTCFGB_GTCKOPT 0x80 via-velocity.h 　
32871
 CFGB_MIIOPTCFGB_MIIOPT 0x40 via-velocity.h 　
32872
 CFGB_CRSEOPTCFGB_CRSEOPT 0x20 via-velocity.h 　
32873
 CFGB_OFSETCFGB_OFSET 0x10 via-velocity.h 　
32874
 CFGB_CRANDOMCFGB_CRANDOM 0x08 via-velocity.h 　
32875
 CFGB_CAPCFGB_CAP 0x04 via-velocity.h 　
32876
 CFGB_MBACFGB_MBA 0x02 via-velocity.h 　
32877
 CFGB_BAKOPTCFGB_BAKOPT 0x01 via-velocity.h 　
32878
 CFGC_EELOADCFGC_EELOAD 0x80 via-velocity.h 　
32879
 CFGC_BROPTCFGC_BROPT 0x40 via-velocity.h 　
32880
 CFGC_DLYENCFGC_DLYEN 0x20 via-velocity.h 　
32881
 CFGC_DTSELCFGC_DTSEL 0x10 via-velocity.h 　
32882
 CFGC_BTSELCFGC_BTSEL 0x08 via-velocity.h 　
32883
 CFGC_BPS2CFGC_BPS2 0x04 via-velocity.h bootrom select[2]
32884
 CFGC_BPS1CFGC_BPS1 0x02 via-velocity.h bootrom select[1]
32885
 CFGC_BPS0CFGC_BPS0 0x01 via-velocity.h bootrom select[0]
32886
 CFGD_IODISCFGD_IODIS 0x80 via-velocity.h 　
32887
 CFGD_MSLVDACENCFGD_MSLVDACEN 0x40 via-velocity.h 　
32888
 CFGD_CFGDACENCFGD_CFGDACEN 0x20 via-velocity.h 　
32889
 CFGD_PCI64ENCFGD_PCI64EN 0x10 via-velocity.h 　
32890
 CFGD_HTMRL4CFGD_HTMRL4 0x08 via-velocity.h 　
32891
 DCFG_XMWIDCFG_XMWI 0x8000 via-velocity.h 　
32892
 DCFG_XMRMDCFG_XMRM 0x4000 via-velocity.h 　
32893
 DCFG_XMRLDCFG_XMRL 0x2000 via-velocity.h 　
32894
 DCFG_PERDISDCFG_PERDIS 0x1000 via-velocity.h 　
32895
 DCFG_MRWAITDCFG_MRWAIT 0x0400 via-velocity.h 　
32896
 DCFG_MWWAITDCFG_MWWAIT 0x0200 via-velocity.h 　
32897
 DCFG_LATMENDCFG_LATMEN 0x0100 via-velocity.h 　
32898
 MCFG_RXARBMCFG_RXARB 0x0080 via-velocity.h 　
32899
 MCFG_RFT1MCFG_RFT1 0x0020 via-velocity.h 　
32900
 MCFG_RFT0MCFG_RFT0 0x0010 via-velocity.h 　
32901
 MCFG_LOWTHOPTMCFG_LOWTHOPT 0x0008 via-velocity.h 　
32902
 MCFG_PQENMCFG_PQEN 0x0004 via-velocity.h 　
32903
 MCFG_RTGOPTMCFG_RTGOPT 0x0002 via-velocity.h 　
32904
 MCFG_VIDFRMCFG_VIDFR 0x0001 via-velocity.h 　
32905
 MCFG_TXARBMCFG_TXARB 0x8000 via-velocity.h 　
32906
 MCFG_TXQBK1MCFG_TXQBK1 0x0800 via-velocity.h 　
32907
 MCFG_TXQBK0MCFG_TXQBK0 0x0400 via-velocity.h 　
32908
 MCFG_TXQNOBKMCFG_TXQNOBK 0x0200 via-velocity.h 　
32909
 MCFG_SNAPOPTMCFG_SNAPOPT 0x0100 via-velocity.h 　
32910
 PMCC_DSIPMCC_DSI 0x80 via-velocity.h 　
32911
 PMCC_D2_DISPMCC_D2_DIS 0x40 via-velocity.h 　
32912
 PMCC_D1_DISPMCC_D1_DIS 0x20 via-velocity.h 　
32913
 PMCC_D3C_ENPMCC_D3C_EN 0x10 via-velocity.h 　
32914
 PMCC_D3H_ENPMCC_D3H_EN 0x08 via-velocity.h 　
32915
 PMCC_D2_ENPMCC_D2_EN 0x04 via-velocity.h 　
32916
 PMCC_D1_ENPMCC_D1_EN 0x02 via-velocity.h 　
32917
 PMCC_D0_ENPMCC_D0_EN 0x01 via-velocity.h 　
32918
 STICKHW_SWPTAGSTICKHW_SWPTAG 0x10 via-velocity.h 　
32919
 STICKHW_WOLSRSTICKHW_WOLSR 0x08 via-velocity.h 　
32920
 STICKHW_WOLENSTICKHW_WOLEN 0x04 via-velocity.h 　
32921
 STICKHW_DS1STICKHW_DS1 0x02 via-velocity.h R/W by software/cfg cycle
32922
 STICKHW_DS0STICKHW_DS0 0x01 via-velocity.h suspend well DS write port
32923
 MIBCR_MIBISTOKMIBCR_MIBISTOK 0x80 via-velocity.h 　
32924
 MIBCR_MIBISTGOMIBCR_MIBISTGO 0x40 via-velocity.h 　
32925
 MIBCR_MIBINCMIBCR_MIBINC 0x20 via-velocity.h 　
32926
 MIBCR_MIBHIMIBCR_MIBHI 0x10 via-velocity.h 　
32927
 MIBCR_MIBFRZMIBCR_MIBFRZ 0x08 via-velocity.h 　
32928
 MIBCR_MIBFLSHMIBCR_MIBFLSH 0x04 via-velocity.h 　
32929
 MIBCR_MPTRINIMIBCR_MPTRINI 0x02 via-velocity.h 　
32930
 MIBCR_MIBCLRMIBCR_MIBCLR 0x01 via-velocity.h 　
32931
 EERSV_BOOT_RPLEERSV_BOOT_RPL ((u8) 0x01) via-velocity.h Boot method selection for VT6110
32932
 EERSV_BOOT_MASKEERSV_BOOT_MASK ((u8) 0x06) via-velocity.h 　
32933
 EERSV_BOOT_INT19EERSV_BOOT_INT19 ((u8) 0x00) via-velocity.h 　
32934
 EERSV_BOOT_INT18EERSV_BOOT_INT18 ((u8) 0x02) via-velocity.h 　
32935
 EERSV_BOOT_LOCALEERSV_BOOT_LOCAL ((u8) 0x04) via-velocity.h 　
32936
 EERSV_BOOT_BEVEERSV_BOOT_BEV ((u8) 0x06) via-velocity.h 　
32937
 BPCMD_BPDNEBPCMD_BPDNE 0x80 via-velocity.h 　
32938
 BPCMD_EBPWRBPCMD_EBPWR 0x02 via-velocity.h 　
32939
 BPCMD_EBPRDBPCMD_EBPRD 0x01 via-velocity.h 　
32940
 EECSR_EMBPEECSR_EMBP 0x40 via-velocity.h eeprom embeded programming
32941
 EECSR_RELOADEECSR_RELOAD 0x20 via-velocity.h eeprom content reload
32942
 EECSR_DPMEECSR_DPM 0x10 via-velocity.h eeprom direct programming
32943
 EECSR_ECSEECSR_ECS 0x08 via-velocity.h eeprom CS pin
32944
 EECSR_ECKEECSR_ECK 0x04 via-velocity.h eeprom CK pin
32945
 EECSR_EDIEECSR_EDI 0x02 via-velocity.h eeprom DI pin
32946
 EECSR_EDOEECSR_EDO 0x01 via-velocity.h eeprom DO pin
32947
 EMBCMD_EDONEEMBCMD_EDONE 0x80 via-velocity.h 　
32948
 EMBCMD_EWDISEMBCMD_EWDIS 0x08 via-velocity.h 　
32949
 EMBCMD_EWENEMBCMD_EWEN 0x04 via-velocity.h 　
32950
 EMBCMD_EWREMBCMD_EWR 0x02 via-velocity.h 　
32951
 EMBCMD_ERDEMBCMD_ERD 0x01 via-velocity.h 　
32952
 TESTCFG_HBDISTESTCFG_HBDIS 0x80 via-velocity.h 　
32953
 CHIPGCR_FCGMIICHIPGCR_FCGMII 0x80 via-velocity.h 　
32954
 CHIPGCR_FCFDXCHIPGCR_FCFDX 0x40 via-velocity.h 　
32955
 CHIPGCR_FCRESVCHIPGCR_FCRESV 0x20 via-velocity.h 　
32956
 CHIPGCR_FCMODECHIPGCR_FCMODE 0x10 via-velocity.h 　
32957
 CHIPGCR_LPSOPTCHIPGCR_LPSOPT 0x08 via-velocity.h 　
32958
 CHIPGCR_TM1USCHIPGCR_TM1US 0x04 via-velocity.h 　
32959
 CHIPGCR_TM0USCHIPGCR_TM0US 0x02 via-velocity.h 　
32960
 CHIPGCR_PHYINTENCHIPGCR_PHYINTEN 0x01 via-velocity.h 　
32961
 WOLCR_MSWOLEN7WOLCR_MSWOLEN7 0x0080 via-velocity.h enable pattern match filtering
32962
 WOLCR_MSWOLEN6WOLCR_MSWOLEN6 0x0040 via-velocity.h 　
32963
 WOLCR_MSWOLEN5WOLCR_MSWOLEN5 0x0020 via-velocity.h 　
32964
 WOLCR_MSWOLEN4WOLCR_MSWOLEN4 0x0010 via-velocity.h 　
32965
 WOLCR_MSWOLEN3WOLCR_MSWOLEN3 0x0008 via-velocity.h 　
32966
 WOLCR_MSWOLEN2WOLCR_MSWOLEN2 0x0004 via-velocity.h 　
32967
 WOLCR_MSWOLEN1WOLCR_MSWOLEN1 0x0002 via-velocity.h 　
32968
 WOLCR_MSWOLEN0WOLCR_MSWOLEN0 0x0001 via-velocity.h 　
32969
 WOLCR_ARP_ENWOLCR_ARP_EN 0x0001 via-velocity.h 　
32970
 WOLCR_LINKOFF_ENWOLCR_LINKOFF_EN 0x0800 via-velocity.h link off detected enable
32971
 WOLCR_LINKON_ENWOLCR_LINKON_EN 0x0400 via-velocity.h link on detected enable
32972
 WOLCR_MAGIC_ENWOLCR_MAGIC_EN 0x0200 via-velocity.h magic packet filter enable
32973
 WOLCR_UNICAST_ENWOLCR_UNICAST_EN 0x0100 via-velocity.h unicast filter enable
32974
 PWCFG_PHYPWOPTPWCFG_PHYPWOPT 0x80 via-velocity.h internal MII I/F timing
32975
 PWCFG_PCISTICKPWCFG_PCISTICK 0x40 via-velocity.h PCI sticky R/W enable
32976
 PWCFG_WOLTYPEPWCFG_WOLTYPE 0x20 via-velocity.h pulse(1) or button (0)
32977
 PWCFG_LEGCY_WOLPWCFG_LEGCY_WOL 0x10 via-velocity.h 　
32978
 PWCFG_PMCSR_PME_SRPWCFG_PMCSR_PME_SR 0x08 via-velocity.h 　
32979
 PWCFG_PMCSR_PME_ENPWCFG_PMCSR_PME_EN 0x04 via-velocity.h control by PCISTICK
32980
 PWCFG_LEGACY_WOLSRPWCFG_LEGACY_WOLSR 0x02 via-velocity.h Legacy WOL_SR shadow
32981
 PWCFG_LEGACY_WOLENPWCFG_LEGACY_WOLEN 0x01 via-velocity.h Legacy WOL_EN shadow
32982
 WOLCFG_PMEOVRWOLCFG_PMEOVR 0x80 via-velocity.h for legacy use, force PMEEN always
32983
 WOLCFG_SAMWOLCFG_SAM 0x20 via-velocity.h accept multicast case reset, default=0
32984
 WOLCFG_SABWOLCFG_SAB 0x10 via-velocity.h accept broadcast case reset, default=0
32985
 WOLCFG_SMIIACCWOLCFG_SMIIACC 0x08 via-velocity.h ??
32986
 WOLCFG_SGENWHWOLCFG_SGENWH 0x02 via-velocity.h 　
32987
 WOLCFG_PHYINTENWOLCFG_PHYINTEN 0x01 via-velocity.h 0:PHYINT trigger enable, 1:use internal MII
32988
 WOLSR_LINKOFF_INTWOLSR_LINKOFF_INT 0x0800 via-velocity.h 　
32989
 WOLSR_LINKON_INTWOLSR_LINKON_INT 0x0400 via-velocity.h 　
32990
 WOLSR_MAGIC_INTWOLSR_MAGIC_INT 0x0200 via-velocity.h 　
32991
 WOLSR_UNICAST_INTWOLSR_UNICAST_INT 0x0100 via-velocity.h 　
32992
 PKT_TYPE_NONEPKT_TYPE_NONE 0x0000 via-velocity.h Turn off receiver
32993
 PKT_TYPE_DIRECTEDPKT_TYPE_DIRECTED 0x0001 via-velocity.h obselete, directed address is always accepted
32994
 PKT_TYPE_MULTICASTPKT_TYPE_MULTICAST 0x0002 via-velocity.h 　
32995
 PKT_TYPE_ALL_MULTICASTPKT_TYPE_ALL_MULTICAST 0x0004 via-velocity.h 　
32996
 PKT_TYPE_BROADCASTPKT_TYPE_BROADCAST 0x0008 via-velocity.h 　
32997
 PKT_TYPE_PROMISCUOUSPKT_TYPE_PROMISCUOUS 0x0020 via-velocity.h 　
32998
 PKT_TYPE_LONGPKT_TYPE_LONG 0x2000 via-velocity.h NOTE.... the definition of LONG is >2048 bytes in our chip
32999
 PKT_TYPE_RUNTPKT_TYPE_RUNT 0x4000 via-velocity.h 　
33000
 PKT_TYPE_ERRORPKT_TYPE_ERROR 0x8000 via-velocity.h Accept error packets, e.g. CRC error
33001
 MAC_LB_NONEMAC_LB_NONE 0x00 via-velocity.h 　
33002
 MAC_LB_INTERNALMAC_LB_INTERNAL 0x01 via-velocity.h 　
33003
 MAC_LB_EXTERNALMAC_LB_EXTERNAL 0x02 via-velocity.h 　
33004
 IMR_MASK_VALUEIMR_MASK_VALUE 0x0033FF0FUL via-velocity.h initial value of IMR
33005
 IMR_MASK_VALUEIMR_MASK_VALUE 0x0013FB0FUL via-velocity.h initial value of IMR
33006
 REV_ID_VT3119_A0REV_ID_VT3119_A0 0x00 via-velocity.h 　
33007
 REV_ID_VT3119_A1REV_ID_VT3119_A1 0x01 via-velocity.h 　
33008
 REV_ID_VT3216_A0REV_ID_VT3216_A0 0x10 via-velocity.h 　
33009
 W_MAX_TIMEOUTW_MAX_TIMEOUT 0x0FFFU via-velocity.h 　
33010
 MII_REG_BMCRMII_REG_BMCR 0x00 via-velocity.h physical address
33011
 MII_REG_BMSRMII_REG_BMSR 0x01 via-velocity.h 　
33012
 MII_REG_PHYID1MII_REG_PHYID1 0x02 via-velocity.h OUI
33013
 MII_REG_PHYID2MII_REG_PHYID2 0x03 via-velocity.h OUI + Module ID + REV ID
33014
 MII_REG_ANARMII_REG_ANAR 0x04 via-velocity.h 　
33015
 MII_REG_ANLPARMII_REG_ANLPAR 0x05 via-velocity.h 　
33016
 MII_REG_G1000CRMII_REG_G1000CR 0x09 via-velocity.h 　
33017
 MII_REG_G1000SRMII_REG_G1000SR 0x0A via-velocity.h 　
33018
 MII_REG_MODCFGMII_REG_MODCFG 0x10 via-velocity.h 　
33019
 MII_REG_TCSRMII_REG_TCSR 0x16 via-velocity.h 　
33020
 MII_REG_PLEDMII_REG_PLED 0x1B via-velocity.h 　
33021
 MII_REG_PCRMII_REG_PCR 0x17 via-velocity.h 　
33022
 MII_REG_PCSRMII_REG_PCSR 0x17 via-velocity.h 　
33023
 MII_REG_AUXCRMII_REG_AUXCR 0x1C via-velocity.h 　
33024
 MII_REG_PSCRMII_REG_PSCR 0x10 via-velocity.h PHY specific control register
33025
 BMCR_RESETBMCR_RESET 0x8000 via-velocity.h 　
33026
 BMCR_LBKBMCR_LBK 0x4000 via-velocity.h 　
33027
 BMCR_SPEED100BMCR_SPEED100 0x2000 via-velocity.h 　
33028
 BMCR_AUTOBMCR_AUTO 0x1000 via-velocity.h 　
33029
 BMCR_PDBMCR_PD 0x0800 via-velocity.h 　
33030
 BMCR_ISOBMCR_ISO 0x0400 via-velocity.h 　
33031
 BMCR_REAUTOBMCR_REAUTO 0x0200 via-velocity.h 　
33032
 BMCR_FDXBMCR_FDX 0x0100 via-velocity.h 　
33033
 BMCR_SPEED1GBMCR_SPEED1G 0x0040 via-velocity.h 　
33034
 BMSR_AUTOCMBMSR_AUTOCM 0x0020 via-velocity.h 　
33035
 BMSR_LNKBMSR_LNK 0x0004 via-velocity.h 　
33036
 ANAR_ASMDIRANAR_ASMDIR 0x0800 via-velocity.h Asymmetric PAUSE support
33037
 ANAR_PAUSEANAR_PAUSE 0x0400 via-velocity.h Symmetric PAUSE Support
33038
 ANAR_T4ANAR_T4 0x0200 via-velocity.h 　
33039
 ANAR_TXFDANAR_TXFD 0x0100 via-velocity.h 　
33040
 ANAR_TXANAR_TX 0x0080 via-velocity.h 　
33041
 ANAR_10FDANAR_10FD 0x0040 via-velocity.h 　
33042
 ANAR_10ANAR_10 0x0020 via-velocity.h 　
33043
 ANLPAR_ASMDIRANLPAR_ASMDIR 0x0800 via-velocity.h Asymmetric PAUSE support
33044
 ANLPAR_PAUSEANLPAR_PAUSE 0x0400 via-velocity.h Symmetric PAUSE Support
33045
 ANLPAR_T4ANLPAR_T4 0x0200 via-velocity.h 　
33046
 ANLPAR_TXFDANLPAR_TXFD 0x0100 via-velocity.h 　
33047
 ANLPAR_TXANLPAR_TX 0x0080 via-velocity.h 　
33048
 ANLPAR_10FDANLPAR_10FD 0x0040 via-velocity.h 　
33049
 ANLPAR_10ANLPAR_10 0x0020 via-velocity.h 　
33050
 G1000CR_1000FDG1000CR_1000FD 0x0200 via-velocity.h PHY is 1000-T Full-duplex capable
33051
 G1000CR_1000G1000CR_1000 0x0100 via-velocity.h PHY is 1000-T Half-duplex capable
33052
 G1000SR_1000FDG1000SR_1000FD 0x0800 via-velocity.h LP PHY is 1000-T Full-duplex capable
33053
 G1000SR_1000G1000SR_1000 0x0400 via-velocity.h LP PHY is 1000-T Half-duplex capable
33054
 TCSR_ECHODISTCSR_ECHODIS 0x2000 via-velocity.h 　
33055
 AUXCR_MDPPSAUXCR_MDPPS 0x0004 via-velocity.h 　
33056
 PLED_LALBEPLED_LALBE 0x0004 via-velocity.h 　
33057
 PSCR_ACRSTXPSCR_ACRSTX 0x0800 via-velocity.h Assert CRS on Transmit
33058
 PHYID_CICADA_CS8201PHYID_CICADA_CS8201 0x000FC410UL via-velocity.h 　
33059
 PHYID_VT3216_32BITPHYID_VT3216_32BIT 0x000FC610UL via-velocity.h 　
33060
 PHYID_VT3216_64BITPHYID_VT3216_64BIT 0x000FC600UL via-velocity.h 　
33061
 PHYID_MARVELL_1000PHYID_MARVELL_1000 0x01410C50UL via-velocity.h 　
33062
 PHYID_MARVELL_1000SPHYID_MARVELL_1000S 0x01410C40UL via-velocity.h 　
33063
 PHYID_REV_ID_MASKPHYID_REV_ID_MASK 0x0000000FUL via-velocity.h 　
33064
 VELOCITY_WOL_MAGICVELOCITY_WOL_MAGIC 0x00000000UL via-velocity.h 　
33065
 VELOCITY_WOL_PHYVELOCITY_WOL_PHY 0x00000001UL via-velocity.h 　
33066
 VELOCITY_WOL_ARPVELOCITY_WOL_ARP 0x00000002UL via-velocity.h 　
33067
 VELOCITY_WOL_UCASTVELOCITY_WOL_UCAST 0x00000004UL via-velocity.h 　
33068
 VELOCITY_WOL_BCASTVELOCITY_WOL_BCAST 0x00000010UL via-velocity.h 　
33069
 VELOCITY_WOL_MCASTVELOCITY_WOL_MCAST 0x00000020UL via-velocity.h 　
33070
 VELOCITY_WOL_MAGIC_SECVELOCITY_WOL_MAGIC_SEC 0x00000040UL via-velocity.h 　
33071
 VELOCITY_FLAGS_TAGGINGVELOCITY_FLAGS_TAGGING 0x00000001UL via-velocity.h 　
33072
 VELOCITY_FLAGS_TX_CSUMVELOCITY_FLAGS_TX_CSUM 0x00000002UL via-velocity.h 　
33073
 VELOCITY_FLAGS_RX_CSUMVELOCITY_FLAGS_RX_CSUM 0x00000004UL via-velocity.h 　
33074
 VELOCITY_FLAGS_IP_ALIGNVELOCITY_FLAGS_IP_ALIGN 0x00000008UL via-velocity.h 　
33075
 VELOCITY_FLAGS_VAL_PKT_LENVELOCITY_FLAGS_VAL_PKT_LEN 0x00000010UL via-velocity.h 　
33076
 VELOCITY_FLAGS_FLOW_CTRLVELOCITY_FLAGS_FLOW_CTRL 0x01000000UL via-velocity.h 　
33077
 VELOCITY_FLAGS_OPENEDVELOCITY_FLAGS_OPENED 0x00010000UL via-velocity.h 　
33078
 VELOCITY_FLAGS_VMNS_CONNECTEDVELOCITY_FLAGS_VMNS_CONNECTED 0x00020000UL via-velocity.h 　
33079
 VELOCITY_FLAGS_VMNS_COMMITTEDVELOCITY_FLAGS_VMNS_COMMITTED 0x00040000UL via-velocity.h 　
33080
 VELOCITY_FLAGS_WOL_ENABLEDVELOCITY_FLAGS_WOL_ENABLED 0x00080000UL via-velocity.h 　
33081
 VELOCITY_LINK_FAILVELOCITY_LINK_FAIL 0x00000001UL via-velocity.h 　
33082
 VELOCITY_SPEED_10VELOCITY_SPEED_10 0x00000002UL via-velocity.h 　
33083
 VELOCITY_SPEED_100VELOCITY_SPEED_100 0x00000004UL via-velocity.h 　
33084
 VELOCITY_SPEED_1000VELOCITY_SPEED_1000 0x00000008UL via-velocity.h 　
33085
 VELOCITY_DUPLEX_FULLVELOCITY_DUPLEX_FULL 0x00000010UL via-velocity.h 　
33086
 VELOCITY_AUTONEG_ENABLEVELOCITY_AUTONEG_ENABLE 0x00000020UL via-velocity.h 　
33087
 VELOCITY_FORCED_BY_EEPROMVELOCITY_FORCED_BY_EEPROM 0x00000040UL via-velocity.h 　
33088
 VELOCITY_LINK_CHANGEVELOCITY_LINK_CHANGE 0x00000001UL via-velocity.h 　
33089
 RX_DESC_MINRX_DESC_MIN 4 via-velocity.h 　
33090
 RX_DESC_MAXRX_DESC_MAX 255 via-velocity.h 　
33091
 RX_DESC_DEFRX_DESC_DEF RX_DESC_MIN via-velocity.h 　
33092
 TX_DESC_MINTX_DESC_MIN 1 via-velocity.h 　
33093
 TX_DESC_MAXTX_DESC_MAX 256 via-velocity.h 　
33094
 TX_DESC_DEFTX_DESC_DEF TX_DESC_MIN via-velocity.h 　
33095
 VIRTIO_NET_F_CSUMVIRTIO_NET_F_CSUM 0 virtio-net.h Host handles pkts w/ partial csum
33096
 VIRTIO_NET_F_GUEST_CSUMVIRTIO_NET_F_GUEST_CSUM 1 virtio-net.h Guest handles pkts w/ partial csum
33097
 VIRTIO_NET_F_MACVIRTIO_NET_F_MAC 5 virtio-net.h Host has given MAC address.
33098
 VIRTIO_NET_F_GSOVIRTIO_NET_F_GSO 6 virtio-net.h Host handles pkts w/ any GSO type
33099
 VIRTIO_NET_F_GUEST_TSO4VIRTIO_NET_F_GUEST_TSO4 7 virtio-net.h Guest can handle TSOv4 in.
33100
 VIRTIO_NET_F_GUEST_TSO6VIRTIO_NET_F_GUEST_TSO6 8 virtio-net.h Guest can handle TSOv6 in.
33101
 VIRTIO_NET_F_GUEST_ECNVIRTIO_NET_F_GUEST_ECN 9 virtio-net.h Guest can handle TSO[6] w/ ECN in.
33102
 VIRTIO_NET_F_GUEST_UFOVIRTIO_NET_F_GUEST_UFO 10 virtio-net.h Guest can handle UFO in.
33103
 VIRTIO_NET_F_HOST_TSO4VIRTIO_NET_F_HOST_TSO4 11 virtio-net.h Host can handle TSOv4 in.
33104
 VIRTIO_NET_F_HOST_TSO6VIRTIO_NET_F_HOST_TSO6 12 virtio-net.h Host can handle TSOv6 in.
33105
 VIRTIO_NET_F_HOST_ECNVIRTIO_NET_F_HOST_ECN 13 virtio-net.h Host can handle TSO[6] w/ ECN in.
33106
 VIRTIO_NET_F_HOST_UFOVIRTIO_NET_F_HOST_UFO 14 virtio-net.h Host can handle UFO in.
33107
 WLAN_Ix86WLAN_Ix86 1 wlan_compat.h 　
33108
 WLAN_PPCWLAN_PPC 2 wlan_compat.h 　
33109
 WLAN_Ix96WLAN_Ix96 3 wlan_compat.h 　
33110
 WLAN_ARMWLAN_ARM 4 wlan_compat.h 　
33111
 WLAN_ALPHAWLAN_ALPHA 5 wlan_compat.h 　
33112
 WLAN_MIPSWLAN_MIPS 6 wlan_compat.h 　
33113
 WLAN_HPPAWLAN_HPPA 7 wlan_compat.h 　
33114
 WLAN_I386COREWLAN_I386CORE 1 wlan_compat.h 　
33115
 WLAN_PPCCOREWLAN_PPCCORE 2 wlan_compat.h 　
33116
 WLAN_I296WLAN_I296 3 wlan_compat.h 　
33117
 WLAN_ARMCOREWLAN_ARMCORE 4 wlan_compat.h 　
33118
 WLAN_ALPHACOREWLAN_ALPHACORE 5 wlan_compat.h 　
33119
 WLAN_MIPSCOREWLAN_MIPSCORE 6 wlan_compat.h 　
33120
 WLAN_HPPACOREWLAN_HPPACORE 7 wlan_compat.h 　
33121
 WLAN_I386PARTWLAN_I386PART 1 wlan_compat.h 　
33122
 WLAN_MPC860WLAN_MPC860 2 wlan_compat.h 　
33123
 WLAN_MPC823WLAN_MPC823 3 wlan_compat.h 　
33124
 WLAN_I296SAWLAN_I296SA 4 wlan_compat.h 　
33125
 WLAN_PPCPARTWLAN_PPCPART 5 wlan_compat.h 　
33126
 WLAN_ARMPARTWLAN_ARMPART 6 wlan_compat.h 　
33127
 WLAN_ALPHAPARTWLAN_ALPHAPART 7 wlan_compat.h 　
33128
 WLAN_MIPSPARTWLAN_MIPSPART 8 wlan_compat.h 　
33129
 WLAN_HPPAPARTWLAN_HPPAPART 9 wlan_compat.h 　
33130
 WLAN_PCATWLAN_PCAT 1 wlan_compat.h 　
33131
 WLAN_MBXWLAN_MBX 2 wlan_compat.h 　
33132
 WLAN_RPXWLAN_RPX 3 wlan_compat.h 　
33133
 WLAN_LWARCHWLAN_LWARCH 4 wlan_compat.h 　
33134
 WLAN_PMACWLAN_PMAC 5 wlan_compat.h 　
33135
 WLAN_SKIFFWLAN_SKIFF 6 wlan_compat.h 　
33136
 WLAN_BITSYWLAN_BITSY 7 wlan_compat.h 　
33137
 WLAN_ALPHAARCHWLAN_ALPHAARCH 7 wlan_compat.h 　
33138
 WLAN_MIPSARCHWLAN_MIPSARCH 9 wlan_compat.h 　
33139
 WLAN_HPPAARCHWLAN_HPPAARCH 10 wlan_compat.h 　
33140
 WLAN_LINUX_KERNELWLAN_LINUX_KERNEL 1 wlan_compat.h 　
33141
 WLAN_LINUX_USERWLAN_LINUX_USER 2 wlan_compat.h 　
33142
 WLAN_PCMCIAWLAN_PCMCIA 1 wlan_compat.h 　
33143
 WLAN_ISAWLAN_ISA 2 wlan_compat.h 　
33144
 WLAN_PCIWLAN_PCI 3 wlan_compat.h 　
33145
 WLAN_USBWLAN_USB 4 wlan_compat.h 　
33146
 WLAN_PLXWLAN_PLX 5 wlan_compat.h 　
33147
 WLAN_OSWLAN_OS WLAN_LINUX_KERNEL wlan_compat.h 　
33148
 WLAN_OSWLAN_OS WLAN_LINUX_USER wlan_compat.h 　
33149
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_Ix86 wlan_compat.h 　
33150
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_I386CORE wlan_compat.h 　
33151
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_I386PART wlan_compat.h 　
33152
 WLAN_SYSARCHWLAN_SYSARCH WLAN_PCAT wlan_compat.h 　
33153
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_PPC wlan_compat.h 　
33154
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_PPCCORE wlan_compat.h 　
33155
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_MPC860 wlan_compat.h 　
33156
 WLAN_SYSARCHWLAN_SYSARCH WLAN_MBX wlan_compat.h 　
33157
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_MPC823 wlan_compat.h 　
33158
 WLAN_SYSARCHWLAN_SYSARCH WLAN_RPX wlan_compat.h 　
33159
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_MPC860 wlan_compat.h 　
33160
 WLAN_SYSARCHWLAN_SYSARCH WLAN_RPX wlan_compat.h 　
33161
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_PPCPART wlan_compat.h 　
33162
 WLAN_SYSARCHWLAN_SYSARCH WLAN_PMAC wlan_compat.h 　
33163
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_ARM wlan_compat.h 　
33164
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_ARMCORE wlan_compat.h 　
33165
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_ARM_PART wlan_compat.h 　
33166
 WLAN_SYSARCHWLAN_SYSARCH WLAN_SKIFF wlan_compat.h 　
33167
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_ALPHA wlan_compat.h 　
33168
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_ALPHACORE wlan_compat.h 　
33169
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_ALPHAPART wlan_compat.h 　
33170
 WLAN_SYSARCHWLAN_SYSARCH WLAN_ALPHAARCH wlan_compat.h 　
33171
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_MIPS wlan_compat.h 　
33172
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_MIPSCORE wlan_compat.h 　
33173
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_MIPSPART wlan_compat.h 　
33174
 WLAN_SYSARCHWLAN_SYSARCH WLAN_MIPSARCH wlan_compat.h 　
33175
 WLAN_CPU_FAMILYWLAN_CPU_FAMILY WLAN_HPPA wlan_compat.h 　
33176
 WLAN_CPU_COREWLAN_CPU_CORE WLAN_HPPACORE wlan_compat.h 　
33177
 WLAN_CPU_PARTWLAN_CPU_PART WLAN_HPPAPART wlan_compat.h 　
33178
 WLAN_SYSARCHWLAN_SYSARCH WLAN_HPPAARCH wlan_compat.h 　
33179
 BIT0BIT0 0x00000001 wlan_compat.h 　
33180
 BIT1BIT1 0x00000002 wlan_compat.h 　
33181
 BIT2BIT2 0x00000004 wlan_compat.h 　
33182
 BIT3BIT3 0x00000008 wlan_compat.h 　
33183
 BIT4BIT4 0x00000010 wlan_compat.h 　
33184
 BIT5BIT5 0x00000020 wlan_compat.h 　
33185
 BIT6BIT6 0x00000040 wlan_compat.h 　
33186
 BIT7BIT7 0x00000080 wlan_compat.h 　
33187
 BIT8BIT8 0x00000100 wlan_compat.h 　
33188
 BIT9BIT9 0x00000200 wlan_compat.h 　
33189
 BIT10BIT10 0x00000400 wlan_compat.h 　
33190
 BIT11BIT11 0x00000800 wlan_compat.h 　
33191
 BIT12BIT12 0x00001000 wlan_compat.h 　
33192
 BIT13BIT13 0x00002000 wlan_compat.h 　
33193
 BIT14BIT14 0x00004000 wlan_compat.h 　
33194
 BIT15BIT15 0x00008000 wlan_compat.h 　
33195
 BIT16BIT16 0x00010000 wlan_compat.h 　
33196
 BIT17BIT17 0x00020000 wlan_compat.h 　
33197
 BIT18BIT18 0x00040000 wlan_compat.h 　
33198
 BIT19BIT19 0x00080000 wlan_compat.h 　
33199
 BIT20BIT20 0x00100000 wlan_compat.h 　
33200
 BIT21BIT21 0x00200000 wlan_compat.h 　
33201
 BIT22BIT22 0x00400000 wlan_compat.h 　
33202
 BIT23BIT23 0x00800000 wlan_compat.h 　
33203
 BIT24BIT24 0x01000000 wlan_compat.h 　
33204
 BIT25BIT25 0x02000000 wlan_compat.h 　
33205
 BIT26BIT26 0x04000000 wlan_compat.h 　
33206
 BIT27BIT27 0x08000000 wlan_compat.h 　
33207
 BIT28BIT28 0x10000000 wlan_compat.h 　
33208
 BIT29BIT29 0x20000000 wlan_compat.h 　
33209
 BIT30BIT30 0x40000000 wlan_compat.h 　
33210
 BIT31BIT31 0x80000000 wlan_compat.h 　
33211
 UINT8_MAXUINT8_MAX (0xffUL) wlan_compat.h 　
33212
 UINT16_MAXUINT16_MAX (0xffffUL) wlan_compat.h 　
33213
 UINT32_MAXUINT32_MAX (0xffffffffUL) wlan_compat.h 　
33214
 INT8_MAXINT8_MAX (0x7fL) wlan_compat.h 　
33215
 INT16_MAXINT16_MAX (0x7fffL) wlan_compat.h 　
33216
 INT32_MAXINT32_MAX (0x7fffffffL) wlan_compat.h 　
33217
 __WLAN_ATTRIB_PACK____WLAN_ATTRIB_PACK__ __attribute__ ((packed)) wlan_compat.h 　
33218
 __WLAN_INLINE____WLAN_INLINE__ inline wlan_compat.h 　
33219
 WLAN_MIN_ARRAYWLAN_MIN_ARRAY 0 wlan_compat.h 　
33220
 WLAN_DBVARWLAN_DBVAR wlan_debug wlan_compat.h 　
33221
 DBFENTERDBFENTER { if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Enter\n"); } } wlan_compat.h 　
33222
 DBFEXITDBFEXIT { if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Exit\n"); } } wlan_compat.h 　
33223
 wlan_ms_per_tickwlan_ms_per_tick (1000UL / (wlan_ticks_per_sec)) wlan_compat.h 　
33224
 MODVERSIONSMODVERSIONS 1 wlan_compat.h 　
33225
 __SMP____SMP__ 1 wlan_compat.h 　
33226
 CONFIG_NETLINKCONFIG_NETLINK 1 wlan_compat.h 　
33227
 ATH5K_CALIB_INTERVALATH5K_CALIB_INTERVAL 10 ath5k.c Calibrate PHY every 10 seconds
33228
 ATH5K_RETRIESATH5K_RETRIES 4 ath5k.c Number of times to retry packet sends
33229
 ATH5K_DESC_ALIGNATH5K_DESC_ALIGN 16 ath5k.c Alignment for TX/RX descriptors
33230
 ATH5K_SPMBL_NOATH5K_SPMBL_NO 1 ath5k.c 　
33231
 ATH5K_SPMBL_YESATH5K_SPMBL_YES 2 ath5k.c 　
33232
 ATH5K_SPMBL_BOTHATH5K_SPMBL_BOTH 3 ath5k.c 　
33233
 ATH5K_NR_RATESATH5K_NR_RATES 15 ath5k.c 　
33234
 FCS_LENFCS_LEN 4 ath5k_desc.c 　
33235
 ERRFILEERRFILE ERRFILE_ath5k ath5k.h 　
33236
 PCI_DEVICE_ID_ATHEROS_AR5210PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 ath5k.h AR5210
33237
 PCI_DEVICE_ID_ATHEROS_AR5311PCI_DEVICE_ID_ATHEROS_AR5311 0x0011 ath5k.h AR5311
33238
 PCI_DEVICE_ID_ATHEROS_AR5211PCI_DEVICE_ID_ATHEROS_AR5211 0x0012 ath5k.h AR5211
33239
 PCI_DEVICE_ID_ATHEROS_AR5212PCI_DEVICE_ID_ATHEROS_AR5212 0x0013 ath5k.h AR5212
33240
 PCI_DEVICE_ID_3COM_3CRDAG675PCI_DEVICE_ID_3COM_3CRDAG675 0x0013 ath5k.h 3CRDAG675 (Atheros AR5212)
33241
 PCI_DEVICE_ID_3COM_2_3CRPAG175PCI_DEVICE_ID_3COM_2_3CRPAG175 0x0013 ath5k.h 3CRPAG175 (Atheros AR5212)
33242
 PCI_DEVICE_ID_ATHEROS_AR5210_APPCI_DEVICE_ID_ATHEROS_AR5210_AP 0x0207 ath5k.h AR5210 (Early)
33243
 PCI_DEVICE_ID_ATHEROS_AR5212_IBPCI_DEVICE_ID_ATHEROS_AR5212_IB 0x1014 ath5k.h AR5212 (IBM MiniPCI)
33244
 PCI_DEVICE_ID_ATHEROS_AR5210_DEPCI_DEVICE_ID_ATHEROS_AR5210_DE 0x1107 ath5k.h AR5210 (no eeprom)
33245
 PCI_DEVICE_ID_ATHEROS_AR5212_DEPCI_DEVICE_ID_ATHEROS_AR5212_DE 0x1113 ath5k.h AR5212 (no eeprom)
33246
 PCI_DEVICE_ID_ATHEROS_AR5211_DEPCI_DEVICE_ID_ATHEROS_AR5211_DE 0x1112 ath5k.h AR5211 (no eeprom)
33247
 PCI_DEVICE_ID_ATHEROS_AR5212_FPPCI_DEVICE_ID_ATHEROS_AR5212_FP 0xf013 ath5k.h AR5212 (emulation board)
33248
 PCI_DEVICE_ID_ATHEROS_AR5211_LEPCI_DEVICE_ID_ATHEROS_AR5211_LE 0xff12 ath5k.h AR5211 (emulation board)
33249
 PCI_DEVICE_ID_ATHEROS_AR5211_FPPCI_DEVICE_ID_ATHEROS_AR5211_FP 0xf11b ath5k.h AR5211 (emulation board)
33250
 PCI_DEVICE_ID_ATHEROS_AR5312_REPCI_DEVICE_ID_ATHEROS_AR5312_RE 0x0052 ath5k.h AR5312 WMAC (AP31)
33251
 PCI_DEVICE_ID_ATHEROS_AR5312_REPCI_DEVICE_ID_ATHEROS_AR5312_RE 0x0057 ath5k.h AR5312 WMAC (AP30-040)
33252
 PCI_DEVICE_ID_ATHEROS_AR5312_REPCI_DEVICE_ID_ATHEROS_AR5312_RE 0x0058 ath5k.h AR5312 WMAC (AP43-030)
33253
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0014 ath5k.h AR5212 compatible
33254
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0015 ath5k.h AR5212 compatible
33255
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0016 ath5k.h AR5212 compatible
33256
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0017 ath5k.h AR5212 compatible
33257
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0018 ath5k.h AR5212 compatible
33258
 PCI_DEVICE_ID_ATHEROS_AR5212_00PCI_DEVICE_ID_ATHEROS_AR5212_00 0x0019 ath5k.h AR5212 compatible
33259
 PCI_DEVICE_ID_ATHEROS_AR2413PCI_DEVICE_ID_ATHEROS_AR2413 0x001a ath5k.h AR2413 (Griffin-lite)
33260
 PCI_DEVICE_ID_ATHEROS_AR5413PCI_DEVICE_ID_ATHEROS_AR5413 0x001b ath5k.h AR5413 (Eagle)
33261
 PCI_DEVICE_ID_ATHEROS_AR5424PCI_DEVICE_ID_ATHEROS_AR5424 0x001c ath5k.h AR5424 (Condor PCI-E)
33262
 PCI_DEVICE_ID_ATHEROS_AR5416PCI_DEVICE_ID_ATHEROS_AR5416 0x0023 ath5k.h AR5416
33263
 PCI_DEVICE_ID_ATHEROS_AR5418PCI_DEVICE_ID_ATHEROS_AR5418 0x0024 ath5k.h AR5418
33264
 AR5K_INI_RFGAIN_5GHZAR5K_INI_RFGAIN_5GHZ 0 ath5k.h 　
33265
 AR5K_INI_RFGAIN_2GHZAR5K_INI_RFGAIN_2GHZ 1 ath5k.h 　
33266
 AR5K_INI_VAL_11AAR5K_INI_VAL_11A 0 ath5k.h 　
33267
 AR5K_INI_VAL_11A_TURBOAR5K_INI_VAL_11A_TURBO 1 ath5k.h 　
33268
 AR5K_INI_VAL_11BAR5K_INI_VAL_11B 2 ath5k.h 　
33269
 AR5K_INI_VAL_11GAR5K_INI_VAL_11G 3 ath5k.h 　
33270
 AR5K_INI_VAL_11G_TURBOAR5K_INI_VAL_11G_TURBO 4 ath5k.h 　
33271
 AR5K_INI_VAL_XRAR5K_INI_VAL_XR 0 ath5k.h 　
33272
 AR5K_INI_VAL_MAXAR5K_INI_VAL_MAX 5 ath5k.h 　
33273
 IEEE80211_MAX_LENIEEE80211_MAX_LEN 2352 ath5k.h 　
33274
 AR5K_TUNE_DMA_BEACON_RESPAR5K_TUNE_DMA_BEACON_RESP 2 ath5k.h 　
33275
 AR5K_TUNE_SW_BEACON_RESPAR5K_TUNE_SW_BEACON_RESP 10 ath5k.h 　
33276
 AR5K_TUNE_ADDITIONAL_SWBA_BACKOAR5K_TUNE_ADDITIONAL_SWBA_BACKO 0 ath5k.h 　
33277
 AR5K_TUNE_RADAR_ALERTAR5K_TUNE_RADAR_ALERT 0 ath5k.h 　
33278
 AR5K_TUNE_MIN_TX_FIFO_THRESAR5K_TUNE_MIN_TX_FIFO_THRES 1 ath5k.h 　
33279
 AR5K_TUNE_MAX_TX_FIFO_THRESAR5K_TUNE_MAX_TX_FIFO_THRES ((IEEE80211_MAX_LEN / 64) + 1) ath5k.h 　
33280
 AR5K_TUNE_REGISTER_TIMEOUTAR5K_TUNE_REGISTER_TIMEOUT 20000 ath5k.h 　
33281
 AR5K_TUNE_RSSI_THRESAR5K_TUNE_RSSI_THRES 129 ath5k.h 　
33282
 AR5K_TUNE_BMISS_THRESAR5K_TUNE_BMISS_THRES 7 ath5k.h 　
33283
 AR5K_TUNE_REGISTER_DWELL_TIMEAR5K_TUNE_REGISTER_DWELL_TIME 20000 ath5k.h 　
33284
 AR5K_TUNE_BEACON_INTERVALAR5K_TUNE_BEACON_INTERVAL 100 ath5k.h 　
33285
 AR5K_TUNE_AIFSAR5K_TUNE_AIFS 2 ath5k.h 　
33286
 AR5K_TUNE_AIFS_11BAR5K_TUNE_AIFS_11B 2 ath5k.h 　
33287
 AR5K_TUNE_AIFS_XRAR5K_TUNE_AIFS_XR 0 ath5k.h 　
33288
 AR5K_TUNE_CWMINAR5K_TUNE_CWMIN 15 ath5k.h 　
33289
 AR5K_TUNE_CWMIN_11BAR5K_TUNE_CWMIN_11B 31 ath5k.h 　
33290
 AR5K_TUNE_CWMIN_XRAR5K_TUNE_CWMIN_XR 3 ath5k.h 　
33291
 AR5K_TUNE_CWMAXAR5K_TUNE_CWMAX 1023 ath5k.h 　
33292
 AR5K_TUNE_CWMAX_11BAR5K_TUNE_CWMAX_11B 1023 ath5k.h 　
33293
 AR5K_TUNE_CWMAX_XRAR5K_TUNE_CWMAX_XR 7 ath5k.h 　
33294
 AR5K_TUNE_NOISE_FLOORAR5K_TUNE_NOISE_FLOOR -72 ath5k.h 　
33295
 AR5K_TUNE_MAX_TXPOWERAR5K_TUNE_MAX_TXPOWER 63 ath5k.h 　
33296
 AR5K_TUNE_DEFAULT_TXPOWERAR5K_TUNE_DEFAULT_TXPOWER 25 ath5k.h 　
33297
 AR5K_TUNE_TPC_TXPOWERAR5K_TUNE_TPC_TXPOWER 0 ath5k.h 　
33298
 AR5K_TUNE_ANT_DIVERSITYAR5K_TUNE_ANT_DIVERSITY 1 ath5k.h 　
33299
 AR5K_TUNE_HWTXTRIESAR5K_TUNE_HWTXTRIES 4 ath5k.h 　
33300
 AR5K_INIT_CARR_SENSE_ENAR5K_INIT_CARR_SENSE_EN 1 ath5k.h 　
33301
 AR5K_INIT_CFGAR5K_INIT_CFG ( \ AR5K_CFG_SWTD | AR5K_CFG_SWRD \ ) ath5k.h 　
33302
 AR5K_INIT_CFGAR5K_INIT_CFG 0x00000000 ath5k.h 　
33303
 AR5K_INIT_CYCRSSI_THR1AR5K_INIT_CYCRSSI_THR1 2 ath5k.h 　
33304
 AR5K_INIT_TX_LATENCYAR5K_INIT_TX_LATENCY 502 ath5k.h 　
33305
 AR5K_INIT_USECAR5K_INIT_USEC 39 ath5k.h 　
33306
 AR5K_INIT_USEC_TURBOAR5K_INIT_USEC_TURBO 79 ath5k.h 　
33307
 AR5K_INIT_USEC_32AR5K_INIT_USEC_32 31 ath5k.h 　
33308
 AR5K_INIT_SLOT_TIMEAR5K_INIT_SLOT_TIME 396 ath5k.h 　
33309
 AR5K_INIT_SLOT_TIME_TURBOAR5K_INIT_SLOT_TIME_TURBO 480 ath5k.h 　
33310
 AR5K_INIT_ACK_CTS_TIMEOUTAR5K_INIT_ACK_CTS_TIMEOUT 1024 ath5k.h 　
33311
 AR5K_INIT_ACK_CTS_TIMEOUT_TURBOAR5K_INIT_ACK_CTS_TIMEOUT_TURBO 0x08000800 ath5k.h 　
33312
 AR5K_INIT_PROG_IFSAR5K_INIT_PROG_IFS 920 ath5k.h 　
33313
 AR5K_INIT_PROG_IFS_TURBOAR5K_INIT_PROG_IFS_TURBO 960 ath5k.h 　
33314
 AR5K_INIT_EIFSAR5K_INIT_EIFS 3440 ath5k.h 　
33315
 AR5K_INIT_EIFS_TURBOAR5K_INIT_EIFS_TURBO 6880 ath5k.h 　
33316
 AR5K_INIT_SIFSAR5K_INIT_SIFS 560 ath5k.h 　
33317
 AR5K_INIT_SIFS_TURBOAR5K_INIT_SIFS_TURBO 480 ath5k.h 　
33318
 AR5K_INIT_SH_RETRYAR5K_INIT_SH_RETRY 10 ath5k.h 　
33319
 AR5K_INIT_LG_RETRYAR5K_INIT_LG_RETRY AR5K_INIT_SH_RETRY ath5k.h 　
33320
 AR5K_INIT_SSH_RETRYAR5K_INIT_SSH_RETRY 32 ath5k.h 　
33321
 AR5K_INIT_SLG_RETRYAR5K_INIT_SLG_RETRY AR5K_INIT_SSH_RETRY ath5k.h 　
33322
 AR5K_INIT_TX_RETRYAR5K_INIT_TX_RETRY 10 ath5k.h 　
33323
 AR5K_INIT_TRANSMIT_LATENCYAR5K_INIT_TRANSMIT_LATENCY ( \ (AR5K_INIT_TX_LATENCY << 14) | (AR5K_INIT_USEC_32 << 7) | \ (AR5K_INIT_USEC) \ ) ath5k.h 　
33324
 AR5K_INIT_TRANSMIT_LATENCY_TURBAR5K_INIT_TRANSMIT_LATENCY_TURB ( \ (AR5K_INIT_TX_LATENCY << 14) | (AR5K_INIT_USEC_32 << 7) | \ (AR5K_INIT_USEC_TURBO) \ ) ath5k.h 　
33325
 AR5K_INIT_PROTO_TIME_CNTRLAR5K_INIT_PROTO_TIME_CNTRL ( \ (AR5K_INIT_CARR_SENSE_EN << 26) | (AR5K_INIT_EIFS << 12) | \ (AR5K_INIT_PROG_IFS) \ ) ath5k.h 　
33326
 AR5K_INIT_PROTO_TIME_CNTRL_TURBAR5K_INIT_PROTO_TIME_CNTRL_TURB ( \ (AR5K_INIT_CARR_SENSE_EN << 26) | (AR5K_INIT_EIFS_TURBO << 12) | \ (AR5K_INIT_PROG_IFS_TURBO) \ ) ath5k.h 　
33327
 AR5K_TXQ_USEDEFAULTAR5K_TXQ_USEDEFAULT ((u32) -1) ath5k.h 　
33328
 AR5K_SREV_UNKNOWNAR5K_SREV_UNKNOWN 0xffff ath5k.h 　
33329
 AR5K_SREV_AR5210AR5K_SREV_AR5210 0x00 ath5k.h Crete
33330
 AR5K_SREV_AR5311AR5K_SREV_AR5311 0x10 ath5k.h Maui 1
33331
 AR5K_SREV_AR5311AAR5K_SREV_AR5311A 0x20 ath5k.h Maui 2
33332
 AR5K_SREV_AR5311BAR5K_SREV_AR5311B 0x30 ath5k.h Spirit
33333
 AR5K_SREV_AR5211AR5K_SREV_AR5211 0x40 ath5k.h Oahu
33334
 AR5K_SREV_AR5212AR5K_SREV_AR5212 0x50 ath5k.h Venice
33335
 AR5K_SREV_AR5213AR5K_SREV_AR5213 0x55 ath5k.h ???
33336
 AR5K_SREV_AR5213AAR5K_SREV_AR5213A 0x59 ath5k.h Hainan
33337
 AR5K_SREV_AR2413AR5K_SREV_AR2413 0x78 ath5k.h Griffin lite
33338
 AR5K_SREV_AR2414AR5K_SREV_AR2414 0x70 ath5k.h Griffin
33339
 AR5K_SREV_AR5424AR5K_SREV_AR5424 0x90 ath5k.h Condor
33340
 AR5K_SREV_AR5413AR5K_SREV_AR5413 0xa4 ath5k.h Eagle lite
33341
 AR5K_SREV_AR5414AR5K_SREV_AR5414 0xa0 ath5k.h Eagle
33342
 AR5K_SREV_AR2415AR5K_SREV_AR2415 0xb0 ath5k.h Talon
33343
 AR5K_SREV_AR5416AR5K_SREV_AR5416 0xc0 ath5k.h PCI-E
33344
 AR5K_SREV_AR5418AR5K_SREV_AR5418 0xca ath5k.h PCI-E
33345
 AR5K_SREV_AR2425AR5K_SREV_AR2425 0xe0 ath5k.h Swan
33346
 AR5K_SREV_AR2417AR5K_SREV_AR2417 0xf0 ath5k.h Nala
33347
 AR5K_SREV_RAD_5110AR5K_SREV_RAD_5110 0x00 ath5k.h 　
33348
 AR5K_SREV_RAD_5111AR5K_SREV_RAD_5111 0x10 ath5k.h 　
33349
 AR5K_SREV_RAD_5111AAR5K_SREV_RAD_5111A 0x15 ath5k.h 　
33350
 AR5K_SREV_RAD_2111AR5K_SREV_RAD_2111 0x20 ath5k.h 　
33351
 AR5K_SREV_RAD_5112AR5K_SREV_RAD_5112 0x30 ath5k.h 　
33352
 AR5K_SREV_RAD_5112AAR5K_SREV_RAD_5112A 0x35 ath5k.h 　
33353
 AR5K_SREV_RAD_5112BAR5K_SREV_RAD_5112B 0x36 ath5k.h 　
33354
 AR5K_SREV_RAD_2112AR5K_SREV_RAD_2112 0x40 ath5k.h 　
33355
 AR5K_SREV_RAD_2112AAR5K_SREV_RAD_2112A 0x45 ath5k.h 　
33356
 AR5K_SREV_RAD_2112BAR5K_SREV_RAD_2112B 0x46 ath5k.h 　
33357
 AR5K_SREV_RAD_2413AR5K_SREV_RAD_2413 0x50 ath5k.h 　
33358
 AR5K_SREV_RAD_5413AR5K_SREV_RAD_5413 0x60 ath5k.h 　
33359
 AR5K_SREV_RAD_2316AR5K_SREV_RAD_2316 0x70 ath5k.h Cobra SoC
33360
 AR5K_SREV_RAD_2317AR5K_SREV_RAD_2317 0x80 ath5k.h 　
33361
 AR5K_SREV_RAD_5424AR5K_SREV_RAD_5424 0xa0 ath5k.h Mostly same as 5413
33362
 AR5K_SREV_RAD_2425AR5K_SREV_RAD_2425 0xa2 ath5k.h 　
33363
 AR5K_SREV_RAD_5133AR5K_SREV_RAD_5133 0xc0 ath5k.h 　
33364
 AR5K_SREV_PHY_5211AR5K_SREV_PHY_5211 0x30 ath5k.h 　
33365
 AR5K_SREV_PHY_5212AR5K_SREV_PHY_5212 0x41 ath5k.h 　
33366
 AR5K_SREV_PHY_5212AAR5K_SREV_PHY_5212A 0x42 ath5k.h 　
33367
 AR5K_SREV_PHY_5212BAR5K_SREV_PHY_5212B 0x43 ath5k.h 　
33368
 AR5K_SREV_PHY_2413AR5K_SREV_PHY_2413 0x45 ath5k.h 　
33369
 AR5K_SREV_PHY_5413AR5K_SREV_PHY_5413 0x61 ath5k.h 　
33370
 AR5K_SREV_PHY_2425AR5K_SREV_PHY_2425 0x70 ath5k.h 　
33371
 MODULATION_XRMODULATION_XR 0x00000200 ath5k.h 　
33372
 MODULATION_TURBOMODULATION_TURBO 0x00000080 ath5k.h 　
33373
 AR5K_TXSTAT_ALTRATEAR5K_TXSTAT_ALTRATE 0x80 ath5k.h 　
33374
 AR5K_TXERR_XRETRYAR5K_TXERR_XRETRY 0x01 ath5k.h 　
33375
 AR5K_TXERR_FILTAR5K_TXERR_FILT 0x02 ath5k.h 　
33376
 AR5K_TXERR_FIFOAR5K_TXERR_FIFO 0x04 ath5k.h 　
33377
 AR5K_TXQ_FLAG_TXOKINT_ENABLEAR5K_TXQ_FLAG_TXOKINT_ENABLE 0x0001 ath5k.h Enable TXOK interrupt
33378
 AR5K_TXQ_FLAG_TXERRINT_ENABLEAR5K_TXQ_FLAG_TXERRINT_ENABLE 0x0002 ath5k.h Enable TXERR interrupt
33379
 AR5K_TXQ_FLAG_TXEOLINT_ENABLEAR5K_TXQ_FLAG_TXEOLINT_ENABLE 0x0004 ath5k.h Enable TXEOL interrupt -not used-
33380
 AR5K_TXQ_FLAG_TXDESCINT_ENABLEAR5K_TXQ_FLAG_TXDESCINT_ENABLE 0x0008 ath5k.h Enable TXDESC interrupt -not used-
33381
 AR5K_TXQ_FLAG_TXURNINT_ENABLEAR5K_TXQ_FLAG_TXURNINT_ENABLE 0x0010 ath5k.h Enable TXURN interrupt
33382
 AR5K_TXQ_FLAG_CBRORNINT_ENABLEAR5K_TXQ_FLAG_CBRORNINT_ENABLE 0x0020 ath5k.h Enable CBRORN interrupt
33383
 AR5K_TXQ_FLAG_CBRURNINT_ENABLEAR5K_TXQ_FLAG_CBRURNINT_ENABLE 0x0040 ath5k.h Enable CBRURN interrupt
33384
 AR5K_TXQ_FLAG_QTRIGINT_ENABLEAR5K_TXQ_FLAG_QTRIGINT_ENABLE 0x0080 ath5k.h Enable QTRIG interrupt
33385
 AR5K_TXQ_FLAG_TXNOFRMINT_ENABLEAR5K_TXQ_FLAG_TXNOFRMINT_ENABLE 0x0100 ath5k.h Enable TXNOFRM interrupt
33386
 AR5K_TXQ_FLAG_BACKOFF_DISABLEAR5K_TXQ_FLAG_BACKOFF_DISABLE 0x0200 ath5k.h Disable random post-backoff
33387
 AR5K_TXQ_FLAG_RDYTIME_EXP_POLICAR5K_TXQ_FLAG_RDYTIME_EXP_POLIC 0x0300 ath5k.h Enable ready time expiry policy (?)
33388
 AR5K_TXQ_FLAG_FRAG_BURST_BACKOFAR5K_TXQ_FLAG_FRAG_BURST_BACKOF 0x0800 ath5k.h Enable backoff while bursting
33389
 AR5K_TXQ_FLAG_POST_FR_BKOFF_DISAR5K_TXQ_FLAG_POST_FR_BKOFF_DIS 0x1000 ath5k.h Disable backoff while bursting
33390
 AR5K_TXQ_FLAG_COMPRESSION_ENABLAR5K_TXQ_FLAG_COMPRESSION_ENABL 0x2000 ath5k.h Enable hw compression -not implemented-
33391
 AR5K_RXERR_CRCAR5K_RXERR_CRC 0x01 ath5k.h 　
33392
 AR5K_RXERR_PHYAR5K_RXERR_PHY 0x02 ath5k.h 　
33393
 AR5K_RXERR_FIFOAR5K_RXERR_FIFO 0x04 ath5k.h 　
33394
 AR5K_RXERR_DECRYPTAR5K_RXERR_DECRYPT 0x08 ath5k.h 　
33395
 AR5K_RXERR_MICAR5K_RXERR_MIC 0x10 ath5k.h 　
33396
 AR5K_RXKEYIX_INVALIDAR5K_RXKEYIX_INVALID ((u8) - 1) ath5k.h 　
33397
 AR5K_TXKEYIX_INVALIDAR5K_TXKEYIX_INVALID ((u32) - 1) ath5k.h 　
33398
 AR5K_SLOT_TIME_9AR5K_SLOT_TIME_9 396 ath5k.h 　
33399
 AR5K_SLOT_TIME_20AR5K_SLOT_TIME_20 880 ath5k.h 　
33400
 AR5K_SLOT_TIME_MAXAR5K_SLOT_TIME_MAX 0xffff ath5k.h 　
33401
 CHANNEL_CW_INTCHANNEL_CW_INT 0x0008 ath5k.h Contention Window interference detected
33402
 CHANNEL_TURBOCHANNEL_TURBO 0x0010 ath5k.h Turbo Channel
33403
 CHANNEL_CCKCHANNEL_CCK 0x0020 ath5k.h CCK channel
33404
 CHANNEL_OFDMCHANNEL_OFDM 0x0040 ath5k.h OFDM channel
33405
 CHANNEL_2GHZCHANNEL_2GHZ 0x0080 ath5k.h 2GHz channel.
33406
 CHANNEL_5GHZCHANNEL_5GHZ 0x0100 ath5k.h 5GHz channel
33407
 CHANNEL_PASSIVECHANNEL_PASSIVE 0x0200 ath5k.h Only passive scan allowed
33408
 CHANNEL_DYNCHANNEL_DYN 0x0400 ath5k.h Dynamic CCK-OFDM channel (for g operation)
33409
 CHANNEL_XRCHANNEL_XR 0x0800 ath5k.h XR channel
33410
 CHANNEL_ACHANNEL_A (CHANNEL_5GHZ|CHANNEL_OFDM) ath5k.h 　
33411
 CHANNEL_BCHANNEL_B (CHANNEL_2GHZ|CHANNEL_CCK) ath5k.h 　
33412
 CHANNEL_GCHANNEL_G (CHANNEL_2GHZ|CHANNEL_OFDM) ath5k.h 　
33413
 CHANNEL_TCHANNEL_T (CHANNEL_5GHZ|CHANNEL_OFDM|CHANNEL_TURBO) ath5k.h 　
33414
 CHANNEL_TGCHANNEL_TG (CHANNEL_2GHZ|CHANNEL_OFDM|CHANNEL_TURBO) ath5k.h 　
33415
 CHANNEL_108ACHANNEL_108A CHANNEL_T ath5k.h 　
33416
 CHANNEL_108GCHANNEL_108G CHANNEL_TG ath5k.h 　
33417
 CHANNEL_XCHANNEL_X (CHANNEL_5GHZ|CHANNEL_OFDM|CHANNEL_XR) ath5k.h 　
33418
 CHANNEL_ALLCHANNEL_ALL (CHANNEL_OFDM|CHANNEL_CCK|CHANNEL_2GHZ|CHANNEL_5GHZ| \ CHANNEL_TURBO) ath5k.h 　
33419
 CHANNEL_ALL_NOTURBOCHANNEL_ALL_NOTURBO (CHANNEL_ALL & ~CHANNEL_TURBO) ath5k.h 　
33420
 CHANNEL_MODESCHANNEL_MODES CHANNEL_ALL ath5k.h 　
33421
 AR5K_MAX_RATESAR5K_MAX_RATES 32 ath5k.h 　
33422
 ATH5K_RATE_CODE_1MATH5K_RATE_CODE_1M 0x1B ath5k.h 　
33423
 ATH5K_RATE_CODE_2MATH5K_RATE_CODE_2M 0x1A ath5k.h 　
33424
 ATH5K_RATE_CODE_5_5MATH5K_RATE_CODE_5_5M 0x19 ath5k.h 　
33425
 ATH5K_RATE_CODE_11MATH5K_RATE_CODE_11M 0x18 ath5k.h 　
33426
 ATH5K_RATE_CODE_6MATH5K_RATE_CODE_6M 0x0B ath5k.h 　
33427
 ATH5K_RATE_CODE_9MATH5K_RATE_CODE_9M 0x0F ath5k.h 　
33428
 ATH5K_RATE_CODE_12MATH5K_RATE_CODE_12M 0x0A ath5k.h 　
33429
 ATH5K_RATE_CODE_18MATH5K_RATE_CODE_18M 0x0E ath5k.h 　
33430
 ATH5K_RATE_CODE_24MATH5K_RATE_CODE_24M 0x09 ath5k.h 　
33431
 ATH5K_RATE_CODE_36MATH5K_RATE_CODE_36M 0x0D ath5k.h 　
33432
 ATH5K_RATE_CODE_48MATH5K_RATE_CODE_48M 0x08 ath5k.h 　
33433
 ATH5K_RATE_CODE_54MATH5K_RATE_CODE_54M 0x0C ath5k.h 　
33434
 ATH5K_RATE_CODE_XR_500KATH5K_RATE_CODE_XR_500K 0x07 ath5k.h 　
33435
 ATH5K_RATE_CODE_XR_1MATH5K_RATE_CODE_XR_1M 0x02 ath5k.h 　
33436
 ATH5K_RATE_CODE_XR_2MATH5K_RATE_CODE_XR_2M 0x06 ath5k.h 　
33437
 ATH5K_RATE_CODE_XR_3MATH5K_RATE_CODE_XR_3M 0x01 ath5k.h 　
33438
 AR5K_SET_SHORT_PREAMBLEAR5K_SET_SHORT_PREAMBLE 0x04 ath5k.h 　
33439
 AR5K_KEYCACHE_SIZEAR5K_KEYCACHE_SIZE 8 ath5k.h 　
33440
 AR5K_RSSI_EP_MULTIPLIERAR5K_RSSI_EP_MULTIPLIER (1<<7) ath5k.h 　
33441
 AR5K_SOFTLED_PINAR5K_SOFTLED_PIN 0 ath5k.h 　
33442
 AR5K_SOFTLED_ONAR5K_SOFTLED_ON 0 ath5k.h 　
33443
 AR5K_SOFTLED_OFFAR5K_SOFTLED_OFF 1 ath5k.h 　
33444
 AR5K_MAX_GPIOAR5K_MAX_GPIO 10 ath5k.h 　
33445
 AR5K_MAX_RF_BANKSAR5K_MAX_RF_BANKS 8 ath5k.h 　
33446
 ATH_RXBUFATH_RXBUF 16 base.h number of RX buffers
33447
 ATH_TXBUFATH_TXBUF 16 base.h number of TX buffers
33448
 ATH_CHAN_MAXATH_CHAN_MAX (26+26+26+200+200) base.h 　
33449
 ATH_CHAN_MAXATH_CHAN_MAX (14+14+14+252+20) base.h 　
33450
 AR5K_DESC_RX_CTL0AR5K_DESC_RX_CTL0 0x00000000 desc.h 　
33451
 AR5K_DESC_RX_CTL1_BUF_LENAR5K_DESC_RX_CTL1_BUF_LEN 0x00000fff desc.h 　
33452
 AR5K_DESC_RX_CTL1_INTREQAR5K_DESC_RX_CTL1_INTREQ 0x00002000 desc.h 　
33453
 AR5K_5210_RX_DESC_STATUS0_DATA_AR5K_5210_RX_DESC_STATUS0_DATA_ 0x00000fff desc.h 　
33454
 AR5K_5210_RX_DESC_STATUS0_MOREAR5K_5210_RX_DESC_STATUS0_MORE 0x00001000 desc.h 　
33455
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 0x00078000 desc.h 　
33456
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 15 desc.h 　
33457
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 0x07f80000 desc.h 　
33458
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 19 desc.h 　
33459
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 0x38000000 desc.h 　
33460
 AR5K_5210_RX_DESC_STATUS0_RECEIAR5K_5210_RX_DESC_STATUS0_RECEI 27 desc.h 　
33461
 AR5K_5210_RX_DESC_STATUS1_DONEAR5K_5210_RX_DESC_STATUS1_DONE 0x00000001 desc.h 　
33462
 AR5K_5210_RX_DESC_STATUS1_FRAMEAR5K_5210_RX_DESC_STATUS1_FRAME 0x00000002 desc.h 　
33463
 AR5K_5210_RX_DESC_STATUS1_CRC_EAR5K_5210_RX_DESC_STATUS1_CRC_E 0x00000004 desc.h 　
33464
 AR5K_5210_RX_DESC_STATUS1_FIFO_AR5K_5210_RX_DESC_STATUS1_FIFO_ 0x00000008 desc.h 　
33465
 AR5K_5210_RX_DESC_STATUS1_DECRYAR5K_5210_RX_DESC_STATUS1_DECRY 0x00000010 desc.h 　
33466
 AR5K_5210_RX_DESC_STATUS1_PHY_EAR5K_5210_RX_DESC_STATUS1_PHY_E 0x000000e0 desc.h 　
33467
 AR5K_5210_RX_DESC_STATUS1_PHY_EAR5K_5210_RX_DESC_STATUS1_PHY_E 5 desc.h 　
33468
 AR5K_5210_RX_DESC_STATUS1_KEY_IAR5K_5210_RX_DESC_STATUS1_KEY_I 0x00000100 desc.h 　
33469
 AR5K_5210_RX_DESC_STATUS1_KEY_IAR5K_5210_RX_DESC_STATUS1_KEY_I 0x00007e00 desc.h 　
33470
 AR5K_5210_RX_DESC_STATUS1_KEY_IAR5K_5210_RX_DESC_STATUS1_KEY_I 9 desc.h 　
33471
 AR5K_5210_RX_DESC_STATUS1_RECEIAR5K_5210_RX_DESC_STATUS1_RECEI 0x0fff8000 desc.h 　
33472
 AR5K_5210_RX_DESC_STATUS1_RECEIAR5K_5210_RX_DESC_STATUS1_RECEI 15 desc.h 　
33473
 AR5K_5210_RX_DESC_STATUS1_KEY_CAR5K_5210_RX_DESC_STATUS1_KEY_C 0x10000000 desc.h 　
33474
 AR5K_5212_RX_DESC_STATUS0_DATA_AR5K_5212_RX_DESC_STATUS0_DATA_ 0x00000fff desc.h 　
33475
 AR5K_5212_RX_DESC_STATUS0_MOREAR5K_5212_RX_DESC_STATUS0_MORE 0x00001000 desc.h 　
33476
 AR5K_5212_RX_DESC_STATUS0_DECOMAR5K_5212_RX_DESC_STATUS0_DECOM 0x00002000 desc.h 　
33477
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 0x000f8000 desc.h 　
33478
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 15 desc.h 　
33479
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 0x0ff00000 desc.h 　
33480
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 20 desc.h 　
33481
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 0xf0000000 desc.h 　
33482
 AR5K_5212_RX_DESC_STATUS0_RECEIAR5K_5212_RX_DESC_STATUS0_RECEI 28 desc.h 　
33483
 AR5K_5212_RX_DESC_STATUS1_DONEAR5K_5212_RX_DESC_STATUS1_DONE 0x00000001 desc.h 　
33484
 AR5K_5212_RX_DESC_STATUS1_FRAMEAR5K_5212_RX_DESC_STATUS1_FRAME 0x00000002 desc.h 　
33485
 AR5K_5212_RX_DESC_STATUS1_CRC_EAR5K_5212_RX_DESC_STATUS1_CRC_E 0x00000004 desc.h 　
33486
 AR5K_5212_RX_DESC_STATUS1_DECRYAR5K_5212_RX_DESC_STATUS1_DECRY 0x00000008 desc.h 　
33487
 AR5K_5212_RX_DESC_STATUS1_PHY_EAR5K_5212_RX_DESC_STATUS1_PHY_E 0x00000010 desc.h 　
33488
 AR5K_5212_RX_DESC_STATUS1_MIC_EAR5K_5212_RX_DESC_STATUS1_MIC_E 0x00000020 desc.h 　
33489
 AR5K_5212_RX_DESC_STATUS1_KEY_IAR5K_5212_RX_DESC_STATUS1_KEY_I 0x00000100 desc.h 　
33490
 AR5K_5212_RX_DESC_STATUS1_KEY_IAR5K_5212_RX_DESC_STATUS1_KEY_I 0x0000fe00 desc.h 　
33491
 AR5K_5212_RX_DESC_STATUS1_KEY_IAR5K_5212_RX_DESC_STATUS1_KEY_I 9 desc.h 　
33492
 AR5K_5212_RX_DESC_STATUS1_RECEIAR5K_5212_RX_DESC_STATUS1_RECEI 0x7fff0000 desc.h 　
33493
 AR5K_5212_RX_DESC_STATUS1_RECEIAR5K_5212_RX_DESC_STATUS1_RECEI 16 desc.h 　
33494
 AR5K_5212_RX_DESC_STATUS1_KEY_CAR5K_5212_RX_DESC_STATUS1_KEY_C 0x80000000 desc.h 　
33495
 AR5K_RX_DESC_ERROR0AR5K_RX_DESC_ERROR0 0x00000000 desc.h 　
33496
 AR5K_RX_DESC_ERROR1_PHY_ERROR_CAR5K_RX_DESC_ERROR1_PHY_ERROR_C 0x0000ff00 desc.h 　
33497
 AR5K_RX_DESC_ERROR1_PHY_ERROR_CAR5K_RX_DESC_ERROR1_PHY_ERROR_C 8 desc.h 　
33498
 AR5K_DESC_RX_PHY_ERROR_NONEAR5K_DESC_RX_PHY_ERROR_NONE 0x00 desc.h 　
33499
 AR5K_DESC_RX_PHY_ERROR_TIMINGAR5K_DESC_RX_PHY_ERROR_TIMING 0x20 desc.h 　
33500
 AR5K_DESC_RX_PHY_ERROR_PARITYAR5K_DESC_RX_PHY_ERROR_PARITY 0x40 desc.h 　
33501
 AR5K_DESC_RX_PHY_ERROR_RATEAR5K_DESC_RX_PHY_ERROR_RATE 0x60 desc.h 　
33502
 AR5K_DESC_RX_PHY_ERROR_LENGTHAR5K_DESC_RX_PHY_ERROR_LENGTH 0x80 desc.h 　
33503
 AR5K_DESC_RX_PHY_ERROR_64QAMAR5K_DESC_RX_PHY_ERROR_64QAM 0xa0 desc.h 　
33504
 AR5K_DESC_RX_PHY_ERROR_SERVICEAR5K_DESC_RX_PHY_ERROR_SERVICE 0xc0 desc.h 　
33505
 AR5K_DESC_RX_PHY_ERROR_TRANSMITAR5K_DESC_RX_PHY_ERROR_TRANSMIT 0xe0 desc.h 　
33506
 AR5K_2W_TX_DESC_CTL0_FRAME_LENAR5K_2W_TX_DESC_CTL0_FRAME_LEN 0x00000fff desc.h 　
33507
 AR5K_2W_TX_DESC_CTL0_HEADER_LENAR5K_2W_TX_DESC_CTL0_HEADER_LEN 0x0003f000 desc.h [5210 ?]
33508
 AR5K_2W_TX_DESC_CTL0_HEADER_LENAR5K_2W_TX_DESC_CTL0_HEADER_LEN 12 desc.h 　
33509
 AR5K_2W_TX_DESC_CTL0_XMIT_RATEAR5K_2W_TX_DESC_CTL0_XMIT_RATE 0x003c0000 desc.h 　
33510
 AR5K_2W_TX_DESC_CTL0_XMIT_RATE_AR5K_2W_TX_DESC_CTL0_XMIT_RATE_ 18 desc.h 　
33511
 AR5K_2W_TX_DESC_CTL0_RTSENAAR5K_2W_TX_DESC_CTL0_RTSENA 0x00400000 desc.h 　
33512
 AR5K_2W_TX_DESC_CTL0_CLRDMASKAR5K_2W_TX_DESC_CTL0_CLRDMASK 0x01000000 desc.h 　
33513
 AR5K_2W_TX_DESC_CTL0_LONG_PACKEAR5K_2W_TX_DESC_CTL0_LONG_PACKE 0x00800000 desc.h [5210]
33514
 AR5K_2W_TX_DESC_CTL0_VEOLAR5K_2W_TX_DESC_CTL0_VEOL 0x00800000 desc.h [5211]
33515
 AR5K_2W_TX_DESC_CTL0_FRAME_TYPEAR5K_2W_TX_DESC_CTL0_FRAME_TYPE 0x1c000000 desc.h [5210]
33516
 AR5K_2W_TX_DESC_CTL0_FRAME_TYPEAR5K_2W_TX_DESC_CTL0_FRAME_TYPE 26 desc.h 　
33517
 AR5K_2W_TX_DESC_CTL0_ANT_MODE_XAR5K_2W_TX_DESC_CTL0_ANT_MODE_X 0x02000000 desc.h 　
33518
 AR5K_2W_TX_DESC_CTL0_ANT_MODE_XAR5K_2W_TX_DESC_CTL0_ANT_MODE_X 0x1e000000 desc.h 　
33519
 AR5K_2W_TX_DESC_CTL0_ANT_MODE_XAR5K_2W_TX_DESC_CTL0_ANT_MODE_X (ah->ah_version == AR5K_AR5210 ? \ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5210 : \ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5211) desc.h 　
33520
 AR5K_2W_TX_DESC_CTL0_ANT_MODE_XAR5K_2W_TX_DESC_CTL0_ANT_MODE_X 25 desc.h 　
33521
 AR5K_2W_TX_DESC_CTL0_INTREQAR5K_2W_TX_DESC_CTL0_INTREQ 0x20000000 desc.h 　
33522
 AR5K_2W_TX_DESC_CTL0_ENCRYPT_KEAR5K_2W_TX_DESC_CTL0_ENCRYPT_KE 0x40000000 desc.h 　
33523
 AR5K_2W_TX_DESC_CTL1_BUF_LENAR5K_2W_TX_DESC_CTL1_BUF_LEN 0x00000fff desc.h 　
33524
 AR5K_2W_TX_DESC_CTL1_MOREAR5K_2W_TX_DESC_CTL1_MORE 0x00001000 desc.h 　
33525
 AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE 0x0007e000 desc.h 　
33526
 AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE 0x000fe000 desc.h 　
33527
 AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE (ah->ah_version == AR5K_AR5210 ? \ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5210 : \ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_52 desc.h 　
33528
 AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE 13 desc.h 　
33529
 AR5K_2W_TX_DESC_CTL1_FRAME_TYPEAR5K_2W_TX_DESC_CTL1_FRAME_TYPE 0x00700000 desc.h [5211]
33530
 AR5K_2W_TX_DESC_CTL1_FRAME_TYPEAR5K_2W_TX_DESC_CTL1_FRAME_TYPE 20 desc.h 　
33531
 AR5K_2W_TX_DESC_CTL1_NOACKAR5K_2W_TX_DESC_CTL1_NOACK 0x00800000 desc.h [5211]
33532
 AR5K_2W_TX_DESC_CTL1_RTS_DURATIAR5K_2W_TX_DESC_CTL1_RTS_DURATI 0xfff80000 desc.h [5210 ?]
33533
 AR5K_AR5210_TX_DESC_FRAME_TYPE_AR5K_AR5210_TX_DESC_FRAME_TYPE_ 0x00 desc.h 　
33534
 AR5K_AR5210_TX_DESC_FRAME_TYPE_AR5K_AR5210_TX_DESC_FRAME_TYPE_ 0x04 desc.h 　
33535
 AR5K_AR5210_TX_DESC_FRAME_TYPE_AR5K_AR5210_TX_DESC_FRAME_TYPE_ 0x08 desc.h 　
33536
 AR5K_AR5210_TX_DESC_FRAME_TYPE_AR5K_AR5210_TX_DESC_FRAME_TYPE_ 0x0c desc.h 　
33537
 AR5K_AR5210_TX_DESC_FRAME_TYPE_AR5K_AR5210_TX_DESC_FRAME_TYPE_ 0x10 desc.h 　
33538
 AR5K_DESC_TX_STATUS0_FRAME_XMITAR5K_DESC_TX_STATUS0_FRAME_XMIT 0x00000001 desc.h 　
33539
 AR5K_DESC_TX_STATUS0_EXCESSIVE_AR5K_DESC_TX_STATUS0_EXCESSIVE_ 0x00000002 desc.h 　
33540
 AR5K_DESC_TX_STATUS0_FIFO_UNDERAR5K_DESC_TX_STATUS0_FIFO_UNDER 0x00000004 desc.h 　
33541
 AR5K_DESC_TX_STATUS0_FILTEREDAR5K_DESC_TX_STATUS0_FILTERED 0x00000008 desc.h 　
33542
 AR5K_DESC_TX_STATUS0_SHORT_RETRAR5K_DESC_TX_STATUS0_SHORT_RETR 0x000000f0 desc.h 　
33543
 AR5K_DESC_TX_STATUS0_SHORT_RETRAR5K_DESC_TX_STATUS0_SHORT_RETR 4 desc.h 　
33544
 AR5K_DESC_TX_STATUS0_LONG_RETRYAR5K_DESC_TX_STATUS0_LONG_RETRY 0x00000f00 desc.h 　
33545
 AR5K_DESC_TX_STATUS0_LONG_RETRYAR5K_DESC_TX_STATUS0_LONG_RETRY 8 desc.h 　
33546
 AR5K_DESC_TX_STATUS0_VIRT_COLL_AR5K_DESC_TX_STATUS0_VIRT_COLL_ 0x0000f000 desc.h 　
33547
 AR5K_DESC_TX_STATUS0_VIRT_COLL_AR5K_DESC_TX_STATUS0_VIRT_COLL_ 12 desc.h 　
33548
 AR5K_DESC_TX_STATUS0_SEND_TIMESAR5K_DESC_TX_STATUS0_SEND_TIMES 0xffff0000 desc.h 　
33549
 AR5K_DESC_TX_STATUS0_SEND_TIMESAR5K_DESC_TX_STATUS0_SEND_TIMES 16 desc.h 　
33550
 AR5K_DESC_TX_STATUS1_DONEAR5K_DESC_TX_STATUS1_DONE 0x00000001 desc.h 　
33551
 AR5K_DESC_TX_STATUS1_SEQ_NUMAR5K_DESC_TX_STATUS1_SEQ_NUM 0x00001ffe desc.h 　
33552
 AR5K_DESC_TX_STATUS1_SEQ_NUM_SAR5K_DESC_TX_STATUS1_SEQ_NUM_S 1 desc.h 　
33553
 AR5K_DESC_TX_STATUS1_ACK_SIG_STAR5K_DESC_TX_STATUS1_ACK_SIG_ST 0x001fe000 desc.h 　
33554
 AR5K_DESC_TX_STATUS1_ACK_SIG_STAR5K_DESC_TX_STATUS1_ACK_SIG_ST 13 desc.h 　
33555
 AR5K_DESC_TX_STATUS1_FINAL_TS_IAR5K_DESC_TX_STATUS1_FINAL_TS_I 0x00600000 desc.h 　
33556
 AR5K_DESC_TX_STATUS1_FINAL_TS_IAR5K_DESC_TX_STATUS1_FINAL_TS_I 21 desc.h 　
33557
 AR5K_DESC_TX_STATUS1_COMP_SUCCEAR5K_DESC_TX_STATUS1_COMP_SUCCE 0x00800000 desc.h 　
33558
 AR5K_DESC_TX_STATUS1_XMIT_ANTENAR5K_DESC_TX_STATUS1_XMIT_ANTEN 0x01000000 desc.h 　
33559
 AR5K_RXDESC_INTREQAR5K_RXDESC_INTREQ 0x0020 desc.h 　
33560
 AR5K_TXDESC_CLRDMASKAR5K_TXDESC_CLRDMASK 0x0001 desc.h 　
33561
 AR5K_TXDESC_NOACKAR5K_TXDESC_NOACK 0x0002 desc.h [5211+]
33562
 AR5K_TXDESC_RTSENAAR5K_TXDESC_RTSENA 0x0004 desc.h 　
33563
 AR5K_TXDESC_CTSENAAR5K_TXDESC_CTSENA 0x0008 desc.h 　
33564
 AR5K_TXDESC_INTREQAR5K_TXDESC_INTREQ 0x0010 desc.h 　
33565
 AR5K_TXDESC_VEOLAR5K_TXDESC_VEOL 0x0020 desc.h [5211+]
33566
 AR5K_EEPROM_MAGICAR5K_EEPROM_MAGIC 0x003d eeprom.h EEPROM Magic number
33567
 AR5K_EEPROM_MAGIC_VALUEAR5K_EEPROM_MAGIC_VALUE 0x5aa5 eeprom.h Default - found on EEPROM
33568
 AR5K_EEPROM_MAGIC_5212AR5K_EEPROM_MAGIC_5212 0x0000145c eeprom.h 5212
33569
 AR5K_EEPROM_MAGIC_5211AR5K_EEPROM_MAGIC_5211 0x0000145b eeprom.h 5211
33570
 AR5K_EEPROM_MAGIC_5210AR5K_EEPROM_MAGIC_5210 0x0000145a eeprom.h 5210
33571
 AR5K_EEPROM_IS_HB63AR5K_EEPROM_IS_HB63 0x000b eeprom.h Talon detect
33572
 AR5K_EEPROM_RFKILLAR5K_EEPROM_RFKILL 0x0f eeprom.h 　
33573
 AR5K_EEPROM_RFKILL_GPIO_SELAR5K_EEPROM_RFKILL_GPIO_SEL 0x0000001c eeprom.h 　
33574
 AR5K_EEPROM_RFKILL_GPIO_SEL_SAR5K_EEPROM_RFKILL_GPIO_SEL_S 2 eeprom.h 　
33575
 AR5K_EEPROM_RFKILL_POLARITYAR5K_EEPROM_RFKILL_POLARITY 0x00000002 eeprom.h 　
33576
 AR5K_EEPROM_RFKILL_POLARITY_SAR5K_EEPROM_RFKILL_POLARITY_S 1 eeprom.h 　
33577
 AR5K_EEPROM_REG_DOMAINAR5K_EEPROM_REG_DOMAIN 0x00bf eeprom.h EEPROM regdom
33578
 AR5K_EEPROM_CHECKSUMAR5K_EEPROM_CHECKSUM 0x00c0 eeprom.h EEPROM checksum
33579
 AR5K_EEPROM_INFO_BASEAR5K_EEPROM_INFO_BASE 0x00c0 eeprom.h EEPROM header
33580
 AR5K_EEPROM_INFO_MAXAR5K_EEPROM_INFO_MAX (0x400 - AR5K_EEPROM_INFO_BASE) eeprom.h 　
33581
 AR5K_EEPROM_INFO_CKSUMAR5K_EEPROM_INFO_CKSUM 0xffff eeprom.h 　
33582
 AR5K_EEPROM_VERSIONAR5K_EEPROM_VERSION AR5K_EEPROM_INFO(1) eeprom.h EEPROM Version
33583
 AR5K_EEPROM_VERSION_3_0AR5K_EEPROM_VERSION_3_0 0x3000 eeprom.h No idea what's going on before this version
33584
 AR5K_EEPROM_VERSION_3_1AR5K_EEPROM_VERSION_3_1 0x3001 eeprom.h ob/db values for 2Ghz (ar5211_rfregs)
33585
 AR5K_EEPROM_VERSION_3_2AR5K_EEPROM_VERSION_3_2 0x3002 eeprom.h different frequency representation (eeprom_bin2freq)
33586
 AR5K_EEPROM_VERSION_3_3AR5K_EEPROM_VERSION_3_3 0x3003 eeprom.h offsets changed, has 32 CTLs (see below) and ee_false_detect (eeprom_read_modes)
33587
 AR5K_EEPROM_VERSION_3_4AR5K_EEPROM_VERSION_3_4 0x3004 eeprom.h has ee_i_gain, ee_cck_ofdm_power_delta (eeprom_read_modes)
33588
 AR5K_EEPROM_VERSION_4_0AR5K_EEPROM_VERSION_4_0 0x4000 eeprom.h has ee_misc, ee_cal_pier, ee_turbo_max_power and ee_xr_power (eeprom_init)
33589
 AR5K_EEPROM_VERSION_4_1AR5K_EEPROM_VERSION_4_1 0x4001 eeprom.h has ee_margin_tx_rx (eeprom_init)
33590
 AR5K_EEPROM_VERSION_4_2AR5K_EEPROM_VERSION_4_2 0x4002 eeprom.h has ee_cck_ofdm_gain_delta (eeprom_init)
33591
 AR5K_EEPROM_VERSION_4_3AR5K_EEPROM_VERSION_4_3 0x4003 eeprom.h power calibration changes
33592
 AR5K_EEPROM_VERSION_4_4AR5K_EEPROM_VERSION_4_4 0x4004 eeprom.h 　
33593
 AR5K_EEPROM_VERSION_4_5AR5K_EEPROM_VERSION_4_5 0x4005 eeprom.h 　
33594
 AR5K_EEPROM_VERSION_4_6AR5K_EEPROM_VERSION_4_6 0x4006 eeprom.h has ee_scaled_cck_delta
33595
 AR5K_EEPROM_VERSION_4_7AR5K_EEPROM_VERSION_4_7 0x3007 eeprom.h 4007 ?
33596
 AR5K_EEPROM_VERSION_4_9AR5K_EEPROM_VERSION_4_9 0x4009 eeprom.h EAR futureproofing
33597
 AR5K_EEPROM_VERSION_5_0AR5K_EEPROM_VERSION_5_0 0x5000 eeprom.h Has 2413 PDADC calibration etc
33598
 AR5K_EEPROM_VERSION_5_1AR5K_EEPROM_VERSION_5_1 0x5001 eeprom.h Has capability values
33599
 AR5K_EEPROM_VERSION_5_3AR5K_EEPROM_VERSION_5_3 0x5003 eeprom.h Has spur mitigation tables
33600
 AR5K_EEPROM_MODE_11AAR5K_EEPROM_MODE_11A 0 eeprom.h 　
33601
 AR5K_EEPROM_MODE_11BAR5K_EEPROM_MODE_11B 1 eeprom.h 　
33602
 AR5K_EEPROM_MODE_11GAR5K_EEPROM_MODE_11G 2 eeprom.h 　
33603
 AR5K_EEPROM_HDRAR5K_EEPROM_HDR AR5K_EEPROM_INFO(2) eeprom.h Header that contains the device caps
33604
 AR5K_EEPROM_RFKILL_GPIO_SELAR5K_EEPROM_RFKILL_GPIO_SEL 0x0000001c eeprom.h 　
33605
 AR5K_EEPROM_RFKILL_GPIO_SEL_SAR5K_EEPROM_RFKILL_GPIO_SEL_S 2 eeprom.h 　
33606
 AR5K_EEPROM_RFKILL_POLARITYAR5K_EEPROM_RFKILL_POLARITY 0x00000002 eeprom.h 　
33607
 AR5K_EEPROM_RFKILL_POLARITY_SAR5K_EEPROM_RFKILL_POLARITY_S 1 eeprom.h 　
33608
 AR5K_EEPROM_MISC0AR5K_EEPROM_MISC0 AR5K_EEPROM_INFO(4) eeprom.h 　
33609
 AR5K_EEPROM_MISC1AR5K_EEPROM_MISC1 AR5K_EEPROM_INFO(5) eeprom.h 　
33610
 AR5K_EEPROM_MISC2AR5K_EEPROM_MISC2 AR5K_EEPROM_INFO(6) eeprom.h 　
33611
 AR5K_EEPROM_MISC3AR5K_EEPROM_MISC3 AR5K_EEPROM_INFO(7) eeprom.h 　
33612
 AR5K_EEPROM_MISC4AR5K_EEPROM_MISC4 AR5K_EEPROM_INFO(8) eeprom.h 　
33613
 AR5K_EEPROM_MISC5AR5K_EEPROM_MISC5 AR5K_EEPROM_INFO(9) eeprom.h 　
33614
 AR5K_EEPROM_MISC6AR5K_EEPROM_MISC6 AR5K_EEPROM_INFO(10) eeprom.h 　
33615
 AR5K_EEPROM_TX_CHAIN_DISAR5K_EEPROM_TX_CHAIN_DIS ((_v) & 0x8) eeprom.h 　
33616
 AR5K_EEPROM_RX_CHAIN_DISAR5K_EEPROM_RX_CHAIN_DIS (((_v) >> 3) & 0x8) eeprom.h 　
33617
 AR5K_EEPROM_FCC_MID_ENAR5K_EEPROM_FCC_MID_EN (((_v) >> 6) & 0x1) eeprom.h 　
33618
 AR5K_EEPROM_JAP_U1EVEN_ENAR5K_EEPROM_JAP_U1EVEN_EN (((_v) >> 7) & 0x1) eeprom.h 　
33619
 AR5K_EEPROM_JAP_U2_ENAR5K_EEPROM_JAP_U2_EN (((_v) >> 8) & 0x1) eeprom.h 　
33620
 AR5K_EEPROM_JAP_U1ODD_ENAR5K_EEPROM_JAP_U1ODD_EN (((_v) >> 9) & 0x1) eeprom.h 　
33621
 AR5K_EEPROM_JAP_11A_NEW_ENAR5K_EEPROM_JAP_11A_NEW_EN (((_v) >> 10) & 0x1) eeprom.h 　
33622
 AR5K_EEPROM_GROUP1_OFFSETAR5K_EEPROM_GROUP1_OFFSET 0x0 eeprom.h 　
33623
 AR5K_EEPROM_GROUP2_OFFSETAR5K_EEPROM_GROUP2_OFFSET 0x5 eeprom.h 　
33624
 AR5K_EEPROM_GROUP3_OFFSETAR5K_EEPROM_GROUP3_OFFSET 0x37 eeprom.h 　
33625
 AR5K_EEPROM_GROUP4_OFFSETAR5K_EEPROM_GROUP4_OFFSET 0x46 eeprom.h 　
33626
 AR5K_EEPROM_GROUP5_OFFSETAR5K_EEPROM_GROUP5_OFFSET 0x55 eeprom.h 　
33627
 AR5K_EEPROM_GROUP6_OFFSETAR5K_EEPROM_GROUP6_OFFSET 0x65 eeprom.h 　
33628
 AR5K_EEPROM_GROUP7_OFFSETAR5K_EEPROM_GROUP7_OFFSET 0x69 eeprom.h 　
33629
 AR5K_EEPROM_GROUP8_OFFSETAR5K_EEPROM_GROUP8_OFFSET 0x6f eeprom.h 　
33630
 AR5K_EEPROM_OBDB0_2GHZAR5K_EEPROM_OBDB0_2GHZ 0x00ec eeprom.h 　
33631
 AR5K_EEPROM_OBDB1_2GHZAR5K_EEPROM_OBDB1_2GHZ 0x00ed eeprom.h 　
33632
 AR5K_EEPROM_PROTECTAR5K_EEPROM_PROTECT 0x003f eeprom.h EEPROM protect status
33633
 AR5K_EEPROM_PROTECT_RD_0_31AR5K_EEPROM_PROTECT_RD_0_31 0x0001 eeprom.h Read protection bit for offsets 0x0 - 0x1f
33634
 AR5K_EEPROM_PROTECT_WR_0_31AR5K_EEPROM_PROTECT_WR_0_31 0x0002 eeprom.h Write protection bit for offsets 0x0 - 0x1f
33635
 AR5K_EEPROM_PROTECT_RD_32_63AR5K_EEPROM_PROTECT_RD_32_63 0x0004 eeprom.h 0x20 - 0x3f
33636
 AR5K_EEPROM_PROTECT_WR_32_63AR5K_EEPROM_PROTECT_WR_32_63 0x0008 eeprom.h 　
33637
 AR5K_EEPROM_PROTECT_RD_64_127AR5K_EEPROM_PROTECT_RD_64_127 0x0010 eeprom.h 0x40 - 0x7f
33638
 AR5K_EEPROM_PROTECT_WR_64_127AR5K_EEPROM_PROTECT_WR_64_127 0x0020 eeprom.h 　
33639
 AR5K_EEPROM_PROTECT_RD_128_191AR5K_EEPROM_PROTECT_RD_128_191 0x0040 eeprom.h 0x80 - 0xbf (regdom)
33640
 AR5K_EEPROM_PROTECT_WR_128_191AR5K_EEPROM_PROTECT_WR_128_191 0x0080 eeprom.h 　
33641
 AR5K_EEPROM_PROTECT_RD_192_207AR5K_EEPROM_PROTECT_RD_192_207 0x0100 eeprom.h 0xc0 - 0xcf
33642
 AR5K_EEPROM_PROTECT_WR_192_207AR5K_EEPROM_PROTECT_WR_192_207 0x0200 eeprom.h 　
33643
 AR5K_EEPROM_PROTECT_RD_208_223AR5K_EEPROM_PROTECT_RD_208_223 0x0400 eeprom.h 0xd0 - 0xdf
33644
 AR5K_EEPROM_PROTECT_WR_208_223AR5K_EEPROM_PROTECT_WR_208_223 0x0800 eeprom.h 　
33645
 AR5K_EEPROM_PROTECT_RD_224_239AR5K_EEPROM_PROTECT_RD_224_239 0x1000 eeprom.h 0xe0 - 0xef
33646
 AR5K_EEPROM_PROTECT_WR_224_239AR5K_EEPROM_PROTECT_WR_224_239 0x2000 eeprom.h 　
33647
 AR5K_EEPROM_PROTECT_RD_240_255AR5K_EEPROM_PROTECT_RD_240_255 0x4000 eeprom.h 0xf0 - 0xff
33648
 AR5K_EEPROM_PROTECT_WR_240_255AR5K_EEPROM_PROTECT_WR_240_255 0x8000 eeprom.h 　
33649
 AR5K_EEPROM_EEP_SCALEAR5K_EEPROM_EEP_SCALE 100 eeprom.h 　
33650
 AR5K_EEPROM_EEP_DELTAAR5K_EEPROM_EEP_DELTA 10 eeprom.h 　
33651
 AR5K_EEPROM_N_MODESAR5K_EEPROM_N_MODES 3 eeprom.h 　
33652
 AR5K_EEPROM_N_5GHZ_CHANAR5K_EEPROM_N_5GHZ_CHAN 10 eeprom.h 　
33653
 AR5K_EEPROM_N_2GHZ_CHANAR5K_EEPROM_N_2GHZ_CHAN 3 eeprom.h 　
33654
 AR5K_EEPROM_N_2GHZ_CHAN_2413AR5K_EEPROM_N_2GHZ_CHAN_2413 4 eeprom.h 　
33655
 AR5K_EEPROM_N_2GHZ_CHAN_MAXAR5K_EEPROM_N_2GHZ_CHAN_MAX 4 eeprom.h 　
33656
 AR5K_EEPROM_MAX_CHANAR5K_EEPROM_MAX_CHAN 10 eeprom.h 　
33657
 AR5K_EEPROM_N_PWR_POINTS_5111AR5K_EEPROM_N_PWR_POINTS_5111 11 eeprom.h 　
33658
 AR5K_EEPROM_N_PCDACAR5K_EEPROM_N_PCDAC 11 eeprom.h 　
33659
 AR5K_EEPROM_N_PHASE_CALAR5K_EEPROM_N_PHASE_CAL 5 eeprom.h 　
33660
 AR5K_EEPROM_N_TEST_FREQAR5K_EEPROM_N_TEST_FREQ 8 eeprom.h 　
33661
 AR5K_EEPROM_N_EDGESAR5K_EEPROM_N_EDGES 8 eeprom.h 　
33662
 AR5K_EEPROM_N_INTERCEPTSAR5K_EEPROM_N_INTERCEPTS 11 eeprom.h 　
33663
 AR5K_EEPROM_PCDAC_MAR5K_EEPROM_PCDAC_M 0x3f eeprom.h 　
33664
 AR5K_EEPROM_PCDAC_STARTAR5K_EEPROM_PCDAC_START 1 eeprom.h 　
33665
 AR5K_EEPROM_PCDAC_STOPAR5K_EEPROM_PCDAC_STOP 63 eeprom.h 　
33666
 AR5K_EEPROM_PCDAC_STEPAR5K_EEPROM_PCDAC_STEP 1 eeprom.h 　
33667
 AR5K_EEPROM_NON_EDGE_MAR5K_EEPROM_NON_EDGE_M 0x40 eeprom.h 　
33668
 AR5K_EEPROM_CHANNEL_POWERAR5K_EEPROM_CHANNEL_POWER 8 eeprom.h 　
33669
 AR5K_EEPROM_N_OBDBAR5K_EEPROM_N_OBDB 4 eeprom.h 　
33670
 AR5K_EEPROM_OBDB_DISAR5K_EEPROM_OBDB_DIS 0xffff eeprom.h 　
33671
 AR5K_EEPROM_CHANNEL_DISAR5K_EEPROM_CHANNEL_DIS 0xff eeprom.h 　
33672
 AR5K_EEPROM_MAX_CTLSAR5K_EEPROM_MAX_CTLS 32 eeprom.h 　
33673
 AR5K_EEPROM_N_PD_CURVESAR5K_EEPROM_N_PD_CURVES 4 eeprom.h 　
33674
 AR5K_EEPROM_N_XPD0_POINTSAR5K_EEPROM_N_XPD0_POINTS 4 eeprom.h 　
33675
 AR5K_EEPROM_N_XPD3_POINTSAR5K_EEPROM_N_XPD3_POINTS 3 eeprom.h 　
33676
 AR5K_EEPROM_N_PD_GAINSAR5K_EEPROM_N_PD_GAINS 4 eeprom.h 　
33677
 AR5K_EEPROM_N_PD_POINTSAR5K_EEPROM_N_PD_POINTS 5 eeprom.h 　
33678
 AR5K_EEPROM_N_INTERCEPT_10_2GHZAR5K_EEPROM_N_INTERCEPT_10_2GHZ 35 eeprom.h 　
33679
 AR5K_EEPROM_N_INTERCEPT_10_5GHZAR5K_EEPROM_N_INTERCEPT_10_5GHZ 55 eeprom.h 　
33680
 AR5K_EEPROM_POWER_MAR5K_EEPROM_POWER_M 0x3f eeprom.h 　
33681
 AR5K_EEPROM_POWER_MINAR5K_EEPROM_POWER_MIN 0 eeprom.h 　
33682
 AR5K_EEPROM_POWER_MAXAR5K_EEPROM_POWER_MAX 3150 eeprom.h 　
33683
 AR5K_EEPROM_POWER_STEPAR5K_EEPROM_POWER_STEP 50 eeprom.h 　
33684
 AR5K_EEPROM_POWER_TABLE_SIZEAR5K_EEPROM_POWER_TABLE_SIZE 64 eeprom.h 　
33685
 AR5K_EEPROM_N_POWER_LOC_11BAR5K_EEPROM_N_POWER_LOC_11B 4 eeprom.h 　
33686
 AR5K_EEPROM_N_POWER_LOC_11GAR5K_EEPROM_N_POWER_LOC_11G 6 eeprom.h 　
33687
 AR5K_EEPROM_I_GAINAR5K_EEPROM_I_GAIN 10 eeprom.h 　
33688
 AR5K_EEPROM_CCK_OFDM_DELTAAR5K_EEPROM_CCK_OFDM_DELTA 15 eeprom.h 　
33689
 AR5K_EEPROM_N_IQ_CALAR5K_EEPROM_N_IQ_CAL 2 eeprom.h 　
33690
 AR5K_CTL_FCCAR5K_CTL_FCC 0x10 eeprom.h 　
33691
 AR5K_CTL_CUSTOMAR5K_CTL_CUSTOM 0x20 eeprom.h 　
33692
 AR5K_CTL_ETSIAR5K_CTL_ETSI 0x30 eeprom.h 　
33693
 AR5K_CTL_MKKAR5K_CTL_MKK 0x40 eeprom.h 　
33694
 AR5K_CTL_NO_REGDOMAINAR5K_CTL_NO_REGDOMAIN 0xf0 eeprom.h 　
33695
 AR5K_CTL_NO_CTLAR5K_CTL_NO_CTL 0xff eeprom.h 　
33696
 AR5K_NOQCU_TXDP0AR5K_NOQCU_TXDP0 0x0000 reg.h Queue 0 - data
33697
 AR5K_NOQCU_TXDP1AR5K_NOQCU_TXDP1 0x0004 reg.h Queue 1 - beacons
33698
 AR5K_CRAR5K_CR 0x0008 reg.h Register Address
33699
 AR5K_CR_TXE0AR5K_CR_TXE0 0x00000001 reg.h TX Enable for queue 0 on 5210
33700
 AR5K_CR_TXE1AR5K_CR_TXE1 0x00000002 reg.h TX Enable for queue 1 on 5210
33701
 AR5K_CR_RXEAR5K_CR_RXE 0x00000004 reg.h RX Enable
33702
 AR5K_CR_TXD0AR5K_CR_TXD0 0x00000008 reg.h TX Disable for queue 0 on 5210
33703
 AR5K_CR_TXD1AR5K_CR_TXD1 0x00000010 reg.h TX Disable for queue 1 on 5210
33704
 AR5K_CR_RXDAR5K_CR_RXD 0x00000020 reg.h RX Disable
33705
 AR5K_CR_SWIAR5K_CR_SWI 0x00000040 reg.h Software Interrupt
33706
 AR5K_RXDPAR5K_RXDP 0x000c reg.h 　
33707
 AR5K_CFGAR5K_CFG 0x0014 reg.h Register Address
33708
 AR5K_CFG_SWTDAR5K_CFG_SWTD 0x00000001 reg.h Byte-swap TX descriptor (for big endian archs)
33709
 AR5K_CFG_SWTBAR5K_CFG_SWTB 0x00000002 reg.h Byte-swap TX buffer
33710
 AR5K_CFG_SWRDAR5K_CFG_SWRD 0x00000004 reg.h Byte-swap RX descriptor
33711
 AR5K_CFG_SWRBAR5K_CFG_SWRB 0x00000008 reg.h Byte-swap RX buffer
33712
 AR5K_CFG_SWRGAR5K_CFG_SWRG 0x00000010 reg.h Byte-swap Register access
33713
 AR5K_CFG_IBSSAR5K_CFG_IBSS 0x00000020 reg.h 0-BSS, 1-IBSS [5211+]
33714
 AR5K_CFG_PHY_OKAR5K_CFG_PHY_OK 0x00000100 reg.h [5211+]
33715
 AR5K_CFG_EEBSAR5K_CFG_EEBS 0x00000200 reg.h EEPROM is busy
33716
 AR5K_CFG_CLKGDAR5K_CFG_CLKGD 0x00000400 reg.h Clock gated (Disable dynamic clock)
33717
 AR5K_CFG_TXCNTAR5K_CFG_TXCNT 0x00007800 reg.h Tx frame count (?) [5210]
33718
 AR5K_CFG_TXCNT_SAR5K_CFG_TXCNT_S 11 reg.h 　
33719
 AR5K_CFG_TXFSTATAR5K_CFG_TXFSTAT 0x00008000 reg.h Tx frame status (?) [5210]
33720
 AR5K_CFG_TXFSTRTAR5K_CFG_TXFSTRT 0x00010000 reg.h [5210]
33721
 AR5K_CFG_PCI_THRESAR5K_CFG_PCI_THRES 0x00060000 reg.h PCI Master req q threshold [5211+]
33722
 AR5K_CFG_PCI_THRES_SAR5K_CFG_PCI_THRES_S 17 reg.h 　
33723
 AR5K_IERAR5K_IER 0x0024 reg.h Register Address
33724
 AR5K_IER_DISABLEAR5K_IER_DISABLE 0x00000000 reg.h Disable card interrupts
33725
 AR5K_IER_ENABLEAR5K_IER_ENABLE 0x00000001 reg.h Enable card interrupts
33726
 AR5K_BCRAR5K_BCR 0x0028 reg.h Register Address
33727
 AR5K_BCR_APAR5K_BCR_AP 0x00000000 reg.h AP mode
33728
 AR5K_BCR_ADHOCAR5K_BCR_ADHOC 0x00000001 reg.h Ad-Hoc mode
33729
 AR5K_BCR_BDMAEAR5K_BCR_BDMAE 0x00000002 reg.h DMA enable
33730
 AR5K_BCR_TQ1FVAR5K_BCR_TQ1FV 0x00000004 reg.h Use Queue1 for CAB traffic
33731
 AR5K_BCR_TQ1VAR5K_BCR_TQ1V 0x00000008 reg.h Use Queue1 for Beacon traffic
33732
 AR5K_BCR_BCGETAR5K_BCR_BCGET 0x00000010 reg.h 　
33733
 AR5K_RTSD0AR5K_RTSD0 0x0028 reg.h Register Address
33734
 AR5K_RTSD0_6AR5K_RTSD0_6 0x000000ff reg.h 6Mb RTS duration mask (?)
33735
 AR5K_RTSD0_6_SAR5K_RTSD0_6_S 0 reg.h 6Mb RTS duration shift (?)
33736
 AR5K_RTSD0_9AR5K_RTSD0_9 0x0000ff00 reg.h 9Mb
33737
 AR5K_RTSD0_9_SAR5K_RTSD0_9_S 8 reg.h 　
33738
 AR5K_RTSD0_12AR5K_RTSD0_12 0x00ff0000 reg.h 12Mb
33739
 AR5K_RTSD0_12_SAR5K_RTSD0_12_S 16 reg.h 　
33740
 AR5K_RTSD0_18AR5K_RTSD0_18 0xff000000 reg.h 16Mb
33741
 AR5K_RTSD0_18_SAR5K_RTSD0_18_S 24 reg.h 　
33742
 AR5K_BSRAR5K_BSR 0x002c reg.h Register Address
33743
 AR5K_BSR_BDLYSWAR5K_BSR_BDLYSW 0x00000001 reg.h SW Beacon delay (?)
33744
 AR5K_BSR_BDLYDMAAR5K_BSR_BDLYDMA 0x00000002 reg.h DMA Beacon delay (?)
33745
 AR5K_BSR_TXQ1FAR5K_BSR_TXQ1F 0x00000004 reg.h Beacon queue (1) finished
33746
 AR5K_BSR_ATIMDLYAR5K_BSR_ATIMDLY 0x00000008 reg.h ATIM delay (?)
33747
 AR5K_BSR_SNPADHOCAR5K_BSR_SNPADHOC 0x00000100 reg.h Ad-hoc mode set (?)
33748
 AR5K_BSR_SNPBDMAEAR5K_BSR_SNPBDMAE 0x00000200 reg.h Beacon DMA enabled (?)
33749
 AR5K_BSR_SNPTQ1FVAR5K_BSR_SNPTQ1FV 0x00000400 reg.h Queue1 is used for CAB traffic (?)
33750
 AR5K_BSR_SNPTQ1VAR5K_BSR_SNPTQ1V 0x00000800 reg.h Queue1 is used for Beacon traffic (?)
33751
 AR5K_BSR_SNAPSHOTSVALIDAR5K_BSR_SNAPSHOTSVALID 0x00001000 reg.h BCR snapshots are valid (?)
33752
 AR5K_BSR_SWBA_CNTAR5K_BSR_SWBA_CNT 0x00ff0000 reg.h 　
33753
 AR5K_RTSD1AR5K_RTSD1 0x002c reg.h Register Address
33754
 AR5K_RTSD1_24AR5K_RTSD1_24 0x000000ff reg.h 24Mb
33755
 AR5K_RTSD1_24_SAR5K_RTSD1_24_S 0 reg.h 　
33756
 AR5K_RTSD1_36AR5K_RTSD1_36 0x0000ff00 reg.h 36Mb
33757
 AR5K_RTSD1_36_SAR5K_RTSD1_36_S 8 reg.h 　
33758
 AR5K_RTSD1_48AR5K_RTSD1_48 0x00ff0000 reg.h 48Mb
33759
 AR5K_RTSD1_48_SAR5K_RTSD1_48_S 16 reg.h 　
33760
 AR5K_RTSD1_54AR5K_RTSD1_54 0xff000000 reg.h 54Mb
33761
 AR5K_RTSD1_54_SAR5K_RTSD1_54_S 24 reg.h 　
33762
 AR5K_TXCFGAR5K_TXCFG 0x0030 reg.h Register Address
33763
 AR5K_TXCFG_SDMAMRAR5K_TXCFG_SDMAMR 0x00000007 reg.h DMA size (read)
33764
 AR5K_TXCFG_SDMAMR_SAR5K_TXCFG_SDMAMR_S 0 reg.h 　
33765
 AR5K_TXCFG_B_MODEAR5K_TXCFG_B_MODE 0x00000008 reg.h Set b mode for 5111 (enable 2111)
33766
 AR5K_TXCFG_TXFSTPAR5K_TXCFG_TXFSTP 0x00000008 reg.h TX DMA full Stop [5210]
33767
 AR5K_TXCFG_TXFULLAR5K_TXCFG_TXFULL 0x000003f0 reg.h TX Triger level mask
33768
 AR5K_TXCFG_TXFULL_SAR5K_TXCFG_TXFULL_S 4 reg.h 　
33769
 AR5K_TXCFG_TXFULL_0BAR5K_TXCFG_TXFULL_0B 0x00000000 reg.h 　
33770
 AR5K_TXCFG_TXFULL_64BAR5K_TXCFG_TXFULL_64B 0x00000010 reg.h 　
33771
 AR5K_TXCFG_TXFULL_128BAR5K_TXCFG_TXFULL_128B 0x00000020 reg.h 　
33772
 AR5K_TXCFG_TXFULL_192BAR5K_TXCFG_TXFULL_192B 0x00000030 reg.h 　
33773
 AR5K_TXCFG_TXFULL_256BAR5K_TXCFG_TXFULL_256B 0x00000040 reg.h 　
33774
 AR5K_TXCFG_TXCONT_ENAR5K_TXCFG_TXCONT_EN 0x00000080 reg.h 　
33775
 AR5K_TXCFG_DMASIZEAR5K_TXCFG_DMASIZE 0x00000100 reg.h Flag for passing DMA size [5210]
33776
 AR5K_TXCFG_JUMBO_DESC_ENAR5K_TXCFG_JUMBO_DESC_EN 0x00000400 reg.h Enable jumbo tx descriptors [5211+]
33777
 AR5K_TXCFG_ADHOC_BCN_ATIMAR5K_TXCFG_ADHOC_BCN_ATIM 0x00000800 reg.h Adhoc Beacon ATIM Policy
33778
 AR5K_TXCFG_ATIM_WINDOW_DEF_DISAR5K_TXCFG_ATIM_WINDOW_DEF_DIS 0x00001000 reg.h Disable ATIM window defer [5211+]
33779
 AR5K_TXCFG_RTSRNDAR5K_TXCFG_RTSRND 0x00001000 reg.h [5211+]
33780
 AR5K_TXCFG_FRMPAD_DISAR5K_TXCFG_FRMPAD_DIS 0x00002000 reg.h [5211+]
33781
 AR5K_TXCFG_RDY_CBR_DISAR5K_TXCFG_RDY_CBR_DIS 0x00004000 reg.h Ready time CBR disable [5211+]
33782
 AR5K_TXCFG_JUMBO_FRM_MODEAR5K_TXCFG_JUMBO_FRM_MODE 0x00008000 reg.h Jumbo frame mode [5211+]
33783
 AR5K_TXCFG_DCU_DBL_BUF_DISAR5K_TXCFG_DCU_DBL_BUF_DIS 0x00008000 reg.h Disable double buffering on DCU
33784
 AR5K_TXCFG_DCU_CACHING_DISAR5K_TXCFG_DCU_CACHING_DIS 0x00010000 reg.h Disable DCU caching
33785
 AR5K_RXCFGAR5K_RXCFG 0x0034 reg.h Register Address
33786
 AR5K_RXCFG_SDMAMWAR5K_RXCFG_SDMAMW 0x00000007 reg.h DMA size (write)
33787
 AR5K_RXCFG_SDMAMW_SAR5K_RXCFG_SDMAMW_S 0 reg.h 　
33788
 AR5K_RXCFG_ZLFDMAAR5K_RXCFG_ZLFDMA 0x00000008 reg.h Enable Zero-length frame DMA
33789
 AR5K_RXCFG_DEF_ANTENNAAR5K_RXCFG_DEF_ANTENNA 0x00000010 reg.h Default antenna (?)
33790
 AR5K_RXCFG_JUMBO_RXEAR5K_RXCFG_JUMBO_RXE 0x00000020 reg.h Enable jumbo rx descriptors [5211+]
33791
 AR5K_RXCFG_JUMBO_WRAPAR5K_RXCFG_JUMBO_WRAP 0x00000040 reg.h Wrap jumbo frames [5211+]
33792
 AR5K_RXCFG_SLE_ENTRYAR5K_RXCFG_SLE_ENTRY 0x00000080 reg.h Sleep entry policy
33793
 AR5K_RXJLAAR5K_RXJLA 0x0038 reg.h 　
33794
 AR5K_MIBCAR5K_MIBC 0x0040 reg.h Register Address
33795
 AR5K_MIBC_COWAR5K_MIBC_COW 0x00000001 reg.h Warn test indicator
33796
 AR5K_MIBC_FMCAR5K_MIBC_FMC 0x00000002 reg.h Freeze MIB Counters
33797
 AR5K_MIBC_CMCAR5K_MIBC_CMC 0x00000004 reg.h Clean MIB Counters
33798
 AR5K_MIBC_MCSAR5K_MIBC_MCS 0x00000008 reg.h MIB counter strobe
33799
 AR5K_TOPSAR5K_TOPS 0x0044 reg.h 　
33800
 AR5K_TOPS_MAR5K_TOPS_M 0x0000ffff reg.h 　
33801
 AR5K_RXNOFRMAR5K_RXNOFRM 0x0048 reg.h 　
33802
 AR5K_RXNOFRM_MAR5K_RXNOFRM_M 0x000003ff reg.h 　
33803
 AR5K_TXNOFRMAR5K_TXNOFRM 0x004c reg.h 　
33804
 AR5K_TXNOFRM_MAR5K_TXNOFRM_M 0x000003ff reg.h 　
33805
 AR5K_TXNOFRM_QCUAR5K_TXNOFRM_QCU 0x000ffc00 reg.h 　
33806
 AR5K_TXNOFRM_QCU_SAR5K_TXNOFRM_QCU_S 10 reg.h 　
33807
 AR5K_RPGTOAR5K_RPGTO 0x0050 reg.h 　
33808
 AR5K_RPGTO_MAR5K_RPGTO_M 0x000003ff reg.h 　
33809
 AR5K_RFCNTAR5K_RFCNT 0x0054 reg.h 　
33810
 AR5K_RFCNT_MAR5K_RFCNT_M 0x0000001f reg.h [5211+] (?)
33811
 AR5K_RFCNT_RFCLAR5K_RFCNT_RFCL 0x0000000f reg.h [5210]
33812
 AR5K_MISCAR5K_MISC 0x0058 reg.h Register Address
33813
 AR5K_MISC_DMA_OBS_MAR5K_MISC_DMA_OBS_M 0x000001e0 reg.h 　
33814
 AR5K_MISC_DMA_OBS_SAR5K_MISC_DMA_OBS_S 5 reg.h 　
33815
 AR5K_MISC_MISC_OBS_MAR5K_MISC_MISC_OBS_M 0x00000e00 reg.h 　
33816
 AR5K_MISC_MISC_OBS_SAR5K_MISC_MISC_OBS_S 9 reg.h 　
33817
 AR5K_MISC_MAC_OBS_LSB_MAR5K_MISC_MAC_OBS_LSB_M 0x00007000 reg.h 　
33818
 AR5K_MISC_MAC_OBS_LSB_SAR5K_MISC_MAC_OBS_LSB_S 12 reg.h 　
33819
 AR5K_MISC_MAC_OBS_MSB_MAR5K_MISC_MAC_OBS_MSB_M 0x00038000 reg.h 　
33820
 AR5K_MISC_MAC_OBS_MSB_SAR5K_MISC_MAC_OBS_MSB_S 15 reg.h 　
33821
 AR5K_MISC_LED_DECAYAR5K_MISC_LED_DECAY 0x001c0000 reg.h [5210]
33822
 AR5K_MISC_LED_BLINKAR5K_MISC_LED_BLINK 0x00e00000 reg.h [5210]
33823
 AR5K_QCUDCU_CLKGTAR5K_QCUDCU_CLKGT 0x005c reg.h Register Address (?)
33824
 AR5K_QCUDCU_CLKGT_QCUAR5K_QCUDCU_CLKGT_QCU 0x0000ffff reg.h Mask for QCU clock
33825
 AR5K_QCUDCU_CLKGT_DCUAR5K_QCUDCU_CLKGT_DCU 0x07ff0000 reg.h Mask for DCU clock
33826
 AR5K_ISRAR5K_ISR 0x001c reg.h Register Address [5210]
33827
 AR5K_PISRAR5K_PISR 0x0080 reg.h Register Address [5211+]
33828
 AR5K_ISR_RXOKAR5K_ISR_RXOK 0x00000001 reg.h Frame successfuly recieved
33829
 AR5K_ISR_RXDESCAR5K_ISR_RXDESC 0x00000002 reg.h RX descriptor request
33830
 AR5K_ISR_RXERRAR5K_ISR_RXERR 0x00000004 reg.h Receive error
33831
 AR5K_ISR_RXNOFRMAR5K_ISR_RXNOFRM 0x00000008 reg.h No frame received (receive timeout)
33832
 AR5K_ISR_RXEOLAR5K_ISR_RXEOL 0x00000010 reg.h Empty RX descriptor
33833
 AR5K_ISR_RXORNAR5K_ISR_RXORN 0x00000020 reg.h Receive FIFO overrun
33834
 AR5K_ISR_TXOKAR5K_ISR_TXOK 0x00000040 reg.h Frame successfuly transmited
33835
 AR5K_ISR_TXDESCAR5K_ISR_TXDESC 0x00000080 reg.h TX descriptor request
33836
 AR5K_ISR_TXERRAR5K_ISR_TXERR 0x00000100 reg.h Transmit error
33837
 AR5K_ISR_TXNOFRMAR5K_ISR_TXNOFRM 0x00000200 reg.h No frame transmited (transmit timeout)
33838
 AR5K_ISR_TXEOLAR5K_ISR_TXEOL 0x00000400 reg.h Empty TX descriptor
33839
 AR5K_ISR_TXURNAR5K_ISR_TXURN 0x00000800 reg.h Transmit FIFO underrun
33840
 AR5K_ISR_MIBAR5K_ISR_MIB 0x00001000 reg.h Update MIB counters
33841
 AR5K_ISR_SWIAR5K_ISR_SWI 0x00002000 reg.h Software interrupt
33842
 AR5K_ISR_RXPHYAR5K_ISR_RXPHY 0x00004000 reg.h PHY error
33843
 AR5K_ISR_RXKCMAR5K_ISR_RXKCM 0x00008000 reg.h RX Key cache miss
33844
 AR5K_ISR_SWBAAR5K_ISR_SWBA 0x00010000 reg.h Software beacon alert
33845
 AR5K_ISR_BRSSIAR5K_ISR_BRSSI 0x00020000 reg.h Beacon rssi below threshold (?)
33846
 AR5K_ISR_BMISSAR5K_ISR_BMISS 0x00040000 reg.h Beacon missed
33847
 AR5K_ISR_HIUERRAR5K_ISR_HIUERR 0x00080000 reg.h Host Interface Unit error [5211+]
33848
 AR5K_ISR_BNRAR5K_ISR_BNR 0x00100000 reg.h Beacon not ready [5211+]
33849
 AR5K_ISR_MCABTAR5K_ISR_MCABT 0x00100000 reg.h Master Cycle Abort [5210]
33850
 AR5K_ISR_RXCHIRPAR5K_ISR_RXCHIRP 0x00200000 reg.h CHIRP Received [5212+]
33851
 AR5K_ISR_SSERRAR5K_ISR_SSERR 0x00200000 reg.h Signaled System Error [5210]
33852
 AR5K_ISR_DPERRAR5K_ISR_DPERR 0x00400000 reg.h Det par Error (?) [5210]
33853
 AR5K_ISR_RXDOPPLERAR5K_ISR_RXDOPPLER 0x00400000 reg.h Doppler chirp received [5212+]
33854
 AR5K_ISR_TIMAR5K_ISR_TIM 0x00800000 reg.h [5211+]
33855
 AR5K_ISR_BCNMISCAR5K_ISR_BCNMISC 0x00800000 reg.h 'or' of TIM, CAB_END, DTIM_SYNC, BCN_TIMEOUT,
33856
 AR5K_ISR_GPIOAR5K_ISR_GPIO 0x01000000 reg.h GPIO (rf kill)
33857
 AR5K_ISR_QCBRORNAR5K_ISR_QCBRORN 0x02000000 reg.h QCU CBR overrun [5211+]
33858
 AR5K_ISR_QCBRURNAR5K_ISR_QCBRURN 0x04000000 reg.h QCU CBR underrun [5211+]
33859
 AR5K_ISR_QTRIGAR5K_ISR_QTRIG 0x08000000 reg.h QCU scheduling trigger [5211+]
33860
 AR5K_SISR0AR5K_SISR0 0x0084 reg.h Register Address [5211+]
33861
 AR5K_SISR0_QCU_TXOKAR5K_SISR0_QCU_TXOK 0x000003ff reg.h Mask for QCU_TXOK
33862
 AR5K_SISR0_QCU_TXOK_SAR5K_SISR0_QCU_TXOK_S 0 reg.h 　
33863
 AR5K_SISR0_QCU_TXDESCAR5K_SISR0_QCU_TXDESC 0x03ff0000 reg.h Mask for QCU_TXDESC
33864
 AR5K_SISR0_QCU_TXDESC_SAR5K_SISR0_QCU_TXDESC_S 16 reg.h 　
33865
 AR5K_SISR1AR5K_SISR1 0x0088 reg.h Register Address [5211+]
33866
 AR5K_SISR1_QCU_TXERRAR5K_SISR1_QCU_TXERR 0x000003ff reg.h Mask for QCU_TXERR
33867
 AR5K_SISR1_QCU_TXERR_SAR5K_SISR1_QCU_TXERR_S 0 reg.h 　
33868
 AR5K_SISR1_QCU_TXEOLAR5K_SISR1_QCU_TXEOL 0x03ff0000 reg.h Mask for QCU_TXEOL
33869
 AR5K_SISR1_QCU_TXEOL_SAR5K_SISR1_QCU_TXEOL_S 16 reg.h 　
33870
 AR5K_SISR2AR5K_SISR2 0x008c reg.h Register Address [5211+]
33871
 AR5K_SISR2_QCU_TXURNAR5K_SISR2_QCU_TXURN 0x000003ff reg.h Mask for QCU_TXURN
33872
 AR5K_SISR2_QCU_TXURN_SAR5K_SISR2_QCU_TXURN_S 0 reg.h 　
33873
 AR5K_SISR2_MCABTAR5K_SISR2_MCABT 0x00100000 reg.h Master Cycle Abort
33874
 AR5K_SISR2_SSERRAR5K_SISR2_SSERR 0x00200000 reg.h Signaled System Error
33875
 AR5K_SISR2_DPERRAR5K_SISR2_DPERR 0x00400000 reg.h Bus parity error
33876
 AR5K_SISR2_TIMAR5K_SISR2_TIM 0x01000000 reg.h [5212+]
33877
 AR5K_SISR2_CAB_ENDAR5K_SISR2_CAB_END 0x02000000 reg.h [5212+]
33878
 AR5K_SISR2_DTIM_SYNCAR5K_SISR2_DTIM_SYNC 0x04000000 reg.h DTIM sync lost [5212+]
33879
 AR5K_SISR2_BCN_TIMEOUTAR5K_SISR2_BCN_TIMEOUT 0x08000000 reg.h Beacon Timeout [5212+]
33880
 AR5K_SISR2_CAB_TIMEOUTAR5K_SISR2_CAB_TIMEOUT 0x10000000 reg.h CAB Timeout [5212+]
33881
 AR5K_SISR2_DTIMAR5K_SISR2_DTIM 0x20000000 reg.h [5212+]
33882
 AR5K_SISR2_TSFOORAR5K_SISR2_TSFOOR 0x80000000 reg.h TSF OOR (?)
33883
 AR5K_SISR3AR5K_SISR3 0x0090 reg.h Register Address [5211+]
33884
 AR5K_SISR3_QCBRORNAR5K_SISR3_QCBRORN 0x000003ff reg.h Mask for QCBRORN
33885
 AR5K_SISR3_QCBRORN_SAR5K_SISR3_QCBRORN_S 0 reg.h 　
33886
 AR5K_SISR3_QCBRURNAR5K_SISR3_QCBRURN 0x03ff0000 reg.h Mask for QCBRURN
33887
 AR5K_SISR3_QCBRURN_SAR5K_SISR3_QCBRURN_S 16 reg.h 　
33888
 AR5K_SISR4AR5K_SISR4 0x0094 reg.h Register Address [5211+]
33889
 AR5K_SISR4_QTRIGAR5K_SISR4_QTRIG 0x000003ff reg.h Mask for QTRIG
33890
 AR5K_SISR4_QTRIG_SAR5K_SISR4_QTRIG_S 0 reg.h 　
33891
 AR5K_RAC_PISRAR5K_RAC_PISR 0x00c0 reg.h Read and clear PISR
33892
 AR5K_RAC_SISR0AR5K_RAC_SISR0 0x00c4 reg.h Read and clear SISR0
33893
 AR5K_RAC_SISR1AR5K_RAC_SISR1 0x00c8 reg.h Read and clear SISR1
33894
 AR5K_RAC_SISR2AR5K_RAC_SISR2 0x00cc reg.h Read and clear SISR2
33895
 AR5K_RAC_SISR3AR5K_RAC_SISR3 0x00d0 reg.h Read and clear SISR3
33896
 AR5K_RAC_SISR4AR5K_RAC_SISR4 0x00d4 reg.h Read and clear SISR4
33897
 AR5K_IMRAR5K_IMR 0x0020 reg.h Register Address [5210]
33898
 AR5K_PIMRAR5K_PIMR 0x00a0 reg.h Register Address [5211+]
33899
 AR5K_IMR_RXOKAR5K_IMR_RXOK 0x00000001 reg.h Frame successfuly recieved
33900
 AR5K_IMR_RXDESCAR5K_IMR_RXDESC 0x00000002 reg.h RX descriptor request
33901
 AR5K_IMR_RXERRAR5K_IMR_RXERR 0x00000004 reg.h Receive error
33902
 AR5K_IMR_RXNOFRMAR5K_IMR_RXNOFRM 0x00000008 reg.h No frame received (receive timeout)
33903
 AR5K_IMR_RXEOLAR5K_IMR_RXEOL 0x00000010 reg.h Empty RX descriptor
33904
 AR5K_IMR_RXORNAR5K_IMR_RXORN 0x00000020 reg.h Receive FIFO overrun
33905
 AR5K_IMR_TXOKAR5K_IMR_TXOK 0x00000040 reg.h Frame successfuly transmited
33906
 AR5K_IMR_TXDESCAR5K_IMR_TXDESC 0x00000080 reg.h TX descriptor request
33907
 AR5K_IMR_TXERRAR5K_IMR_TXERR 0x00000100 reg.h Transmit error
33908
 AR5K_IMR_TXNOFRMAR5K_IMR_TXNOFRM 0x00000200 reg.h No frame transmited (transmit timeout)
33909
 AR5K_IMR_TXEOLAR5K_IMR_TXEOL 0x00000400 reg.h Empty TX descriptor
33910
 AR5K_IMR_TXURNAR5K_IMR_TXURN 0x00000800 reg.h Transmit FIFO underrun
33911
 AR5K_IMR_MIBAR5K_IMR_MIB 0x00001000 reg.h Update MIB counters
33912
 AR5K_IMR_SWIAR5K_IMR_SWI 0x00002000 reg.h Software interrupt
33913
 AR5K_IMR_RXPHYAR5K_IMR_RXPHY 0x00004000 reg.h PHY error
33914
 AR5K_IMR_RXKCMAR5K_IMR_RXKCM 0x00008000 reg.h RX Key cache miss
33915
 AR5K_IMR_SWBAAR5K_IMR_SWBA 0x00010000 reg.h Software beacon alert
33916
 AR5K_IMR_BRSSIAR5K_IMR_BRSSI 0x00020000 reg.h Beacon rssi below threshold (?)
33917
 AR5K_IMR_BMISSAR5K_IMR_BMISS 0x00040000 reg.h Beacon missed
33918
 AR5K_IMR_HIUERRAR5K_IMR_HIUERR 0x00080000 reg.h Host Interface Unit error [5211+]
33919
 AR5K_IMR_BNRAR5K_IMR_BNR 0x00100000 reg.h Beacon not ready [5211+]
33920
 AR5K_IMR_MCABTAR5K_IMR_MCABT 0x00100000 reg.h Master Cycle Abort [5210]
33921
 AR5K_IMR_RXCHIRPAR5K_IMR_RXCHIRP 0x00200000 reg.h CHIRP Received [5212+]
33922
 AR5K_IMR_SSERRAR5K_IMR_SSERR 0x00200000 reg.h Signaled System Error [5210]
33923
 AR5K_IMR_DPERRAR5K_IMR_DPERR 0x00400000 reg.h Det par Error (?) [5210]
33924
 AR5K_IMR_RXDOPPLERAR5K_IMR_RXDOPPLER 0x00400000 reg.h Doppler chirp received [5212+]
33925
 AR5K_IMR_TIMAR5K_IMR_TIM 0x00800000 reg.h [5211+]
33926
 AR5K_IMR_BCNMISCAR5K_IMR_BCNMISC 0x00800000 reg.h 'or' of TIM, CAB_END, DTIM_SYNC, BCN_TIMEOUT,
33927
 AR5K_IMR_GPIOAR5K_IMR_GPIO 0x01000000 reg.h GPIO (rf kill)
33928
 AR5K_IMR_QCBRORNAR5K_IMR_QCBRORN 0x02000000 reg.h QCU CBR overrun (?) [5211+]
33929
 AR5K_IMR_QCBRURNAR5K_IMR_QCBRURN 0x04000000 reg.h QCU CBR underrun (?) [5211+]
33930
 AR5K_IMR_QTRIGAR5K_IMR_QTRIG 0x08000000 reg.h QCU scheduling trigger [5211+]
33931
 AR5K_SIMR0AR5K_SIMR0 0x00a4 reg.h Register Address [5211+]
33932
 AR5K_SIMR0_QCU_TXOKAR5K_SIMR0_QCU_TXOK 0x000003ff reg.h Mask for QCU_TXOK
33933
 AR5K_SIMR0_QCU_TXOK_SAR5K_SIMR0_QCU_TXOK_S 0 reg.h 　
33934
 AR5K_SIMR0_QCU_TXDESCAR5K_SIMR0_QCU_TXDESC 0x03ff0000 reg.h Mask for QCU_TXDESC
33935
 AR5K_SIMR0_QCU_TXDESC_SAR5K_SIMR0_QCU_TXDESC_S 16 reg.h 　
33936
 AR5K_SIMR1AR5K_SIMR1 0x00a8 reg.h Register Address [5211+]
33937
 AR5K_SIMR1_QCU_TXERRAR5K_SIMR1_QCU_TXERR 0x000003ff reg.h Mask for QCU_TXERR
33938
 AR5K_SIMR1_QCU_TXERR_SAR5K_SIMR1_QCU_TXERR_S 0 reg.h 　
33939
 AR5K_SIMR1_QCU_TXEOLAR5K_SIMR1_QCU_TXEOL 0x03ff0000 reg.h Mask for QCU_TXEOL
33940
 AR5K_SIMR1_QCU_TXEOL_SAR5K_SIMR1_QCU_TXEOL_S 16 reg.h 　
33941
 AR5K_SIMR2AR5K_SIMR2 0x00ac reg.h Register Address [5211+]
33942
 AR5K_SIMR2_QCU_TXURNAR5K_SIMR2_QCU_TXURN 0x000003ff reg.h Mask for QCU_TXURN
33943
 AR5K_SIMR2_QCU_TXURN_SAR5K_SIMR2_QCU_TXURN_S 0 reg.h 　
33944
 AR5K_SIMR2_MCABTAR5K_SIMR2_MCABT 0x00100000 reg.h Master Cycle Abort
33945
 AR5K_SIMR2_SSERRAR5K_SIMR2_SSERR 0x00200000 reg.h Signaled System Error
33946
 AR5K_SIMR2_DPERRAR5K_SIMR2_DPERR 0x00400000 reg.h Bus parity error
33947
 AR5K_SIMR2_TIMAR5K_SIMR2_TIM 0x01000000 reg.h [5212+]
33948
 AR5K_SIMR2_CAB_ENDAR5K_SIMR2_CAB_END 0x02000000 reg.h [5212+]
33949
 AR5K_SIMR2_DTIM_SYNCAR5K_SIMR2_DTIM_SYNC 0x04000000 reg.h DTIM Sync lost [5212+]
33950
 AR5K_SIMR2_BCN_TIMEOUTAR5K_SIMR2_BCN_TIMEOUT 0x08000000 reg.h Beacon Timeout [5212+]
33951
 AR5K_SIMR2_CAB_TIMEOUTAR5K_SIMR2_CAB_TIMEOUT 0x10000000 reg.h CAB Timeout [5212+]
33952
 AR5K_SIMR2_DTIMAR5K_SIMR2_DTIM 0x20000000 reg.h [5212+]
33953
 AR5K_SIMR2_TSFOORAR5K_SIMR2_TSFOOR 0x80000000 reg.h TSF OOR (?)
33954
 AR5K_SIMR3AR5K_SIMR3 0x00b0 reg.h Register Address [5211+]
33955
 AR5K_SIMR3_QCBRORNAR5K_SIMR3_QCBRORN 0x000003ff reg.h Mask for QCBRORN
33956
 AR5K_SIMR3_QCBRORN_SAR5K_SIMR3_QCBRORN_S 0 reg.h 　
33957
 AR5K_SIMR3_QCBRURNAR5K_SIMR3_QCBRURN 0x03ff0000 reg.h Mask for QCBRURN
33958
 AR5K_SIMR3_QCBRURN_SAR5K_SIMR3_QCBRURN_S 16 reg.h 　
33959
 AR5K_SIMR4AR5K_SIMR4 0x00b4 reg.h Register Address [5211+]
33960
 AR5K_SIMR4_QTRIGAR5K_SIMR4_QTRIG 0x000003ff reg.h Mask for QTRIG
33961
 AR5K_SIMR4_QTRIG_SAR5K_SIMR4_QTRIG_S 0 reg.h 　
33962
 AR5K_DCM_ADDRAR5K_DCM_ADDR 0x0400 reg.h Decompression mask address (index)
33963
 AR5K_DCM_DATAAR5K_DCM_DATA 0x0404 reg.h Decompression mask data
33964
 AR5K_WOW_PCFGAR5K_WOW_PCFG 0x0410 reg.h Register Address
33965
 AR5K_WOW_PCFG_PAT_MATCH_ENAR5K_WOW_PCFG_PAT_MATCH_EN 0x00000001 reg.h Pattern match enable
33966
 AR5K_WOW_PCFG_LONG_FRAME_POLAR5K_WOW_PCFG_LONG_FRAME_POL 0x00000002 reg.h Long frame policy
33967
 AR5K_WOW_PCFG_WOBMISSAR5K_WOW_PCFG_WOBMISS 0x00000004 reg.h Wake on bea(con) miss (?)
33968
 AR5K_WOW_PCFG_PAT_0_ENAR5K_WOW_PCFG_PAT_0_EN 0x00000100 reg.h Enable pattern 0
33969
 AR5K_WOW_PCFG_PAT_1_ENAR5K_WOW_PCFG_PAT_1_EN 0x00000200 reg.h Enable pattern 1
33970
 AR5K_WOW_PCFG_PAT_2_ENAR5K_WOW_PCFG_PAT_2_EN 0x00000400 reg.h Enable pattern 2
33971
 AR5K_WOW_PCFG_PAT_3_ENAR5K_WOW_PCFG_PAT_3_EN 0x00000800 reg.h Enable pattern 3
33972
 AR5K_WOW_PCFG_PAT_4_ENAR5K_WOW_PCFG_PAT_4_EN 0x00001000 reg.h Enable pattern 4
33973
 AR5K_WOW_PCFG_PAT_5_ENAR5K_WOW_PCFG_PAT_5_EN 0x00002000 reg.h Enable pattern 5
33974
 AR5K_WOW_PAT_IDXAR5K_WOW_PAT_IDX 0x0414 reg.h 　
33975
 AR5K_WOW_PAT_DATAAR5K_WOW_PAT_DATA 0x0418 reg.h Register Address
33976
 AR5K_WOW_PAT_DATA_0_3_VAR5K_WOW_PAT_DATA_0_3_V 0x00000001 reg.h Pattern 0, 3 value
33977
 AR5K_WOW_PAT_DATA_1_4_VAR5K_WOW_PAT_DATA_1_4_V 0x00000100 reg.h Pattern 1, 4 value
33978
 AR5K_WOW_PAT_DATA_2_5_VAR5K_WOW_PAT_DATA_2_5_V 0x00010000 reg.h Pattern 2, 5 value
33979
 AR5K_WOW_PAT_DATA_0_3_MAR5K_WOW_PAT_DATA_0_3_M 0x01000000 reg.h Pattern 0, 3 mask
33980
 AR5K_WOW_PAT_DATA_1_4_MAR5K_WOW_PAT_DATA_1_4_M 0x04000000 reg.h Pattern 1, 4 mask
33981
 AR5K_WOW_PAT_DATA_2_5_MAR5K_WOW_PAT_DATA_2_5_M 0x10000000 reg.h Pattern 2, 5 mask
33982
 AR5K_DCCFGAR5K_DCCFG 0x0420 reg.h Register Address
33983
 AR5K_DCCFG_GLOBAL_ENAR5K_DCCFG_GLOBAL_EN 0x00000001 reg.h Enable decompression on all queues
33984
 AR5K_DCCFG_BYPASS_ENAR5K_DCCFG_BYPASS_EN 0x00000002 reg.h Bypass decompression
33985
 AR5K_DCCFG_BCAST_ENAR5K_DCCFG_BCAST_EN 0x00000004 reg.h Enable decompression for bcast frames
33986
 AR5K_DCCFG_MCAST_ENAR5K_DCCFG_MCAST_EN 0x00000008 reg.h Enable decompression for mcast frames
33987
 AR5K_CCFGAR5K_CCFG 0x0600 reg.h Register Address
33988
 AR5K_CCFG_WINDOW_SIZEAR5K_CCFG_WINDOW_SIZE 0x00000007 reg.h Compression window size
33989
 AR5K_CCFG_CPC_ENAR5K_CCFG_CPC_EN 0x00000008 reg.h Enable performance counters
33990
 AR5K_CCFG_CCUAR5K_CCFG_CCU 0x0604 reg.h Register Address
33991
 AR5K_CCFG_CCU_CUP_ENAR5K_CCFG_CCU_CUP_EN 0x00000001 reg.h CCU Catchup enable
33992
 AR5K_CCFG_CCU_CREDITAR5K_CCFG_CCU_CREDIT 0x00000002 reg.h CCU Credit (field)
33993
 AR5K_CCFG_CCU_CD_THRESAR5K_CCFG_CCU_CD_THRES 0x00000080 reg.h CCU Cyc(lic?) debt threshold (field)
33994
 AR5K_CCFG_CCU_CUP_LCNTAR5K_CCFG_CCU_CUP_LCNT 0x00010000 reg.h CCU Catchup lit(?) count
33995
 AR5K_CCFG_CCU_INITAR5K_CCFG_CCU_INIT 0x00100200 reg.h Initial value during reset
33996
 AR5K_CPC0AR5K_CPC0 0x0610 reg.h Compression performance counter 0
33997
 AR5K_CPC1AR5K_CPC1 0x0614 reg.h Compression performance counter 1
33998
 AR5K_CPC2AR5K_CPC2 0x0618 reg.h Compression performance counter 2
33999
 AR5K_CPC3AR5K_CPC3 0x061c reg.h Compression performance counter 3
34000
 AR5K_CPCOVFAR5K_CPCOVF 0x0620 reg.h Compression performance overflow
34001
 AR5K_QCU_TXDP_BASEAR5K_QCU_TXDP_BASE 0x0800 reg.h Register Address - Queue0 TXDP
34002
 AR5K_QCU_TXEAR5K_QCU_TXE 0x0840 reg.h 　
34003
 AR5K_QCU_TXDAR5K_QCU_TXD 0x0880 reg.h 　
34004
 AR5K_QCU_CBRCFG_BASEAR5K_QCU_CBRCFG_BASE 0x08c0 reg.h Register Address - Queue0 CBRCFG
34005
 AR5K_QCU_CBRCFG_INTVALAR5K_QCU_CBRCFG_INTVAL 0x00ffffff reg.h CBR Interval mask
34006
 AR5K_QCU_CBRCFG_INTVAL_SAR5K_QCU_CBRCFG_INTVAL_S 0 reg.h 　
34007
 AR5K_QCU_CBRCFG_ORN_THRESAR5K_QCU_CBRCFG_ORN_THRES 0xff000000 reg.h CBR overrun threshold mask
34008
 AR5K_QCU_CBRCFG_ORN_THRES_SAR5K_QCU_CBRCFG_ORN_THRES_S 24 reg.h 　
34009
 AR5K_QCU_RDYTIMECFG_BASEAR5K_QCU_RDYTIMECFG_BASE 0x0900 reg.h Register Address - Queue0 RDYTIMECFG
34010
 AR5K_QCU_RDYTIMECFG_INTVALAR5K_QCU_RDYTIMECFG_INTVAL 0x00ffffff reg.h Ready time interval mask
34011
 AR5K_QCU_RDYTIMECFG_INTVAL_SAR5K_QCU_RDYTIMECFG_INTVAL_S 0 reg.h 　
34012
 AR5K_QCU_RDYTIMECFG_ENABLEAR5K_QCU_RDYTIMECFG_ENABLE 0x01000000 reg.h Ready time enable mask
34013
 AR5K_QCU_ONESHOTARM_SETAR5K_QCU_ONESHOTARM_SET 0x0940 reg.h Register Address -QCU "one shot arm set (?)"
34014
 AR5K_QCU_ONESHOTARM_SET_MAR5K_QCU_ONESHOTARM_SET_M 0x0000ffff reg.h 　
34015
 AR5K_QCU_ONESHOTARM_CLEARAR5K_QCU_ONESHOTARM_CLEAR 0x0980 reg.h Register Address -QCU "one shot arm clear (?)"
34016
 AR5K_QCU_ONESHOTARM_CLEAR_MAR5K_QCU_ONESHOTARM_CLEAR_M 0x0000ffff reg.h 　
34017
 AR5K_QCU_MISC_BASEAR5K_QCU_MISC_BASE 0x09c0 reg.h Register Address -Queue0 MISC
34018
 AR5K_QCU_MISC_FRSHED_MAR5K_QCU_MISC_FRSHED_M 0x0000000f reg.h Frame sheduling mask
34019
 AR5K_QCU_MISC_FRSHED_ASAPAR5K_QCU_MISC_FRSHED_ASAP 0 reg.h ASAP
34020
 AR5K_QCU_MISC_FRSHED_CBRAR5K_QCU_MISC_FRSHED_CBR 1 reg.h Constant Bit Rate
34021
 AR5K_QCU_MISC_FRSHED_DBA_GTAR5K_QCU_MISC_FRSHED_DBA_GT 2 reg.h DMA Beacon alert gated
34022
 AR5K_QCU_MISC_FRSHED_TIM_GTAR5K_QCU_MISC_FRSHED_TIM_GT 3 reg.h TIMT gated
34023
 AR5K_QCU_MISC_FRSHED_BCN_SENT_GAR5K_QCU_MISC_FRSHED_BCN_SENT_G 4 reg.h Beacon sent gated
34024
 AR5K_QCU_MISC_ONESHOT_ENABLEAR5K_QCU_MISC_ONESHOT_ENABLE 0x00000010 reg.h Oneshot enable
34025
 AR5K_QCU_MISC_CBREXP_DISAR5K_QCU_MISC_CBREXP_DIS 0x00000020 reg.h Disable CBR expired counter (normal queue)
34026
 AR5K_QCU_MISC_CBREXP_BCN_DISAR5K_QCU_MISC_CBREXP_BCN_DIS 0x00000040 reg.h Disable CBR expired counter (beacon queue)
34027
 AR5K_QCU_MISC_BCN_ENABLEAR5K_QCU_MISC_BCN_ENABLE 0x00000080 reg.h Enable Beacon use
34028
 AR5K_QCU_MISC_CBR_THRES_ENABLEAR5K_QCU_MISC_CBR_THRES_ENABLE 0x00000100 reg.h CBR expired threshold enabled
34029
 AR5K_QCU_MISC_RDY_VEOL_POLICYAR5K_QCU_MISC_RDY_VEOL_POLICY 0x00000200 reg.h TXE reset when RDYTIME expired or VEOL
34030
 AR5K_QCU_MISC_CBR_RESET_CNTAR5K_QCU_MISC_CBR_RESET_CNT 0x00000400 reg.h CBR threshold (counter) reset
34031
 AR5K_QCU_MISC_DCU_EARLYAR5K_QCU_MISC_DCU_EARLY 0x00000800 reg.h DCU early termination
34032
 AR5K_QCU_MISC_DCU_CMP_ENAR5K_QCU_MISC_DCU_CMP_EN 0x00001000 reg.h Enable frame compression
34033
 AR5K_QCU_STS_BASEAR5K_QCU_STS_BASE 0x0a00 reg.h Register Address - Queue0 STS
34034
 AR5K_QCU_STS_FRMPENDCNTAR5K_QCU_STS_FRMPENDCNT 0x00000003 reg.h Frames pending counter
34035
 AR5K_QCU_STS_CBREXPCNTAR5K_QCU_STS_CBREXPCNT 0x0000ff00 reg.h CBR expired counter
34036
 AR5K_QCU_RDYTIMESHDNAR5K_QCU_RDYTIMESHDN 0x0a40 reg.h 　
34037
 AR5K_QCU_RDYTIMESHDN_MAR5K_QCU_RDYTIMESHDN_M 0x000003ff reg.h 　
34038
 AR5K_QCU_CBB_SELECTAR5K_QCU_CBB_SELECT 0x0b00 reg.h 　
34039
 AR5K_QCU_CBB_ADDRAR5K_QCU_CBB_ADDR 0x0b04 reg.h 　
34040
 AR5K_QCU_CBB_ADDR_SAR5K_QCU_CBB_ADDR_S 9 reg.h 　
34041
 AR5K_QCU_CBCFGAR5K_QCU_CBCFG 0x0b08 reg.h 　
34042
 AR5K_DCU_QCUMASK_BASEAR5K_DCU_QCUMASK_BASE 0x1000 reg.h Register Address -Queue0 DCU_QCUMASK
34043
 AR5K_DCU_QCUMASK_MAR5K_DCU_QCUMASK_M 0x000003ff reg.h 　
34044
 AR5K_DCU_LCL_IFS_BASEAR5K_DCU_LCL_IFS_BASE 0x1040 reg.h Register Address -Queue0 DCU_LCL_IFS
34045
 AR5K_DCU_LCL_IFS_CW_MINAR5K_DCU_LCL_IFS_CW_MIN 0x000003ff reg.h Minimum Contention Window
34046
 AR5K_DCU_LCL_IFS_CW_MIN_SAR5K_DCU_LCL_IFS_CW_MIN_S 0 reg.h 　
34047
 AR5K_DCU_LCL_IFS_CW_MAXAR5K_DCU_LCL_IFS_CW_MAX 0x000ffc00 reg.h Maximum Contention Window
34048
 AR5K_DCU_LCL_IFS_CW_MAX_SAR5K_DCU_LCL_IFS_CW_MAX_S 10 reg.h 　
34049
 AR5K_DCU_LCL_IFS_AIFSAR5K_DCU_LCL_IFS_AIFS 0x0ff00000 reg.h Arbitrated Interframe Space
34050
 AR5K_DCU_LCL_IFS_AIFS_SAR5K_DCU_LCL_IFS_AIFS_S 20 reg.h 　
34051
 AR5K_DCU_LCL_IFS_AIFS_MAXAR5K_DCU_LCL_IFS_AIFS_MAX 0xfc reg.h Anything above that can cause DCU to hang
34052
 AR5K_DCU_RETRY_LMT_BASEAR5K_DCU_RETRY_LMT_BASE 0x1080 reg.h Register Address -Queue0 DCU_RETRY_LMT
34053
 AR5K_DCU_RETRY_LMT_SH_RETRYAR5K_DCU_RETRY_LMT_SH_RETRY 0x0000000f reg.h Short retry limit mask
34054
 AR5K_DCU_RETRY_LMT_SH_RETRY_SAR5K_DCU_RETRY_LMT_SH_RETRY_S 0 reg.h 　
34055
 AR5K_DCU_RETRY_LMT_LG_RETRYAR5K_DCU_RETRY_LMT_LG_RETRY 0x000000f0 reg.h Long retry limit mask
34056
 AR5K_DCU_RETRY_LMT_LG_RETRY_SAR5K_DCU_RETRY_LMT_LG_RETRY_S 4 reg.h 　
34057
 AR5K_DCU_RETRY_LMT_SSH_RETRYAR5K_DCU_RETRY_LMT_SSH_RETRY 0x00003f00 reg.h Station short retry limit mask (?)
34058
 AR5K_DCU_RETRY_LMT_SSH_RETRY_SAR5K_DCU_RETRY_LMT_SSH_RETRY_S 8 reg.h 　
34059
 AR5K_DCU_RETRY_LMT_SLG_RETRYAR5K_DCU_RETRY_LMT_SLG_RETRY 0x000fc000 reg.h Station long retry limit mask (?)
34060
 AR5K_DCU_RETRY_LMT_SLG_RETRY_SAR5K_DCU_RETRY_LMT_SLG_RETRY_S 14 reg.h 　
34061
 AR5K_DCU_CHAN_TIME_BASEAR5K_DCU_CHAN_TIME_BASE 0x10c0 reg.h Register Address -Queue0 DCU_CHAN_TIME
34062
 AR5K_DCU_CHAN_TIME_DURAR5K_DCU_CHAN_TIME_DUR 0x000fffff reg.h Channel time duration
34063
 AR5K_DCU_CHAN_TIME_DUR_SAR5K_DCU_CHAN_TIME_DUR_S 0 reg.h 　
34064
 AR5K_DCU_CHAN_TIME_ENABLEAR5K_DCU_CHAN_TIME_ENABLE 0x00100000 reg.h Enable channel time
34065
 AR5K_DCU_MISC_BASEAR5K_DCU_MISC_BASE 0x1100 reg.h Register Address -Queue0 DCU_MISC
34066
 AR5K_DCU_MISC_BACKOFFAR5K_DCU_MISC_BACKOFF 0x0000003f reg.h Mask for backoff threshold
34067
 AR5K_DCU_MISC_ETS_RTS_POLAR5K_DCU_MISC_ETS_RTS_POL 0x00000040 reg.h End of transmission series
34068
 AR5K_DCU_MISC_ETS_CW_POLAR5K_DCU_MISC_ETS_CW_POL 0x00000080 reg.h End of transmission series
34069
 AR5K_DCU_MISC_FRAG_WAITAR5K_DCU_MISC_FRAG_WAIT 0x00000100 reg.h Wait for next fragment
34070
 AR5K_DCU_MISC_BACKOFF_FRAGAR5K_DCU_MISC_BACKOFF_FRAG 0x00000200 reg.h Enable backoff while bursting
34071
 AR5K_DCU_MISC_HCFPOLL_ENABLEAR5K_DCU_MISC_HCFPOLL_ENABLE 0x00000800 reg.h CF - Poll enable
34072
 AR5K_DCU_MISC_BACKOFF_PERSISTAR5K_DCU_MISC_BACKOFF_PERSIST 0x00001000 reg.h Persistent backoff
34073
 AR5K_DCU_MISC_FRMPRFTCH_ENABLEAR5K_DCU_MISC_FRMPRFTCH_ENABLE 0x00002000 reg.h Enable frame pre-fetch
34074
 AR5K_DCU_MISC_VIRTCOLAR5K_DCU_MISC_VIRTCOL 0x0000c000 reg.h Mask for Virtual Collision (?)
34075
 AR5K_DCU_MISC_VIRTCOL_NORMALAR5K_DCU_MISC_VIRTCOL_NORMAL 0 reg.h 　
34076
 AR5K_DCU_MISC_VIRTCOL_IGNOREAR5K_DCU_MISC_VIRTCOL_IGNORE 1 reg.h 　
34077
 AR5K_DCU_MISC_BCN_ENABLEAR5K_DCU_MISC_BCN_ENABLE 0x00010000 reg.h Enable Beacon use
34078
 AR5K_DCU_MISC_ARBLOCK_CTLAR5K_DCU_MISC_ARBLOCK_CTL 0x00060000 reg.h Arbiter lockout control mask
34079
 AR5K_DCU_MISC_ARBLOCK_CTL_SAR5K_DCU_MISC_ARBLOCK_CTL_S 17 reg.h 　
34080
 AR5K_DCU_MISC_ARBLOCK_CTL_NONEAR5K_DCU_MISC_ARBLOCK_CTL_NONE 0 reg.h No arbiter lockout
34081
 AR5K_DCU_MISC_ARBLOCK_CTL_INTFRAR5K_DCU_MISC_ARBLOCK_CTL_INTFR 1 reg.h Intra-frame lockout
34082
 AR5K_DCU_MISC_ARBLOCK_CTL_GLOBAAR5K_DCU_MISC_ARBLOCK_CTL_GLOBA 2 reg.h Global lockout
34083
 AR5K_DCU_MISC_ARBLOCK_IGNOREAR5K_DCU_MISC_ARBLOCK_IGNORE 0x00080000 reg.h Ignore Arbiter lockout
34084
 AR5K_DCU_MISC_SEQ_NUM_INCR_DISAR5K_DCU_MISC_SEQ_NUM_INCR_DIS 0x00100000 reg.h Disable sequence number increment
34085
 AR5K_DCU_MISC_POST_FR_BKOFF_DISAR5K_DCU_MISC_POST_FR_BKOFF_DIS 0x00200000 reg.h Disable post-frame backoff
34086
 AR5K_DCU_MISC_VIRT_COLL_POLICYAR5K_DCU_MISC_VIRT_COLL_POLICY 0x00400000 reg.h Virtual Collision cw policy
34087
 AR5K_DCU_MISC_BLOWN_IFS_POLICYAR5K_DCU_MISC_BLOWN_IFS_POLICY 0x00800000 reg.h Blown IFS policy (?)
34088
 AR5K_DCU_MISC_SEQNUM_CTLAR5K_DCU_MISC_SEQNUM_CTL 0x01000000 reg.h Sequence number control (?)
34089
 AR5K_DCU_SEQNUM_BASEAR5K_DCU_SEQNUM_BASE 0x1140 reg.h 　
34090
 AR5K_DCU_SEQNUM_MAR5K_DCU_SEQNUM_M 0x00000fff reg.h 　
34091
 AR5K_DCU_GBL_IFS_SIFSAR5K_DCU_GBL_IFS_SIFS 0x1030 reg.h 　
34092
 AR5K_DCU_GBL_IFS_SIFS_MAR5K_DCU_GBL_IFS_SIFS_M 0x0000ffff reg.h 　
34093
 AR5K_DCU_GBL_IFS_SLOTAR5K_DCU_GBL_IFS_SLOT 0x1070 reg.h 　
34094
 AR5K_DCU_GBL_IFS_SLOT_MAR5K_DCU_GBL_IFS_SLOT_M 0x0000ffff reg.h 　
34095
 AR5K_DCU_GBL_IFS_EIFSAR5K_DCU_GBL_IFS_EIFS 0x10b0 reg.h 　
34096
 AR5K_DCU_GBL_IFS_EIFS_MAR5K_DCU_GBL_IFS_EIFS_M 0x0000ffff reg.h 　
34097
 AR5K_DCU_GBL_IFS_MISCAR5K_DCU_GBL_IFS_MISC 0x10f0 reg.h Register Address
34098
 AR5K_DCU_GBL_IFS_MISC_LFSR_SLICAR5K_DCU_GBL_IFS_MISC_LFSR_SLIC 0x00000007 reg.h LFSR Slice Select
34099
 AR5K_DCU_GBL_IFS_MISC_TURBO_MODAR5K_DCU_GBL_IFS_MISC_TURBO_MOD 0x00000008 reg.h Turbo mode
34100
 AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_ 0x000003f0 reg.h SIFS Duration mask
34101
 AR5K_DCU_GBL_IFS_MISC_USEC_DURAR5K_DCU_GBL_IFS_MISC_USEC_DUR 0x000ffc00 reg.h USEC Duration mask
34102
 AR5K_DCU_GBL_IFS_MISC_USEC_DUR_AR5K_DCU_GBL_IFS_MISC_USEC_DUR_ 10 reg.h 　
34103
 AR5K_DCU_GBL_IFS_MISC_DCU_ARB_DAR5K_DCU_GBL_IFS_MISC_DCU_ARB_D 0x00300000 reg.h DCU Arbiter delay mask
34104
 AR5K_DCU_GBL_IFS_MISC_SIFS_CNT_AR5K_DCU_GBL_IFS_MISC_SIFS_CNT_ 0x00400000 reg.h SIFS cnt reset policy (?)
34105
 AR5K_DCU_GBL_IFS_MISC_AIFS_CNT_AR5K_DCU_GBL_IFS_MISC_AIFS_CNT_ 0x00800000 reg.h AIFS cnt reset policy (?)
34106
 AR5K_DCU_GBL_IFS_MISC_RND_LFSR_AR5K_DCU_GBL_IFS_MISC_RND_LFSR_ 0x01000000 reg.h Disable random LFSR slice
34107
 AR5K_DCU_FPAR5K_DCU_FP 0x1230 reg.h Register Address
34108
 AR5K_DCU_FP_NOBURST_DCU_ENAR5K_DCU_FP_NOBURST_DCU_EN 0x00000001 reg.h Enable non-burst prefetch on DCU (?)
34109
 AR5K_DCU_FP_NOBURST_ENAR5K_DCU_FP_NOBURST_EN 0x00000010 reg.h Enable non-burst prefetch (?)
34110
 AR5K_DCU_FP_BURST_DCU_ENAR5K_DCU_FP_BURST_DCU_EN 0x00000020 reg.h Enable burst prefetch on DCU (?)
34111
 AR5K_DCU_TXPAR5K_DCU_TXP 0x1270 reg.h Register Address
34112
 AR5K_DCU_TXP_MAR5K_DCU_TXP_M 0x000003ff reg.h Tx pause mask
34113
 AR5K_DCU_TXP_STATUSAR5K_DCU_TXP_STATUS 0x00010000 reg.h Tx pause status
34114
 AR5K_DCU_TX_FILTER_0_BASEAR5K_DCU_TX_FILTER_0_BASE 0x1038 reg.h 　
34115
 AR5K_DCU_TX_FILTER_1_BASEAR5K_DCU_TX_FILTER_1_BASE 0x103c reg.h 　
34116
 AR5K_DCU_TX_FILTER_CLRAR5K_DCU_TX_FILTER_CLR 0x143c reg.h 　
34117
 AR5K_DCU_TX_FILTER_SETAR5K_DCU_TX_FILTER_SET 0x147c reg.h 　
34118
 AR5K_RESET_CTLAR5K_RESET_CTL 0x4000 reg.h Register Address
34119
 AR5K_RESET_CTL_PCUAR5K_RESET_CTL_PCU 0x00000001 reg.h Protocol Control Unit reset
34120
 AR5K_RESET_CTL_DMAAR5K_RESET_CTL_DMA 0x00000002 reg.h DMA (Rx/Tx) reset [5210]
34121
 AR5K_RESET_CTL_BASEBANDAR5K_RESET_CTL_BASEBAND 0x00000002 reg.h Baseband reset [5211+]
34122
 AR5K_RESET_CTL_MACAR5K_RESET_CTL_MAC 0x00000004 reg.h MAC reset (PCU+Baseband ?) [5210]
34123
 AR5K_RESET_CTL_PHYAR5K_RESET_CTL_PHY 0x00000008 reg.h PHY reset [5210]
34124
 AR5K_RESET_CTL_PCIAR5K_RESET_CTL_PCI 0x00000010 reg.h PCI Core reset (interrupts etc)
34125
 AR5K_SLEEP_CTLAR5K_SLEEP_CTL 0x4004 reg.h Register Address
34126
 AR5K_SLEEP_CTL_SLDURAR5K_SLEEP_CTL_SLDUR 0x0000ffff reg.h Sleep duration mask
34127
 AR5K_SLEEP_CTL_SLDUR_SAR5K_SLEEP_CTL_SLDUR_S 0 reg.h 　
34128
 AR5K_SLEEP_CTL_SLEAR5K_SLEEP_CTL_SLE 0x00030000 reg.h Sleep enable mask
34129
 AR5K_SLEEP_CTL_SLE_SAR5K_SLEEP_CTL_SLE_S 16 reg.h 　
34130
 AR5K_SLEEP_CTL_SLE_WAKEAR5K_SLEEP_CTL_SLE_WAKE 0x00000000 reg.h Force chip awake
34131
 AR5K_SLEEP_CTL_SLE_SLPAR5K_SLEEP_CTL_SLE_SLP 0x00010000 reg.h Force chip sleep
34132
 AR5K_SLEEP_CTL_SLE_ALLOWAR5K_SLEEP_CTL_SLE_ALLOW 0x00020000 reg.h Normal sleep policy
34133
 AR5K_SLEEP_CTL_SLE_UNITSAR5K_SLEEP_CTL_SLE_UNITS 0x00000008 reg.h [5211+]
34134
 AR5K_SLEEP_CTL_DUR_TIM_POLAR5K_SLEEP_CTL_DUR_TIM_POL 0x00040000 reg.h Sleep duration timing policy
34135
 AR5K_SLEEP_CTL_DUR_WRITE_POLAR5K_SLEEP_CTL_DUR_WRITE_POL 0x00080000 reg.h Sleep duration write policy
34136
 AR5K_SLEEP_CTL_SLE_POLAR5K_SLEEP_CTL_SLE_POL 0x00100000 reg.h Sleep policy mode
34137
 AR5K_INTPENDAR5K_INTPEND 0x4008 reg.h 　
34138
 AR5K_INTPEND_MAR5K_INTPEND_M 0x00000001 reg.h 　
34139
 AR5K_SFRAR5K_SFR 0x400c reg.h 　
34140
 AR5K_SFR_ENAR5K_SFR_EN 0x00000001 reg.h 　
34141
 AR5K_PCICFGAR5K_PCICFG 0x4010 reg.h Register Address
34142
 AR5K_PCICFG_EEAEAR5K_PCICFG_EEAE 0x00000001 reg.h Eeprom access enable [5210]
34143
 AR5K_PCICFG_SLEEP_CLOCK_ENAR5K_PCICFG_SLEEP_CLOCK_EN 0x00000002 reg.h Enable sleep clock
34144
 AR5K_PCICFG_CLKRUNENAR5K_PCICFG_CLKRUNEN 0x00000004 reg.h CLKRUN enable [5211+]
34145
 AR5K_PCICFG_EESIZEAR5K_PCICFG_EESIZE 0x00000018 reg.h Mask for EEPROM size [5211+]
34146
 AR5K_PCICFG_EESIZE_SAR5K_PCICFG_EESIZE_S 3 reg.h 　
34147
 AR5K_PCICFG_EESIZE_4KAR5K_PCICFG_EESIZE_4K 0 reg.h 4K
34148
 AR5K_PCICFG_EESIZE_8KAR5K_PCICFG_EESIZE_8K 1 reg.h 8K
34149
 AR5K_PCICFG_EESIZE_16KAR5K_PCICFG_EESIZE_16K 2 reg.h 16K
34150
 AR5K_PCICFG_EESIZE_FAILAR5K_PCICFG_EESIZE_FAIL 3 reg.h Failed to get size [5211+]
34151
 AR5K_PCICFG_LEDAR5K_PCICFG_LED 0x00000060 reg.h Led status [5211+]
34152
 AR5K_PCICFG_LED_NONEAR5K_PCICFG_LED_NONE 0x00000000 reg.h Default [5211+]
34153
 AR5K_PCICFG_LED_PENDAR5K_PCICFG_LED_PEND 0x00000020 reg.h Scan / Auth pending
34154
 AR5K_PCICFG_LED_ASSOCAR5K_PCICFG_LED_ASSOC 0x00000040 reg.h Associated
34155
 AR5K_PCICFG_BUS_SELAR5K_PCICFG_BUS_SEL 0x00000380 reg.h Mask for "bus select" [5211+] (?)
34156
 AR5K_PCICFG_CBEFIX_DISAR5K_PCICFG_CBEFIX_DIS 0x00000400 reg.h Disable CBE fix
34157
 AR5K_PCICFG_SL_INTENAR5K_PCICFG_SL_INTEN 0x00000800 reg.h Enable interrupts when asleep
34158
 AR5K_PCICFG_LED_BCTLAR5K_PCICFG_LED_BCTL 0x00001000 reg.h Led blink (?) [5210]
34159
 AR5K_PCICFG_RETRY_FIXAR5K_PCICFG_RETRY_FIX 0x00001000 reg.h Enable pci core retry fix
34160
 AR5K_PCICFG_SL_INPENAR5K_PCICFG_SL_INPEN 0x00002000 reg.h Sleep even whith pending interrupts
34161
 AR5K_PCICFG_SPWR_DNAR5K_PCICFG_SPWR_DN 0x00010000 reg.h Mask for power status
34162
 AR5K_PCICFG_LEDMODEAR5K_PCICFG_LEDMODE 0x000e0000 reg.h Ledmode [5211+]
34163
 AR5K_PCICFG_LEDMODE_PROPAR5K_PCICFG_LEDMODE_PROP 0x00000000 reg.h Blink on standard traffic [5211+]
34164
 AR5K_PCICFG_LEDMODE_PROMAR5K_PCICFG_LEDMODE_PROM 0x00020000 reg.h Default mode (blink on any traffic) [5211+]
34165
 AR5K_PCICFG_LEDMODE_PWRAR5K_PCICFG_LEDMODE_PWR 0x00040000 reg.h Some other blinking mode (?) [5211+]
34166
 AR5K_PCICFG_LEDMODE_RANDAR5K_PCICFG_LEDMODE_RAND 0x00060000 reg.h Random blinking (?) [5211+]
34167
 AR5K_PCICFG_LEDBLINKAR5K_PCICFG_LEDBLINK 0x00700000 reg.h Led blink rate
34168
 AR5K_PCICFG_LEDBLINK_SAR5K_PCICFG_LEDBLINK_S 20 reg.h 　
34169
 AR5K_PCICFG_LEDSLOWAR5K_PCICFG_LEDSLOW 0x00800000 reg.h Slowest led blink rate [5211+]
34170
 AR5K_PCICFG_LEDSTATEAR5K_PCICFG_LEDSTATE (AR5K_PCICFG_LED | AR5K_PCICFG_LEDMODE | \ AR5K_PCICFG_LEDBLINK | AR5K_PCICFG_LEDSLOW) reg.h 　
34171
 AR5K_PCICFG_SLEEP_CLOCK_RATEAR5K_PCICFG_SLEEP_CLOCK_RATE 0x03000000 reg.h Sleep clock rate
34172
 AR5K_PCICFG_SLEEP_CLOCK_RATE_SAR5K_PCICFG_SLEEP_CLOCK_RATE_S 24 reg.h 　
34173
 AR5K_NUM_GPIOAR5K_NUM_GPIO 6 reg.h 　
34174
 AR5K_GPIOCRAR5K_GPIOCR 0x4014 reg.h Register Address
34175
 AR5K_GPIOCR_INT_ENAAR5K_GPIOCR_INT_ENA 0x00008000 reg.h Enable GPIO interrupt
34176
 AR5K_GPIOCR_INT_SELLAR5K_GPIOCR_INT_SELL 0x00000000 reg.h Generate interrupt when pin is low
34177
 AR5K_GPIOCR_INT_SELHAR5K_GPIOCR_INT_SELH 0x00010000 reg.h Generate interrupt when pin is high
34178
 AR5K_GPIODOAR5K_GPIODO 0x4018 reg.h 　
34179
 AR5K_GPIODIAR5K_GPIODI 0x401c reg.h 　
34180
 AR5K_GPIODI_MAR5K_GPIODI_M 0x0000002f reg.h 　
34181
 AR5K_SREVAR5K_SREV 0x4020 reg.h Register Address
34182
 AR5K_SREV_REVAR5K_SREV_REV 0x0000000f reg.h Mask for revision
34183
 AR5K_SREV_REV_SAR5K_SREV_REV_S 0 reg.h 　
34184
 AR5K_SREV_VERAR5K_SREV_VER 0x000000ff reg.h Mask for version
34185
 AR5K_SREV_VER_SAR5K_SREV_VER_S 4 reg.h 　
34186
 AR5K_TXEPOSTAR5K_TXEPOST 0x4028 reg.h 　
34187
 AR5K_QCU_SLEEP_MASKAR5K_QCU_SLEEP_MASK 0x402c reg.h 　
34188
 AR5K_5414_CBCFGAR5K_5414_CBCFG 0x4068 reg.h 　
34189
 AR5K_5414_CBCFG_BUF_DISAR5K_5414_CBCFG_BUF_DIS 0x10 reg.h Disable buffer
34190
 AR5K_PCIE_PM_CTLAR5K_PCIE_PM_CTL 0x4068 reg.h Register address
34191
 AR5K_PCIE_PM_CTL_L1_WHEN_D2AR5K_PCIE_PM_CTL_L1_WHEN_D2 0x00000001 reg.h enable PCIe core enter L1
34192
 AR5K_PCIE_PM_CTL_L0_L0S_CLEARAR5K_PCIE_PM_CTL_L0_L0S_CLEAR 0x00000002 reg.h Clear L0 and L0S counters
34193
 AR5K_PCIE_PM_CTL_L0_L0S_ENAR5K_PCIE_PM_CTL_L0_L0S_EN 0x00000004 reg.h Start L0 nd L0S counters
34194
 AR5K_PCIE_PM_CTL_LDRESET_ENAR5K_PCIE_PM_CTL_LDRESET_EN 0x00000008 reg.h Enable reset when link goes
34195
 AR5K_PCIE_PM_CTL_PME_ENAR5K_PCIE_PM_CTL_PME_EN 0x00000010 reg.h PME Enable
34196
 AR5K_PCIE_PM_CTL_AUX_PWR_DETAR5K_PCIE_PM_CTL_AUX_PWR_DET 0x00000020 reg.h Aux power detect
34197
 AR5K_PCIE_PM_CTL_PME_CLEARAR5K_PCIE_PM_CTL_PME_CLEAR 0x00000040 reg.h Clear PME
34198
 AR5K_PCIE_PM_CTL_PSM_D0AR5K_PCIE_PM_CTL_PSM_D0 0x00000080 reg.h 　
34199
 AR5K_PCIE_PM_CTL_PSM_D1AR5K_PCIE_PM_CTL_PSM_D1 0x00000100 reg.h 　
34200
 AR5K_PCIE_PM_CTL_PSM_D2AR5K_PCIE_PM_CTL_PSM_D2 0x00000200 reg.h 　
34201
 AR5K_PCIE_PM_CTL_PSM_D3AR5K_PCIE_PM_CTL_PSM_D3 0x00000400 reg.h 　
34202
 AR5K_PCIE_WAENAR5K_PCIE_WAEN 0x407c reg.h 　
34203
 AR5K_PCIE_SERDESAR5K_PCIE_SERDES 0x4080 reg.h 　
34204
 AR5K_PCIE_SERDES_RESETAR5K_PCIE_SERDES_RESET 0x4084 reg.h 　
34205
 AR5K_EEPROM_BASEAR5K_EEPROM_BASE 0x6000 reg.h 　
34206
 AR5K_EEPROM_DATA_5211AR5K_EEPROM_DATA_5211 0x6004 reg.h 　
34207
 AR5K_EEPROM_DATA_5210AR5K_EEPROM_DATA_5210 0x6800 reg.h 　
34208
 AR5K_EEPROM_DATAAR5K_EEPROM_DATA (ah->ah_version == AR5K_AR5210 ? \ AR5K_EEPROM_DATA_5210 : AR5K_EEPROM_DATA_5211) reg.h 　
34209
 AR5K_EEPROM_CMDAR5K_EEPROM_CMD 0x6008 reg.h Register Addres
34210
 AR5K_EEPROM_CMD_READAR5K_EEPROM_CMD_READ 0x00000001 reg.h EEPROM read
34211
 AR5K_EEPROM_CMD_WRITEAR5K_EEPROM_CMD_WRITE 0x00000002 reg.h EEPROM write
34212
 AR5K_EEPROM_CMD_RESETAR5K_EEPROM_CMD_RESET 0x00000004 reg.h EEPROM reset
34213
 AR5K_EEPROM_STAT_5210AR5K_EEPROM_STAT_5210 0x6c00 reg.h Register Address [5210]
34214
 AR5K_EEPROM_STAT_5211AR5K_EEPROM_STAT_5211 0x600c reg.h Register Address [5211+]
34215
 AR5K_EEPROM_STATUSAR5K_EEPROM_STATUS (ah->ah_version == AR5K_AR5210 ? \ AR5K_EEPROM_STAT_5210 : AR5K_EEPROM_STAT_5211) reg.h 　
34216
 AR5K_EEPROM_STAT_RDERRAR5K_EEPROM_STAT_RDERR 0x00000001 reg.h EEPROM read failed
34217
 AR5K_EEPROM_STAT_RDDONEAR5K_EEPROM_STAT_RDDONE 0x00000002 reg.h EEPROM read successful
34218
 AR5K_EEPROM_STAT_WRERRAR5K_EEPROM_STAT_WRERR 0x00000004 reg.h EEPROM write failed
34219
 AR5K_EEPROM_STAT_WRDONEAR5K_EEPROM_STAT_WRDONE 0x00000008 reg.h EEPROM write successful
34220
 AR5K_EEPROM_CFGAR5K_EEPROM_CFG 0x6010 reg.h Register Addres
34221
 AR5K_EEPROM_CFG_SIZEAR5K_EEPROM_CFG_SIZE 0x00000003 reg.h Size determination override
34222
 AR5K_EEPROM_CFG_SIZE_AUTOAR5K_EEPROM_CFG_SIZE_AUTO 0 reg.h 　
34223
 AR5K_EEPROM_CFG_SIZE_4KBITAR5K_EEPROM_CFG_SIZE_4KBIT 1 reg.h 　
34224
 AR5K_EEPROM_CFG_SIZE_8KBITAR5K_EEPROM_CFG_SIZE_8KBIT 2 reg.h 　
34225
 AR5K_EEPROM_CFG_SIZE_16KBITAR5K_EEPROM_CFG_SIZE_16KBIT 3 reg.h 　
34226
 AR5K_EEPROM_CFG_WR_WAIT_DISAR5K_EEPROM_CFG_WR_WAIT_DIS 0x00000004 reg.h Disable write wait
34227
 AR5K_EEPROM_CFG_CLK_RATEAR5K_EEPROM_CFG_CLK_RATE 0x00000018 reg.h Clock rate
34228
 AR5K_EEPROM_CFG_CLK_RATE_SAR5K_EEPROM_CFG_CLK_RATE_S 3 reg.h 　
34229
 AR5K_EEPROM_CFG_CLK_RATE_156KHZAR5K_EEPROM_CFG_CLK_RATE_156KHZ 0 reg.h 　
34230
 AR5K_EEPROM_CFG_CLK_RATE_312KHZAR5K_EEPROM_CFG_CLK_RATE_312KHZ 1 reg.h 　
34231
 AR5K_EEPROM_CFG_CLK_RATE_625KHZAR5K_EEPROM_CFG_CLK_RATE_625KHZ 2 reg.h 　
34232
 AR5K_EEPROM_CFG_PROT_KEYAR5K_EEPROM_CFG_PROT_KEY 0x00ffff00 reg.h Protection key
34233
 AR5K_EEPROM_CFG_PROT_KEY_SAR5K_EEPROM_CFG_PROT_KEY_S 8 reg.h 　
34234
 AR5K_EEPROM_CFG_LIND_ENAR5K_EEPROM_CFG_LIND_EN 0x01000000 reg.h Enable length indicator (?)
34235
 AR5K_PCU_MINAR5K_PCU_MIN 0x8000 reg.h 　
34236
 AR5K_PCU_MAXAR5K_PCU_MAX 0x8fff reg.h 　
34237
 AR5K_STA_ID0AR5K_STA_ID0 0x8000 reg.h 　
34238
 AR5K_STA_ID0_ARRD_L32AR5K_STA_ID0_ARRD_L32 0xffffffff reg.h 　
34239
 AR5K_STA_ID1AR5K_STA_ID1 0x8004 reg.h Register Address
34240
 AR5K_STA_ID1_ADDR_U16AR5K_STA_ID1_ADDR_U16 0x0000ffff reg.h Upper 16 bits of MAC addres
34241
 AR5K_STA_ID1_APAR5K_STA_ID1_AP 0x00010000 reg.h Set AP mode
34242
 AR5K_STA_ID1_ADHOCAR5K_STA_ID1_ADHOC 0x00020000 reg.h Set Ad-Hoc mode
34243
 AR5K_STA_ID1_PWR_SVAR5K_STA_ID1_PWR_SV 0x00040000 reg.h Power save reporting
34244
 AR5K_STA_ID1_NO_KEYSRCHAR5K_STA_ID1_NO_KEYSRCH 0x00080000 reg.h No key search
34245
 AR5K_STA_ID1_NO_PSPOLLAR5K_STA_ID1_NO_PSPOLL 0x00100000 reg.h No power save polling [5210]
34246
 AR5K_STA_ID1_PCF_5211AR5K_STA_ID1_PCF_5211 0x00100000 reg.h Enable PCF on [5211+]
34247
 AR5K_STA_ID1_PCF_5210AR5K_STA_ID1_PCF_5210 0x00200000 reg.h Enable PCF on [5210]
34248
 AR5K_STA_ID1_PCFAR5K_STA_ID1_PCF (ah->ah_version == AR5K_AR5210 ? \ AR5K_STA_ID1_PCF_5210 : AR5K_STA_ID1_PCF_5211) reg.h 　
34249
 AR5K_STA_ID1_DEFAULT_ANTENNAAR5K_STA_ID1_DEFAULT_ANTENNA 0x00200000 reg.h Use default antenna
34250
 AR5K_STA_ID1_DESC_ANTENNAAR5K_STA_ID1_DESC_ANTENNA 0x00400000 reg.h Update antenna from descriptor
34251
 AR5K_STA_ID1_RTS_DEF_ANTENNAAR5K_STA_ID1_RTS_DEF_ANTENNA 0x00800000 reg.h Use default antenna for RTS
34252
 AR5K_STA_ID1_ACKCTS_6MBAR5K_STA_ID1_ACKCTS_6MB 0x01000000 reg.h Use 6Mbit/s for ACK/CTS
34253
 AR5K_STA_ID1_BASE_RATE_11BAR5K_STA_ID1_BASE_RATE_11B 0x02000000 reg.h Use 11b base rate for ACK/CTS [5211+]
34254
 AR5K_STA_ID1_SELFGEN_DEF_ANTAR5K_STA_ID1_SELFGEN_DEF_ANT 0x04000000 reg.h Use def. antenna for self generated frames
34255
 AR5K_STA_ID1_CRYPT_MIC_ENAR5K_STA_ID1_CRYPT_MIC_EN 0x08000000 reg.h Enable MIC
34256
 AR5K_STA_ID1_KEYSRCH_MODEAR5K_STA_ID1_KEYSRCH_MODE 0x10000000 reg.h Look up key when key id != 0
34257
 AR5K_STA_ID1_PRESERVE_SEQ_NUMAR5K_STA_ID1_PRESERVE_SEQ_NUM 0x20000000 reg.h Preserve sequence number
34258
 AR5K_STA_ID1_CBCIV_ENDIANAR5K_STA_ID1_CBCIV_ENDIAN 0x40000000 reg.h ???
34259
 AR5K_STA_ID1_KEYSRCH_MCASTAR5K_STA_ID1_KEYSRCH_MCAST 0x80000000 reg.h Do key cache search for mcast frames
34260
 AR5K_BSS_ID0AR5K_BSS_ID0 0x8008 reg.h 　
34261
 AR5K_BSS_ID1AR5K_BSS_ID1 0x800c reg.h 　
34262
 AR5K_BSS_ID1_AIDAR5K_BSS_ID1_AID 0xffff0000 reg.h 　
34263
 AR5K_BSS_ID1_AID_SAR5K_BSS_ID1_AID_S 16 reg.h 　
34264
 AR5K_SLOT_TIMEAR5K_SLOT_TIME 0x8010 reg.h 　
34265
 AR5K_TIME_OUTAR5K_TIME_OUT 0x8014 reg.h Register Address
34266
 AR5K_TIME_OUT_ACKAR5K_TIME_OUT_ACK 0x00001fff reg.h ACK timeout mask
34267
 AR5K_TIME_OUT_ACK_SAR5K_TIME_OUT_ACK_S 0 reg.h 　
34268
 AR5K_TIME_OUT_CTSAR5K_TIME_OUT_CTS 0x1fff0000 reg.h CTS timeout mask
34269
 AR5K_TIME_OUT_CTS_SAR5K_TIME_OUT_CTS_S 16 reg.h 　
34270
 AR5K_RSSI_THRAR5K_RSSI_THR 0x8018 reg.h Register Address
34271
 AR5K_RSSI_THR_MAR5K_RSSI_THR_M 0x000000ff reg.h Mask for RSSI threshold [5211+]
34272
 AR5K_RSSI_THR_BMISS_5210AR5K_RSSI_THR_BMISS_5210 0x00000700 reg.h Mask for Beacon Missed threshold [5210]
34273
 AR5K_RSSI_THR_BMISS_5210_SAR5K_RSSI_THR_BMISS_5210_S 8 reg.h 　
34274
 AR5K_RSSI_THR_BMISS_5211AR5K_RSSI_THR_BMISS_5211 0x0000ff00 reg.h Mask for Beacon Missed threshold [5211+]
34275
 AR5K_RSSI_THR_BMISS_5211_SAR5K_RSSI_THR_BMISS_5211_S 8 reg.h 　
34276
 AR5K_RSSI_THR_BMISSAR5K_RSSI_THR_BMISS (ah->ah_version == AR5K_AR5210 ? \ AR5K_RSSI_THR_BMISS_5210 : AR5K_RSSI_THR_BMISS_5211) reg.h 　
34277
 AR5K_RSSI_THR_BMISS_SAR5K_RSSI_THR_BMISS_S 8 reg.h 　
34278
 AR5K_NODCU_RETRY_LMTAR5K_NODCU_RETRY_LMT 0x801c reg.h Register Address
34279
 AR5K_NODCU_RETRY_LMT_SH_RETRYAR5K_NODCU_RETRY_LMT_SH_RETRY 0x0000000f reg.h Short retry limit mask
34280
 AR5K_NODCU_RETRY_LMT_SH_RETRY_SAR5K_NODCU_RETRY_LMT_SH_RETRY_S 0 reg.h 　
34281
 AR5K_NODCU_RETRY_LMT_LG_RETRYAR5K_NODCU_RETRY_LMT_LG_RETRY 0x000000f0 reg.h Long retry mask
34282
 AR5K_NODCU_RETRY_LMT_LG_RETRY_SAR5K_NODCU_RETRY_LMT_LG_RETRY_S 4 reg.h 　
34283
 AR5K_NODCU_RETRY_LMT_SSH_RETRYAR5K_NODCU_RETRY_LMT_SSH_RETRY 0x00003f00 reg.h Station short retry limit mask
34284
 AR5K_NODCU_RETRY_LMT_SSH_RETRY_AR5K_NODCU_RETRY_LMT_SSH_RETRY_ 8 reg.h 　
34285
 AR5K_NODCU_RETRY_LMT_SLG_RETRYAR5K_NODCU_RETRY_LMT_SLG_RETRY 0x000fc000 reg.h Station long retry limit mask
34286
 AR5K_NODCU_RETRY_LMT_SLG_RETRY_AR5K_NODCU_RETRY_LMT_SLG_RETRY_ 14 reg.h 　
34287
 AR5K_NODCU_RETRY_LMT_CW_MINAR5K_NODCU_RETRY_LMT_CW_MIN 0x3ff00000 reg.h Minimum contention window mask
34288
 AR5K_NODCU_RETRY_LMT_CW_MIN_SAR5K_NODCU_RETRY_LMT_CW_MIN_S 20 reg.h 　
34289
 AR5K_USEC_5210AR5K_USEC_5210 0x8020 reg.h Register Address [5210]
34290
 AR5K_USEC_5211AR5K_USEC_5211 0x801c reg.h Register Address [5211+]
34291
 AR5K_USECAR5K_USEC (ah->ah_version == AR5K_AR5210 ? \ AR5K_USEC_5210 : AR5K_USEC_5211) reg.h 　
34292
 AR5K_USEC_1AR5K_USEC_1 0x0000007f reg.h clock cycles for 1us
34293
 AR5K_USEC_1_SAR5K_USEC_1_S 0 reg.h 　
34294
 AR5K_USEC_32AR5K_USEC_32 0x00003f80 reg.h clock cycles for 1us while on 32Mhz clock
34295
 AR5K_USEC_32_SAR5K_USEC_32_S 7 reg.h 　
34296
 AR5K_USEC_TX_LATENCY_5211AR5K_USEC_TX_LATENCY_5211 0x007fc000 reg.h 　
34297
 AR5K_USEC_TX_LATENCY_5211_SAR5K_USEC_TX_LATENCY_5211_S 14 reg.h 　
34298
 AR5K_USEC_RX_LATENCY_5211AR5K_USEC_RX_LATENCY_5211 0x1f800000 reg.h 　
34299
 AR5K_USEC_RX_LATENCY_5211_SAR5K_USEC_RX_LATENCY_5211_S 23 reg.h 　
34300
 AR5K_USEC_TX_LATENCY_5210AR5K_USEC_TX_LATENCY_5210 0x000fc000 reg.h also for 5311
34301
 AR5K_USEC_TX_LATENCY_5210_SAR5K_USEC_TX_LATENCY_5210_S 14 reg.h 　
34302
 AR5K_USEC_RX_LATENCY_5210AR5K_USEC_RX_LATENCY_5210 0x03f00000 reg.h also for 5311
34303
 AR5K_USEC_RX_LATENCY_5210_SAR5K_USEC_RX_LATENCY_5210_S 20 reg.h 　
34304
 AR5K_BEACON_5210AR5K_BEACON_5210 0x8024 reg.h Register Address [5210]
34305
 AR5K_BEACON_5211AR5K_BEACON_5211 0x8020 reg.h Register Address [5211+]
34306
 AR5K_BEACONAR5K_BEACON (ah->ah_version == AR5K_AR5210 ? \ AR5K_BEACON_5210 : AR5K_BEACON_5211) reg.h 　
34307
 AR5K_BEACON_PERIODAR5K_BEACON_PERIOD 0x0000ffff reg.h Mask for beacon period
34308
 AR5K_BEACON_PERIOD_SAR5K_BEACON_PERIOD_S 0 reg.h 　
34309
 AR5K_BEACON_TIMAR5K_BEACON_TIM 0x007f0000 reg.h Mask for TIM offset
34310
 AR5K_BEACON_TIM_SAR5K_BEACON_TIM_S 16 reg.h 　
34311
 AR5K_BEACON_ENABLEAR5K_BEACON_ENABLE 0x00800000 reg.h Enable beacons
34312
 AR5K_BEACON_RESET_TSFAR5K_BEACON_RESET_TSF 0x01000000 reg.h Force TSF reset
34313
 AR5K_CFP_PERIOD_5210AR5K_CFP_PERIOD_5210 0x8028 reg.h 　
34314
 AR5K_CFP_PERIOD_5211AR5K_CFP_PERIOD_5211 0x8024 reg.h 　
34315
 AR5K_CFP_PERIODAR5K_CFP_PERIOD (ah->ah_version == AR5K_AR5210 ? \ AR5K_CFP_PERIOD_5210 : AR5K_CFP_PERIOD_5211) reg.h 　
34316
 AR5K_TIMER0_5210AR5K_TIMER0_5210 0x802c reg.h 　
34317
 AR5K_TIMER0_5211AR5K_TIMER0_5211 0x8028 reg.h 　
34318
 AR5K_TIMER0AR5K_TIMER0 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER0_5210 : AR5K_TIMER0_5211) reg.h 　
34319
 AR5K_TIMER1_5210AR5K_TIMER1_5210 0x8030 reg.h 　
34320
 AR5K_TIMER1_5211AR5K_TIMER1_5211 0x802c reg.h 　
34321
 AR5K_TIMER1AR5K_TIMER1 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER1_5210 : AR5K_TIMER1_5211) reg.h 　
34322
 AR5K_TIMER2_5210AR5K_TIMER2_5210 0x8034 reg.h 　
34323
 AR5K_TIMER2_5211AR5K_TIMER2_5211 0x8030 reg.h 　
34324
 AR5K_TIMER2AR5K_TIMER2 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER2_5210 : AR5K_TIMER2_5211) reg.h 　
34325
 AR5K_TIMER3_5210AR5K_TIMER3_5210 0x8038 reg.h 　
34326
 AR5K_TIMER3_5211AR5K_TIMER3_5211 0x8034 reg.h 　
34327
 AR5K_TIMER3AR5K_TIMER3 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TIMER3_5210 : AR5K_TIMER3_5211) reg.h 　
34328
 AR5K_IFS0AR5K_IFS0 0x8040 reg.h 　
34329
 AR5K_IFS0_SIFSAR5K_IFS0_SIFS 0x000007ff reg.h 　
34330
 AR5K_IFS0_SIFS_SAR5K_IFS0_SIFS_S 0 reg.h 　
34331
 AR5K_IFS0_DIFSAR5K_IFS0_DIFS 0x007ff800 reg.h 　
34332
 AR5K_IFS0_DIFS_SAR5K_IFS0_DIFS_S 11 reg.h 　
34333
 AR5K_IFS1AR5K_IFS1 0x8044 reg.h 　
34334
 AR5K_IFS1_PIFSAR5K_IFS1_PIFS 0x00000fff reg.h 　
34335
 AR5K_IFS1_PIFS_SAR5K_IFS1_PIFS_S 0 reg.h 　
34336
 AR5K_IFS1_EIFSAR5K_IFS1_EIFS 0x03fff000 reg.h 　
34337
 AR5K_IFS1_EIFS_SAR5K_IFS1_EIFS_S 12 reg.h 　
34338
 AR5K_IFS1_CS_ENAR5K_IFS1_CS_EN 0x04000000 reg.h 　
34339
 AR5K_CFP_DUR_5210AR5K_CFP_DUR_5210 0x8048 reg.h 　
34340
 AR5K_CFP_DUR_5211AR5K_CFP_DUR_5211 0x8038 reg.h 　
34341
 AR5K_CFP_DURAR5K_CFP_DUR (ah->ah_version == AR5K_AR5210 ? \ AR5K_CFP_DUR_5210 : AR5K_CFP_DUR_5211) reg.h 　
34342
 AR5K_RX_FILTER_5210AR5K_RX_FILTER_5210 0x804c reg.h Register Address [5210]
34343
 AR5K_RX_FILTER_5211AR5K_RX_FILTER_5211 0x803c reg.h Register Address [5211+]
34344
 AR5K_RX_FILTERAR5K_RX_FILTER (ah->ah_version == AR5K_AR5210 ? \ AR5K_RX_FILTER_5210 : AR5K_RX_FILTER_5211) reg.h 　
34345
 AR5K_RX_FILTER_UCASTAR5K_RX_FILTER_UCAST 0x00000001 reg.h Don't filter unicast frames
34346
 AR5K_RX_FILTER_MCASTAR5K_RX_FILTER_MCAST 0x00000002 reg.h Don't filter multicast frames
34347
 AR5K_RX_FILTER_BCASTAR5K_RX_FILTER_BCAST 0x00000004 reg.h Don't filter broadcast frames
34348
 AR5K_RX_FILTER_CONTROLAR5K_RX_FILTER_CONTROL 0x00000008 reg.h Don't filter control frames
34349
 AR5K_RX_FILTER_BEACONAR5K_RX_FILTER_BEACON 0x00000010 reg.h Don't filter beacon frames
34350
 AR5K_RX_FILTER_PROMAR5K_RX_FILTER_PROM 0x00000020 reg.h Set promiscuous mode
34351
 AR5K_RX_FILTER_XRPOLLAR5K_RX_FILTER_XRPOLL 0x00000040 reg.h Don't filter XR poll frame [5212+]
34352
 AR5K_RX_FILTER_PROBEREQAR5K_RX_FILTER_PROBEREQ 0x00000080 reg.h Don't filter probe requests [5212+]
34353
 AR5K_RX_FILTER_PHYERR_5212AR5K_RX_FILTER_PHYERR_5212 0x00000100 reg.h Don't filter phy errors [5212+]
34354
 AR5K_RX_FILTER_RADARERR_5212AR5K_RX_FILTER_RADARERR_5212 0x00000200 reg.h Don't filter phy radar errors [5212+]
34355
 AR5K_RX_FILTER_PHYERR_5211AR5K_RX_FILTER_PHYERR_5211 0x00000040 reg.h [5211]
34356
 AR5K_RX_FILTER_RADARERR_5211AR5K_RX_FILTER_RADARERR_5211 0x00000080 reg.h [5211]
34357
 AR5K_RX_FILTER_PHYERRAR5K_RX_FILTER_PHYERR ((ah->ah_version == AR5K_AR5211 ? \ AR5K_RX_FILTER_PHYERR_5211 : AR5K_RX_FILTER_PHYERR_5212)) reg.h 　
34358
 AR5K_RX_FILTER_RADARERRAR5K_RX_FILTER_RADARERR ((ah->ah_version == AR5K_AR5211 ? \ AR5K_RX_FILTER_RADARERR_5211 : AR5K_RX_FILTER_RADARERR_5212)) reg.h 　
34359
 AR5K_MCAST_FILTER0_5210AR5K_MCAST_FILTER0_5210 0x8050 reg.h 　
34360
 AR5K_MCAST_FILTER0_5211AR5K_MCAST_FILTER0_5211 0x8040 reg.h 　
34361
 AR5K_MCAST_FILTER0AR5K_MCAST_FILTER0 (ah->ah_version == AR5K_AR5210 ? \ AR5K_MCAST_FILTER0_5210 : AR5K_MCAST_FILTER0_5211) reg.h 　
34362
 AR5K_MCAST_FILTER1_5210AR5K_MCAST_FILTER1_5210 0x8054 reg.h 　
34363
 AR5K_MCAST_FILTER1_5211AR5K_MCAST_FILTER1_5211 0x8044 reg.h 　
34364
 AR5K_MCAST_FILTER1AR5K_MCAST_FILTER1 (ah->ah_version == AR5K_AR5210 ? \ AR5K_MCAST_FILTER1_5210 : AR5K_MCAST_FILTER1_5211) reg.h 　
34365
 AR5K_TX_MASK0AR5K_TX_MASK0 0x8058 reg.h 　
34366
 AR5K_TX_MASK1AR5K_TX_MASK1 0x805c reg.h 　
34367
 AR5K_CLR_TMASKAR5K_CLR_TMASK 0x8060 reg.h 　
34368
 AR5K_TRIG_LVLAR5K_TRIG_LVL 0x8064 reg.h 　
34369
 AR5K_DIAG_SW_5210AR5K_DIAG_SW_5210 0x8068 reg.h Register Address [5210]
34370
 AR5K_DIAG_SW_5211AR5K_DIAG_SW_5211 0x8048 reg.h Register Address [5211+]
34371
 AR5K_DIAG_SWAR5K_DIAG_SW (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_5210 : AR5K_DIAG_SW_5211) reg.h 　
34372
 AR5K_DIAG_SW_DIS_WEP_ACKAR5K_DIAG_SW_DIS_WEP_ACK 0x00000001 reg.h Disable ACKs if WEP key is invalid
34373
 AR5K_DIAG_SW_DIS_ACKAR5K_DIAG_SW_DIS_ACK 0x00000002 reg.h Disable ACKs
34374
 AR5K_DIAG_SW_DIS_CTSAR5K_DIAG_SW_DIS_CTS 0x00000004 reg.h Disable CTSs
34375
 AR5K_DIAG_SW_DIS_ENCAR5K_DIAG_SW_DIS_ENC 0x00000008 reg.h Disable encryption
34376
 AR5K_DIAG_SW_DIS_DECAR5K_DIAG_SW_DIS_DEC 0x00000010 reg.h Disable decryption
34377
 AR5K_DIAG_SW_DIS_TXAR5K_DIAG_SW_DIS_TX 0x00000020 reg.h Disable transmit [5210]
34378
 AR5K_DIAG_SW_DIS_RX_5210AR5K_DIAG_SW_DIS_RX_5210 0x00000040 reg.h Disable recieve
34379
 AR5K_DIAG_SW_DIS_RX_5211AR5K_DIAG_SW_DIS_RX_5211 0x00000020 reg.h 　
34380
 AR5K_DIAG_SW_DIS_RXAR5K_DIAG_SW_DIS_RX (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_DIS_RX_5210 : AR5K_DIAG_SW_DIS_RX_5211) reg.h 　
34381
 AR5K_DIAG_SW_LOOP_BACK_5210AR5K_DIAG_SW_LOOP_BACK_5210 0x00000080 reg.h Loopback (i guess it goes with DIS_TX) [5210]
34382
 AR5K_DIAG_SW_LOOP_BACK_5211AR5K_DIAG_SW_LOOP_BACK_5211 0x00000040 reg.h 　
34383
 AR5K_DIAG_SW_LOOP_BACKAR5K_DIAG_SW_LOOP_BACK (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_LOOP_BACK_5210 : AR5K_DIAG_SW_LOOP_BACK_5211) reg.h 　
34384
 AR5K_DIAG_SW_CORR_FCS_5210AR5K_DIAG_SW_CORR_FCS_5210 0x00000100 reg.h Corrupted FCS
34385
 AR5K_DIAG_SW_CORR_FCS_5211AR5K_DIAG_SW_CORR_FCS_5211 0x00000080 reg.h 　
34386
 AR5K_DIAG_SW_CORR_FCSAR5K_DIAG_SW_CORR_FCS (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_CORR_FCS_5210 : AR5K_DIAG_SW_CORR_FCS_5211) reg.h 　
34387
 AR5K_DIAG_SW_CHAN_INFO_5210AR5K_DIAG_SW_CHAN_INFO_5210 0x00000200 reg.h Dump channel info
34388
 AR5K_DIAG_SW_CHAN_INFO_5211AR5K_DIAG_SW_CHAN_INFO_5211 0x00000100 reg.h 　
34389
 AR5K_DIAG_SW_CHAN_INFOAR5K_DIAG_SW_CHAN_INFO (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_CHAN_INFO_5210 : AR5K_DIAG_SW_CHAN_INFO_5211) reg.h 　
34390
 AR5K_DIAG_SW_EN_SCRAM_SEED_5210AR5K_DIAG_SW_EN_SCRAM_SEED_5210 0x00000400 reg.h Enable fixed scrambler seed
34391
 AR5K_DIAG_SW_EN_SCRAM_SEED_5211AR5K_DIAG_SW_EN_SCRAM_SEED_5211 0x00000200 reg.h 　
34392
 AR5K_DIAG_SW_EN_SCRAM_SEEDAR5K_DIAG_SW_EN_SCRAM_SEED (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_EN_SCRAM_SEED_5210 : AR5K_DIAG_SW_EN_SCRAM_SEED_5211) reg.h 　
34393
 AR5K_DIAG_SW_ECO_ENABLEAR5K_DIAG_SW_ECO_ENABLE 0x00000400 reg.h [5211+]
34394
 AR5K_DIAG_SW_SCVRAM_SEEDAR5K_DIAG_SW_SCVRAM_SEED 0x0003f800 reg.h [5210]
34395
 AR5K_DIAG_SW_SCRAM_SEED_MAR5K_DIAG_SW_SCRAM_SEED_M 0x0001fc00 reg.h Scrambler seed mask
34396
 AR5K_DIAG_SW_SCRAM_SEED_SAR5K_DIAG_SW_SCRAM_SEED_S 10 reg.h 　
34397
 AR5K_DIAG_SW_DIS_SEQ_INCAR5K_DIAG_SW_DIS_SEQ_INC 0x00040000 reg.h Disable seqnum increment (?)[5210]
34398
 AR5K_DIAG_SW_FRAME_NV0_5210AR5K_DIAG_SW_FRAME_NV0_5210 0x00080000 reg.h 　
34399
 AR5K_DIAG_SW_FRAME_NV0_5211AR5K_DIAG_SW_FRAME_NV0_5211 0x00020000 reg.h Accept frames of non-zero protocol number
34400
 AR5K_DIAG_SW_FRAME_NV0AR5K_DIAG_SW_FRAME_NV0 (ah->ah_version == AR5K_AR5210 ? \ AR5K_DIAG_SW_FRAME_NV0_5210 : AR5K_DIAG_SW_FRAME_NV0_5211) reg.h 　
34401
 AR5K_DIAG_SW_OBSPT_MAR5K_DIAG_SW_OBSPT_M 0x000c0000 reg.h Observation point select (?)
34402
 AR5K_DIAG_SW_OBSPT_SAR5K_DIAG_SW_OBSPT_S 18 reg.h 　
34403
 AR5K_DIAG_SW_RX_CLEAR_HIGHAR5K_DIAG_SW_RX_CLEAR_HIGH 0x0010000 reg.h Force RX Clear high
34404
 AR5K_DIAG_SW_IGNORE_CARR_SENSEAR5K_DIAG_SW_IGNORE_CARR_SENSE 0x0020000 reg.h Ignore virtual carrier sense
34405
 AR5K_DIAG_SW_CHANEL_IDLE_HIGHAR5K_DIAG_SW_CHANEL_IDLE_HIGH 0x0040000 reg.h Force channel idle high
34406
 AR5K_DIAG_SW_PHEAR_MEAR5K_DIAG_SW_PHEAR_ME 0x0080000 reg.h ???
34407
 AR5K_TSF_L32_5210AR5K_TSF_L32_5210 0x806c reg.h 　
34408
 AR5K_TSF_L32_5211AR5K_TSF_L32_5211 0x804c reg.h 　
34409
 AR5K_TSF_L32AR5K_TSF_L32 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TSF_L32_5210 : AR5K_TSF_L32_5211) reg.h 　
34410
 AR5K_TSF_U32_5210AR5K_TSF_U32_5210 0x8070 reg.h 　
34411
 AR5K_TSF_U32_5211AR5K_TSF_U32_5211 0x8050 reg.h 　
34412
 AR5K_TSF_U32AR5K_TSF_U32 (ah->ah_version == AR5K_AR5210 ? \ AR5K_TSF_U32_5210 : AR5K_TSF_U32_5211) reg.h 　
34413
 AR5K_LAST_TSTPAR5K_LAST_TSTP 0x8080 reg.h 　
34414
 AR5K_ADDAC_TESTAR5K_ADDAC_TEST 0x8054 reg.h Register Address
34415
 AR5K_ADDAC_TEST_TXCONTAR5K_ADDAC_TEST_TXCONT 0x00000001 reg.h Test continuous tx
34416
 AR5K_ADDAC_TEST_TST_MODEAR5K_ADDAC_TEST_TST_MODE 0x00000002 reg.h Test mode
34417
 AR5K_ADDAC_TEST_LOOP_ENAR5K_ADDAC_TEST_LOOP_EN 0x00000004 reg.h Enable loop
34418
 AR5K_ADDAC_TEST_LOOP_LENAR5K_ADDAC_TEST_LOOP_LEN 0x00000008 reg.h Loop length (field)
34419
 AR5K_ADDAC_TEST_USE_U8AR5K_ADDAC_TEST_USE_U8 0x00004000 reg.h Use upper 8 bits
34420
 AR5K_ADDAC_TEST_MSBAR5K_ADDAC_TEST_MSB 0x00008000 reg.h State of MSB
34421
 AR5K_ADDAC_TEST_TRIG_SELAR5K_ADDAC_TEST_TRIG_SEL 0x00010000 reg.h Trigger select
34422
 AR5K_ADDAC_TEST_TRIG_PTYAR5K_ADDAC_TEST_TRIG_PTY 0x00020000 reg.h Trigger polarity
34423
 AR5K_ADDAC_TEST_RXCONTAR5K_ADDAC_TEST_RXCONT 0x00040000 reg.h Continuous capture
34424
 AR5K_ADDAC_TEST_CAPTUREAR5K_ADDAC_TEST_CAPTURE 0x00080000 reg.h Begin capture
34425
 AR5K_ADDAC_TEST_TST_ARMAR5K_ADDAC_TEST_TST_ARM 0x00100000 reg.h ARM rx buffer for capture
34426
 AR5K_DEFAULT_ANTENNAAR5K_DEFAULT_ANTENNA 0x8058 reg.h 　
34427
 AR5K_FRAME_CTL_QOSMAR5K_FRAME_CTL_QOSM 0x805c reg.h 　
34428
 AR5K_SEQ_MASKAR5K_SEQ_MASK 0x8060 reg.h 　
34429
 AR5K_RETRY_CNTAR5K_RETRY_CNT 0x8084 reg.h Register Address [5210]
34430
 AR5K_RETRY_CNT_SSHAR5K_RETRY_CNT_SSH 0x0000003f reg.h Station short retry count (?)
34431
 AR5K_RETRY_CNT_SLGAR5K_RETRY_CNT_SLG 0x00000fc0 reg.h Station long retry count (?)
34432
 AR5K_BACKOFFAR5K_BACKOFF 0x8088 reg.h Register Address [5210]
34433
 AR5K_BACKOFF_CWAR5K_BACKOFF_CW 0x000003ff reg.h Backoff Contention Window (?)
34434
 AR5K_BACKOFF_CNTAR5K_BACKOFF_CNT 0x03ff0000 reg.h Backoff count (?)
34435
 AR5K_NAV_5210AR5K_NAV_5210 0x808c reg.h 　
34436
 AR5K_NAV_5211AR5K_NAV_5211 0x8084 reg.h 　
34437
 AR5K_NAVAR5K_NAV (ah->ah_version == AR5K_AR5210 ? \ AR5K_NAV_5210 : AR5K_NAV_5211) reg.h 　
34438
 AR5K_RTS_OK_5210AR5K_RTS_OK_5210 0x8090 reg.h 　
34439
 AR5K_RTS_OK_5211AR5K_RTS_OK_5211 0x8088 reg.h 　
34440
 AR5K_RTS_OKAR5K_RTS_OK (ah->ah_version == AR5K_AR5210 ? \ AR5K_RTS_OK_5210 : AR5K_RTS_OK_5211) reg.h 　
34441
 AR5K_RTS_FAIL_5210AR5K_RTS_FAIL_5210 0x8094 reg.h 　
34442
 AR5K_RTS_FAIL_5211AR5K_RTS_FAIL_5211 0x808c reg.h 　
34443
 AR5K_RTS_FAILAR5K_RTS_FAIL (ah->ah_version == AR5K_AR5210 ? \ AR5K_RTS_FAIL_5210 : AR5K_RTS_FAIL_5211) reg.h 　
34444
 AR5K_ACK_FAIL_5210AR5K_ACK_FAIL_5210 0x8098 reg.h 　
34445
 AR5K_ACK_FAIL_5211AR5K_ACK_FAIL_5211 0x8090 reg.h 　
34446
 AR5K_ACK_FAILAR5K_ACK_FAIL (ah->ah_version == AR5K_AR5210 ? \ AR5K_ACK_FAIL_5210 : AR5K_ACK_FAIL_5211) reg.h 　
34447
 AR5K_FCS_FAIL_5210AR5K_FCS_FAIL_5210 0x809c reg.h 　
34448
 AR5K_FCS_FAIL_5211AR5K_FCS_FAIL_5211 0x8094 reg.h 　
34449
 AR5K_FCS_FAILAR5K_FCS_FAIL (ah->ah_version == AR5K_AR5210 ? \ AR5K_FCS_FAIL_5210 : AR5K_FCS_FAIL_5211) reg.h 　
34450
 AR5K_BEACON_CNT_5210AR5K_BEACON_CNT_5210 0x80a0 reg.h 　
34451
 AR5K_BEACON_CNT_5211AR5K_BEACON_CNT_5211 0x8098 reg.h 　
34452
 AR5K_BEACON_CNTAR5K_BEACON_CNT (ah->ah_version == AR5K_AR5210 ? \ AR5K_BEACON_CNT_5210 : AR5K_BEACON_CNT_5211) reg.h 　
34453
 AR5K_TPCAR5K_TPC 0x80e8 reg.h 　
34454
 AR5K_TPC_ACKAR5K_TPC_ACK 0x0000003f reg.h ack frames
34455
 AR5K_TPC_ACK_SAR5K_TPC_ACK_S 0 reg.h 　
34456
 AR5K_TPC_CTSAR5K_TPC_CTS 0x00003f00 reg.h cts frames
34457
 AR5K_TPC_CTS_SAR5K_TPC_CTS_S 8 reg.h 　
34458
 AR5K_TPC_CHIRPAR5K_TPC_CHIRP 0x003f0000 reg.h chirp frames
34459
 AR5K_TPC_CHIRP_SAR5K_TPC_CHIRP_S 16 reg.h 　
34460
 AR5K_TPC_DOPPLERAR5K_TPC_DOPPLER 0x0f000000 reg.h doppler chirp span
34461
 AR5K_TPC_DOPPLER_SAR5K_TPC_DOPPLER_S 24 reg.h 　
34462
 AR5K_XRMODEAR5K_XRMODE 0x80c0 reg.h Register Address
34463
 AR5K_XRMODE_POLL_TYPE_MAR5K_XRMODE_POLL_TYPE_M 0x0000003f reg.h Mask for Poll type (?)
34464
 AR5K_XRMODE_POLL_TYPE_SAR5K_XRMODE_POLL_TYPE_S 0 reg.h 　
34465
 AR5K_XRMODE_POLL_SUBTYPE_MAR5K_XRMODE_POLL_SUBTYPE_M 0x0000003c reg.h Mask for Poll subtype (?)
34466
 AR5K_XRMODE_POLL_SUBTYPE_SAR5K_XRMODE_POLL_SUBTYPE_S 2 reg.h 　
34467
 AR5K_XRMODE_POLL_WAIT_ALLAR5K_XRMODE_POLL_WAIT_ALL 0x00000080 reg.h Wait for poll
34468
 AR5K_XRMODE_SIFS_DELAYAR5K_XRMODE_SIFS_DELAY 0x000fff00 reg.h Mask for SIFS delay
34469
 AR5K_XRMODE_FRAME_HOLD_MAR5K_XRMODE_FRAME_HOLD_M 0xfff00000 reg.h Mask for frame hold (?)
34470
 AR5K_XRMODE_FRAME_HOLD_SAR5K_XRMODE_FRAME_HOLD_S 20 reg.h 　
34471
 AR5K_XRDELAYAR5K_XRDELAY 0x80c4 reg.h Register Address
34472
 AR5K_XRDELAY_SLOT_DELAY_MAR5K_XRDELAY_SLOT_DELAY_M 0x0000ffff reg.h Mask for slot delay
34473
 AR5K_XRDELAY_SLOT_DELAY_SAR5K_XRDELAY_SLOT_DELAY_S 0 reg.h 　
34474
 AR5K_XRDELAY_CHIRP_DELAY_MAR5K_XRDELAY_CHIRP_DELAY_M 0xffff0000 reg.h Mask for CHIRP data delay
34475
 AR5K_XRDELAY_CHIRP_DELAY_SAR5K_XRDELAY_CHIRP_DELAY_S 16 reg.h 　
34476
 AR5K_XRTIMEOUTAR5K_XRTIMEOUT 0x80c8 reg.h Register Address
34477
 AR5K_XRTIMEOUT_CHIRP_MAR5K_XRTIMEOUT_CHIRP_M 0x0000ffff reg.h Mask for CHIRP timeout
34478
 AR5K_XRTIMEOUT_CHIRP_SAR5K_XRTIMEOUT_CHIRP_S 0 reg.h 　
34479
 AR5K_XRTIMEOUT_POLL_MAR5K_XRTIMEOUT_POLL_M 0xffff0000 reg.h Mask for Poll timeout
34480
 AR5K_XRTIMEOUT_POLL_SAR5K_XRTIMEOUT_POLL_S 16 reg.h 　
34481
 AR5K_XRCHIRPAR5K_XRCHIRP 0x80cc reg.h Register Address
34482
 AR5K_XRCHIRP_SENDAR5K_XRCHIRP_SEND 0x00000001 reg.h Send CHIRP
34483
 AR5K_XRCHIRP_GAPAR5K_XRCHIRP_GAP 0xffff0000 reg.h Mask for CHIRP gap (?)
34484
 AR5K_XRSTOMPAR5K_XRSTOMP 0x80d0 reg.h Register Address
34485
 AR5K_XRSTOMP_TXAR5K_XRSTOMP_TX 0x00000001 reg.h Stomp Tx (?)
34486
 AR5K_XRSTOMP_RXAR5K_XRSTOMP_RX 0x00000002 reg.h Stomp Rx (?)
34487
 AR5K_XRSTOMP_TX_RSSIAR5K_XRSTOMP_TX_RSSI 0x00000004 reg.h Stomp Tx RSSI (?)
34488
 AR5K_XRSTOMP_TX_BSSIDAR5K_XRSTOMP_TX_BSSID 0x00000008 reg.h Stomp Tx BSSID (?)
34489
 AR5K_XRSTOMP_DATAAR5K_XRSTOMP_DATA 0x00000010 reg.h Stomp data (?)
34490
 AR5K_XRSTOMP_RSSI_THRESAR5K_XRSTOMP_RSSI_THRES 0x0000ff00 reg.h Mask for XR RSSI threshold
34491
 AR5K_SLEEP0AR5K_SLEEP0 0x80d4 reg.h Register Address
34492
 AR5K_SLEEP0_NEXT_DTIMAR5K_SLEEP0_NEXT_DTIM 0x0007ffff reg.h Mask for next DTIM (?)
34493
 AR5K_SLEEP0_NEXT_DTIM_SAR5K_SLEEP0_NEXT_DTIM_S 0 reg.h 　
34494
 AR5K_SLEEP0_ASSUME_DTIMAR5K_SLEEP0_ASSUME_DTIM 0x00080000 reg.h Assume DTIM
34495
 AR5K_SLEEP0_ENH_SLEEP_ENAR5K_SLEEP0_ENH_SLEEP_EN 0x00100000 reg.h Enable enchanced sleep control
34496
 AR5K_SLEEP0_CABTOAR5K_SLEEP0_CABTO 0xff000000 reg.h Mask for CAB Time Out
34497
 AR5K_SLEEP0_CABTO_SAR5K_SLEEP0_CABTO_S 24 reg.h 　
34498
 AR5K_SLEEP1AR5K_SLEEP1 0x80d8 reg.h Register Address
34499
 AR5K_SLEEP1_NEXT_TIMAR5K_SLEEP1_NEXT_TIM 0x0007ffff reg.h Mask for next TIM (?)
34500
 AR5K_SLEEP1_NEXT_TIM_SAR5K_SLEEP1_NEXT_TIM_S 0 reg.h 　
34501
 AR5K_SLEEP1_BEACON_TOAR5K_SLEEP1_BEACON_TO 0xff000000 reg.h Mask for Beacon Time Out
34502
 AR5K_SLEEP1_BEACON_TO_SAR5K_SLEEP1_BEACON_TO_S 24 reg.h 　
34503
 AR5K_SLEEP2AR5K_SLEEP2 0x80dc reg.h Register Address
34504
 AR5K_SLEEP2_TIM_PERAR5K_SLEEP2_TIM_PER 0x0000ffff reg.h Mask for TIM period (?)
34505
 AR5K_SLEEP2_TIM_PER_SAR5K_SLEEP2_TIM_PER_S 0 reg.h 　
34506
 AR5K_SLEEP2_DTIM_PERAR5K_SLEEP2_DTIM_PER 0xffff0000 reg.h Mask for DTIM period (?)
34507
 AR5K_SLEEP2_DTIM_PER_SAR5K_SLEEP2_DTIM_PER_S 16 reg.h 　
34508
 AR5K_BSS_IDM0AR5K_BSS_IDM0 0x80e0 reg.h Upper bits
34509
 AR5K_BSS_IDM1AR5K_BSS_IDM1 0x80e4 reg.h Lower bits
34510
 AR5K_TXPCAR5K_TXPC 0x80e8 reg.h Register Address
34511
 AR5K_TXPC_ACK_MAR5K_TXPC_ACK_M 0x0000003f reg.h ACK tx power
34512
 AR5K_TXPC_ACK_SAR5K_TXPC_ACK_S 0 reg.h 　
34513
 AR5K_TXPC_CTS_MAR5K_TXPC_CTS_M 0x00003f00 reg.h CTS tx power
34514
 AR5K_TXPC_CTS_SAR5K_TXPC_CTS_S 8 reg.h 　
34515
 AR5K_TXPC_CHIRP_MAR5K_TXPC_CHIRP_M 0x003f0000 reg.h CHIRP tx power
34516
 AR5K_TXPC_CHIRP_SAR5K_TXPC_CHIRP_S 16 reg.h 　
34517
 AR5K_TXPC_DOPPLERAR5K_TXPC_DOPPLER 0x0f000000 reg.h Doppler chirp span (?)
34518
 AR5K_TXPC_DOPPLER_SAR5K_TXPC_DOPPLER_S 24 reg.h 　
34519
 AR5K_PROFCNT_TXAR5K_PROFCNT_TX 0x80ec reg.h Tx count
34520
 AR5K_PROFCNT_RXAR5K_PROFCNT_RX 0x80f0 reg.h Rx count
34521
 AR5K_PROFCNT_RXCLRAR5K_PROFCNT_RXCLR 0x80f4 reg.h Clear Rx count
34522
 AR5K_PROFCNT_CYCLEAR5K_PROFCNT_CYCLE 0x80f8 reg.h Cycle count (?)
34523
 AR5K_QUIET_CTL1AR5K_QUIET_CTL1 0x80fc reg.h Register Address
34524
 AR5K_QUIET_CTL1_NEXT_QT_TSFAR5K_QUIET_CTL1_NEXT_QT_TSF 0x0000ffff reg.h Next quiet period TSF (TU)
34525
 AR5K_QUIET_CTL1_NEXT_QT_TSF_SAR5K_QUIET_CTL1_NEXT_QT_TSF_S 0 reg.h 　
34526
 AR5K_QUIET_CTL1_QT_ENAR5K_QUIET_CTL1_QT_EN 0x00010000 reg.h Enable quiet period
34527
 AR5K_QUIET_CTL1_ACK_CTS_ENAR5K_QUIET_CTL1_ACK_CTS_EN 0x00020000 reg.h Send ACK/CTS during quiet period
34528
 AR5K_QUIET_CTL2AR5K_QUIET_CTL2 0x8100 reg.h Register Address
34529
 AR5K_QUIET_CTL2_QT_PERAR5K_QUIET_CTL2_QT_PER 0x0000ffff reg.h Mask for quiet period periodicity
34530
 AR5K_QUIET_CTL2_QT_PER_SAR5K_QUIET_CTL2_QT_PER_S 0 reg.h 　
34531
 AR5K_QUIET_CTL2_QT_DURAR5K_QUIET_CTL2_QT_DUR 0xffff0000 reg.h Mask for quiet period duration
34532
 AR5K_QUIET_CTL2_QT_DUR_SAR5K_QUIET_CTL2_QT_DUR_S 16 reg.h 　
34533
 AR5K_TSF_PARMAR5K_TSF_PARM 0x8104 reg.h Register Address
34534
 AR5K_TSF_PARM_INCAR5K_TSF_PARM_INC 0x000000ff reg.h Mask for TSF increment
34535
 AR5K_TSF_PARM_INC_SAR5K_TSF_PARM_INC_S 0 reg.h 　
34536
 AR5K_QOS_NOACKAR5K_QOS_NOACK 0x8108 reg.h Register Address
34537
 AR5K_QOS_NOACK_2BIT_VALUESAR5K_QOS_NOACK_2BIT_VALUES 0x0000000f reg.h ???
34538
 AR5K_QOS_NOACK_2BIT_VALUES_SAR5K_QOS_NOACK_2BIT_VALUES_S 0 reg.h 　
34539
 AR5K_QOS_NOACK_BIT_OFFSETAR5K_QOS_NOACK_BIT_OFFSET 0x00000070 reg.h ???
34540
 AR5K_QOS_NOACK_BIT_OFFSET_SAR5K_QOS_NOACK_BIT_OFFSET_S 4 reg.h 　
34541
 AR5K_QOS_NOACK_BYTE_OFFSETAR5K_QOS_NOACK_BYTE_OFFSET 0x00000180 reg.h ???
34542
 AR5K_QOS_NOACK_BYTE_OFFSET_SAR5K_QOS_NOACK_BYTE_OFFSET_S 7 reg.h 　
34543
 AR5K_PHY_ERR_FILAR5K_PHY_ERR_FIL 0x810c reg.h 　
34544
 AR5K_PHY_ERR_FIL_RADARAR5K_PHY_ERR_FIL_RADAR 0x00000020 reg.h Radar signal
34545
 AR5K_PHY_ERR_FIL_OFDMAR5K_PHY_ERR_FIL_OFDM 0x00020000 reg.h OFDM false detect (ANI)
34546
 AR5K_PHY_ERR_FIL_CCKAR5K_PHY_ERR_FIL_CCK 0x02000000 reg.h CCK false detect (ANI)
34547
 AR5K_XRLAT_TXAR5K_XRLAT_TX 0x8110 reg.h 　
34548
 AR5K_ACKSIFSAR5K_ACKSIFS 0x8114 reg.h Register Address
34549
 AR5K_ACKSIFS_INCAR5K_ACKSIFS_INC 0x00000000 reg.h ACK SIFS Increment (field)
34550
 AR5K_MIC_QOS_CTLAR5K_MIC_QOS_CTL 0x8118 reg.h Register Address
34551
 AR5K_MIC_QOS_CTL_MQ_ENAR5K_MIC_QOS_CTL_MQ_EN 0x00010000 reg.h Enable MIC QoS
34552
 AR5K_MIC_QOS_SELAR5K_MIC_QOS_SEL 0x811c reg.h 　
34553
 AR5K_MISC_MODEAR5K_MISC_MODE 0x8120 reg.h Register Address
34554
 AR5K_MISC_MODE_FBSSID_MATCHAR5K_MISC_MODE_FBSSID_MATCH 0x00000001 reg.h Force BSSID match
34555
 AR5K_MISC_MODE_ACKSIFS_MEMAR5K_MISC_MODE_ACKSIFS_MEM 0x00000002 reg.h ACK SIFS memory (?)
34556
 AR5K_MISC_MODE_COMBINED_MICAR5K_MISC_MODE_COMBINED_MIC 0x00000004 reg.h use rx/tx MIC key
34557
 AR5K_OFDM_FIL_CNTAR5K_OFDM_FIL_CNT 0x8124 reg.h 　
34558
 AR5K_CCK_FIL_CNTAR5K_CCK_FIL_CNT 0x8128 reg.h 　
34559
 AR5K_PHYERR_CNT1AR5K_PHYERR_CNT1 0x812c reg.h 　
34560
 AR5K_PHYERR_CNT1_MASKAR5K_PHYERR_CNT1_MASK 0x8130 reg.h 　
34561
 AR5K_PHYERR_CNT2AR5K_PHYERR_CNT2 0x8134 reg.h 　
34562
 AR5K_PHYERR_CNT2_MASKAR5K_PHYERR_CNT2_MASK 0x8138 reg.h 　
34563
 AR5K_TSF_THRESAR5K_TSF_THRES 0x813c reg.h 　
34564
 AR5K_RATE_ACKSIFS_BASEAR5K_RATE_ACKSIFS_BASE 0x8680 reg.h Register Address
34565
 AR5K_RATE_ACKSIFS_NORMALAR5K_RATE_ACKSIFS_NORMAL 0x00000001 reg.h Normal SIFS (field)
34566
 AR5K_RATE_ACKSIFS_TURBOAR5K_RATE_ACKSIFS_TURBO 0x00000400 reg.h Turbo SIFS (field)
34567
 AR5K_RATE_DUR_BASEAR5K_RATE_DUR_BASE 0x8700 reg.h 　
34568
 AR5K_RATE2DB_BASEAR5K_RATE2DB_BASE 0x87c0 reg.h 　
34569
 AR5K_DB2RATE_BASEAR5K_DB2RATE_BASE 0x87e0 reg.h 　
34570
 AR5K_KEYTABLE_0_5210AR5K_KEYTABLE_0_5210 0x9000 reg.h 　
34571
 AR5K_KEYTABLE_0_5211AR5K_KEYTABLE_0_5211 0x8800 reg.h 　
34572
 AR5K_KEYTABLE_TYPE_40AR5K_KEYTABLE_TYPE_40 0x00000000 reg.h 　
34573
 AR5K_KEYTABLE_TYPE_104AR5K_KEYTABLE_TYPE_104 0x00000001 reg.h 　
34574
 AR5K_KEYTABLE_TYPE_128AR5K_KEYTABLE_TYPE_128 0x00000003 reg.h 　
34575
 AR5K_KEYTABLE_TYPE_TKIPAR5K_KEYTABLE_TYPE_TKIP 0x00000004 reg.h [5212+]
34576
 AR5K_KEYTABLE_TYPE_AESAR5K_KEYTABLE_TYPE_AES 0x00000005 reg.h [5211+]
34577
 AR5K_KEYTABLE_TYPE_CCMAR5K_KEYTABLE_TYPE_CCM 0x00000006 reg.h [5212+]
34578
 AR5K_KEYTABLE_TYPE_NULLAR5K_KEYTABLE_TYPE_NULL 0x00000007 reg.h [5211+]
34579
 AR5K_KEYTABLE_ANTENNAAR5K_KEYTABLE_ANTENNA 0x00000008 reg.h [5212+]
34580
 AR5K_KEYTABLE_VALIDAR5K_KEYTABLE_VALID 0x00008000 reg.h 　
34581
 AR5K_KEYTABLE_MIC_OFFSETAR5K_KEYTABLE_MIC_OFFSET 64 reg.h 　
34582
 AR5K_KEYTABLE_SIZE_5210AR5K_KEYTABLE_SIZE_5210 64 reg.h 　
34583
 AR5K_KEYTABLE_SIZE_5211AR5K_KEYTABLE_SIZE_5211 128 reg.h 　
34584
 AR5K_KEYTABLE_SIZEAR5K_KEYTABLE_SIZE (ah->ah_version == AR5K_AR5210 ? \ AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211) reg.h 　
34585
 AR5K_PHY_BASEAR5K_PHY_BASE 0x9800 reg.h 　
34586
 AR5K_PHY_TST2AR5K_PHY_TST2 0x9800 reg.h Register Address
34587
 AR5K_PHY_TST2_TRIG_SELAR5K_PHY_TST2_TRIG_SEL 0x00000007 reg.h Trigger select (?)
34588
 AR5K_PHY_TST2_TRIGAR5K_PHY_TST2_TRIG 0x00000010 reg.h Trigger (?)
34589
 AR5K_PHY_TST2_CBUS_MODEAR5K_PHY_TST2_CBUS_MODE 0x00000060 reg.h Cardbus mode (?)
34590
 AR5K_PHY_TST2_CLK32AR5K_PHY_TST2_CLK32 0x00000400 reg.h CLK_OUT is CLK32 (32Khz external)
34591
 AR5K_PHY_TST2_CHANCOR_DUMP_ENAR5K_PHY_TST2_CHANCOR_DUMP_EN 0x00000800 reg.h Enable Chancor dump (?)
34592
 AR5K_PHY_TST2_EVEN_CHANCOR_DUMPAR5K_PHY_TST2_EVEN_CHANCOR_DUMP 0x00001000 reg.h Even Chancor dump (?)
34593
 AR5K_PHY_TST2_RFSILENT_ENAR5K_PHY_TST2_RFSILENT_EN 0x00002000 reg.h Enable RFSILENT
34594
 AR5K_PHY_TST2_ALT_RFDATAAR5K_PHY_TST2_ALT_RFDATA 0x00004000 reg.h Alternate RFDATA (5-2GHz switch ?)
34595
 AR5K_PHY_TST2_MINI_OBS_ENAR5K_PHY_TST2_MINI_OBS_EN 0x00008000 reg.h Enable mini OBS (?)
34596
 AR5K_PHY_TST2_RX2_IS_RX5_INVAR5K_PHY_TST2_RX2_IS_RX5_INV 0x00010000 reg.h 2GHz rx path is the 5GHz path inverted (?)
34597
 AR5K_PHY_TST2_SLOW_CLK160AR5K_PHY_TST2_SLOW_CLK160 0x00020000 reg.h Slow CLK160 (?)
34598
 AR5K_PHY_TST2_AGC_OBS_SEL_3AR5K_PHY_TST2_AGC_OBS_SEL_3 0x00040000 reg.h AGC OBS Select 3 (?)
34599
 AR5K_PHY_TST2_BBB_OBS_SELAR5K_PHY_TST2_BBB_OBS_SEL 0x00080000 reg.h BB OBS Select (field ?)
34600
 AR5K_PHY_TST2_ADC_OBS_SELAR5K_PHY_TST2_ADC_OBS_SEL 0x00800000 reg.h ADC OBS Select (field ?)
34601
 AR5K_PHY_TST2_RX_CLR_SELAR5K_PHY_TST2_RX_CLR_SEL 0x08000000 reg.h RX Clear Select (?)
34602
 AR5K_PHY_TST2_FORCE_AGC_CLRAR5K_PHY_TST2_FORCE_AGC_CLR 0x10000000 reg.h Force AGC clear (?)
34603
 AR5K_PHY_SHIFT_2GHZAR5K_PHY_SHIFT_2GHZ 0x00004007 reg.h Used to access 2GHz radios
34604
 AR5K_PHY_SHIFT_5GHZAR5K_PHY_SHIFT_5GHZ 0x00000007 reg.h Used to access 5GHz radios (default)
34605
 AR5K_PHY_TURBOAR5K_PHY_TURBO 0x9804 reg.h Register Address
34606
 AR5K_PHY_TURBO_MODEAR5K_PHY_TURBO_MODE 0x00000001 reg.h Enable turbo mode
34607
 AR5K_PHY_TURBO_SHORTAR5K_PHY_TURBO_SHORT 0x00000002 reg.h Set short symbols to turbo mode
34608
 AR5K_PHY_TURBO_MIMOAR5K_PHY_TURBO_MIMO 0x00000004 reg.h Set turbo for mimo mimo
34609
 AR5K_PHY_AGCAR5K_PHY_AGC 0x9808 reg.h Register Address
34610
 AR5K_PHY_TST1AR5K_PHY_TST1 0x9808 reg.h 　
34611
 AR5K_PHY_AGC_DISABLEAR5K_PHY_AGC_DISABLE 0x08000000 reg.h Disable AGC to A2 (?)
34612
 AR5K_PHY_TST1_TXHOLDAR5K_PHY_TST1_TXHOLD 0x00003800 reg.h Set tx hold (?)
34613
 AR5K_PHY_TST1_TXSRC_SRCAR5K_PHY_TST1_TXSRC_SRC 0x00000002 reg.h Used with bit 7 (?)
34614
 AR5K_PHY_TST1_TXSRC_SRC_SAR5K_PHY_TST1_TXSRC_SRC_S 1 reg.h 　
34615
 AR5K_PHY_TST1_TXSRC_ALTAR5K_PHY_TST1_TXSRC_ALT 0x00000080 reg.h Set input to tsdac (?)
34616
 AR5K_PHY_TST1_TXSRC_ALT_SAR5K_PHY_TST1_TXSRC_ALT_S 7 reg.h 　
34617
 AR5K_PHY_TIMING_3AR5K_PHY_TIMING_3 0x9814 reg.h 　
34618
 AR5K_PHY_TIMING_3_DSC_MANAR5K_PHY_TIMING_3_DSC_MAN 0xfffe0000 reg.h 　
34619
 AR5K_PHY_TIMING_3_DSC_MAN_SAR5K_PHY_TIMING_3_DSC_MAN_S 17 reg.h 　
34620
 AR5K_PHY_TIMING_3_DSC_EXPAR5K_PHY_TIMING_3_DSC_EXP 0x0001e000 reg.h 　
34621
 AR5K_PHY_TIMING_3_DSC_EXP_SAR5K_PHY_TIMING_3_DSC_EXP_S 13 reg.h 　
34622
 AR5K_PHY_CHIP_IDAR5K_PHY_CHIP_ID 0x9818 reg.h 　
34623
 AR5K_PHY_ACTAR5K_PHY_ACT 0x981c reg.h Register Address
34624
 AR5K_PHY_ACT_ENABLEAR5K_PHY_ACT_ENABLE 0x00000001 reg.h Activate PHY
34625
 AR5K_PHY_ACT_DISABLEAR5K_PHY_ACT_DISABLE 0x00000002 reg.h Deactivate PHY
34626
 AR5K_PHY_RF_CTL2AR5K_PHY_RF_CTL2 0x9824 reg.h Register Address
34627
 AR5K_PHY_RF_CTL2_TXF2TXD_STARTAR5K_PHY_RF_CTL2_TXF2TXD_START 0x0000000f reg.h TX frame to TX data start
34628
 AR5K_PHY_RF_CTL2_TXF2TXD_START_AR5K_PHY_RF_CTL2_TXF2TXD_START_ 0 reg.h 　
34629
 AR5K_PHY_RF_CTL3AR5K_PHY_RF_CTL3 0x9828 reg.h Register Address
34630
 AR5K_PHY_RF_CTL3_TXE2XLNA_ONAR5K_PHY_RF_CTL3_TXE2XLNA_ON 0x0000ff00 reg.h TX end to XLNA on
34631
 AR5K_PHY_RF_CTL3_TXE2XLNA_ON_SAR5K_PHY_RF_CTL3_TXE2XLNA_ON_S 8 reg.h 　
34632
 AR5K_PHY_ADC_CTLAR5K_PHY_ADC_CTL 0x982c reg.h 　
34633
 AR5K_PHY_ADC_CTL_INBUFGAIN_OFFAR5K_PHY_ADC_CTL_INBUFGAIN_OFF 0x00000003 reg.h 　
34634
 AR5K_PHY_ADC_CTL_INBUFGAIN_OFF_AR5K_PHY_ADC_CTL_INBUFGAIN_OFF_ 0 reg.h 　
34635
 AR5K_PHY_ADC_CTL_PWD_DAC_OFFAR5K_PHY_ADC_CTL_PWD_DAC_OFF 0x00002000 reg.h 　
34636
 AR5K_PHY_ADC_CTL_PWD_BAND_GAP_OAR5K_PHY_ADC_CTL_PWD_BAND_GAP_O 0x00004000 reg.h 　
34637
 AR5K_PHY_ADC_CTL_PWD_ADC_OFFAR5K_PHY_ADC_CTL_PWD_ADC_OFF 0x00008000 reg.h 　
34638
 AR5K_PHY_ADC_CTL_INBUFGAIN_ONAR5K_PHY_ADC_CTL_INBUFGAIN_ON 0x00030000 reg.h 　
34639
 AR5K_PHY_ADC_CTL_INBUFGAIN_ON_SAR5K_PHY_ADC_CTL_INBUFGAIN_ON_S 16 reg.h 　
34640
 AR5K_PHY_RF_CTL4AR5K_PHY_RF_CTL4 0x9834 reg.h Register Address
34641
 AR5K_PHY_RF_CTL4_TXF2XPA_A_ONAR5K_PHY_RF_CTL4_TXF2XPA_A_ON 0x00000001 reg.h TX frame to XPA A on (field)
34642
 AR5K_PHY_RF_CTL4_TXF2XPA_B_ONAR5K_PHY_RF_CTL4_TXF2XPA_B_ON 0x00000100 reg.h TX frame to XPA B on (field)
34643
 AR5K_PHY_RF_CTL4_TXE2XPA_A_OFFAR5K_PHY_RF_CTL4_TXE2XPA_A_OFF 0x00010000 reg.h TX end to XPA A off (field)
34644
 AR5K_PHY_RF_CTL4_TXE2XPA_B_OFFAR5K_PHY_RF_CTL4_TXE2XPA_B_OFF 0x01000000 reg.h TX end to XPA B off (field)
34645
 AR5K_PHY_PA_CTLAR5K_PHY_PA_CTL 0x9838 reg.h Register Address
34646
 AR5K_PHY_PA_CTL_XPA_A_HIAR5K_PHY_PA_CTL_XPA_A_HI 0x00000001 reg.h XPA A high (?)
34647
 AR5K_PHY_PA_CTL_XPA_B_HIAR5K_PHY_PA_CTL_XPA_B_HI 0x00000002 reg.h XPA B high (?)
34648
 AR5K_PHY_PA_CTL_XPA_A_ENAR5K_PHY_PA_CTL_XPA_A_EN 0x00000004 reg.h Enable XPA A
34649
 AR5K_PHY_PA_CTL_XPA_B_ENAR5K_PHY_PA_CTL_XPA_B_EN 0x00000008 reg.h Enable XPA B
34650
 AR5K_PHY_SETTLINGAR5K_PHY_SETTLING 0x9844 reg.h Register Address
34651
 AR5K_PHY_SETTLING_AGCAR5K_PHY_SETTLING_AGC 0x0000007f reg.h AGC settling time
34652
 AR5K_PHY_SETTLING_AGC_SAR5K_PHY_SETTLING_AGC_S 0 reg.h 　
34653
 AR5K_PHY_SETTLING_SWITCHAR5K_PHY_SETTLING_SWITCH 0x00003f80 reg.h Switch settlig time
34654
 AR5K_PHY_SETTLING_SWITCH_SAR5K_PHY_SETTLING_SWITCH_S 7 reg.h 　
34655
 AR5K_PHY_GAINAR5K_PHY_GAIN 0x9848 reg.h Register Address
34656
 AR5K_PHY_GAIN_TXRX_ATTENAR5K_PHY_GAIN_TXRX_ATTEN 0x0003f000 reg.h TX-RX Attenuation
34657
 AR5K_PHY_GAIN_TXRX_ATTEN_SAR5K_PHY_GAIN_TXRX_ATTEN_S 12 reg.h 　
34658
 AR5K_PHY_GAIN_TXRX_RF_MAXAR5K_PHY_GAIN_TXRX_RF_MAX 0x007c0000 reg.h 　
34659
 AR5K_PHY_GAIN_TXRX_RF_MAX_SAR5K_PHY_GAIN_TXRX_RF_MAX_S 18 reg.h 　
34660
 AR5K_PHY_GAIN_OFFSETAR5K_PHY_GAIN_OFFSET 0x984c reg.h Register Address
34661
 AR5K_PHY_GAIN_OFFSET_RXTX_FLAGAR5K_PHY_GAIN_OFFSET_RXTX_FLAG 0x00020000 reg.h RX-TX flag (?)
34662
 AR5K_PHY_DESIRED_SIZEAR5K_PHY_DESIRED_SIZE 0x9850 reg.h Register Address
34663
 AR5K_PHY_DESIRED_SIZE_ADCAR5K_PHY_DESIRED_SIZE_ADC 0x000000ff reg.h ADC desired size
34664
 AR5K_PHY_DESIRED_SIZE_ADC_SAR5K_PHY_DESIRED_SIZE_ADC_S 0 reg.h 　
34665
 AR5K_PHY_DESIRED_SIZE_PGAAR5K_PHY_DESIRED_SIZE_PGA 0x0000ff00 reg.h PGA desired size
34666
 AR5K_PHY_DESIRED_SIZE_PGA_SAR5K_PHY_DESIRED_SIZE_PGA_S 8 reg.h 　
34667
 AR5K_PHY_DESIRED_SIZE_TOTAR5K_PHY_DESIRED_SIZE_TOT 0x0ff00000 reg.h Total desired size
34668
 AR5K_PHY_DESIRED_SIZE_TOT_SAR5K_PHY_DESIRED_SIZE_TOT_S 20 reg.h 　
34669
 AR5K_PHY_SIGAR5K_PHY_SIG 0x9858 reg.h Register Address
34670
 AR5K_PHY_SIG_FIRSTEPAR5K_PHY_SIG_FIRSTEP 0x0003f000 reg.h FIRSTEP
34671
 AR5K_PHY_SIG_FIRSTEP_SAR5K_PHY_SIG_FIRSTEP_S 12 reg.h 　
34672
 AR5K_PHY_SIG_FIRPWRAR5K_PHY_SIG_FIRPWR 0x03fc0000 reg.h FIPWR
34673
 AR5K_PHY_SIG_FIRPWR_SAR5K_PHY_SIG_FIRPWR_S 18 reg.h 　
34674
 AR5K_PHY_AGCCOARSEAR5K_PHY_AGCCOARSE 0x985c reg.h Register Address
34675
 AR5K_PHY_AGCCOARSE_LOAR5K_PHY_AGCCOARSE_LO 0x00007f80 reg.h AGC Coarse low
34676
 AR5K_PHY_AGCCOARSE_LO_SAR5K_PHY_AGCCOARSE_LO_S 7 reg.h 　
34677
 AR5K_PHY_AGCCOARSE_HIAR5K_PHY_AGCCOARSE_HI 0x003f8000 reg.h AGC Coarse high
34678
 AR5K_PHY_AGCCOARSE_HI_SAR5K_PHY_AGCCOARSE_HI_S 15 reg.h 　
34679
 AR5K_PHY_AGCCTLAR5K_PHY_AGCCTL 0x9860 reg.h Register address
34680
 AR5K_PHY_AGCCTL_CALAR5K_PHY_AGCCTL_CAL 0x00000001 reg.h Enable PHY calibration
34681
 AR5K_PHY_AGCCTL_NFAR5K_PHY_AGCCTL_NF 0x00000002 reg.h Enable Noise Floor calibration
34682
 AR5K_PHY_AGCCTL_NF_ENAR5K_PHY_AGCCTL_NF_EN 0x00008000 reg.h Enable nf calibration to happen (?)
34683
 AR5K_PHY_AGCCTL_NF_NOUPDATEAR5K_PHY_AGCCTL_NF_NOUPDATE 0x00020000 reg.h Don't update nf automaticaly
34684
 AR5K_PHY_NFAR5K_PHY_NF 0x9864 reg.h Register address
34685
 AR5K_PHY_NF_MAR5K_PHY_NF_M 0x000001ff reg.h Noise floor mask
34686
 AR5K_PHY_NF_ACTIVEAR5K_PHY_NF_ACTIVE 0x00000100 reg.h Noise floor calibration still active
34687
 AR5K_PHY_NF_THRESH62AR5K_PHY_NF_THRESH62 0x0007f000 reg.h Thresh62 -check ANI patent- (field)
34688
 AR5K_PHY_NF_THRESH62_SAR5K_PHY_NF_THRESH62_S 12 reg.h 　
34689
 AR5K_PHY_NF_MINCCA_PWRAR5K_PHY_NF_MINCCA_PWR 0x0ff80000 reg.h ???
34690
 AR5K_PHY_NF_MINCCA_PWR_SAR5K_PHY_NF_MINCCA_PWR_S 19 reg.h 　
34691
 AR5K_PHY_ADCSATAR5K_PHY_ADCSAT 0x9868 reg.h 　
34692
 AR5K_PHY_ADCSAT_ICNTAR5K_PHY_ADCSAT_ICNT 0x0001f800 reg.h 　
34693
 AR5K_PHY_ADCSAT_ICNT_SAR5K_PHY_ADCSAT_ICNT_S 11 reg.h 　
34694
 AR5K_PHY_ADCSAT_THRAR5K_PHY_ADCSAT_THR 0x000007e0 reg.h 　
34695
 AR5K_PHY_ADCSAT_THR_SAR5K_PHY_ADCSAT_THR_S 5 reg.h 　
34696
 AR5K_PHY_WEAK_OFDM_HIGH_THRAR5K_PHY_WEAK_OFDM_HIGH_THR 0x9868 reg.h 　
34697
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_ 0x0000001f reg.h 　
34698
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_ 0 reg.h 　
34699
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M1AR5K_PHY_WEAK_OFDM_HIGH_THR_M1 0x00fe0000 reg.h 　
34700
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M1_AR5K_PHY_WEAK_OFDM_HIGH_THR_M1_ 17 reg.h 　
34701
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M2AR5K_PHY_WEAK_OFDM_HIGH_THR_M2 0x7f000000 reg.h 　
34702
 AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_ 24 reg.h 　
34703
 AR5K_PHY_WEAK_OFDM_LOW_THRAR5K_PHY_WEAK_OFDM_LOW_THR 0x986c reg.h 　
34704
 AR5K_PHY_WEAK_OFDM_LOW_THR_SELFAR5K_PHY_WEAK_OFDM_LOW_THR_SELF 0x00000001 reg.h 　
34705
 AR5K_PHY_WEAK_OFDM_LOW_THR_M2_CAR5K_PHY_WEAK_OFDM_LOW_THR_M2_C 0x00003f00 reg.h 　
34706
 AR5K_PHY_WEAK_OFDM_LOW_THR_M2_CAR5K_PHY_WEAK_OFDM_LOW_THR_M2_C 8 reg.h 　
34707
 AR5K_PHY_WEAK_OFDM_LOW_THR_M1AR5K_PHY_WEAK_OFDM_LOW_THR_M1 0x001fc000 reg.h 　
34708
 AR5K_PHY_WEAK_OFDM_LOW_THR_M1_SAR5K_PHY_WEAK_OFDM_LOW_THR_M1_S 14 reg.h 　
34709
 AR5K_PHY_WEAK_OFDM_LOW_THR_M2AR5K_PHY_WEAK_OFDM_LOW_THR_M2 0x0fe00000 reg.h 　
34710
 AR5K_PHY_WEAK_OFDM_LOW_THR_M2_SAR5K_PHY_WEAK_OFDM_LOW_THR_M2_S 21 reg.h 　
34711
 AR5K_PHY_SCRAR5K_PHY_SCR 0x9870 reg.h 　
34712
 AR5K_PHY_SLMTAR5K_PHY_SLMT 0x9874 reg.h 　
34713
 AR5K_PHY_SLMT_32MHZAR5K_PHY_SLMT_32MHZ 0x0000007f reg.h 　
34714
 AR5K_PHY_SCALAR5K_PHY_SCAL 0x9878 reg.h 　
34715
 AR5K_PHY_SCAL_32MHZAR5K_PHY_SCAL_32MHZ 0x0000000e reg.h 　
34716
 AR5K_PHY_SCAL_32MHZ_2417AR5K_PHY_SCAL_32MHZ_2417 0x0000000a reg.h 　
34717
 AR5K_PHY_SCAL_32MHZ_HB63AR5K_PHY_SCAL_32MHZ_HB63 0x00000032 reg.h 　
34718
 AR5K_PHY_PLLAR5K_PHY_PLL 0x987c reg.h 　
34719
 AR5K_PHY_PLL_20MHZAR5K_PHY_PLL_20MHZ 0x00000013 reg.h For half rate (?)
34720
 AR5K_PHY_PLL_40MHZ_5211AR5K_PHY_PLL_40MHZ_5211 0x00000018 reg.h 　
34721
 AR5K_PHY_PLL_40MHZ_5212AR5K_PHY_PLL_40MHZ_5212 0x000000aa reg.h 　
34722
 AR5K_PHY_PLL_40MHZ_5413AR5K_PHY_PLL_40MHZ_5413 0x00000004 reg.h 　
34723
 AR5K_PHY_PLL_40MHZAR5K_PHY_PLL_40MHZ (ah->ah_version == AR5K_AR5211 ? \ AR5K_PHY_PLL_40MHZ_5211 : AR5K_PHY_PLL_40MHZ_5212) reg.h 　
34724
 AR5K_PHY_PLL_44MHZ_5211AR5K_PHY_PLL_44MHZ_5211 0x00000019 reg.h 　
34725
 AR5K_PHY_PLL_44MHZ_5212AR5K_PHY_PLL_44MHZ_5212 0x000000ab reg.h 　
34726
 AR5K_PHY_PLL_44MHZAR5K_PHY_PLL_44MHZ (ah->ah_version == AR5K_AR5211 ? \ AR5K_PHY_PLL_44MHZ_5211 : AR5K_PHY_PLL_44MHZ_5212) reg.h 　
34727
 AR5K_PHY_PLL_RF5111AR5K_PHY_PLL_RF5111 0x00000000 reg.h 　
34728
 AR5K_PHY_PLL_RF5112AR5K_PHY_PLL_RF5112 0x00000040 reg.h 　
34729
 AR5K_PHY_PLL_HALF_RATEAR5K_PHY_PLL_HALF_RATE 0x00000100 reg.h 　
34730
 AR5K_PHY_PLL_QUARTER_RATEAR5K_PHY_PLL_QUARTER_RATE 0x00000200 reg.h 　
34731
 AR5K_RF_BUFFERAR5K_RF_BUFFER 0x989c reg.h 　
34732
 AR5K_RF_BUFFER_CONTROL_0AR5K_RF_BUFFER_CONTROL_0 0x98c0 reg.h Channel on 5110
34733
 AR5K_RF_BUFFER_CONTROL_1AR5K_RF_BUFFER_CONTROL_1 0x98c4 reg.h Bank 7 on 5112
34734
 AR5K_RF_BUFFER_CONTROL_2AR5K_RF_BUFFER_CONTROL_2 0x98cc reg.h Bank 7 on 5111
34735
 AR5K_RF_BUFFER_CONTROL_3AR5K_RF_BUFFER_CONTROL_3 0x98d0 reg.h Bank 2 on 5112
34736
 AR5K_RF_BUFFER_CONTROL_4AR5K_RF_BUFFER_CONTROL_4 0x98d4 reg.h RF Stage register on 5110
34737
 AR5K_RF_BUFFER_CONTROL_5AR5K_RF_BUFFER_CONTROL_5 0x98d8 reg.h Bank 3 on 5111
34738
 AR5K_RF_BUFFER_CONTROL_6AR5K_RF_BUFFER_CONTROL_6 0x98dc reg.h Bank 3 on 5112
34739
 AR5K_PHY_RFSTGAR5K_PHY_RFSTG 0x98d4 reg.h 　
34740
 AR5K_PHY_RFSTG_DISABLEAR5K_PHY_RFSTG_DISABLE 0x00000021 reg.h 　
34741
 AR5K_PHY_BIN_MASK_1AR5K_PHY_BIN_MASK_1 0x9900 reg.h 　
34742
 AR5K_PHY_BIN_MASK_2AR5K_PHY_BIN_MASK_2 0x9904 reg.h 　
34743
 AR5K_PHY_BIN_MASK_3AR5K_PHY_BIN_MASK_3 0x9908 reg.h 　
34744
 AR5K_PHY_BIN_MASK_CTLAR5K_PHY_BIN_MASK_CTL 0x990c reg.h 　
34745
 AR5K_PHY_BIN_MASK_CTL_MASK_4AR5K_PHY_BIN_MASK_CTL_MASK_4 0x00003fff reg.h 　
34746
 AR5K_PHY_BIN_MASK_CTL_MASK_4_SAR5K_PHY_BIN_MASK_CTL_MASK_4_S 0 reg.h 　
34747
 AR5K_PHY_BIN_MASK_CTL_RATEAR5K_PHY_BIN_MASK_CTL_RATE 0xff000000 reg.h 　
34748
 AR5K_PHY_BIN_MASK_CTL_RATE_SAR5K_PHY_BIN_MASK_CTL_RATE_S 24 reg.h 　
34749
 AR5K_PHY_ANT_CTLAR5K_PHY_ANT_CTL 0x9910 reg.h Register Address
34750
 AR5K_PHY_ANT_CTL_TXRX_ENAR5K_PHY_ANT_CTL_TXRX_EN 0x00000001 reg.h Enable TX/RX (?)
34751
 AR5K_PHY_ANT_CTL_SECTORED_ANTAR5K_PHY_ANT_CTL_SECTORED_ANT 0x00000004 reg.h Sectored Antenna
34752
 AR5K_PHY_ANT_CTL_HITUNE5AR5K_PHY_ANT_CTL_HITUNE5 0x00000008 reg.h Hitune5 (?)
34753
 AR5K_PHY_ANT_CTL_SWTABLE_IDLEAR5K_PHY_ANT_CTL_SWTABLE_IDLE 0x000003f0 reg.h Switch table idle (?)
34754
 AR5K_PHY_ANT_CTL_SWTABLE_IDLE_SAR5K_PHY_ANT_CTL_SWTABLE_IDLE_S 4 reg.h 　
34755
 AR5K_PHY_RX_DELAYAR5K_PHY_RX_DELAY 0x9914 reg.h Register Address
34756
 AR5K_PHY_RX_DELAY_MAR5K_PHY_RX_DELAY_M 0x00003fff reg.h Mask for RX activate to receive delay (/100ns)
34757
 AR5K_PHY_MAX_RX_LENAR5K_PHY_MAX_RX_LEN 0x991c reg.h 　
34758
 AR5K_PHY_IQAR5K_PHY_IQ 0x9920 reg.h Register Address
34759
 AR5K_PHY_IQ_CORR_Q_Q_COFFAR5K_PHY_IQ_CORR_Q_Q_COFF 0x0000001f reg.h Mask for q correction info
34760
 AR5K_PHY_IQ_CORR_Q_I_COFFAR5K_PHY_IQ_CORR_Q_I_COFF 0x000007e0 reg.h Mask for i correction info
34761
 AR5K_PHY_IQ_CORR_Q_I_COFF_SAR5K_PHY_IQ_CORR_Q_I_COFF_S 5 reg.h 　
34762
 AR5K_PHY_IQ_CORR_ENABLEAR5K_PHY_IQ_CORR_ENABLE 0x00000800 reg.h Enable i/q correction
34763
 AR5K_PHY_IQ_CAL_NUM_LOG_MAXAR5K_PHY_IQ_CAL_NUM_LOG_MAX 0x0000f000 reg.h Mask for max number of samples in log scale
34764
 AR5K_PHY_IQ_CAL_NUM_LOG_MAX_SAR5K_PHY_IQ_CAL_NUM_LOG_MAX_S 12 reg.h 　
34765
 AR5K_PHY_IQ_RUNAR5K_PHY_IQ_RUN 0x00010000 reg.h Run i/q calibration
34766
 AR5K_PHY_IQ_USE_PT_DFAR5K_PHY_IQ_USE_PT_DF 0x00020000 reg.h Use pilot track df (?)
34767
 AR5K_PHY_IQ_EARLY_TRIG_THRAR5K_PHY_IQ_EARLY_TRIG_THR 0x00200000 reg.h Early trigger threshold (?) (field)
34768
 AR5K_PHY_IQ_PILOT_MASK_ENAR5K_PHY_IQ_PILOT_MASK_EN 0x10000000 reg.h Enable pilot mask (?)
34769
 AR5K_PHY_IQ_CHAN_MASK_ENAR5K_PHY_IQ_CHAN_MASK_EN 0x20000000 reg.h Enable channel mask (?)
34770
 AR5K_PHY_IQ_SPUR_FILT_ENAR5K_PHY_IQ_SPUR_FILT_EN 0x40000000 reg.h Enable spur filter
34771
 AR5K_PHY_IQ_SPUR_RSSI_ENAR5K_PHY_IQ_SPUR_RSSI_EN 0x80000000 reg.h Enable spur rssi
34772
 AR5K_PHY_OFDM_SELFCORRAR5K_PHY_OFDM_SELFCORR 0x9924 reg.h Register Address
34773
 AR5K_PHY_OFDM_SELFCORR_CYPWR_THAR5K_PHY_OFDM_SELFCORR_CYPWR_TH 0x00000001 reg.h Enable cyclic RSSI thr 1
34774
 AR5K_PHY_OFDM_SELFCORR_CYPWR_THAR5K_PHY_OFDM_SELFCORR_CYPWR_TH 0x000000fe reg.h Mask for Cyclic RSSI threshold 1
34775
 AR5K_PHY_OFDM_SELFCORR_CYPWR_THAR5K_PHY_OFDM_SELFCORR_CYPWR_TH 1 reg.h 　
34776
 AR5K_PHY_OFDM_SELFCORR_CYPWR_THAR5K_PHY_OFDM_SELFCORR_CYPWR_TH 0x00000100 reg.h Cyclic RSSI threshold 3 (field) (?)
34777
 AR5K_PHY_OFDM_SELFCORR_RSSI_1ATAR5K_PHY_OFDM_SELFCORR_RSSI_1AT 0x00008000 reg.h Enable 1A RSSI threshold (?)
34778
 AR5K_PHY_OFDM_SELFCORR_RSSI_1ATAR5K_PHY_OFDM_SELFCORR_RSSI_1AT 0x00010000 reg.h 1A RSSI threshold (field) (?)
34779
 AR5K_PHY_OFDM_SELFCORR_LSCTHR_HAR5K_PHY_OFDM_SELFCORR_LSCTHR_H 0x00800000 reg.h Long sc threshold hi rssi (?)
34780
 AR5K_PHY_WARM_RESETAR5K_PHY_WARM_RESET 0x9928 reg.h 　
34781
 AR5K_PHY_CTLAR5K_PHY_CTL 0x992c reg.h Register Address
34782
 AR5K_PHY_CTL_RX_DRAIN_RATEAR5K_PHY_CTL_RX_DRAIN_RATE 0x00000001 reg.h RX drain rate (?)
34783
 AR5K_PHY_CTL_LATE_TX_SIG_SYMAR5K_PHY_CTL_LATE_TX_SIG_SYM 0x00000002 reg.h Late tx signal symbol (?)
34784
 AR5K_PHY_CTL_GEN_SCRAMBLERAR5K_PHY_CTL_GEN_SCRAMBLER 0x00000004 reg.h Generate scrambler
34785
 AR5K_PHY_CTL_TX_ANT_SELAR5K_PHY_CTL_TX_ANT_SEL 0x00000008 reg.h TX antenna select
34786
 AR5K_PHY_CTL_TX_ANT_STATICAR5K_PHY_CTL_TX_ANT_STATIC 0x00000010 reg.h Static TX antenna
34787
 AR5K_PHY_CTL_RX_ANT_SELAR5K_PHY_CTL_RX_ANT_SEL 0x00000020 reg.h RX antenna select
34788
 AR5K_PHY_CTL_RX_ANT_STATICAR5K_PHY_CTL_RX_ANT_STATIC 0x00000040 reg.h Static RX antenna
34789
 AR5K_PHY_CTL_LOW_FREQ_SLE_ENAR5K_PHY_CTL_LOW_FREQ_SLE_EN 0x00000080 reg.h Enable low freq sleep
34790
 AR5K_PHY_PAPD_PROBEAR5K_PHY_PAPD_PROBE 0x9930 reg.h 　
34791
 AR5K_PHY_PAPD_PROBE_SH_HI_PARAR5K_PHY_PAPD_PROBE_SH_HI_PAR 0x00000001 reg.h 　
34792
 AR5K_PHY_PAPD_PROBE_PCDAC_BIASAR5K_PHY_PAPD_PROBE_PCDAC_BIAS 0x00000002 reg.h 　
34793
 AR5K_PHY_PAPD_PROBE_COMP_GAINAR5K_PHY_PAPD_PROBE_COMP_GAIN 0x00000040 reg.h 　
34794
 AR5K_PHY_PAPD_PROBE_TXPOWERAR5K_PHY_PAPD_PROBE_TXPOWER 0x00007e00 reg.h 　
34795
 AR5K_PHY_PAPD_PROBE_TXPOWER_SAR5K_PHY_PAPD_PROBE_TXPOWER_S 9 reg.h 　
34796
 AR5K_PHY_PAPD_PROBE_TX_NEXTAR5K_PHY_PAPD_PROBE_TX_NEXT 0x00008000 reg.h 　
34797
 AR5K_PHY_PAPD_PROBE_PREDIST_ENAR5K_PHY_PAPD_PROBE_PREDIST_EN 0x00010000 reg.h 　
34798
 AR5K_PHY_PAPD_PROBE_TYPEAR5K_PHY_PAPD_PROBE_TYPE 0x01800000 reg.h [5112+]
34799
 AR5K_PHY_PAPD_PROBE_TYPE_SAR5K_PHY_PAPD_PROBE_TYPE_S 23 reg.h 　
34800
 AR5K_PHY_PAPD_PROBE_TYPE_OFDMAR5K_PHY_PAPD_PROBE_TYPE_OFDM 0 reg.h 　
34801
 AR5K_PHY_PAPD_PROBE_TYPE_XRAR5K_PHY_PAPD_PROBE_TYPE_XR 1 reg.h 　
34802
 AR5K_PHY_PAPD_PROBE_TYPE_CCKAR5K_PHY_PAPD_PROBE_TYPE_CCK 2 reg.h 　
34803
 AR5K_PHY_PAPD_PROBE_GAINFAR5K_PHY_PAPD_PROBE_GAINF 0xfe000000 reg.h 　
34804
 AR5K_PHY_PAPD_PROBE_GAINF_SAR5K_PHY_PAPD_PROBE_GAINF_S 25 reg.h 　
34805
 AR5K_PHY_PAPD_PROBE_INI_5111AR5K_PHY_PAPD_PROBE_INI_5111 0x00004883 reg.h [5212+]
34806
 AR5K_PHY_PAPD_PROBE_INI_5112AR5K_PHY_PAPD_PROBE_INI_5112 0x00004882 reg.h [5212+]
34807
 AR5K_PHY_TXPOWER_RATE1AR5K_PHY_TXPOWER_RATE1 0x9934 reg.h 　
34808
 AR5K_PHY_TXPOWER_RATE2AR5K_PHY_TXPOWER_RATE2 0x9938 reg.h 　
34809
 AR5K_PHY_TXPOWER_RATE_MAXAR5K_PHY_TXPOWER_RATE_MAX 0x993c reg.h 　
34810
 AR5K_PHY_TXPOWER_RATE_MAX_TPC_EAR5K_PHY_TXPOWER_RATE_MAX_TPC_E 0x00000040 reg.h 　
34811
 AR5K_PHY_TXPOWER_RATE3AR5K_PHY_TXPOWER_RATE3 0xa234 reg.h 　
34812
 AR5K_PHY_TXPOWER_RATE4AR5K_PHY_TXPOWER_RATE4 0xa238 reg.h 　
34813
 AR5K_PHY_FRAME_CTL_5210AR5K_PHY_FRAME_CTL_5210 0x9804 reg.h 　
34814
 AR5K_PHY_FRAME_CTL_5211AR5K_PHY_FRAME_CTL_5211 0x9944 reg.h 　
34815
 AR5K_PHY_FRAME_CTLAR5K_PHY_FRAME_CTL (ah->ah_version == AR5K_AR5210 ? \ AR5K_PHY_FRAME_CTL_5210 : AR5K_PHY_FRAME_CTL_5211) reg.h 　
34816
 AR5K_PHY_FRAME_CTL_TX_CLIPAR5K_PHY_FRAME_CTL_TX_CLIP 0x00000038 reg.h Mask for tx clip (?)
34817
 AR5K_PHY_FRAME_CTL_TX_CLIP_SAR5K_PHY_FRAME_CTL_TX_CLIP_S 3 reg.h 　
34818
 AR5K_PHY_FRAME_CTL_PREP_CHINFOAR5K_PHY_FRAME_CTL_PREP_CHINFO 0x00010000 reg.h Prepend chan info
34819
 AR5K_PHY_FRAME_CTL_EMUAR5K_PHY_FRAME_CTL_EMU 0x80000000 reg.h 　
34820
 AR5K_PHY_FRAME_CTL_EMU_SAR5K_PHY_FRAME_CTL_EMU_S 31 reg.h 　
34821
 AR5K_PHY_FRAME_CTL_TIMING_ERRAR5K_PHY_FRAME_CTL_TIMING_ERR 0x01000000 reg.h PHY timing error
34822
 AR5K_PHY_FRAME_CTL_PARITY_ERRAR5K_PHY_FRAME_CTL_PARITY_ERR 0x02000000 reg.h Parity error
34823
 AR5K_PHY_FRAME_CTL_ILLRATE_ERRAR5K_PHY_FRAME_CTL_ILLRATE_ERR 0x04000000 reg.h Illegal rate
34824
 AR5K_PHY_FRAME_CTL_ILLLEN_ERRAR5K_PHY_FRAME_CTL_ILLLEN_ERR 0x08000000 reg.h Illegal length
34825
 AR5K_PHY_FRAME_CTL_SERVICE_ERRAR5K_PHY_FRAME_CTL_SERVICE_ERR 0x20000000 reg.h 　
34826
 AR5K_PHY_FRAME_CTL_TXURN_ERRAR5K_PHY_FRAME_CTL_TXURN_ERR 0x40000000 reg.h TX underrun
34827
 AR5K_PHY_FRAME_CTL_INIAR5K_PHY_FRAME_CTL_INI AR5K_PHY_FRAME_CTL_SERVICE_ERR | \ AR5K_PHY_FRAME_CTL_TXURN_ERR | \ AR5K_PHY_FRAME_CTL_ILLLEN_ERR | \ AR5K_PHY_FRAME_CTL_ILLRAT reg.h 　
34828
 AR5K_PHY_TX_PWR_ADJAR5K_PHY_TX_PWR_ADJ 0x994c reg.h 　
34829
 AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DEAR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DE 0x00000fc0 reg.h 　
34830
 AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DEAR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DE 6 reg.h 　
34831
 AR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_IAR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_I 0x00fc0000 reg.h 　
34832
 AR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_IAR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_I 18 reg.h 　
34833
 AR5K_PHY_RADARAR5K_PHY_RADAR 0x9954 reg.h 　
34834
 AR5K_PHY_RADAR_ENABLEAR5K_PHY_RADAR_ENABLE 0x00000001 reg.h 　
34835
 AR5K_PHY_RADAR_DISABLEAR5K_PHY_RADAR_DISABLE 0x00000000 reg.h 　
34836
 AR5K_PHY_RADAR_INBANDTHRAR5K_PHY_RADAR_INBANDTHR 0x0000003e reg.h Inband threshold
34837
 AR5K_PHY_RADAR_INBANDTHR_SAR5K_PHY_RADAR_INBANDTHR_S 1 reg.h 　
34838
 AR5K_PHY_RADAR_PRSSI_THRAR5K_PHY_RADAR_PRSSI_THR 0x00000fc0 reg.h Pulse RSSI/SNR threshold
34839
 AR5K_PHY_RADAR_PRSSI_THR_SAR5K_PHY_RADAR_PRSSI_THR_S 6 reg.h 　
34840
 AR5K_PHY_RADAR_PHEIGHT_THRAR5K_PHY_RADAR_PHEIGHT_THR 0x0003f000 reg.h Pulse height threshold
34841
 AR5K_PHY_RADAR_PHEIGHT_THR_SAR5K_PHY_RADAR_PHEIGHT_THR_S 12 reg.h 　
34842
 AR5K_PHY_RADAR_RSSI_THRAR5K_PHY_RADAR_RSSI_THR 0x00fc0000 reg.h Radar RSSI/SNR threshold.
34843
 AR5K_PHY_RADAR_RSSI_THR_SAR5K_PHY_RADAR_RSSI_THR_S 18 reg.h 　
34844
 AR5K_PHY_RADAR_FIRPWR_THRAR5K_PHY_RADAR_FIRPWR_THR 0x7f000000 reg.h Finite Impulse Response
34845
 AR5K_PHY_RADAR_FIRPWR_THRSAR5K_PHY_RADAR_FIRPWR_THRS 24 reg.h 　
34846
 AR5K_PHY_ANT_SWITCH_TABLE_0AR5K_PHY_ANT_SWITCH_TABLE_0 0x9960 reg.h 　
34847
 AR5K_PHY_ANT_SWITCH_TABLE_1AR5K_PHY_ANT_SWITCH_TABLE_1 0x9964 reg.h 　
34848
 AR5K_PHY_NFTHRESAR5K_PHY_NFTHRES 0x9968 reg.h 　
34849
 AR5K_PHY_SIGMA_DELTAAR5K_PHY_SIGMA_DELTA 0x996C reg.h 　
34850
 AR5K_PHY_SIGMA_DELTA_ADC_SELAR5K_PHY_SIGMA_DELTA_ADC_SEL 0x00000003 reg.h 　
34851
 AR5K_PHY_SIGMA_DELTA_ADC_SEL_SAR5K_PHY_SIGMA_DELTA_ADC_SEL_S 0 reg.h 　
34852
 AR5K_PHY_SIGMA_DELTA_FILT2AR5K_PHY_SIGMA_DELTA_FILT2 0x000000f8 reg.h 　
34853
 AR5K_PHY_SIGMA_DELTA_FILT2_SAR5K_PHY_SIGMA_DELTA_FILT2_S 3 reg.h 　
34854
 AR5K_PHY_SIGMA_DELTA_FILT1AR5K_PHY_SIGMA_DELTA_FILT1 0x00001f00 reg.h 　
34855
 AR5K_PHY_SIGMA_DELTA_FILT1_SAR5K_PHY_SIGMA_DELTA_FILT1_S 8 reg.h 　
34856
 AR5K_PHY_SIGMA_DELTA_ADC_CLIPAR5K_PHY_SIGMA_DELTA_ADC_CLIP 0x01ffe000 reg.h 　
34857
 AR5K_PHY_SIGMA_DELTA_ADC_CLIP_SAR5K_PHY_SIGMA_DELTA_ADC_CLIP_S 13 reg.h 　
34858
 AR5K_PHY_RESTARTAR5K_PHY_RESTART 0x9970 reg.h restart
34859
 AR5K_PHY_RESTART_DIV_GCAR5K_PHY_RESTART_DIV_GC 0x001c0000 reg.h Fast diversity gc_limit (?)
34860
 AR5K_PHY_RESTART_DIV_GC_SAR5K_PHY_RESTART_DIV_GC_S 18 reg.h 　
34861
 AR5K_PHY_RFBUS_REQAR5K_PHY_RFBUS_REQ 0x997C reg.h 　
34862
 AR5K_PHY_RFBUS_REQ_REQUESTAR5K_PHY_RFBUS_REQ_REQUEST 0x00000001 reg.h 　
34863
 AR5K_PHY_TIMING_7AR5K_PHY_TIMING_7 0x9980 reg.h 　
34864
 AR5K_PHY_TIMING_8AR5K_PHY_TIMING_8 0x9984 reg.h 　
34865
 AR5K_PHY_TIMING_8_PILOT_MASK_2AR5K_PHY_TIMING_8_PILOT_MASK_2 0x000fffff reg.h 　
34866
 AR5K_PHY_TIMING_8_PILOT_MASK_2_AR5K_PHY_TIMING_8_PILOT_MASK_2_ 0 reg.h 　
34867
 AR5K_PHY_BIN_MASK2_1AR5K_PHY_BIN_MASK2_1 0x9988 reg.h 　
34868
 AR5K_PHY_BIN_MASK2_2AR5K_PHY_BIN_MASK2_2 0x998c reg.h 　
34869
 AR5K_PHY_BIN_MASK2_3AR5K_PHY_BIN_MASK2_3 0x9990 reg.h 　
34870
 AR5K_PHY_BIN_MASK2_4AR5K_PHY_BIN_MASK2_4 0x9994 reg.h 　
34871
 AR5K_PHY_BIN_MASK2_4_MASK_4AR5K_PHY_BIN_MASK2_4_MASK_4 0x00003fff reg.h 　
34872
 AR5K_PHY_BIN_MASK2_4_MASK_4_SAR5K_PHY_BIN_MASK2_4_MASK_4_S 0 reg.h 　
34873
 AR5K_PHY_TIMING_9AR5K_PHY_TIMING_9 0x9998 reg.h 　
34874
 AR5K_PHY_TIMING_10AR5K_PHY_TIMING_10 0x999c reg.h 　
34875
 AR5K_PHY_TIMING_10_PILOT_MASK_2AR5K_PHY_TIMING_10_PILOT_MASK_2 0x000fffff reg.h 　
34876
 AR5K_PHY_TIMING_10_PILOT_MASK_2AR5K_PHY_TIMING_10_PILOT_MASK_2 0 reg.h 　
34877
 AR5K_PHY_TIMING_11AR5K_PHY_TIMING_11 0x99a0 reg.h Register address
34878
 AR5K_PHY_TIMING_11_SPUR_DELTA_PAR5K_PHY_TIMING_11_SPUR_DELTA_P 0x000fffff reg.h Spur delta phase
34879
 AR5K_PHY_TIMING_11_SPUR_DELTA_PAR5K_PHY_TIMING_11_SPUR_DELTA_P 0 reg.h 　
34880
 AR5K_PHY_TIMING_11_SPUR_FREQ_SDAR5K_PHY_TIMING_11_SPUR_FREQ_SD 0x3ff00000 reg.h Freq sigma delta
34881
 AR5K_PHY_TIMING_11_SPUR_FREQ_SDAR5K_PHY_TIMING_11_SPUR_FREQ_SD 20 reg.h 　
34882
 AR5K_PHY_TIMING_11_USE_SPUR_IN_AR5K_PHY_TIMING_11_USE_SPUR_IN_ 0x40000000 reg.h Spur filter in AGC detector
34883
 AR5K_PHY_TIMING_11_USE_SPUR_IN_AR5K_PHY_TIMING_11_USE_SPUR_IN_ 0x80000000 reg.h Spur filter in OFDM self correlator
34884
 AR5K_BB_GAIN_BASEAR5K_BB_GAIN_BASE 0x9b00 reg.h BaseBand Amplifier Gain table base address
34885
 AR5K_RF_GAIN_BASEAR5K_RF_GAIN_BASE 0x9a00 reg.h RF Amplrifier Gain table base address
34886
 AR5K_PHY_IQRES_CAL_PWR_IAR5K_PHY_IQRES_CAL_PWR_I 0x9c10 reg.h I (Inphase) power value
34887
 AR5K_PHY_IQRES_CAL_PWR_QAR5K_PHY_IQRES_CAL_PWR_Q 0x9c14 reg.h Q (Quadrature) power value
34888
 AR5K_PHY_IQRES_CAL_CORRAR5K_PHY_IQRES_CAL_CORR 0x9c18 reg.h I/Q Correlation
34889
 AR5K_PHY_CURRENT_RSSIAR5K_PHY_CURRENT_RSSI 0x9c1c reg.h 　
34890
 AR5K_PHY_RFBUS_GRANTAR5K_PHY_RFBUS_GRANT 0x9c20 reg.h 　
34891
 AR5K_PHY_RFBUS_GRANT_OKAR5K_PHY_RFBUS_GRANT_OK 0x00000001 reg.h 　
34892
 AR5K_PHY_ADC_TESTAR5K_PHY_ADC_TEST 0x9c24 reg.h 　
34893
 AR5K_PHY_ADC_TEST_IAR5K_PHY_ADC_TEST_I 0x00000001 reg.h 　
34894
 AR5K_PHY_ADC_TEST_QAR5K_PHY_ADC_TEST_Q 0x00000200 reg.h 　
34895
 AR5K_PHY_DAC_TESTAR5K_PHY_DAC_TEST 0x9c28 reg.h 　
34896
 AR5K_PHY_DAC_TEST_IAR5K_PHY_DAC_TEST_I 0x00000001 reg.h 　
34897
 AR5K_PHY_DAC_TEST_QAR5K_PHY_DAC_TEST_Q 0x00000200 reg.h 　
34898
 AR5K_PHY_PTATAR5K_PHY_PTAT 0x9c2c reg.h 　
34899
 AR5K_PHY_BAD_TX_RATEAR5K_PHY_BAD_TX_RATE 0x9c30 reg.h 　
34900
 AR5K_PHY_SPUR_PWRAR5K_PHY_SPUR_PWR 0x9c34 reg.h Register Address
34901
 AR5K_PHY_SPUR_PWR_IAR5K_PHY_SPUR_PWR_I 0x00000001 reg.h SPUR Power estimate for I (field)
34902
 AR5K_PHY_SPUR_PWR_QAR5K_PHY_SPUR_PWR_Q 0x00000100 reg.h SPUR Power estimate for Q (field)
34903
 AR5K_PHY_SPUR_PWR_FILTAR5K_PHY_SPUR_PWR_FILT 0x00010000 reg.h Power with SPUR removed (field)
34904
 AR5K_PHY_CHAN_STATUSAR5K_PHY_CHAN_STATUS 0x9c38 reg.h 　
34905
 AR5K_PHY_CHAN_STATUS_BT_ACTAR5K_PHY_CHAN_STATUS_BT_ACT 0x00000001 reg.h 　
34906
 AR5K_PHY_CHAN_STATUS_RX_CLR_RAWAR5K_PHY_CHAN_STATUS_RX_CLR_RAW 0x00000002 reg.h 　
34907
 AR5K_PHY_CHAN_STATUS_RX_CLR_MACAR5K_PHY_CHAN_STATUS_RX_CLR_MAC 0x00000004 reg.h 　
34908
 AR5K_PHY_CHAN_STATUS_RX_CLR_PAPAR5K_PHY_CHAN_STATUS_RX_CLR_PAP 0x00000008 reg.h 　
34909
 AR5K_PHY_HEAVY_CLIP_ENABLEAR5K_PHY_HEAVY_CLIP_ENABLE 0x99e0 reg.h 　
34910
 AR5K_PHY_SCLOCKAR5K_PHY_SCLOCK 0x99f0 reg.h 　
34911
 AR5K_PHY_SCLOCK_32MHZAR5K_PHY_SCLOCK_32MHZ 0x0000000c reg.h 　
34912
 AR5K_PHY_SDELAYAR5K_PHY_SDELAY 0x99f4 reg.h 　
34913
 AR5K_PHY_SDELAY_32MHZAR5K_PHY_SDELAY_32MHZ 0x000000ff reg.h 　
34914
 AR5K_PHY_SPENDINGAR5K_PHY_SPENDING 0x99f8 reg.h 　
34915
 AR5K_PHY_PAPD_I_BASEAR5K_PHY_PAPD_I_BASE 0xa000 reg.h 　
34916
 AR5K_PHY_PCDAC_TXPOWER_BASEAR5K_PHY_PCDAC_TXPOWER_BASE 0xa180 reg.h 　
34917
 AR5K_PHY_MODEAR5K_PHY_MODE 0x0a200 reg.h Register Address
34918
 AR5K_PHY_MODE_MODAR5K_PHY_MODE_MOD 0x00000001 reg.h PHY Modulation bit
34919
 AR5K_PHY_MODE_MOD_OFDMAR5K_PHY_MODE_MOD_OFDM 0 reg.h 　
34920
 AR5K_PHY_MODE_MOD_CCKAR5K_PHY_MODE_MOD_CCK 1 reg.h 　
34921
 AR5K_PHY_MODE_FREQAR5K_PHY_MODE_FREQ 0x00000002 reg.h Freq mode bit
34922
 AR5K_PHY_MODE_FREQ_5GHZAR5K_PHY_MODE_FREQ_5GHZ 0 reg.h 　
34923
 AR5K_PHY_MODE_FREQ_2GHZAR5K_PHY_MODE_FREQ_2GHZ 2 reg.h 　
34924
 AR5K_PHY_MODE_MOD_DYNAR5K_PHY_MODE_MOD_DYN 0x00000004 reg.h Enable Dynamic OFDM/CCK mode [5112+]
34925
 AR5K_PHY_MODE_RADAR5K_PHY_MODE_RAD 0x00000008 reg.h [5212+]
34926
 AR5K_PHY_MODE_RAD_RF5111AR5K_PHY_MODE_RAD_RF5111 0 reg.h 　
34927
 AR5K_PHY_MODE_RAD_RF5112AR5K_PHY_MODE_RAD_RF5112 8 reg.h 　
34928
 AR5K_PHY_MODE_XRAR5K_PHY_MODE_XR 0x00000010 reg.h Enable XR mode [5112+]
34929
 AR5K_PHY_MODE_HALF_RATEAR5K_PHY_MODE_HALF_RATE 0x00000020 reg.h Enable Half rate (test)
34930
 AR5K_PHY_MODE_QUARTER_RATEAR5K_PHY_MODE_QUARTER_RATE 0x00000040 reg.h Enable Quarter rat (test)
34931
 AR5K_PHY_CCKTXCTLAR5K_PHY_CCKTXCTL 0xa204 reg.h 　
34932
 AR5K_PHY_CCKTXCTL_WORLDAR5K_PHY_CCKTXCTL_WORLD 0x00000000 reg.h 　
34933
 AR5K_PHY_CCKTXCTL_JAPANAR5K_PHY_CCKTXCTL_JAPAN 0x00000010 reg.h 　
34934
 AR5K_PHY_CCKTXCTL_SCRAMBLER_DISAR5K_PHY_CCKTXCTL_SCRAMBLER_DIS 0x00000001 reg.h 　
34935
 AR5K_PHY_CCKTXCTK_DAC_SCALEAR5K_PHY_CCKTXCTK_DAC_SCALE 0x00000004 reg.h 　
34936
 AR5K_PHY_CCK_CROSSCORRAR5K_PHY_CCK_CROSSCORR 0xa208 reg.h 　
34937
 AR5K_PHY_CCK_CROSSCORR_WEAK_SIGAR5K_PHY_CCK_CROSSCORR_WEAK_SIG 0x0000000f reg.h 　
34938
 AR5K_PHY_CCK_CROSSCORR_WEAK_SIGAR5K_PHY_CCK_CROSSCORR_WEAK_SIG 0 reg.h 　
34939
 AR5K_PHY_FAST_ANT_DIVAR5K_PHY_FAST_ANT_DIV 0xa208 reg.h 　
34940
 AR5K_PHY_FAST_ANT_DIV_ENAR5K_PHY_FAST_ANT_DIV_EN 0x00002000 reg.h 　
34941
 AR5K_PHY_GAIN_2GHZAR5K_PHY_GAIN_2GHZ 0xa20c reg.h 　
34942
 AR5K_PHY_GAIN_2GHZ_MARGIN_TXRXAR5K_PHY_GAIN_2GHZ_MARGIN_TXRX 0x00fc0000 reg.h 　
34943
 AR5K_PHY_GAIN_2GHZ_MARGIN_TXRX_AR5K_PHY_GAIN_2GHZ_MARGIN_TXRX_ 18 reg.h 　
34944
 AR5K_PHY_GAIN_2GHZ_INI_5111AR5K_PHY_GAIN_2GHZ_INI_5111 0x6480416c reg.h 　
34945
 AR5K_PHY_CCK_RX_CTL_4AR5K_PHY_CCK_RX_CTL_4 0xa21c reg.h 　
34946
 AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_ 0x01f80000 reg.h 　
34947
 AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_AR5K_PHY_CCK_RX_CTL_4_FREQ_EST_ 19 reg.h 　
34948
 AR5K_PHY_DAG_CCK_CTLAR5K_PHY_DAG_CCK_CTL 0xa228 reg.h 　
34949
 AR5K_PHY_DAG_CCK_CTL_EN_RSSI_THAR5K_PHY_DAG_CCK_CTL_EN_RSSI_TH 0x00000200 reg.h 　
34950
 AR5K_PHY_DAG_CCK_CTL_RSSI_THRAR5K_PHY_DAG_CCK_CTL_RSSI_THR 0x0001fc00 reg.h 　
34951
 AR5K_PHY_DAG_CCK_CTL_RSSI_THR_SAR5K_PHY_DAG_CCK_CTL_RSSI_THR_S 10 reg.h 　
34952
 AR5K_PHY_FAST_ADCAR5K_PHY_FAST_ADC 0xa24c reg.h 　
34953
 AR5K_PHY_BLUETOOTHAR5K_PHY_BLUETOOTH 0xa254 reg.h 　
34954
 AR5K_PHY_TPC_RG1AR5K_PHY_TPC_RG1 0xa258 reg.h 　
34955
 AR5K_PHY_TPC_RG1_NUM_PD_GAINAR5K_PHY_TPC_RG1_NUM_PD_GAIN 0x0000c000 reg.h 　
34956
 AR5K_PHY_TPC_RG1_NUM_PD_GAIN_SAR5K_PHY_TPC_RG1_NUM_PD_GAIN_S 14 reg.h 　
34957
 AR5K_PHY_TPC_RG1_PDGAIN_1AR5K_PHY_TPC_RG1_PDGAIN_1 0x00030000 reg.h 　
34958
 AR5K_PHY_TPC_RG1_PDGAIN_1_SAR5K_PHY_TPC_RG1_PDGAIN_1_S 16 reg.h 　
34959
 AR5K_PHY_TPC_RG1_PDGAIN_2AR5K_PHY_TPC_RG1_PDGAIN_2 0x000c0000 reg.h 　
34960
 AR5K_PHY_TPC_RG1_PDGAIN_2_SAR5K_PHY_TPC_RG1_PDGAIN_2_S 18 reg.h 　
34961
 AR5K_PHY_TPC_RG1_PDGAIN_3AR5K_PHY_TPC_RG1_PDGAIN_3 0x00300000 reg.h 　
34962
 AR5K_PHY_TPC_RG1_PDGAIN_3_SAR5K_PHY_TPC_RG1_PDGAIN_3_S 20 reg.h 　
34963
 AR5K_PHY_TPC_RG5AR5K_PHY_TPC_RG5 0xa26C reg.h 　
34964
 AR5K_PHY_TPC_RG5_PD_GAIN_OVERLAAR5K_PHY_TPC_RG5_PD_GAIN_OVERLA 0x0000000F reg.h 　
34965
 AR5K_PHY_TPC_RG5_PD_GAIN_OVERLAAR5K_PHY_TPC_RG5_PD_GAIN_OVERLA 0 reg.h 　
34966
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 0x000003F0 reg.h 　
34967
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 4 reg.h 　
34968
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 0x0000FC00 reg.h 　
34969
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 10 reg.h 　
34970
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 0x003F0000 reg.h 　
34971
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 16 reg.h 　
34972
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 0x0FC00000 reg.h 　
34973
 AR5K_PHY_TPC_RG5_PD_GAIN_BOUNDAAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA 22 reg.h 　
34974
 AR5K_PHY_PDADC_TXPOWER_BASEAR5K_PHY_PDADC_TXPOWER_BASE 0xa280 reg.h 　
34975
 AR5K_RF5111_OB_2GHZAR5K_RF5111_OB_2GHZ { 3, 119, 0 } rfbuffer.h 　
34976
 AR5K_RF5111_DB_2GHZAR5K_RF5111_DB_2GHZ { 3, 122, 0 } rfbuffer.h 　
34977
 AR5K_RF5111_OB_5GHZAR5K_RF5111_OB_5GHZ { 3, 104, 0 } rfbuffer.h 　
34978
 AR5K_RF5111_DB_5GHZAR5K_RF5111_DB_5GHZ { 3, 107, 0 } rfbuffer.h 　
34979
 AR5K_RF5111_PWD_XPDAR5K_RF5111_PWD_XPD { 1, 95, 0 } rfbuffer.h 　
34980
 AR5K_RF5111_XPD_GAINAR5K_RF5111_XPD_GAIN { 4, 96, 0 } rfbuffer.h 　
34981
 AR5K_RF5111_GAIN_IAR5K_RF5111_GAIN_I { 6, 29, 0 } rfbuffer.h 　
34982
 AR5K_RF5111_PLO_SELAR5K_RF5111_PLO_SEL { 1, 4, 0 } rfbuffer.h 　
34983
 AR5K_RF5111_RFGAIN_SELAR5K_RF5111_RFGAIN_SEL { 1, 36, 0 } rfbuffer.h 　
34984
 AR5K_RF5111_RFGAIN_STEPAR5K_RF5111_RFGAIN_STEP { 6, 37, 0 } rfbuffer.h 　
34985
 AR5K_RF5111_WAIT_SAR5K_RF5111_WAIT_S { 5, 19, 0 } rfbuffer.h 　
34986
 AR5K_RF5111_WAIT_IAR5K_RF5111_WAIT_I { 5, 24, 0 } rfbuffer.h 　
34987
 AR5K_RF5111_MAX_TIMEAR5K_RF5111_MAX_TIME { 2, 49, 0 } rfbuffer.h 　
34988
 AR5K_RF5112X_GAIN_IAR5K_RF5112X_GAIN_I { 6, 14, 0 } rfbuffer.h 　
34989
 AR5K_RF5112X_MIXVGA_OVRAR5K_RF5112X_MIXVGA_OVR { 1, 36, 0 } rfbuffer.h 　
34990
 AR5K_RF5112X_MIXGAIN_OVRAR5K_RF5112X_MIXGAIN_OVR { 2, 37, 0 } rfbuffer.h 　
34991
 AR5K_RF5112X_MIXGAIN_STEPAR5K_RF5112X_MIXGAIN_STEP { 4, 32, 0 } rfbuffer.h 　
34992
 AR5K_RF5112X_PD_DELAY_AAR5K_RF5112X_PD_DELAY_A { 4, 58, 0 } rfbuffer.h 　
34993
 AR5K_RF5112X_PD_DELAY_BAR5K_RF5112X_PD_DELAY_B { 4, 62, 0 } rfbuffer.h 　
34994
 AR5K_RF5112X_PD_DELAY_XRAR5K_RF5112X_PD_DELAY_XR { 4, 66, 0 } rfbuffer.h 　
34995
 AR5K_RF5112X_PD_PERIOD_AAR5K_RF5112X_PD_PERIOD_A { 4, 70, 0 } rfbuffer.h 　
34996
 AR5K_RF5112X_PD_PERIOD_BAR5K_RF5112X_PD_PERIOD_B { 4, 74, 0 } rfbuffer.h 　
34997
 AR5K_RF5112X_PD_PERIOD_XRAR5K_RF5112X_PD_PERIOD_XR { 4, 78, 0 } rfbuffer.h 　
34998
 AR5K_RF5112_OB_2GHZAR5K_RF5112_OB_2GHZ { 3, 269, 0 } rfbuffer.h 　
34999
 AR5K_RF5112_DB_2GHZAR5K_RF5112_DB_2GHZ { 3, 272, 0 } rfbuffer.h 　
35000
 AR5K_RF5112_OB_5GHZAR5K_RF5112_OB_5GHZ { 3, 261, 0 } rfbuffer.h 　
35001
 AR5K_RF5112_DB_5GHZAR5K_RF5112_DB_5GHZ { 3, 264, 0 } rfbuffer.h 　
35002
 AR5K_RF5112_FIXED_BIAS_AAR5K_RF5112_FIXED_BIAS_A { 1, 260, 0 } rfbuffer.h 　
35003
 AR5K_RF5112_FIXED_BIAS_BAR5K_RF5112_FIXED_BIAS_B { 1, 259, 0 } rfbuffer.h 　
35004
 AR5K_RF5112_XPD_SELAR5K_RF5112_XPD_SEL { 1, 284, 0 } rfbuffer.h 　
35005
 AR5K_RF5112_XPD_GAINAR5K_RF5112_XPD_GAIN { 2, 252, 0 } rfbuffer.h 　
35006
 AR5K_RF5112A_OB_2GHZAR5K_RF5112A_OB_2GHZ { 3, 287, 0 } rfbuffer.h 　
35007
 AR5K_RF5112A_DB_2GHZAR5K_RF5112A_DB_2GHZ { 3, 290, 0 } rfbuffer.h 　
35008
 AR5K_RF5112A_OB_5GHZAR5K_RF5112A_OB_5GHZ { 3, 279, 0 } rfbuffer.h 　
35009
 AR5K_RF5112A_DB_5GHZAR5K_RF5112A_DB_5GHZ { 3, 282, 0 } rfbuffer.h 　
35010
 AR5K_RF5112A_FIXED_BIAS_AAR5K_RF5112A_FIXED_BIAS_A { 1, 278, 0 } rfbuffer.h 　
35011
 AR5K_RF5112A_FIXED_BIAS_BAR5K_RF5112A_FIXED_BIAS_B { 1, 277, 0 } rfbuffer.h 　
35012
 AR5K_RF5112A_XPD_SELAR5K_RF5112A_XPD_SEL { 1, 302, 0 } rfbuffer.h 　
35013
 AR5K_RF5112A_PDGAINLOAR5K_RF5112A_PDGAINLO { 2, 270, 0 } rfbuffer.h 　
35014
 AR5K_RF5112A_PDGAINHIAR5K_RF5112A_PDGAINHI { 2, 257, 0 } rfbuffer.h 　
35015
 AR5K_RF5112A_HIGH_VC_CPAR5K_RF5112A_HIGH_VC_CP { 2, 90, 2 } rfbuffer.h 　
35016
 AR5K_RF5112A_MID_VC_CPAR5K_RF5112A_MID_VC_CP { 2, 92, 2 } rfbuffer.h 　
35017
 AR5K_RF5112A_LOW_VC_CPAR5K_RF5112A_LOW_VC_CP { 2, 94, 2 } rfbuffer.h 　
35018
 AR5K_RF5112A_PUSH_UPAR5K_RF5112A_PUSH_UP { 1, 254, 2 } rfbuffer.h 　
35019
 AR5K_RF5112A_PAD2GNDAR5K_RF5112A_PAD2GND { 1, 281, 1 } rfbuffer.h 　
35020
 AR5K_RF5112A_XB2_LVLAR5K_RF5112A_XB2_LVL { 2, 1, 3 } rfbuffer.h 　
35021
 AR5K_RF5112A_XB5_LVLAR5K_RF5112A_XB5_LVL { 2, 3, 3 } rfbuffer.h 　
35022
 AR5K_RF2413_OB_2GHZAR5K_RF2413_OB_2GHZ { 3, 168, 0 } rfbuffer.h 　
35023
 AR5K_RF2413_DB_2GHZAR5K_RF2413_DB_2GHZ { 3, 165, 0 } rfbuffer.h 　
35024
 AR5K_RF2316_OB_2GHZAR5K_RF2316_OB_2GHZ { 3, 178, 0 } rfbuffer.h 　
35025
 AR5K_RF2316_DB_2GHZAR5K_RF2316_DB_2GHZ { 3, 175, 0 } rfbuffer.h 　
35026
 AR5K_RF5413_OB_2GHZAR5K_RF5413_OB_2GHZ { 3, 241, 0 } rfbuffer.h 　
35027
 AR5K_RF5413_DB_2GHZAR5K_RF5413_DB_2GHZ { 3, 238, 0 } rfbuffer.h 　
35028
 AR5K_RF5413_OB_5GHZAR5K_RF5413_OB_5GHZ { 3, 247, 0 } rfbuffer.h 　
35029
 AR5K_RF5413_DB_5GHZAR5K_RF5413_DB_5GHZ { 3, 244, 0 } rfbuffer.h 　
35030
 AR5K_RF5413_PWD_ICLOBUF2GAR5K_RF5413_PWD_ICLOBUF2G { 3, 131, 3 } rfbuffer.h 　
35031
 AR5K_RF5413_DERBY_CHAN_SEL_MODEAR5K_RF5413_DERBY_CHAN_SEL_MODE { 1, 291, 2 } rfbuffer.h 　
35032
 AR5K_RF2425_OB_2GHZAR5K_RF2425_OB_2GHZ { 3, 193, 0 } rfbuffer.h 　
35033
 AR5K_RF2425_DB_2GHZAR5K_RF2425_DB_2GHZ { 3, 190, 0 } rfbuffer.h 　
35034
 AR5K_GAIN_CRN_FIX_BITS_5111AR5K_GAIN_CRN_FIX_BITS_5111 4 rfgain.h 　
35035
 AR5K_GAIN_CRN_FIX_BITS_5112AR5K_GAIN_CRN_FIX_BITS_5112 7 rfgain.h 　
35036
 AR5K_GAIN_CRN_MAX_FIX_BITSAR5K_GAIN_CRN_MAX_FIX_BITS AR5K_GAIN_CRN_FIX_BITS_5112 rfgain.h 　
35037
 AR5K_GAIN_DYN_ADJUST_HI_MARGINAR5K_GAIN_DYN_ADJUST_HI_MARGIN 15 rfgain.h 　
35038
 AR5K_GAIN_DYN_ADJUST_LO_MARGINAR5K_GAIN_DYN_ADJUST_LO_MARGIN 20 rfgain.h 　
35039
 AR5K_GAIN_CCK_PROBE_CORRAR5K_GAIN_CCK_PROBE_CORR 5 rfgain.h 　
35040
 AR5K_GAIN_CCK_OFDM_GAIN_DELTAAR5K_GAIN_CCK_OFDM_GAIN_DELTA 15 rfgain.h 　
35041
 AR5K_GAIN_STEP_COUNTAR5K_GAIN_STEP_COUNT 10 rfgain.h 　
35042
 BAR_0BAR_0 0 e1000.h 　
35043
 BAR_1BAR_1 1 e1000.h 　
35044
 BAR_5BAR_5 5 e1000.h 　
35045
 E1000_RXBUFFER_128E1000_RXBUFFER_128 128 e1000.h Used for packet split
35046
 E1000_RXBUFFER_256E1000_RXBUFFER_256 256 e1000.h Used for packet split
35047
 E1000_RXBUFFER_512E1000_RXBUFFER_512 512 e1000.h 　
35048
 E1000_RXBUFFER_1024E1000_RXBUFFER_1024 1024 e1000.h 　
35049
 E1000_RXBUFFER_2048E1000_RXBUFFER_2048 2048 e1000.h 　
35050
 E1000_RXBUFFER_4096E1000_RXBUFFER_4096 4096 e1000.h 　
35051
 E1000_RXBUFFER_8192E1000_RXBUFFER_8192 8192 e1000.h 　
35052
 E1000_RXBUFFER_16384E1000_RXBUFFER_16384 16384 e1000.h 　
35053
 E1000_SMARTSPEED_DOWNSHIFTE1000_SMARTSPEED_DOWNSHIFT 3 e1000.h 　
35054
 E1000_SMARTSPEED_MAXE1000_SMARTSPEED_MAX 15 e1000.h 　
35055
 E1000_PBA_BYTES_SHIFTE1000_PBA_BYTES_SHIFT 0xA e1000.h 　
35056
 E1000_TX_HEAD_ADDR_SHIFTE1000_TX_HEAD_ADDR_SHIFT 7 e1000.h 　
35057
 E1000_PBA_TX_MASKE1000_PBA_TX_MASK 0xFFFF0000 e1000.h 　
35058
 E1000_FC_HIGH_DIFFE1000_FC_HIGH_DIFF 0x1638 e1000.h High: 5688 bytes below Rx FIFO size
35059
 E1000_FC_LOW_DIFFE1000_FC_LOW_DIFF 0x1640 e1000.h Low: 5696 bytes below Rx FIFO size
35060
 E1000_FC_PAUSE_TIMEE1000_FC_PAUSE_TIME 0x0680 e1000.h 858 usec
35061
 MAXIMUM_ETHERNET_VLAN_SIZEMAXIMUM_ETHERNET_VLAN_SIZE 1522 e1000.h 　
35062
 E1000_TX_QUEUE_WAKEE1000_TX_QUEUE_WAKE 16 e1000.h 　
35063
 E1000_RX_BUFFER_WRITEE1000_RX_BUFFER_WRITE 16 e1000.h Must be power of 2
35064
 AUTO_ALL_MODESAUTO_ALL_MODES 0 e1000.h 　
35065
 E1000_EEPROM_82544_APME1000_EEPROM_82544_APM 0x0004 e1000.h 　
35066
 E1000_EEPROM_ICH8_APMEE1000_EEPROM_ICH8_APME 0x0004 e1000.h 　
35067
 E1000_EEPROM_APMEE1000_EEPROM_APME 0x0400 e1000.h 　
35068
 E1000_MASTER_SLAVEE1000_MASTER_SLAVE e1000_ms_hw_default e1000.h 　
35069
 E1000_MNG2HOST_PORT_623E1000_MNG2HOST_PORT_623 (1 << 5) e1000.h 　
35070
 E1000_MNG2HOST_PORT_664E1000_MNG2HOST_PORT_664 (1 << 6) e1000.h 　
35071
 E1000_ERT_2048E1000_ERT_2048 0x100 e1000.h 　
35072
 IORESOURCE_IOIORESOURCE_IO 0x00000100 e1000.h 　
35073
 IORESOURCE_MEMIORESOURCE_MEM 0x00000200 e1000.h 　
35074
 IORESOURCE_PREFETCHIORESOURCE_PREFETCH 0x00001000 e1000.h 　
35075
 E1000_HOST_IF_MAX_SIZEE1000_HOST_IF_MAX_SIZE 2048 e1000_hw.h 　
35076
 E1000_SUCCESSE1000_SUCCESS 0 e1000_hw.h 　
35077
 E1000_ERR_EEPROME1000_ERR_EEPROM 1 e1000_hw.h 　
35078
 E1000_ERR_PHYE1000_ERR_PHY 2 e1000_hw.h 　
35079
 E1000_ERR_CONFIGE1000_ERR_CONFIG 3 e1000_hw.h 　
35080
 E1000_ERR_PARAME1000_ERR_PARAM 4 e1000_hw.h 　
35081
 E1000_ERR_MAC_TYPEE1000_ERR_MAC_TYPE 5 e1000_hw.h 　
35082
 E1000_ERR_PHY_TYPEE1000_ERR_PHY_TYPE 6 e1000_hw.h 　
35083
 E1000_ERR_RESETE1000_ERR_RESET 9 e1000_hw.h 　
35084
 E1000_ERR_MASTER_REQUESTS_PENDIE1000_ERR_MASTER_REQUESTS_PENDI 10 e1000_hw.h 　
35085
 E1000_ERR_HOST_INTERFACE_COMMANE1000_ERR_HOST_INTERFACE_COMMAN 11 e1000_hw.h 　
35086
 E1000_BLK_PHY_RESETE1000_BLK_PHY_RESET 12 e1000_hw.h 　
35087
 E1000_ERR_SWFW_SYNCE1000_ERR_SWFW_SYNC 13 e1000_hw.h 　
35088
 E1000_MNG_DHCP_TX_PAYLOAD_CMDE1000_MNG_DHCP_TX_PAYLOAD_CMD 64 e1000_hw.h 　
35089
 E1000_HI_MAX_MNG_DATA_LENGTHE1000_HI_MAX_MNG_DATA_LENGTH 0x6F8 e1000_hw.h Host Interface data length
35090
 E1000_MNG_DHCP_COMMAND_TIMEOUTE1000_MNG_DHCP_COMMAND_TIMEOUT 10 e1000_hw.h Time in ms to process MNG command
35091
 E1000_MNG_DHCP_COOKIE_OFFSETE1000_MNG_DHCP_COOKIE_OFFSET 0x6F0 e1000_hw.h Cookie offset
35092
 E1000_MNG_DHCP_COOKIE_LENGTHE1000_MNG_DHCP_COOKIE_LENGTH 0x10 e1000_hw.h Cookie length
35093
 E1000_MNG_IAMT_MODEE1000_MNG_IAMT_MODE 0x3 e1000_hw.h 　
35094
 E1000_MNG_ICH_IAMT_MODEE1000_MNG_ICH_IAMT_MODE 0x2 e1000_hw.h 　
35095
 E1000_IAMT_SIGNATUREE1000_IAMT_SIGNATURE 0x544D4149 e1000_hw.h Intel(R) Active Management Technology signature
35096
 E1000_MNG_DHCP_COOKIE_STATUS_PAE1000_MNG_DHCP_COOKIE_STATUS_PA 0x1 e1000_hw.h DHCP parsing enabled
35097
 E1000_MNG_DHCP_COOKIE_STATUS_VLE1000_MNG_DHCP_COOKIE_STATUS_VL 0x2 e1000_hw.h DHCP parsing enabled
35098
 E1000_VFTA_ENTRY_SHIFTE1000_VFTA_ENTRY_SHIFT 0x5 e1000_hw.h 　
35099
 E1000_VFTA_ENTRY_MASKE1000_VFTA_ENTRY_MASK 0x7F e1000_hw.h 　
35100
 E1000_VFTA_ENTRY_BIT_SHIFT_MASKE1000_VFTA_ENTRY_BIT_SHIFT_MASK 0x1F e1000_hw.h 　
35101
 E1000_DEV_ID_82542E1000_DEV_ID_82542 0x1000 e1000_hw.h 　
35102
 E1000_DEV_ID_82543GC_FIBERE1000_DEV_ID_82543GC_FIBER 0x1001 e1000_hw.h 　
35103
 E1000_DEV_ID_82543GC_COPPERE1000_DEV_ID_82543GC_COPPER 0x1004 e1000_hw.h 　
35104
 E1000_DEV_ID_82544EI_COPPERE1000_DEV_ID_82544EI_COPPER 0x1008 e1000_hw.h 　
35105
 E1000_DEV_ID_82544EI_FIBERE1000_DEV_ID_82544EI_FIBER 0x1009 e1000_hw.h 　
35106
 E1000_DEV_ID_82544GC_COPPERE1000_DEV_ID_82544GC_COPPER 0x100C e1000_hw.h 　
35107
 E1000_DEV_ID_82544GC_LOME1000_DEV_ID_82544GC_LOM 0x100D e1000_hw.h 　
35108
 E1000_DEV_ID_82540EME1000_DEV_ID_82540EM 0x100E e1000_hw.h 　
35109
 E1000_DEV_ID_82540EM_LOME1000_DEV_ID_82540EM_LOM 0x1015 e1000_hw.h 　
35110
 E1000_DEV_ID_82540EP_LOME1000_DEV_ID_82540EP_LOM 0x1016 e1000_hw.h 　
35111
 E1000_DEV_ID_82540EPE1000_DEV_ID_82540EP 0x1017 e1000_hw.h 　
35112
 E1000_DEV_ID_82540EP_LPE1000_DEV_ID_82540EP_LP 0x101E e1000_hw.h 　
35113
 E1000_DEV_ID_82545EM_COPPERE1000_DEV_ID_82545EM_COPPER 0x100F e1000_hw.h 　
35114
 E1000_DEV_ID_82545EM_FIBERE1000_DEV_ID_82545EM_FIBER 0x1011 e1000_hw.h 　
35115
 E1000_DEV_ID_82545GM_COPPERE1000_DEV_ID_82545GM_COPPER 0x1026 e1000_hw.h 　
35116
 E1000_DEV_ID_82545GM_FIBERE1000_DEV_ID_82545GM_FIBER 0x1027 e1000_hw.h 　
35117
 E1000_DEV_ID_82545GM_SERDESE1000_DEV_ID_82545GM_SERDES 0x1028 e1000_hw.h 　
35118
 E1000_DEV_ID_82546EB_COPPERE1000_DEV_ID_82546EB_COPPER 0x1010 e1000_hw.h 　
35119
 E1000_DEV_ID_82546EB_FIBERE1000_DEV_ID_82546EB_FIBER 0x1012 e1000_hw.h 　
35120
 E1000_DEV_ID_82546EB_QUAD_COPPEE1000_DEV_ID_82546EB_QUAD_COPPE 0x101D e1000_hw.h 　
35121
 E1000_DEV_ID_82541EIE1000_DEV_ID_82541EI 0x1013 e1000_hw.h 　
35122
 E1000_DEV_ID_82541EI_MOBILEE1000_DEV_ID_82541EI_MOBILE 0x1018 e1000_hw.h 　
35123
 E1000_DEV_ID_82541ER_LOME1000_DEV_ID_82541ER_LOM 0x1014 e1000_hw.h 　
35124
 E1000_DEV_ID_82541ERE1000_DEV_ID_82541ER 0x1078 e1000_hw.h 　
35125
 E1000_DEV_ID_82547GIE1000_DEV_ID_82547GI 0x1075 e1000_hw.h 　
35126
 E1000_DEV_ID_82541GIE1000_DEV_ID_82541GI 0x1076 e1000_hw.h 　
35127
 E1000_DEV_ID_82541GI_MOBILEE1000_DEV_ID_82541GI_MOBILE 0x1077 e1000_hw.h 　
35128
 E1000_DEV_ID_82541GI_LFE1000_DEV_ID_82541GI_LF 0x107C e1000_hw.h 　
35129
 E1000_DEV_ID_82546GB_COPPERE1000_DEV_ID_82546GB_COPPER 0x1079 e1000_hw.h 　
35130
 E1000_DEV_ID_82546GB_FIBERE1000_DEV_ID_82546GB_FIBER 0x107A e1000_hw.h 　
35131
 E1000_DEV_ID_82546GB_SERDESE1000_DEV_ID_82546GB_SERDES 0x107B e1000_hw.h 　
35132
 E1000_DEV_ID_82546GB_PCIEE1000_DEV_ID_82546GB_PCIE 0x108A e1000_hw.h 　
35133
 E1000_DEV_ID_82546GB_QUAD_COPPEE1000_DEV_ID_82546GB_QUAD_COPPE 0x1099 e1000_hw.h 　
35134
 E1000_DEV_ID_82547EIE1000_DEV_ID_82547EI 0x1019 e1000_hw.h 　
35135
 E1000_DEV_ID_82547EI_MOBILEE1000_DEV_ID_82547EI_MOBILE 0x101A e1000_hw.h 　
35136
 E1000_DEV_ID_82571EB_COPPERE1000_DEV_ID_82571EB_COPPER 0x105E e1000_hw.h 　
35137
 E1000_DEV_ID_82571EB_FIBERE1000_DEV_ID_82571EB_FIBER 0x105F e1000_hw.h 　
35138
 E1000_DEV_ID_82571EB_SERDESE1000_DEV_ID_82571EB_SERDES 0x1060 e1000_hw.h 　
35139
 E1000_DEV_ID_82571EB_QUAD_COPPEE1000_DEV_ID_82571EB_QUAD_COPPE 0x10A4 e1000_hw.h 　
35140
 E1000_DEV_ID_82571EB_QUAD_FIBERE1000_DEV_ID_82571EB_QUAD_FIBER 0x10A5 e1000_hw.h 　
35141
 E1000_DEV_ID_82571EB_QUAD_COPPEE1000_DEV_ID_82571EB_QUAD_COPPE 0x10BC e1000_hw.h 　
35142
 E1000_DEV_ID_82571EB_SERDES_DUAE1000_DEV_ID_82571EB_SERDES_DUA 0x10D9 e1000_hw.h 　
35143
 E1000_DEV_ID_82571EB_SERDES_QUAE1000_DEV_ID_82571EB_SERDES_QUA 0x10DA e1000_hw.h 　
35144
 E1000_DEV_ID_82572EI_COPPERE1000_DEV_ID_82572EI_COPPER 0x107D e1000_hw.h 　
35145
 E1000_DEV_ID_82572EI_FIBERE1000_DEV_ID_82572EI_FIBER 0x107E e1000_hw.h 　
35146
 E1000_DEV_ID_82572EI_SERDESE1000_DEV_ID_82572EI_SERDES 0x107F e1000_hw.h 　
35147
 E1000_DEV_ID_82572EIE1000_DEV_ID_82572EI 0x10B9 e1000_hw.h 　
35148
 E1000_DEV_ID_82573EE1000_DEV_ID_82573E 0x108B e1000_hw.h 　
35149
 E1000_DEV_ID_82573E_IAMTE1000_DEV_ID_82573E_IAMT 0x108C e1000_hw.h 　
35150
 E1000_DEV_ID_82573LE1000_DEV_ID_82573L 0x109A e1000_hw.h 　
35151
 E1000_DEV_ID_82546GB_QUAD_COPPEE1000_DEV_ID_82546GB_QUAD_COPPE 0x10B5 e1000_hw.h 　
35152
 E1000_DEV_ID_80003ES2LAN_COPPERE1000_DEV_ID_80003ES2LAN_COPPER 0x1096 e1000_hw.h 　
35153
 E1000_DEV_ID_80003ES2LAN_SERDESE1000_DEV_ID_80003ES2LAN_SERDES 0x1098 e1000_hw.h 　
35154
 E1000_DEV_ID_80003ES2LAN_COPPERE1000_DEV_ID_80003ES2LAN_COPPER 0x10BA e1000_hw.h 　
35155
 E1000_DEV_ID_80003ES2LAN_SERDESE1000_DEV_ID_80003ES2LAN_SERDES 0x10BB e1000_hw.h 　
35156
 E1000_DEV_ID_ICH8_IGP_M_AMTE1000_DEV_ID_ICH8_IGP_M_AMT 0x1049 e1000_hw.h 　
35157
 E1000_DEV_ID_ICH8_IGP_AMTE1000_DEV_ID_ICH8_IGP_AMT 0x104A e1000_hw.h 　
35158
 E1000_DEV_ID_ICH8_IGP_CE1000_DEV_ID_ICH8_IGP_C 0x104B e1000_hw.h 　
35159
 E1000_DEV_ID_ICH8_IFEE1000_DEV_ID_ICH8_IFE 0x104C e1000_hw.h 　
35160
 E1000_DEV_ID_ICH8_IFE_GTE1000_DEV_ID_ICH8_IFE_GT 0x10C4 e1000_hw.h 　
35161
 E1000_DEV_ID_ICH8_IFE_GE1000_DEV_ID_ICH8_IFE_G 0x10C5 e1000_hw.h 　
35162
 E1000_DEV_ID_ICH8_IGP_ME1000_DEV_ID_ICH8_IGP_M 0x104D e1000_hw.h 　
35163
 E1000_DEV_ID_82576E1000_DEV_ID_82576 0x10C9 e1000_hw.h 　
35164
 NODE_ADDRESS_SIZENODE_ADDRESS_SIZE 6 e1000_hw.h 　
35165
 ETH_LENGTH_OF_ADDRESSETH_LENGTH_OF_ADDRESS 6 e1000_hw.h 　
35166
 MAC_DECODE_SIZEMAC_DECODE_SIZE (128 * 1024) e1000_hw.h 　
35167
 E1000_82542_2_0_REV_IDE1000_82542_2_0_REV_ID 2 e1000_hw.h 　
35168
 E1000_82542_2_1_REV_IDE1000_82542_2_1_REV_ID 3 e1000_hw.h 　
35169
 E1000_REVISION_0E1000_REVISION_0 0 e1000_hw.h 　
35170
 E1000_REVISION_1E1000_REVISION_1 1 e1000_hw.h 　
35171
 E1000_REVISION_2E1000_REVISION_2 2 e1000_hw.h 　
35172
 E1000_REVISION_3E1000_REVISION_3 3 e1000_hw.h 　
35173
 SPEED_10SPEED_10 10 e1000_hw.h 　
35174
 SPEED_100SPEED_100 100 e1000_hw.h 　
35175
 SPEED_1000SPEED_1000 1000 e1000_hw.h 　
35176
 HALF_DUPLEXHALF_DUPLEX 1 e1000_hw.h 　
35177
 FULL_DUPLEXFULL_DUPLEX 2 e1000_hw.h 　
35178
 ENET_HEADER_SIZEENET_HEADER_SIZE 14 e1000_hw.h 　
35179
 MAXIMUM_ETHERNET_FRAME_SIZEMAXIMUM_ETHERNET_FRAME_SIZE 1518 e1000_hw.h With FCS
35180
 MINIMUM_ETHERNET_FRAME_SIZEMINIMUM_ETHERNET_FRAME_SIZE 64 e1000_hw.h With FCS
35181
 ETHERNET_FCS_SIZEETHERNET_FCS_SIZE 4 e1000_hw.h 　
35182
 MAXIMUM_ETHERNET_PACKET_SIZEMAXIMUM_ETHERNET_PACKET_SIZE (MAXIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE) e1000_hw.h 　
35183
 MINIMUM_ETHERNET_PACKET_SIZEMINIMUM_ETHERNET_PACKET_SIZE (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE) e1000_hw.h 　
35184
 CRC_LENGTHCRC_LENGTH ETHERNET_FCS_SIZE e1000_hw.h 　
35185
 MAX_JUMBO_FRAME_SIZEMAX_JUMBO_FRAME_SIZE 0x3F00 e1000_hw.h 　
35186
 VLAN_TAG_SIZEVLAN_TAG_SIZE 4 e1000_hw.h 802.3ac tag (not DMAed)
35187
 ETHERNET_IEEE_VLAN_TYPEETHERNET_IEEE_VLAN_TYPE 0x8100 e1000_hw.h 802.3ac packet
35188
 ETHERNET_IP_TYPEETHERNET_IP_TYPE 0x0800 e1000_hw.h IP packets
35189
 ETHERNET_ARP_TYPEETHERNET_ARP_TYPE 0x0806 e1000_hw.h Address Resolution Protocol (ARP)
35190
 IP_PROTOCOL_TCPIP_PROTOCOL_TCP 6 e1000_hw.h 　
35191
 IP_PROTOCOL_UDPIP_PROTOCOL_UDP 0x11 e1000_hw.h 　
35192
 POLL_IMS_ENABLE_MASKPOLL_IMS_ENABLE_MASK ( \ E1000_IMS_RXDMT0 | \ E1000_IMS_RXSEQ) e1000_hw.h 　
35193
 IMS_ENABLE_MASKIMS_ENABLE_MASK ( \ E1000_IMS_RXT0 | \ E1000_IMS_TXDW | \ E1000_IMS_RXDMT0 | \ E1000_IMS_RXSEQ | \ E1000_IMS_LSC | \ E10 e1000_hw.h 　
35194
 IMS_ICH8LAN_ENABLE_MASKIMS_ICH8LAN_ENABLE_MASK (\ E1000_IMS_DSW | \ E1000_IMS_PHYINT | \ E1000_IMS_EPRST) e1000_hw.h 　
35195
 E1000_RAR_ENTRIESE1000_RAR_ENTRIES 15 e1000_hw.h 　
35196
 E1000_RAR_ENTRIES_ICH8LANE1000_RAR_ENTRIES_ICH8LAN 6 e1000_hw.h 　
35197
 MIN_NUMBER_OF_DESCRIPTORSMIN_NUMBER_OF_DESCRIPTORS 8 e1000_hw.h 　
35198
 MAX_NUMBER_OF_DESCRIPTORSMAX_NUMBER_OF_DESCRIPTORS 0xFFF8 e1000_hw.h 　
35199
 MAX_PS_BUFFERSMAX_PS_BUFFERS 4 e1000_hw.h 　
35200
 E1000_RXD_STAT_DDE1000_RXD_STAT_DD 0x01 e1000_hw.h Descriptor Done
35201
 E1000_RXD_STAT_EOPE1000_RXD_STAT_EOP 0x02 e1000_hw.h End of Packet
35202
 E1000_RXD_STAT_IXSME1000_RXD_STAT_IXSM 0x04 e1000_hw.h Ignore checksum
35203
 E1000_RXD_STAT_VPE1000_RXD_STAT_VP 0x08 e1000_hw.h IEEE VLAN Packet
35204
 E1000_RXD_STAT_UDPCSE1000_RXD_STAT_UDPCS 0x10 e1000_hw.h UDP xsum caculated
35205
 E1000_RXD_STAT_TCPCSE1000_RXD_STAT_TCPCS 0x20 e1000_hw.h TCP xsum calculated
35206
 E1000_RXD_STAT_IPCSE1000_RXD_STAT_IPCS 0x40 e1000_hw.h IP xsum calculated
35207
 E1000_RXD_STAT_PIFE1000_RXD_STAT_PIF 0x80 e1000_hw.h passed in-exact filter
35208
 E1000_RXD_STAT_IPIDVE1000_RXD_STAT_IPIDV 0x200 e1000_hw.h IP identification valid
35209
 E1000_RXD_STAT_UDPVE1000_RXD_STAT_UDPV 0x400 e1000_hw.h Valid UDP checksum
35210
 E1000_RXD_STAT_ACKE1000_RXD_STAT_ACK 0x8000 e1000_hw.h ACK Packet indication
35211
 E1000_RXD_ERR_CEE1000_RXD_ERR_CE 0x01 e1000_hw.h CRC Error
35212
 E1000_RXD_ERR_SEE1000_RXD_ERR_SE 0x02 e1000_hw.h Symbol Error
35213
 E1000_RXD_ERR_SEQE1000_RXD_ERR_SEQ 0x04 e1000_hw.h Sequence Error
35214
 E1000_RXD_ERR_CXEE1000_RXD_ERR_CXE 0x10 e1000_hw.h Carrier Extension Error
35215
 E1000_RXD_ERR_TCPEE1000_RXD_ERR_TCPE 0x20 e1000_hw.h TCP/UDP Checksum Error
35216
 E1000_RXD_ERR_IPEE1000_RXD_ERR_IPE 0x40 e1000_hw.h IP Checksum Error
35217
 E1000_RXD_ERR_RXEE1000_RXD_ERR_RXE 0x80 e1000_hw.h Rx Data Error
35218
 E1000_RXD_SPC_VLAN_MASKE1000_RXD_SPC_VLAN_MASK 0x0FFF e1000_hw.h VLAN ID is in lower 12 bits
35219
 E1000_RXD_SPC_PRI_MASKE1000_RXD_SPC_PRI_MASK 0xE000 e1000_hw.h Priority is in upper 3 bits
35220
 E1000_RXD_SPC_PRI_SHIFTE1000_RXD_SPC_PRI_SHIFT 13 e1000_hw.h 　
35221
 E1000_RXD_SPC_CFI_MASKE1000_RXD_SPC_CFI_MASK 0x1000 e1000_hw.h CFI is bit 12
35222
 E1000_RXD_SPC_CFI_SHIFTE1000_RXD_SPC_CFI_SHIFT 12 e1000_hw.h 　
35223
 E1000_RXDEXT_STATERR_CEE1000_RXDEXT_STATERR_CE 0x01000000 e1000_hw.h 　
35224
 E1000_RXDEXT_STATERR_SEE1000_RXDEXT_STATERR_SE 0x02000000 e1000_hw.h 　
35225
 E1000_RXDEXT_STATERR_SEQE1000_RXDEXT_STATERR_SEQ 0x04000000 e1000_hw.h 　
35226
 E1000_RXDEXT_STATERR_CXEE1000_RXDEXT_STATERR_CXE 0x10000000 e1000_hw.h 　
35227
 E1000_RXDEXT_STATERR_TCPEE1000_RXDEXT_STATERR_TCPE 0x20000000 e1000_hw.h 　
35228
 E1000_RXDEXT_STATERR_IPEE1000_RXDEXT_STATERR_IPE 0x40000000 e1000_hw.h 　
35229
 E1000_RXDEXT_STATERR_RXEE1000_RXDEXT_STATERR_RXE 0x80000000 e1000_hw.h 　
35230
 E1000_RXDPS_HDRSTAT_HDRSPE1000_RXDPS_HDRSTAT_HDRSP 0x00008000 e1000_hw.h 　
35231
 E1000_RXDPS_HDRSTAT_HDRLEN_MASKE1000_RXDPS_HDRSTAT_HDRLEN_MASK 0x000003FF e1000_hw.h 　
35232
 E1000_RXD_ERR_FRAME_ERR_MASKE1000_RXD_ERR_FRAME_ERR_MASK ( \ E1000_RXD_ERR_CE | \ E1000_RXD_ERR_SE | \ E1000_RXD_ERR_SEQ | \ E1000_RXD_ER e1000_hw.h 　
35233
 E1000_RXDEXT_ERR_FRAME_ERR_MASKE1000_RXDEXT_ERR_FRAME_ERR_MASK ( \ E1000_RXDEXT_STATERR_CE | \ E1000_RXDEXT_STATERR_SE | \ E1000_RXDEXT_STATERR_SEQ | \ E10 e1000_hw.h 　
35234
 E1000_TXD_DTYP_DE1000_TXD_DTYP_D 0x00100000 e1000_hw.h Data Descriptor
35235
 E1000_TXD_DTYP_CE1000_TXD_DTYP_C 0x00000000 e1000_hw.h Context Descriptor
35236
 E1000_TXD_POPTS_IXSME1000_TXD_POPTS_IXSM 0x01 e1000_hw.h Insert IP checksum
35237
 E1000_TXD_POPTS_TXSME1000_TXD_POPTS_TXSM 0x02 e1000_hw.h Insert TCP/UDP checksum
35238
 E1000_TXD_CMD_EOPE1000_TXD_CMD_EOP 0x01000000 e1000_hw.h End of Packet
35239
 E1000_TXD_CMD_IFCSE1000_TXD_CMD_IFCS 0x02000000 e1000_hw.h Insert FCS (Ethernet CRC)
35240
 E1000_TXD_CMD_ICE1000_TXD_CMD_IC 0x04000000 e1000_hw.h Insert Checksum
35241
 E1000_TXD_CMD_RSE1000_TXD_CMD_RS 0x08000000 e1000_hw.h Report Status
35242
 E1000_TXD_CMD_RPSE1000_TXD_CMD_RPS 0x10000000 e1000_hw.h Report Packet Sent
35243
 E1000_TXD_CMD_DEXTE1000_TXD_CMD_DEXT 0x20000000 e1000_hw.h Descriptor extension (0 = legacy)
35244
 E1000_TXD_CMD_VLEE1000_TXD_CMD_VLE 0x40000000 e1000_hw.h Add VLAN tag
35245
 E1000_TXD_CMD_IDEE1000_TXD_CMD_IDE 0x80000000 e1000_hw.h Enable Tidv register
35246
 E1000_TXD_STAT_DDE1000_TXD_STAT_DD 0x00000001 e1000_hw.h Descriptor Done
35247
 E1000_TXD_STAT_ECE1000_TXD_STAT_EC 0x00000002 e1000_hw.h Excess Collisions
35248
 E1000_TXD_STAT_LCE1000_TXD_STAT_LC 0x00000004 e1000_hw.h Late Collisions
35249
 E1000_TXD_STAT_TUE1000_TXD_STAT_TU 0x00000008 e1000_hw.h Transmit underrun
35250
 E1000_TXD_CMD_TCPE1000_TXD_CMD_TCP 0x01000000 e1000_hw.h TCP packet
35251
 E1000_TXD_CMD_IPE1000_TXD_CMD_IP 0x02000000 e1000_hw.h IP packet
35252
 E1000_TXD_CMD_TSEE1000_TXD_CMD_TSE 0x04000000 e1000_hw.h TCP Seg enable
35253
 E1000_TXD_STAT_TCE1000_TXD_STAT_TC 0x00000004 e1000_hw.h Tx Underrun
35254
 E1000_NUM_UNICASTE1000_NUM_UNICAST 16 e1000_hw.h Unicast filter entries
35255
 E1000_MC_TBL_SIZEE1000_MC_TBL_SIZE 128 e1000_hw.h Multicast Filter Table (4096 bits)
35256
 E1000_VLAN_FILTER_TBL_SIZEE1000_VLAN_FILTER_TBL_SIZE 128 e1000_hw.h VLAN Filter Table (4096 bits)
35257
 E1000_NUM_UNICAST_ICH8LANE1000_NUM_UNICAST_ICH8LAN 7 e1000_hw.h 　
35258
 E1000_MC_TBL_SIZE_ICH8LANE1000_MC_TBL_SIZE_ICH8LAN 32 e1000_hw.h 　
35259
 E1000_NUM_MTA_REGISTERSE1000_NUM_MTA_REGISTERS 128 e1000_hw.h 　
35260
 E1000_NUM_MTA_REGISTERS_ICH8LANE1000_NUM_MTA_REGISTERS_ICH8LAN 32 e1000_hw.h 　
35261
 E1000_WAKEUP_IP_ADDRESS_COUNT_ME1000_WAKEUP_IP_ADDRESS_COUNT_M 4 e1000_hw.h 　
35262
 E1000_IP4AT_SIZEE1000_IP4AT_SIZE E1000_WAKEUP_IP_ADDRESS_COUNT_MAX e1000_hw.h 　
35263
 E1000_IP4AT_SIZE_ICH8LANE1000_IP4AT_SIZE_ICH8LAN 3 e1000_hw.h 　
35264
 E1000_IP6AT_SIZEE1000_IP6AT_SIZE 1 e1000_hw.h 　
35265
 E1000_FLEXIBLE_FILTER_COUNT_MAXE1000_FLEXIBLE_FILTER_COUNT_MAX 4 e1000_hw.h 　
35266
 E1000_FLEXIBLE_FILTER_SIZE_MAXE1000_FLEXIBLE_FILTER_SIZE_MAX 128 e1000_hw.h 　
35267
 E1000_FFLT_SIZEE1000_FFLT_SIZE E1000_FLEXIBLE_FILTER_COUNT_MAX e1000_hw.h 　
35268
 E1000_FFMT_SIZEE1000_FFMT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX e1000_hw.h 　
35269
 E1000_FFVT_SIZEE1000_FFVT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX e1000_hw.h 　
35270
 E1000_DISABLE_SERDES_LOOPBACKE1000_DISABLE_SERDES_LOOPBACK 0x0400 e1000_hw.h 　
35271
 E1000_CTRLE1000_CTRL 0x00000 e1000_hw.h Device Control - RW
35272
 E1000_CTRL_DUPE1000_CTRL_DUP 0x00004 e1000_hw.h Device Control Duplicate (Shadow) - RW
35273
 E1000_STATUSE1000_STATUS 0x00008 e1000_hw.h Device Status - RO
35274
 E1000_EECDE1000_EECD 0x00010 e1000_hw.h EEPROM/Flash Control - RW
35275
 E1000_EERDE1000_EERD 0x00014 e1000_hw.h EEPROM Read - RW
35276
 E1000_CTRL_EXTE1000_CTRL_EXT 0x00018 e1000_hw.h Extended Device Control - RW
35277
 E1000_FLAE1000_FLA 0x0001C e1000_hw.h Flash Access - RW
35278
 E1000_MDICE1000_MDIC 0x00020 e1000_hw.h MDI Control - RW
35279
 E1000_SCTLE1000_SCTL 0x00024 e1000_hw.h SerDes Control - RW
35280
 E1000_FEXTNVME1000_FEXTNVM 0x00028 e1000_hw.h Future Extended NVM register
35281
 E1000_FCALE1000_FCAL 0x00028 e1000_hw.h Flow Control Address Low - RW
35282
 E1000_FCAHE1000_FCAH 0x0002C e1000_hw.h Flow Control Address High -RW
35283
 E1000_FCTE1000_FCT 0x00030 e1000_hw.h Flow Control Type - RW
35284
 E1000_VETE1000_VET 0x00038 e1000_hw.h VLAN Ether Type - RW
35285
 E1000_ICRE1000_ICR 0x000C0 e1000_hw.h Interrupt Cause Read - R/clr
35286
 E1000_ITRE1000_ITR 0x000C4 e1000_hw.h Interrupt Throttling Rate - RW
35287
 E1000_ICSE1000_ICS 0x000C8 e1000_hw.h Interrupt Cause Set - WO
35288
 E1000_IMSE1000_IMS 0x000D0 e1000_hw.h Interrupt Mask Set - RW
35289
 E1000_IMCE1000_IMC 0x000D8 e1000_hw.h Interrupt Mask Clear - WO
35290
 E1000_IAME1000_IAM 0x000E0 e1000_hw.h Interrupt Acknowledge Auto Mask
35291
 E1000_RCTLE1000_RCTL 0x00100 e1000_hw.h RX Control - RW
35292
 E1000_RDTR1E1000_RDTR1 0x02820 e1000_hw.h RX Delay Timer (1) - RW
35293
 E1000_RDBAL1E1000_RDBAL1 0x02900 e1000_hw.h RX Descriptor Base Address Low (1) - RW
35294
 E1000_RDBAH1E1000_RDBAH1 0x02904 e1000_hw.h RX Descriptor Base Address High (1) - RW
35295
 E1000_RDLEN1E1000_RDLEN1 0x02908 e1000_hw.h RX Descriptor Length (1) - RW
35296
 E1000_RDH1E1000_RDH1 0x02910 e1000_hw.h RX Descriptor Head (1) - RW
35297
 E1000_RDT1E1000_RDT1 0x02918 e1000_hw.h RX Descriptor Tail (1) - RW
35298
 E1000_FCTTVE1000_FCTTV 0x00170 e1000_hw.h Flow Control Transmit Timer Value - RW
35299
 E1000_TXCWE1000_TXCW 0x00178 e1000_hw.h TX Configuration Word - RW
35300
 E1000_RXCWE1000_RXCW 0x00180 e1000_hw.h RX Configuration Word - RO
35301
 E1000_TCTLE1000_TCTL 0x00400 e1000_hw.h TX Control - RW
35302
 E1000_TCTL_EXTE1000_TCTL_EXT 0x00404 e1000_hw.h Extended TX Control - RW
35303
 E1000_TIPGE1000_TIPG 0x00410 e1000_hw.h TX Inter-packet gap -RW
35304
 E1000_TBTE1000_TBT 0x00448 e1000_hw.h TX Burst Timer - RW
35305
 E1000_AITE1000_AIT 0x00458 e1000_hw.h Adaptive Interframe Spacing Throttle - RW
35306
 E1000_LEDCTLE1000_LEDCTL 0x00E00 e1000_hw.h LED Control - RW
35307
 E1000_EXTCNF_CTRLE1000_EXTCNF_CTRL 0x00F00 e1000_hw.h Extended Configuration Control
35308
 E1000_EXTCNF_SIZEE1000_EXTCNF_SIZE 0x00F08 e1000_hw.h Extended Configuration Size
35309
 E1000_PHY_CTRLE1000_PHY_CTRL 0x00F10 e1000_hw.h PHY Control Register in CSR
35310
 FEXTNVM_SW_CONFIGFEXTNVM_SW_CONFIG 0x0001 e1000_hw.h 　
35311
 E1000_PBAE1000_PBA 0x01000 e1000_hw.h Packet Buffer Allocation - RW
35312
 E1000_PBSE1000_PBS 0x01008 e1000_hw.h Packet Buffer Size
35313
 E1000_EEMNGCTLE1000_EEMNGCTL 0x01010 e1000_hw.h MNG EEprom Control
35314
 E1000_FLASH_UPDATESE1000_FLASH_UPDATES 1000 e1000_hw.h 　
35315
 E1000_EEARBCE1000_EEARBC 0x01024 e1000_hw.h EEPROM Auto Read Bus Control
35316
 E1000_FLASHTE1000_FLASHT 0x01028 e1000_hw.h FLASH Timer Register
35317
 E1000_EEWRE1000_EEWR 0x0102C e1000_hw.h EEPROM Write Register - RW
35318
 E1000_FLSWCTLE1000_FLSWCTL 0x01030 e1000_hw.h FLASH control register
35319
 E1000_FLSWDATAE1000_FLSWDATA 0x01034 e1000_hw.h FLASH data register
35320
 E1000_FLSWCNTE1000_FLSWCNT 0x01038 e1000_hw.h FLASH Access Counter
35321
 E1000_FLOPE1000_FLOP 0x0103C e1000_hw.h FLASH Opcode Register
35322
 E1000_ERTE1000_ERT 0x02008 e1000_hw.h Early Rx Threshold - RW
35323
 E1000_FCRTLE1000_FCRTL 0x02160 e1000_hw.h Flow Control Receive Threshold Low - RW
35324
 E1000_FCRTHE1000_FCRTH 0x02168 e1000_hw.h Flow Control Receive Threshold High - RW
35325
 E1000_PSRCTLE1000_PSRCTL 0x02170 e1000_hw.h Packet Split Receive Control - RW
35326
 E1000_RDBALE1000_RDBAL 0x02800 e1000_hw.h RX Descriptor Base Address Low - RW
35327
 E1000_RDBAHE1000_RDBAH 0x02804 e1000_hw.h RX Descriptor Base Address High - RW
35328
 E1000_RDLENE1000_RDLEN 0x02808 e1000_hw.h RX Descriptor Length - RW
35329
 E1000_RDHE1000_RDH 0x02810 e1000_hw.h RX Descriptor Head - RW
35330
 E1000_RDTE1000_RDT 0x02818 e1000_hw.h RX Descriptor Tail - RW
35331
 E1000_RDTRE1000_RDTR 0x02820 e1000_hw.h RX Delay Timer - RW
35332
 E1000_RDBAL0E1000_RDBAL0 E1000_RDBAL e1000_hw.h RX Desc Base Address Low (0) - RW
35333
 E1000_RDBAH0E1000_RDBAH0 E1000_RDBAH e1000_hw.h RX Desc Base Address High (0) - RW
35334
 E1000_RDLEN0E1000_RDLEN0 E1000_RDLEN e1000_hw.h RX Desc Length (0) - RW
35335
 E1000_RDH0E1000_RDH0 E1000_RDH e1000_hw.h RX Desc Head (0) - RW
35336
 E1000_RDT0E1000_RDT0 E1000_RDT e1000_hw.h RX Desc Tail (0) - RW
35337
 E1000_RDTR0E1000_RDTR0 E1000_RDTR e1000_hw.h RX Delay Timer (0) - RW
35338
 E1000_RXDCTLE1000_RXDCTL 0x02828 e1000_hw.h RX Descriptor Control queue 0 - RW
35339
 E1000_RXDCTL1E1000_RXDCTL1 0x02928 e1000_hw.h RX Descriptor Control queue 1 - RW
35340
 E1000_RADVE1000_RADV 0x0282C e1000_hw.h RX Interrupt Absolute Delay Timer - RW
35341
 E1000_RSRPDE1000_RSRPD 0x02C00 e1000_hw.h RX Small Packet Detect - RW
35342
 E1000_RAIDE1000_RAID 0x02C08 e1000_hw.h Receive Ack Interrupt Delay - RW
35343
 E1000_TXDMACE1000_TXDMAC 0x03000 e1000_hw.h TX DMA Control - RW
35344
 E1000_KABGTXDE1000_KABGTXD 0x03004 e1000_hw.h AFE Band Gap Transmit Ref Data
35345
 E1000_TDFHE1000_TDFH 0x03410 e1000_hw.h TX Data FIFO Head - RW
35346
 E1000_TDFTE1000_TDFT 0x03418 e1000_hw.h TX Data FIFO Tail - RW
35347
 E1000_TDFHSE1000_TDFHS 0x03420 e1000_hw.h TX Data FIFO Head Saved - RW
35348
 E1000_TDFTSE1000_TDFTS 0x03428 e1000_hw.h TX Data FIFO Tail Saved - RW
35349
 E1000_TDFPCE1000_TDFPC 0x03430 e1000_hw.h TX Data FIFO Packet Count - RW
35350
 E1000_TDBALE1000_TDBAL 0x03800 e1000_hw.h TX Descriptor Base Address Low - RW
35351
 E1000_TDBAHE1000_TDBAH 0x03804 e1000_hw.h TX Descriptor Base Address High - RW
35352
 E1000_TDLENE1000_TDLEN 0x03808 e1000_hw.h TX Descriptor Length - RW
35353
 E1000_TDHE1000_TDH 0x03810 e1000_hw.h TX Descriptor Head - RW
35354
 E1000_TDTE1000_TDT 0x03818 e1000_hw.h TX Descripotr Tail - RW
35355
 E1000_TIDVE1000_TIDV 0x03820 e1000_hw.h TX Interrupt Delay Value - RW
35356
 E1000_TXDCTLE1000_TXDCTL 0x03828 e1000_hw.h TX Descriptor Control - RW
35357
 E1000_TADVE1000_TADV 0x0382C e1000_hw.h TX Interrupt Absolute Delay Val - RW
35358
 E1000_TSPMTE1000_TSPMT 0x03830 e1000_hw.h TCP Segmentation PAD & Min Threshold - RW
35359
 E1000_TARC0E1000_TARC0 0x03840 e1000_hw.h TX Arbitration Count (0)
35360
 E1000_TDBAL1E1000_TDBAL1 0x03900 e1000_hw.h TX Desc Base Address Low (1) - RW
35361
 E1000_TDBAH1E1000_TDBAH1 0x03904 e1000_hw.h TX Desc Base Address High (1) - RW
35362
 E1000_TDLEN1E1000_TDLEN1 0x03908 e1000_hw.h TX Desc Length (1) - RW
35363
 E1000_TDH1E1000_TDH1 0x03910 e1000_hw.h TX Desc Head (1) - RW
35364
 E1000_TDT1E1000_TDT1 0x03918 e1000_hw.h TX Desc Tail (1) - RW
35365
 E1000_TXDCTL1E1000_TXDCTL1 0x03928 e1000_hw.h TX Descriptor Control (1) - RW
35366
 E1000_TARC1E1000_TARC1 0x03940 e1000_hw.h TX Arbitration Count (1)
35367
 E1000_CRCERRSE1000_CRCERRS 0x04000 e1000_hw.h CRC Error Count - R/clr
35368
 E1000_ALGNERRCE1000_ALGNERRC 0x04004 e1000_hw.h Alignment Error Count - R/clr
35369
 E1000_SYMERRSE1000_SYMERRS 0x04008 e1000_hw.h Symbol Error Count - R/clr
35370
 E1000_RXERRCE1000_RXERRC 0x0400C e1000_hw.h Receive Error Count - R/clr
35371
 E1000_MPCE1000_MPC 0x04010 e1000_hw.h Missed Packet Count - R/clr
35372
 E1000_SCCE1000_SCC 0x04014 e1000_hw.h Single Collision Count - R/clr
35373
 E1000_ECOLE1000_ECOL 0x04018 e1000_hw.h Excessive Collision Count - R/clr
35374
 E1000_MCCE1000_MCC 0x0401C e1000_hw.h Multiple Collision Count - R/clr
35375
 E1000_LATECOLE1000_LATECOL 0x04020 e1000_hw.h Late Collision Count - R/clr
35376
 E1000_COLCE1000_COLC 0x04028 e1000_hw.h Collision Count - R/clr
35377
 E1000_DCE1000_DC 0x04030 e1000_hw.h Defer Count - R/clr
35378
 E1000_TNCRSE1000_TNCRS 0x04034 e1000_hw.h TX-No CRS - R/clr
35379
 E1000_SECE1000_SEC 0x04038 e1000_hw.h Sequence Error Count - R/clr
35380
 E1000_CEXTERRE1000_CEXTERR 0x0403C e1000_hw.h Carrier Extension Error Count - R/clr
35381
 E1000_RLECE1000_RLEC 0x04040 e1000_hw.h Receive Length Error Count - R/clr
35382
 E1000_XONRXCE1000_XONRXC 0x04048 e1000_hw.h XON RX Count - R/clr
35383
 E1000_XONTXCE1000_XONTXC 0x0404C e1000_hw.h XON TX Count - R/clr
35384
 E1000_XOFFRXCE1000_XOFFRXC 0x04050 e1000_hw.h XOFF RX Count - R/clr
35385
 E1000_XOFFTXCE1000_XOFFTXC 0x04054 e1000_hw.h XOFF TX Count - R/clr
35386
 E1000_FCRUCE1000_FCRUC 0x04058 e1000_hw.h Flow Control RX Unsupported Count- R/clr
35387
 E1000_PRC64E1000_PRC64 0x0405C e1000_hw.h Packets RX (64 bytes) - R/clr
35388
 E1000_PRC127E1000_PRC127 0x04060 e1000_hw.h Packets RX (65-127 bytes) - R/clr
35389
 E1000_PRC255E1000_PRC255 0x04064 e1000_hw.h Packets RX (128-255 bytes) - R/clr
35390
 E1000_PRC511E1000_PRC511 0x04068 e1000_hw.h Packets RX (255-511 bytes) - R/clr
35391
 E1000_PRC1023E1000_PRC1023 0x0406C e1000_hw.h Packets RX (512-1023 bytes) - R/clr
35392
 E1000_PRC1522E1000_PRC1522 0x04070 e1000_hw.h Packets RX (1024-1522 bytes) - R/clr
35393
 E1000_GPRCE1000_GPRC 0x04074 e1000_hw.h Good Packets RX Count - R/clr
35394
 E1000_BPRCE1000_BPRC 0x04078 e1000_hw.h Broadcast Packets RX Count - R/clr
35395
 E1000_MPRCE1000_MPRC 0x0407C e1000_hw.h Multicast Packets RX Count - R/clr
35396
 E1000_GPTCE1000_GPTC 0x04080 e1000_hw.h Good Packets TX Count - R/clr
35397
 E1000_GORCLE1000_GORCL 0x04088 e1000_hw.h Good Octets RX Count Low - R/clr
35398
 E1000_GORCHE1000_GORCH 0x0408C e1000_hw.h Good Octets RX Count High - R/clr
35399
 E1000_GOTCLE1000_GOTCL 0x04090 e1000_hw.h Good Octets TX Count Low - R/clr
35400
 E1000_GOTCHE1000_GOTCH 0x04094 e1000_hw.h Good Octets TX Count High - R/clr
35401
 E1000_RNBCE1000_RNBC 0x040A0 e1000_hw.h RX No Buffers Count - R/clr
35402
 E1000_RUCE1000_RUC 0x040A4 e1000_hw.h RX Undersize Count - R/clr
35403
 E1000_RFCE1000_RFC 0x040A8 e1000_hw.h RX Fragment Count - R/clr
35404
 E1000_ROCE1000_ROC 0x040AC e1000_hw.h RX Oversize Count - R/clr
35405
 E1000_RJCE1000_RJC 0x040B0 e1000_hw.h RX Jabber Count - R/clr
35406
 E1000_MGTPRCE1000_MGTPRC 0x040B4 e1000_hw.h Management Packets RX Count - R/clr
35407
 E1000_MGTPDCE1000_MGTPDC 0x040B8 e1000_hw.h Management Packets Dropped Count - R/clr
35408
 E1000_MGTPTCE1000_MGTPTC 0x040BC e1000_hw.h Management Packets TX Count - R/clr
35409
 E1000_TORLE1000_TORL 0x040C0 e1000_hw.h Total Octets RX Low - R/clr
35410
 E1000_TORHE1000_TORH 0x040C4 e1000_hw.h Total Octets RX High - R/clr
35411
 E1000_TOTLE1000_TOTL 0x040C8 e1000_hw.h Total Octets TX Low - R/clr
35412
 E1000_TOTHE1000_TOTH 0x040CC e1000_hw.h Total Octets TX High - R/clr
35413
 E1000_TPRE1000_TPR 0x040D0 e1000_hw.h Total Packets RX - R/clr
35414
 E1000_TPTE1000_TPT 0x040D4 e1000_hw.h Total Packets TX - R/clr
35415
 E1000_PTC64E1000_PTC64 0x040D8 e1000_hw.h Packets TX (64 bytes) - R/clr
35416
 E1000_PTC127E1000_PTC127 0x040DC e1000_hw.h Packets TX (65-127 bytes) - R/clr
35417
 E1000_PTC255E1000_PTC255 0x040E0 e1000_hw.h Packets TX (128-255 bytes) - R/clr
35418
 E1000_PTC511E1000_PTC511 0x040E4 e1000_hw.h Packets TX (256-511 bytes) - R/clr
35419
 E1000_PTC1023E1000_PTC1023 0x040E8 e1000_hw.h Packets TX (512-1023 bytes) - R/clr
35420
 E1000_PTC1522E1000_PTC1522 0x040EC e1000_hw.h Packets TX (1024-1522 Bytes) - R/clr
35421
 E1000_MPTCE1000_MPTC 0x040F0 e1000_hw.h Multicast Packets TX Count - R/clr
35422
 E1000_BPTCE1000_BPTC 0x040F4 e1000_hw.h Broadcast Packets TX Count - R/clr
35423
 E1000_TSCTCE1000_TSCTC 0x040F8 e1000_hw.h TCP Segmentation Context TX - R/clr
35424
 E1000_TSCTFCE1000_TSCTFC 0x040FC e1000_hw.h TCP Segmentation Context TX Fail - R/clr
35425
 E1000_IACE1000_IAC 0x04100 e1000_hw.h Interrupt Assertion Count
35426
 E1000_ICRXPTCE1000_ICRXPTC 0x04104 e1000_hw.h Interrupt Cause Rx Packet Timer Expire Count
35427
 E1000_ICRXATCE1000_ICRXATC 0x04108 e1000_hw.h Interrupt Cause Rx Absolute Timer Expire Count
35428
 E1000_ICTXPTCE1000_ICTXPTC 0x0410C e1000_hw.h Interrupt Cause Tx Packet Timer Expire Count
35429
 E1000_ICTXATCE1000_ICTXATC 0x04110 e1000_hw.h Interrupt Cause Tx Absolute Timer Expire Count
35430
 E1000_ICTXQECE1000_ICTXQEC 0x04118 e1000_hw.h Interrupt Cause Tx Queue Empty Count
35431
 E1000_ICTXQMTCE1000_ICTXQMTC 0x0411C e1000_hw.h Interrupt Cause Tx Queue Minimum Threshold Count
35432
 E1000_ICRXDMTCE1000_ICRXDMTC 0x04120 e1000_hw.h Interrupt Cause Rx Descriptor Minimum Threshold Count
35433
 E1000_ICRXOCE1000_ICRXOC 0x04124 e1000_hw.h Interrupt Cause Receiver Overrun Count
35434
 E1000_RXCSUME1000_RXCSUM 0x05000 e1000_hw.h RX Checksum Control - RW
35435
 E1000_RFCTLE1000_RFCTL 0x05008 e1000_hw.h Receive Filter Control
35436
 E1000_MTAE1000_MTA 0x05200 e1000_hw.h Multicast Table Array - RW Array
35437
 E1000_RAE1000_RA 0x05400 e1000_hw.h Receive Address - RW Array
35438
 E1000_VFTAE1000_VFTA 0x05600 e1000_hw.h VLAN Filter Table Array - RW Array
35439
 E1000_WUCE1000_WUC 0x05800 e1000_hw.h Wakeup Control - RW
35440
 E1000_WUFCE1000_WUFC 0x05808 e1000_hw.h Wakeup Filter Control - RW
35441
 E1000_WUSE1000_WUS 0x05810 e1000_hw.h Wakeup Status - RO
35442
 E1000_MANCE1000_MANC 0x05820 e1000_hw.h Management Control - RW
35443
 E1000_IPAVE1000_IPAV 0x05838 e1000_hw.h IP Address Valid - RW
35444
 E1000_IP4ATE1000_IP4AT 0x05840 e1000_hw.h IPv4 Address Table - RW Array
35445
 E1000_IP6ATE1000_IP6AT 0x05880 e1000_hw.h IPv6 Address Table - RW Array
35446
 E1000_WUPLE1000_WUPL 0x05900 e1000_hw.h Wakeup Packet Length - RW
35447
 E1000_WUPME1000_WUPM 0x05A00 e1000_hw.h Wakeup Packet Memory - RO A
35448
 E1000_FFLTE1000_FFLT 0x05F00 e1000_hw.h Flexible Filter Length Table - RW Array
35449
 E1000_HOST_IFE1000_HOST_IF 0x08800 e1000_hw.h Host Interface
35450
 E1000_FFMTE1000_FFMT 0x09000 e1000_hw.h Flexible Filter Mask Table - RW Array
35451
 E1000_FFVTE1000_FFVT 0x09800 e1000_hw.h Flexible Filter Value Table - RW Array
35452
 E1000_KUMCTRLSTAE1000_KUMCTRLSTA 0x00034 e1000_hw.h MAC-PHY interface - RW
35453
 E1000_MDPHYAE1000_MDPHYA 0x0003C e1000_hw.h PHY address - RW
35454
 E1000_MANC2HE1000_MANC2H 0x05860 e1000_hw.h Managment Control To Host - RW
35455
 E1000_SW_FW_SYNCE1000_SW_FW_SYNC 0x05B5C e1000_hw.h Software-Firmware Synchronization - RW
35456
 E1000_GCRE1000_GCR 0x05B00 e1000_hw.h PCI-Ex Control
35457
 E1000_GSCL_1E1000_GSCL_1 0x05B10 e1000_hw.h PCI-Ex Statistic Control #1
35458
 E1000_GSCL_2E1000_GSCL_2 0x05B14 e1000_hw.h PCI-Ex Statistic Control #2
35459
 E1000_GSCL_3E1000_GSCL_3 0x05B18 e1000_hw.h PCI-Ex Statistic Control #3
35460
 E1000_GSCL_4E1000_GSCL_4 0x05B1C e1000_hw.h PCI-Ex Statistic Control #4
35461
 E1000_FACTPSE1000_FACTPS 0x05B30 e1000_hw.h Function Active and Power State to MNG
35462
 E1000_SWSME1000_SWSM 0x05B50 e1000_hw.h SW Semaphore
35463
 E1000_FWSME1000_FWSM 0x05B54 e1000_hw.h FW Semaphore
35464
 E1000_FFLT_DBGE1000_FFLT_DBG 0x05F04 e1000_hw.h Debug Register
35465
 E1000_HICRE1000_HICR 0x08F00 e1000_hw.h Host Inteface Control
35466
 E1000_CPUVECE1000_CPUVEC 0x02C10 e1000_hw.h CPU Vector Register - RW
35467
 E1000_MRQCE1000_MRQC 0x05818 e1000_hw.h Multiple Receive Control - RW
35468
 E1000_RETAE1000_RETA 0x05C00 e1000_hw.h Redirection Table - RW Array
35469
 E1000_RSSRKE1000_RSSRK 0x05C80 e1000_hw.h RSS Random Key - RW Array
35470
 E1000_RSSIME1000_RSSIM 0x05864 e1000_hw.h RSS Interrupt Mask
35471
 E1000_RSSIRE1000_RSSIR 0x05868 e1000_hw.h RSS Interrupt Request
35472
 E1000_82542_CTRLE1000_82542_CTRL E1000_CTRL e1000_hw.h 　
35473
 E1000_82542_CTRL_DUPE1000_82542_CTRL_DUP E1000_CTRL_DUP e1000_hw.h 　
35474
 E1000_82542_STATUSE1000_82542_STATUS E1000_STATUS e1000_hw.h 　
35475
 E1000_82542_EECDE1000_82542_EECD E1000_EECD e1000_hw.h 　
35476
 E1000_82542_EERDE1000_82542_EERD E1000_EERD e1000_hw.h 　
35477
 E1000_82542_CTRL_EXTE1000_82542_CTRL_EXT E1000_CTRL_EXT e1000_hw.h 　
35478
 E1000_82542_FLAE1000_82542_FLA E1000_FLA e1000_hw.h 　
35479
 E1000_82542_MDICE1000_82542_MDIC E1000_MDIC e1000_hw.h 　
35480
 E1000_82542_SCTLE1000_82542_SCTL E1000_SCTL e1000_hw.h 　
35481
 E1000_82542_FEXTNVME1000_82542_FEXTNVM E1000_FEXTNVM e1000_hw.h 　
35482
 E1000_82542_FCALE1000_82542_FCAL E1000_FCAL e1000_hw.h 　
35483
 E1000_82542_FCAHE1000_82542_FCAH E1000_FCAH e1000_hw.h 　
35484
 E1000_82542_FCTE1000_82542_FCT E1000_FCT e1000_hw.h 　
35485
 E1000_82542_VETE1000_82542_VET E1000_VET e1000_hw.h 　
35486
 E1000_82542_RAE1000_82542_RA 0x00040 e1000_hw.h 　
35487
 E1000_82542_ICRE1000_82542_ICR E1000_ICR e1000_hw.h 　
35488
 E1000_82542_ITRE1000_82542_ITR E1000_ITR e1000_hw.h 　
35489
 E1000_82542_ICSE1000_82542_ICS E1000_ICS e1000_hw.h 　
35490
 E1000_82542_IMSE1000_82542_IMS E1000_IMS e1000_hw.h 　
35491
 E1000_82542_IMCE1000_82542_IMC E1000_IMC e1000_hw.h 　
35492
 E1000_82542_RCTLE1000_82542_RCTL E1000_RCTL e1000_hw.h 　
35493
 E1000_82542_RDTRE1000_82542_RDTR 0x00108 e1000_hw.h 　
35494
 E1000_82542_RDBALE1000_82542_RDBAL 0x00110 e1000_hw.h 　
35495
 E1000_82542_RDBAHE1000_82542_RDBAH 0x00114 e1000_hw.h 　
35496
 E1000_82542_RDLENE1000_82542_RDLEN 0x00118 e1000_hw.h 　
35497
 E1000_82542_RDHE1000_82542_RDH 0x00120 e1000_hw.h 　
35498
 E1000_82542_RDTE1000_82542_RDT 0x00128 e1000_hw.h 　
35499
 E1000_82542_RDTR0E1000_82542_RDTR0 E1000_82542_RDTR e1000_hw.h 　
35500
 E1000_82542_RDBAL0E1000_82542_RDBAL0 E1000_82542_RDBAL e1000_hw.h 　
35501
 E1000_82542_RDBAH0E1000_82542_RDBAH0 E1000_82542_RDBAH e1000_hw.h 　
35502
 E1000_82542_RDLEN0E1000_82542_RDLEN0 E1000_82542_RDLEN e1000_hw.h 　
35503
 E1000_82542_RDH0E1000_82542_RDH0 E1000_82542_RDH e1000_hw.h 　
35504
 E1000_82542_RDT0E1000_82542_RDT0 E1000_82542_RDT e1000_hw.h 　
35505
 E1000_82542_RDBAH3E1000_82542_RDBAH3 0x02B04 e1000_hw.h RX Desc Base High Queue 3 - RW
35506
 E1000_82542_RDBAL3E1000_82542_RDBAL3 0x02B00 e1000_hw.h RX Desc Low Queue 3 - RW
35507
 E1000_82542_RDLEN3E1000_82542_RDLEN3 0x02B08 e1000_hw.h RX Desc Length Queue 3 - RW
35508
 E1000_82542_RDH3E1000_82542_RDH3 0x02B10 e1000_hw.h RX Desc Head Queue 3 - RW
35509
 E1000_82542_RDT3E1000_82542_RDT3 0x02B18 e1000_hw.h RX Desc Tail Queue 3 - RW
35510
 E1000_82542_RDBAL2E1000_82542_RDBAL2 0x02A00 e1000_hw.h RX Desc Base Low Queue 2 - RW
35511
 E1000_82542_RDBAH2E1000_82542_RDBAH2 0x02A04 e1000_hw.h RX Desc Base High Queue 2 - RW
35512
 E1000_82542_RDLEN2E1000_82542_RDLEN2 0x02A08 e1000_hw.h RX Desc Length Queue 2 - RW
35513
 E1000_82542_RDH2E1000_82542_RDH2 0x02A10 e1000_hw.h RX Desc Head Queue 2 - RW
35514
 E1000_82542_RDT2E1000_82542_RDT2 0x02A18 e1000_hw.h RX Desc Tail Queue 2 - RW
35515
 E1000_82542_RDTR1E1000_82542_RDTR1 0x00130 e1000_hw.h 　
35516
 E1000_82542_RDBAL1E1000_82542_RDBAL1 0x00138 e1000_hw.h 　
35517
 E1000_82542_RDBAH1E1000_82542_RDBAH1 0x0013C e1000_hw.h 　
35518
 E1000_82542_RDLEN1E1000_82542_RDLEN1 0x00140 e1000_hw.h 　
35519
 E1000_82542_RDH1E1000_82542_RDH1 0x00148 e1000_hw.h 　
35520
 E1000_82542_RDT1E1000_82542_RDT1 0x00150 e1000_hw.h 　
35521
 E1000_82542_FCRTHE1000_82542_FCRTH 0x00160 e1000_hw.h 　
35522
 E1000_82542_FCRTLE1000_82542_FCRTL 0x00168 e1000_hw.h 　
35523
 E1000_82542_FCTTVE1000_82542_FCTTV E1000_FCTTV e1000_hw.h 　
35524
 E1000_82542_TXCWE1000_82542_TXCW E1000_TXCW e1000_hw.h 　
35525
 E1000_82542_RXCWE1000_82542_RXCW E1000_RXCW e1000_hw.h 　
35526
 E1000_82542_MTAE1000_82542_MTA 0x00200 e1000_hw.h 　
35527
 E1000_82542_TCTLE1000_82542_TCTL E1000_TCTL e1000_hw.h 　
35528
 E1000_82542_TCTL_EXTE1000_82542_TCTL_EXT E1000_TCTL_EXT e1000_hw.h 　
35529
 E1000_82542_TIPGE1000_82542_TIPG E1000_TIPG e1000_hw.h 　
35530
 E1000_82542_TDBALE1000_82542_TDBAL 0x00420 e1000_hw.h 　
35531
 E1000_82542_TDBAHE1000_82542_TDBAH 0x00424 e1000_hw.h 　
35532
 E1000_82542_TDLENE1000_82542_TDLEN 0x00428 e1000_hw.h 　
35533
 E1000_82542_TDHE1000_82542_TDH 0x00430 e1000_hw.h 　
35534
 E1000_82542_TDTE1000_82542_TDT 0x00438 e1000_hw.h 　
35535
 E1000_82542_TIDVE1000_82542_TIDV 0x00440 e1000_hw.h 　
35536
 E1000_82542_TBTE1000_82542_TBT E1000_TBT e1000_hw.h 　
35537
 E1000_82542_AITE1000_82542_AIT E1000_AIT e1000_hw.h 　
35538
 E1000_82542_VFTAE1000_82542_VFTA 0x00600 e1000_hw.h 　
35539
 E1000_82542_LEDCTLE1000_82542_LEDCTL E1000_LEDCTL e1000_hw.h 　
35540
 E1000_82542_PBAE1000_82542_PBA E1000_PBA e1000_hw.h 　
35541
 E1000_82542_PBSE1000_82542_PBS E1000_PBS e1000_hw.h 　
35542
 E1000_82542_EEMNGCTLE1000_82542_EEMNGCTL E1000_EEMNGCTL e1000_hw.h 　
35543
 E1000_82542_EEARBCE1000_82542_EEARBC E1000_EEARBC e1000_hw.h 　
35544
 E1000_82542_FLASHTE1000_82542_FLASHT E1000_FLASHT e1000_hw.h 　
35545
 E1000_82542_EEWRE1000_82542_EEWR E1000_EEWR e1000_hw.h 　
35546
 E1000_82542_FLSWCTLE1000_82542_FLSWCTL E1000_FLSWCTL e1000_hw.h 　
35547
 E1000_82542_FLSWDATAE1000_82542_FLSWDATA E1000_FLSWDATA e1000_hw.h 　
35548
 E1000_82542_FLSWCNTE1000_82542_FLSWCNT E1000_FLSWCNT e1000_hw.h 　
35549
 E1000_82542_FLOPE1000_82542_FLOP E1000_FLOP e1000_hw.h 　
35550
 E1000_82542_EXTCNF_CTRLE1000_82542_EXTCNF_CTRL E1000_EXTCNF_CTRL e1000_hw.h 　
35551
 E1000_82542_EXTCNF_SIZEE1000_82542_EXTCNF_SIZE E1000_EXTCNF_SIZE e1000_hw.h 　
35552
 E1000_82542_PHY_CTRLE1000_82542_PHY_CTRL E1000_PHY_CTRL e1000_hw.h 　
35553
 E1000_82542_ERTE1000_82542_ERT E1000_ERT e1000_hw.h 　
35554
 E1000_82542_RXDCTLE1000_82542_RXDCTL E1000_RXDCTL e1000_hw.h 　
35555
 E1000_82542_RXDCTL1E1000_82542_RXDCTL1 E1000_RXDCTL1 e1000_hw.h 　
35556
 E1000_82542_RADVE1000_82542_RADV E1000_RADV e1000_hw.h 　
35557
 E1000_82542_RSRPDE1000_82542_RSRPD E1000_RSRPD e1000_hw.h 　
35558
 E1000_82542_TXDMACE1000_82542_TXDMAC E1000_TXDMAC e1000_hw.h 　
35559
 E1000_82542_KABGTXDE1000_82542_KABGTXD E1000_KABGTXD e1000_hw.h 　
35560
 E1000_82542_TDFHSE1000_82542_TDFHS E1000_TDFHS e1000_hw.h 　
35561
 E1000_82542_TDFTSE1000_82542_TDFTS E1000_TDFTS e1000_hw.h 　
35562
 E1000_82542_TDFPCE1000_82542_TDFPC E1000_TDFPC e1000_hw.h 　
35563
 E1000_82542_TXDCTLE1000_82542_TXDCTL E1000_TXDCTL e1000_hw.h 　
35564
 E1000_82542_TADVE1000_82542_TADV E1000_TADV e1000_hw.h 　
35565
 E1000_82542_TSPMTE1000_82542_TSPMT E1000_TSPMT e1000_hw.h 　
35566
 E1000_82542_CRCERRSE1000_82542_CRCERRS E1000_CRCERRS e1000_hw.h 　
35567
 E1000_82542_ALGNERRCE1000_82542_ALGNERRC E1000_ALGNERRC e1000_hw.h 　
35568
 E1000_82542_SYMERRSE1000_82542_SYMERRS E1000_SYMERRS e1000_hw.h 　
35569
 E1000_82542_RXERRCE1000_82542_RXERRC E1000_RXERRC e1000_hw.h 　
35570
 E1000_82542_MPCE1000_82542_MPC E1000_MPC e1000_hw.h 　
35571
 E1000_82542_SCCE1000_82542_SCC E1000_SCC e1000_hw.h 　
35572
 E1000_82542_ECOLE1000_82542_ECOL E1000_ECOL e1000_hw.h 　
35573
 E1000_82542_MCCE1000_82542_MCC E1000_MCC e1000_hw.h 　
35574
 E1000_82542_LATECOLE1000_82542_LATECOL E1000_LATECOL e1000_hw.h 　
35575
 E1000_82542_COLCE1000_82542_COLC E1000_COLC e1000_hw.h 　
35576
 E1000_82542_DCE1000_82542_DC E1000_DC e1000_hw.h 　
35577
 E1000_82542_TNCRSE1000_82542_TNCRS E1000_TNCRS e1000_hw.h 　
35578
 E1000_82542_SECE1000_82542_SEC E1000_SEC e1000_hw.h 　
35579
 E1000_82542_CEXTERRE1000_82542_CEXTERR E1000_CEXTERR e1000_hw.h 　
35580
 E1000_82542_RLECE1000_82542_RLEC E1000_RLEC e1000_hw.h 　
35581
 E1000_82542_XONRXCE1000_82542_XONRXC E1000_XONRXC e1000_hw.h 　
35582
 E1000_82542_XONTXCE1000_82542_XONTXC E1000_XONTXC e1000_hw.h 　
35583
 E1000_82542_XOFFRXCE1000_82542_XOFFRXC E1000_XOFFRXC e1000_hw.h 　
35584
 E1000_82542_XOFFTXCE1000_82542_XOFFTXC E1000_XOFFTXC e1000_hw.h 　
35585
 E1000_82542_FCRUCE1000_82542_FCRUC E1000_FCRUC e1000_hw.h 　
35586
 E1000_82542_PRC64E1000_82542_PRC64 E1000_PRC64 e1000_hw.h 　
35587
 E1000_82542_PRC127E1000_82542_PRC127 E1000_PRC127 e1000_hw.h 　
35588
 E1000_82542_PRC255E1000_82542_PRC255 E1000_PRC255 e1000_hw.h 　
35589
 E1000_82542_PRC511E1000_82542_PRC511 E1000_PRC511 e1000_hw.h 　
35590
 E1000_82542_PRC1023E1000_82542_PRC1023 E1000_PRC1023 e1000_hw.h 　
35591
 E1000_82542_PRC1522E1000_82542_PRC1522 E1000_PRC1522 e1000_hw.h 　
35592
 E1000_82542_GPRCE1000_82542_GPRC E1000_GPRC e1000_hw.h 　
35593
 E1000_82542_BPRCE1000_82542_BPRC E1000_BPRC e1000_hw.h 　
35594
 E1000_82542_MPRCE1000_82542_MPRC E1000_MPRC e1000_hw.h 　
35595
 E1000_82542_GPTCE1000_82542_GPTC E1000_GPTC e1000_hw.h 　
35596
 E1000_82542_GORCLE1000_82542_GORCL E1000_GORCL e1000_hw.h 　
35597
 E1000_82542_GORCHE1000_82542_GORCH E1000_GORCH e1000_hw.h 　
35598
 E1000_82542_GOTCLE1000_82542_GOTCL E1000_GOTCL e1000_hw.h 　
35599
 E1000_82542_GOTCHE1000_82542_GOTCH E1000_GOTCH e1000_hw.h 　
35600
 E1000_82542_RNBCE1000_82542_RNBC E1000_RNBC e1000_hw.h 　
35601
 E1000_82542_RUCE1000_82542_RUC E1000_RUC e1000_hw.h 　
35602
 E1000_82542_RFCE1000_82542_RFC E1000_RFC e1000_hw.h 　
35603
 E1000_82542_ROCE1000_82542_ROC E1000_ROC e1000_hw.h 　
35604
 E1000_82542_RJCE1000_82542_RJC E1000_RJC e1000_hw.h 　
35605
 E1000_82542_MGTPRCE1000_82542_MGTPRC E1000_MGTPRC e1000_hw.h 　
35606
 E1000_82542_MGTPDCE1000_82542_MGTPDC E1000_MGTPDC e1000_hw.h 　
35607
 E1000_82542_MGTPTCE1000_82542_MGTPTC E1000_MGTPTC e1000_hw.h 　
35608
 E1000_82542_TORLE1000_82542_TORL E1000_TORL e1000_hw.h 　
35609
 E1000_82542_TORHE1000_82542_TORH E1000_TORH e1000_hw.h 　
35610
 E1000_82542_TOTLE1000_82542_TOTL E1000_TOTL e1000_hw.h 　
35611
 E1000_82542_TOTHE1000_82542_TOTH E1000_TOTH e1000_hw.h 　
35612
 E1000_82542_TPRE1000_82542_TPR E1000_TPR e1000_hw.h 　
35613
 E1000_82542_TPTE1000_82542_TPT E1000_TPT e1000_hw.h 　
35614
 E1000_82542_PTC64E1000_82542_PTC64 E1000_PTC64 e1000_hw.h 　
35615
 E1000_82542_PTC127E1000_82542_PTC127 E1000_PTC127 e1000_hw.h 　
35616
 E1000_82542_PTC255E1000_82542_PTC255 E1000_PTC255 e1000_hw.h 　
35617
 E1000_82542_PTC511E1000_82542_PTC511 E1000_PTC511 e1000_hw.h 　
35618
 E1000_82542_PTC1023E1000_82542_PTC1023 E1000_PTC1023 e1000_hw.h 　
35619
 E1000_82542_PTC1522E1000_82542_PTC1522 E1000_PTC1522 e1000_hw.h 　
35620
 E1000_82542_MPTCE1000_82542_MPTC E1000_MPTC e1000_hw.h 　
35621
 E1000_82542_BPTCE1000_82542_BPTC E1000_BPTC e1000_hw.h 　
35622
 E1000_82542_TSCTCE1000_82542_TSCTC E1000_TSCTC e1000_hw.h 　
35623
 E1000_82542_TSCTFCE1000_82542_TSCTFC E1000_TSCTFC e1000_hw.h 　
35624
 E1000_82542_RXCSUME1000_82542_RXCSUM E1000_RXCSUM e1000_hw.h 　
35625
 E1000_82542_WUCE1000_82542_WUC E1000_WUC e1000_hw.h 　
35626
 E1000_82542_WUFCE1000_82542_WUFC E1000_WUFC e1000_hw.h 　
35627
 E1000_82542_WUSE1000_82542_WUS E1000_WUS e1000_hw.h 　
35628
 E1000_82542_MANCE1000_82542_MANC E1000_MANC e1000_hw.h 　
35629
 E1000_82542_IPAVE1000_82542_IPAV E1000_IPAV e1000_hw.h 　
35630
 E1000_82542_IP4ATE1000_82542_IP4AT E1000_IP4AT e1000_hw.h 　
35631
 E1000_82542_IP6ATE1000_82542_IP6AT E1000_IP6AT e1000_hw.h 　
35632
 E1000_82542_WUPLE1000_82542_WUPL E1000_WUPL e1000_hw.h 　
35633
 E1000_82542_WUPME1000_82542_WUPM E1000_WUPM e1000_hw.h 　
35634
 E1000_82542_FFLTE1000_82542_FFLT E1000_FFLT e1000_hw.h 　
35635
 E1000_82542_TDFHE1000_82542_TDFH 0x08010 e1000_hw.h 　
35636
 E1000_82542_TDFTE1000_82542_TDFT 0x08018 e1000_hw.h 　
35637
 E1000_82542_FFMTE1000_82542_FFMT E1000_FFMT e1000_hw.h 　
35638
 E1000_82542_FFVTE1000_82542_FFVT E1000_FFVT e1000_hw.h 　
35639
 E1000_82542_HOST_IFE1000_82542_HOST_IF E1000_HOST_IF e1000_hw.h 　
35640
 E1000_82542_IAME1000_82542_IAM E1000_IAM e1000_hw.h 　
35641
 E1000_82542_EEMNGCTLE1000_82542_EEMNGCTL E1000_EEMNGCTL e1000_hw.h 　
35642
 E1000_82542_PSRCTLE1000_82542_PSRCTL E1000_PSRCTL e1000_hw.h 　
35643
 E1000_82542_RAIDE1000_82542_RAID E1000_RAID e1000_hw.h 　
35644
 E1000_82542_TARC0E1000_82542_TARC0 E1000_TARC0 e1000_hw.h 　
35645
 E1000_82542_TDBAL1E1000_82542_TDBAL1 E1000_TDBAL1 e1000_hw.h 　
35646
 E1000_82542_TDBAH1E1000_82542_TDBAH1 E1000_TDBAH1 e1000_hw.h 　
35647
 E1000_82542_TDLEN1E1000_82542_TDLEN1 E1000_TDLEN1 e1000_hw.h 　
35648
 E1000_82542_TDH1E1000_82542_TDH1 E1000_TDH1 e1000_hw.h 　
35649
 E1000_82542_TDT1E1000_82542_TDT1 E1000_TDT1 e1000_hw.h 　
35650
 E1000_82542_TXDCTL1E1000_82542_TXDCTL1 E1000_TXDCTL1 e1000_hw.h 　
35651
 E1000_82542_TARC1E1000_82542_TARC1 E1000_TARC1 e1000_hw.h 　
35652
 E1000_82542_RFCTLE1000_82542_RFCTL E1000_RFCTL e1000_hw.h 　
35653
 E1000_82542_GCRE1000_82542_GCR E1000_GCR e1000_hw.h 　
35654
 E1000_82542_GSCL_1E1000_82542_GSCL_1 E1000_GSCL_1 e1000_hw.h 　
35655
 E1000_82542_GSCL_2E1000_82542_GSCL_2 E1000_GSCL_2 e1000_hw.h 　
35656
 E1000_82542_GSCL_3E1000_82542_GSCL_3 E1000_GSCL_3 e1000_hw.h 　
35657
 E1000_82542_GSCL_4E1000_82542_GSCL_4 E1000_GSCL_4 e1000_hw.h 　
35658
 E1000_82542_FACTPSE1000_82542_FACTPS E1000_FACTPS e1000_hw.h 　
35659
 E1000_82542_SWSME1000_82542_SWSM E1000_SWSM e1000_hw.h 　
35660
 E1000_82542_FWSME1000_82542_FWSM E1000_FWSM e1000_hw.h 　
35661
 E1000_82542_FFLT_DBGE1000_82542_FFLT_DBG E1000_FFLT_DBG e1000_hw.h 　
35662
 E1000_82542_IACE1000_82542_IAC E1000_IAC e1000_hw.h 　
35663
 E1000_82542_ICRXPTCE1000_82542_ICRXPTC E1000_ICRXPTC e1000_hw.h 　
35664
 E1000_82542_ICRXATCE1000_82542_ICRXATC E1000_ICRXATC e1000_hw.h 　
35665
 E1000_82542_ICTXPTCE1000_82542_ICTXPTC E1000_ICTXPTC e1000_hw.h 　
35666
 E1000_82542_ICTXATCE1000_82542_ICTXATC E1000_ICTXATC e1000_hw.h 　
35667
 E1000_82542_ICTXQECE1000_82542_ICTXQEC E1000_ICTXQEC e1000_hw.h 　
35668
 E1000_82542_ICTXQMTCE1000_82542_ICTXQMTC E1000_ICTXQMTC e1000_hw.h 　
35669
 E1000_82542_ICRXDMTCE1000_82542_ICRXDMTC E1000_ICRXDMTC e1000_hw.h 　
35670
 E1000_82542_ICRXOCE1000_82542_ICRXOC E1000_ICRXOC e1000_hw.h 　
35671
 E1000_82542_HICRE1000_82542_HICR E1000_HICR e1000_hw.h 　
35672
 E1000_82542_CPUVECE1000_82542_CPUVEC E1000_CPUVEC e1000_hw.h 　
35673
 E1000_82542_MRQCE1000_82542_MRQC E1000_MRQC e1000_hw.h 　
35674
 E1000_82542_RETAE1000_82542_RETA E1000_RETA e1000_hw.h 　
35675
 E1000_82542_RSSRKE1000_82542_RSSRK E1000_RSSRK e1000_hw.h 　
35676
 E1000_82542_RSSIME1000_82542_RSSIM E1000_RSSIM e1000_hw.h 　
35677
 E1000_82542_RSSIRE1000_82542_RSSIR E1000_RSSIR e1000_hw.h 　
35678
 E1000_82542_KUMCTRLSTAE1000_82542_KUMCTRLSTA E1000_KUMCTRLSTA e1000_hw.h 　
35679
 E1000_82542_SW_FW_SYNCE1000_82542_SW_FW_SYNC E1000_SW_FW_SYNC e1000_hw.h 　
35680
 E1000_82542_MANC2HE1000_82542_MANC2H E1000_MANC2H e1000_hw.h 　
35681
 E1000_EEPROM_SWDPIN0E1000_EEPROM_SWDPIN0 0x0001 e1000_hw.h SWDPIN 0 EEPROM Value
35682
 E1000_EEPROM_LED_LOGICE1000_EEPROM_LED_LOGIC 0x0020 e1000_hw.h Led Logic Word
35683
 E1000_EEPROM_RW_REG_DATAE1000_EEPROM_RW_REG_DATA 16 e1000_hw.h Offset to data in EEPROM read/write registers
35684
 E1000_EEPROM_RW_REG_DONEE1000_EEPROM_RW_REG_DONE 2 e1000_hw.h Offset to READ/WRITE done bit
35685
 E1000_EEPROM_RW_REG_STARTE1000_EEPROM_RW_REG_START 1 e1000_hw.h First bit for telling part to start operation
35686
 E1000_EEPROM_RW_ADDR_SHIFTE1000_EEPROM_RW_ADDR_SHIFT 2 e1000_hw.h Shift to the address bits
35687
 E1000_EEPROM_POLL_WRITEE1000_EEPROM_POLL_WRITE 1 e1000_hw.h Flag for polling for write complete
35688
 E1000_EEPROM_POLL_READE1000_EEPROM_POLL_READ 0 e1000_hw.h Flag for polling for read complete
35689
 E1000_CTRL_FDE1000_CTRL_FD 0x00000001 e1000_hw.h Full duplex.0=half; 1=full
35690
 E1000_CTRL_BEME1000_CTRL_BEM 0x00000002 e1000_hw.h Endian Mode.0=little,1=big
35691
 E1000_CTRL_PRIORE1000_CTRL_PRIOR 0x00000004 e1000_hw.h Priority on PCI. 0=rx,1=fair
35692
 E1000_CTRL_GIO_MASTER_DISABLEE1000_CTRL_GIO_MASTER_DISABLE 0x00000004 e1000_hw.h Blocks new Master requests
35693
 E1000_CTRL_LRSTE1000_CTRL_LRST 0x00000008 e1000_hw.h Link reset. 0=normal,1=reset
35694
 E1000_CTRL_TMEE1000_CTRL_TME 0x00000010 e1000_hw.h Test mode. 0=normal,1=test
35695
 E1000_CTRL_SLEE1000_CTRL_SLE 0x00000020 e1000_hw.h Serial Link on 0=dis,1=en
35696
 E1000_CTRL_ASDEE1000_CTRL_ASDE 0x00000020 e1000_hw.h Auto-speed detect enable
35697
 E1000_CTRL_SLUE1000_CTRL_SLU 0x00000040 e1000_hw.h Set link up (Force Link)
35698
 E1000_CTRL_ILOSE1000_CTRL_ILOS 0x00000080 e1000_hw.h Invert Loss-Of Signal
35699
 E1000_CTRL_SPD_SELE1000_CTRL_SPD_SEL 0x00000300 e1000_hw.h Speed Select Mask
35700
 E1000_CTRL_SPD_10E1000_CTRL_SPD_10 0x00000000 e1000_hw.h Force 10Mb
35701
 E1000_CTRL_SPD_100E1000_CTRL_SPD_100 0x00000100 e1000_hw.h Force 100Mb
35702
 E1000_CTRL_SPD_1000E1000_CTRL_SPD_1000 0x00000200 e1000_hw.h Force 1Gb
35703
 E1000_CTRL_BEM32E1000_CTRL_BEM32 0x00000400 e1000_hw.h Big Endian 32 mode
35704
 E1000_CTRL_FRCSPDE1000_CTRL_FRCSPD 0x00000800 e1000_hw.h Force Speed
35705
 E1000_CTRL_FRCDPXE1000_CTRL_FRCDPX 0x00001000 e1000_hw.h Force Duplex
35706
 E1000_CTRL_D_UD_ENE1000_CTRL_D_UD_EN 0x00002000 e1000_hw.h Dock/Undock enable
35707
 E1000_CTRL_D_UD_POLARITYE1000_CTRL_D_UD_POLARITY 0x00004000 e1000_hw.h Defined polarity of Dock/Undock indication in SDP[0]
35708
 E1000_CTRL_FORCE_PHY_RESETE1000_CTRL_FORCE_PHY_RESET 0x00008000 e1000_hw.h Reset both PHY ports, through PHYRST_N pin
35709
 E1000_CTRL_EXT_LINK_ENE1000_CTRL_EXT_LINK_EN 0x00010000 e1000_hw.h enable link status from external LINK_0 and LINK_1 pins
35710
 E1000_CTRL_SWDPIN0E1000_CTRL_SWDPIN0 0x00040000 e1000_hw.h SWDPIN 0 value
35711
 E1000_CTRL_SWDPIN1E1000_CTRL_SWDPIN1 0x00080000 e1000_hw.h SWDPIN 1 value
35712
 E1000_CTRL_SWDPIN2E1000_CTRL_SWDPIN2 0x00100000 e1000_hw.h SWDPIN 2 value
35713
 E1000_CTRL_SWDPIN3E1000_CTRL_SWDPIN3 0x00200000 e1000_hw.h SWDPIN 3 value
35714
 E1000_CTRL_SWDPIO0E1000_CTRL_SWDPIO0 0x00400000 e1000_hw.h SWDPIN 0 Input or output
35715
 E1000_CTRL_SWDPIO1E1000_CTRL_SWDPIO1 0x00800000 e1000_hw.h SWDPIN 1 input or output
35716
 E1000_CTRL_SWDPIO2E1000_CTRL_SWDPIO2 0x01000000 e1000_hw.h SWDPIN 2 input or output
35717
 E1000_CTRL_SWDPIO3E1000_CTRL_SWDPIO3 0x02000000 e1000_hw.h SWDPIN 3 input or output
35718
 E1000_CTRL_RSTE1000_CTRL_RST 0x04000000 e1000_hw.h Global reset
35719
 E1000_CTRL_RFCEE1000_CTRL_RFCE 0x08000000 e1000_hw.h Receive Flow Control enable
35720
 E1000_CTRL_TFCEE1000_CTRL_TFCE 0x10000000 e1000_hw.h Transmit flow control enable
35721
 E1000_CTRL_RTEE1000_CTRL_RTE 0x20000000 e1000_hw.h Routing tag enable
35722
 E1000_CTRL_VMEE1000_CTRL_VME 0x40000000 e1000_hw.h IEEE VLAN mode enable
35723
 E1000_CTRL_PHY_RSTE1000_CTRL_PHY_RST 0x80000000 e1000_hw.h PHY Reset
35724
 E1000_CTRL_SW2FW_INTE1000_CTRL_SW2FW_INT 0x02000000 e1000_hw.h Initiate an interrupt to manageability engine
35725
 E1000_STATUS_FDE1000_STATUS_FD 0x00000001 e1000_hw.h Full duplex.0=half,1=full
35726
 E1000_STATUS_LUE1000_STATUS_LU 0x00000002 e1000_hw.h Link up.0=no,1=link
35727
 E1000_STATUS_FUNC_MASKE1000_STATUS_FUNC_MASK 0x0000000C e1000_hw.h PCI Function Mask
35728
 E1000_STATUS_FUNC_SHIFTE1000_STATUS_FUNC_SHIFT 2 e1000_hw.h 　
35729
 E1000_STATUS_FUNC_0E1000_STATUS_FUNC_0 0x00000000 e1000_hw.h Function 0
35730
 E1000_STATUS_FUNC_1E1000_STATUS_FUNC_1 0x00000004 e1000_hw.h Function 1
35731
 E1000_STATUS_TXOFFE1000_STATUS_TXOFF 0x00000010 e1000_hw.h transmission paused
35732
 E1000_STATUS_TBIMODEE1000_STATUS_TBIMODE 0x00000020 e1000_hw.h TBI mode
35733
 E1000_STATUS_SPEED_MASKE1000_STATUS_SPEED_MASK 0x000000C0 e1000_hw.h 　
35734
 E1000_STATUS_SPEED_10E1000_STATUS_SPEED_10 0x00000000 e1000_hw.h Speed 10Mb/s
35735
 E1000_STATUS_SPEED_100E1000_STATUS_SPEED_100 0x00000040 e1000_hw.h Speed 100Mb/s
35736
 E1000_STATUS_SPEED_1000E1000_STATUS_SPEED_1000 0x00000080 e1000_hw.h Speed 1000Mb/s
35737
 E1000_STATUS_LAN_INIT_DONEE1000_STATUS_LAN_INIT_DONE 0x00000200 e1000_hw.h Lan Init Completion
35738
 E1000_STATUS_ASDVE1000_STATUS_ASDV 0x00000300 e1000_hw.h Auto speed detect value
35739
 E1000_STATUS_DOCK_CIE1000_STATUS_DOCK_CI 0x00000800 e1000_hw.h Change in Dock/Undock state. Clear on write '0'.
35740
 E1000_STATUS_GIO_MASTER_ENABLEE1000_STATUS_GIO_MASTER_ENABLE 0x00080000 e1000_hw.h Status of Master requests.
35741
 E1000_STATUS_MTXCKOKE1000_STATUS_MTXCKOK 0x00000400 e1000_hw.h MTX clock running OK
35742
 E1000_STATUS_PCI66E1000_STATUS_PCI66 0x00000800 e1000_hw.h In 66Mhz slot
35743
 E1000_STATUS_BUS64E1000_STATUS_BUS64 0x00001000 e1000_hw.h In 64 bit slot
35744
 E1000_STATUS_PCIX_MODEE1000_STATUS_PCIX_MODE 0x00002000 e1000_hw.h PCI-X mode
35745
 E1000_STATUS_PCIX_SPEEDE1000_STATUS_PCIX_SPEED 0x0000C000 e1000_hw.h PCI-X bus speed
35746
 E1000_STATUS_BMC_SKU_0E1000_STATUS_BMC_SKU_0 0x00100000 e1000_hw.h BMC USB redirect disabled
35747
 E1000_STATUS_BMC_SKU_1E1000_STATUS_BMC_SKU_1 0x00200000 e1000_hw.h BMC SRAM disabled
35748
 E1000_STATUS_BMC_SKU_2E1000_STATUS_BMC_SKU_2 0x00400000 e1000_hw.h BMC SDRAM disabled
35749
 E1000_STATUS_BMC_CRYPTOE1000_STATUS_BMC_CRYPTO 0x00800000 e1000_hw.h BMC crypto disabled
35750
 E1000_STATUS_BMC_LITEE1000_STATUS_BMC_LITE 0x01000000 e1000_hw.h BMC external code execution disabled
35751
 E1000_STATUS_RGMII_ENABLEE1000_STATUS_RGMII_ENABLE 0x02000000 e1000_hw.h RGMII disabled
35752
 E1000_STATUS_FUSE_8E1000_STATUS_FUSE_8 0x04000000 e1000_hw.h 　
35753
 E1000_STATUS_FUSE_9E1000_STATUS_FUSE_9 0x08000000 e1000_hw.h 　
35754
 E1000_STATUS_SERDES0_DISE1000_STATUS_SERDES0_DIS 0x10000000 e1000_hw.h SERDES disabled on port 0
35755
 E1000_STATUS_SERDES1_DISE1000_STATUS_SERDES1_DIS 0x20000000 e1000_hw.h SERDES disabled on port 1
35756
 E1000_STATUS_PCIX_SPEED_66E1000_STATUS_PCIX_SPEED_66 0x00000000 e1000_hw.h PCI-X bus speed 50-66 MHz
35757
 E1000_STATUS_PCIX_SPEED_100E1000_STATUS_PCIX_SPEED_100 0x00004000 e1000_hw.h PCI-X bus speed 66-100 MHz
35758
 E1000_STATUS_PCIX_SPEED_133E1000_STATUS_PCIX_SPEED_133 0x00008000 e1000_hw.h PCI-X bus speed 100-133 MHz
35759
 E1000_EECD_SKE1000_EECD_SK 0x00000001 e1000_hw.h EEPROM Clock
35760
 E1000_EECD_CSE1000_EECD_CS 0x00000002 e1000_hw.h EEPROM Chip Select
35761
 E1000_EECD_DIE1000_EECD_DI 0x00000004 e1000_hw.h EEPROM Data In
35762
 E1000_EECD_DOE1000_EECD_DO 0x00000008 e1000_hw.h EEPROM Data Out
35763
 E1000_EECD_FWE_MASKE1000_EECD_FWE_MASK 0x00000030 e1000_hw.h 　
35764
 E1000_EECD_FWE_DISE1000_EECD_FWE_DIS 0x00000010 e1000_hw.h Disable FLASH writes
35765
 E1000_EECD_FWE_ENE1000_EECD_FWE_EN 0x00000020 e1000_hw.h Enable FLASH writes
35766
 E1000_EECD_FWE_SHIFTE1000_EECD_FWE_SHIFT 4 e1000_hw.h 　
35767
 E1000_EECD_REQE1000_EECD_REQ 0x00000040 e1000_hw.h EEPROM Access Request
35768
 E1000_EECD_GNTE1000_EECD_GNT 0x00000080 e1000_hw.h EEPROM Access Grant
35769
 E1000_EECD_PRESE1000_EECD_PRES 0x00000100 e1000_hw.h EEPROM Present
35770
 E1000_EECD_SIZEE1000_EECD_SIZE 0x00000200 e1000_hw.h EEPROM Size (0=64 word 1=256 word)
35771
 E1000_EECD_ADDR_BITSE1000_EECD_ADDR_BITS 0x00000400 e1000_hw.h EEPROM Addressing bits based on type
35772
 E1000_EECD_TYPEE1000_EECD_TYPE 0x00002000 e1000_hw.h EEPROM Type (1-SPI, 0-Microwire)
35773
 E1000_EEPROM_GRANT_ATTEMPTSE1000_EEPROM_GRANT_ATTEMPTS 1000 e1000_hw.h EEPROM # attempts to gain grant
35774
 E1000_EECD_AUTO_RDE1000_EECD_AUTO_RD 0x00000200 e1000_hw.h EEPROM Auto Read done
35775
 E1000_EECD_SIZE_EX_MASKE1000_EECD_SIZE_EX_MASK 0x00007800 e1000_hw.h EEprom Size
35776
 E1000_EECD_SIZE_EX_SHIFTE1000_EECD_SIZE_EX_SHIFT 11 e1000_hw.h 　
35777
 E1000_EECD_NVADDSE1000_EECD_NVADDS 0x00018000 e1000_hw.h NVM Address Size
35778
 E1000_EECD_SELSHADE1000_EECD_SELSHAD 0x00020000 e1000_hw.h Select Shadow RAM
35779
 E1000_EECD_INITSRAME1000_EECD_INITSRAM 0x00040000 e1000_hw.h Initialize Shadow RAM
35780
 E1000_EECD_FLUPDE1000_EECD_FLUPD 0x00080000 e1000_hw.h Update FLASH
35781
 E1000_EECD_AUPDENE1000_EECD_AUPDEN 0x00100000 e1000_hw.h Enable Autonomous FLASH update
35782
 E1000_EECD_SHADVE1000_EECD_SHADV 0x00200000 e1000_hw.h Shadow RAM Data Valid
35783
 E1000_EECD_SEC1VALE1000_EECD_SEC1VAL 0x00400000 e1000_hw.h Sector One Valid
35784
 E1000_EECD_SECVAL_SHIFTE1000_EECD_SECVAL_SHIFT 22 e1000_hw.h 　
35785
 E1000_STM_OPCODEE1000_STM_OPCODE 0xDB00 e1000_hw.h 　
35786
 E1000_HICR_FW_RESETE1000_HICR_FW_RESET 0xC0 e1000_hw.h 　
35787
 E1000_SHADOW_RAM_WORDSE1000_SHADOW_RAM_WORDS 2048 e1000_hw.h 　
35788
 E1000_ICH_NVM_SIG_WORDE1000_ICH_NVM_SIG_WORD 0x13 e1000_hw.h 　
35789
 E1000_ICH_NVM_SIG_MASKE1000_ICH_NVM_SIG_MASK 0xC0 e1000_hw.h 　
35790
 E1000_EERD_STARTE1000_EERD_START 0x00000001 e1000_hw.h Start Read
35791
 E1000_EERD_DONEE1000_EERD_DONE 0x00000010 e1000_hw.h Read Done
35792
 E1000_EERD_ADDR_SHIFTE1000_EERD_ADDR_SHIFT 8 e1000_hw.h 　
35793
 E1000_EERD_ADDR_MASKE1000_EERD_ADDR_MASK 0x0000FF00 e1000_hw.h Read Address
35794
 E1000_EERD_DATA_SHIFTE1000_EERD_DATA_SHIFT 16 e1000_hw.h 　
35795
 E1000_EERD_DATA_MASKE1000_EERD_DATA_MASK 0xFFFF0000 e1000_hw.h Read Data
35796
 EEPROM_STATUS_RDY_SPIEEPROM_STATUS_RDY_SPI 0x01 e1000_hw.h 　
35797
 EEPROM_STATUS_WEN_SPIEEPROM_STATUS_WEN_SPI 0x02 e1000_hw.h 　
35798
 EEPROM_STATUS_BP0_SPIEEPROM_STATUS_BP0_SPI 0x04 e1000_hw.h 　
35799
 EEPROM_STATUS_BP1_SPIEEPROM_STATUS_BP1_SPI 0x08 e1000_hw.h 　
35800
 EEPROM_STATUS_WPEN_SPIEEPROM_STATUS_WPEN_SPI 0x80 e1000_hw.h 　
35801
 E1000_CTRL_EXT_GPI0_ENE1000_CTRL_EXT_GPI0_EN 0x00000001 e1000_hw.h Maps SDP4 to GPI0
35802
 E1000_CTRL_EXT_GPI1_ENE1000_CTRL_EXT_GPI1_EN 0x00000002 e1000_hw.h Maps SDP5 to GPI1
35803
 E1000_CTRL_EXT_PHYINT_ENE1000_CTRL_EXT_PHYINT_EN E1000_CTRL_EXT_GPI1_EN e1000_hw.h 　
35804
 E1000_CTRL_EXT_GPI2_ENE1000_CTRL_EXT_GPI2_EN 0x00000004 e1000_hw.h Maps SDP6 to GPI2
35805
 E1000_CTRL_EXT_GPI3_ENE1000_CTRL_EXT_GPI3_EN 0x00000008 e1000_hw.h Maps SDP7 to GPI3
35806
 E1000_CTRL_EXT_SDP4_DATAE1000_CTRL_EXT_SDP4_DATA 0x00000010 e1000_hw.h Value of SW Defineable Pin 4
35807
 E1000_CTRL_EXT_SDP5_DATAE1000_CTRL_EXT_SDP5_DATA 0x00000020 e1000_hw.h Value of SW Defineable Pin 5
35808
 E1000_CTRL_EXT_PHY_INTE1000_CTRL_EXT_PHY_INT E1000_CTRL_EXT_SDP5_DATA e1000_hw.h 　
35809
 E1000_CTRL_EXT_SDP6_DATAE1000_CTRL_EXT_SDP6_DATA 0x00000040 e1000_hw.h Value of SW Defineable Pin 6
35810
 E1000_CTRL_EXT_SDP7_DATAE1000_CTRL_EXT_SDP7_DATA 0x00000080 e1000_hw.h Value of SW Defineable Pin 7
35811
 E1000_CTRL_EXT_SDP4_DIRE1000_CTRL_EXT_SDP4_DIR 0x00000100 e1000_hw.h Direction of SDP4 0=in 1=out
35812
 E1000_CTRL_EXT_SDP5_DIRE1000_CTRL_EXT_SDP5_DIR 0x00000200 e1000_hw.h Direction of SDP5 0=in 1=out
35813
 E1000_CTRL_EXT_SDP6_DIRE1000_CTRL_EXT_SDP6_DIR 0x00000400 e1000_hw.h Direction of SDP6 0=in 1=out
35814
 E1000_CTRL_EXT_SDP7_DIRE1000_CTRL_EXT_SDP7_DIR 0x00000800 e1000_hw.h Direction of SDP7 0=in 1=out
35815
 E1000_CTRL_EXT_ASDCHKE1000_CTRL_EXT_ASDCHK 0x00001000 e1000_hw.h Initiate an ASD sequence
35816
 E1000_CTRL_EXT_EE_RSTE1000_CTRL_EXT_EE_RST 0x00002000 e1000_hw.h Reinitialize from EEPROM
35817
 E1000_CTRL_EXT_IPSE1000_CTRL_EXT_IPS 0x00004000 e1000_hw.h Invert Power State
35818
 E1000_CTRL_EXT_SPD_BYPSE1000_CTRL_EXT_SPD_BYPS 0x00008000 e1000_hw.h Speed Select Bypass
35819
 E1000_CTRL_EXT_RO_DISE1000_CTRL_EXT_RO_DIS 0x00020000 e1000_hw.h Relaxed Ordering disable
35820
 E1000_CTRL_EXT_LINK_MODE_MASKE1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 e1000_hw.h 　
35821
 E1000_CTRL_EXT_LINK_MODE_GMIIE1000_CTRL_EXT_LINK_MODE_GMII 0x00000000 e1000_hw.h 　
35822
 E1000_CTRL_EXT_LINK_MODE_TBIE1000_CTRL_EXT_LINK_MODE_TBI 0x00C00000 e1000_hw.h 　
35823
 E1000_CTRL_EXT_LINK_MODE_KMRNE1000_CTRL_EXT_LINK_MODE_KMRN 0x00000000 e1000_hw.h 　
35824
 E1000_CTRL_EXT_LINK_MODE_SERDESE1000_CTRL_EXT_LINK_MODE_SERDES 0x00C00000 e1000_hw.h 　
35825
 E1000_CTRL_EXT_LINK_MODE_SGMIIE1000_CTRL_EXT_LINK_MODE_SGMII 0x00800000 e1000_hw.h 　
35826
 E1000_CTRL_EXT_WR_WMARK_MASKE1000_CTRL_EXT_WR_WMARK_MASK 0x03000000 e1000_hw.h 　
35827
 E1000_CTRL_EXT_WR_WMARK_256E1000_CTRL_EXT_WR_WMARK_256 0x00000000 e1000_hw.h 　
35828
 E1000_CTRL_EXT_WR_WMARK_320E1000_CTRL_EXT_WR_WMARK_320 0x01000000 e1000_hw.h 　
35829
 E1000_CTRL_EXT_WR_WMARK_384E1000_CTRL_EXT_WR_WMARK_384 0x02000000 e1000_hw.h 　
35830
 E1000_CTRL_EXT_WR_WMARK_448E1000_CTRL_EXT_WR_WMARK_448 0x03000000 e1000_hw.h 　
35831
 E1000_CTRL_EXT_DRV_LOADE1000_CTRL_EXT_DRV_LOAD 0x10000000 e1000_hw.h Driver loaded bit for FW
35832
 E1000_CTRL_EXT_IAMEE1000_CTRL_EXT_IAME 0x08000000 e1000_hw.h Interrupt acknowledge Auto-mask
35833
 E1000_CTRL_EXT_INT_TIMER_CLRE1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 e1000_hw.h Clear Interrupt timers after IMS clear
35834
 E1000_CRTL_EXT_PB_PARENE1000_CRTL_EXT_PB_PAREN 0x01000000 e1000_hw.h packet buffer parity error detection enabled
35835
 E1000_CTRL_EXT_DF_PARENE1000_CTRL_EXT_DF_PAREN 0x02000000 e1000_hw.h descriptor FIFO parity error detection enable
35836
 E1000_CTRL_EXT_GHOST_PARENE1000_CTRL_EXT_GHOST_PAREN 0x40000000 e1000_hw.h 　
35837
 E1000_MDIC_DATA_MASKE1000_MDIC_DATA_MASK 0x0000FFFF e1000_hw.h 　
35838
 E1000_MDIC_REG_MASKE1000_MDIC_REG_MASK 0x001F0000 e1000_hw.h 　
35839
 E1000_MDIC_REG_SHIFTE1000_MDIC_REG_SHIFT 16 e1000_hw.h 　
35840
 E1000_MDIC_PHY_MASKE1000_MDIC_PHY_MASK 0x03E00000 e1000_hw.h 　
35841
 E1000_MDIC_PHY_SHIFTE1000_MDIC_PHY_SHIFT 21 e1000_hw.h 　
35842
 E1000_MDIC_OP_WRITEE1000_MDIC_OP_WRITE 0x04000000 e1000_hw.h 　
35843
 E1000_MDIC_OP_READE1000_MDIC_OP_READ 0x08000000 e1000_hw.h 　
35844
 E1000_MDIC_READYE1000_MDIC_READY 0x10000000 e1000_hw.h 　
35845
 E1000_MDIC_INT_ENE1000_MDIC_INT_EN 0x20000000 e1000_hw.h 　
35846
 E1000_MDIC_ERRORE1000_MDIC_ERROR 0x40000000 e1000_hw.h 　
35847
 E1000_KUMCTRLSTA_MASKE1000_KUMCTRLSTA_MASK 0x0000FFFF e1000_hw.h 　
35848
 E1000_KUMCTRLSTA_OFFSETE1000_KUMCTRLSTA_OFFSET 0x001F0000 e1000_hw.h 　
35849
 E1000_KUMCTRLSTA_OFFSET_SHIFTE1000_KUMCTRLSTA_OFFSET_SHIFT 16 e1000_hw.h 　
35850
 E1000_KUMCTRLSTA_RENE1000_KUMCTRLSTA_REN 0x00200000 e1000_hw.h 　
35851
 E1000_KUMCTRLSTA_OFFSET_FIFO_CTE1000_KUMCTRLSTA_OFFSET_FIFO_CT 0x00000000 e1000_hw.h 　
35852
 E1000_KUMCTRLSTA_OFFSET_CTRLE1000_KUMCTRLSTA_OFFSET_CTRL 0x00000001 e1000_hw.h 　
35853
 E1000_KUMCTRLSTA_OFFSET_INB_CTRE1000_KUMCTRLSTA_OFFSET_INB_CTR 0x00000002 e1000_hw.h 　
35854
 E1000_KUMCTRLSTA_OFFSET_DIAGE1000_KUMCTRLSTA_OFFSET_DIAG 0x00000003 e1000_hw.h 　
35855
 E1000_KUMCTRLSTA_OFFSET_TIMEOUTE1000_KUMCTRLSTA_OFFSET_TIMEOUT 0x00000004 e1000_hw.h 　
35856
 E1000_KUMCTRLSTA_OFFSET_INB_PARE1000_KUMCTRLSTA_OFFSET_INB_PAR 0x00000009 e1000_hw.h 　
35857
 E1000_KUMCTRLSTA_OFFSET_HD_CTRLE1000_KUMCTRLSTA_OFFSET_HD_CTRL 0x00000010 e1000_hw.h 　
35858
 E1000_KUMCTRLSTA_OFFSET_M2P_SERE1000_KUMCTRLSTA_OFFSET_M2P_SER 0x0000001E e1000_hw.h 　
35859
 E1000_KUMCTRLSTA_OFFSET_M2P_MODE1000_KUMCTRLSTA_OFFSET_M2P_MOD 0x0000001F e1000_hw.h 　
35860
 E1000_KUMCTRLSTA_FIFO_CTRL_RX_BE1000_KUMCTRLSTA_FIFO_CTRL_RX_B 0x00000008 e1000_hw.h 　
35861
 E1000_KUMCTRLSTA_FIFO_CTRL_TX_BE1000_KUMCTRLSTA_FIFO_CTRL_TX_B 0x00000800 e1000_hw.h 　
35862
 E1000_KUMCTRLSTA_INB_CTRL_LINK_E1000_KUMCTRLSTA_INB_CTRL_LINK_ 0x00000500 e1000_hw.h 　
35863
 E1000_KUMCTRLSTA_INB_CTRL_DIS_PE1000_KUMCTRLSTA_INB_CTRL_DIS_P 0x00000010 e1000_hw.h 　
35864
 E1000_KUMCTRLSTA_HD_CTRL_10_100E1000_KUMCTRLSTA_HD_CTRL_10_100 0x00000004 e1000_hw.h 　
35865
 E1000_KUMCTRLSTA_HD_CTRL_1000_DE1000_KUMCTRLSTA_HD_CTRL_1000_D 0x00000000 e1000_hw.h 　
35866
 E1000_KUMCTRLSTA_OFFSET_K0S_CTRE1000_KUMCTRLSTA_OFFSET_K0S_CTR 0x0000001E e1000_hw.h 　
35867
 E1000_KUMCTRLSTA_DIAG_FELPBKE1000_KUMCTRLSTA_DIAG_FELPBK 0x2000 e1000_hw.h 　
35868
 E1000_KUMCTRLSTA_DIAG_NELPBKE1000_KUMCTRLSTA_DIAG_NELPBK 0x1000 e1000_hw.h 　
35869
 E1000_KUMCTRLSTA_K0S_100_ENE1000_KUMCTRLSTA_K0S_100_EN 0x2000 e1000_hw.h 　
35870
 E1000_KUMCTRLSTA_K0S_GBE_ENE1000_KUMCTRLSTA_K0S_GBE_EN 0x1000 e1000_hw.h 　
35871
 E1000_KUMCTRLSTA_K0S_ENTRY_LATEE1000_KUMCTRLSTA_K0S_ENTRY_LATE 0x0003 e1000_hw.h 　
35872
 E1000_KABGTXD_BGSQLBIASE1000_KABGTXD_BGSQLBIAS 0x00050000 e1000_hw.h 　
35873
 E1000_PHY_CTRL_SPD_ENE1000_PHY_CTRL_SPD_EN 0x00000001 e1000_hw.h 　
35874
 E1000_PHY_CTRL_D0A_LPLUE1000_PHY_CTRL_D0A_LPLU 0x00000002 e1000_hw.h 　
35875
 E1000_PHY_CTRL_NOND0A_LPLUE1000_PHY_CTRL_NOND0A_LPLU 0x00000004 e1000_hw.h 　
35876
 E1000_PHY_CTRL_NOND0A_GBE_DISABE1000_PHY_CTRL_NOND0A_GBE_DISAB 0x00000008 e1000_hw.h 　
35877
 E1000_PHY_CTRL_GBE_DISABLEE1000_PHY_CTRL_GBE_DISABLE 0x00000040 e1000_hw.h 　
35878
 E1000_PHY_CTRL_B2B_ENE1000_PHY_CTRL_B2B_EN 0x00000080 e1000_hw.h 　
35879
 E1000_LEDCTL_LED0_MODE_MASKE1000_LEDCTL_LED0_MODE_MASK 0x0000000F e1000_hw.h 　
35880
 E1000_LEDCTL_LED0_MODE_SHIFTE1000_LEDCTL_LED0_MODE_SHIFT 0 e1000_hw.h 　
35881
 E1000_LEDCTL_LED0_BLINK_RATEE1000_LEDCTL_LED0_BLINK_RATE 0x0000020 e1000_hw.h 　
35882
 E1000_LEDCTL_LED0_IVRTE1000_LEDCTL_LED0_IVRT 0x00000040 e1000_hw.h 　
35883
 E1000_LEDCTL_LED0_BLINKE1000_LEDCTL_LED0_BLINK 0x00000080 e1000_hw.h 　
35884
 E1000_LEDCTL_LED1_MODE_MASKE1000_LEDCTL_LED1_MODE_MASK 0x00000F00 e1000_hw.h 　
35885
 E1000_LEDCTL_LED1_MODE_SHIFTE1000_LEDCTL_LED1_MODE_SHIFT 8 e1000_hw.h 　
35886
 E1000_LEDCTL_LED1_BLINK_RATEE1000_LEDCTL_LED1_BLINK_RATE 0x0002000 e1000_hw.h 　
35887
 E1000_LEDCTL_LED1_IVRTE1000_LEDCTL_LED1_IVRT 0x00004000 e1000_hw.h 　
35888
 E1000_LEDCTL_LED1_BLINKE1000_LEDCTL_LED1_BLINK 0x00008000 e1000_hw.h 　
35889
 E1000_LEDCTL_LED2_MODE_MASKE1000_LEDCTL_LED2_MODE_MASK 0x000F0000 e1000_hw.h 　
35890
 E1000_LEDCTL_LED2_MODE_SHIFTE1000_LEDCTL_LED2_MODE_SHIFT 16 e1000_hw.h 　
35891
 E1000_LEDCTL_LED2_BLINK_RATEE1000_LEDCTL_LED2_BLINK_RATE 0x00200000 e1000_hw.h 　
35892
 E1000_LEDCTL_LED2_IVRTE1000_LEDCTL_LED2_IVRT 0x00400000 e1000_hw.h 　
35893
 E1000_LEDCTL_LED2_BLINKE1000_LEDCTL_LED2_BLINK 0x00800000 e1000_hw.h 　
35894
 E1000_LEDCTL_LED3_MODE_MASKE1000_LEDCTL_LED3_MODE_MASK 0x0F000000 e1000_hw.h 　
35895
 E1000_LEDCTL_LED3_MODE_SHIFTE1000_LEDCTL_LED3_MODE_SHIFT 24 e1000_hw.h 　
35896
 E1000_LEDCTL_LED3_BLINK_RATEE1000_LEDCTL_LED3_BLINK_RATE 0x20000000 e1000_hw.h 　
35897
 E1000_LEDCTL_LED3_IVRTE1000_LEDCTL_LED3_IVRT 0x40000000 e1000_hw.h 　
35898
 E1000_LEDCTL_LED3_BLINKE1000_LEDCTL_LED3_BLINK 0x80000000 e1000_hw.h 　
35899
 E1000_LEDCTL_MODE_LINK_10_1000E1000_LEDCTL_MODE_LINK_10_1000 0x0 e1000_hw.h 　
35900
 E1000_LEDCTL_MODE_LINK_100_1000E1000_LEDCTL_MODE_LINK_100_1000 0x1 e1000_hw.h 　
35901
 E1000_LEDCTL_MODE_LINK_UPE1000_LEDCTL_MODE_LINK_UP 0x2 e1000_hw.h 　
35902
 E1000_LEDCTL_MODE_ACTIVITYE1000_LEDCTL_MODE_ACTIVITY 0x3 e1000_hw.h 　
35903
 E1000_LEDCTL_MODE_LINK_ACTIVITYE1000_LEDCTL_MODE_LINK_ACTIVITY 0x4 e1000_hw.h 　
35904
 E1000_LEDCTL_MODE_LINK_10E1000_LEDCTL_MODE_LINK_10 0x5 e1000_hw.h 　
35905
 E1000_LEDCTL_MODE_LINK_100E1000_LEDCTL_MODE_LINK_100 0x6 e1000_hw.h 　
35906
 E1000_LEDCTL_MODE_LINK_1000E1000_LEDCTL_MODE_LINK_1000 0x7 e1000_hw.h 　
35907
 E1000_LEDCTL_MODE_PCIX_MODEE1000_LEDCTL_MODE_PCIX_MODE 0x8 e1000_hw.h 　
35908
 E1000_LEDCTL_MODE_FULL_DUPLEXE1000_LEDCTL_MODE_FULL_DUPLEX 0x9 e1000_hw.h 　
35909
 E1000_LEDCTL_MODE_COLLISIONE1000_LEDCTL_MODE_COLLISION 0xA e1000_hw.h 　
35910
 E1000_LEDCTL_MODE_BUS_SPEEDE1000_LEDCTL_MODE_BUS_SPEED 0xB e1000_hw.h 　
35911
 E1000_LEDCTL_MODE_BUS_SIZEE1000_LEDCTL_MODE_BUS_SIZE 0xC e1000_hw.h 　
35912
 E1000_LEDCTL_MODE_PAUSEDE1000_LEDCTL_MODE_PAUSED 0xD e1000_hw.h 　
35913
 E1000_LEDCTL_MODE_LED_ONE1000_LEDCTL_MODE_LED_ON 0xE e1000_hw.h 　
35914
 E1000_LEDCTL_MODE_LED_OFFE1000_LEDCTL_MODE_LED_OFF 0xF e1000_hw.h 　
35915
 E1000_RAH_AVE1000_RAH_AV 0x80000000 e1000_hw.h Receive descriptor valid
35916
 E1000_RAH_POOL_1E1000_RAH_POOL_1 0x00040000 e1000_hw.h 　
35917
 E1000_ICR_TXDWE1000_ICR_TXDW 0x00000001 e1000_hw.h Transmit desc written back
35918
 E1000_ICR_TXQEE1000_ICR_TXQE 0x00000002 e1000_hw.h Transmit Queue empty
35919
 E1000_ICR_LSCE1000_ICR_LSC 0x00000004 e1000_hw.h Link Status Change
35920
 E1000_ICR_RXSEQE1000_ICR_RXSEQ 0x00000008 e1000_hw.h rx sequence error
35921
 E1000_ICR_RXDMT0E1000_ICR_RXDMT0 0x00000010 e1000_hw.h rx desc min. threshold (0)
35922
 E1000_ICR_DOUTSYNCE1000_ICR_DOUTSYNC 0x10000000 e1000_hw.h NIC DMA out of sync
35923
 E1000_ICR_RXOE1000_ICR_RXO 0x00000040 e1000_hw.h rx overrun
35924
 E1000_ICR_RXT0E1000_ICR_RXT0 0x00000080 e1000_hw.h rx timer intr (ring 0)
35925
 E1000_ICR_MDACE1000_ICR_MDAC 0x00000200 e1000_hw.h MDIO access complete
35926
 E1000_ICR_RXCFGE1000_ICR_RXCFG 0x00000400 e1000_hw.h RX /c/ ordered set
35927
 E1000_ICR_GPI_EN0E1000_ICR_GPI_EN0 0x00000800 e1000_hw.h GP Int 0
35928
 E1000_ICR_GPI_EN1E1000_ICR_GPI_EN1 0x00001000 e1000_hw.h GP Int 1
35929
 E1000_ICR_GPI_EN2E1000_ICR_GPI_EN2 0x00002000 e1000_hw.h GP Int 2
35930
 E1000_ICR_GPI_EN3E1000_ICR_GPI_EN3 0x00004000 e1000_hw.h GP Int 3
35931
 E1000_ICR_TXD_LOWE1000_ICR_TXD_LOW 0x00008000 e1000_hw.h 　
35932
 E1000_ICR_SRPDE1000_ICR_SRPD 0x00010000 e1000_hw.h 　
35933
 E1000_ICR_ACKE1000_ICR_ACK 0x00020000 e1000_hw.h Receive Ack frame
35934
 E1000_ICR_MNGE1000_ICR_MNG 0x00040000 e1000_hw.h Manageability event
35935
 E1000_ICR_DOCKE1000_ICR_DOCK 0x00080000 e1000_hw.h Dock/Undock
35936
 E1000_ICR_INT_ASSERTEDE1000_ICR_INT_ASSERTED 0x80000000 e1000_hw.h If this bit asserted, the driver should claim the interrupt
35937
 E1000_ICR_RXD_FIFO_PAR0E1000_ICR_RXD_FIFO_PAR0 0x00100000 e1000_hw.h queue 0 Rx descriptor FIFO parity error
35938
 E1000_ICR_TXD_FIFO_PAR0E1000_ICR_TXD_FIFO_PAR0 0x00200000 e1000_hw.h queue 0 Tx descriptor FIFO parity error
35939
 E1000_ICR_HOST_ARB_PARE1000_ICR_HOST_ARB_PAR 0x00400000 e1000_hw.h host arb read buffer parity error
35940
 E1000_ICR_PB_PARE1000_ICR_PB_PAR 0x00800000 e1000_hw.h packet buffer parity error
35941
 E1000_ICR_RXD_FIFO_PAR1E1000_ICR_RXD_FIFO_PAR1 0x01000000 e1000_hw.h queue 1 Rx descriptor FIFO parity error
35942
 E1000_ICR_TXD_FIFO_PAR1E1000_ICR_TXD_FIFO_PAR1 0x02000000 e1000_hw.h queue 1 Tx descriptor FIFO parity error
35943
 E1000_ICR_ALL_PARITYE1000_ICR_ALL_PARITY 0x03F00000 e1000_hw.h all parity error bits
35944
 E1000_ICR_DSWE1000_ICR_DSW 0x00000020 e1000_hw.h FW changed the status of DISSW bit in the FWSM
35945
 E1000_ICR_PHYINTE1000_ICR_PHYINT 0x00001000 e1000_hw.h LAN connected device generates an interrupt
35946
 E1000_ICR_EPRSTE1000_ICR_EPRST 0x00100000 e1000_hw.h ME handware reset occurs
35947
 E1000_ICS_TXDWE1000_ICS_TXDW E1000_ICR_TXDW e1000_hw.h Transmit desc written back
35948
 E1000_ICS_TXQEE1000_ICS_TXQE E1000_ICR_TXQE e1000_hw.h Transmit Queue empty
35949
 E1000_ICS_LSCE1000_ICS_LSC E1000_ICR_LSC e1000_hw.h Link Status Change
35950
 E1000_ICS_RXSEQE1000_ICS_RXSEQ E1000_ICR_RXSEQ e1000_hw.h rx sequence error
35951
 E1000_ICS_RXDMT0E1000_ICS_RXDMT0 E1000_ICR_RXDMT0 e1000_hw.h rx desc min. threshold
35952
 E1000_ICS_RXOE1000_ICS_RXO E1000_ICR_RXO e1000_hw.h rx overrun
35953
 E1000_ICS_RXT0E1000_ICS_RXT0 E1000_ICR_RXT0 e1000_hw.h rx timer intr
35954
 E1000_ICS_MDACE1000_ICS_MDAC E1000_ICR_MDAC e1000_hw.h MDIO access complete
35955
 E1000_ICS_RXCFGE1000_ICS_RXCFG E1000_ICR_RXCFG e1000_hw.h RX /c/ ordered set
35956
 E1000_ICS_GPI_EN0E1000_ICS_GPI_EN0 E1000_ICR_GPI_EN0 e1000_hw.h GP Int 0
35957
 E1000_ICS_GPI_EN1E1000_ICS_GPI_EN1 E1000_ICR_GPI_EN1 e1000_hw.h GP Int 1
35958
 E1000_ICS_GPI_EN2E1000_ICS_GPI_EN2 E1000_ICR_GPI_EN2 e1000_hw.h GP Int 2
35959
 E1000_ICS_GPI_EN3E1000_ICS_GPI_EN3 E1000_ICR_GPI_EN3 e1000_hw.h GP Int 3
35960
 E1000_ICS_TXD_LOWE1000_ICS_TXD_LOW E1000_ICR_TXD_LOW e1000_hw.h 　
35961
 E1000_ICS_SRPDE1000_ICS_SRPD E1000_ICR_SRPD e1000_hw.h 　
35962
 E1000_ICS_ACKE1000_ICS_ACK E1000_ICR_ACK e1000_hw.h Receive Ack frame
35963
 E1000_ICS_MNGE1000_ICS_MNG E1000_ICR_MNG e1000_hw.h Manageability event
35964
 E1000_ICS_DOCKE1000_ICS_DOCK E1000_ICR_DOCK e1000_hw.h Dock/Undock
35965
 E1000_ICS_RXD_FIFO_PAR0E1000_ICS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 e1000_hw.h queue 0 Rx descriptor FIFO parity error
35966
 E1000_ICS_TXD_FIFO_PAR0E1000_ICS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 e1000_hw.h queue 0 Tx descriptor FIFO parity error
35967
 E1000_ICS_HOST_ARB_PARE1000_ICS_HOST_ARB_PAR E1000_ICR_HOST_ARB_PAR e1000_hw.h host arb read buffer parity error
35968
 E1000_ICS_PB_PARE1000_ICS_PB_PAR E1000_ICR_PB_PAR e1000_hw.h packet buffer parity error
35969
 E1000_ICS_RXD_FIFO_PAR1E1000_ICS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 e1000_hw.h queue 1 Rx descriptor FIFO parity error
35970
 E1000_ICS_TXD_FIFO_PAR1E1000_ICS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 e1000_hw.h queue 1 Tx descriptor FIFO parity error
35971
 E1000_ICS_DSWE1000_ICS_DSW E1000_ICR_DSW e1000_hw.h 　
35972
 E1000_ICS_PHYINTE1000_ICS_PHYINT E1000_ICR_PHYINT e1000_hw.h 　
35973
 E1000_ICS_EPRSTE1000_ICS_EPRST E1000_ICR_EPRST e1000_hw.h 　
35974
 E1000_IMS_TXDWE1000_IMS_TXDW E1000_ICR_TXDW e1000_hw.h Transmit desc written back
35975
 E1000_IMS_TXQEE1000_IMS_TXQE E1000_ICR_TXQE e1000_hw.h Transmit Queue empty
35976
 E1000_IMS_LSCE1000_IMS_LSC E1000_ICR_LSC e1000_hw.h Link Status Change
35977
 E1000_IMS_RXSEQE1000_IMS_RXSEQ E1000_ICR_RXSEQ e1000_hw.h rx sequence error
35978
 E1000_IMS_RXDMT0E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 e1000_hw.h rx desc min. threshold
35979
 E1000_IMS_RXOE1000_IMS_RXO E1000_ICR_RXO e1000_hw.h rx overrun
35980
 E1000_IMS_DOUTSYNCE1000_IMS_DOUTSYNC E1000_ICR_DOUTSYNC e1000_hw.h NIC DMA out of sync
35981
 E1000_IMS_RXT0E1000_IMS_RXT0 E1000_ICR_RXT0 e1000_hw.h rx timer intr
35982
 E1000_IMS_MDACE1000_IMS_MDAC E1000_ICR_MDAC e1000_hw.h MDIO access complete
35983
 E1000_IMS_RXCFGE1000_IMS_RXCFG E1000_ICR_RXCFG e1000_hw.h RX /c/ ordered set
35984
 E1000_IMS_GPI_EN0E1000_IMS_GPI_EN0 E1000_ICR_GPI_EN0 e1000_hw.h GP Int 0
35985
 E1000_IMS_GPI_EN1E1000_IMS_GPI_EN1 E1000_ICR_GPI_EN1 e1000_hw.h GP Int 1
35986
 E1000_IMS_GPI_EN2E1000_IMS_GPI_EN2 E1000_ICR_GPI_EN2 e1000_hw.h GP Int 2
35987
 E1000_IMS_GPI_EN3E1000_IMS_GPI_EN3 E1000_ICR_GPI_EN3 e1000_hw.h GP Int 3
35988
 E1000_IMS_TXD_LOWE1000_IMS_TXD_LOW E1000_ICR_TXD_LOW e1000_hw.h 　
35989
 E1000_IMS_SRPDE1000_IMS_SRPD E1000_ICR_SRPD e1000_hw.h 　
35990
 E1000_IMS_ACKE1000_IMS_ACK E1000_ICR_ACK e1000_hw.h Receive Ack frame
35991
 E1000_IMS_MNGE1000_IMS_MNG E1000_ICR_MNG e1000_hw.h Manageability event
35992
 E1000_IMS_DOCKE1000_IMS_DOCK E1000_ICR_DOCK e1000_hw.h Dock/Undock
35993
 E1000_IMS_RXD_FIFO_PAR0E1000_IMS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 e1000_hw.h queue 0 Rx descriptor FIFO parity error
35994
 E1000_IMS_TXD_FIFO_PAR0E1000_IMS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 e1000_hw.h queue 0 Tx descriptor FIFO parity error
35995
 E1000_IMS_HOST_ARB_PARE1000_IMS_HOST_ARB_PAR E1000_ICR_HOST_ARB_PAR e1000_hw.h host arb read buffer parity error
35996
 E1000_IMS_PB_PARE1000_IMS_PB_PAR E1000_ICR_PB_PAR e1000_hw.h packet buffer parity error
35997
 E1000_IMS_RXD_FIFO_PAR1E1000_IMS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 e1000_hw.h queue 1 Rx descriptor FIFO parity error
35998
 E1000_IMS_TXD_FIFO_PAR1E1000_IMS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 e1000_hw.h queue 1 Tx descriptor FIFO parity error
35999
 E1000_IMS_DSWE1000_IMS_DSW E1000_ICR_DSW e1000_hw.h 　
36000
 E1000_IMS_PHYINTE1000_IMS_PHYINT E1000_ICR_PHYINT e1000_hw.h 　
36001
 E1000_IMS_EPRSTE1000_IMS_EPRST E1000_ICR_EPRST e1000_hw.h 　
36002
 E1000_IMC_TXDWE1000_IMC_TXDW E1000_ICR_TXDW e1000_hw.h Transmit desc written back
36003
 E1000_IMC_TXQEE1000_IMC_TXQE E1000_ICR_TXQE e1000_hw.h Transmit Queue empty
36004
 E1000_IMC_LSCE1000_IMC_LSC E1000_ICR_LSC e1000_hw.h Link Status Change
36005
 E1000_IMC_RXSEQE1000_IMC_RXSEQ E1000_ICR_RXSEQ e1000_hw.h rx sequence error
36006
 E1000_IMC_RXDMT0E1000_IMC_RXDMT0 E1000_ICR_RXDMT0 e1000_hw.h rx desc min. threshold
36007
 E1000_IMC_RXOE1000_IMC_RXO E1000_ICR_RXO e1000_hw.h rx overrun
36008
 E1000_IMC_RXT0E1000_IMC_RXT0 E1000_ICR_RXT0 e1000_hw.h rx timer intr
36009
 E1000_IMC_MDACE1000_IMC_MDAC E1000_ICR_MDAC e1000_hw.h MDIO access complete
36010
 E1000_IMC_RXCFGE1000_IMC_RXCFG E1000_ICR_RXCFG e1000_hw.h RX /c/ ordered set
36011
 E1000_IMC_GPI_EN0E1000_IMC_GPI_EN0 E1000_ICR_GPI_EN0 e1000_hw.h GP Int 0
36012
 E1000_IMC_GPI_EN1E1000_IMC_GPI_EN1 E1000_ICR_GPI_EN1 e1000_hw.h GP Int 1
36013
 E1000_IMC_GPI_EN2E1000_IMC_GPI_EN2 E1000_ICR_GPI_EN2 e1000_hw.h GP Int 2
36014
 E1000_IMC_GPI_EN3E1000_IMC_GPI_EN3 E1000_ICR_GPI_EN3 e1000_hw.h GP Int 3
36015
 E1000_IMC_TXD_LOWE1000_IMC_TXD_LOW E1000_ICR_TXD_LOW e1000_hw.h 　
36016
 E1000_IMC_SRPDE1000_IMC_SRPD E1000_ICR_SRPD e1000_hw.h 　
36017
 E1000_IMC_ACKE1000_IMC_ACK E1000_ICR_ACK e1000_hw.h Receive Ack frame
36018
 E1000_IMC_MNGE1000_IMC_MNG E1000_ICR_MNG e1000_hw.h Manageability event
36019
 E1000_IMC_DOCKE1000_IMC_DOCK E1000_ICR_DOCK e1000_hw.h Dock/Undock
36020
 E1000_IMC_RXD_FIFO_PAR0E1000_IMC_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 e1000_hw.h queue 0 Rx descriptor FIFO parity error
36021
 E1000_IMC_TXD_FIFO_PAR0E1000_IMC_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 e1000_hw.h queue 0 Tx descriptor FIFO parity error
36022
 E1000_IMC_HOST_ARB_PARE1000_IMC_HOST_ARB_PAR E1000_ICR_HOST_ARB_PAR e1000_hw.h host arb read buffer parity error
36023
 E1000_IMC_PB_PARE1000_IMC_PB_PAR E1000_ICR_PB_PAR e1000_hw.h packet buffer parity error
36024
 E1000_IMC_RXD_FIFO_PAR1E1000_IMC_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 e1000_hw.h queue 1 Rx descriptor FIFO parity error
36025
 E1000_IMC_TXD_FIFO_PAR1E1000_IMC_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 e1000_hw.h queue 1 Tx descriptor FIFO parity error
36026
 E1000_IMC_DSWE1000_IMC_DSW E1000_ICR_DSW e1000_hw.h 　
36027
 E1000_IMC_PHYINTE1000_IMC_PHYINT E1000_ICR_PHYINT e1000_hw.h 　
36028
 E1000_IMC_EPRSTE1000_IMC_EPRST E1000_ICR_EPRST e1000_hw.h 　
36029
 E1000_RCTL_RSTE1000_RCTL_RST 0x00000001 e1000_hw.h Software reset
36030
 E1000_RCTL_ENE1000_RCTL_EN 0x00000002 e1000_hw.h enable
36031
 E1000_RCTL_SBPE1000_RCTL_SBP 0x00000004 e1000_hw.h store bad packet
36032
 E1000_RCTL_UPEE1000_RCTL_UPE 0x00000008 e1000_hw.h unicast promiscuous enable
36033
 E1000_RCTL_MPEE1000_RCTL_MPE 0x00000010 e1000_hw.h multicast promiscuous enab
36034
 E1000_RCTL_LPEE1000_RCTL_LPE 0x00000020 e1000_hw.h long packet enable
36035
 E1000_RCTL_LBM_NOE1000_RCTL_LBM_NO 0x00000000 e1000_hw.h no loopback mode
36036
 E1000_RCTL_LBM_MACE1000_RCTL_LBM_MAC 0x00000040 e1000_hw.h MAC loopback mode
36037
 E1000_RCTL_LBM_SLPE1000_RCTL_LBM_SLP 0x00000080 e1000_hw.h serial link loopback mode
36038
 E1000_RCTL_LBM_TCVRE1000_RCTL_LBM_TCVR 0x000000C0 e1000_hw.h tcvr loopback mode
36039
 E1000_RCTL_DTYP_MASKE1000_RCTL_DTYP_MASK 0x00000C00 e1000_hw.h Descriptor type mask
36040
 E1000_RCTL_DTYP_PSE1000_RCTL_DTYP_PS 0x00000400 e1000_hw.h Packet Split descriptor
36041
 E1000_RCTL_RDMTS_HALFE1000_RCTL_RDMTS_HALF 0x00000000 e1000_hw.h rx desc min threshold size
36042
 E1000_RCTL_RDMTS_QUATE1000_RCTL_RDMTS_QUAT 0x00000100 e1000_hw.h rx desc min threshold size
36043
 E1000_RCTL_RDMTS_EIGTHE1000_RCTL_RDMTS_EIGTH 0x00000200 e1000_hw.h rx desc min threshold size
36044
 E1000_RCTL_MO_SHIFTE1000_RCTL_MO_SHIFT 12 e1000_hw.h multicast offset shift
36045
 E1000_RCTL_MO_0E1000_RCTL_MO_0 0x00000000 e1000_hw.h multicast offset 11:0
36046
 E1000_RCTL_MO_1E1000_RCTL_MO_1 0x00001000 e1000_hw.h multicast offset 12:1
36047
 E1000_RCTL_MO_2E1000_RCTL_MO_2 0x00002000 e1000_hw.h multicast offset 13:2
36048
 E1000_RCTL_MO_3E1000_RCTL_MO_3 0x00003000 e1000_hw.h multicast offset 15:4
36049
 E1000_RCTL_MDRE1000_RCTL_MDR 0x00004000 e1000_hw.h multicast desc ring 0
36050
 E1000_RCTL_BAME1000_RCTL_BAM 0x00008000 e1000_hw.h broadcast enable
36051
 E1000_RCTL_SZ_2048E1000_RCTL_SZ_2048 0x00000000 e1000_hw.h rx buffer size 2048
36052
 E1000_RCTL_SZ_1024E1000_RCTL_SZ_1024 0x00010000 e1000_hw.h rx buffer size 1024
36053
 E1000_RCTL_SZ_512E1000_RCTL_SZ_512 0x00020000 e1000_hw.h rx buffer size 512
36054
 E1000_RCTL_SZ_256E1000_RCTL_SZ_256 0x00030000 e1000_hw.h rx buffer size 256
36055
 E1000_RCTL_SZ_16384E1000_RCTL_SZ_16384 0x00010000 e1000_hw.h rx buffer size 16384
36056
 E1000_RCTL_SZ_8192E1000_RCTL_SZ_8192 0x00020000 e1000_hw.h rx buffer size 8192
36057
 E1000_RCTL_SZ_4096E1000_RCTL_SZ_4096 0x00030000 e1000_hw.h rx buffer size 4096
36058
 E1000_RCTL_VFEE1000_RCTL_VFE 0x00040000 e1000_hw.h vlan filter enable
36059
 E1000_RCTL_CFIENE1000_RCTL_CFIEN 0x00080000 e1000_hw.h canonical form enable
36060
 E1000_RCTL_CFIE1000_RCTL_CFI 0x00100000 e1000_hw.h canonical form indicator
36061
 E1000_RCTL_DPFE1000_RCTL_DPF 0x00400000 e1000_hw.h discard pause frames
36062
 E1000_RCTL_PMCFE1000_RCTL_PMCF 0x00800000 e1000_hw.h pass MAC control frames
36063
 E1000_RCTL_BSEXE1000_RCTL_BSEX 0x02000000 e1000_hw.h Buffer size extension
36064
 E1000_RCTL_SECRCE1000_RCTL_SECRC 0x04000000 e1000_hw.h Strip Ethernet CRC
36065
 E1000_RCTL_FLXBUF_MASKE1000_RCTL_FLXBUF_MASK 0x78000000 e1000_hw.h Flexible buffer size
36066
 E1000_RCTL_FLXBUF_SHIFTE1000_RCTL_FLXBUF_SHIFT 27 e1000_hw.h Flexible buffer shift
36067
 E1000_PSRCTL_BSIZE0_MASKE1000_PSRCTL_BSIZE0_MASK 0x0000007F e1000_hw.h 　
36068
 E1000_PSRCTL_BSIZE1_MASKE1000_PSRCTL_BSIZE1_MASK 0x00003F00 e1000_hw.h 　
36069
 E1000_PSRCTL_BSIZE2_MASKE1000_PSRCTL_BSIZE2_MASK 0x003F0000 e1000_hw.h 　
36070
 E1000_PSRCTL_BSIZE3_MASKE1000_PSRCTL_BSIZE3_MASK 0x3F000000 e1000_hw.h 　
36071
 E1000_PSRCTL_BSIZE0_SHIFTE1000_PSRCTL_BSIZE0_SHIFT 7 e1000_hw.h Shift _right_ 7
36072
 E1000_PSRCTL_BSIZE1_SHIFTE1000_PSRCTL_BSIZE1_SHIFT 2 e1000_hw.h Shift _right_ 2
36073
 E1000_PSRCTL_BSIZE2_SHIFTE1000_PSRCTL_BSIZE2_SHIFT 6 e1000_hw.h Shift _left_ 6
36074
 E1000_PSRCTL_BSIZE3_SHIFTE1000_PSRCTL_BSIZE3_SHIFT 14 e1000_hw.h Shift _left_ 14
36075
 E1000_SWFW_EEP_SME1000_SWFW_EEP_SM 0x0001 e1000_hw.h 　
36076
 E1000_SWFW_PHY0_SME1000_SWFW_PHY0_SM 0x0002 e1000_hw.h 　
36077
 E1000_SWFW_PHY1_SME1000_SWFW_PHY1_SM 0x0004 e1000_hw.h 　
36078
 E1000_SWFW_MAC_CSR_SME1000_SWFW_MAC_CSR_SM 0x0008 e1000_hw.h 　
36079
 E1000_RDT_DELAYE1000_RDT_DELAY 0x0000ffff e1000_hw.h Delay timer (1=1024us)
36080
 E1000_RDT_FPDBE1000_RDT_FPDB 0x80000000 e1000_hw.h Flush descriptor block
36081
 E1000_RDLEN_LENE1000_RDLEN_LEN 0x0007ff80 e1000_hw.h descriptor length
36082
 E1000_RDH_RDHE1000_RDH_RDH 0x0000ffff e1000_hw.h receive descriptor head
36083
 E1000_RDT_RDTE1000_RDT_RDT 0x0000ffff e1000_hw.h receive descriptor tail
36084
 E1000_FCRTH_RTHE1000_FCRTH_RTH 0x0000FFF8 e1000_hw.h Mask Bits[15:3] for RTH
36085
 E1000_FCRTH_XFCEE1000_FCRTH_XFCE 0x80000000 e1000_hw.h External Flow Control Enable
36086
 E1000_FCRTL_RTLE1000_FCRTL_RTL 0x0000FFF8 e1000_hw.h Mask Bits[15:3] for RTL
36087
 E1000_FCRTL_XONEE1000_FCRTL_XONE 0x80000000 e1000_hw.h Enable XON frame transmission
36088
 E1000_RFCTL_ISCSI_DISE1000_RFCTL_ISCSI_DIS 0x00000001 e1000_hw.h 　
36089
 E1000_RFCTL_ISCSI_DWC_MASKE1000_RFCTL_ISCSI_DWC_MASK 0x0000003E e1000_hw.h 　
36090
 E1000_RFCTL_ISCSI_DWC_SHIFTE1000_RFCTL_ISCSI_DWC_SHIFT 1 e1000_hw.h 　
36091
 E1000_RFCTL_NFSW_DISE1000_RFCTL_NFSW_DIS 0x00000040 e1000_hw.h 　
36092
 E1000_RFCTL_NFSR_DISE1000_RFCTL_NFSR_DIS 0x00000080 e1000_hw.h 　
36093
 E1000_RFCTL_NFS_VER_MASKE1000_RFCTL_NFS_VER_MASK 0x00000300 e1000_hw.h 　
36094
 E1000_RFCTL_NFS_VER_SHIFTE1000_RFCTL_NFS_VER_SHIFT 8 e1000_hw.h 　
36095
 E1000_RFCTL_IPV6_DISE1000_RFCTL_IPV6_DIS 0x00000400 e1000_hw.h 　
36096
 E1000_RFCTL_IPV6_XSUM_DISE1000_RFCTL_IPV6_XSUM_DIS 0x00000800 e1000_hw.h 　
36097
 E1000_RFCTL_ACK_DISE1000_RFCTL_ACK_DIS 0x00001000 e1000_hw.h 　
36098
 E1000_RFCTL_ACKD_DISE1000_RFCTL_ACKD_DIS 0x00002000 e1000_hw.h 　
36099
 E1000_RFCTL_IPFRSP_DISE1000_RFCTL_IPFRSP_DIS 0x00004000 e1000_hw.h 　
36100
 E1000_RFCTL_EXTENE1000_RFCTL_EXTEN 0x00008000 e1000_hw.h 　
36101
 E1000_RFCTL_IPV6_EX_DISE1000_RFCTL_IPV6_EX_DIS 0x00010000 e1000_hw.h 　
36102
 E1000_RFCTL_NEW_IPV6_EXT_DISE1000_RFCTL_NEW_IPV6_EXT_DIS 0x00020000 e1000_hw.h 　
36103
 E1000_RXDCTL_PTHRESHE1000_RXDCTL_PTHRESH 0x0000003F e1000_hw.h RXDCTL Prefetch Threshold
36104
 E1000_RXDCTL_HTHRESHE1000_RXDCTL_HTHRESH 0x00003F00 e1000_hw.h RXDCTL Host Threshold
36105
 E1000_RXDCTL_WTHRESHE1000_RXDCTL_WTHRESH 0x003F0000 e1000_hw.h RXDCTL Writeback Threshold
36106
 E1000_RXDCTL_GRANE1000_RXDCTL_GRAN 0x01000000 e1000_hw.h RXDCTL Granularity
36107
 E1000_RXDCTL_QUEUE_ENABLEE1000_RXDCTL_QUEUE_ENABLE 0x02000000 e1000_hw.h Enable specific Rx Queue
36108
 IGB_RX_PTHRESHIGB_RX_PTHRESH 16 e1000_hw.h 　
36109
 IGB_RX_HTHRESHIGB_RX_HTHRESH 8 e1000_hw.h 　
36110
 IGB_RX_WTHRESHIGB_RX_WTHRESH 1 e1000_hw.h 　
36111
 E1000_TXDCTL_PTHRESHE1000_TXDCTL_PTHRESH 0x0000003F e1000_hw.h TXDCTL Prefetch Threshold
36112
 E1000_TXDCTL_HTHRESHE1000_TXDCTL_HTHRESH 0x00003F00 e1000_hw.h TXDCTL Host Threshold
36113
 E1000_TXDCTL_WTHRESHE1000_TXDCTL_WTHRESH 0x003F0000 e1000_hw.h TXDCTL Writeback Threshold
36114
 E1000_TXDCTL_GRANE1000_TXDCTL_GRAN 0x01000000 e1000_hw.h TXDCTL Granularity
36115
 E1000_TXDCTL_LWTHRESHE1000_TXDCTL_LWTHRESH 0xFE000000 e1000_hw.h TXDCTL Low Threshold
36116
 E1000_TXDCTL_FULL_TX_DESC_WBE1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 e1000_hw.h GRAN=1, WTHRESH=1
36117
 E1000_TXDCTL_COUNT_DESCE1000_TXDCTL_COUNT_DESC 0x00400000 e1000_hw.h Enable the counting of desc.
36118
 E1000_TXDCTL_QUEUE_ENABLEE1000_TXDCTL_QUEUE_ENABLE 0x02000000 e1000_hw.h Enable specific Tx Queue
36119
 E1000_TXCW_FDE1000_TXCW_FD 0x00000020 e1000_hw.h TXCW full duplex
36120
 E1000_TXCW_HDE1000_TXCW_HD 0x00000040 e1000_hw.h TXCW half duplex
36121
 E1000_TXCW_PAUSEE1000_TXCW_PAUSE 0x00000080 e1000_hw.h TXCW sym pause request
36122
 E1000_TXCW_ASM_DIRE1000_TXCW_ASM_DIR 0x00000100 e1000_hw.h TXCW astm pause direction
36123
 E1000_TXCW_PAUSE_MASKE1000_TXCW_PAUSE_MASK 0x00000180 e1000_hw.h TXCW pause request mask
36124
 E1000_TXCW_RFE1000_TXCW_RF 0x00003000 e1000_hw.h TXCW remote fault
36125
 E1000_TXCW_NPE1000_TXCW_NP 0x00008000 e1000_hw.h TXCW next page
36126
 E1000_TXCW_CWE1000_TXCW_CW 0x0000ffff e1000_hw.h TxConfigWord mask
36127
 E1000_TXCW_TXCE1000_TXCW_TXC 0x40000000 e1000_hw.h Transmit Config control
36128
 E1000_TXCW_ANEE1000_TXCW_ANE 0x80000000 e1000_hw.h Auto-neg enable
36129
 E1000_RXCW_CWE1000_RXCW_CW 0x0000ffff e1000_hw.h RxConfigWord mask
36130
 E1000_RXCW_NCE1000_RXCW_NC 0x04000000 e1000_hw.h Receive config no carrier
36131
 E1000_RXCW_IVE1000_RXCW_IV 0x08000000 e1000_hw.h Receive config invalid
36132
 E1000_RXCW_CCE1000_RXCW_CC 0x10000000 e1000_hw.h Receive config change
36133
 E1000_RXCW_CE1000_RXCW_C 0x20000000 e1000_hw.h Receive config
36134
 E1000_RXCW_SYNCHE1000_RXCW_SYNCH 0x40000000 e1000_hw.h Receive config synch
36135
 E1000_RXCW_ANCE1000_RXCW_ANC 0x80000000 e1000_hw.h Auto-neg complete
36136
 E1000_TCTL_RSTE1000_TCTL_RST 0x00000001 e1000_hw.h software reset
36137
 E1000_TCTL_ENE1000_TCTL_EN 0x00000002 e1000_hw.h enable tx
36138
 E1000_TCTL_BCEE1000_TCTL_BCE 0x00000004 e1000_hw.h busy check enable
36139
 E1000_TCTL_PSPE1000_TCTL_PSP 0x00000008 e1000_hw.h pad short packets
36140
 E1000_TCTL_CTE1000_TCTL_CT 0x00000ff0 e1000_hw.h collision threshold
36141
 E1000_TCTL_COLDE1000_TCTL_COLD 0x003ff000 e1000_hw.h collision distance
36142
 E1000_TCTL_SWXOFFE1000_TCTL_SWXOFF 0x00400000 e1000_hw.h SW Xoff transmission
36143
 E1000_TCTL_PBEE1000_TCTL_PBE 0x00800000 e1000_hw.h Packet Burst Enable
36144
 E1000_TCTL_RTLCE1000_TCTL_RTLC 0x01000000 e1000_hw.h Re-transmit on late collision
36145
 E1000_TCTL_NRTUE1000_TCTL_NRTU 0x02000000 e1000_hw.h No Re-transmit on underrun
36146
 E1000_TCTL_MULRE1000_TCTL_MULR 0x10000000 e1000_hw.h Multiple request support
36147
 E1000_TCTL_EXT_BST_MASKE1000_TCTL_EXT_BST_MASK 0x000003FF e1000_hw.h Backoff Slot Time
36148
 E1000_TCTL_EXT_GCEX_MASKE1000_TCTL_EXT_GCEX_MASK 0x000FFC00 e1000_hw.h Gigabit Carry Extend Padding
36149
 DEFAULT_80003ES2LAN_TCTL_EXT_GCDEFAULT_80003ES2LAN_TCTL_EXT_GC 0x00010000 e1000_hw.h 　
36150
 E1000_RXCSUM_PCSS_MASKE1000_RXCSUM_PCSS_MASK 0x000000FF e1000_hw.h Packet Checksum Start
36151
 E1000_RXCSUM_IPOFLE1000_RXCSUM_IPOFL 0x00000100 e1000_hw.h IPv4 checksum offload
36152
 E1000_RXCSUM_TUOFLE1000_RXCSUM_TUOFL 0x00000200 e1000_hw.h TCP / UDP checksum offload
36153
 E1000_RXCSUM_IPV6OFLE1000_RXCSUM_IPV6OFL 0x00000400 e1000_hw.h IPv6 checksum offload
36154
 E1000_RXCSUM_IPPCSEE1000_RXCSUM_IPPCSE 0x00001000 e1000_hw.h IP payload checksum enable
36155
 E1000_RXCSUM_PCSDE1000_RXCSUM_PCSD 0x00002000 e1000_hw.h packet checksum disabled
36156
 E1000_MRQC_ENABLE_MASKE1000_MRQC_ENABLE_MASK 0x00000003 e1000_hw.h 　
36157
 E1000_MRQC_ENABLE_VMDQE1000_MRQC_ENABLE_VMDQ 0x00000003 e1000_hw.h 　
36158
 E1000_MRQC_ENABLE_RSS_2QE1000_MRQC_ENABLE_RSS_2Q 0x00000001 e1000_hw.h 　
36159
 E1000_MRQC_ENABLE_RSS_INTE1000_MRQC_ENABLE_RSS_INT 0x00000004 e1000_hw.h 　
36160
 E1000_MRQC_RSS_FIELD_MASKE1000_MRQC_RSS_FIELD_MASK 0xFFFF0000 e1000_hw.h 　
36161
 E1000_MRQC_RSS_FIELD_IPV4_TCPE1000_MRQC_RSS_FIELD_IPV4_TCP 0x00010000 e1000_hw.h 　
36162
 E1000_MRQC_RSS_FIELD_IPV4E1000_MRQC_RSS_FIELD_IPV4 0x00020000 e1000_hw.h 　
36163
 E1000_MRQC_RSS_FIELD_IPV6_TCP_EE1000_MRQC_RSS_FIELD_IPV6_TCP_E 0x00040000 e1000_hw.h 　
36164
 E1000_MRQC_RSS_FIELD_IPV6_EXE1000_MRQC_RSS_FIELD_IPV6_EX 0x00080000 e1000_hw.h 　
36165
 E1000_MRQC_RSS_FIELD_IPV6E1000_MRQC_RSS_FIELD_IPV6 0x00100000 e1000_hw.h 　
36166
 E1000_MRQC_RSS_FIELD_IPV6_TCPE1000_MRQC_RSS_FIELD_IPV6_TCP 0x00200000 e1000_hw.h 　
36167
 E1000_WUC_APMEE1000_WUC_APME 0x00000001 e1000_hw.h APM Enable
36168
 E1000_WUC_PME_ENE1000_WUC_PME_EN 0x00000002 e1000_hw.h PME Enable
36169
 E1000_WUC_PME_STATUSE1000_WUC_PME_STATUS 0x00000004 e1000_hw.h PME Status
36170
 E1000_WUC_APMPMEE1000_WUC_APMPME 0x00000008 e1000_hw.h Assert PME on APM Wakeup
36171
 E1000_WUC_SPME1000_WUC_SPM 0x80000000 e1000_hw.h Enable SPM
36172
 E1000_WUFC_LNKCE1000_WUFC_LNKC 0x00000001 e1000_hw.h Link Status Change Wakeup Enable
36173
 E1000_WUFC_MAGE1000_WUFC_MAG 0x00000002 e1000_hw.h Magic Packet Wakeup Enable
36174
 E1000_WUFC_EXE1000_WUFC_EX 0x00000004 e1000_hw.h Directed Exact Wakeup Enable
36175
 E1000_WUFC_MCE1000_WUFC_MC 0x00000008 e1000_hw.h Directed Multicast Wakeup Enable
36176
 E1000_WUFC_BCE1000_WUFC_BC 0x00000010 e1000_hw.h Broadcast Wakeup Enable
36177
 E1000_WUFC_ARPE1000_WUFC_ARP 0x00000020 e1000_hw.h ARP Request Packet Wakeup Enable
36178
 E1000_WUFC_IPV4E1000_WUFC_IPV4 0x00000040 e1000_hw.h Directed IPv4 Packet Wakeup Enable
36179
 E1000_WUFC_IPV6E1000_WUFC_IPV6 0x00000080 e1000_hw.h Directed IPv6 Packet Wakeup Enable
36180
 E1000_WUFC_IGNORE_TCOE1000_WUFC_IGNORE_TCO 0x00008000 e1000_hw.h Ignore WakeOn TCO packets
36181
 E1000_WUFC_FLX0E1000_WUFC_FLX0 0x00010000 e1000_hw.h Flexible Filter 0 Enable
36182
 E1000_WUFC_FLX1E1000_WUFC_FLX1 0x00020000 e1000_hw.h Flexible Filter 1 Enable
36183
 E1000_WUFC_FLX2E1000_WUFC_FLX2 0x00040000 e1000_hw.h Flexible Filter 2 Enable
36184
 E1000_WUFC_FLX3E1000_WUFC_FLX3 0x00080000 e1000_hw.h Flexible Filter 3 Enable
36185
 E1000_WUFC_ALL_FILTERSE1000_WUFC_ALL_FILTERS 0x000F00FF e1000_hw.h Mask for all wakeup filters
36186
 E1000_WUFC_FLX_OFFSETE1000_WUFC_FLX_OFFSET 16 e1000_hw.h Offset to the Flexible Filters bits
36187
 E1000_WUFC_FLX_FILTERSE1000_WUFC_FLX_FILTERS 0x000F0000 e1000_hw.h Mask for the 4 flexible filters
36188
 E1000_WUS_LNKCE1000_WUS_LNKC 0x00000001 e1000_hw.h Link Status Changed
36189
 E1000_WUS_MAGE1000_WUS_MAG 0x00000002 e1000_hw.h Magic Packet Received
36190
 E1000_WUS_EXE1000_WUS_EX 0x00000004 e1000_hw.h Directed Exact Received
36191
 E1000_WUS_MCE1000_WUS_MC 0x00000008 e1000_hw.h Directed Multicast Received
36192
 E1000_WUS_BCE1000_WUS_BC 0x00000010 e1000_hw.h Broadcast Received
36193
 E1000_WUS_ARPE1000_WUS_ARP 0x00000020 e1000_hw.h ARP Request Packet Received
36194
 E1000_WUS_IPV4E1000_WUS_IPV4 0x00000040 e1000_hw.h Directed IPv4 Packet Wakeup Received
36195
 E1000_WUS_IPV6E1000_WUS_IPV6 0x00000080 e1000_hw.h Directed IPv6 Packet Wakeup Received
36196
 E1000_WUS_FLX0E1000_WUS_FLX0 0x00010000 e1000_hw.h Flexible Filter 0 Match
36197
 E1000_WUS_FLX1E1000_WUS_FLX1 0x00020000 e1000_hw.h Flexible Filter 1 Match
36198
 E1000_WUS_FLX2E1000_WUS_FLX2 0x00040000 e1000_hw.h Flexible Filter 2 Match
36199
 E1000_WUS_FLX3E1000_WUS_FLX3 0x00080000 e1000_hw.h Flexible Filter 3 Match
36200
 E1000_WUS_FLX_FILTERSE1000_WUS_FLX_FILTERS 0x000F0000 e1000_hw.h Mask for the 4 flexible filters
36201
 E1000_MANC_SMBUS_ENE1000_MANC_SMBUS_EN 0x00000001 e1000_hw.h SMBus Enabled - RO
36202
 E1000_MANC_ASF_ENE1000_MANC_ASF_EN 0x00000002 e1000_hw.h ASF Enabled - RO
36203
 E1000_MANC_R_ON_FORCEE1000_MANC_R_ON_FORCE 0x00000004 e1000_hw.h Reset on Force TCO - RO
36204
 E1000_MANC_RMCP_ENE1000_MANC_RMCP_EN 0x00000100 e1000_hw.h Enable RCMP 026Fh Filtering
36205
 E1000_MANC_0298_ENE1000_MANC_0298_EN 0x00000200 e1000_hw.h Enable RCMP 0298h Filtering
36206
 E1000_MANC_IPV4_ENE1000_MANC_IPV4_EN 0x00000400 e1000_hw.h Enable IPv4
36207
 E1000_MANC_IPV6_ENE1000_MANC_IPV6_EN 0x00000800 e1000_hw.h Enable IPv6
36208
 E1000_MANC_SNAP_ENE1000_MANC_SNAP_EN 0x00001000 e1000_hw.h Accept LLC/SNAP
36209
 E1000_MANC_ARP_ENE1000_MANC_ARP_EN 0x00002000 e1000_hw.h Enable ARP Request Filtering
36210
 E1000_MANC_NEIGHBOR_ENE1000_MANC_NEIGHBOR_EN 0x00004000 e1000_hw.h Enable Neighbor Discovery
36211
 E1000_MANC_ARP_RES_ENE1000_MANC_ARP_RES_EN 0x00008000 e1000_hw.h Enable ARP response Filtering
36212
 E1000_MANC_TCO_RESETE1000_MANC_TCO_RESET 0x00010000 e1000_hw.h TCO Reset Occurred
36213
 E1000_MANC_RCV_TCO_ENE1000_MANC_RCV_TCO_EN 0x00020000 e1000_hw.h Receive TCO Packets Enabled
36214
 E1000_MANC_REPORT_STATUSE1000_MANC_REPORT_STATUS 0x00040000 e1000_hw.h Status Reporting Enabled
36215
 E1000_MANC_RCV_ALLE1000_MANC_RCV_ALL 0x00080000 e1000_hw.h Receive All Enabled
36216
 E1000_MANC_BLK_PHY_RST_ON_IDEE1000_MANC_BLK_PHY_RST_ON_IDE 0x00040000 e1000_hw.h Block phy resets
36217
 E1000_MANC_EN_MAC_ADDR_FILTERE1000_MANC_EN_MAC_ADDR_FILTER 0x00100000 e1000_hw.h Enable MAC address
36218
 E1000_MANC_EN_MNG2HOSTE1000_MANC_EN_MNG2HOST 0x00200000 e1000_hw.h Enable MNG packets to host
36219
 E1000_MANC_EN_IP_ADDR_FILTERE1000_MANC_EN_IP_ADDR_FILTER 0x00400000 e1000_hw.h Enable IP address
36220
 E1000_MANC_EN_XSUM_FILTERE1000_MANC_EN_XSUM_FILTER 0x00800000 e1000_hw.h Enable checksum filtering
36221
 E1000_MANC_BR_ENE1000_MANC_BR_EN 0x01000000 e1000_hw.h Enable broadcast filtering
36222
 E1000_MANC_SMB_REQE1000_MANC_SMB_REQ 0x01000000 e1000_hw.h SMBus Request
36223
 E1000_MANC_SMB_GNTE1000_MANC_SMB_GNT 0x02000000 e1000_hw.h SMBus Grant
36224
 E1000_MANC_SMB_CLK_INE1000_MANC_SMB_CLK_IN 0x04000000 e1000_hw.h SMBus Clock In
36225
 E1000_MANC_SMB_DATA_INE1000_MANC_SMB_DATA_IN 0x08000000 e1000_hw.h SMBus Data In
36226
 E1000_MANC_SMB_DATA_OUTE1000_MANC_SMB_DATA_OUT 0x10000000 e1000_hw.h SMBus Data Out
36227
 E1000_MANC_SMB_CLK_OUTE1000_MANC_SMB_CLK_OUT 0x20000000 e1000_hw.h SMBus Clock Out
36228
 E1000_MANC_SMB_DATA_OUT_SHIFTE1000_MANC_SMB_DATA_OUT_SHIFT 28 e1000_hw.h SMBus Data Out Shift
36229
 E1000_MANC_SMB_CLK_OUT_SHIFTE1000_MANC_SMB_CLK_OUT_SHIFT 29 e1000_hw.h SMBus Clock Out Shift
36230
 E1000_SWSM_SMBIE1000_SWSM_SMBI 0x00000001 e1000_hw.h Driver Semaphore bit
36231
 E1000_SWSM_SWESMBIE1000_SWSM_SWESMBI 0x00000002 e1000_hw.h FW Semaphore bit
36232
 E1000_SWSM_WMNGE1000_SWSM_WMNG 0x00000004 e1000_hw.h Wake MNG Clock
36233
 E1000_SWSM_DRV_LOADE1000_SWSM_DRV_LOAD 0x00000008 e1000_hw.h Driver Loaded Bit
36234
 E1000_FWSM_MODE_MASKE1000_FWSM_MODE_MASK 0x0000000E e1000_hw.h FW mode
36235
 E1000_FWSM_MODE_SHIFTE1000_FWSM_MODE_SHIFT 1 e1000_hw.h 　
36236
 E1000_FWSM_FW_VALIDE1000_FWSM_FW_VALID 0x00008000 e1000_hw.h FW established a valid mode
36237
 E1000_FWSM_RSPCIPHYE1000_FWSM_RSPCIPHY 0x00000040 e1000_hw.h Reset PHY on PCI reset
36238
 E1000_FWSM_DISSWE1000_FWSM_DISSW 0x10000000 e1000_hw.h FW disable SW Write Access
36239
 E1000_FWSM_SKUSEL_MASKE1000_FWSM_SKUSEL_MASK 0x60000000 e1000_hw.h LAN SKU select
36240
 E1000_FWSM_SKUEL_SHIFTE1000_FWSM_SKUEL_SHIFT 29 e1000_hw.h 　
36241
 E1000_FWSM_SKUSEL_EMBE1000_FWSM_SKUSEL_EMB 0x0 e1000_hw.h Embedded SKU
36242
 E1000_FWSM_SKUSEL_CONSE1000_FWSM_SKUSEL_CONS 0x1 e1000_hw.h Consumer SKU
36243
 E1000_FWSM_SKUSEL_PERF_100E1000_FWSM_SKUSEL_PERF_100 0x2 e1000_hw.h Perf & Corp 10/100 SKU
36244
 E1000_FWSM_SKUSEL_PERF_GBEE1000_FWSM_SKUSEL_PERF_GBE 0x3 e1000_hw.h Perf & Copr GbE SKU
36245
 E1000_FFLT_DBG_INVCE1000_FFLT_DBG_INVC 0x00100000 e1000_hw.h Invalid /C/ code handling
36246
 E1000_HICR_ENE1000_HICR_EN 0x00000001 e1000_hw.h Enable Bit - RO
36247
 E1000_HICR_CE1000_HICR_C 0x00000002 e1000_hw.h Driver sets this bit when done
36248
 E1000_HICR_SVE1000_HICR_SV 0x00000004 e1000_hw.h Status Validity
36249
 E1000_HICR_FWRE1000_HICR_FWR 0x00000080 e1000_hw.h FW reset. Set by the Host
36250
 E1000_HI_MAX_DATA_LENGTHE1000_HI_MAX_DATA_LENGTH 252 e1000_hw.h Host Interface data length
36251
 E1000_HI_MAX_BLOCK_BYTE_LENGTHE1000_HI_MAX_BLOCK_BYTE_LENGTH 1792 e1000_hw.h Number of bytes in range
36252
 E1000_HI_MAX_BLOCK_DWORD_LENGTHE1000_HI_MAX_BLOCK_DWORD_LENGTH 448 e1000_hw.h Number of dwords in range
36253
 E1000_HI_COMMAND_TIMEOUTE1000_HI_COMMAND_TIMEOUT 500 e1000_hw.h Time in ms to process HI command
36254
 E1000_HSMC0R_CLKINE1000_HSMC0R_CLKIN 0x00000001 e1000_hw.h SMB Clock in
36255
 E1000_HSMC0R_DATAINE1000_HSMC0R_DATAIN 0x00000002 e1000_hw.h SMB Data in
36256
 E1000_HSMC0R_DATAOUTE1000_HSMC0R_DATAOUT 0x00000004 e1000_hw.h SMB Data out
36257
 E1000_HSMC0R_CLKOUTE1000_HSMC0R_CLKOUT 0x00000008 e1000_hw.h SMB Clock out
36258
 E1000_HSMC1R_CLKINE1000_HSMC1R_CLKIN E1000_HSMC0R_CLKIN e1000_hw.h 　
36259
 E1000_HSMC1R_DATAINE1000_HSMC1R_DATAIN E1000_HSMC0R_DATAIN e1000_hw.h 　
36260
 E1000_HSMC1R_DATAOUTE1000_HSMC1R_DATAOUT E1000_HSMC0R_DATAOUT e1000_hw.h 　
36261
 E1000_HSMC1R_CLKOUTE1000_HSMC1R_CLKOUT E1000_HSMC0R_CLKOUT e1000_hw.h 　
36262
 E1000_FWSTS_FWS_MASKE1000_FWSTS_FWS_MASK 0x000000FF e1000_hw.h FW Status
36263
 E1000_WUPL_LENGTH_MASKE1000_WUPL_LENGTH_MASK 0x0FFF e1000_hw.h Only the lower 12 bits are valid
36264
 E1000_MDALIGNE1000_MDALIGN 4096 e1000_hw.h 　
36265
 E1000_GCR_RXD_NO_SNOOPE1000_GCR_RXD_NO_SNOOP 0x00000001 e1000_hw.h 　
36266
 E1000_GCR_RXDSCW_NO_SNOOPE1000_GCR_RXDSCW_NO_SNOOP 0x00000002 e1000_hw.h 　
36267
 E1000_GCR_RXDSCR_NO_SNOOPE1000_GCR_RXDSCR_NO_SNOOP 0x00000004 e1000_hw.h 　
36268
 E1000_GCR_TXD_NO_SNOOPE1000_GCR_TXD_NO_SNOOP 0x00000008 e1000_hw.h 　
36269
 E1000_GCR_TXDSCW_NO_SNOOPE1000_GCR_TXDSCW_NO_SNOOP 0x00000010 e1000_hw.h 　
36270
 E1000_GCR_TXDSCR_NO_SNOOPE1000_GCR_TXDSCR_NO_SNOOP 0x00000020 e1000_hw.h 　
36271
 PCI_EX_NO_SNOOP_ALLPCI_EX_NO_SNOOP_ALL (E1000_GCR_RXD_NO_SNOOP | \ E1000_GCR_RXDSCW_NO_SNOOP | \ E1000_GCR_RXDSCR_NO_SNOOP | \ E1000_GCR_TXD_NO_SNOO e1000_hw.h 　
36272
 PCI_EX_82566_SNOOP_ALLPCI_EX_82566_SNOOP_ALL PCI_EX_NO_SNOOP_ALL e1000_hw.h 　
36273
 E1000_GCR_L1_ACT_WITHOUT_L0S_RXE1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000 e1000_hw.h 　
36274
 E1000_FACTPS_FUNC0_POWER_STATE_E1000_FACTPS_FUNC0_POWER_STATE_ 0x00000003 e1000_hw.h 　
36275
 E1000_FACTPS_LAN0_VALIDE1000_FACTPS_LAN0_VALID 0x00000004 e1000_hw.h 　
36276
 E1000_FACTPS_FUNC0_AUX_ENE1000_FACTPS_FUNC0_AUX_EN 0x00000008 e1000_hw.h 　
36277
 E1000_FACTPS_FUNC1_POWER_STATE_E1000_FACTPS_FUNC1_POWER_STATE_ 0x000000C0 e1000_hw.h 　
36278
 E1000_FACTPS_FUNC1_POWER_STATE_E1000_FACTPS_FUNC1_POWER_STATE_ 6 e1000_hw.h 　
36279
 E1000_FACTPS_LAN1_VALIDE1000_FACTPS_LAN1_VALID 0x00000100 e1000_hw.h 　
36280
 E1000_FACTPS_FUNC1_AUX_ENE1000_FACTPS_FUNC1_AUX_EN 0x00000200 e1000_hw.h 　
36281
 E1000_FACTPS_FUNC2_POWER_STATE_E1000_FACTPS_FUNC2_POWER_STATE_ 0x00003000 e1000_hw.h 　
36282
 E1000_FACTPS_FUNC2_POWER_STATE_E1000_FACTPS_FUNC2_POWER_STATE_ 12 e1000_hw.h 　
36283
 E1000_FACTPS_IDE_ENABLEE1000_FACTPS_IDE_ENABLE 0x00004000 e1000_hw.h 　
36284
 E1000_FACTPS_FUNC2_AUX_ENE1000_FACTPS_FUNC2_AUX_EN 0x00008000 e1000_hw.h 　
36285
 E1000_FACTPS_FUNC3_POWER_STATE_E1000_FACTPS_FUNC3_POWER_STATE_ 0x000C0000 e1000_hw.h 　
36286
 E1000_FACTPS_FUNC3_POWER_STATE_E1000_FACTPS_FUNC3_POWER_STATE_ 18 e1000_hw.h 　
36287
 E1000_FACTPS_SP_ENABLEE1000_FACTPS_SP_ENABLE 0x00100000 e1000_hw.h 　
36288
 E1000_FACTPS_FUNC3_AUX_ENE1000_FACTPS_FUNC3_AUX_EN 0x00200000 e1000_hw.h 　
36289
 E1000_FACTPS_FUNC4_POWER_STATE_E1000_FACTPS_FUNC4_POWER_STATE_ 0x03000000 e1000_hw.h 　
36290
 E1000_FACTPS_FUNC4_POWER_STATE_E1000_FACTPS_FUNC4_POWER_STATE_ 24 e1000_hw.h 　
36291
 E1000_FACTPS_IPMI_ENABLEE1000_FACTPS_IPMI_ENABLE 0x04000000 e1000_hw.h 　
36292
 E1000_FACTPS_FUNC4_AUX_ENE1000_FACTPS_FUNC4_AUX_EN 0x08000000 e1000_hw.h 　
36293
 E1000_FACTPS_MNGCGE1000_FACTPS_MNGCG 0x20000000 e1000_hw.h 　
36294
 E1000_FACTPS_LAN_FUNC_SELE1000_FACTPS_LAN_FUNC_SEL 0x40000000 e1000_hw.h 　
36295
 E1000_FACTPS_PM_STATE_CHANGEDE1000_FACTPS_PM_STATE_CHANGED 0x80000000 e1000_hw.h 　
36296
 PCI_EX_LINK_STATUSPCI_EX_LINK_STATUS 0x12 e1000_hw.h 　
36297
 PCI_EX_LINK_WIDTH_MASKPCI_EX_LINK_WIDTH_MASK 0x3F0 e1000_hw.h 　
36298
 PCI_EX_LINK_WIDTH_SHIFTPCI_EX_LINK_WIDTH_SHIFT 4 e1000_hw.h 　
36299
 EEPROM_READ_OPCODE_MICROWIREEEPROM_READ_OPCODE_MICROWIRE 0x6 e1000_hw.h EEPROM read opcode
36300
 EEPROM_WRITE_OPCODE_MICROWIREEEPROM_WRITE_OPCODE_MICROWIRE 0x5 e1000_hw.h EEPROM write opcode
36301
 EEPROM_ERASE_OPCODE_MICROWIREEEPROM_ERASE_OPCODE_MICROWIRE 0x7 e1000_hw.h EEPROM erase opcode
36302
 EEPROM_EWEN_OPCODE_MICROWIREEEPROM_EWEN_OPCODE_MICROWIRE 0x13 e1000_hw.h EEPROM erase/write enable
36303
 EEPROM_EWDS_OPCODE_MICROWIREEEPROM_EWDS_OPCODE_MICROWIRE 0x10 e1000_hw.h EEPROM erast/write disable
36304
 EEPROM_MAX_RETRY_SPIEEPROM_MAX_RETRY_SPI 5000 e1000_hw.h Max wait of 5ms, for RDY signal
36305
 EEPROM_READ_OPCODE_SPIEEPROM_READ_OPCODE_SPI 0x03 e1000_hw.h EEPROM read opcode
36306
 EEPROM_WRITE_OPCODE_SPIEEPROM_WRITE_OPCODE_SPI 0x02 e1000_hw.h EEPROM write opcode
36307
 EEPROM_A8_OPCODE_SPIEEPROM_A8_OPCODE_SPI 0x08 e1000_hw.h opcode bit-3 = address bit-8
36308
 EEPROM_WREN_OPCODE_SPIEEPROM_WREN_OPCODE_SPI 0x06 e1000_hw.h EEPROM set Write Enable latch
36309
 EEPROM_WRDI_OPCODE_SPIEEPROM_WRDI_OPCODE_SPI 0x04 e1000_hw.h EEPROM reset Write Enable latch
36310
 EEPROM_RDSR_OPCODE_SPIEEPROM_RDSR_OPCODE_SPI 0x05 e1000_hw.h EEPROM read Status register
36311
 EEPROM_WRSR_OPCODE_SPIEEPROM_WRSR_OPCODE_SPI 0x01 e1000_hw.h EEPROM write Status register
36312
 EEPROM_ERASE4K_OPCODE_SPIEEPROM_ERASE4K_OPCODE_SPI 0x20 e1000_hw.h EEPROM ERASE 4KB
36313
 EEPROM_ERASE64K_OPCODE_SPIEEPROM_ERASE64K_OPCODE_SPI 0xD8 e1000_hw.h EEPROM ERASE 64KB
36314
 EEPROM_ERASE256_OPCODE_SPIEEPROM_ERASE256_OPCODE_SPI 0xDB e1000_hw.h EEPROM ERASE 256B
36315
 EEPROM_WORD_SIZE_SHIFTEEPROM_WORD_SIZE_SHIFT 6 e1000_hw.h 　
36316
 EEPROM_SIZE_SHIFTEEPROM_SIZE_SHIFT 10 e1000_hw.h 　
36317
 EEPROM_SIZE_MASKEEPROM_SIZE_MASK 0x1C00 e1000_hw.h 　
36318
 EEPROM_COMPATEEPROM_COMPAT 0x0003 e1000_hw.h 　
36319
 EEPROM_ID_LED_SETTINGSEEPROM_ID_LED_SETTINGS 0x0004 e1000_hw.h 　
36320
 EEPROM_VERSIONEEPROM_VERSION 0x0005 e1000_hw.h 　
36321
 EEPROM_SERDES_AMPLITUDEEEPROM_SERDES_AMPLITUDE 0x0006 e1000_hw.h For SERDES output amplitude adjustment.
36322
 EEPROM_PHY_CLASS_WORDEEPROM_PHY_CLASS_WORD 0x0007 e1000_hw.h 　
36323
 EEPROM_INIT_CONTROL1_REGEEPROM_INIT_CONTROL1_REG 0x000A e1000_hw.h 　
36324
 EEPROM_INIT_CONTROL2_REGEEPROM_INIT_CONTROL2_REG 0x000F e1000_hw.h 　
36325
 EEPROM_SWDEF_PINS_CTRL_PORT_1EEPROM_SWDEF_PINS_CTRL_PORT_1 0x0010 e1000_hw.h 　
36326
 EEPROM_INIT_CONTROL3_PORT_BEEPROM_INIT_CONTROL3_PORT_B 0x0014 e1000_hw.h 　
36327
 EEPROM_INIT_3GIO_3EEPROM_INIT_3GIO_3 0x001A e1000_hw.h 　
36328
 EEPROM_SWDEF_PINS_CTRL_PORT_0EEPROM_SWDEF_PINS_CTRL_PORT_0 0x0020 e1000_hw.h 　
36329
 EEPROM_INIT_CONTROL3_PORT_AEEPROM_INIT_CONTROL3_PORT_A 0x0024 e1000_hw.h 　
36330
 EEPROM_CFGEEPROM_CFG 0x0012 e1000_hw.h 　
36331
 EEPROM_FLASH_VERSIONEEPROM_FLASH_VERSION 0x0032 e1000_hw.h 　
36332
 EEPROM_ALT_MAC_ADDR_PTREEPROM_ALT_MAC_ADDR_PTR 0x0037 e1000_hw.h 　
36333
 EEPROM_CHECKSUM_REGEEPROM_CHECKSUM_REG 0x003F e1000_hw.h 　
36334
 E1000_EEPROM_CFG_DONEE1000_EEPROM_CFG_DONE 0x00040000 e1000_hw.h MNG config cycle done
36335
 E1000_EEPROM_CFG_DONE_PORT_1E1000_EEPROM_CFG_DONE_PORT_1 0x00080000 e1000_hw.h ...for second port
36336
 ID_LED_RESERVED_0000ID_LED_RESERVED_0000 0x0000 e1000_hw.h 　
36337
 ID_LED_RESERVED_FFFFID_LED_RESERVED_FFFF 0xFFFF e1000_hw.h 　
36338
 ID_LED_RESERVED_82573ID_LED_RESERVED_82573 0xF746 e1000_hw.h 　
36339
 ID_LED_DEFAULT_82573ID_LED_DEFAULT_82573 0x1811 e1000_hw.h 　
36340
 ID_LED_DEFAULTID_LED_DEFAULT ((ID_LED_OFF1_ON2 << 12) | \ (ID_LED_OFF1_OFF2 << 8) | \ (ID_LED_DEF1_DEF2 << 4) | \ (ID_LED_DEF1_DEF2)) e1000_hw.h 　
36341
 ID_LED_DEFAULT_ICH8LANID_LED_DEFAULT_ICH8LAN ((ID_LED_DEF1_DEF2 << 12) | \ (ID_LED_DEF1_OFF2 << 8) | \ (ID_LED_DEF1_ON2 << 4) | \ (ID_LED_DEF1_DEF2)) e1000_hw.h 　
36342
 ID_LED_DEF1_DEF2ID_LED_DEF1_DEF2 0x1 e1000_hw.h 　
36343
 ID_LED_DEF1_ON2ID_LED_DEF1_ON2 0x2 e1000_hw.h 　
36344
 ID_LED_DEF1_OFF2ID_LED_DEF1_OFF2 0x3 e1000_hw.h 　
36345
 ID_LED_ON1_DEF2ID_LED_ON1_DEF2 0x4 e1000_hw.h 　
36346
 ID_LED_ON1_ON2ID_LED_ON1_ON2 0x5 e1000_hw.h 　
36347
 ID_LED_ON1_OFF2ID_LED_ON1_OFF2 0x6 e1000_hw.h 　
36348
 ID_LED_OFF1_DEF2ID_LED_OFF1_DEF2 0x7 e1000_hw.h 　
36349
 ID_LED_OFF1_ON2ID_LED_OFF1_ON2 0x8 e1000_hw.h 　
36350
 ID_LED_OFF1_OFF2ID_LED_OFF1_OFF2 0x9 e1000_hw.h 　
36351
 IGP_ACTIVITY_LED_MASKIGP_ACTIVITY_LED_MASK 0xFFFFF0FF e1000_hw.h 　
36352
 IGP_ACTIVITY_LED_ENABLEIGP_ACTIVITY_LED_ENABLE 0x0300 e1000_hw.h 　
36353
 IGP_LED3_MODEIGP_LED3_MODE 0x07000000 e1000_hw.h 　
36354
 EEPROM_SERDES_AMPLITUDE_MASKEEPROM_SERDES_AMPLITUDE_MASK 0x000F e1000_hw.h 　
36355
 EEPROM_PHY_CLASS_AEEPROM_PHY_CLASS_A 0x8000 e1000_hw.h 　
36356
 EEPROM_WORD0A_ILOSEEPROM_WORD0A_ILOS 0x0010 e1000_hw.h 　
36357
 EEPROM_WORD0A_SWDPIOEEPROM_WORD0A_SWDPIO 0x01E0 e1000_hw.h 　
36358
 EEPROM_WORD0A_LRSTEEPROM_WORD0A_LRST 0x0200 e1000_hw.h 　
36359
 EEPROM_WORD0A_FDEEPROM_WORD0A_FD 0x0400 e1000_hw.h 　
36360
 EEPROM_WORD0A_66MHZEEPROM_WORD0A_66MHZ 0x0800 e1000_hw.h 　
36361
 EEPROM_WORD0F_PAUSE_MASKEEPROM_WORD0F_PAUSE_MASK 0x3000 e1000_hw.h 　
36362
 EEPROM_WORD0F_PAUSEEEPROM_WORD0F_PAUSE 0x1000 e1000_hw.h 　
36363
 EEPROM_WORD0F_ASM_DIREEPROM_WORD0F_ASM_DIR 0x2000 e1000_hw.h 　
36364
 EEPROM_WORD0F_ANEEEPROM_WORD0F_ANE 0x0800 e1000_hw.h 　
36365
 EEPROM_WORD0F_SWPDIO_EXTEEPROM_WORD0F_SWPDIO_EXT 0x00F0 e1000_hw.h 　
36366
 EEPROM_WORD0F_LPLUEEPROM_WORD0F_LPLU 0x0001 e1000_hw.h 　
36367
 EEPROM_WORD1020_GIGA_DISABLEEEPROM_WORD1020_GIGA_DISABLE 0x0010 e1000_hw.h 　
36368
 EEPROM_WORD1020_GIGA_DISABLE_NOEEPROM_WORD1020_GIGA_DISABLE_NO 0x0008 e1000_hw.h 　
36369
 EEPROM_WORD1A_ASPM_MASKEEPROM_WORD1A_ASPM_MASK 0x000C e1000_hw.h 　
36370
 EEPROM_SUMEEPROM_SUM 0xBABA e1000_hw.h 　
36371
 EEPROM_NODE_ADDRESS_BYTE_0EEPROM_NODE_ADDRESS_BYTE_0 0 e1000_hw.h 　
36372
 EEPROM_PBA_BYTE_1EEPROM_PBA_BYTE_1 8 e1000_hw.h 　
36373
 EEPROM_RESERVED_WORDEEPROM_RESERVED_WORD 0xFFFF e1000_hw.h 　
36374
 PBA_SIZEPBA_SIZE 4 e1000_hw.h 　
36375
 E1000_COLLISION_THRESHOLDE1000_COLLISION_THRESHOLD 15 e1000_hw.h 　
36376
 E1000_CT_SHIFTE1000_CT_SHIFT 4 e1000_hw.h 　
36377
 E1000_COLLISION_DISTANCEE1000_COLLISION_DISTANCE 63 e1000_hw.h 　
36378
 E1000_COLLISION_DISTANCE_82542E1000_COLLISION_DISTANCE_82542 64 e1000_hw.h 　
36379
 E1000_FDX_COLLISION_DISTANCEE1000_FDX_COLLISION_DISTANCE E1000_COLLISION_DISTANCE e1000_hw.h 　
36380
 E1000_HDX_COLLISION_DISTANCEE1000_HDX_COLLISION_DISTANCE E1000_COLLISION_DISTANCE e1000_hw.h 　
36381
 E1000_COLD_SHIFTE1000_COLD_SHIFT 12 e1000_hw.h 　
36382
 REQ_TX_DESCRIPTOR_MULTIPLEREQ_TX_DESCRIPTOR_MULTIPLE 8 e1000_hw.h 　
36383
 REQ_RX_DESCRIPTOR_MULTIPLEREQ_RX_DESCRIPTOR_MULTIPLE 8 e1000_hw.h 　
36384
 DEFAULT_82542_TIPG_IPGTDEFAULT_82542_TIPG_IPGT 10 e1000_hw.h 　
36385
 DEFAULT_82543_TIPG_IPGT_FIBERDEFAULT_82543_TIPG_IPGT_FIBER 9 e1000_hw.h 　
36386
 DEFAULT_82543_TIPG_IPGT_COPPERDEFAULT_82543_TIPG_IPGT_COPPER 8 e1000_hw.h 　
36387
 E1000_TIPG_IPGT_MASKE1000_TIPG_IPGT_MASK 0x000003FF e1000_hw.h 　
36388
 E1000_TIPG_IPGR1_MASKE1000_TIPG_IPGR1_MASK 0x000FFC00 e1000_hw.h 　
36389
 E1000_TIPG_IPGR2_MASKE1000_TIPG_IPGR2_MASK 0x3FF00000 e1000_hw.h 　
36390
 DEFAULT_82542_TIPG_IPGR1DEFAULT_82542_TIPG_IPGR1 2 e1000_hw.h 　
36391
 DEFAULT_82543_TIPG_IPGR1DEFAULT_82543_TIPG_IPGR1 8 e1000_hw.h 　
36392
 E1000_TIPG_IPGR1_SHIFTE1000_TIPG_IPGR1_SHIFT 10 e1000_hw.h 　
36393
 DEFAULT_82542_TIPG_IPGR2DEFAULT_82542_TIPG_IPGR2 10 e1000_hw.h 　
36394
 DEFAULT_82543_TIPG_IPGR2DEFAULT_82543_TIPG_IPGR2 6 e1000_hw.h 　
36395
 DEFAULT_80003ES2LAN_TIPG_IPGR2DEFAULT_80003ES2LAN_TIPG_IPGR2 7 e1000_hw.h 　
36396
 E1000_TIPG_IPGR2_SHIFTE1000_TIPG_IPGR2_SHIFT 20 e1000_hw.h 　
36397
 DEFAULT_80003ES2LAN_TIPG_IPGT_1DEFAULT_80003ES2LAN_TIPG_IPGT_1 0x00000009 e1000_hw.h 　
36398
 DEFAULT_80003ES2LAN_TIPG_IPGT_1DEFAULT_80003ES2LAN_TIPG_IPGT_1 0x00000008 e1000_hw.h 　
36399
 E1000_TXDMAC_DPPE1000_TXDMAC_DPP 0x00000001 e1000_hw.h 　
36400
 TX_THRESHOLD_STARTTX_THRESHOLD_START 8 e1000_hw.h 　
36401
 TX_THRESHOLD_INCREMENTTX_THRESHOLD_INCREMENT 10 e1000_hw.h 　
36402
 TX_THRESHOLD_DECREMENTTX_THRESHOLD_DECREMENT 1 e1000_hw.h 　
36403
 TX_THRESHOLD_STOPTX_THRESHOLD_STOP 190 e1000_hw.h 　
36404
 TX_THRESHOLD_DISABLETX_THRESHOLD_DISABLE 0 e1000_hw.h 　
36405
 TX_THRESHOLD_TIMER_MSTX_THRESHOLD_TIMER_MS 10000 e1000_hw.h 　
36406
 MIN_NUM_XMITSMIN_NUM_XMITS 1000 e1000_hw.h 　
36407
 IFS_MAXIFS_MAX 80 e1000_hw.h 　
36408
 IFS_STEPIFS_STEP 10 e1000_hw.h 　
36409
 IFS_MINIFS_MIN 40 e1000_hw.h 　
36410
 IFS_RATIOIFS_RATIO 4 e1000_hw.h 　
36411
 E1000_EXTCNF_CTRL_PCIE_WRITE_ENE1000_EXTCNF_CTRL_PCIE_WRITE_EN 0x00000001 e1000_hw.h 　
36412
 E1000_EXTCNF_CTRL_PHY_WRITE_ENAE1000_EXTCNF_CTRL_PHY_WRITE_ENA 0x00000002 e1000_hw.h 　
36413
 E1000_EXTCNF_CTRL_D_UD_ENABLEE1000_EXTCNF_CTRL_D_UD_ENABLE 0x00000004 e1000_hw.h 　
36414
 E1000_EXTCNF_CTRL_D_UD_LATENCYE1000_EXTCNF_CTRL_D_UD_LATENCY 0x00000008 e1000_hw.h 　
36415
 E1000_EXTCNF_CTRL_D_UD_OWNERE1000_EXTCNF_CTRL_D_UD_OWNER 0x00000010 e1000_hw.h 　
36416
 E1000_EXTCNF_CTRL_MDIO_SW_OWNERE1000_EXTCNF_CTRL_MDIO_SW_OWNER 0x00000020 e1000_hw.h 　
36417
 E1000_EXTCNF_CTRL_MDIO_HW_OWNERE1000_EXTCNF_CTRL_MDIO_HW_OWNER 0x00000040 e1000_hw.h 　
36418
 E1000_EXTCNF_CTRL_EXT_CNF_POINTE1000_EXTCNF_CTRL_EXT_CNF_POINT 0x0FFF0000 e1000_hw.h 　
36419
 E1000_EXTCNF_SIZE_EXT_PHY_LENGTE1000_EXTCNF_SIZE_EXT_PHY_LENGT 0x000000FF e1000_hw.h 　
36420
 E1000_EXTCNF_SIZE_EXT_DOCK_LENGE1000_EXTCNF_SIZE_EXT_DOCK_LENG 0x0000FF00 e1000_hw.h 　
36421
 E1000_EXTCNF_SIZE_EXT_PCIE_LENGE1000_EXTCNF_SIZE_EXT_PCIE_LENG 0x00FF0000 e1000_hw.h 　
36422
 E1000_EXTCNF_CTRL_LCD_WRITE_ENAE1000_EXTCNF_CTRL_LCD_WRITE_ENA 0x00000001 e1000_hw.h 　
36423
 E1000_EXTCNF_CTRL_SWFLAGE1000_EXTCNF_CTRL_SWFLAG 0x00000020 e1000_hw.h 　
36424
 E1000_PBA_8KE1000_PBA_8K 0x0008 e1000_hw.h 8KB, default Rx allocation
36425
 E1000_PBA_12KE1000_PBA_12K 0x000C e1000_hw.h 12KB, default Rx allocation
36426
 E1000_PBA_16KE1000_PBA_16K 0x0010 e1000_hw.h 16KB, default TX allocation
36427
 E1000_PBA_20KE1000_PBA_20K 0x0014 e1000_hw.h 　
36428
 E1000_PBA_22KE1000_PBA_22K 0x0016 e1000_hw.h 　
36429
 E1000_PBA_24KE1000_PBA_24K 0x0018 e1000_hw.h 　
36430
 E1000_PBA_30KE1000_PBA_30K 0x001E e1000_hw.h 　
36431
 E1000_PBA_32KE1000_PBA_32K 0x0020 e1000_hw.h 　
36432
 E1000_PBA_34KE1000_PBA_34K 0x0022 e1000_hw.h 　
36433
 E1000_PBA_38KE1000_PBA_38K 0x0026 e1000_hw.h 　
36434
 E1000_PBA_40KE1000_PBA_40K 0x0028 e1000_hw.h 　
36435
 E1000_PBA_48KE1000_PBA_48K 0x0030 e1000_hw.h 48KB, default RX allocation
36436
 E1000_PBA_64KE1000_PBA_64K 0x0040 e1000_hw.h 64KB
36437
 E1000_PBS_16KE1000_PBS_16K E1000_PBA_16K e1000_hw.h 　
36438
 FLOW_CONTROL_ADDRESS_LOWFLOW_CONTROL_ADDRESS_LOW 0x00C28001 e1000_hw.h 　
36439
 FLOW_CONTROL_ADDRESS_HIGHFLOW_CONTROL_ADDRESS_HIGH 0x00000100 e1000_hw.h 　
36440
 FLOW_CONTROL_TYPEFLOW_CONTROL_TYPE 0x8808 e1000_hw.h 　
36441
 FC_DEFAULT_HI_THRESHFC_DEFAULT_HI_THRESH (0x8000) e1000_hw.h 32KB
36442
 FC_DEFAULT_LO_THRESHFC_DEFAULT_LO_THRESH (0x4000) e1000_hw.h 16KB
36443
 FC_DEFAULT_TX_TIMERFC_DEFAULT_TX_TIMER (0x100) e1000_hw.h ~130 us
36444
 PCIX_COMMAND_REGISTERPCIX_COMMAND_REGISTER 0xE6 e1000_hw.h 　
36445
 PCIX_STATUS_REGISTER_LOPCIX_STATUS_REGISTER_LO 0xE8 e1000_hw.h 　
36446
 PCIX_STATUS_REGISTER_HIPCIX_STATUS_REGISTER_HI 0xEA e1000_hw.h 　
36447
 PCIX_COMMAND_MMRBC_MASKPCIX_COMMAND_MMRBC_MASK 0x000C e1000_hw.h 　
36448
 PCIX_COMMAND_MMRBC_SHIFTPCIX_COMMAND_MMRBC_SHIFT 0x2 e1000_hw.h 　
36449
 PCIX_STATUS_HI_MMRBC_MASKPCIX_STATUS_HI_MMRBC_MASK 0x0060 e1000_hw.h 　
36450
 PCIX_STATUS_HI_MMRBC_SHIFTPCIX_STATUS_HI_MMRBC_SHIFT 0x5 e1000_hw.h 　
36451
 PCIX_STATUS_HI_MMRBC_4KPCIX_STATUS_HI_MMRBC_4K 0x3 e1000_hw.h 　
36452
 PCIX_STATUS_HI_MMRBC_2KPCIX_STATUS_HI_MMRBC_2K 0x2 e1000_hw.h 　
36453
 PAUSE_SHIFTPAUSE_SHIFT 5 e1000_hw.h 　
36454
 SWDPIO_SHIFTSWDPIO_SHIFT 17 e1000_hw.h 　
36455
 SWDPIO__EXT_SHIFTSWDPIO__EXT_SHIFT 4 e1000_hw.h 　
36456
 ILOS_SHIFTILOS_SHIFT 3 e1000_hw.h 　
36457
 RECEIVE_BUFFER_ALIGN_SIZERECEIVE_BUFFER_ALIGN_SIZE (256) e1000_hw.h 　
36458
 LINK_UP_TIMEOUTLINK_UP_TIMEOUT 500 e1000_hw.h 　
36459
 MASTER_DISABLE_TIMEOUTMASTER_DISABLE_TIMEOUT 800 e1000_hw.h 　
36460
 AUTO_READ_DONE_TIMEOUTAUTO_READ_DONE_TIMEOUT 10 e1000_hw.h 　
36461
 PHY_CFG_TIMEOUTPHY_CFG_TIMEOUT 100 e1000_hw.h 　
36462
 E1000_TX_BUFFER_SIZEE1000_TX_BUFFER_SIZE ((uint32_t)1514) e1000_hw.h 　
36463
 CARRIER_EXTENSIONCARRIER_EXTENSION 0x0F e1000_hw.h 　
36464
 E1000_CTRL_PHY_RESET_DIRE1000_CTRL_PHY_RESET_DIR E1000_CTRL_SWDPIO0 e1000_hw.h 　
36465
 E1000_CTRL_PHY_RESETE1000_CTRL_PHY_RESET E1000_CTRL_SWDPIN0 e1000_hw.h 　
36466
 E1000_CTRL_MDIO_DIRE1000_CTRL_MDIO_DIR E1000_CTRL_SWDPIO2 e1000_hw.h 　
36467
 E1000_CTRL_MDIOE1000_CTRL_MDIO E1000_CTRL_SWDPIN2 e1000_hw.h 　
36468
 E1000_CTRL_MDC_DIRE1000_CTRL_MDC_DIR E1000_CTRL_SWDPIO3 e1000_hw.h 　
36469
 E1000_CTRL_MDCE1000_CTRL_MDC E1000_CTRL_SWDPIN3 e1000_hw.h 　
36470
 E1000_CTRL_PHY_RESET_DIR4E1000_CTRL_PHY_RESET_DIR4 E1000_CTRL_EXT_SDP4_DIR e1000_hw.h 　
36471
 E1000_CTRL_PHY_RESET4E1000_CTRL_PHY_RESET4 E1000_CTRL_EXT_SDP4_DATA e1000_hw.h 　
36472
 PHY_CTRLPHY_CTRL 0x00 e1000_hw.h Control Register
36473
 PHY_STATUSPHY_STATUS 0x01 e1000_hw.h Status Regiser
36474
 PHY_ID1PHY_ID1 0x02 e1000_hw.h Phy Id Reg (word 1)
36475
 PHY_ID2PHY_ID2 0x03 e1000_hw.h Phy Id Reg (word 2)
36476
 PHY_AUTONEG_ADVPHY_AUTONEG_ADV 0x04 e1000_hw.h Autoneg Advertisement
36477
 PHY_LP_ABILITYPHY_LP_ABILITY 0x05 e1000_hw.h Link Partner Ability (Base Page)
36478
 PHY_AUTONEG_EXPPHY_AUTONEG_EXP 0x06 e1000_hw.h Autoneg Expansion Reg
36479
 PHY_NEXT_PAGE_TXPHY_NEXT_PAGE_TX 0x07 e1000_hw.h Next Page TX
36480
 PHY_LP_NEXT_PAGEPHY_LP_NEXT_PAGE 0x08 e1000_hw.h Link Partner Next Page
36481
 PHY_1000T_CTRLPHY_1000T_CTRL 0x09 e1000_hw.h 1000Base-T Control Reg
36482
 PHY_1000T_STATUSPHY_1000T_STATUS 0x0A e1000_hw.h 1000Base-T Status Reg
36483
 PHY_EXT_STATUSPHY_EXT_STATUS 0x0F e1000_hw.h Extended Status Reg
36484
 MAX_PHY_REG_ADDRESSMAX_PHY_REG_ADDRESS 0x1F e1000_hw.h 5 bit address bus (0-0x1F)
36485
 MAX_PHY_MULTI_PAGE_REGMAX_PHY_MULTI_PAGE_REG 0xF e1000_hw.h Registers equal on all pages
36486
 M88E1000_PHY_SPEC_CTRLM88E1000_PHY_SPEC_CTRL 0x10 e1000_hw.h PHY Specific Control Register
36487
 M88E1000_PHY_SPEC_STATUSM88E1000_PHY_SPEC_STATUS 0x11 e1000_hw.h PHY Specific Status Register
36488
 M88E1000_INT_ENABLEM88E1000_INT_ENABLE 0x12 e1000_hw.h Interrupt Enable Register
36489
 M88E1000_INT_STATUSM88E1000_INT_STATUS 0x13 e1000_hw.h Interrupt Status Register
36490
 M88E1000_EXT_PHY_SPEC_CTRLM88E1000_EXT_PHY_SPEC_CTRL 0x14 e1000_hw.h Extended PHY Specific Control
36491
 M88E1000_RX_ERR_CNTRM88E1000_RX_ERR_CNTR 0x15 e1000_hw.h Receive Error Counter
36492
 M88E1000_PHY_EXT_CTRLM88E1000_PHY_EXT_CTRL 0x1A e1000_hw.h PHY extend control register
36493
 M88E1000_PHY_PAGE_SELECTM88E1000_PHY_PAGE_SELECT 0x1D e1000_hw.h Reg 29 for page number setting
36494
 M88E1000_PHY_GEN_CONTROLM88E1000_PHY_GEN_CONTROL 0x1E e1000_hw.h Its meaning depends on reg 29
36495
 M88E1000_PHY_VCO_REG_BIT8M88E1000_PHY_VCO_REG_BIT8 0x100 e1000_hw.h Bits 8 & 11 are adjusted for
36496
 M88E1000_PHY_VCO_REG_BIT11M88E1000_PHY_VCO_REG_BIT11 0x800 e1000_hw.h improved BER performance
36497
 IGP01E1000_IEEE_REGS_PAGEIGP01E1000_IEEE_REGS_PAGE 0x0000 e1000_hw.h 　
36498
 IGP01E1000_IEEE_RESTART_AUTONEGIGP01E1000_IEEE_RESTART_AUTONEG 0x3300 e1000_hw.h 　
36499
 IGP01E1000_IEEE_FORCE_GIGAIGP01E1000_IEEE_FORCE_GIGA 0x0140 e1000_hw.h 　
36500
 IGP01E1000_PHY_PORT_CONFIGIGP01E1000_PHY_PORT_CONFIG 0x10 e1000_hw.h PHY Specific Port Config Register
36501
 IGP01E1000_PHY_PORT_STATUSIGP01E1000_PHY_PORT_STATUS 0x11 e1000_hw.h PHY Specific Status Register
36502
 IGP01E1000_PHY_PORT_CTRLIGP01E1000_PHY_PORT_CTRL 0x12 e1000_hw.h PHY Specific Control Register
36503
 IGP01E1000_PHY_LINK_HEALTHIGP01E1000_PHY_LINK_HEALTH 0x13 e1000_hw.h PHY Link Health Register
36504
 IGP01E1000_GMII_FIFOIGP01E1000_GMII_FIFO 0x14 e1000_hw.h GMII FIFO Register
36505
 IGP01E1000_PHY_CHANNEL_QUALITYIGP01E1000_PHY_CHANNEL_QUALITY 0x15 e1000_hw.h PHY Channel Quality Register
36506
 IGP02E1000_PHY_POWER_MGMTIGP02E1000_PHY_POWER_MGMT 0x19 e1000_hw.h 　
36507
 IGP01E1000_PHY_PAGE_SELECTIGP01E1000_PHY_PAGE_SELECT 0x1F e1000_hw.h PHY Page Select Core Register
36508
 IGP01E1000_PHY_AGC_AIGP01E1000_PHY_AGC_A 0x1172 e1000_hw.h 　
36509
 IGP01E1000_PHY_AGC_BIGP01E1000_PHY_AGC_B 0x1272 e1000_hw.h 　
36510
 IGP01E1000_PHY_AGC_CIGP01E1000_PHY_AGC_C 0x1472 e1000_hw.h 　
36511
 IGP01E1000_PHY_AGC_DIGP01E1000_PHY_AGC_D 0x1872 e1000_hw.h 　
36512
 IGP02E1000_PHY_AGC_AIGP02E1000_PHY_AGC_A 0x11B1 e1000_hw.h 　
36513
 IGP02E1000_PHY_AGC_BIGP02E1000_PHY_AGC_B 0x12B1 e1000_hw.h 　
36514
 IGP02E1000_PHY_AGC_CIGP02E1000_PHY_AGC_C 0x14B1 e1000_hw.h 　
36515
 IGP02E1000_PHY_AGC_DIGP02E1000_PHY_AGC_D 0x18B1 e1000_hw.h 　
36516
 IGP01E1000_PHY_DSP_RESETIGP01E1000_PHY_DSP_RESET 0x1F33 e1000_hw.h 　
36517
 IGP01E1000_PHY_DSP_SETIGP01E1000_PHY_DSP_SET 0x1F71 e1000_hw.h 　
36518
 IGP01E1000_PHY_DSP_FFEIGP01E1000_PHY_DSP_FFE 0x1F35 e1000_hw.h 　
36519
 IGP01E1000_PHY_CHANNEL_NUMIGP01E1000_PHY_CHANNEL_NUM 4 e1000_hw.h 　
36520
 IGP02E1000_PHY_CHANNEL_NUMIGP02E1000_PHY_CHANNEL_NUM 4 e1000_hw.h 　
36521
 IGP01E1000_PHY_AGC_PARAM_AIGP01E1000_PHY_AGC_PARAM_A 0x1171 e1000_hw.h 　
36522
 IGP01E1000_PHY_AGC_PARAM_BIGP01E1000_PHY_AGC_PARAM_B 0x1271 e1000_hw.h 　
36523
 IGP01E1000_PHY_AGC_PARAM_CIGP01E1000_PHY_AGC_PARAM_C 0x1471 e1000_hw.h 　
36524
 IGP01E1000_PHY_AGC_PARAM_DIGP01E1000_PHY_AGC_PARAM_D 0x1871 e1000_hw.h 　
36525
 IGP01E1000_PHY_EDAC_MU_INDEXIGP01E1000_PHY_EDAC_MU_INDEX 0xC000 e1000_hw.h 　
36526
 IGP01E1000_PHY_EDAC_SIGN_EXT_9_IGP01E1000_PHY_EDAC_SIGN_EXT_9_ 0x8000 e1000_hw.h 　
36527
 IGP01E1000_PHY_ANALOG_TX_STATEIGP01E1000_PHY_ANALOG_TX_STATE 0x2890 e1000_hw.h 　
36528
 IGP01E1000_PHY_ANALOG_CLASS_AIGP01E1000_PHY_ANALOG_CLASS_A 0x2000 e1000_hw.h 　
36529
 IGP01E1000_PHY_FORCE_ANALOG_ENAIGP01E1000_PHY_FORCE_ANALOG_ENA 0x0004 e1000_hw.h 　
36530
 IGP01E1000_PHY_DSP_FFE_CM_CPIGP01E1000_PHY_DSP_FFE_CM_CP 0x0069 e1000_hw.h 　
36531
 IGP01E1000_PHY_DSP_FFE_DEFAULTIGP01E1000_PHY_DSP_FFE_DEFAULT 0x002A e1000_hw.h 　
36532
 IGP01E1000_PHY_PCS_INIT_REGIGP01E1000_PHY_PCS_INIT_REG 0x00B4 e1000_hw.h 　
36533
 IGP01E1000_PHY_PCS_CTRL_REGIGP01E1000_PHY_PCS_CTRL_REG 0x00B5 e1000_hw.h 　
36534
 IGP01E1000_ANALOG_REGS_PAGEIGP01E1000_ANALOG_REGS_PAGE 0x20C0 e1000_hw.h 　
36535
 GG82563_PAGE_SHIFTGG82563_PAGE_SHIFT 5 e1000_hw.h 　
36536
 GG82563_MIN_ALT_REGGG82563_MIN_ALT_REG 30 e1000_hw.h 　
36537
 GG82563_PHY_SPEC_CTRLGG82563_PHY_SPEC_CTRL GG82563_REG(0, 16) e1000_hw.h PHY Specific Control
36538
 GG82563_PHY_SPEC_STATUSGG82563_PHY_SPEC_STATUS GG82563_REG(0, 17) e1000_hw.h PHY Specific Status
36539
 GG82563_PHY_INT_ENABLEGG82563_PHY_INT_ENABLE GG82563_REG(0, 18) e1000_hw.h Interrupt Enable
36540
 GG82563_PHY_SPEC_STATUS_2GG82563_PHY_SPEC_STATUS_2 GG82563_REG(0, 19) e1000_hw.h PHY Specific Status 2
36541
 GG82563_PHY_RX_ERR_CNTRGG82563_PHY_RX_ERR_CNTR GG82563_REG(0, 21) e1000_hw.h Receive Error Counter
36542
 GG82563_PHY_PAGE_SELECTGG82563_PHY_PAGE_SELECT GG82563_REG(0, 22) e1000_hw.h Page Select
36543
 GG82563_PHY_SPEC_CTRL_2GG82563_PHY_SPEC_CTRL_2 GG82563_REG(0, 26) e1000_hw.h PHY Specific Control 2
36544
 GG82563_PHY_PAGE_SELECT_ALTGG82563_PHY_PAGE_SELECT_ALT GG82563_REG(0, 29) e1000_hw.h Alternate Page Select
36545
 GG82563_PHY_TEST_CLK_CTRLGG82563_PHY_TEST_CLK_CTRL GG82563_REG(0, 30) e1000_hw.h Test Clock Control (use reg. 29 to select)
36546
 GG82563_PHY_MAC_SPEC_CTRLGG82563_PHY_MAC_SPEC_CTRL GG82563_REG(2, 21) e1000_hw.h MAC Specific Control Register
36547
 GG82563_PHY_MAC_SPEC_CTRL_2GG82563_PHY_MAC_SPEC_CTRL_2 GG82563_REG(2, 26) e1000_hw.h MAC Specific Control 2
36548
 GG82563_PHY_DSP_DISTANCEGG82563_PHY_DSP_DISTANCE GG82563_REG(5, 26) e1000_hw.h DSP Distance
36549
 GG82563_PHY_KMRN_MODE_CTRLGG82563_PHY_KMRN_MODE_CTRL GG82563_REG(193, 16) e1000_hw.h Kumeran Mode Control
36550
 GG82563_PHY_PORT_RESETGG82563_PHY_PORT_RESET GG82563_REG(193, 17) e1000_hw.h Port Reset
36551
 GG82563_PHY_REVISION_IDGG82563_PHY_REVISION_ID GG82563_REG(193, 18) e1000_hw.h Revision ID
36552
 GG82563_PHY_DEVICE_IDGG82563_PHY_DEVICE_ID GG82563_REG(193, 19) e1000_hw.h Device ID
36553
 GG82563_PHY_PWR_MGMT_CTRLGG82563_PHY_PWR_MGMT_CTRL GG82563_REG(193, 20) e1000_hw.h Power Management Control
36554
 GG82563_PHY_RATE_ADAPT_CTRLGG82563_PHY_RATE_ADAPT_CTRL GG82563_REG(193, 25) e1000_hw.h Rate Adaptation Control
36555
 GG82563_PHY_KMRN_FIFO_CTRL_STATGG82563_PHY_KMRN_FIFO_CTRL_STAT GG82563_REG(194, 16) e1000_hw.h FIFO's Control/Status
36556
 GG82563_PHY_KMRN_CTRLGG82563_PHY_KMRN_CTRL GG82563_REG(194, 17) e1000_hw.h Control
36557
 GG82563_PHY_INBAND_CTRLGG82563_PHY_INBAND_CTRL GG82563_REG(194, 18) e1000_hw.h Inband Control
36558
 GG82563_PHY_KMRN_DIAGNOSTICGG82563_PHY_KMRN_DIAGNOSTIC GG82563_REG(194, 19) e1000_hw.h Diagnostic
36559
 GG82563_PHY_ACK_TIMEOUTSGG82563_PHY_ACK_TIMEOUTS GG82563_REG(194, 20) e1000_hw.h Acknowledge Timeouts
36560
 GG82563_PHY_ADV_ABILITYGG82563_PHY_ADV_ABILITY GG82563_REG(194, 21) e1000_hw.h Advertised Ability
36561
 GG82563_PHY_LINK_PARTNER_ADV_ABGG82563_PHY_LINK_PARTNER_ADV_AB GG82563_REG(194, 23) e1000_hw.h Link Partner Advertised Ability
36562
 GG82563_PHY_ADV_NEXT_PAGEGG82563_PHY_ADV_NEXT_PAGE GG82563_REG(194, 24) e1000_hw.h Advertised Next Page
36563
 GG82563_PHY_LINK_PARTNER_ADV_NEGG82563_PHY_LINK_PARTNER_ADV_NE GG82563_REG(194, 25) e1000_hw.h Link Partner Advertised Next page
36564
 GG82563_PHY_KMRN_MISCGG82563_PHY_KMRN_MISC GG82563_REG(194, 26) e1000_hw.h Misc.
36565
 MII_CR_SPEED_SELECT_MSBMII_CR_SPEED_SELECT_MSB 0x0040 e1000_hw.h bits 6,13: 10=1000, 01=100, 00=10
36566
 MII_CR_COLL_TEST_ENABLEMII_CR_COLL_TEST_ENABLE 0x0080 e1000_hw.h Collision test enable
36567
 MII_CR_FULL_DUPLEXMII_CR_FULL_DUPLEX 0x0100 e1000_hw.h FDX =1, half duplex =0
36568
 MII_CR_RESTART_AUTO_NEGMII_CR_RESTART_AUTO_NEG 0x0200 e1000_hw.h Restart auto negotiation
36569
 MII_CR_ISOLATEMII_CR_ISOLATE 0x0400 e1000_hw.h Isolate PHY from MII
36570
 MII_CR_POWER_DOWNMII_CR_POWER_DOWN 0x0800 e1000_hw.h Power down
36571
 MII_CR_AUTO_NEG_ENMII_CR_AUTO_NEG_EN 0x1000 e1000_hw.h Auto Neg Enable
36572
 MII_CR_SPEED_SELECT_LSBMII_CR_SPEED_SELECT_LSB 0x2000 e1000_hw.h bits 6,13: 10=1000, 01=100, 00=10
36573
 MII_CR_LOOPBACKMII_CR_LOOPBACK 0x4000 e1000_hw.h 0 = normal, 1 = loopback
36574
 MII_CR_RESETMII_CR_RESET 0x8000 e1000_hw.h 0 = normal, 1 = PHY reset
36575
 MII_SR_EXTENDED_CAPSMII_SR_EXTENDED_CAPS 0x0001 e1000_hw.h Extended register capabilities
36576
 MII_SR_JABBER_DETECTMII_SR_JABBER_DETECT 0x0002 e1000_hw.h Jabber Detected
36577
 MII_SR_LINK_STATUSMII_SR_LINK_STATUS 0x0004 e1000_hw.h Link Status 1 = link
36578
 MII_SR_AUTONEG_CAPSMII_SR_AUTONEG_CAPS 0x0008 e1000_hw.h Auto Neg Capable
36579
 MII_SR_REMOTE_FAULTMII_SR_REMOTE_FAULT 0x0010 e1000_hw.h Remote Fault Detect
36580
 MII_SR_AUTONEG_COMPLETEMII_SR_AUTONEG_COMPLETE 0x0020 e1000_hw.h Auto Neg Complete
36581
 MII_SR_PREAMBLE_SUPPRESSMII_SR_PREAMBLE_SUPPRESS 0x0040 e1000_hw.h Preamble may be suppressed
36582
 MII_SR_EXTENDED_STATUSMII_SR_EXTENDED_STATUS 0x0100 e1000_hw.h Ext. status info in Reg 0x0F
36583
 MII_SR_100T2_HD_CAPSMII_SR_100T2_HD_CAPS 0x0200 e1000_hw.h 100T2 Half Duplex Capable
36584
 MII_SR_100T2_FD_CAPSMII_SR_100T2_FD_CAPS 0x0400 e1000_hw.h 100T2 Full Duplex Capable
36585
 MII_SR_10T_HD_CAPSMII_SR_10T_HD_CAPS 0x0800 e1000_hw.h 10T Half Duplex Capable
36586
 MII_SR_10T_FD_CAPSMII_SR_10T_FD_CAPS 0x1000 e1000_hw.h 10T Full Duplex Capable
36587
 MII_SR_100X_HD_CAPSMII_SR_100X_HD_CAPS 0x2000 e1000_hw.h 100X Half Duplex Capable
36588
 MII_SR_100X_FD_CAPSMII_SR_100X_FD_CAPS 0x4000 e1000_hw.h 100X Full Duplex Capable
36589
 MII_SR_100T4_CAPSMII_SR_100T4_CAPS 0x8000 e1000_hw.h 100T4 Capable
36590
 NWAY_AR_SELECTOR_FIELDNWAY_AR_SELECTOR_FIELD 0x0001 e1000_hw.h indicates IEEE 802.3 CSMA/CD
36591
 NWAY_AR_10T_HD_CAPSNWAY_AR_10T_HD_CAPS 0x0020 e1000_hw.h 10T Half Duplex Capable
36592
 NWAY_AR_10T_FD_CAPSNWAY_AR_10T_FD_CAPS 0x0040 e1000_hw.h 10T Full Duplex Capable
36593
 NWAY_AR_100TX_HD_CAPSNWAY_AR_100TX_HD_CAPS 0x0080 e1000_hw.h 100TX Half Duplex Capable
36594
 NWAY_AR_100TX_FD_CAPSNWAY_AR_100TX_FD_CAPS 0x0100 e1000_hw.h 100TX Full Duplex Capable
36595
 NWAY_AR_100T4_CAPSNWAY_AR_100T4_CAPS 0x0200 e1000_hw.h 100T4 Capable
36596
 NWAY_AR_PAUSENWAY_AR_PAUSE 0x0400 e1000_hw.h Pause operation desired
36597
 NWAY_AR_ASM_DIRNWAY_AR_ASM_DIR 0x0800 e1000_hw.h Asymmetric Pause Direction bit
36598
 NWAY_AR_REMOTE_FAULTNWAY_AR_REMOTE_FAULT 0x2000 e1000_hw.h Remote Fault detected
36599
 NWAY_AR_NEXT_PAGENWAY_AR_NEXT_PAGE 0x8000 e1000_hw.h Next Page ability supported
36600
 NWAY_LPAR_SELECTOR_FIELDNWAY_LPAR_SELECTOR_FIELD 0x0000 e1000_hw.h LP protocol selector field
36601
 NWAY_LPAR_10T_HD_CAPSNWAY_LPAR_10T_HD_CAPS 0x0020 e1000_hw.h LP is 10T Half Duplex Capable
36602
 NWAY_LPAR_10T_FD_CAPSNWAY_LPAR_10T_FD_CAPS 0x0040 e1000_hw.h LP is 10T Full Duplex Capable
36603
 NWAY_LPAR_100TX_HD_CAPSNWAY_LPAR_100TX_HD_CAPS 0x0080 e1000_hw.h LP is 100TX Half Duplex Capable
36604
 NWAY_LPAR_100TX_FD_CAPSNWAY_LPAR_100TX_FD_CAPS 0x0100 e1000_hw.h LP is 100TX Full Duplex Capable
36605
 NWAY_LPAR_100T4_CAPSNWAY_LPAR_100T4_CAPS 0x0200 e1000_hw.h LP is 100T4 Capable
36606
 NWAY_LPAR_PAUSENWAY_LPAR_PAUSE 0x0400 e1000_hw.h LP Pause operation desired
36607
 NWAY_LPAR_ASM_DIRNWAY_LPAR_ASM_DIR 0x0800 e1000_hw.h LP Asymmetric Pause Direction bit
36608
 NWAY_LPAR_REMOTE_FAULTNWAY_LPAR_REMOTE_FAULT 0x2000 e1000_hw.h LP has detected Remote Fault
36609
 NWAY_LPAR_ACKNOWLEDGENWAY_LPAR_ACKNOWLEDGE 0x4000 e1000_hw.h LP has rx'd link code word
36610
 NWAY_LPAR_NEXT_PAGENWAY_LPAR_NEXT_PAGE 0x8000 e1000_hw.h Next Page ability supported
36611
 NWAY_ER_LP_NWAY_CAPSNWAY_ER_LP_NWAY_CAPS 0x0001 e1000_hw.h LP has Auto Neg Capability
36612
 NWAY_ER_PAGE_RXDNWAY_ER_PAGE_RXD 0x0002 e1000_hw.h LP is 10T Half Duplex Capable
36613
 NWAY_ER_NEXT_PAGE_CAPSNWAY_ER_NEXT_PAGE_CAPS 0x0004 e1000_hw.h LP is 10T Full Duplex Capable
36614
 NWAY_ER_LP_NEXT_PAGE_CAPSNWAY_ER_LP_NEXT_PAGE_CAPS 0x0008 e1000_hw.h LP is 100TX Half Duplex Capable
36615
 NWAY_ER_PAR_DETECT_FAULTNWAY_ER_PAR_DETECT_FAULT 0x0010 e1000_hw.h LP is 100TX Full Duplex Capable
36616
 NPTX_MSG_CODE_FIELDNPTX_MSG_CODE_FIELD 0x0001 e1000_hw.h NP msg code or unformatted data
36617
 NPTX_TOGGLENPTX_TOGGLE 0x0800 e1000_hw.h Toggles between exchanges
36618
 NPTX_ACKNOWLDGE2NPTX_ACKNOWLDGE2 0x1000 e1000_hw.h 1 = will comply with msg
36619
 NPTX_MSG_PAGENPTX_MSG_PAGE 0x2000 e1000_hw.h formatted(1)/unformatted(0) pg
36620
 NPTX_NEXT_PAGENPTX_NEXT_PAGE 0x8000 e1000_hw.h 1 = addition NP will follow
36621
 LP_RNPR_MSG_CODE_FIELDLP_RNPR_MSG_CODE_FIELD 0x0001 e1000_hw.h NP msg code or unformatted data
36622
 LP_RNPR_TOGGLELP_RNPR_TOGGLE 0x0800 e1000_hw.h Toggles between exchanges
36623
 LP_RNPR_ACKNOWLDGE2LP_RNPR_ACKNOWLDGE2 0x1000 e1000_hw.h 1 = will comply with msg
36624
 LP_RNPR_MSG_PAGELP_RNPR_MSG_PAGE 0x2000 e1000_hw.h formatted(1)/unformatted(0) pg
36625
 LP_RNPR_ACKNOWLDGELP_RNPR_ACKNOWLDGE 0x4000 e1000_hw.h 1 = ACK / 0 = NO ACK
36626
 LP_RNPR_NEXT_PAGELP_RNPR_NEXT_PAGE 0x8000 e1000_hw.h 1 = addition NP will follow
36627
 CR_1000T_ASYM_PAUSECR_1000T_ASYM_PAUSE 0x0080 e1000_hw.h Advertise asymmetric pause bit
36628
 CR_1000T_HD_CAPSCR_1000T_HD_CAPS 0x0100 e1000_hw.h Advertise 1000T HD capability
36629
 CR_1000T_FD_CAPSCR_1000T_FD_CAPS 0x0200 e1000_hw.h Advertise 1000T FD capability
36630
 CR_1000T_REPEATER_DTECR_1000T_REPEATER_DTE 0x0400 e1000_hw.h 1=Repeater/switch device port
36631
 CR_1000T_MS_VALUECR_1000T_MS_VALUE 0x0800 e1000_hw.h 1=Configure PHY as Master
36632
 CR_1000T_MS_ENABLECR_1000T_MS_ENABLE 0x1000 e1000_hw.h 1=Master/Slave manual config value
36633
 CR_1000T_TEST_MODE_NORMALCR_1000T_TEST_MODE_NORMAL 0x0000 e1000_hw.h Normal Operation
36634
 CR_1000T_TEST_MODE_1CR_1000T_TEST_MODE_1 0x2000 e1000_hw.h Transmit Waveform test
36635
 CR_1000T_TEST_MODE_2CR_1000T_TEST_MODE_2 0x4000 e1000_hw.h Master Transmit Jitter test
36636
 CR_1000T_TEST_MODE_3CR_1000T_TEST_MODE_3 0x6000 e1000_hw.h Slave Transmit Jitter test
36637
 CR_1000T_TEST_MODE_4CR_1000T_TEST_MODE_4 0x8000 e1000_hw.h Transmitter Distortion test
36638
 SR_1000T_IDLE_ERROR_CNTSR_1000T_IDLE_ERROR_CNT 0x00FF e1000_hw.h Num idle errors since last read
36639
 SR_1000T_ASYM_PAUSE_DIRSR_1000T_ASYM_PAUSE_DIR 0x0100 e1000_hw.h LP asymmetric pause direction bit
36640
 SR_1000T_LP_HD_CAPSSR_1000T_LP_HD_CAPS 0x0400 e1000_hw.h LP is 1000T HD capable
36641
 SR_1000T_LP_FD_CAPSSR_1000T_LP_FD_CAPS 0x0800 e1000_hw.h LP is 1000T FD capable
36642
 SR_1000T_REMOTE_RX_STATUSSR_1000T_REMOTE_RX_STATUS 0x1000 e1000_hw.h Remote receiver OK
36643
 SR_1000T_LOCAL_RX_STATUSSR_1000T_LOCAL_RX_STATUS 0x2000 e1000_hw.h Local receiver OK
36644
 SR_1000T_MS_CONFIG_RESSR_1000T_MS_CONFIG_RES 0x4000 e1000_hw.h 1=Local TX is Master, 0=Slave
36645
 SR_1000T_MS_CONFIG_FAULTSR_1000T_MS_CONFIG_FAULT 0x8000 e1000_hw.h Master/Slave config fault
36646
 SR_1000T_REMOTE_RX_STATUS_SHIFTSR_1000T_REMOTE_RX_STATUS_SHIFT 12 e1000_hw.h 　
36647
 SR_1000T_LOCAL_RX_STATUS_SHIFTSR_1000T_LOCAL_RX_STATUS_SHIFT 13 e1000_hw.h 　
36648
 SR_1000T_PHY_EXCESSIVE_IDLE_ERRSR_1000T_PHY_EXCESSIVE_IDLE_ERR 5 e1000_hw.h 　
36649
 FFE_IDLE_ERR_COUNT_TIMEOUT_20FFE_IDLE_ERR_COUNT_TIMEOUT_20 20 e1000_hw.h 　
36650
 FFE_IDLE_ERR_COUNT_TIMEOUT_100FFE_IDLE_ERR_COUNT_TIMEOUT_100 100 e1000_hw.h 　
36651
 IEEE_ESR_1000T_HD_CAPSIEEE_ESR_1000T_HD_CAPS 0x1000 e1000_hw.h 1000T HD capable
36652
 IEEE_ESR_1000T_FD_CAPSIEEE_ESR_1000T_FD_CAPS 0x2000 e1000_hw.h 1000T FD capable
36653
 IEEE_ESR_1000X_HD_CAPSIEEE_ESR_1000X_HD_CAPS 0x4000 e1000_hw.h 1000X HD capable
36654
 IEEE_ESR_1000X_FD_CAPSIEEE_ESR_1000X_FD_CAPS 0x8000 e1000_hw.h 1000X FD capable
36655
 PHY_TX_POLARITY_MASKPHY_TX_POLARITY_MASK 0x0100 e1000_hw.h register 10h bit 8 (polarity bit)
36656
 PHY_TX_NORMAL_POLARITYPHY_TX_NORMAL_POLARITY 0 e1000_hw.h register 10h bit 8 (normal polarity)
36657
 AUTO_POLARITY_DISABLEAUTO_POLARITY_DISABLE 0x0010 e1000_hw.h register 11h bit 4
36658
 M88E1000_PSCR_JABBER_DISABLEM88E1000_PSCR_JABBER_DISABLE 0x0001 e1000_hw.h 1=Jabber Function disabled
36659
 M88E1000_PSCR_POLARITY_REVERSALM88E1000_PSCR_POLARITY_REVERSAL 0x0002 e1000_hw.h 1=Polarity Reversal enabled
36660
 M88E1000_PSCR_SQE_TESTM88E1000_PSCR_SQE_TEST 0x0004 e1000_hw.h 1=SQE Test enabled
36661
 M88E1000_PSCR_CLK125_DISABLEM88E1000_PSCR_CLK125_DISABLE 0x0010 e1000_hw.h 1=CLK125 low,
36662
 M88E1000_PSCR_MDI_MANUAL_MODEM88E1000_PSCR_MDI_MANUAL_MODE 0x0000 e1000_hw.h MDI Crossover Mode bits 6:5
36663
 M88E1000_PSCR_MDIX_MANUAL_MODEM88E1000_PSCR_MDIX_MANUAL_MODE 0x0020 e1000_hw.h Manual MDIX configuration
36664
 M88E1000_PSCR_AUTO_X_1000TM88E1000_PSCR_AUTO_X_1000T 0x0040 e1000_hw.h 1000BASE-T: Auto crossover,
36665
 M88E1000_PSCR_AUTO_X_MODEM88E1000_PSCR_AUTO_X_MODE 0x0060 e1000_hw.h Auto crossover enabled
36666
 M88E1000_PSCR_10BT_EXT_DIST_ENAM88E1000_PSCR_10BT_EXT_DIST_ENA 0x0080 e1000_hw.h 　
36667
 M88E1000_PSCR_MII_5BIT_ENABLEM88E1000_PSCR_MII_5BIT_ENABLE 0x0100 e1000_hw.h 　
36668
 M88E1000_PSCR_SCRAMBLER_DISABLEM88E1000_PSCR_SCRAMBLER_DISABLE 0x0200 e1000_hw.h 1=Scrambler disable
36669
 M88E1000_PSCR_FORCE_LINK_GOODM88E1000_PSCR_FORCE_LINK_GOOD 0x0400 e1000_hw.h 1=Force link good
36670
 M88E1000_PSCR_ASSERT_CRS_ON_TXM88E1000_PSCR_ASSERT_CRS_ON_TX 0x0800 e1000_hw.h 1=Assert CRS on Transmit
36671
 M88E1000_PSCR_POLARITY_REVERSALM88E1000_PSCR_POLARITY_REVERSAL 1 e1000_hw.h 　
36672
 M88E1000_PSCR_AUTO_X_MODE_SHIFTM88E1000_PSCR_AUTO_X_MODE_SHIFT 5 e1000_hw.h 　
36673
 M88E1000_PSCR_10BT_EXT_DIST_ENAM88E1000_PSCR_10BT_EXT_DIST_ENA 7 e1000_hw.h 　
36674
 M88E1000_PSSR_JABBERM88E1000_PSSR_JABBER 0x0001 e1000_hw.h 1=Jabber
36675
 M88E1000_PSSR_REV_POLARITYM88E1000_PSSR_REV_POLARITY 0x0002 e1000_hw.h 1=Polarity reversed
36676
 M88E1000_PSSR_DOWNSHIFTM88E1000_PSSR_DOWNSHIFT 0x0020 e1000_hw.h 1=Downshifted
36677
 M88E1000_PSSR_MDIXM88E1000_PSSR_MDIX 0x0040 e1000_hw.h 1=MDIX; 0=MDI
36678
 M88E1000_PSSR_CABLE_LENGTHM88E1000_PSSR_CABLE_LENGTH 0x0380 e1000_hw.h 0=<50M;1=50-80M;2=80-110M;
36679
 M88E1000_PSSR_LINKM88E1000_PSSR_LINK 0x0400 e1000_hw.h 1=Link up, 0=Link down
36680
 M88E1000_PSSR_SPD_DPLX_RESOLVEDM88E1000_PSSR_SPD_DPLX_RESOLVED 0x0800 e1000_hw.h 1=Speed & Duplex resolved
36681
 M88E1000_PSSR_PAGE_RCVDM88E1000_PSSR_PAGE_RCVD 0x1000 e1000_hw.h 1=Page received
36682
 M88E1000_PSSR_DPLXM88E1000_PSSR_DPLX 0x2000 e1000_hw.h 1=Duplex 0=Half Duplex
36683
 M88E1000_PSSR_SPEEDM88E1000_PSSR_SPEED 0xC000 e1000_hw.h Speed, bits 14:15
36684
 M88E1000_PSSR_10MBSM88E1000_PSSR_10MBS 0x0000 e1000_hw.h 00=10Mbs
36685
 M88E1000_PSSR_100MBSM88E1000_PSSR_100MBS 0x4000 e1000_hw.h 01=100Mbs
36686
 M88E1000_PSSR_1000MBSM88E1000_PSSR_1000MBS 0x8000 e1000_hw.h 10=1000Mbs
36687
 M88E1000_PSSR_REV_POLARITY_SHIFM88E1000_PSSR_REV_POLARITY_SHIF 1 e1000_hw.h 　
36688
 M88E1000_PSSR_DOWNSHIFT_SHIFTM88E1000_PSSR_DOWNSHIFT_SHIFT 5 e1000_hw.h 　
36689
 M88E1000_PSSR_MDIX_SHIFTM88E1000_PSSR_MDIX_SHIFT 6 e1000_hw.h 　
36690
 M88E1000_PSSR_CABLE_LENGTH_SHIFM88E1000_PSSR_CABLE_LENGTH_SHIF 7 e1000_hw.h 　
36691
 M88E1000_EPSCR_FIBER_LOOPBACKM88E1000_EPSCR_FIBER_LOOPBACK 0x4000 e1000_hw.h 1=Fiber loopback
36692
 M88E1000_EPSCR_DOWN_NO_IDLEM88E1000_EPSCR_DOWN_NO_IDLE 0x8000 e1000_hw.h 1=Lost lock detect enabled.
36693
 M88E1000_EPSCR_MASTER_DOWNSHIFTM88E1000_EPSCR_MASTER_DOWNSHIFT 0x0C00 e1000_hw.h 　
36694
 M88E1000_EPSCR_MASTER_DOWNSHIFTM88E1000_EPSCR_MASTER_DOWNSHIFT 0x0000 e1000_hw.h 　
36695
 M88E1000_EPSCR_MASTER_DOWNSHIFTM88E1000_EPSCR_MASTER_DOWNSHIFT 0x0400 e1000_hw.h 　
36696
 M88E1000_EPSCR_MASTER_DOWNSHIFTM88E1000_EPSCR_MASTER_DOWNSHIFT 0x0800 e1000_hw.h 　
36697
 M88E1000_EPSCR_MASTER_DOWNSHIFTM88E1000_EPSCR_MASTER_DOWNSHIFT 0x0C00 e1000_hw.h 　
36698
 M88E1000_EPSCR_SLAVE_DOWNSHIFT_M88E1000_EPSCR_SLAVE_DOWNSHIFT_ 0x0300 e1000_hw.h 　
36699
 M88E1000_EPSCR_SLAVE_DOWNSHIFT_M88E1000_EPSCR_SLAVE_DOWNSHIFT_ 0x0000 e1000_hw.h 　
36700
 M88E1000_EPSCR_SLAVE_DOWNSHIFT_M88E1000_EPSCR_SLAVE_DOWNSHIFT_ 0x0100 e1000_hw.h 　
36701
 M88E1000_EPSCR_SLAVE_DOWNSHIFT_M88E1000_EPSCR_SLAVE_DOWNSHIFT_ 0x0200 e1000_hw.h 　
36702
 M88E1000_EPSCR_SLAVE_DOWNSHIFT_M88E1000_EPSCR_SLAVE_DOWNSHIFT_ 0x0300 e1000_hw.h 　
36703
 M88E1000_EPSCR_TX_CLK_2_5M88E1000_EPSCR_TX_CLK_2_5 0x0060 e1000_hw.h 2.5 MHz TX_CLK
36704
 M88E1000_EPSCR_TX_CLK_25M88E1000_EPSCR_TX_CLK_25 0x0070 e1000_hw.h 25 MHz TX_CLK
36705
 M88E1000_EPSCR_TX_CLK_0M88E1000_EPSCR_TX_CLK_0 0x0000 e1000_hw.h NO TX_CLK
36706
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0E00 e1000_hw.h 　
36707
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0000 e1000_hw.h 　
36708
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0200 e1000_hw.h 　
36709
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0400 e1000_hw.h 　
36710
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0600 e1000_hw.h 　
36711
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0800 e1000_hw.h 　
36712
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0A00 e1000_hw.h 　
36713
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0C00 e1000_hw.h 　
36714
 M88EC018_EPSCR_DOWNSHIFT_COUNTEM88EC018_EPSCR_DOWNSHIFT_COUNTE 0x0E00 e1000_hw.h 　
36715
 IGP01E1000_PSCFR_AUTO_MDIX_PAR_IGP01E1000_PSCFR_AUTO_MDIX_PAR_ 0x0010 e1000_hw.h 　
36716
 IGP01E1000_PSCFR_PRE_ENIGP01E1000_PSCFR_PRE_EN 0x0020 e1000_hw.h 　
36717
 IGP01E1000_PSCFR_SMART_SPEEDIGP01E1000_PSCFR_SMART_SPEED 0x0080 e1000_hw.h 　
36718
 IGP01E1000_PSCFR_DISABLE_TPLOOPIGP01E1000_PSCFR_DISABLE_TPLOOP 0x0100 e1000_hw.h 　
36719
 IGP01E1000_PSCFR_DISABLE_JABBERIGP01E1000_PSCFR_DISABLE_JABBER 0x0400 e1000_hw.h 　
36720
 IGP01E1000_PSCFR_DISABLE_TRANSMIGP01E1000_PSCFR_DISABLE_TRANSM 0x2000 e1000_hw.h 　
36721
 IGP01E1000_PSSR_AUTONEG_FAILEDIGP01E1000_PSSR_AUTONEG_FAILED 0x0001 e1000_hw.h RO LH SC
36722
 IGP01E1000_PSSR_POLARITY_REVERSIGP01E1000_PSSR_POLARITY_REVERS 0x0002 e1000_hw.h 　
36723
 IGP01E1000_PSSR_CABLE_LENGTHIGP01E1000_PSSR_CABLE_LENGTH 0x007C e1000_hw.h 　
36724
 IGP01E1000_PSSR_FULL_DUPLEXIGP01E1000_PSSR_FULL_DUPLEX 0x0200 e1000_hw.h 　
36725
 IGP01E1000_PSSR_LINK_UPIGP01E1000_PSSR_LINK_UP 0x0400 e1000_hw.h 　
36726
 IGP01E1000_PSSR_MDIXIGP01E1000_PSSR_MDIX 0x0800 e1000_hw.h 　
36727
 IGP01E1000_PSSR_SPEED_MASKIGP01E1000_PSSR_SPEED_MASK 0xC000 e1000_hw.h speed bits mask
36728
 IGP01E1000_PSSR_SPEED_10MBPSIGP01E1000_PSSR_SPEED_10MBPS 0x4000 e1000_hw.h 　
36729
 IGP01E1000_PSSR_SPEED_100MBPSIGP01E1000_PSSR_SPEED_100MBPS 0x8000 e1000_hw.h 　
36730
 IGP01E1000_PSSR_SPEED_1000MBPSIGP01E1000_PSSR_SPEED_1000MBPS 0xC000 e1000_hw.h 　
36731
 IGP01E1000_PSSR_CABLE_LENGTH_SHIGP01E1000_PSSR_CABLE_LENGTH_SH 0x0002 e1000_hw.h shift right 2
36732
 IGP01E1000_PSSR_MDIX_SHIFTIGP01E1000_PSSR_MDIX_SHIFT 0x000B e1000_hw.h shift right 11
36733
 IGP01E1000_PSCR_TP_LOOPBACKIGP01E1000_PSCR_TP_LOOPBACK 0x0010 e1000_hw.h 　
36734
 IGP01E1000_PSCR_CORRECT_NC_SCMBIGP01E1000_PSCR_CORRECT_NC_SCMB 0x0200 e1000_hw.h 　
36735
 IGP01E1000_PSCR_TEN_CRS_SELECTIGP01E1000_PSCR_TEN_CRS_SELECT 0x0400 e1000_hw.h 　
36736
 IGP01E1000_PSCR_FLIP_CHIPIGP01E1000_PSCR_FLIP_CHIP 0x0800 e1000_hw.h 　
36737
 IGP01E1000_PSCR_AUTO_MDIXIGP01E1000_PSCR_AUTO_MDIX 0x1000 e1000_hw.h 　
36738
 IGP01E1000_PSCR_FORCE_MDI_MDIXIGP01E1000_PSCR_FORCE_MDI_MDIX 0x2000 e1000_hw.h 0-MDI, 1-MDIX
36739
 IGP01E1000_PLHR_SS_DOWNGRADEIGP01E1000_PLHR_SS_DOWNGRADE 0x8000 e1000_hw.h 　
36740
 IGP01E1000_PLHR_GIG_SCRAMBLER_EIGP01E1000_PLHR_GIG_SCRAMBLER_E 0x4000 e1000_hw.h 　
36741
 IGP01E1000_PLHR_MASTER_FAULTIGP01E1000_PLHR_MASTER_FAULT 0x2000 e1000_hw.h 　
36742
 IGP01E1000_PLHR_MASTER_RESOLUTIIGP01E1000_PLHR_MASTER_RESOLUTI 0x1000 e1000_hw.h 　
36743
 IGP01E1000_PLHR_GIG_REM_RCVR_NOIGP01E1000_PLHR_GIG_REM_RCVR_NO 0x0800 e1000_hw.h LH
36744
 IGP01E1000_PLHR_IDLE_ERROR_CNT_IGP01E1000_PLHR_IDLE_ERROR_CNT_ 0x0400 e1000_hw.h LH
36745
 IGP01E1000_PLHR_DATA_ERR_1IGP01E1000_PLHR_DATA_ERR_1 0x0200 e1000_hw.h LH
36746
 IGP01E1000_PLHR_DATA_ERR_0IGP01E1000_PLHR_DATA_ERR_0 0x0100 e1000_hw.h 　
36747
 IGP01E1000_PLHR_AUTONEG_FAULTIGP01E1000_PLHR_AUTONEG_FAULT 0x0040 e1000_hw.h 　
36748
 IGP01E1000_PLHR_AUTONEG_ACTIVEIGP01E1000_PLHR_AUTONEG_ACTIVE 0x0010 e1000_hw.h 　
36749
 IGP01E1000_PLHR_VALID_CHANNEL_DIGP01E1000_PLHR_VALID_CHANNEL_D 0x0008 e1000_hw.h 　
36750
 IGP01E1000_PLHR_VALID_CHANNEL_CIGP01E1000_PLHR_VALID_CHANNEL_C 0x0004 e1000_hw.h 　
36751
 IGP01E1000_PLHR_VALID_CHANNEL_BIGP01E1000_PLHR_VALID_CHANNEL_B 0x0002 e1000_hw.h 　
36752
 IGP01E1000_PLHR_VALID_CHANNEL_AIGP01E1000_PLHR_VALID_CHANNEL_A 0x0001 e1000_hw.h 　
36753
 IGP01E1000_MSE_CHANNEL_DIGP01E1000_MSE_CHANNEL_D 0x000F e1000_hw.h 　
36754
 IGP01E1000_MSE_CHANNEL_CIGP01E1000_MSE_CHANNEL_C 0x00F0 e1000_hw.h 　
36755
 IGP01E1000_MSE_CHANNEL_BIGP01E1000_MSE_CHANNEL_B 0x0F00 e1000_hw.h 　
36756
 IGP01E1000_MSE_CHANNEL_AIGP01E1000_MSE_CHANNEL_A 0xF000 e1000_hw.h 　
36757
 IGP02E1000_PM_SPDIGP02E1000_PM_SPD 0x0001 e1000_hw.h Smart Power Down
36758
 IGP02E1000_PM_D3_LPLUIGP02E1000_PM_D3_LPLU 0x0004 e1000_hw.h Enable LPLU in non-D0a modes
36759
 IGP02E1000_PM_D0_LPLUIGP02E1000_PM_D0_LPLU 0x0002 e1000_hw.h Enable LPLU in D0a mode
36760
 DSP_RESET_ENABLEDSP_RESET_ENABLE 0x0 e1000_hw.h 　
36761
 DSP_RESET_DISABLEDSP_RESET_DISABLE 0x2 e1000_hw.h 　
36762
 E1000_MAX_DSP_RESETSE1000_MAX_DSP_RESETS 10 e1000_hw.h 　
36763
 IGP01E1000_AGC_LENGTH_SHIFTIGP01E1000_AGC_LENGTH_SHIFT 7 e1000_hw.h Coarse - 13:11, Fine - 10:7
36764
 IGP02E1000_AGC_LENGTH_SHIFTIGP02E1000_AGC_LENGTH_SHIFT 9 e1000_hw.h Coarse - 15:13, Fine - 12:9
36765
 IGP02E1000_AGC_LENGTH_MASKIGP02E1000_AGC_LENGTH_MASK 0x7F e1000_hw.h 　
36766
 IGP01E1000_AGC_LENGTH_TABLE_SIZIGP01E1000_AGC_LENGTH_TABLE_SIZ 128 e1000_hw.h 　
36767
 IGP02E1000_AGC_LENGTH_TABLE_SIZIGP02E1000_AGC_LENGTH_TABLE_SIZ 113 e1000_hw.h 　
36768
 IGP01E1000_AGC_RANGEIGP01E1000_AGC_RANGE 10 e1000_hw.h 　
36769
 IGP02E1000_AGC_RANGEIGP02E1000_AGC_RANGE 15 e1000_hw.h 　
36770
 IGP01E1000_PHY_POLARITY_MASKIGP01E1000_PHY_POLARITY_MASK 0x0078 e1000_hw.h 　
36771
 IGP01E1000_GMII_FLEX_SPDIGP01E1000_GMII_FLEX_SPD 0x10 e1000_hw.h Enable flexible speed
36772
 IGP01E1000_GMII_SPDIGP01E1000_GMII_SPD 0x20 e1000_hw.h Enable SPD
36773
 IGP01E1000_ANALOG_SPARE_FUSE_STIGP01E1000_ANALOG_SPARE_FUSE_ST 0x20D1 e1000_hw.h 　
36774
 IGP01E1000_ANALOG_FUSE_STATUSIGP01E1000_ANALOG_FUSE_STATUS 0x20D0 e1000_hw.h 　
36775
 IGP01E1000_ANALOG_FUSE_CONTROLIGP01E1000_ANALOG_FUSE_CONTROL 0x20DC e1000_hw.h 　
36776
 IGP01E1000_ANALOG_FUSE_BYPASSIGP01E1000_ANALOG_FUSE_BYPASS 0x20DE e1000_hw.h 　
36777
 IGP01E1000_ANALOG_FUSE_POLY_MASIGP01E1000_ANALOG_FUSE_POLY_MAS 0xF000 e1000_hw.h 　
36778
 IGP01E1000_ANALOG_FUSE_FINE_MASIGP01E1000_ANALOG_FUSE_FINE_MAS 0x0F80 e1000_hw.h 　
36779
 IGP01E1000_ANALOG_FUSE_COARSE_MIGP01E1000_ANALOG_FUSE_COARSE_M 0x0070 e1000_hw.h 　
36780
 IGP01E1000_ANALOG_SPARE_FUSE_ENIGP01E1000_ANALOG_SPARE_FUSE_EN 0x0100 e1000_hw.h 　
36781
 IGP01E1000_ANALOG_FUSE_ENABLE_SIGP01E1000_ANALOG_FUSE_ENABLE_S 0x0002 e1000_hw.h 　
36782
 IGP01E1000_ANALOG_FUSE_COARSE_TIGP01E1000_ANALOG_FUSE_COARSE_T 0x0040 e1000_hw.h 　
36783
 IGP01E1000_ANALOG_FUSE_COARSE_1IGP01E1000_ANALOG_FUSE_COARSE_1 0x0010 e1000_hw.h 　
36784
 IGP01E1000_ANALOG_FUSE_FINE_1IGP01E1000_ANALOG_FUSE_FINE_1 0x0080 e1000_hw.h 　
36785
 IGP01E1000_ANALOG_FUSE_FINE_10IGP01E1000_ANALOG_FUSE_FINE_10 0x0500 e1000_hw.h 　
36786
 GG82563_PSCR_DISABLE_JABBERGG82563_PSCR_DISABLE_JABBER 0x0001 e1000_hw.h 1=Disable Jabber
36787
 GG82563_PSCR_POLARITY_REVERSAL_GG82563_PSCR_POLARITY_REVERSAL_ 0x0002 e1000_hw.h 1=Polarity Reversal Disabled
36788
 GG82563_PSCR_POWER_DOWNGG82563_PSCR_POWER_DOWN 0x0004 e1000_hw.h 1=Power Down
36789
 GG82563_PSCR_COPPER_TRANSMITER_GG82563_PSCR_COPPER_TRANSMITER_ 0x0008 e1000_hw.h 1=Transmitter Disabled
36790
 GG82563_PSCR_CROSSOVER_MODE_MASGG82563_PSCR_CROSSOVER_MODE_MAS 0x0060 e1000_hw.h 　
36791
 GG82563_PSCR_CROSSOVER_MODE_MDIGG82563_PSCR_CROSSOVER_MODE_MDI 0x0000 e1000_hw.h 00=Manual MDI configuration
36792
 GG82563_PSCR_CROSSOVER_MODE_MDIGG82563_PSCR_CROSSOVER_MODE_MDI 0x0020 e1000_hw.h 01=Manual MDIX configuration
36793
 GG82563_PSCR_CROSSOVER_MODE_AUTGG82563_PSCR_CROSSOVER_MODE_AUT 0x0060 e1000_hw.h 11=Automatic crossover
36794
 GG82563_PSCR_ENALBE_EXTENDED_DIGG82563_PSCR_ENALBE_EXTENDED_DI 0x0080 e1000_hw.h 1=Enable Extended Distance
36795
 GG82563_PSCR_ENERGY_DETECT_MASKGG82563_PSCR_ENERGY_DETECT_MASK 0x0300 e1000_hw.h 　
36796
 GG82563_PSCR_ENERGY_DETECT_OFFGG82563_PSCR_ENERGY_DETECT_OFF 0x0000 e1000_hw.h 00,01=Off
36797
 GG82563_PSCR_ENERGY_DETECT_RXGG82563_PSCR_ENERGY_DETECT_RX 0x0200 e1000_hw.h 10=Sense on Rx only (Energy Detect)
36798
 GG82563_PSCR_ENERGY_DETECT_RX_TGG82563_PSCR_ENERGY_DETECT_RX_T 0x0300 e1000_hw.h 11=Sense and Tx NLP
36799
 GG82563_PSCR_FORCE_LINK_GOODGG82563_PSCR_FORCE_LINK_GOOD 0x0400 e1000_hw.h 1=Force Link Good
36800
 GG82563_PSCR_DOWNSHIFT_ENABLEGG82563_PSCR_DOWNSHIFT_ENABLE 0x0800 e1000_hw.h 1=Enable Downshift
36801
 GG82563_PSCR_DOWNSHIFT_COUNTER_GG82563_PSCR_DOWNSHIFT_COUNTER_ 0x7000 e1000_hw.h 　
36802
 GG82563_PSCR_DOWNSHIFT_COUNTER_GG82563_PSCR_DOWNSHIFT_COUNTER_ 12 e1000_hw.h 　
36803
 GG82563_PSSR_JABBERGG82563_PSSR_JABBER 0x0001 e1000_hw.h 1=Jabber
36804
 GG82563_PSSR_POLARITYGG82563_PSSR_POLARITY 0x0002 e1000_hw.h 1=Polarity Reversed
36805
 GG82563_PSSR_LINKGG82563_PSSR_LINK 0x0008 e1000_hw.h 1=Link is Up
36806
 GG82563_PSSR_ENERGY_DETECTGG82563_PSSR_ENERGY_DETECT 0x0010 e1000_hw.h 1=Sleep, 0=Active
36807
 GG82563_PSSR_DOWNSHIFTGG82563_PSSR_DOWNSHIFT 0x0020 e1000_hw.h 1=Downshift
36808
 GG82563_PSSR_CROSSOVER_STATUSGG82563_PSSR_CROSSOVER_STATUS 0x0040 e1000_hw.h 1=MDIX, 0=MDI
36809
 GG82563_PSSR_RX_PAUSE_ENABLEDGG82563_PSSR_RX_PAUSE_ENABLED 0x0100 e1000_hw.h 1=Receive Pause Enabled
36810
 GG82563_PSSR_TX_PAUSE_ENABLEDGG82563_PSSR_TX_PAUSE_ENABLED 0x0200 e1000_hw.h 1=Transmit Pause Enabled
36811
 GG82563_PSSR_LINK_UPGG82563_PSSR_LINK_UP 0x0400 e1000_hw.h 1=Link Up
36812
 GG82563_PSSR_SPEED_DUPLEX_RESOLGG82563_PSSR_SPEED_DUPLEX_RESOL 0x0800 e1000_hw.h 1=Resolved
36813
 GG82563_PSSR_PAGE_RECEIVEDGG82563_PSSR_PAGE_RECEIVED 0x1000 e1000_hw.h 1=Page Received
36814
 GG82563_PSSR_DUPLEXGG82563_PSSR_DUPLEX 0x2000 e1000_hw.h 1-Full-Duplex
36815
 GG82563_PSSR_SPEED_MASKGG82563_PSSR_SPEED_MASK 0xC000 e1000_hw.h 　
36816
 GG82563_PSSR_SPEED_10MBPSGG82563_PSSR_SPEED_10MBPS 0x0000 e1000_hw.h 00=10Mbps
36817
 GG82563_PSSR_SPEED_100MBPSGG82563_PSSR_SPEED_100MBPS 0x4000 e1000_hw.h 01=100Mbps
36818
 GG82563_PSSR_SPEED_1000MBPSGG82563_PSSR_SPEED_1000MBPS 0x8000 e1000_hw.h 10=1000Mbps
36819
 GG82563_PSSR2_JABBERGG82563_PSSR2_JABBER 0x0001 e1000_hw.h 1=Jabber
36820
 GG82563_PSSR2_POLARITY_CHANGEDGG82563_PSSR2_POLARITY_CHANGED 0x0002 e1000_hw.h 1=Polarity Changed
36821
 GG82563_PSSR2_ENERGY_DETECT_CHAGG82563_PSSR2_ENERGY_DETECT_CHA 0x0010 e1000_hw.h 1=Energy Detect Changed
36822
 GG82563_PSSR2_DOWNSHIFT_INTERRUGG82563_PSSR2_DOWNSHIFT_INTERRU 0x0020 e1000_hw.h 1=Downshift Detected
36823
 GG82563_PSSR2_MDI_CROSSOVER_CHAGG82563_PSSR2_MDI_CROSSOVER_CHA 0x0040 e1000_hw.h 1=Crossover Changed
36824
 GG82563_PSSR2_FALSE_CARRIERGG82563_PSSR2_FALSE_CARRIER 0x0100 e1000_hw.h 1=False Carrier
36825
 GG82563_PSSR2_SYMBOL_ERRORGG82563_PSSR2_SYMBOL_ERROR 0x0200 e1000_hw.h 1=Symbol Error
36826
 GG82563_PSSR2_LINK_STATUS_CHANGGG82563_PSSR2_LINK_STATUS_CHANG 0x0400 e1000_hw.h 1=Link Status Changed
36827
 GG82563_PSSR2_AUTO_NEG_COMPLETEGG82563_PSSR2_AUTO_NEG_COMPLETE 0x0800 e1000_hw.h 1=Auto-Neg Completed
36828
 GG82563_PSSR2_PAGE_RECEIVEDGG82563_PSSR2_PAGE_RECEIVED 0x1000 e1000_hw.h 1=Page Received
36829
 GG82563_PSSR2_DUPLEX_CHANGEDGG82563_PSSR2_DUPLEX_CHANGED 0x2000 e1000_hw.h 1=Duplex Changed
36830
 GG82563_PSSR2_SPEED_CHANGEDGG82563_PSSR2_SPEED_CHANGED 0x4000 e1000_hw.h 1=Speed Changed
36831
 GG82563_PSSR2_AUTO_NEG_ERRORGG82563_PSSR2_AUTO_NEG_ERROR 0x8000 e1000_hw.h 1=Auto-Neg Error
36832
 GG82563_PSCR2_10BT_POLARITY_FORGG82563_PSCR2_10BT_POLARITY_FOR 0x0002 e1000_hw.h 1=Force Negative Polarity
36833
 GG82563_PSCR2_1000MB_TEST_SELECGG82563_PSCR2_1000MB_TEST_SELEC 0x000C e1000_hw.h 　
36834
 GG82563_PSCR2_1000MB_TEST_SELECGG82563_PSCR2_1000MB_TEST_SELEC 0x0000 e1000_hw.h 00,01=Normal Operation
36835
 GG82563_PSCR2_1000MB_TEST_SELECGG82563_PSCR2_1000MB_TEST_SELEC 0x0008 e1000_hw.h 10=Select 112ns Sequence
36836
 GG82563_PSCR2_1000MB_TEST_SELECGG82563_PSCR2_1000MB_TEST_SELEC 0x000C e1000_hw.h 11=Select 16ns Sequence
36837
 GG82563_PSCR2_REVERSE_AUTO_NEGGG82563_PSCR2_REVERSE_AUTO_NEG 0x2000 e1000_hw.h 1=Reverse Auto-Negotiation
36838
 GG82563_PSCR2_1000BT_DISABLEGG82563_PSCR2_1000BT_DISABLE 0x4000 e1000_hw.h 1=Disable 1000BASE-T
36839
 GG82563_PSCR2_TRANSMITER_TYPE_MGG82563_PSCR2_TRANSMITER_TYPE_M 0x8000 e1000_hw.h 　
36840
 GG82563_PSCR2_TRANSMITTER_TYPE_GG82563_PSCR2_TRANSMITTER_TYPE_ 0x0000 e1000_hw.h 0=Class B
36841
 GG82563_PSCR2_TRANSMITTER_TYPE_GG82563_PSCR2_TRANSMITTER_TYPE_ 0x8000 e1000_hw.h 1=Class A
36842
 GG82563_MSCR_TX_CLK_MASKGG82563_MSCR_TX_CLK_MASK 0x0007 e1000_hw.h 　
36843
 GG82563_MSCR_TX_CLK_10MBPS_2_5MGG82563_MSCR_TX_CLK_10MBPS_2_5M 0x0004 e1000_hw.h 　
36844
 GG82563_MSCR_TX_CLK_100MBPS_25MGG82563_MSCR_TX_CLK_100MBPS_25M 0x0005 e1000_hw.h 　
36845
 GG82563_MSCR_TX_CLK_1000MBPS_2_GG82563_MSCR_TX_CLK_1000MBPS_2_ 0x0006 e1000_hw.h 　
36846
 GG82563_MSCR_TX_CLK_1000MBPS_25GG82563_MSCR_TX_CLK_1000MBPS_25 0x0007 e1000_hw.h 　
36847
 GG82563_MSCR_ASSERT_CRS_ON_TXGG82563_MSCR_ASSERT_CRS_ON_TX 0x0010 e1000_hw.h 1=Assert
36848
 GG82563_DSPD_CABLE_LENGTHGG82563_DSPD_CABLE_LENGTH 0x0007 e1000_hw.h 0 = <50M;
36849
 GG82563_KMCR_PHY_LEDS_ENGG82563_KMCR_PHY_LEDS_EN 0x0020 e1000_hw.h 1=PHY LEDs, 0=Kumeran Inband LEDs
36850
 GG82563_KMCR_FORCE_LINK_UPGG82563_KMCR_FORCE_LINK_UP 0x0040 e1000_hw.h 1=Force Link Up
36851
 GG82563_KMCR_SUPPRESS_SGMII_EPDGG82563_KMCR_SUPPRESS_SGMII_EPD 0x0080 e1000_hw.h 　
36852
 GG82563_KMCR_MDIO_BUS_SPEED_SELGG82563_KMCR_MDIO_BUS_SPEED_SEL 0x0400 e1000_hw.h 　
36853
 GG82563_KMCR_MDIO_BUS_SPEED_SELGG82563_KMCR_MDIO_BUS_SPEED_SEL 0x0400 e1000_hw.h 1=6.25MHz, 0=0.8MHz
36854
 GG82563_KMCR_PASS_FALSE_CARRIERGG82563_KMCR_PASS_FALSE_CARRIER 0x0800 e1000_hw.h 　
36855
 GG82563_PMCR_ENABLE_ELECTRICAL_GG82563_PMCR_ENABLE_ELECTRICAL_ 0x0001 e1000_hw.h 1=Enalbe SERDES Electrical Idle
36856
 GG82563_PMCR_DISABLE_PORTGG82563_PMCR_DISABLE_PORT 0x0002 e1000_hw.h 1=Disable Port
36857
 GG82563_PMCR_DISABLE_SERDESGG82563_PMCR_DISABLE_SERDES 0x0004 e1000_hw.h 1=Disable SERDES
36858
 GG82563_PMCR_REVERSE_AUTO_NEGGG82563_PMCR_REVERSE_AUTO_NEG 0x0008 e1000_hw.h 1=Enable Reverse Auto-Negotiation
36859
 GG82563_PMCR_DISABLE_1000_NON_DGG82563_PMCR_DISABLE_1000_NON_D 0x0010 e1000_hw.h 1=Disable 1000Mbps Auto-Neg in non D0
36860
 GG82563_PMCR_DISABLE_1000GG82563_PMCR_DISABLE_1000 0x0020 e1000_hw.h 1=Disable 1000Mbps Auto-Neg Always
36861
 GG82563_PMCR_REVERSE_AUTO_NEG_DGG82563_PMCR_REVERSE_AUTO_NEG_D 0x0040 e1000_hw.h 1=Enable D0a Reverse Auto-Negotiation
36862
 GG82563_PMCR_FORCE_POWER_STATEGG82563_PMCR_FORCE_POWER_STATE 0x0080 e1000_hw.h 1=Force Power State
36863
 GG82563_PMCR_PROGRAMMED_POWER_SGG82563_PMCR_PROGRAMMED_POWER_S 0x0300 e1000_hw.h 　
36864
 GG82563_PMCR_PROGRAMMED_POWER_SGG82563_PMCR_PROGRAMMED_POWER_S 0x0000 e1000_hw.h 00=Dr
36865
 GG82563_PMCR_PROGRAMMED_POWER_SGG82563_PMCR_PROGRAMMED_POWER_S 0x0100 e1000_hw.h 01=D0u
36866
 GG82563_PMCR_PROGRAMMED_POWER_SGG82563_PMCR_PROGRAMMED_POWER_S 0x0200 e1000_hw.h 10=D0a
36867
 GG82563_PMCR_PROGRAMMED_POWER_SGG82563_PMCR_PROGRAMMED_POWER_S 0x0300 e1000_hw.h 11=D3
36868
 GG82563_ICR_DIS_PADDINGGG82563_ICR_DIS_PADDING 0x0010 e1000_hw.h Disable Padding Use
36869
 M88_VENDORM88_VENDOR 0x0141 e1000_hw.h 　
36870
 M88E1000_E_PHY_IDM88E1000_E_PHY_ID 0x01410C50 e1000_hw.h 　
36871
 M88E1000_I_PHY_IDM88E1000_I_PHY_ID 0x01410C30 e1000_hw.h 　
36872
 M88E1011_I_PHY_IDM88E1011_I_PHY_ID 0x01410C20 e1000_hw.h 　
36873
 IGP01E1000_I_PHY_IDIGP01E1000_I_PHY_ID 0x02A80380 e1000_hw.h 　
36874
 M88E1000_12_PHY_IDM88E1000_12_PHY_ID M88E1000_E_PHY_ID e1000_hw.h 　
36875
 M88E1000_14_PHY_IDM88E1000_14_PHY_ID M88E1000_E_PHY_ID e1000_hw.h 　
36876
 M88E1011_I_REV_4M88E1011_I_REV_4 0x04 e1000_hw.h 　
36877
 M88E1111_I_PHY_IDM88E1111_I_PHY_ID 0x01410CC0 e1000_hw.h 　
36878
 L1LXT971A_PHY_IDL1LXT971A_PHY_ID 0x001378E0 e1000_hw.h 　
36879
 GG82563_E_PHY_IDGG82563_E_PHY_ID 0x01410CA0 e1000_hw.h 　
36880
 PHY_PAGE_SHIFTPHY_PAGE_SHIFT 5 e1000_hw.h 　
36881
 IGP3_PHY_PORT_CTRLIGP3_PHY_PORT_CTRL PHY_REG(769, 17) e1000_hw.h Port General Configuration
36882
 IGP3_PHY_RATE_ADAPT_CTRLIGP3_PHY_RATE_ADAPT_CTRL PHY_REG(769, 25) e1000_hw.h Rate Adapter Control Register
36883
 IGP3_KMRN_FIFO_CTRL_STATSIGP3_KMRN_FIFO_CTRL_STATS PHY_REG(770, 16) e1000_hw.h KMRN FIFO's control/status register
36884
 IGP3_KMRN_POWER_MNG_CTRLIGP3_KMRN_POWER_MNG_CTRL PHY_REG(770, 17) e1000_hw.h KMRN Power Management Control Register
36885
 IGP3_KMRN_INBAND_CTRLIGP3_KMRN_INBAND_CTRL PHY_REG(770, 18) e1000_hw.h KMRN Inband Control Register
36886
 IGP3_KMRN_DIAGIGP3_KMRN_DIAG PHY_REG(770, 19) e1000_hw.h KMRN Diagnostic register
36887
 IGP3_KMRN_DIAG_PCS_LOCK_LOSSIGP3_KMRN_DIAG_PCS_LOCK_LOSS 0x0002 e1000_hw.h RX PCS is not synced
36888
 IGP3_KMRN_ACK_TIMEOUTIGP3_KMRN_ACK_TIMEOUT PHY_REG(770, 20) e1000_hw.h KMRN Acknowledge Timeouts register
36889
 IGP3_VR_CTRLIGP3_VR_CTRL PHY_REG(776, 18) e1000_hw.h Voltage regulator control register
36890
 IGP3_VR_CTRL_MODE_SHUTIGP3_VR_CTRL_MODE_SHUT 0x0200 e1000_hw.h Enter powerdown, shutdown VRs
36891
 IGP3_VR_CTRL_MODE_MASKIGP3_VR_CTRL_MODE_MASK 0x0300 e1000_hw.h Shutdown VR Mask
36892
 IGP3_CAPABILITYIGP3_CAPABILITY PHY_REG(776, 19) e1000_hw.h IGP3 Capability Register
36893
 IGP3_CAP_INITIATE_TEAMIGP3_CAP_INITIATE_TEAM 0x0001 e1000_hw.h Able to initiate a team
36894
 IGP3_CAP_WFMIGP3_CAP_WFM 0x0002 e1000_hw.h Support WoL and PXE
36895
 IGP3_CAP_ASFIGP3_CAP_ASF 0x0004 e1000_hw.h Support ASF
36896
 IGP3_CAP_LPLUIGP3_CAP_LPLU 0x0008 e1000_hw.h Support Low Power Link Up
36897
 IGP3_CAP_DC_AUTO_SPEEDIGP3_CAP_DC_AUTO_SPEED 0x0010 e1000_hw.h Support AC/DC Auto Link Speed
36898
 IGP3_CAP_SPDIGP3_CAP_SPD 0x0020 e1000_hw.h Support Smart Power Down
36899
 IGP3_CAP_MULT_QUEUEIGP3_CAP_MULT_QUEUE 0x0040 e1000_hw.h Support 2 tx & 2 rx queues
36900
 IGP3_CAP_RSSIGP3_CAP_RSS 0x0080 e1000_hw.h Support RSS
36901
 IGP3_CAP_8021PQIGP3_CAP_8021PQ 0x0100 e1000_hw.h Support 802.1Q & 802.1p
36902
 IGP3_CAP_AMT_CBIGP3_CAP_AMT_CB 0x0200 e1000_hw.h Support active manageability and circuit breaker
36903
 IGP3_PPC_JORDAN_ENIGP3_PPC_JORDAN_EN 0x0001 e1000_hw.h 　
36904
 IGP3_PPC_JORDAN_GIGA_SPEEDIGP3_PPC_JORDAN_GIGA_SPEED 0x0002 e1000_hw.h 　
36905
 IGP3_KMRN_PMC_EE_IDLE_LINK_DISIGP3_KMRN_PMC_EE_IDLE_LINK_DIS 0x0001 e1000_hw.h 　
36906
 IGP3_KMRN_PMC_K0S_ENTRY_LATENCYIGP3_KMRN_PMC_K0S_ENTRY_LATENCY 0x001E e1000_hw.h 　
36907
 IGP3_KMRN_PMC_K0S_MODE1_EN_GIGAIGP3_KMRN_PMC_K0S_MODE1_EN_GIGA 0x0020 e1000_hw.h 　
36908
 IGP3_KMRN_PMC_K0S_MODE1_EN_100IGP3_KMRN_PMC_K0S_MODE1_EN_100 0x0040 e1000_hw.h 　
36909
 IGP3E1000_PHY_MISC_CTRLIGP3E1000_PHY_MISC_CTRL 0x1B e1000_hw.h Misc. Ctrl register
36910
 IGP3_PHY_MISC_DUPLEX_MANUAL_SETIGP3_PHY_MISC_DUPLEX_MANUAL_SET 0x1000 e1000_hw.h Duplex Manual Set
36911
 IGP3_KMRN_EXT_CTRLIGP3_KMRN_EXT_CTRL PHY_REG(770, 18) e1000_hw.h 　
36912
 IGP3_KMRN_EC_DIS_INBANDIGP3_KMRN_EC_DIS_INBAND 0x0080 e1000_hw.h 　
36913
 IGP03E1000_E_PHY_IDIGP03E1000_E_PHY_ID 0x02A80390 e1000_hw.h 　
36914
 IFE_E_PHY_IDIFE_E_PHY_ID 0x02A80330 e1000_hw.h 10/100 PHY
36915
 IFE_PLUS_E_PHY_IDIFE_PLUS_E_PHY_ID 0x02A80320 e1000_hw.h 　
36916
 IFE_C_E_PHY_IDIFE_C_E_PHY_ID 0x02A80310 e1000_hw.h 　
36917
 IFE_PHY_EXTENDED_STATUS_CONTROLIFE_PHY_EXTENDED_STATUS_CONTROL 0x10 e1000_hw.h 100BaseTx Extended Status, Control and Address
36918
 IFE_PHY_SPECIAL_CONTROLIFE_PHY_SPECIAL_CONTROL 0x11 e1000_hw.h 100BaseTx PHY special control register
36919
 IFE_PHY_RCV_FALSE_CARRIERIFE_PHY_RCV_FALSE_CARRIER 0x13 e1000_hw.h 100BaseTx Receive False Carrier Counter
36920
 IFE_PHY_RCV_DISCONNECTIFE_PHY_RCV_DISCONNECT 0x14 e1000_hw.h 100BaseTx Receive Disconnet Counter
36921
 IFE_PHY_RCV_ERROT_FRAMEIFE_PHY_RCV_ERROT_FRAME 0x15 e1000_hw.h 100BaseTx Receive Error Frame Counter
36922
 IFE_PHY_RCV_SYMBOL_ERRIFE_PHY_RCV_SYMBOL_ERR 0x16 e1000_hw.h Receive Symbol Error Counter
36923
 IFE_PHY_PREM_EOF_ERRIFE_PHY_PREM_EOF_ERR 0x17 e1000_hw.h 100BaseTx Receive Premature End Of Frame Error Counter
36924
 IFE_PHY_RCV_EOF_ERRIFE_PHY_RCV_EOF_ERR 0x18 e1000_hw.h 10BaseT Receive End Of Frame Error Counter
36925
 IFE_PHY_TX_JABBER_DETECTIFE_PHY_TX_JABBER_DETECT 0x19 e1000_hw.h 10BaseT Transmit Jabber Detect Counter
36926
 IFE_PHY_EQUALIZERIFE_PHY_EQUALIZER 0x1A e1000_hw.h PHY Equalizer Control and Status
36927
 IFE_PHY_SPECIAL_CONTROL_LEDIFE_PHY_SPECIAL_CONTROL_LED 0x1B e1000_hw.h PHY special control and LED configuration
36928
 IFE_PHY_MDIX_CONTROLIFE_PHY_MDIX_CONTROL 0x1C e1000_hw.h MDI/MDI-X Control register
36929
 IFE_PHY_HWI_CONTROLIFE_PHY_HWI_CONTROL 0x1D e1000_hw.h Hardware Integrity Control (HWI)
36930
 IFE_PESC_REDUCED_POWER_DOWN_DISIFE_PESC_REDUCED_POWER_DOWN_DIS 0x2000 e1000_hw.h Defaut 1 = Disable auto reduced power down
36931
 IFE_PESC_100BTX_POWER_DOWNIFE_PESC_100BTX_POWER_DOWN 0x0400 e1000_hw.h Indicates the power state of 100BASE-TX
36932
 IFE_PESC_10BTX_POWER_DOWNIFE_PESC_10BTX_POWER_DOWN 0x0200 e1000_hw.h Indicates the power state of 10BASE-T
36933
 IFE_PESC_POLARITY_REVERSEDIFE_PESC_POLARITY_REVERSED 0x0100 e1000_hw.h Indicates 10BASE-T polarity
36934
 IFE_PESC_PHY_ADDR_MASKIFE_PESC_PHY_ADDR_MASK 0x007C e1000_hw.h Bit 6:2 for sampled PHY address
36935
 IFE_PESC_SPEEDIFE_PESC_SPEED 0x0002 e1000_hw.h Auto-negotiation speed result 1=100Mbs, 0=10Mbs
36936
 IFE_PESC_DUPLEXIFE_PESC_DUPLEX 0x0001 e1000_hw.h Auto-negotiation duplex result 1=Full, 0=Half
36937
 IFE_PESC_POLARITY_REVERSED_SHIFIFE_PESC_POLARITY_REVERSED_SHIF 8 e1000_hw.h 　
36938
 IFE_PSC_DISABLE_DYNAMIC_POWER_DIFE_PSC_DISABLE_DYNAMIC_POWER_D 0x0100 e1000_hw.h 1 = Dyanmic Power Down disabled
36939
 IFE_PSC_FORCE_POLARITYIFE_PSC_FORCE_POLARITY 0x0020 e1000_hw.h 1=Reversed Polarity, 0=Normal
36940
 IFE_PSC_AUTO_POLARITY_DISABLEIFE_PSC_AUTO_POLARITY_DISABLE 0x0010 e1000_hw.h 1=Auto Polarity Disabled, 0=Enabled
36941
 IFE_PSC_JABBER_FUNC_DISABLEIFE_PSC_JABBER_FUNC_DISABLE 0x0001 e1000_hw.h 1=Jabber Disabled, 0=Normal Jabber Operation
36942
 IFE_PSC_FORCE_POLARITY_SHIFTIFE_PSC_FORCE_POLARITY_SHIFT 5 e1000_hw.h 　
36943
 IFE_PSC_AUTO_POLARITY_DISABLE_SIFE_PSC_AUTO_POLARITY_DISABLE_S 4 e1000_hw.h 　
36944
 IFE_PMC_AUTO_MDIXIFE_PMC_AUTO_MDIX 0x0080 e1000_hw.h 1=enable MDI/MDI-X feature, default 0=disabled
36945
 IFE_PMC_FORCE_MDIXIFE_PMC_FORCE_MDIX 0x0040 e1000_hw.h 1=force MDIX-X, 0=force MDI
36946
 IFE_PMC_MDIX_STATUSIFE_PMC_MDIX_STATUS 0x0020 e1000_hw.h 1=MDI-X, 0=MDI
36947
 IFE_PMC_AUTO_MDIX_COMPLETEIFE_PMC_AUTO_MDIX_COMPLETE 0x0010 e1000_hw.h Resolution algorithm is completed
36948
 IFE_PMC_MDIX_MODE_SHIFTIFE_PMC_MDIX_MODE_SHIFT 6 e1000_hw.h 　
36949
 IFE_PHC_MDIX_RESET_ALL_MASKIFE_PHC_MDIX_RESET_ALL_MASK 0x0000 e1000_hw.h Disable auto MDI-X
36950
 IFE_PHC_HWI_ENABLEIFE_PHC_HWI_ENABLE 0x8000 e1000_hw.h Enable the HWI feature
36951
 IFE_PHC_ABILITY_CHECKIFE_PHC_ABILITY_CHECK 0x4000 e1000_hw.h 1= Test Passed, 0=failed
36952
 IFE_PHC_TEST_EXECIFE_PHC_TEST_EXEC 0x2000 e1000_hw.h PHY launch test pulses on the wire
36953
 IFE_PHC_HIGHZIFE_PHC_HIGHZ 0x0200 e1000_hw.h 1 = Open Circuit
36954
 IFE_PHC_LOWZIFE_PHC_LOWZ 0x0400 e1000_hw.h 1 = Short Circuit
36955
 IFE_PHC_LOW_HIGH_Z_MASKIFE_PHC_LOW_HIGH_Z_MASK 0x0600 e1000_hw.h Mask for indication type of problem on the line
36956
 IFE_PHC_DISTANCE_MASKIFE_PHC_DISTANCE_MASK 0x01FF e1000_hw.h Mask for distance to the cable problem, in 80cm granularity
36957
 IFE_PHC_RESET_ALL_MASKIFE_PHC_RESET_ALL_MASK 0x0000 e1000_hw.h Disable HWI
36958
 IFE_PSCL_PROBE_MODEIFE_PSCL_PROBE_MODE 0x0020 e1000_hw.h LED Probe mode
36959
 IFE_PSCL_PROBE_LEDS_OFFIFE_PSCL_PROBE_LEDS_OFF 0x0006 e1000_hw.h Force LEDs 0 and 2 off
36960
 IFE_PSCL_PROBE_LEDS_ONIFE_PSCL_PROBE_LEDS_ON 0x0007 e1000_hw.h Force LEDs 0 and 2 on
36961
 ICH_FLASH_COMMAND_TIMEOUTICH_FLASH_COMMAND_TIMEOUT 5000 e1000_hw.h 5000 uSecs - adjusted
36962
 ICH_FLASH_ERASE_TIMEOUTICH_FLASH_ERASE_TIMEOUT 3000000 e1000_hw.h Up to 3 seconds - worst case
36963
 ICH_FLASH_CYCLE_REPEAT_COUNTICH_FLASH_CYCLE_REPEAT_COUNT 10 e1000_hw.h 10 cycles
36964
 ICH_FLASH_SEG_SIZE_256ICH_FLASH_SEG_SIZE_256 256 e1000_hw.h 　
36965
 ICH_FLASH_SEG_SIZE_4KICH_FLASH_SEG_SIZE_4K 4096 e1000_hw.h 　
36966
 ICH_FLASH_SEG_SIZE_64KICH_FLASH_SEG_SIZE_64K 65536 e1000_hw.h 　
36967
 ICH_CYCLE_READICH_CYCLE_READ 0x0 e1000_hw.h 　
36968
 ICH_CYCLE_RESERVEDICH_CYCLE_RESERVED 0x1 e1000_hw.h 　
36969
 ICH_CYCLE_WRITEICH_CYCLE_WRITE 0x2 e1000_hw.h 　
36970
 ICH_CYCLE_ERASEICH_CYCLE_ERASE 0x3 e1000_hw.h 　
36971
 ICH_FLASH_GFPREGICH_FLASH_GFPREG 0x0000 e1000_hw.h 　
36972
 ICH_FLASH_HSFSTSICH_FLASH_HSFSTS 0x0004 e1000_hw.h 　
36973
 ICH_FLASH_HSFCTLICH_FLASH_HSFCTL 0x0006 e1000_hw.h 　
36974
 ICH_FLASH_FADDRICH_FLASH_FADDR 0x0008 e1000_hw.h 　
36975
 ICH_FLASH_FDATA0ICH_FLASH_FDATA0 0x0010 e1000_hw.h 　
36976
 ICH_FLASH_FRACCICH_FLASH_FRACC 0x0050 e1000_hw.h 　
36977
 ICH_FLASH_FREG0ICH_FLASH_FREG0 0x0054 e1000_hw.h 　
36978
 ICH_FLASH_FREG1ICH_FLASH_FREG1 0x0058 e1000_hw.h 　
36979
 ICH_FLASH_FREG2ICH_FLASH_FREG2 0x005C e1000_hw.h 　
36980
 ICH_FLASH_FREG3ICH_FLASH_FREG3 0x0060 e1000_hw.h 　
36981
 ICH_FLASH_FPR0ICH_FLASH_FPR0 0x0074 e1000_hw.h 　
36982
 ICH_FLASH_FPR1ICH_FLASH_FPR1 0x0078 e1000_hw.h 　
36983
 ICH_FLASH_SSFSTSICH_FLASH_SSFSTS 0x0090 e1000_hw.h 　
36984
 ICH_FLASH_SSFCTLICH_FLASH_SSFCTL 0x0092 e1000_hw.h 　
36985
 ICH_FLASH_PREOPICH_FLASH_PREOP 0x0094 e1000_hw.h 　
36986
 ICH_FLASH_OPTYPEICH_FLASH_OPTYPE 0x0096 e1000_hw.h 　
36987
 ICH_FLASH_OPMENUICH_FLASH_OPMENU 0x0098 e1000_hw.h 　
36988
 ICH_FLASH_REG_MAPSIZEICH_FLASH_REG_MAPSIZE 0x00A0 e1000_hw.h 　
36989
 ICH_FLASH_SECTOR_SIZEICH_FLASH_SECTOR_SIZE 4096 e1000_hw.h 　
36990
 ICH_GFPREG_BASE_MASKICH_GFPREG_BASE_MASK 0x1FFF e1000_hw.h 　
36991
 ICH_FLASH_LINEAR_ADDR_MASKICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF e1000_hw.h 　
36992
 PHY_PREAMBLEPHY_PREAMBLE 0xFFFFFFFF e1000_hw.h 　
36993
 PHY_SOFPHY_SOF 0x01 e1000_hw.h 　
36994
 PHY_OP_READPHY_OP_READ 0x02 e1000_hw.h 　
36995
 PHY_OP_WRITEPHY_OP_WRITE 0x01 e1000_hw.h 　
36996
 PHY_TURNAROUNDPHY_TURNAROUND 0x02 e1000_hw.h 　
36997
 PHY_PREAMBLE_SIZEPHY_PREAMBLE_SIZE 32 e1000_hw.h 　
36998
 MII_CR_SPEED_1000MII_CR_SPEED_1000 0x0040 e1000_hw.h 　
36999
 MII_CR_SPEED_100MII_CR_SPEED_100 0x2000 e1000_hw.h 　
37000
 MII_CR_SPEED_10MII_CR_SPEED_10 0x0000 e1000_hw.h 　
37001
 E1000_PHY_ADDRESSE1000_PHY_ADDRESS 0x01 e1000_hw.h 　
37002
 PHY_AUTO_NEG_TIMEPHY_AUTO_NEG_TIME 45 e1000_hw.h 4.5 Seconds
37003
 PHY_FORCE_TIMEPHY_FORCE_TIME 20 e1000_hw.h 2.0 Seconds
37004
 PHY_REVISION_MASKPHY_REVISION_MASK 0xFFFFFFF0 e1000_hw.h 　
37005
 DEVICE_SPEED_MASKDEVICE_SPEED_MASK 0x00000300 e1000_hw.h Device Ctrl Reg Speed Mask
37006
 REG4_SPEED_MASKREG4_SPEED_MASK 0x01E0 e1000_hw.h 　
37007
 REG9_SPEED_MASKREG9_SPEED_MASK 0x0300 e1000_hw.h 　
37008
 ADVERTISE_10_HALFADVERTISE_10_HALF 0x0001 e1000_hw.h 　
37009
 ADVERTISE_10_FULLADVERTISE_10_FULL 0x0002 e1000_hw.h 　
37010
 ADVERTISE_100_HALFADVERTISE_100_HALF 0x0004 e1000_hw.h 　
37011
 ADVERTISE_100_FULLADVERTISE_100_FULL 0x0008 e1000_hw.h 　
37012
 ADVERTISE_1000_HALFADVERTISE_1000_HALF 0x0010 e1000_hw.h 　
37013
 ADVERTISE_1000_FULLADVERTISE_1000_FULL 0x0020 e1000_hw.h 　
37014
 AUTONEG_ADVERTISE_SPEED_DEFAULTAUTONEG_ADVERTISE_SPEED_DEFAULT 0x002F e1000_hw.h Everything but 1000-Half
37015
 AUTONEG_ADVERTISE_10_100_ALLAUTONEG_ADVERTISE_10_100_ALL 0x000F e1000_hw.h All 10/100 speeds
37016
 AUTONEG_ADVERTISE_10_ALLAUTONEG_ADVERTISE_10_ALL 0x0003 e1000_hw.h 10Mbps Full & Half speeds
37017
 DEBUGOUT2DEBUGOUT2 DEBUGOUT1 e1000_osdep.h 　
37018
 DEBUGOUT3DEBUGOUT3 DEBUGOUT1 e1000_osdep.h 　
37019
 DEBUGOUT7DEBUGOUT7 DEBUGOUT1 e1000_osdep.h 　
37020
 E1000_READ_REG_ARRAY_DWORDE1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY e1000_osdep.h 　
37021
 E1000_WRITE_REG_ARRAY_DWORDE1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY e1000_osdep.h 　
37022
 PHN_MAX_NUM_PORTSPHN_MAX_NUM_PORTS 4 phantom.c 　
37023
 PHN_CMDPEG_INIT_TIMEOUT_SECPHN_CMDPEG_INIT_TIMEOUT_SEC 50 phantom.c 　
37024
 PHN_RCVPEG_INIT_TIMEOUT_SECPHN_RCVPEG_INIT_TIMEOUT_SEC 2 phantom.c 　
37025
 PHN_ISSUE_CMD_TIMEOUT_MSPHN_ISSUE_CMD_TIMEOUT_MS 2000 phantom.c 　
37026
 PHN_TEST_MEM_TIMEOUT_MSPHN_TEST_MEM_TIMEOUT_MS 100 phantom.c 　
37027
 PHN_CLP_CMD_TIMEOUT_MSPHN_CLP_CMD_TIMEOUT_MS 500 phantom.c 　
37028
 PHN_LINK_POLL_FREQUENCYPHN_LINK_POLL_FREQUENCY 4096 phantom.c 　
37029
 PHN_NUM_RDSPHN_NUM_RDS 32 phantom.c 　
37030
 PHN_RDS_MAX_FILLPHN_RDS_MAX_FILL 16 phantom.c 　
37031
 PHN_RX_BUFSIZEPHN_RX_BUFSIZE ( 32 + \ ETH_FRAME_LEN ) phantom.c 　
37032
 PHN_NUM_SDSPHN_NUM_SDS 32 phantom.c 　
37033
 PHN_NUM_CDSPHN_NUM_CDS 8 phantom.c 　
37034
 PHN_CLP_TAG_MAGICPHN_CLP_TAG_MAGIC 0xc19c1900UL phantom.c 　
37035
 PHN_CLP_TAG_MAGIC_MASKPHN_CLP_TAG_MAGIC_MASK 0xffffff00UL phantom.c 　
37036
 PHN_CLP_BLKSIZEPHN_CLP_BLKSIZE ( sizeof ( union phantom_clp_data ) ) phantom.c 　
37037
 NX_CDRP_CLEARNX_CDRP_CLEAR 0x00000000 nxhal_nic_interface.h 　
37038
 NX_CDRP_CMD_BITNX_CDRP_CMD_BIT 0x80000000 nxhal_nic_interface.h 　
37039
 NX_CDRP_RSP_OKNX_CDRP_RSP_OK 0x00000001 nxhal_nic_interface.h 　
37040
 NX_CDRP_RSP_FAILNX_CDRP_RSP_FAIL 0x00000002 nxhal_nic_interface.h 　
37041
 NX_CDRP_RSP_TIMEOUTNX_CDRP_RSP_TIMEOUT 0x00000003 nxhal_nic_interface.h 　
37042
 NX_CDRP_CMD_SUBMIT_CAPABILITIESNX_CDRP_CMD_SUBMIT_CAPABILITIES 0x00000001 nxhal_nic_interface.h 　
37043
 NX_CDRP_CMD_READ_MAX_RDS_PER_CTNX_CDRP_CMD_READ_MAX_RDS_PER_CT 0x00000002 nxhal_nic_interface.h 　
37044
 NX_CDRP_CMD_READ_MAX_SDS_PER_CTNX_CDRP_CMD_READ_MAX_SDS_PER_CT 0x00000003 nxhal_nic_interface.h 　
37045
 NX_CDRP_CMD_READ_MAX_RULES_PER_NX_CDRP_CMD_READ_MAX_RULES_PER_ 0x00000004 nxhal_nic_interface.h 　
37046
 NX_CDRP_CMD_READ_MAX_RX_CTXNX_CDRP_CMD_READ_MAX_RX_CTX 0x00000005 nxhal_nic_interface.h 　
37047
 NX_CDRP_CMD_READ_MAX_TX_CTXNX_CDRP_CMD_READ_MAX_TX_CTX 0x00000006 nxhal_nic_interface.h 　
37048
 NX_CDRP_CMD_CREATE_RX_CTXNX_CDRP_CMD_CREATE_RX_CTX 0x00000007 nxhal_nic_interface.h 　
37049
 NX_CDRP_CMD_DESTROY_RX_CTXNX_CDRP_CMD_DESTROY_RX_CTX 0x00000008 nxhal_nic_interface.h 　
37050
 NX_CDRP_CMD_CREATE_TX_CTXNX_CDRP_CMD_CREATE_TX_CTX 0x00000009 nxhal_nic_interface.h 　
37051
 NX_CDRP_CMD_DESTROY_TX_CTXNX_CDRP_CMD_DESTROY_TX_CTX 0x0000000a nxhal_nic_interface.h 　
37052
 NX_CDRP_CMD_SETUP_STATISTICSNX_CDRP_CMD_SETUP_STATISTICS 0x0000000e nxhal_nic_interface.h 　
37053
 NX_CDRP_CMD_GET_STATISTICSNX_CDRP_CMD_GET_STATISTICS 0x0000000f nxhal_nic_interface.h 　
37054
 NX_CDRP_CMD_DELETE_STATISTICSNX_CDRP_CMD_DELETE_STATISTICS 0x00000010 nxhal_nic_interface.h 　
37055
 NX_CDRP_CMD_MAXNX_CDRP_CMD_MAX 0x00000011 nxhal_nic_interface.h 　
37056
 NX_CAP0_LEGACY_CONTEXTNX_CAP0_LEGACY_CONTEXT NX_CAP_BIT(0, 0) nxhal_nic_interface.h 　
37057
 NX_CAP0_MULTI_CONTEXTNX_CAP0_MULTI_CONTEXT NX_CAP_BIT(0, 1) nxhal_nic_interface.h 　
37058
 NX_CAP0_LEGACY_MNNX_CAP0_LEGACY_MN NX_CAP_BIT(0, 2) nxhal_nic_interface.h 　
37059
 NX_CAP0_LEGACY_MSNX_CAP0_LEGACY_MS NX_CAP_BIT(0, 3) nxhal_nic_interface.h 　
37060
 NX_CAP0_CUT_THROUGHNX_CAP0_CUT_THROUGH NX_CAP_BIT(0, 4) nxhal_nic_interface.h 　
37061
 NX_CAP0_LRONX_CAP0_LRO NX_CAP_BIT(0, 5) nxhal_nic_interface.h 　
37062
 NX_CAP0_LSONX_CAP0_LSO NX_CAP_BIT(0, 6) nxhal_nic_interface.h 　
37063
 NX_CAP1_NICNX_CAP1_NIC NX_CAP_BIT(1, 0) nxhal_nic_interface.h 　
37064
 NX_CAP1_PXENX_CAP1_PXE NX_CAP_BIT(1, 1) nxhal_nic_interface.h 　
37065
 NX_CAP1_CHIMNEYNX_CAP1_CHIMNEY NX_CAP_BIT(1, 2) nxhal_nic_interface.h 　
37066
 NX_CAP1_LSANX_CAP1_LSA NX_CAP_BIT(1, 3) nxhal_nic_interface.h 　
37067
 NX_CAP1_RDMANX_CAP1_RDMA NX_CAP_BIT(1, 4) nxhal_nic_interface.h 　
37068
 NX_CAP1_ISCSINX_CAP1_ISCSI NX_CAP_BIT(1, 5) nxhal_nic_interface.h 　
37069
 NX_CAP1_FCOENX_CAP1_FCOE NX_CAP_BIT(1, 6) nxhal_nic_interface.h 　
37070
 NX_RX_RULETYPE_DEFAULTNX_RX_RULETYPE_DEFAULT 0 nxhal_nic_interface.h 　
37071
 NX_RX_RULETYPE_MACNX_RX_RULETYPE_MAC 1 nxhal_nic_interface.h 　
37072
 NX_RX_RULETYPE_MAC_VLANNX_RX_RULETYPE_MAC_VLAN 2 nxhal_nic_interface.h 　
37073
 NX_RX_RULETYPE_MAC_RSSNX_RX_RULETYPE_MAC_RSS 3 nxhal_nic_interface.h 　
37074
 NX_RX_RULETYPE_MAC_VLAN_RSSNX_RX_RULETYPE_MAC_VLAN_RSS 4 nxhal_nic_interface.h 　
37075
 NX_RX_RULETYPE_MAXNX_RX_RULETYPE_MAX 5 nxhal_nic_interface.h 　
37076
 NX_RX_RULECMD_ADDNX_RX_RULECMD_ADD 0 nxhal_nic_interface.h 　
37077
 NX_RX_RULECMD_REMOVENX_RX_RULECMD_REMOVE 1 nxhal_nic_interface.h 　
37078
 NX_RX_RULECMD_MAXNX_RX_RULECMD_MAX 2 nxhal_nic_interface.h 　
37079
 NX_HOST_CTX_STATE_FREEDNX_HOST_CTX_STATE_FREED 0 nxhal_nic_interface.h Invalid state
37080
 NX_HOST_CTX_STATE_ALLOCATEDNX_HOST_CTX_STATE_ALLOCATED 1 nxhal_nic_interface.h Not committed
37081
 NX_HOST_CTX_STATE_ACTIVENX_HOST_CTX_STATE_ACTIVE 2 nxhal_nic_interface.h 　
37082
 NX_HOST_CTX_STATE_DISABLEDNX_HOST_CTX_STATE_DISABLED 3 nxhal_nic_interface.h 　
37083
 NX_HOST_CTX_STATE_QUIESCEDNX_HOST_CTX_STATE_QUIESCED 4 nxhal_nic_interface.h 　
37084
 NX_HOST_CTX_STATE_MAXNX_HOST_CTX_STATE_MAX 5 nxhal_nic_interface.h 　
37085
 NX_HOST_INT_CRB_MODE_UNIQUENX_HOST_INT_CRB_MODE_UNIQUE 0 nxhal_nic_interface.h 　
37086
 NX_HOST_INT_CRB_MODE_SHAREDNX_HOST_INT_CRB_MODE_SHARED 1 nxhal_nic_interface.h <= LEGACY
37087
 NX_HOST_INT_CRB_MODE_NORXNX_HOST_INT_CRB_MODE_NORX 2 nxhal_nic_interface.h 　
37088
 NX_HOST_INT_CRB_MODE_NOTXNX_HOST_INT_CRB_MODE_NOTX 3 nxhal_nic_interface.h 　
37089
 NX_HOST_INT_CRB_MODE_NORXTXNX_HOST_INT_CRB_MODE_NORXTX 4 nxhal_nic_interface.h 　
37090
 NX_DESTROY_CTX_RESETNX_DESTROY_CTX_RESET 0 nxhal_nic_interface.h 　
37091
 NX_DESTROY_CTX_D3_RESETNX_DESTROY_CTX_D3_RESET 1 nxhal_nic_interface.h 　
37092
 NX_DESTROY_CTX_MAXNX_DESTROY_CTX_MAX 2 nxhal_nic_interface.h 　
37093
 NX_HOST_RDS_CRB_MODE_UNIQUENX_HOST_RDS_CRB_MODE_UNIQUE 0 nxhal_nic_interface.h <= LEGACY
37094
 NX_HOST_RDS_CRB_MODE_SHAREDNX_HOST_RDS_CRB_MODE_SHARED 1 nxhal_nic_interface.h 　
37095
 NX_HOST_RDS_CRB_MODE_CUSTOMNX_HOST_RDS_CRB_MODE_CUSTOM 2 nxhal_nic_interface.h 　
37096
 NX_HOST_RDS_CRB_MODE_MAXNX_HOST_RDS_CRB_MODE_MAX 3 nxhal_nic_interface.h 　
37097
 NX_RDS_RING_TYPE_NORMALNX_RDS_RING_TYPE_NORMAL 0 nxhal_nic_interface.h 　
37098
 NX_RDS_RING_TYPE_JUMBONX_RDS_RING_TYPE_JUMBO 1 nxhal_nic_interface.h 　
37099
 NX_RDS_RING_TYPE_LRONX_RDS_RING_TYPE_LRO 2 nxhal_nic_interface.h 　
37100
 NX_RDS_RING_TYPE_MAXNX_RDS_RING_TYPE_MAX 3 nxhal_nic_interface.h 　
37101
 NX_STATISTICS_MODE_INVALIDNX_STATISTICS_MODE_INVALID 0 nxhal_nic_interface.h 　
37102
 NX_STATISTICS_MODE_PULLNX_STATISTICS_MODE_PULL 1 nxhal_nic_interface.h 　
37103
 NX_STATISTICS_MODE_PUSHNX_STATISTICS_MODE_PUSH 2 nxhal_nic_interface.h 　
37104
 NX_STATISTICS_MODE_SINGLE_SHOTNX_STATISTICS_MODE_SINGLE_SHOT 3 nxhal_nic_interface.h 　
37105
 NX_STATISTICS_MODE_MAXNX_STATISTICS_MODE_MAX 4 nxhal_nic_interface.h 　
37106
 NX_STATISTICS_TYPE_INVALIDNX_STATISTICS_TYPE_INVALID 0 nxhal_nic_interface.h 　
37107
 NX_STATISTICS_TYPE_NIC_RX_CORENX_STATISTICS_TYPE_NIC_RX_CORE 1 nxhal_nic_interface.h 　
37108
 NX_STATISTICS_TYPE_NIC_TX_CORENX_STATISTICS_TYPE_NIC_TX_CORE 2 nxhal_nic_interface.h 　
37109
 NX_STATISTICS_TYPE_NIC_RX_ALLNX_STATISTICS_TYPE_NIC_RX_ALL 3 nxhal_nic_interface.h 　
37110
 NX_STATISTICS_TYPE_NIC_TX_ALLNX_STATISTICS_TYPE_NIC_TX_ALL 4 nxhal_nic_interface.h 　
37111
 NX_STATISTICS_TYPE_MAXNX_STATISTICS_TYPE_MAX 5 nxhal_nic_interface.h 　
37112
 NXHAL_VERSIONNXHAL_VERSION 1 phantom.h 　
37113
 UNM_DMA_BUFFER_ALIGNUNM_DMA_BUFFER_ALIGN 16 phantom.h 　
37114
 __unm_dma_aligned__unm_dma_aligned __attribute__ (( aligned ( UNM_DMA_BUFFER_ALIGN ) )) phantom.h 　
37115
 UNM_128M_CRB_WINDOWUNM_128M_CRB_WINDOW 0x6110210UL phantom.h 　
37116
 UNM_32M_CRB_WINDOWUNM_32M_CRB_WINDOW 0x0110210UL phantom.h 　
37117
 UNM_2M_CRB_WINDOWUNM_2M_CRB_WINDOW 0x0130060UL phantom.h 　
37118
 UNM_CRB_PCIEUNM_CRB_PCIE UNM_CRB_BASE ( UNM_CRB_BLK_PCIE ) phantom.h 　
37119
 UNM_PCIE_SEM2_LOCKUNM_PCIE_SEM2_LOCK ( UNM_CRB_PCIE + 0x1c010 ) phantom.h 　
37120
 UNM_PCIE_SEM2_UNLOCKUNM_PCIE_SEM2_UNLOCK ( UNM_CRB_PCIE + 0x1c014 ) phantom.h 　
37121
 UNM_CRB_CAMUNM_CRB_CAM UNM_CRB_BASE ( UNM_CRB_BLK_CAM ) phantom.h 　
37122
 UNM_CAM_RAMUNM_CAM_RAM ( UNM_CRB_CAM + 0x02000 ) phantom.h 　
37123
 UNM_CAM_RAM_PORT_MODEUNM_CAM_RAM_PORT_MODE ( UNM_CAM_RAM + 0x00024 ) phantom.h 　
37124
 UNM_CAM_RAM_PORT_MODE_AUTO_NEGUNM_CAM_RAM_PORT_MODE_AUTO_NEG 4 phantom.h 　
37125
 UNM_CAM_RAM_PORT_MODE_AUTO_NEG_UNM_CAM_RAM_PORT_MODE_AUTO_NEG_ 5 phantom.h 　
37126
 UNM_CAM_RAM_DMESG_SIG_MAGICUNM_CAM_RAM_DMESG_SIG_MAGIC 0xcafebabeUL phantom.h 　
37127
 UNM_CAM_RAM_NUM_DMESG_BUFFERSUNM_CAM_RAM_NUM_DMESG_BUFFERS 5 phantom.h 　
37128
 UNM_CAM_RAM_CLP_COMMANDUNM_CAM_RAM_CLP_COMMAND ( UNM_CAM_RAM + 0x000c0 ) phantom.h 　
37129
 UNM_CAM_RAM_CLP_COMMAND_LASTUNM_CAM_RAM_CLP_COMMAND_LAST 0x00000080UL phantom.h 　
37130
 UNM_CAM_RAM_CLP_DATA_LOUNM_CAM_RAM_CLP_DATA_LO ( UNM_CAM_RAM + 0x000c4 ) phantom.h 　
37131
 UNM_CAM_RAM_CLP_DATA_HIUNM_CAM_RAM_CLP_DATA_HI ( UNM_CAM_RAM + 0x000c8 ) phantom.h 　
37132
 UNM_CAM_RAM_CLP_STATUSUNM_CAM_RAM_CLP_STATUS ( UNM_CAM_RAM + 0x000cc ) phantom.h 　
37133
 UNM_CAM_RAM_CLP_STATUS_STARTUNM_CAM_RAM_CLP_STATUS_START 0x00000001UL phantom.h 　
37134
 UNM_CAM_RAM_CLP_STATUS_DONEUNM_CAM_RAM_CLP_STATUS_DONE 0x00000002UL phantom.h 　
37135
 UNM_CAM_RAM_CLP_STATUS_ERRORUNM_CAM_RAM_CLP_STATUS_ERROR 0x0000ff00UL phantom.h 　
37136
 UNM_CAM_RAM_CLP_STATUS_UNINITIAUNM_CAM_RAM_CLP_STATUS_UNINITIA 0xffffffffUL phantom.h 　
37137
 UNM_CAM_RAM_BOOT_ENABLEUNM_CAM_RAM_BOOT_ENABLE ( UNM_CAM_RAM + 0x000fc ) phantom.h 　
37138
 UNM_CAM_RAM_WOL_PORT_MODEUNM_CAM_RAM_WOL_PORT_MODE ( UNM_CAM_RAM + 0x00198 ) phantom.h 　
37139
 UNM_CAM_RAM_MAC_ADDRSUNM_CAM_RAM_MAC_ADDRS ( UNM_CAM_RAM + 0x001c0 ) phantom.h 　
37140
 UNM_CAM_RAM_COLD_BOOTUNM_CAM_RAM_COLD_BOOT ( UNM_CAM_RAM + 0x001fc ) phantom.h 　
37141
 UNM_CAM_RAM_COLD_BOOT_MAGICUNM_CAM_RAM_COLD_BOOT_MAGIC 0x55555555UL phantom.h 　
37142
 UNM_NIC_REGUNM_NIC_REG ( UNM_CRB_CAM + 0x02200 ) phantom.h 　
37143
 UNM_NIC_REG_NX_CDRPUNM_NIC_REG_NX_CDRP ( UNM_NIC_REG + 0x00018 ) phantom.h 　
37144
 UNM_NIC_REG_NX_ARG1UNM_NIC_REG_NX_ARG1 ( UNM_NIC_REG + 0x0001c ) phantom.h 　
37145
 UNM_NIC_REG_NX_ARG2UNM_NIC_REG_NX_ARG2 ( UNM_NIC_REG + 0x00020 ) phantom.h 　
37146
 UNM_NIC_REG_NX_ARG3UNM_NIC_REG_NX_ARG3 ( UNM_NIC_REG + 0x00024 ) phantom.h 　
37147
 UNM_NIC_REG_NX_SIGNUNM_NIC_REG_NX_SIGN ( UNM_NIC_REG + 0x00028 ) phantom.h 　
37148
 UNM_NIC_REG_DUMMY_BUF_ADDR_HIUNM_NIC_REG_DUMMY_BUF_ADDR_HI ( UNM_NIC_REG + 0x0003c ) phantom.h 　
37149
 UNM_NIC_REG_DUMMY_BUF_ADDR_LOUNM_NIC_REG_DUMMY_BUF_ADDR_LO ( UNM_NIC_REG + 0x00040 ) phantom.h 　
37150
 UNM_NIC_REG_CMDPEG_STATEUNM_NIC_REG_CMDPEG_STATE ( UNM_NIC_REG + 0x00050 ) phantom.h 　
37151
 UNM_NIC_REG_CMDPEG_STATE_INITIAUNM_NIC_REG_CMDPEG_STATE_INITIA 0xff01 phantom.h 　
37152
 UNM_NIC_REG_CMDPEG_STATE_INITIAUNM_NIC_REG_CMDPEG_STATE_INITIA 0xf00f phantom.h 　
37153
 UNM_NIC_REG_DUMMY_BUFUNM_NIC_REG_DUMMY_BUF ( UNM_NIC_REG + 0x000fc ) phantom.h 　
37154
 UNM_NIC_REG_DUMMY_BUF_INITUNM_NIC_REG_DUMMY_BUF_INIT 0 phantom.h 　
37155
 UNM_NIC_REG_XG_STATE_P3UNM_NIC_REG_XG_STATE_P3 ( UNM_NIC_REG + 0x00098 ) phantom.h 　
37156
 UNM_NIC_REG_XG_STATE_P3_LINK_UPUNM_NIC_REG_XG_STATE_P3_LINK_UP 0x01 phantom.h 　
37157
 UNM_NIC_REG_XG_STATE_P3_LINK_DOUNM_NIC_REG_XG_STATE_P3_LINK_DO 0x02 phantom.h 　
37158
 UNM_NIC_REG_RCVPEG_STATEUNM_NIC_REG_RCVPEG_STATE ( UNM_NIC_REG + 0x0013c ) phantom.h 　
37159
 UNM_NIC_REG_RCVPEG_STATE_INITIAUNM_NIC_REG_RCVPEG_STATE_INITIA 0xff01 phantom.h 　
37160
 UNM_NIC_REG_SW_INT_MASK_0UNM_NIC_REG_SW_INT_MASK_0 ( UNM_NIC_REG + 0x001d8 ) phantom.h 　
37161
 UNM_NIC_REG_SW_INT_MASK_1UNM_NIC_REG_SW_INT_MASK_1 ( UNM_NIC_REG + 0x001e0 ) phantom.h 　
37162
 UNM_NIC_REG_SW_INT_MASK_2UNM_NIC_REG_SW_INT_MASK_2 ( UNM_NIC_REG + 0x001e4 ) phantom.h 　
37163
 UNM_NIC_REG_SW_INT_MASK_3UNM_NIC_REG_SW_INT_MASK_3 ( UNM_NIC_REG + 0x001e8 ) phantom.h 　
37164
 UNM_CRB_ROMUSBUNM_CRB_ROMUSB UNM_CRB_BASE ( UNM_CRB_BLK_ROMUSB ) phantom.h 　
37165
 UNM_ROMUSB_GLBUNM_ROMUSB_GLB ( UNM_CRB_ROMUSB + 0x00000 ) phantom.h 　
37166
 UNM_ROMUSB_GLB_STATUSUNM_ROMUSB_GLB_STATUS ( UNM_ROMUSB_GLB + 0x00004 ) phantom.h 　
37167
 UNM_ROMUSB_GLB_STATUS_ROM_DONEUNM_ROMUSB_GLB_STATUS_ROM_DONE ( 1 << 1 ) phantom.h 　
37168
 UNM_ROMUSB_GLB_SW_RESETUNM_ROMUSB_GLB_SW_RESET ( UNM_ROMUSB_GLB + 0x00008 ) phantom.h 　
37169
 UNM_ROMUSB_GLB_SW_RESET_MAGICUNM_ROMUSB_GLB_SW_RESET_MAGIC 0x0080000fUL phantom.h 　
37170
 UNM_ROMUSB_GLB_PEGTUNE_DONEUNM_ROMUSB_GLB_PEGTUNE_DONE ( UNM_ROMUSB_GLB + 0x0005c ) phantom.h 　
37171
 UNM_ROMUSB_GLB_PEGTUNE_DONE_MAGUNM_ROMUSB_GLB_PEGTUNE_DONE_MAG 0x31 phantom.h 　
37172
 UNM_ROMUSB_ROMUNM_ROMUSB_ROM ( UNM_CRB_ROMUSB + 0x10000 ) phantom.h 　
37173
 UNM_ROMUSB_ROM_INSTR_OPCODEUNM_ROMUSB_ROM_INSTR_OPCODE ( UNM_ROMUSB_ROM + 0x00004 ) phantom.h 　
37174
 UNM_ROMUSB_ROM_ADDRESSUNM_ROMUSB_ROM_ADDRESS ( UNM_ROMUSB_ROM + 0x00008 ) phantom.h 　
37175
 UNM_ROMUSB_ROM_WDATAUNM_ROMUSB_ROM_WDATA ( UNM_ROMUSB_ROM + 0x0000c ) phantom.h 　
37176
 UNM_ROMUSB_ROM_ABYTE_CNTUNM_ROMUSB_ROM_ABYTE_CNT ( UNM_ROMUSB_ROM + 0x00010 ) phantom.h 　
37177
 UNM_ROMUSB_ROM_DUMMY_BYTE_CNTUNM_ROMUSB_ROM_DUMMY_BYTE_CNT ( UNM_ROMUSB_ROM + 0x00014 ) phantom.h 　
37178
 UNM_ROMUSB_ROM_RDATAUNM_ROMUSB_ROM_RDATA ( UNM_ROMUSB_ROM + 0x00018 ) phantom.h 　
37179
 UNM_CRB_TESTUNM_CRB_TEST UNM_CRB_BASE ( UNM_CRB_BLK_TEST ) phantom.h 　
37180
 UNM_TEST_CONTROLUNM_TEST_CONTROL ( UNM_CRB_TEST + 0x00090 ) phantom.h 　
37181
 UNM_TEST_CONTROL_STARTUNM_TEST_CONTROL_START 0x01 phantom.h 　
37182
 UNM_TEST_CONTROL_ENABLEUNM_TEST_CONTROL_ENABLE 0x02 phantom.h 　
37183
 UNM_TEST_CONTROL_BUSYUNM_TEST_CONTROL_BUSY 0x08 phantom.h 　
37184
 UNM_TEST_ADDR_LOUNM_TEST_ADDR_LO ( UNM_CRB_TEST + 0x00094 ) phantom.h 　
37185
 UNM_TEST_ADDR_HIUNM_TEST_ADDR_HI ( UNM_CRB_TEST + 0x00098 ) phantom.h 　
37186
 UNM_TEST_RDDATA_LOUNM_TEST_RDDATA_LO ( UNM_CRB_TEST + 0x000a8 ) phantom.h 　
37187
 UNM_TEST_RDDATA_HIUNM_TEST_RDDATA_HI ( UNM_CRB_TEST + 0x000ac ) phantom.h 　
37188
 UNM_CRB_PEG_0UNM_CRB_PEG_0 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_0 ) phantom.h 　
37189
 UNM_PEG_0_HALT_STATUSUNM_PEG_0_HALT_STATUS ( UNM_CRB_PEG_0 + 0x00030 ) phantom.h 　
37190
 UNM_PEG_0_HALTUNM_PEG_0_HALT ( UNM_CRB_PEG_0 + 0x0003c ) phantom.h 　
37191
 UNM_CRB_PEG_1UNM_CRB_PEG_1 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_1 ) phantom.h 　
37192
 UNM_PEG_1_HALT_STATUSUNM_PEG_1_HALT_STATUS ( UNM_CRB_PEG_1 + 0x00030 ) phantom.h 　
37193
 UNM_PEG_1_HALTUNM_PEG_1_HALT ( UNM_CRB_PEG_1 + 0x0003c ) phantom.h 　
37194
 UNM_CRB_PEG_2UNM_CRB_PEG_2 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_2 ) phantom.h 　
37195
 UNM_PEG_2_HALT_STATUSUNM_PEG_2_HALT_STATUS ( UNM_CRB_PEG_2 + 0x00030 ) phantom.h 　
37196
 UNM_PEG_2_HALTUNM_PEG_2_HALT ( UNM_CRB_PEG_2 + 0x0003c ) phantom.h 　
37197
 UNM_CRB_PEG_3UNM_CRB_PEG_3 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_3 ) phantom.h 　
37198
 UNM_PEG_3_HALT_STATUSUNM_PEG_3_HALT_STATUS ( UNM_CRB_PEG_3 + 0x00030 ) phantom.h 　
37199
 UNM_PEG_3_HALTUNM_PEG_3_HALT ( UNM_CRB_PEG_3 + 0x0003c ) phantom.h 　
37200
 UNM_CRB_PEG_4UNM_CRB_PEG_4 UNM_CRB_BASE ( UNM_CRB_BLK_PEG_4 ) phantom.h 　
37201
 UNM_PEG_4_HALT_STATUSUNM_PEG_4_HALT_STATUS ( UNM_CRB_PEG_4 + 0x00030 ) phantom.h 　
37202
 UNM_PEG_4_HALTUNM_PEG_4_HALT ( UNM_CRB_PEG_4 + 0x0003c ) phantom.h 　
37203
 GRF5101_ANTENNAGRF5101_ANTENNA 0xA3 rtl8180_grf5101.c 　
37204
 MAXIM_ANTENNAMAXIM_ANTENNA 0xb3 rtl8180_max2820.c 　
37205
 SA2400_ANTENNASA2400_ANTENNA 0x91 rtl8180_sa2400.c 　
37206
 SA2400_DIG_ANAPARAM_PWR1_ONSA2400_DIG_ANAPARAM_PWR1_ON 0x8 rtl8180_sa2400.c 　
37207
 SA2400_ANA_ANAPARAM_PWR1_ONSA2400_ANA_ANAPARAM_PWR1_ON 0x28 rtl8180_sa2400.c 　
37208
 SA2400_ANAPARAM_PWR0_ONSA2400_ANAPARAM_PWR0_ON 0x3 rtl8180_sa2400.c 　
37209
 SA2400_MAX_SENSSA2400_MAX_SENS 85 rtl8180_sa2400.c 　
37210
 SA2400_REG4_FIRDAC_SHIFTSA2400_REG4_FIRDAC_SHIFT 7 rtl8180_sa2400.c 　
37211
 RTL8225_ANAPARAM_ONRTL8225_ANAPARAM_ON 0xa0000b59 rtl8185_rtl8225.c 　
37212
 RTL8225_ANAPARAM2_ONRTL8225_ANAPARAM2_ON 0x860dec11 rtl8185_rtl8225.c 　
37213
 RTL8225_ANAPARAM_OFFRTL8225_ANAPARAM_OFF 0xa00beb59 rtl8185_rtl8225.c 　
37214
 RTL8225_ANAPARAM2_OFFRTL8225_ANAPARAM2_OFF 0x840dec11 rtl8185_rtl8225.c 　
37215
 RTL818X_NR_B_RATESRTL818X_NR_B_RATES 4 rtl818x.c 　
37216
 RTL818X_NR_RATESRTL818X_NR_RATES 12 rtl818x.c 　
37217
 RTL818X_NR_RF_NAMESRTL818X_NR_RF_NAMES 11 rtl818x.c 　
37218
 RTL_ROMRTL_ROM PCI_ROM rtl818x.c 　
37219
 MAX_RX_SIZEMAX_RX_SIZE IEEE80211_MAX_FRAME_LEN rtl818x.h 　
37220
 RF_PARAM_ANALOGPHYRF_PARAM_ANALOGPHY (1 << 0) rtl818x.h 　
37221
 RF_PARAM_ANTBDEFAULTRF_PARAM_ANTBDEFAULT (1 << 1) rtl818x.h 　
37222
 RF_PARAM_CARRIERSENSE1RF_PARAM_CARRIERSENSE1 (1 << 2) rtl818x.h 　
37223
 RF_PARAM_CARRIERSENSE2RF_PARAM_CARRIERSENSE2 (1 << 3) rtl818x.h 　
37224
 BB_ANTATTEN_CHAN14BB_ANTATTEN_CHAN14 0x0C rtl818x.h 　
37225
 BB_ANTENNA_BBB_ANTENNA_B 0x40 rtl818x.h 　
37226
 BB_HOST_BANGBB_HOST_BANG (1 << 30) rtl818x.h 　
37227
 BB_HOST_BANG_ENBB_HOST_BANG_EN (1 << 2) rtl818x.h 　
37228
 BB_HOST_BANG_CLKBB_HOST_BANG_CLK (1 << 1) rtl818x.h 　
37229
 BB_HOST_BANG_DATABB_HOST_BANG_DATA 1 rtl818x.h 　
37230
 ANAPARAM_TXDACOFF_SHIFTANAPARAM_TXDACOFF_SHIFT 27 rtl818x.h 　
37231
 ANAPARAM_PWR0_SHIFTANAPARAM_PWR0_SHIFT 28 rtl818x.h 　
37232
 ANAPARAM_PWR0_MASKANAPARAM_PWR0_MASK (0x07 << ANAPARAM_PWR0_SHIFT) rtl818x.h 　
37233
 ANAPARAM_PWR1_SHIFTANAPARAM_PWR1_SHIFT 20 rtl818x.h 　
37234
 ANAPARAM_PWR1_MASKANAPARAM_PWR1_MASK (0x7F << ANAPARAM_PWR1_SHIFT) rtl818x.h 　
37235
 RTL818X_RX_RING_SIZERTL818X_RX_RING_SIZE 8 rtl818x.h doesn't have to be a power of 2
37236
 RTL818X_TX_RING_SIZERTL818X_TX_RING_SIZE 8 rtl818x.h nor this [but 2^n is very slightly faster]
37237
 RTL818X_RING_ALIGNRTL818X_RING_ALIGN 256 rtl818x.h 　
37238
 RTL818X_MAX_RETRIESRTL818X_MAX_RETRIES 4 rtl818x.h 　
37239
 RTL818X_RF_DRIVERSRTL818X_RF_DRIVERS __table(struct rtl818x_rf_ops, "rtl818x_rf_drivers") rtl818x.h 　
37240
 __rtl818x_rf_driver__rtl818x_rf_driver __table_entry(RTL818X_RF_DRIVERS, 01) rtl818x.h 　

See Also

目次 | ファイル一覧 | 関数一覧 | ネームスペース一覧 | クラス一覧 | #define一覧 | マクロ一覧 | 外部変数一覧 | 構造体一覧 | 共用体一覧 | 列挙体一覧 | Const一覧 | 索引 | サイドメニュー

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